From b080306b2c082c226d5d327df16c34d1d97ddc92 Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Mon, 11 Apr 2016 21:52:41 +0000 Subject: asus/kgpe-d116|kcma-d8: Update coreboot to latest version --- resources/libreboot/config/grub/kcma-d8/cbrevision | 2 +- .../libreboot/config/grub/kgpe-d16/cbrevision | 2 +- .../libreboot/config/seabios/kcma-d8/cbrevision | 2 +- .../libreboot/config/seabios/kgpe-d16/cbrevision | 2 +- ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ------ ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ------ ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ------ ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ------ ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ------ ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ++++++ ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ++++++ ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ++++++ ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ++++++ ...fam10h-fam15h-don-t-use-microcode-updates.patch | 89 ++++++ .../blobs.list | 52 ---- .../nonblobs.list | 335 --------------------- .../nonblobs_notes | 15 - .../blobs.list | 52 ++++ .../nonblobs.list | 335 +++++++++++++++++++++ .../nonblobs_notes | 15 + 20 files changed, 851 insertions(+), 851 deletions(-) delete mode 100644 resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch delete mode 100644 resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch delete mode 100644 resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch delete mode 100644 resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch delete mode 100644 resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch create mode 100644 resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch create mode 100644 resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch create mode 100644 resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch create mode 100644 resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch create mode 100644 resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch delete mode 100644 resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/blobs.list delete mode 100644 resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs.list delete mode 100644 resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs_notes create mode 100644 resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/blobs.list create mode 100644 resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs.list create mode 100644 resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs_notes diff --git a/resources/libreboot/config/grub/kcma-d8/cbrevision b/resources/libreboot/config/grub/kcma-d8/cbrevision index 3f4cc3a1..1ea29259 100644 --- a/resources/libreboot/config/grub/kcma-d8/cbrevision +++ b/resources/libreboot/config/grub/kcma-d8/cbrevision @@ -1 +1 @@ -bdd9df76379243bee5b5ba39f2f7034e31b8a762 +c13866fd405213fd5ca4fed6a14bed80909df03e diff --git a/resources/libreboot/config/grub/kgpe-d16/cbrevision b/resources/libreboot/config/grub/kgpe-d16/cbrevision index 3f4cc3a1..1ea29259 100644 --- a/resources/libreboot/config/grub/kgpe-d16/cbrevision +++ b/resources/libreboot/config/grub/kgpe-d16/cbrevision @@ -1 +1 @@ -bdd9df76379243bee5b5ba39f2f7034e31b8a762 +c13866fd405213fd5ca4fed6a14bed80909df03e diff --git a/resources/libreboot/config/seabios/kcma-d8/cbrevision b/resources/libreboot/config/seabios/kcma-d8/cbrevision index 3f4cc3a1..1ea29259 100644 --- a/resources/libreboot/config/seabios/kcma-d8/cbrevision +++ b/resources/libreboot/config/seabios/kcma-d8/cbrevision @@ -1 +1 @@ -bdd9df76379243bee5b5ba39f2f7034e31b8a762 +c13866fd405213fd5ca4fed6a14bed80909df03e diff --git a/resources/libreboot/config/seabios/kgpe-d16/cbrevision b/resources/libreboot/config/seabios/kgpe-d16/cbrevision index 3f4cc3a1..1ea29259 100644 --- a/resources/libreboot/config/seabios/kgpe-d16/cbrevision +++ b/resources/libreboot/config/seabios/kgpe-d16/cbrevision @@ -1 +1 @@ -bdd9df76379243bee5b5ba39f2f7034e31b8a762 +c13866fd405213fd5ca4fed6a14bed80909df03e diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch deleted file mode 100644 index 64278632..00000000 --- a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch deleted file mode 100644 index 64278632..00000000 --- a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch deleted file mode 100644 index 64278632..00000000 --- a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch deleted file mode 100644 index 64278632..00000000 --- a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch deleted file mode 100644 index 64278632..00000000 --- a/resources/libreboot/patch/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 -From: Francis Rowe -Date: Tue, 8 Mar 2016 07:21:33 +0000 -Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates - -There were build issues in libreboot. We don't use microcode updates anyway. -When selecting no microcode updates in menuconfig, build failed because -coreboot for these boards was still trying to add microcode. ---- - src/cpu/Makefile.inc | 34 +------------------------- - src/cpu/amd/family_10h-family_15h/Kconfig | 1 - - src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- - 3 files changed, 1 insertion(+), 44 deletions(-) - -diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc -index 046c418..ef0e236 100644 ---- a/src/cpu/Makefile.inc -+++ b/src/cpu/Makefile.inc -@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) - ## Rules for building the microcode blob in CBFS - ################################################################################ - --ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) --cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin --endif -- --ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) --cbfs-files-y += cpu_microcode_blob.bin --cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin -- --$(objgenerated)/microcode.bin: -- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" -- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) --endif -- --# We just mash all microcode binaries together into one binary to rule them all. --# This approach assumes that the microcode binaries are properly padded, and --# their headers specify the correct size. This works fairly well on isolatied --# updates, such as Intel and some AMD microcode, but won't work very well if the --# updates are wrapped in a container, like AMD's microcode update container. If --# there is only one microcode binary (i.e. one container), then we don't have --# this issue, and this rule will continue to work. --$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) -- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" -- @echo $(cpu_microcode_bins) -- cat /dev/null $+ > $@ -- --cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin --cpu_microcode_blob.bin-type := microcode -- --ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) --cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) --else --cpu_microcode_blob.bin-align := 16 --endif -+# What? Nope! We don't do that in libreboot. -diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig -index 14ab1cd..3f873a1 100644 ---- a/src/cpu/amd/family_10h-family_15h/Kconfig -+++ b/src/cpu/amd/family_10h-family_15h/Kconfig -@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX - select UDELAY_LAPIC - select HAVE_MONOTONIC_TIMER - select SUPPORT_CPU_UCODE_IN_CBFS -- select CPU_MICROCODE_MULTIPLE_FILES - - if CPU_AMD_MODEL_10XXX - -diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc -index f10f732..a295475 100644 ---- a/src/cpu/amd/family_10h-family_15h/Makefile.inc -+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc -@@ -9,13 +9,3 @@ romstage-y += ram_calc.c - ramstage-y += ram_calc.c - ramstage-y += monotonic_timer.c - ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c -- --# Microcode for Family 10h, 11h, 12h, and 14h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin --microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin --microcode_amd.bin-type := microcode -- --# Microcode for Family 15h --cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin --microcode_amd_fam15h.bin-type := microcode --- -1.9.1 - diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch new file mode 100644 index 00000000..64278632 --- /dev/null +++ b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch new file mode 100644 index 00000000..64278632 --- /dev/null +++ b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/grub/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch new file mode 100644 index 00000000..64278632 --- /dev/null +++ b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kcma-d8/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch new file mode 100644 index 00000000..64278632 --- /dev/null +++ b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kfsn4-dre/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch new file mode 100644 index 00000000..64278632 --- /dev/null +++ b/resources/libreboot/patch/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/seabios/kgpe-d16/0001-HOTFIX-AMD-fam10h-fam15h-don-t-use-microcode-updates.patch @@ -0,0 +1,89 @@ +From 388f9dbe66f6834013d478eeffe154d59ca6c239 Mon Sep 17 00:00:00 2001 +From: Francis Rowe +Date: Tue, 8 Mar 2016 07:21:33 +0000 +Subject: [PATCH] HOTFIX: AMD fam10h/fam15h: don't use microcode updates + +There were build issues in libreboot. We don't use microcode updates anyway. +When selecting no microcode updates in menuconfig, build failed because +coreboot for these boards was still trying to add microcode. +--- + src/cpu/Makefile.inc | 34 +------------------------- + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + src/cpu/amd/family_10h-family_15h/Makefile.inc | 10 -------- + 3 files changed, 1 insertion(+), 44 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index 046c418..ef0e236 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -17,36 +17,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(cpu_microcode_bins) +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat /dev/null $+ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# What? Nope! We don't do that in libreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index 14ab1cd..3f873a1 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -11,7 +11,6 @@ config CPU_AMD_MODEL_10XXX + select UDELAY_LAPIC + select HAVE_MONOTONIC_TIMER + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + + if CPU_AMD_MODEL_10XXX + +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index f10f732..a295475 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -9,13 +9,3 @@ romstage-y += ram_calc.c + ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c +- +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode +-- +1.9.1 + diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/blobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/blobs.list deleted file mode 100644 index a8a9a964..00000000 --- a/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/blobs.list +++ /dev/null @@ -1,52 +0,0 @@ -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c -src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c -src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c -src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h -src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/excel925.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h -src/vendorcode/amd/cimx/rd890/HotplugFirmware.h -src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc -src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h -src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs.list deleted file mode 100644 index 6f672156..00000000 --- a/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs.list +++ /dev/null @@ -1,335 +0,0 @@ -payloads/libpayload/curses/PDCurses-3.4/demos/worm.c -payloads/libpayload/curses/PDCurses-3.4/sdl1/deffont.h -payloads/libpayload/curses/PDCurses-3.4/sdl1/deficon.h -payloads/libpayload/curses/PDCurses-3.4/win32/pdckbd.c -payloads/libpayload/curses/PDCurses-3.4/x11/big_icon.xbm -payloads/libpayload/curses/PDCurses-3.4/x11/little_icon.xbm -payloads/libpayload/curses/pdcurses-backend/pdcdisp.c -payloads/libpayload/curses/tinycurses.c -payloads/libpayload/drivers/keyboard.c -payloads/libpayload/drivers/usb/usbmsc.c -payloads/libpayload/tests/cbfs-x86-test.c -payloads/nvramcui/payload.sh -src/cpu/allwinner/a10/raminit.c -src/cpu/amd/geode_gx2/Kconfig -src/cpu/amd/geode_lx/cpureginit.c -src/cpu/amd/geode_lx/Kconfig -src/cpu/amd/model_10xxx/init_cpus.c -src/cpu/amd/model_10xxx/processor_name.c -src/cpu/amd/model_fxx/model_fxx_update_microcode.c -src/cpu/amd/model_fxx/powernow_acpi.c -src/cpu/intel/haswell/acpi.c -src/cpu/intel/microcode/microcode.c -src/cpu/intel/model_2065x/acpi.c -src/cpu/intel/model_206ax/acpi.c -src/cpu/Kconfig -src/cpu/samsung/exynos5250/update-bl1.sh -src/cpu/via/nano/update_ucode.c -src/device/dram/spd_cache.c -src/device/Kconfig -src/device/oprom/yabel/interrupt.c -src/drivers/pc80/mc146818rtc.c -src/drivers/pc80/vga/vga_palette.c -src/Kconfig -src/lib/coreboot_table.c -src/lib/jpeg.c -src/mainboard/advansus/a785e-i/mptable.c -src/mainboard/amd/bimini_fam10/mptable.c -src/mainboard/amd/dinar/buildOpts.c -src/mainboard/amd/dinar/Kconfig -src/mainboard/amd/inagua/Kconfig -src/mainboard/amd/olivehill/mptable.c -src/mainboard/amd/olivehillplus/mptable.c -src/mainboard/amd/parmer/mptable.c -src/mainboard/amd/persimmon/Kconfig -src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c -src/mainboard/amd/south_station/Kconfig -src/mainboard/amd/south_station/mptable.c -src/mainboard/amd/thatcher/mptable.c -src/mainboard/amd/torpedo/Kconfig -src/mainboard/amd/torpedo/mptable.c -src/mainboard/amd/union_station/Kconfig -src/mainboard/amd/union_station/mptable.c -src/mainboard/asrock/e350m1/mptable.c -src/mainboard/asrock/imb-a180/mptable.c -src/mainboard/asus/f2a85-m/mptable.c -src/mainboard/asus/m5a88-v/mptable.c -src/mainboard/avalue/eax-785e/mptable.c -src/mainboard/digitallogic/adl855pc/irq_tables.c -src/mainboard/gigabyte/ga-b75m-d3h/romstage.c -src/mainboard/gizmosphere/gizmo2/Micron_MT41J128M16JT.spd.hex -src/mainboard/gizmosphere/gizmo/mptable.c -src/mainboard/google/bolt/romstage.c -src/mainboard/google/butterfly/hda_verb.c -src/mainboard/google/butterfly/mainboard.c -src/mainboard/google/falco/romstage.c -src/mainboard/google/link/hda_verb.c -src/mainboard/google/link/i915.c -src/mainboard/google/link/romstage.c -src/mainboard/google/panther/lan.c -src/mainboard/google/peach_pit/mainboard.c -src/mainboard/google/peppy/romstage.c -src/mainboard/google/rambi/romstage.c -src/mainboard/google/samus/romstage.c -src/mainboard/google/slippy/romstage.c -src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c -src/mainboard/hp/pavilion_m6_1035dx/mptable.c -src/mainboard/ibase/mb899/cmos.layout -src/mainboard/ibase/mb899/superio_hwm.c -src/mainboard/intel/minnowmax/Kconfig -src/mainboard/intel/wtm2/i915.c -src/mainboard/jetway/nf81-t56n-lf/Kconfig -src/mainboard/kontron/986lcd-m/cmos.layout -src/mainboard/kontron/986lcd-m/mainboard.c -src/mainboard/lenovo/g505s/mptable.c -src/mainboard/lippert/frontrunner-af/Kconfig -src/mainboard/lippert/frontrunner-af/mptable.c -src/mainboard/lippert/toucan-af/Kconfig -src/mainboard/lippert/toucan-af/mptable.c -src/mainboard/msi/ms9652_fam10/get_bus_conf.c -src/mainboard/packardbell/ms2290/mainboard.c -src/mainboard/samsung/lumpy/romstage.c -src/mainboard/siemens/sitemp_g1p1/cmos.layout -src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c -src/mainboard/supermicro/h8qgi/buildOpts.c -src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c -src/mainboard/supermicro/h8scm/buildOpts.c -src/mainboard/tyan/s2912_fam10/get_bus_conf.c -src/mainboard/tyan/s4880/irq_tables.c -src/mainboard/tyan/s4882/irq_tables.c -src/mainboard/tyan/s8226/buildOpts.c -src/northbridge/amd/agesa/common/common.c -src/northbridge/amd/amdk8/acpi.c -src/northbridge/amd/amdk8/coherent_ht.c -src/northbridge/amd/amdk8/raminit_test.c -src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c -src/northbridge/amd/amdmct/mct/mctardk3.c -src/northbridge/amd/amdmct/mct/mctardk4.c -src/northbridge/amd/amdmct/mct/mcttmrl.c -src/northbridge/amd/gx2/pll_reset.c -src/northbridge/amd/pi/00730F01/Kconfig -src/northbridge/intel/gm45/raminit_rcomp_calibration.c -src/northbridge/intel/gm45/raminit_read_write_training.c -src/northbridge/intel/haswell/Kconfig -src/northbridge/intel/haswell/raminit.c -src/northbridge/intel/i82830/vga.c -src/northbridge/intel/i945/raminit.c -src/northbridge/intel/nehalem/gma.c -src/northbridge/intel/nehalem/raminit.c -src/northbridge/intel/sandybridge/gma.c -src/northbridge/intel/sandybridge/Kconfig -src/northbridge/intel/sandybridge/raminit.c -src/northbridge/via/cx700/raminit.c -src/northbridge/via/vx800/ide.c -src/northbridge/via/vx800/uma_ram_setting.c -src/northbridge/via/vx900/sata.c -src/soc/intel/baytrail/acpi.c -src/soc/intel/baytrail/Kconfig -src/soc/intel/baytrail/romstage/raminit.c -src/soc/intel/broadwell/acpi.c -src/soc/intel/broadwell/Kconfig -src/soc/intel/broadwell/romstage/raminit.c -src/soc/intel/fsp_baytrail/acpi.c -src/soc/intel/fsp_baytrail/fsp/Kconfig -src/soc/intel/fsp_baytrail/Kconfig -src/soc/qualcomm/ipq806x/Kconfig -src/soc/samsung/exynos5250/clock.c -src/soc/samsung/exynos5420/clock.c -src/southbridge/amd/agesa/hudson/Kconfig -src/southbridge/amd/cimx/sb800/Kconfig -src/southbridge/intel/bd82x6x/Kconfig -src/southbridge/intel/i82801ix/dmi_setup.c -src/southbridge/intel/ibexpeak/Kconfig -src/southbridge/intel/lynxpoint/Kconfig -src/southbridge/intel/sch/Kconfig -src/southbridge/sis/sis966/early_smbus.c -src/southbridge/sis/sis966/ide.c -src/southbridge/sis/sis966/sata.c -src/southbridge/sis/sis966/usb2.c -src/southbridge/sis/sis966/usb.c -src/superio/via/vt1211/vt1211.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Dmi.c -src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c -src/vendorcode/amd/agesa/f10/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Dmi.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Dmi.c -src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12WheaInitDataTables.c -src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c -src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/LN/F12GfxServices.c -src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/cpuF10Dmi.c -src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c -src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/cpuF10Dmi.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c -src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c -src/vendorcode/amd/agesa/f15/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f15/Proc/Mem/Ps/OR/mpor3.c -src/vendorcode/amd/agesa/f15/Proc/Mem/Tech/DDR3/mtlrdimm3.c -src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxIntegratedInfoTableTN.c -src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.c -src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mptn3.c -src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.c -src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16WheaInitDataTables.c -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxLibV3.c -src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.c -src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c -src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpkb3.c -src/vendorcode/amd/cimx/sb800/SATA.c -src/vendorcode/google/chromeos/build-snow -util/amdtools/example_input/lspci-cb-48G-667MHz-18.2-20090909e -util/amdtools/example_input/lspci-prop-48G-667MHz-18.2 -util/cbfstool/linux_trampoline.c -util/ifdtool/ifdtool.c -util/kconfig/zconf.hash.c_shipped -util/kconfig/zconf.lex.c_shipped -util/kconfig/zconf.tab.c_shipped -util/nvramtool/accessors/layout-bin.c -util/romcc/do_tests.sh -util/romcc/tests/include/linux_console.h -util/romcc/tests/linux_console.h -util/romcc/tests/linux_test5.c -util/romcc/tests/raminit_test6.c -util/romcc/tests/raminit_test7.c -util/romcc/tests/simple_test14.c -util/romcc/tests/simple_test30.c -util/romcc/tests/simple_test38.c -util/romcc/tests/simple_test39.c -util/romcc/tests/simple_test54.c -util/romcc/tests/simple_test59.c -util/romcc/tests/simple_test72.c -util/romcc/tests/simple_test73.c -util/sconfig/lex.yy.c_shipped -util/sconfig/sconfig.tab.c_shipped -util/superiotool/fintek.c -util/superiotool/ite.c -util/superiotool/smsc.c -util/superiotool/winbond.c -src/mainboard/google/slippy/Micron_4KTF25664HZ.spd.hex -src/mainboard/google/falco/Micron_4KTF25664HZ.spd.hex -src/mainboard/google/peppy/Micron_4KTF25664HZ.spd.hex -src/mainboard/google/link/micron_4Gb_1600_1.35v_x16.spd.hex -src/mainboard/google/rambi/spd/micron_1GiB_dimm_MT41K128M16JT-125.spd.hex -src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex -src/mainboard/google/bolt/micron_4Gb_1600_1.35v_x16.spd.hex -src/mainboard/google/link/samsung_4Gb_1600_1.35v_x16.spd.hex -src/mainboard/google/link/elpida_4Gb_1600_x16.spd.hex -src/mainboard/google/slippy/Hynix_HMT425S6AFR6A.spd.hex -src/mainboard/google/falco/Hynix_HMT425S6AFR6A.spd.hex -src/mainboard/google/falco/Elpida_EDJ4216EFBG.spd.hex -src/mainboard/google/rambi/spd/hynix_1GiB_dimm_H5TC2G63FFR-PBA.spd.hex -src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex -src/mainboard/google/bolt/samsung_4Gb_1600_1.35v_x16.spd.hex -src/mainboard/google/bolt/elpida_4Gb_1600_x16.spd.hex -src/mainboard/google/peppy/Hynix_HMT425S6AFR6A.spd.hex -src/mainboard/google/peppy/Elpida_EDJ4216EFBG.spd.hex -src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex -src/mainboard/google/samus/spd/empty.spd.hex -src/mainboard/google/samus/spd/elpida_4.spd.hex -src/mainboard/google/samus/spd/hynix_4.spd.hex -src/mainboard/google/samus/spd/elpida_16.spd.hex -src/mainboard/google/samus/spd/hynix_8.spd.hex -src/mainboard/google/samus/spd/hynix_16.spd.hex -src/mainboard/google/samus/spd/samsung_8.spd.hex -src/mainboard/google/samus/spd/elpida_8.spd.hex -src/mainboard/google/samus/spd/samsung_4.spd.hex -src/mainboard/google/auron/spd/Micron_4KTF25664HZ.spd.hex -src/mainboard/google/auron/spd/Elpida_EDJ4216EFBG.spd.hex -src/mainboard/google/auron/spd/Hynix_HMT425S6AFR6A.spd.hex -src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex -src/mainboard/google/auron/spd/empty.spd.hex -src/mainboard/google/cyan/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex -src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex -src/mainboard/google/cyan/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex -src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBLTALAR.spd.hex -src/mainboard/google/glados/spd/empty.spd.hex -src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8JTBLAR.spd.hex -src/mainboard/intel/sklrvp/spd/empty.spd.hex -src/mainboard/intel/sklrvp/spd/rvp3.spd.hex -src/mainboard/intel/kunimitsu/spd/empty.spd.hex -src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex -src/mainboard/intel/strago/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex -src/mainboard/intel/strago/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex -src/mainboard/intel/strago/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex -src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTALAR-NUD-2G-1866.spd.hex -src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCF-1G-1866.spd.hex -src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E6E304EE-EGCF-2G-1866.spd.hex -src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866.spd.hex -src/mainboard/bap/ode_e20XX/BAP_Q7.spd.hex -src/northbridge/intel/nehalem/raminit_tables.c -src/northbridge/intel/sandybridge/raminit_patterns.h -src/southbridge/nvidia/mcp55/early_setup_ss.h -src/southbridge/nvidia/ck804/early_setup_ss.h -src/southbridge/sis/sis966/early_setup_ss.h -util/crossgcc/patches/binutils-2.25_riscv.patch -src/southbridge/amd/pi/hudson/Kconfig -src/drivers/xgi/common/vb_setmode.c -src/drivers/xgi/common/vb_table.h -src/drivers/xgi/common/XGI_main.h -src/mainboard/siemens/mc_tcu3/romstage.c -src/mainboard/siemens/mc_tcu3/lcd_panel.c -src/mainboard/siemens/mc_tcu3/modhwinfo.c -src/mainboard/pcengines/apu1/Kconfig -src/mainboard/asus/kfsn4-dre/get_bus_conf.c -src/mainboard/google/samus/spd/spd.c -src/mainboard/hp/abm/mptable.c -src/northbridge/amd/pi/00630F01/Kconfig -src/cpu/amd/microcode/microcode.c -src/lib/tlcl_structures.h -util/rockchip/make_idb.py -util/autoport/readme.md -util/bimgtool/bimgtool.c -util/cbfstool/fmd_parser.c_shipped -util/cbfstool/fmd_scanner.c_shipped -Documentation/CorebootBuildingGuide.tex -Documentation/hypertransport.svg -Documentation/codeflow.svg -src/soc/broadcom/cygnus/ddr_init.c -src/soc/broadcom/cygnus/ddr_init_table.c -src/soc/qualcomm/ipq806x/lcc.c -src/soc/intel/braswell/acpi.c -src/soc/intel/braswell/Kconfig -src/vendorcode/amd/pi/Kconfig -src/drivers/intel/fsp1_1/Kconfig -src/drivers/intel/fsp1_1/fsp_gop.c -src/drivers/i2c/ww_ring/ww_ring_programs.c -src/mainboard/google/auron/spd/spd.c -src/mainboard/google/jecht/lan.c -src/mainboard/gigabyte/ga-b75m-d3v/romstage.c -src/mainboard/amd/lamar/Kconfig -payloads/external/GRUB2/Kconfig -payloads/external/FILO/Kconfig -payloads/external/SeaBIOS/Kconfig -src/soc/intel/common/fsp_ramstage.c -src/soc/intel/skylake/Kconfig -src/soc/intel/braswell/gpio.c -src/soc/nvidia/tegra210/Kconfig -src/soc/nvidia/tegra210/mtc.c -src/southbridge/intel/common/firmware/Kconfig -src/mainboard/google/cyan/spd/spd.c -src/mainboard/google/cyan/Kconfig -src/mainboard/google/glados/spd/spd.c -src/mainboard/intel/sklrvp/spd/spd.c -src/mainboard/intel/kunimitsu/spd/spd.c -src/mainboard/intel/strago/spd/spd.c -src/mainboard/intel/strago/Kconfig -src/mainboard/amd/bettong/mptable.c -src/northbridge/amd/pi/00660F01/Kconfig -util/crossgcc/patches/gcc-5.2.0_riscv.patch -util/xcompile/xcompile -src/northbridge/intel/sandybridge/raminit_mrc.c -src/northbridge/intel/fsp_rangeley/fsp/Kconfig -src/drivers/intel/fsp1_1/car.c -src/mainboard/intel/mohonpeak/Kconfig -src/mainboard/apple/macbookair4_2/early_southbridge.c -src/cpu/intel/fsp_model_406dx/acpi.c -src/northbridge/intel/fsp_sandybridge/fsp/Kconfig -src/drivers/aspeed/common/ast_dram_tables.h -src/drivers/aspeed/common/ast_tables.h -src/mainboard/intel/cougar_canyon2/Kconfig -src/cpu/amd/family_10h-family_15h/processor_name.c -src/cpu/amd/family_10h-family_15h/init_cpus.c -src/cpu/intel/fsp_model_206ax/acpi.c diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs_notes b/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs_notes deleted file mode 100644 index 551da4a8..00000000 --- a/resources/utilities/coreboot-libre/blobs/coreboot/bdd9df76379243bee5b5ba39f2f7034e31b8a762/nonblobs_notes +++ /dev/null @@ -1,15 +0,0 @@ -.spd.hex files - serial presence detect. These are not blobs -see JEDEC standard or https://en.wikipedia.org/wiki/Serial_presence_detect -These are added to the nonblobs file - -src/northbridge/intel/nehalem/raminit_tables.c" -src/northbridge/intel/sandybridge/raminit_patterns.h -These are used by native raminit for the relevant platforms, and are not blobs - -"src/southbridge/nvidia/mcp55/early_setup_ss.h" \ -"src/southbridge/nvidia/ck804/early_setup_ss.h" \ -"src/southbridge/sis/sis966/early_setup_ss.h" -not blobs - -The text in this file is CC-BY-SA 4.0 or higher. All contributions to it must -be made under the same license. diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/blobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/blobs.list new file mode 100644 index 00000000..a8a9a964 --- /dev/null +++ b/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/blobs.list @@ -0,0 +1,52 @@ +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c +src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c +src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c +src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h +src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/excel925.h +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h +src/vendorcode/amd/cimx/rd890/HotplugFirmware.h +src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc +src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h +src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs.list b/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs.list new file mode 100644 index 00000000..6f672156 --- /dev/null +++ b/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs.list @@ -0,0 +1,335 @@ +payloads/libpayload/curses/PDCurses-3.4/demos/worm.c +payloads/libpayload/curses/PDCurses-3.4/sdl1/deffont.h +payloads/libpayload/curses/PDCurses-3.4/sdl1/deficon.h +payloads/libpayload/curses/PDCurses-3.4/win32/pdckbd.c +payloads/libpayload/curses/PDCurses-3.4/x11/big_icon.xbm +payloads/libpayload/curses/PDCurses-3.4/x11/little_icon.xbm +payloads/libpayload/curses/pdcurses-backend/pdcdisp.c +payloads/libpayload/curses/tinycurses.c +payloads/libpayload/drivers/keyboard.c +payloads/libpayload/drivers/usb/usbmsc.c +payloads/libpayload/tests/cbfs-x86-test.c +payloads/nvramcui/payload.sh +src/cpu/allwinner/a10/raminit.c +src/cpu/amd/geode_gx2/Kconfig +src/cpu/amd/geode_lx/cpureginit.c +src/cpu/amd/geode_lx/Kconfig +src/cpu/amd/model_10xxx/init_cpus.c +src/cpu/amd/model_10xxx/processor_name.c +src/cpu/amd/model_fxx/model_fxx_update_microcode.c +src/cpu/amd/model_fxx/powernow_acpi.c +src/cpu/intel/haswell/acpi.c +src/cpu/intel/microcode/microcode.c +src/cpu/intel/model_2065x/acpi.c +src/cpu/intel/model_206ax/acpi.c +src/cpu/Kconfig +src/cpu/samsung/exynos5250/update-bl1.sh +src/cpu/via/nano/update_ucode.c +src/device/dram/spd_cache.c +src/device/Kconfig +src/device/oprom/yabel/interrupt.c +src/drivers/pc80/mc146818rtc.c +src/drivers/pc80/vga/vga_palette.c +src/Kconfig +src/lib/coreboot_table.c +src/lib/jpeg.c +src/mainboard/advansus/a785e-i/mptable.c +src/mainboard/amd/bimini_fam10/mptable.c +src/mainboard/amd/dinar/buildOpts.c +src/mainboard/amd/dinar/Kconfig +src/mainboard/amd/inagua/Kconfig +src/mainboard/amd/olivehill/mptable.c +src/mainboard/amd/olivehillplus/mptable.c +src/mainboard/amd/parmer/mptable.c +src/mainboard/amd/persimmon/Kconfig +src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c +src/mainboard/amd/south_station/Kconfig +src/mainboard/amd/south_station/mptable.c +src/mainboard/amd/thatcher/mptable.c +src/mainboard/amd/torpedo/Kconfig +src/mainboard/amd/torpedo/mptable.c +src/mainboard/amd/union_station/Kconfig +src/mainboard/amd/union_station/mptable.c +src/mainboard/asrock/e350m1/mptable.c +src/mainboard/asrock/imb-a180/mptable.c +src/mainboard/asus/f2a85-m/mptable.c +src/mainboard/asus/m5a88-v/mptable.c +src/mainboard/avalue/eax-785e/mptable.c +src/mainboard/digitallogic/adl855pc/irq_tables.c +src/mainboard/gigabyte/ga-b75m-d3h/romstage.c +src/mainboard/gizmosphere/gizmo2/Micron_MT41J128M16JT.spd.hex +src/mainboard/gizmosphere/gizmo/mptable.c +src/mainboard/google/bolt/romstage.c +src/mainboard/google/butterfly/hda_verb.c +src/mainboard/google/butterfly/mainboard.c +src/mainboard/google/falco/romstage.c +src/mainboard/google/link/hda_verb.c +src/mainboard/google/link/i915.c +src/mainboard/google/link/romstage.c +src/mainboard/google/panther/lan.c +src/mainboard/google/peach_pit/mainboard.c +src/mainboard/google/peppy/romstage.c +src/mainboard/google/rambi/romstage.c +src/mainboard/google/samus/romstage.c +src/mainboard/google/slippy/romstage.c +src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c +src/mainboard/hp/pavilion_m6_1035dx/mptable.c +src/mainboard/ibase/mb899/cmos.layout +src/mainboard/ibase/mb899/superio_hwm.c +src/mainboard/intel/minnowmax/Kconfig +src/mainboard/intel/wtm2/i915.c +src/mainboard/jetway/nf81-t56n-lf/Kconfig +src/mainboard/kontron/986lcd-m/cmos.layout +src/mainboard/kontron/986lcd-m/mainboard.c +src/mainboard/lenovo/g505s/mptable.c +src/mainboard/lippert/frontrunner-af/Kconfig +src/mainboard/lippert/frontrunner-af/mptable.c +src/mainboard/lippert/toucan-af/Kconfig +src/mainboard/lippert/toucan-af/mptable.c +src/mainboard/msi/ms9652_fam10/get_bus_conf.c +src/mainboard/packardbell/ms2290/mainboard.c +src/mainboard/samsung/lumpy/romstage.c +src/mainboard/siemens/sitemp_g1p1/cmos.layout +src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c +src/mainboard/supermicro/h8qgi/buildOpts.c +src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c +src/mainboard/supermicro/h8scm/buildOpts.c +src/mainboard/tyan/s2912_fam10/get_bus_conf.c +src/mainboard/tyan/s4880/irq_tables.c +src/mainboard/tyan/s4882/irq_tables.c +src/mainboard/tyan/s8226/buildOpts.c +src/northbridge/amd/agesa/common/common.c +src/northbridge/amd/amdk8/acpi.c +src/northbridge/amd/amdk8/coherent_ht.c +src/northbridge/amd/amdk8/raminit_test.c +src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c +src/northbridge/amd/amdmct/mct/mctardk3.c +src/northbridge/amd/amdmct/mct/mctardk4.c +src/northbridge/amd/amdmct/mct/mcttmrl.c +src/northbridge/amd/gx2/pll_reset.c +src/northbridge/amd/pi/00730F01/Kconfig +src/northbridge/intel/gm45/raminit_rcomp_calibration.c +src/northbridge/intel/gm45/raminit_read_write_training.c +src/northbridge/intel/haswell/Kconfig +src/northbridge/intel/haswell/raminit.c +src/northbridge/intel/i82830/vga.c +src/northbridge/intel/i945/raminit.c +src/northbridge/intel/nehalem/gma.c +src/northbridge/intel/nehalem/raminit.c +src/northbridge/intel/sandybridge/gma.c +src/northbridge/intel/sandybridge/Kconfig +src/northbridge/intel/sandybridge/raminit.c +src/northbridge/via/cx700/raminit.c +src/northbridge/via/vx800/ide.c +src/northbridge/via/vx800/uma_ram_setting.c +src/northbridge/via/vx900/sata.c +src/soc/intel/baytrail/acpi.c +src/soc/intel/baytrail/Kconfig +src/soc/intel/baytrail/romstage/raminit.c +src/soc/intel/broadwell/acpi.c +src/soc/intel/broadwell/Kconfig +src/soc/intel/broadwell/romstage/raminit.c +src/soc/intel/fsp_baytrail/acpi.c +src/soc/intel/fsp_baytrail/fsp/Kconfig +src/soc/intel/fsp_baytrail/Kconfig +src/soc/qualcomm/ipq806x/Kconfig +src/soc/samsung/exynos5250/clock.c +src/soc/samsung/exynos5420/clock.c +src/southbridge/amd/agesa/hudson/Kconfig +src/southbridge/amd/cimx/sb800/Kconfig +src/southbridge/intel/bd82x6x/Kconfig +src/southbridge/intel/i82801ix/dmi_setup.c +src/southbridge/intel/ibexpeak/Kconfig +src/southbridge/intel/lynxpoint/Kconfig +src/southbridge/intel/sch/Kconfig +src/southbridge/sis/sis966/early_smbus.c +src/southbridge/sis/sis966/ide.c +src/southbridge/sis/sis966/sata.c +src/southbridge/sis/sis966/usb2.c +src/southbridge/sis/sis966/usb.c +src/superio/via/vt1211/vt1211.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Dmi.c +src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c +src/vendorcode/amd/agesa/f10/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Dmi.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Dmi.c +src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12WheaInitDataTables.c +src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c +src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/LN/F12GfxServices.c +src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/cpuF10Dmi.c +src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c +src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/cpuF10Dmi.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c +src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c +src/vendorcode/amd/agesa/f15/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f15/Proc/Mem/Ps/OR/mpor3.c +src/vendorcode/amd/agesa/f15/Proc/Mem/Tech/DDR3/mtlrdimm3.c +src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxIntegratedInfoTableTN.c +src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.c +src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mptn3.c +src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.c +src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16WheaInitDataTables.c +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxLibV3.c +src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.c +src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c +src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpkb3.c +src/vendorcode/amd/cimx/sb800/SATA.c +src/vendorcode/google/chromeos/build-snow +util/amdtools/example_input/lspci-cb-48G-667MHz-18.2-20090909e +util/amdtools/example_input/lspci-prop-48G-667MHz-18.2 +util/cbfstool/linux_trampoline.c +util/ifdtool/ifdtool.c +util/kconfig/zconf.hash.c_shipped +util/kconfig/zconf.lex.c_shipped +util/kconfig/zconf.tab.c_shipped +util/nvramtool/accessors/layout-bin.c +util/romcc/do_tests.sh +util/romcc/tests/include/linux_console.h +util/romcc/tests/linux_console.h +util/romcc/tests/linux_test5.c +util/romcc/tests/raminit_test6.c +util/romcc/tests/raminit_test7.c +util/romcc/tests/simple_test14.c +util/romcc/tests/simple_test30.c +util/romcc/tests/simple_test38.c +util/romcc/tests/simple_test39.c +util/romcc/tests/simple_test54.c +util/romcc/tests/simple_test59.c +util/romcc/tests/simple_test72.c +util/romcc/tests/simple_test73.c +util/sconfig/lex.yy.c_shipped +util/sconfig/sconfig.tab.c_shipped +util/superiotool/fintek.c +util/superiotool/ite.c +util/superiotool/smsc.c +util/superiotool/winbond.c +src/mainboard/google/slippy/Micron_4KTF25664HZ.spd.hex +src/mainboard/google/falco/Micron_4KTF25664HZ.spd.hex +src/mainboard/google/peppy/Micron_4KTF25664HZ.spd.hex +src/mainboard/google/link/micron_4Gb_1600_1.35v_x16.spd.hex +src/mainboard/google/rambi/spd/micron_1GiB_dimm_MT41K128M16JT-125.spd.hex +src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex +src/mainboard/google/bolt/micron_4Gb_1600_1.35v_x16.spd.hex +src/mainboard/google/link/samsung_4Gb_1600_1.35v_x16.spd.hex +src/mainboard/google/link/elpida_4Gb_1600_x16.spd.hex +src/mainboard/google/slippy/Hynix_HMT425S6AFR6A.spd.hex +src/mainboard/google/falco/Hynix_HMT425S6AFR6A.spd.hex +src/mainboard/google/falco/Elpida_EDJ4216EFBG.spd.hex +src/mainboard/google/rambi/spd/hynix_1GiB_dimm_H5TC2G63FFR-PBA.spd.hex +src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex +src/mainboard/google/bolt/samsung_4Gb_1600_1.35v_x16.spd.hex +src/mainboard/google/bolt/elpida_4Gb_1600_x16.spd.hex +src/mainboard/google/peppy/Hynix_HMT425S6AFR6A.spd.hex +src/mainboard/google/peppy/Elpida_EDJ4216EFBG.spd.hex +src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex +src/mainboard/google/samus/spd/empty.spd.hex +src/mainboard/google/samus/spd/elpida_4.spd.hex +src/mainboard/google/samus/spd/hynix_4.spd.hex +src/mainboard/google/samus/spd/elpida_16.spd.hex +src/mainboard/google/samus/spd/hynix_8.spd.hex +src/mainboard/google/samus/spd/hynix_16.spd.hex +src/mainboard/google/samus/spd/samsung_8.spd.hex +src/mainboard/google/samus/spd/elpida_8.spd.hex +src/mainboard/google/samus/spd/samsung_4.spd.hex +src/mainboard/google/auron/spd/Micron_4KTF25664HZ.spd.hex +src/mainboard/google/auron/spd/Elpida_EDJ4216EFBG.spd.hex +src/mainboard/google/auron/spd/Hynix_HMT425S6AFR6A.spd.hex +src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex +src/mainboard/google/auron/spd/empty.spd.hex +src/mainboard/google/cyan/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex +src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex +src/mainboard/google/cyan/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex +src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBLTALAR.spd.hex +src/mainboard/google/glados/spd/empty.spd.hex +src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8JTBLAR.spd.hex +src/mainboard/intel/sklrvp/spd/empty.spd.hex +src/mainboard/intel/sklrvp/spd/rvp3.spd.hex +src/mainboard/intel/kunimitsu/spd/empty.spd.hex +src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex +src/mainboard/intel/strago/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex +src/mainboard/intel/strago/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex +src/mainboard/intel/strago/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex +src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTALAR-NUD-2G-1866.spd.hex +src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCF-1G-1866.spd.hex +src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E6E304EE-EGCF-2G-1866.spd.hex +src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866.spd.hex +src/mainboard/bap/ode_e20XX/BAP_Q7.spd.hex +src/northbridge/intel/nehalem/raminit_tables.c +src/northbridge/intel/sandybridge/raminit_patterns.h +src/southbridge/nvidia/mcp55/early_setup_ss.h +src/southbridge/nvidia/ck804/early_setup_ss.h +src/southbridge/sis/sis966/early_setup_ss.h +util/crossgcc/patches/binutils-2.25_riscv.patch +src/southbridge/amd/pi/hudson/Kconfig +src/drivers/xgi/common/vb_setmode.c +src/drivers/xgi/common/vb_table.h +src/drivers/xgi/common/XGI_main.h +src/mainboard/siemens/mc_tcu3/romstage.c +src/mainboard/siemens/mc_tcu3/lcd_panel.c +src/mainboard/siemens/mc_tcu3/modhwinfo.c +src/mainboard/pcengines/apu1/Kconfig +src/mainboard/asus/kfsn4-dre/get_bus_conf.c +src/mainboard/google/samus/spd/spd.c +src/mainboard/hp/abm/mptable.c +src/northbridge/amd/pi/00630F01/Kconfig +src/cpu/amd/microcode/microcode.c +src/lib/tlcl_structures.h +util/rockchip/make_idb.py +util/autoport/readme.md +util/bimgtool/bimgtool.c +util/cbfstool/fmd_parser.c_shipped +util/cbfstool/fmd_scanner.c_shipped +Documentation/CorebootBuildingGuide.tex +Documentation/hypertransport.svg +Documentation/codeflow.svg +src/soc/broadcom/cygnus/ddr_init.c +src/soc/broadcom/cygnus/ddr_init_table.c +src/soc/qualcomm/ipq806x/lcc.c +src/soc/intel/braswell/acpi.c +src/soc/intel/braswell/Kconfig +src/vendorcode/amd/pi/Kconfig +src/drivers/intel/fsp1_1/Kconfig +src/drivers/intel/fsp1_1/fsp_gop.c +src/drivers/i2c/ww_ring/ww_ring_programs.c +src/mainboard/google/auron/spd/spd.c +src/mainboard/google/jecht/lan.c +src/mainboard/gigabyte/ga-b75m-d3v/romstage.c +src/mainboard/amd/lamar/Kconfig +payloads/external/GRUB2/Kconfig +payloads/external/FILO/Kconfig +payloads/external/SeaBIOS/Kconfig +src/soc/intel/common/fsp_ramstage.c +src/soc/intel/skylake/Kconfig +src/soc/intel/braswell/gpio.c +src/soc/nvidia/tegra210/Kconfig +src/soc/nvidia/tegra210/mtc.c +src/southbridge/intel/common/firmware/Kconfig +src/mainboard/google/cyan/spd/spd.c +src/mainboard/google/cyan/Kconfig +src/mainboard/google/glados/spd/spd.c +src/mainboard/intel/sklrvp/spd/spd.c +src/mainboard/intel/kunimitsu/spd/spd.c +src/mainboard/intel/strago/spd/spd.c +src/mainboard/intel/strago/Kconfig +src/mainboard/amd/bettong/mptable.c +src/northbridge/amd/pi/00660F01/Kconfig +util/crossgcc/patches/gcc-5.2.0_riscv.patch +util/xcompile/xcompile +src/northbridge/intel/sandybridge/raminit_mrc.c +src/northbridge/intel/fsp_rangeley/fsp/Kconfig +src/drivers/intel/fsp1_1/car.c +src/mainboard/intel/mohonpeak/Kconfig +src/mainboard/apple/macbookair4_2/early_southbridge.c +src/cpu/intel/fsp_model_406dx/acpi.c +src/northbridge/intel/fsp_sandybridge/fsp/Kconfig +src/drivers/aspeed/common/ast_dram_tables.h +src/drivers/aspeed/common/ast_tables.h +src/mainboard/intel/cougar_canyon2/Kconfig +src/cpu/amd/family_10h-family_15h/processor_name.c +src/cpu/amd/family_10h-family_15h/init_cpus.c +src/cpu/intel/fsp_model_206ax/acpi.c diff --git a/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs_notes b/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs_notes new file mode 100644 index 00000000..551da4a8 --- /dev/null +++ b/resources/utilities/coreboot-libre/blobs/coreboot/c13866fd405213fd5ca4fed6a14bed80909df03e/nonblobs_notes @@ -0,0 +1,15 @@ +.spd.hex files - serial presence detect. These are not blobs +see JEDEC standard or https://en.wikipedia.org/wiki/Serial_presence_detect +These are added to the nonblobs file + +src/northbridge/intel/nehalem/raminit_tables.c" +src/northbridge/intel/sandybridge/raminit_patterns.h +These are used by native raminit for the relevant platforms, and are not blobs + +"src/southbridge/nvidia/mcp55/early_setup_ss.h" \ +"src/southbridge/nvidia/ck804/early_setup_ss.h" \ +"src/southbridge/sis/sis966/early_setup_ss.h" +not blobs + +The text in this file is CC-BY-SA 4.0 or higher. All contributions to it must +be made under the same license. -- cgit v1.2.3-70-g09d2