From c679b19f0b0d95f587b3836c7bf867a932d3df28 Mon Sep 17 00:00:00 2001 From: Leah Rowe Date: Mon, 22 Aug 2016 10:22:04 +0100 Subject: actually add the documentation directory. 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+ EHCI debugging on the BeagleBone Black + + + + +
+

EHCI debugging on the BeagleBone Black

+ +

Back to previous index

+
+ +
+

EHCI debugging

+
    +
  1. Find + USB port on the target that supports EHCI debug
    2. +
  2. Initial + setup of BBB to act as EHCI debug dongle
    3. +
  3. Patch + BBB's g_dbgp module (optional, but highly recommended)
    4. +
  4. Configure + libreboot with EHCI debug +
      +
    1. Selecting + HCD Index and USB Debug port
      2. +
    5. +
  5. How to get the debug + logs
    6. +
  6. Eneble + EHCI Debug on the target's kernel (optional, recommended)
    7. +
  7. References
    8. +
+

If your computer does not boot after installing libreboot, it is + very useful to get debug logs from it, from the payload (grub) and/or + the kernel (if gets to there). All of them stream debug logs on the + available serial (RS-232) by default. However, most of todays laptops + lack RS-232 port. The other option is to stream the logs to USB EHCI + debug port.

+

This section explains step-by-step how to setup BBB as a + “USB EHCI debug dongle” and configure libreboot and the + linux kernel to stream logs to it (TODO: grub).

+

I will refer to three computers:

+ +

Find USB port + on the target that supports EHCI debug

+

+ Not all USB controllers support EHCI debug (see: EHCI + Debug Port ). Even more, if a USB controller supports EHCI debug, it + is available only on a single port that might or might + not be exposed externally. +

+ + +
    +
  1. Plug the usb stick in the first available usb port
    2. +
  2. Run the script, you will get output similar to following:
    3. +
    The following PCI devices support a USB debug port (says lspci): 0000:00:1a.0 0000:00:1d.0
+The following PCI devices support a USB debug port (says the kernel): 0000:00:1a.0 0000:00:1d.0
+*PCI device 0000:00:1a.0, USB bus 3, USB physical port 1*
+*PCI device 0000:00:1d.0, USB bus 4, USB physical port 2*
+Currently connected high-speed devices:
+/:  Bus 04.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/2p, 480M
+	|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/8p, 480M
+		|__ Port 7: Dev 14, If 0, Class=Hub, Driver=hub/4p, 480M
+			|__ Port 1: Dev 15, If 0, Class=Hub, Driver=hub/4p, 480M
+			|__ Port 3: Dev 17, If 0, Class=Hub, Driver=hub/2p, 480M
+			|__ Port 4: Dev 18, If 0, Class=Hub, Driver=hub/4p, 480M
+/:  Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/2p, 480M
+	|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/6p, 480M
+/:  *Bus 01*.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/4p, 480M
+	|__ *Port 3: Dev 31, If 0, Class=Mass Storage, Driver=usb-storage, 480M*
+
    +
  3. The buses the support debug are Bus 3 (0000:00:1a.0) on Port 1 + and Bus 4 (0000:00:1d.0) on port 2. Your usb stick is plugged on Bus + 1, Port 3
    4. +
  4. Repeat the steps, plugging the USB stick in the next available + port
    5. +
  5. Go through all available ports and remember(write down) those + for which bus/port of the usb stick matches one of the bus/port that + support debug (bold).
    6. +
+

Remember (write down) for each port (external plug) you found + that supports debug: PCI device id, the bus id, the port number, and + the physical location of the usb plug.

+

If you do not find a match, you can not get debug over EHCI. + Sorry.

+

+ 1 The guys from coreboot were talking about including the + script in coreboot distribution (check the status). +

+

Initial setup of + BBB to act as EHCI debug dongle

+

BBB must be powered with a barrel power connector since the + mini-B USB plug will be used for the EHCI debug stream. So you will + need:

+ +

+ (On BBB) The linux kernel includes module (g_dbgp that enables one of the usb ports on a computer to behave as EHCI + debug dongle. Make sure you have this module available on your BBB + (Debian 7.8 that comes with BBB should have it), if not, you should + compile it yourself (see next section): +

+
ls /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget/g_dbgp.ko
+

+ Unload all other + g_* + modules: +

+
# lsmod
+# rmmod g_multi
+...
+
+

+ Then load + g_dbgp + : +

+
# modprobe g_dbgp
+# lsmod # should show that g_dbgp is loaded, and no other g_*
+
+

+ Plug the mini-B side of the USB cable in your BBB and the A side in + your target. Then one of the usb devices on your target (with + lsusb + ) should be: +

+
Bus 001 Device 024: ID 0525:c0de Netchip Technology, Inc.
+

If you see the device on the target, you are good to continue to + the next step.

+

+ Patch BBB’s + g_dbgp + module (optional, but highly recommended) +

+

+ For the reasons why you need this, see: EHCI Gadget Debug.
Make + sure that you have cross compiling environment for + arm-linux-gnueabihf + setup on your host. +

+ +
$ cd $work_dir
+$ git clone https://github.com/beagleboard/kernel.git
+$ cd kernel
+$ git checkout $mav (see above)
+$ ./patch.sh
+$ wget http://arago-project.org/git/projects/?p=am33x-cm3.git\;a=blob_plain\;f=bin/am335x-pm-firmware.bin\;hb=HEAD -O kernel/firmware/am335x-pm-firmware.bin
+$ cp configs/beaglebone kernel/arch/arm/configs/beaglebone_defconfig
+
+ +
+git apply ../usbdebug-gadget/v3.8-debug-gadget/0001-usb-dbgp-gadget-Fix-re-connecting-after-USB-disconne.patch
+git apply ../usbdebug-gadget/v3.8-debug-gadget/0002-usb-serial-gadget-no-TTY-hangup-on-USB-disconnect-WI.patch
+;
+make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- beaglebone_defconfig -j4@
+
+ +
+$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4 (is it possoble to build only the gadget modules)
+$ mkdir ../tmp && make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- INSTALL_MOD_PATH=../tmp modules_install
+
+ +

Configure libreboot with + EHCI debug

+

+ Libreboot(coreboot) should be configured with debug turned on and to + push debug messages to the EHCI debug port.
If you’ve + downloaded the binary distribution, you can check if it is properly + configured in the following way: +

+ +
+./cbfstool/i686/cbfstool $img_path extract -n config -f ./my_config
+
+ +
+CONFIG_USBDEBUG=y (Generic Drivers -> USB 2.0 EHCI debug dongle support)
+CONFIG_USBDEBUG_IN_ROMSTAGE=y (Generic Drivers -> Enable early (pre-RAM) usbdebug)
+CONFIG_USBDEBUG_HCD_INDEX=<HCD Index of usb controller - see below> (Generic Drivers -> Index for EHCI controller to use with usbdebug)
+CONFIG_USBDEBUG_DEFAULT_PORT=<USB Debug port - see below> (Generic Drivers -> Default USB port to use as Debug Port)
+
+

+ The following three are behind radio button in the menu. Only the first + one2 should be = y +

+
+USBDEBUG_DONGLE_STD=y                       (Generic Drivers -> Type of dongle (Net20DC or compatible) -> Net20DC or compatible)
+CONFIG_USBDEBUG_DONGLE_BEAGLEBONE=n         (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone)
+CONFIG_USBDEBUG_DONGLE_BEAGLEBONE_BLACK=n   (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone Black)
+
+

+ 2 The g_dbgp module on BeagleBone Black (Rev. C) reports it self as Net20DC, the + other options are for older BB(B) - ver1. This is documented here + (also tested/verified). +

+

+ Then:
+

+CONFIG_CONSOLE_USB=y (Console -> USB dongle console output)
+
+

+

+ Also + Debugging ---> Output verbose XYZ + ) (FIXME somebody verify these): +

+
+CONFIG_DEBUG_CBFS=y (Output verbose CBFS debug messages )
+CONFIG_HAVE_DEBUG_RAM_SETUP=y (??? What/where is this)
+CONFIG_DEBUG_RAM_SETUP=y (Output verbose RAM init debug messages)
+CONFIG_DEBUG_SMI=y      (Output verbose SMI debug messages)
+CONFIG_DEBUG_ACPI=y     (Output verbose ACPI debug messages )
+CONFIG_DEBUG_USBDEBUG=y (Output verbose USB 2.0 EHCI debug dongle messages)
+
+

If some of the above mentioned configuration options are not as + specified, you have to configure and compile libreboot yourself. Please + refer to the doc(FIXME: link about compiling libreboot.

+

+ Selecting + HCD Index + and + USB Debug port +

+

+ This applies (and works) only if the USB controller that supports debug + (found in the first section) is from Intel.
If the PCI ID of the + port you found in the first section is + 0000:00:1a.0 + or + 0000:00:1d.0 + , you are ok. Otherwise you have to try without guarantee that will + work. +

+

+ If the externally exposed port is on a bus with + PCI ID == 0000:00:1a.0 + then for + CONFIG_USBDEBUG_HCD_INDEX + choose 2, otherwise choose 0 + . +

+

+ For + CONFIG_USBDEBUG_DEFAULT_PORT + choose the port from the first section that correspond to the + PCI ID +

+

+ Notes:
The above is based on the implementation of + coreboot/src/southbridge/intel/common/usb_debug.c : pci_ehci_dbg_dev() + .
This is enough as it applies for the supported GM45/G45 + Thinkpads. coreboot support some other contollers too, but they are + irellevent for libreboot (for now). +

+ +

How to get the debug logs

+ +
+stty -icrnl -inlcr -F /dev/ttyGS0
+cat /dev/ttyGS0
+
+ +

+ Note that this is not permanent on BBB, if you reboot it, you have to + rmmod g_* + and + modprobe g_dbgp +

+

Eneble + EHCI Debug on the target’s kernel (optional, recommended)

+

You have to know how to compile kernel for your target.

+
    +
  1. Check if early debugging is already enabled: grep + CONFIG_EARLY_PRINTK_DBGP /boot/config-<ver>
    2. +
  2. If enabled, you do not have to compile the kernel (skip this + step). Otherwise, prepare kernel source for your distribution and + select (Kernel hacking -> Early printk via EHCI debug + port). Compile and install the new kernel. +
    3. +
  3. Edit your grub configuration and add following to the kenel + parameters2021: earlyprintk=dbgp,keep. + Also, try: earlyprintk=dbgp<N>,keep where N + is the debug port id if the first does not work. +
    4. +
+

References

+

+ 10 EHCI + Debug Port +

+

+ 11 coreboot + EHCI debug gadget demonstration +

+

+ 12 EHCI + Gadget Debug +

+

+ 13 Ehci-debug-gadget-patches.tar.gz +

+

+ 14 Compiling + the BeagleBone Black Kernel +

+

+ 15 + http://dumb-looks-free.blogspot.ca/2014/06/beaglebone-black-bbb-compile-kernel.html +

+

+ 16 + http://dumb-looks-free.blogspot.fr/2014/06/beaglebone-black-bbb-kernal-headers.html +

+

+ 17 Building + BBB Kernel +

+

+ 18 + http://komposter.com.ua/documents/USB-2.0-Debug-Port%28John-Keys%29.pdf +

+

+ 19 Exploring + USB at the Hardware/Software Interface +

+

+ 20 + https://www.kernel.org/doc/Documentation/x86/earlyprintk.txt +

+

+ 21 https://wiki.ubuntu.com/Kernel/Debugging/USBearlyprintk +

+

+ TODO: +

+
    +
  1. grub does not send messages to EHCI debug. Investigate.
    2. +
  2. The section “Configure libreboot with EHCI debug” + can be skipped/simplified if a common configuration works for all + relevant targets is selected as defualt
    3. +
  3. Patch and compule g_dbgp on BBB instead cross-compile
    4. +
  4. Find a simple way to send debug messages from targets userland
    5. +
+
+ +
+ +

+ Copyright © 2015 Alex David <opdecirkel@gmail.com>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/bbb_setup.html b/docs/install/bbb_setup.html new file mode 100644 index 00000000..7eea1e6f --- /dev/null +++ b/docs/install/bbb_setup.html @@ -0,0 +1,464 @@ + + + + + + + + + How to program an SPI flash chip with the BeagleBone Black or Teensy 3.1 + + + + +
+

How to program an SPI flash chip with the BeagleBone Black or Teensy 3.1

+

+ This document exists as a guide for reading from or writing to an SPI flash chip with the BeagleBone Black, + using the flashrom software. + A BeagleBone Black, rev. C was used when creating this guide, but earlier revisions + may also work. +

+ +

+ There was no justification for a further section for the Teensy. Simply refer to this page on flashrom.org for information about how to set it up, and correlate that with the pins on the SPI flash chip as per other guides in the libreboot documentation for each board. At the time of writing, the teensy is tested for flashing on the ThinkPad X200, but it should work for other targets. here is a photo of the setup for the teensy: http://h5ai.swiftgeek.net/IMG_20160601_120855.jpg

+

+ Onto the Beaglebone black... +

+

Back to previous index

+
+ +
+ +

Hardware requirements

+ +

+ Shopping list (pictures of this hardware is shown later): +

+ + +

+ Back to top of page. +

+ +
+ +
+ +

Setting up the 3.3V DC PSU

+ +

+ ATX PSU pinouts can be read on this Wikipedia page. +

+

+ You can use pin 1 or 2 (orange wire) on a 20-pin or 24-pin ATX PSU for 3.3V, and any of the ground/earth sources (black cables) for ground. + Short PS_ON# / Power on (green wire; pin 16 on 24-pin ATX PSU, or pin 14 on a 20-pin ATX PSU) to a ground + (black; there is one right next to it) using a wire/paperclip/jumper, then power on the PSU by grounding PS_ON# + (this is also how an ATX motherboard turns on a PSU). +

+

+ DO **NOT** use pin 4, 6, do **NOT** use pin 19 or 20 (on a 20-pin ATX PSU), and DO **NOT** use pin + 21, 22 or 23 (on a 24-pin ATX PSU). Those wires (the red ones) are 5V, and they **WILL** kill your flash chip. + ***NEVER*** supply more than 3.3V to your flash chip (that is, if it's a 3.3V flash chip; 5V and 1.8V SPI + flash chips do exist, but they are rare. Always check what voltage your chip takes. Most of them take 3.3V). +

+

+ You only need one 3.3V supply and one ground for the flash chip, after grounding PS_ON#. +

+ +

+ The male end of a 0.1" or 2.54mm header cable is not thick enough to remain permanently + connected to the ATX PSU on its own. + When connecting header cables to the connector on the ATX PSU, use a female end attached to + a thicker piece of wire (you could use a paper clip), or wedge the male end of the jumper cable + into the sides of the hole in the connector, instead of going through the centre. +

+ +

+ Here is an example set up:
+ +

+ +
+ +
+ +

Accessing the operating system on the BBB

+

+ The operating system on your BBB will probably have an SSH daemon + running where the root account has no password. Use SSH to access + the operating system and set a root password. By default, the OS + on your BBB will most likely use DHCP, so it should already have an IP + address. +

+

+ You will also be using the OS on your BBB for programming an SPI flash chip. +

+

Alternatives to SSH (in case SSH fails)

+

+ You can also use a serial FTDI debug board with GNU Screen, to access the serial console.
+ # screen /dev/ttyUSB0 115200
+ Here are some example photos:
+ +
+

+

+ You can also connect the USB cable from the BBB to another computer and a new network interface will appear, + with its own IP address. This is directly accessible from SSH, or screen:
+ # screen /dev/ttyACM0 115200 +

+

+ You can also access the uboot console, using the serial method + instead of SSH. +

+ +
+ +
+ +

Setting up spidev on the BBB

+ +

+ Log on as root on the BBB, using either SSH or a serial console as defined in + #bbb_access. Make sure that you have internet access + on your BBB. +

+ +

+ Follow the instructions at http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0 + up to (and excluding) the point where it tells you to modify uEnv.txt +

+

+ You need to update the software on the BBB first. If you have an + element14 brand BBB (sold by Premier Farnell plc. stores like + Farnell element14, Newark element14, and Embest), you may need + to work around a bug + in the LED aging init script before you can update your + software. If you don't have a file named + /etc/init.d/led_aging.sh, you can skip this step and update your + software as described below. Otherwise, replace the contents of + this file with: +

+
+#!/bin/sh -e
+### BEGIN INIT INFO
+# Provides:          led_aging.sh
+# Required-Start:    $local_fs
+# Required-Stop:     $local_fs
+# Default-Start:     2 3 4 5
+# Default-Stop:      0 1 6
+# Short-Description: Start LED aging
+# Description:       Starts LED aging (whatever that is)
+### END INIT INFO
+
+x=$(/bin/ps -ef | /bin/grep "[l]ed_acc")
+if [ ! -n "$x" -a -x /usr/bin/led_acc ]; then
+    /usr/bin/led_acc &
+fi
+
+

+ Run apt-get update and apt-get upgrade then reboot the BBB, before continuing. +

+ +

+ Check that the firmware exists:
+ # ls /lib/firmware/BB-SPI0-01-00A0.*
+ Output: +

+
+/lib/firmware/BB-SPI0-01-00A0.dtbo
+
+

+ Then:
+ # echo BB-SPI0-01 > /sys/devices/bone_capemgr.*/slots
+ # cat /sys/devices/bone_capemgr.*/slots
+ Output: +

+
+ 0: 54:PF--- 
+ 1: 55:PF--- 
+ 2: 56:PF--- 
+ 3: 57:PF--- 
+ 4: ff:P-O-L Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G
+ 5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI
+ 7: ff:P-O-L Override Board Name,00A0,Override Manuf,BB-SPI0-01
+
+ +

+ Verify that the spidev device now exists:
+ # ls -al /dev/spid*
+ Output: +

+
+crw-rw---T 1 root spi 153, 0 Nov 19 21:07 /dev/spidev1.0
+
+

+ Now the BBB is ready to be used for flashing. Make this persist + across reboots:
+ In /etc/default/capemgr add CAPE=BB-SPI0-01 at the end + (or change the existing CAPE= entry to say that, if an + entry already exists. +

+

+ Get flashrom from the libreboot_util release archive, or build it from libreboot_src/git if you need to. + An ARM binary (statically compiled) for flashrom exists in libreboot_util releases. Put the flashrom binary + on your BBB. +

+

+ You may also need ich9gen, if you will be flashing an ICH9-M laptop (such as the X200). Get it from libreboot_util, + or build it from libreboot_src, and put the ARM binary for it on your BBB. +

+

+ Finally, get the ROM image that you would like to flash and put that on your BBB. +

+ +

+ Now test flashrom:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512
+ Output: +

+
+Calibrating delay loop... OK.
+No EEPROM/flash device found.
+Note: flashrom can never write if the flash chip isn't found automatically.
+
+ +

+ This means that it's working (the clip isn't connected to any flash chip, + so the error is fine). +

+ +
+ +
+ +

+ Connecting the Pomona 5250/5252 +

+

+ Use this image for reference when connecting the pomona to the BBB: + http://beagleboard.org/Support/bone101#headers + (D0 = MISO or connects to MISO). +

+ +

+ The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +

+
+ NC              -       - 21
+ 1               -       - 17
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ 18              -       - 3.3V (PSU)
+ 22              -       - NC - this is pin 1 on the flash chip
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
+
+You may also need to connect pins 1 and 9 (tie to 3.3V supply). These are HOLD# and WP#.
+On some systems they are held high, if the flash chip is attached to the board.
+If you're flashing a chip that isn't connected to a board, you'll almost certainly
+have to connect them.
+
+SOIC16 pinout (more info available online, or in the datasheet for your flash chip):
+HOLD	1-16	SCK
+VDD	2-15	MOSI
+N/C	3-14	N/C
+N/C	4-13	N/C
+N/C	5-12	N/C
+N/C	6-11	N/C
+SS	7-10	GND
+MISO	8-9	WP
+
+

+ The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): +

+
+ 18              -       - 1
+ 22              -       - NC
+ NC              -       - 21
+ 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
+
+You may also need to connect pins 3 and 7 (tie to 3.3V supply). These are HOLD# and WP#.
+On some systems they are held high, if the flash chip is attached to the board.
+If you're flashing a chip that isn't connected to a board, you'll almost certainly
+have to connect them.
+
+SOIC8 pinout (more info available online, or in the datasheet for your flash chip):
+SS	1-8	VDD
+MISO	2-7	HOLD
+WP	3-6	SCK
+GND	4-5	MOSI
+
+

+ NC = no connection +

+

+ DO NOT connect 3.3V (PSU) yet. ONLY connect this once the pomona is connected to the flash chip. +

+

+ You also need to connect the BLACK wire (ground/earth) from the 3.3V PSU to pin 2 on the BBB (P9 header). + It is safe to install this now + (that is, before you connect the pomona to the flash chip); in fact, you should. +

+

+ if you need to extend the 3.3v psu leads, just use the same colour M-F leads, but keep all other + leads short (10cm or less) +

+ +

+ You should now have something that looks like this:
+ + +

+ +

+ Back to top of page. +

+ +
+ +
+ +

Notes about stability

+ +

+ http://flashrom.org/ISP + is what we typically do in libreboot, though not always. That page + has some notes about using resistors to affect stability. Currently, + we use spispeed=512 (512kHz) but it is possible to use higher speeds while + maintaining stability. +

+ +

+ tty0_ in #libreboot was able to get better flashing speeds with the following configuration: +

+ + +
+ +
+ +

+ Copyright © 2014, 2015 Leah Rowe <info@minifree.org>
+ Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>
+ Copyright © 2015 Albin Söderqvist
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/c201.html b/docs/install/c201.html new file mode 100644 index 00000000..59972108 --- /dev/null +++ b/docs/install/c201.html @@ -0,0 +1,320 @@ + + + + + + + + + ASUS Chromebook C201 installation guide + + + + +
+ +

ASUS Chromebook C201 installation guide

+ +

+ These instructions are for installing Libreboot to the ASUS Chromebook C201. + Since the device ships with Coreboot, the installation instructions are the same before and after flashing Libreboot for the first time. +

+ +
+ +

+ If you are using libreboot_src or git, then make sure that you built the sources first (see ../git/index.html#build). +

+ +
+ +

+ Look at the list of ROM images to see which image is compatible with your device. +

+ +

+ Libreboot can be installed internally from the device, with sufficient privileges. + The installation process requires using Google's modified version of flashrom, + that has support for reflashing the Chromebook's SPI flash. + Otherwise, flashing externally will work with the upstream flashrom version. +

+ +

+ Google's modified version of flashrom is free software and its source code is made available by Google: flashrom.
+ It is not distributed along with Libreboot yet. However, it is preinstalled on the device, with ChromeOS. +

+ +

+ Installing Libreboot internally requires sufficient privileges on the system installed on the device.
+ When the device has ChromeOS installed (as it does initially), it is necessary to gain root privileges in ChromeOS, + to be able to access a root shell. +

+ + + +

+ Back to main index +

+ +
+ +
+ +

Gaining root privileges on ChromeOS

+ +

+ In order to gain root privileges on ChromeOS, developer mode has to be enabled from the recovery mode screen and debugging features have to be enabled in ChromeOS. +

+ +
+ +

+ Instructions to access the recovery mode screen and enabling developer mode are available on the page dedicated to depthcharge. +

+ +

+ Once developer mode is enabled, the device will boot to the developer mode screen. ChromeOS can be booted by waiting for 30 seconds (the delay is shortened in Libreboot) or by pressing Ctrl + D +

+ +

+ After the system has booted, root access can be enabled by clicking on the Enable debugging features link. A confirmation dialog will ask whether to proceed.
+ After confirming by clicking Proceed, the device will reboot and ask for the root password to set. Finally, the operation has to be confirmed by clicking Enable. +

+ +

+ After setting the root password, it becomes possible to log-in as root. + A tty prompt can be obtained by pressing Ctrl + Alt + Next. + The Next key is the one on the top left of the keyboard. +

+ +
+ +
+ +
+ +

Preparing the device for the installation

+ +

+ Before installing Libreboot on the device, both its software and hardware has to be prepared to allow the installation procedure and to ensure that security features don't get in the way. +

+ +
+ +

Configuring verified boot parameters

+ +

+ It is recommended to have access to the developer mode screen and to configure the following verified boot parameters: +

    +
  • Kernels signature verification: disabled
    • +
  • External media boot: enabled
    • +
+ Those changes can be reverted later, when the device is known to be in a working state. +

+ +
+ +
+ +

Removing the write protect screw

+ +

+ Since part of the SPI flash is write-protected by a screw, it is necessary to remove the screw to remove the write protection and allow writing Libreboot to the read-only part of the flash. +

+ +

+ To access the screw, the device has to be opened. There are 8 screws to remove from the bottom of the device, as shown on the picture below. Two are hidden under the top pads. After removing the screws, the keyboard plastic part can be carefully detached from the rest. Beware: there are cables attached to it! It is advised to flip the keyboard plastic part over, as shown on the picture below. The write protect screw is located next to the SPI flash chip, circled in red in the picture below. It has to be removed. +

+ +

+ Screws + WP screw +

+ +

+ The write protect screw can be put back in place later, when the device is known to be in a working state. +

+ +
+ +
+ +
+ +

Installing Libreboot to the SPI flash

+ +

+ The SPI flash (that holds Libreboot) is divided into various partitions that are used to implement parts of the CrOS security system. + Libreboot is installed in the read-only coreboot partition, that becomes writable after removing the write-protect screw. +

+ +
+ +

Installing Libreboot internally, from the device

+ +

+ Before installing Libreboot to the SPI flash internally, the device has to be reassembled. +

+ +

+ All the files from the veyron_speedy release (or build) have to be transferred to the device. +

+ +

+ The following operations have to be executed with root privileges on the device (e.g. using the root account). + In addition, the cros-flash-replace script has to be made executable:
+ # chmod a+x cros-flash-replace
+

+ +

+ The SPI flash has to be read first:
+ # flashrom -p host -r flash.img
+ Note: it might be a good idea to copy the produced flash.img file at this point and store it outside of the device for backup purposes. +

+ +

+ Then, the cros-flash-replace script has to be executed as such:
+ # ./cros-flash-replace flash.img coreboot ro-frid
+ If any error is shown, it is definitely a bad idea to go further than this point. +

+ +

+ The resulting flash image can then be flashed back:
+ # flashrom -p host -w flash.img
+

+ +

+ You should also see within the output the following:
+ "Verifying flash... VERIFIED." +

+ +

+ Shut down. The device will now boot to Libreboot. +

+ +
+ +
+ +

Installing Libreboot externally, with a SPI flash programmer

+ +

+ Before installing Libreboot to the SPI flash internally, the device has to be opened. +

+ +

+ The SPI flash is located next to the write protect screw. Its layout is indicated in the picture below. Note that it is not necessary to connect WP# since removing the screw already connects it to ground. Before writing to the chip externally, the battery connector has to be detached. It is located under the heat spreader, that has to be unscrewed from the rest of the case. The battery connector is located on the right and has colorful cables, as shown on the picture below. +

+ +

+ SPI flash layout + Battery connector +

+ +

+ All the files from the veyron_speedy release (or build) have to be transferred to the host. +

+ +

+ The following operations have to be executed with root privileges on the host (e.g. using the root account). + In addition, the cros-flash-replace script has to be made executable:
+ # chmod a+x cros-flash-replace
+

+ +

+ The SPI flash has to be read first (using the right spi programmer):
+ # flashrom -p programmer -r flash.img
+ Note: it might be a good idea to copy the produced flash.img file at this point and store it outside of the device for backup purposes. +

+ +

+ Then, the cros-flash-replace script has to be executed as such:
+ # ./cros-flash-replace flash.img coreboot ro-frid
+ If any error is shown, it is definitely a bad idea to go further than this point. +

+ +

+ The resulting flash image can then be flashed back (using the right spi programmer):
+ # flashrom -p programmer -w flash.img
+

+ +

+ You should also see within the output the following:
+ "Verifying flash... VERIFIED." +

+ +

+ The device will now boot to Libreboot. +

+ +
+ +

Back to top of page.

+
+ +
+ +

+ Copyright © 2015 Paul Kocialkowski <contact@paulk.fr>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/d510mo.html b/docs/install/d510mo.html new file mode 100644 index 00000000..16c3e768 --- /dev/null +++ b/docs/install/d510mo.html @@ -0,0 +1,107 @@ + + + + + + + + + + D510MO flashing tutorial + + + + +
+

D510MO flashing tutorial

+

+ This guide is for those who want libreboot on their Intel D510MO + motherboard while they still have the original BIOS present. +

+

+ Back to main index +

+
+ +
+ +

Flash chip size

+ +

+ Use this to find out:
+ # dmidecode | grep ROM\ Size +

+ +

+ Back to top of page. +

+ +
+ +
+ +

Flashing instructions

+ +

+ Refer to bbb_setup.html for how to + set up the BBB for flashing. +

+

+ This is an image of the flash chip, for reference:
+ +

+
+ + +
+ +

+ Copyright © 2016 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/ga-g41m-es2l.html b/docs/install/ga-g41m-es2l.html new file mode 100644 index 00000000..0b0c7315 --- /dev/null +++ b/docs/install/ga-g41m-es2l.html @@ -0,0 +1,129 @@ + + + + + + + + + + GA-G41M-ES2L flashing tutorial + + + + +
+

GA-G41M-ES2L flashing tutorial

+

+ This guide is for those who want libreboot on their Intel GA-G41M-ES2L + motherboard while they still have the original BIOS present. +

+

+ Back to main index +

+
+ +
+ +

Flash chip size

+ +

+ Use this to find out:
+ # dmidecode | grep ROM\ Size +

+ +

+ Back to top of page. +

+ +
+ +
+ +

Flashing instructions

+ +

+ Refer to bbb_setup.html for how to + set up the BBB for external flashing. +

+

+ Here is an image of the flash chip:
+ +

+

+ Internal flashing is possible. Boot with the proprietary BIOS + and GNU/Linux. There are 2 flash chips (one is backup). +

+

+ Flash the first chip: +
+ ./flashrom -p internal:dualbiosindex=0 -w libreboot.rom +

+

+ Flash the second chip: +
+ ./flashrom -p internal:dualbiosindex=1 -w libreboot.rom +

+

+ NOTE: You need the latest flashrom. Just get it on flashrom.org from + their SVN or Git repos. +

+

+ NOTE: due to a bug in the hardware, the MAC address is hardcoded in coreboot-libre. + Therefore, you must set your own MAC address in your operating system. +

+
+ + +
+ +

+ Copyright © 2016 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/images/c201/battery-connector.jpg b/docs/install/images/c201/battery-connector.jpg new file mode 100644 index 00000000..85f0e631 Binary files /dev/null and b/docs/install/images/c201/battery-connector.jpg differ diff --git a/docs/install/images/c201/screws.jpg b/docs/install/images/c201/screws.jpg new file mode 100644 index 00000000..58585d5a Binary files /dev/null and b/docs/install/images/c201/screws.jpg differ diff --git a/docs/install/images/c201/spi-flash-layout.jpg b/docs/install/images/c201/spi-flash-layout.jpg new file mode 100644 index 00000000..9968ca71 Binary files /dev/null and b/docs/install/images/c201/spi-flash-layout.jpg differ diff --git a/docs/install/images/c201/wp-screw.jpg b/docs/install/images/c201/wp-screw.jpg new file mode 100644 index 00000000..77c76dc1 Binary files /dev/null and b/docs/install/images/c201/wp-screw.jpg differ diff --git a/docs/install/images/r400/0000.jpg b/docs/install/images/r400/0000.jpg new file mode 100644 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+ +

Installing libreboot

+

+ This section relates to installing libreboot on supported targets. +

+

+ NOTE: if running flashrom -p internal for software based flashing, and you + get an error related to /dev/mem access, you should reboot with iomem=relaxed + kernel parameter before running flashrom, or use a kernel that has + CONFIG_STRICT_DEVMEM not enabled. +

+

+ Back to previous index +

+ +
+ +
+ +

Software methods

+ + +

Hardware methods

+ + +
+ +
+ +

List of ROM images in libreboot

+ +

+ Libreboot distributes pre-compiled ROM images, built from the libreboot source code. + These images are provided for user convenience, so that they don't have + to build anything from source on their own. +

+ +

+ The ROM images in each archive use the following at the end of the file name, + if they are built with the GRUB payload: _keymap_mode.rom +

+

+ Available modes: vesafb or txtmode. The vesafb ROM images are recommended, in most cases; + txtmode ROM images come with MemTest86+, which requires text-mode instead of the usual framebuffer used + by coreboot native graphics initialization. +

+

+ keymap can be one of several keymaps that keyboard supports (there are quite a few), + which affects the keyboard layout configuration that is used in GRUB. It doesn't matter + which ROM image you choose here, as far as the keymap in GNU/Linux is concerned. +

+

+ Keymaps are named appropriately according to each keyboard layout + support in GRUB. To learn how these keymaps are created, see + ../grub/index.html#grub_keyboard +

+ +

QEMU

+ +

+ Libreboot comes with ROM images built for QEMU, by default: +

+ +

+ Examples of how to use libreboot ROM images in QEMU: +

+ +

+ You can optionally specify the -serial stdio argument, so that QEMU will emulate + a serial terminal on the standard input/output (most likely your terminal emulator or TTY). +

+

+ Other arguments are available for QEMU. The manual will contain more information. +

+ +

+ Back to top of page. +

+ +
+ +
+ +

How to update or install libreboot (if you are already running libreboot or coreboot)

+ +

+ On all current targets, updating libreboot can be accomplished without disassembly and, + therefore, without having to externally re-flash using any dedicated hardware. In other words, + you can do everything entirely in software, directly from the OS that is running on your libreboot + system. +

+ +
+

+ If you are using libreboot_src or git, then make sure that you built the sources first (see ../git/index.html#build). +

+
+ +

+ Look at the list of ROM images to see which image is compatible with your device. +

+ +

Are you currently running the original, proprietary firmware?

+ +

+ If you are currently running the proprietary firmware (not libreboot or coreboot), + then the flashing instructions for your system are going to be different. +

+

+ X60/T60 users running the proprietary firmware should refer to #flashrom_lenovobios. + MacBook2,1 users running Apple EFI should refer to #flashrom_macbook21 +

+

+ X200 users, refer to x200_external.html, + R400 users refer to r400_external.html, + T400 users refer to t400_external.html, + T500 users refer to t500_external.html +

+ +

ASUS KFSN4-DRE?

+ +

+ Internal flashing should work just fine, even if you are + currently booting the proprietary firmware. +

+ +

+ Libreboot currently lacks documentation for externally + re-flashing an LPC flash chip. However, these boards have + the flash chip inside of a PLCC socket, and it is possible + to hot-swap the chips. If you want to back up your + known-working image, simply hot-swap the chip for one that + is the same capacity, after having dumped a copy of the + current firmware (flashrom -p internal -r yourchosenname.rom), + and then flash that chip with the known-working image. + Check whether the system still boots, and if it does, then + it should be safe to flash the new image (because you now + have a backup of the old image). +

+ +

+ Keeping at least one spare LPC PLCC chip with working firmware + on it is highly recommended, in case of bricks. +

+ +

+ + DO NOT hot-swap the chip with your bare hands. Use a PLCC + chip extractor. These can be found online. + See http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools + +

+ +

+ Do check the HCL entry: ../hcl/kfsn4-dre.html +

+ +

ASUS KGPE-D16?

+ +

+ If you have the proprietary BIOS, you need to flash libreboot externally. + See kgpe-d16.html. +

+

+ If you already have coreboot or libreboot installed, without write protection on the flash + chip, then you can do it in software (otherwise, see link above). +

+ +

+ + DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 + chip extractor. These can be found online. + See http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools + +

+ +

+ Do check the HCL entry: ../hcl/kgpe-d16.html +

+ +

ASUS KCMA-D8?

+ +

+ If you have the proprietary BIOS, you need to flash libreboot externally. + See kcma-d8.html. +

+

+ If you already have coreboot or libreboot installed, without write protection on the flash + chip, then you can do it in software (otherwise, see link above). +

+ +

+ + DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 + chip extractor. These can be found online. + See http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools + +

+ +

+ Do check the HCL entry: ../hcl/kcma-d8.html +

+ +

Are you currently running libreboot (or coreboot)?

+ +

+ X60/T60 users should be fine with this guide. If you write-protected the flash chip, please refer to + x60_unbrick.html, x60tablet_unbrick.html + or t60_unbrick.html. This probably does not apply to you. Most people + do not write-protect the flash chip, so you probably didn't either. +

+

+ Similarly, it is possible to write-protect the flash chip in coreboot or libreboot on GM45 laptops + (X200/R400/T400/T500). If you did this, then you will need to use the links above for flashing, + treating your laptop as though it currently has the proprietary firmware (because write-protected SPI flash + requires external re-flashing, as is also the case when running the proprietary firmware). +

+ +

+ If you did not write-protect the flash chip, or it came to you without any write-protection + (libreboot does not write-protect the flash chip by default, so this probably applies to you), + read on! +

+ +

MAC address on GM45 (X200/R400/T400/T500)

+ +

+ Users of the X200/R400/T400/T500 take note: The MAC address for the onboard ethernet chipset + is located inside the flash chip. Libreboot ROM images for these laptops contain a generic MAC + address by default (00:F5:F0:40:71:FE), but this is not what you want. + Make sure to change the MAC address inside the ROM image, before flashing it. + The instructions on ../hcl/gm45_remove_me.html#ich9gen + show how to do this. +

+ +

+ It is important that you change the default MAC address, before flashing. It will be printed on a sticker + at the bottom of the laptop, or it will be printed on a sticker next to or underneath the RAM. Alternatively, + and assuming that your current firmware has the correct MAC address in it, you can get it from your OS. +

+ +

Flash chip size

+ +

+ Use this to find out:
+ # dmidecode | grep ROM\ Size +

+ +

All good?

+ +

Excellent! Moving on...

+ +

+ Download the libreboot_util.tar.xz archive, and extract it. Inside, you will find + a directory called flashrom. This contains statically compiled executable files of + the flashrom utility, which you will use to re-flash your libreboot system. +

+ +

+ Simply use cd on your terminal, to switch to the libreboot_util directory. Inside, + there is a script called flash, which will detect what CPU architecture you have + (e.g. i686, x86_64) and use the appropriate executable. It is also possible for you to + build these executables from the libreboot source code archives. +

+ +
+

+ How to update the flash chip contents:
+ $ sudo ./flash update yourrom.rom +

+
+
+

+ Ocassionally, coreboot changes the name of a given board. If flashrom complains about a board mismatch, but + you are sure that you chose the correct ROM image, then run this alternative command:
+ $ sudo ./flash forceupdate yourrom.rom +

+
+ +
+ +

+ You should see "Verifying flash... VERIFIED." written at the end of the flashrom output. Shut down + after you see this, and then boot up again after a few seconds. +

+ +
+ +

Back to top of page

+ +
+ +
+ +

ThinkPad X60/T60: Initial installation guide (if running the proprietary firmware)

+ +

This is for the ThinkPad X60 and T60 while running Lenovo BIOS. If you already have coreboot or libreboot running, + then go to #flashrom instead!

+ +

If you are flashing a Lenovo ThinkPad T60, be sure to read ../hcl/index.html#supported_t60_list

+ +
+

+ If you are using libreboot_src or git, then make sure that you built the sources first (see ../git/index.html#build). +

+
+ +

+ + Warning: this guide will not instruct the user how to backup the original Lenovo BIOS firmware. These backups + are tied to each system, and will not work on any other. + For that, please refer to http://www.coreboot.org/Board:lenovo/x60/Installation. + +

+ +
+ +

+ + If you're using libreboot 20150518, note that there is a mistake in the flashing script. + do this: rm -f patch && wget -O flash http://git.savannah.gnu.org/cgit/libreboot.git/plain/flash?id=910b212e90c6f9c57025e1c7b0c08897af787496 && chmod +x flash + +

+ +

+ The first half of the procedure is as follows:
+ $ sudo ./flash i945lenovo_firstflash yourrom.rom. +

+ +
+ +
+ +

+ You should see within the output the following:
+ "Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000 are swapped". +

+ +

+ You should also see within the output the following:
+ "Your flash chip is in an unknown state", "FAILED" and "DO NOT REBOOT OR POWEROFF"
+ Seeing this means that the operation was a resounding success! DON'T PANIC. +

+ +

+ See this link for more details: + http://thread.gmane.org/gmane.linux.bios.flashrom/575. +

+ +

+ If the above is what you see, then SHUT DOWN. Wait a few seconds, and then boot; libreboot is running, but there is a 2nd procedure *needed* (see below). +

+ +
+ +
+

+ When you have booted up again, you must also do this:
+ $ sudo ./flash i945lenovo_secondflash yourrom.rom +

+

+ If flashing fails at this stage, try the following:
+ $ sudo ./flashrom/i686/flashrom -p internal:laptop=force_I_want_a_brick -w yourrom.rom +

+
+ +
+ +

+ You should see within the output the following:
+ "Updated BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is untranslated" +

+ +

+ You should also see within the output the following:
+ "Verifying flash... VERIFIED." +

+ +
+ +

Back to top of page.

+ +
+ +
+ +

MacBook2,1: Initial installation guide (if running the proprietary firmware)

+ +
+ +

+ If you have a MacBook1,1, refer to ../hcl/index.html#macbook11 for flashing instructions. +

+ +
+ +

+ + This is for the MacBook2,1 while running Apple EFI firmware. If you already have + coreboot or libreboot running, then go to #flashrom instead! + +

+ +

+ Be sure to read the information in ../hcl/index.html#macbook21. +

+ +

+ + Warning: this guide will not instruct the user how to backup the original Apple EFI firmware. + For that, please refer to http://www.coreboot.org/Board:apple/macbook21. + +

+ +
+

+ If you are using libreboot_src or git, then make sure that you built the sources first (see ../git/index.html#build). +

+
+ +

+ Look at the list of ROM images to see which image is compatible with your device. +

+ +
+

+ Use this flashing script, to install libreboot:
+ $ sudo ./flash i945apple_firstflash yourrom.rom +

+
+ +
+ +

+ You should also see within the output the following:
+ "Verifying flash... VERIFIED." +

+ +

+ Shut down. +

+ +
+ +

Back to top of page.

+ +
+ +
+ +

+ Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/kcma-d8.html b/docs/install/kcma-d8.html new file mode 100644 index 00000000..13041778 --- /dev/null +++ b/docs/install/kcma-d8.html @@ -0,0 +1,109 @@ + + + + + + + + + KCMA-D8 external flashing instructions + + + + +
+

KCMA-D8 external flashing instructions

+

Initial flashing instructions for kcma-d8.

+

+ This guide is for those who want libreboot on their ASUS kcma-d8 + motherboard, while they still have the proprietary ASUS BIOS present. + This guide can also be followed (adapted) if you brick you board, to know + how to recover. +

+ + +

+ Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules. +

+

+ For more general information about this board, refer to + ../hcl/kcma-d8.html. +

+ +

+ TODO: show photos here, and other info. +

+ + + +

Back to main index

+
+ +
+

External programmer

+

+ Refer to bbb_setup.html for a guide on + how to set up an external SPI programmer. +

+

+ The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, + which you take out and then re-flash with libreboot, using the programmer. + DO NOT remove the chip with your hands. Use a chip extractor tool. +

+
+ +
+ +

+ Copyright © 2016 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/kgpe-d16.html b/docs/install/kgpe-d16.html new file mode 100644 index 00000000..8249dead --- /dev/null +++ b/docs/install/kgpe-d16.html @@ -0,0 +1,124 @@ + + + + + + + + + KGPE-D16 external flashing instructions + + + + +
+

KGPE-D16 external flashing instructions

+

Initial flashing instructions for KGPE-D16.

+

+ This guide is for those who want libreboot on their ASUS KGPE-D16 + motherboard, while they still have the proprietary ASUS BIOS present. + This guide can also be followed (adapted) if you brick you board, to know + how to recover. +

+ + +

+ Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules. +

+ +

+ For more general information about this board, refer to + ../hcl/kgpe-d16.html. +

+ +

+ TODO: show photos here, and other info. +

+ + + +

Back to main index

+
+ +
+ +

KGPE-D16 boards (and full systems) with libreboot preinstalled

+ +

+ If you don't want to install libreboot yourself, companies exist that sell these boards + with libreboot pre-installed, along with a free GNU/Linux distribution. +

+

+ Check the suppliers page for more information. +

+ +
+ +
+

External programmer

+

+ Refer to bbb_setup.html for a guide on + how to set up an external SPI programmer. +

+

+ The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, + which you take out and then re-flash with libreboot, using the programmer. + DO NOT remove the chip with your hands. Use a chip extractor tool. +

+
+ +
+ +

+ Copyright © 2015 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/r400_external.html b/docs/install/r400_external.html new file mode 100644 index 00000000..ee274e5a --- /dev/null +++ b/docs/install/r400_external.html @@ -0,0 +1,596 @@ + + + + + + + + + ThinkPad R400: flashing tutorial (BeagleBone Black) + + + + +
+

Flashing the R400 with a BeagleBone Black

+

Initial flashing instructions for R400.

+

+ This guide is for those who want libreboot on their ThinkPad R400 + while they still have the original Lenovo BIOS present. This guide + can also be followed (adapted) if you brick your R400, to know how + to recover. +

+

+ Before following this section, please make sure to setup your libreboot ROM properly first. + Although ROM images are provided pre-built in libreboot, there are some modifications that + you need to make to the one you chose before flashing. (instructions referenced later in + this guide) +

+ +

Back to main index

+
+ +
+ +

Libreboot T400

+

+ You may also be interested in the smaller, more portable Libreboot T400. +

+ +
+ +
+ +

Serial port

+ +

+ EHCI debug might not be needed. It has been reported that the docking station + for this laptop has a serial port, so it might be possible to use that instead. +

+ +
+ +
+ +

LCD compatibly

+

+ Not all LCD panels are compatible yet. See ../hcl/gm45_lcd.html. +

+ +
+ +
+ +

A note about CPUs

+

+ ThinkWiki has a list of CPUs + for this system. The Core 2 Duo P8400 and P8600 are believed to work in libreboot. + The Core 2 Duo T9600 was confirmed to work, so the T9400 probably also works. + The Core 2 Duo T5870/5670 and Celeron M 575/585 are untested! +

+ +

Quad-core CPUs

+ +

+ Incompatible. Do not use. +

+ +
+ +
+ +

A note about GPUs

+ +

+ Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this + is referred to as "switchable graphics". In the BIOS setup program + for lenovobios, you can specify that the system will use one or the other (but not both). +

+ +

+ Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization. + On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so + native graphics initialization works all the same. +

+ +

CPU paste required

+ +

+ See #paste. +

+ +
+ +
+ +

Flash chip size

+ +

+ Use this to find out:
+ # dmidecode | grep ROM\ Size
+

+ +

+ Back to top of page. +

+ +
+ +
+ +

MAC address

+ +

+ On the R400, the MAC address for the onboard + gigabit ethernet chipset is stored inside the flash chip, + along with other configuration data. +

+

+ Keep a note of the MAC address before disassembly; this is + very important, because you will need to insert this into + the libreboot ROM image before flashing it. + It will be written in one of these locations: +

+ +

+ + + +

+ +
+ +
+ +

Initial BBB configuration

+ +

+ Refer to bbb_setup.html for how to + setup the BBB for flashing. +

+ +

+ The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +

+
+POMONA 5252 (correlate with the BBB guide)
+===  ethernet jack and VGA port ====
+ NC              -       - 21
+ 1               -       - 17
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ 18              -       - 3.3V (PSU)
+ 22              -       - NC - this is pin 1 on the flash chip
+===  SATA port ===
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

+
+
+

+ The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): +

+
+POMONA 5250 (correlate with the BBB guide)
+===  RAM slots ====
+ 18              -       - 1
+ 22              -       - NC
+ NC              -       - 21
+ 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
+===  slot where the AC jack is connected ===
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

+
+
+ +

Disassembly

+ +

+ Remove all screws:
+
+ Remove the HDD and optical drive:
+
+ Remove the hinge screws:
+ + +

+ +

+ Remove the palm rest and keyboard:
+ + +

+ +

+ Remove these screws, and then remove the bezel:
+ + +

+ +

+ Remove the speaker screws, but don't remove the speakers yet + (just set them loose):
+ + + +

+ +

+ Remove these screws, and then remove the metal plate:
+ + + +

+ +

+ Remove the antennas from the wifi card, and then + start unrouting them:
+ + + + + + +

+ +

+ Disconnect the LCD cable from the motherboard:
+ + + + +

+ +

+ Remove the hinge screws, and then remove the LCD panel:
+ + + + +

+ +

+ Remove this:
+ + +

+ +

+ Remove this long cable (there are 3 connections):
+ + + + +

+ +

+ Disconnect the speaker cable, and remove the speakers:
+ +

+ +

+ Remove the heatsink screws, remove the fan + and then remove the heatsink/fan:
+ + + + +

+ +

+ Remove the NVRAM battery:
+ + +

+ +

+ Remove this screw:
+ + +

+ +

+ Disconnect the AC jack:
+ + +

+ +

+ Remove this screw and then remove what is under it:
+ +

+ +

+ Remove this:
+ +

+ +

+ Lift the motherboard (which is still inside the cage) + from the side on the right, removing it completely:
+ + +

+ +

+ Remove all screws, marking each hole so that you know + where to re-insert them. You should place the screws in + a layout corresponding to the order that they were in + before removal: + + +

+ +

+ Remove the motherboard from the cage, and the SPI flash + chip will be next to the memory slots:
+ + +

+ +

+ Connect your programmer, then connect GND and 3.3V
+ + + + + + +

+

+ A dedicated 3.3V PSU was used to create this guide, but + at ATX PSU is also fine:
+ +

+ +

+ Of course, make sure to turn on your PSU:
+ +

+ +

+ Now, you should be ready to install libreboot. +

+ +

+ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. +

+

+ Log in as root on your BBB, using the instructions in bbb_setup.html#bbb_access. +

+

+ Test that flashrom works:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512
+ In this case, the output was: +

+
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi.
+Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
+Please specify which chip definition to use with the -c <chipname> option.
+
+

+ How to backup factory.rom (change the -c option as neeed, for your flash chip):
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom
+ Note: the -c option is not required in libreboot's patched flashrom, because + the redundant flash chip definitions in flashchips.c have been removed.
+ Now compare the 3 images:
+ # sha512sum factory*.rom
+ If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not + the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware + that could be replicated in coreboot and libreboot. +

+

+ Follow the instructions at ../hcl/gm45_remove_me.html#ich9gen + to change the MAC address inside the libreboot ROM image, before flashing it. + Although there is a default MAC address inside the ROM image, this is not what you want. Make sure + to always change the MAC address to one that is correct for your system. +

+

+ Now flash it:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V +

+

+ +

+

+ You might see errors, but if it says Verifying flash... VERIFIED at the end, then it's flashed and should boot. + If you see errors, try again (and again, and again); the message Chip content is identical to the requested image + is also an indication of a successful installation. +

+

+ Example output from running the command (see above): +

+
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
+Reading old flash chip contents... done.
+Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
+ERASE FAILED!
+Reading current flash chip contents... done. Looking for another erase function.
+Erase/write done.
+Verifying flash... VERIFIED.
+
+ + +

+ Back to top of page. +

+ +
+ +
+ +

Thermal paste (IMPORTANT)

+ +

+ Because part of this procedure involved removing the heatsink, you will need to apply new paste. + Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. +

+ +

+ When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. + Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems. +

+ +

+ +

+ +

+ NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. + Other guides online detail the proper application procedure. +

+ +
+ +
+ +

Wifi

+ +

+ The R400 typically comes with an Intel wifi chipset, which does not + work without proprietary software. For a list of wifi chipsets that + work without proprietary software, see + ../hcl/index.html#recommended_wifi. +

+ +

+ Some R400 laptops might come with an Atheros chipset, but this is 802.11g only. +

+ +

+ It is recommended that you install a new wifi chipset. This can only + be done after installing libreboot, because the original firmware has + a whitelist of approved chips, and it will refuse to boot if you + use an 'unauthorized' wifi card. +

+ +

+ The following photos show an Atheros AR5B95 being installed, to + replace the Intel chip that this R400 came with:
+ + +

+ +
+ +
+ +

WWAN

+

+ If you have a WWAN/3G card and/or sim card reader, remove them permanently. + The WWAN-3G card has proprietary firmware inside; the technology is + identical to what is used in mobile phones, so it can also track your movements. +

+

+ Not to be confused with wifi (wifi is fine). +

+ +
+ +
+ +

Memory

+ +

+ You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs + (speed/size). Non-matching pairs won't work. You can also install a + single module (meaning, one of the slots will be empty) in slot 0. +

+ +

+ Make sure that the RAM you buy is the 2Rx8 density. +

+ +

+ This page might be useful for RAM compatibility info + (note: coreboot raminit is different, so this page might be BS) +

+ +

+ The following photo shows 8GiB (2x4GiB) of RAM installed:
+ +

+ +
+ +
+ +

+ Boot it! +

+

+ You should see something like this: +

+

+ + +

+ +

+ Now install GNU/Linux. +

+ +
+ +
+ +

+ Copyright © 2014, 2015 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/t400_external.html b/docs/install/t400_external.html new file mode 100644 index 00000000..74b4f0f0 --- /dev/null +++ b/docs/install/t400_external.html @@ -0,0 +1,579 @@ + + + + + + + + + ThinkPad T400: flashing tutorial (BeagleBone Black) + + + + +
+

Flashing the T400 with a BeagleBone Black

+ +

Initial flashing instructions for T400.

+

+ This guide is for those who want libreboot on their ThinkPad T400 + while they still have the original Lenovo BIOS present. This guide + can also be followed (adapted) if you brick your T400, to know how + to recover. +

+ +

Back to main index

+
+ +
+ +

T400 laptops with libreboot pre-installed

+ +

+ If you don't want to install libreboot yourself, companies exist that sell these laptops + with libreboot pre-installed, along with a free GNU/Linux distribution. +

+

+ Check the suppliers page for more information. +

+ +
+ +
+ +

Serial port

+ +

+ EHCI debug might not be needed. It has been reported that the docking station + for this laptop has a serial port, so it might be possible to use that instead. +

+ +
+ +
+ +

LCD compatibly

+

+ Not all LCD panels are compatible yet. See ../hcl/gm45_lcd.html. +

+ +
+ +
+ +

A note about CPUs

+

+ ThinkWiki has a list of CPUs + for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in libreboot. + The T9600 was confirmed to work, so the T9500/T9550 probably also work. +

+ +

Quad-core CPUs

+ +

+ Incompatible. Do not use. +

+ +
+ +
+ +

A note about GPUs

+ +

+ Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this + is referred to as "switchable graphics". In the BIOS setup program + for lenovobios, you can specify that the system will use one or the other (but not both). +

+ +

+ Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization. + On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so + native graphics initialization works all the same. +

+ +

CPU paste required

+ +

+ See #paste. +

+ +
+ +
+ +

Flash chip size

+ +

+ Use this to find out:
+ # dmidecode | grep ROM\ Size +

+ +

+ Back to top of page. +

+ +
+ +
+ +

MAC address

+ +

+ On the T400, the MAC address for the onboard + gigabit ethernet chipset is stored inside the flash chip, + along with other configuration data. +

+

+ Keep a note of the MAC address before disassembly; this is + very important, because you will need to insert this into + the libreboot ROM image before flashing it. + It will be written in one of these locations: +

+ +

+ + + +

+ +
+ +
+ +

Initial BBB configuration

+ +

+ Refer to bbb_setup.html for how to + configure the BBB for flashing. +

+ +

+ The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +

+
+POMONA 5252 (correlate with the BBB guide)
+===  ethernet jack and VGA port ====
+ NC              -       - 21
+ 1               -       - 17
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ 18              -       - 3.3V (PSU)
+ 22              -       - NC - this is pin 1 on the flash chip
+===  SATA port ===
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

+
+
+

+ The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): +

+
+POMONA 5250 (correlate with the BBB guide)
+===  RAM slots ====
+ 18              -       - 1
+ 22              -       - NC
+ NC              -       - 21
+ 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
+===  slot where the AC jack is connected ===

+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

+
+
+ +

+ The procedure +

+ +

+ Remove all screws, placing them in the order that you removed them:
+ + +

+

+ Remove those three screws then remove the rear bezel:
+ + + + +

+

+ Remove the speakers:
+ + + + + +

+

+ Remove the wifi:
+ + +

+

+ Remove this cable:
+ + + + + +

+

+ Unroute those antenna wires:
+ + + + + +

+

+ Remove the LCD assembly:
+ + + + + + + + +

+

+ Disconnect the NVRAM battery:
+ +

+

+ Disconnect the fan:
+ +

+

+ Unscrew these:
+ + + + +

+

+ Unscrew the heatsink, then lift it off:
+ + +

+

+ Disconnect the power jack:
+ + +

+

+ Loosen this:
+ +

+

+ Remove this:
+ + + + + +

+

+ Unscrew these:
+ + +

+

+ Remove this:
+ + +

+

+ Unscrew this:
+ +

+

+ Remove the motherboard (the cage is still attached) from + the right hand side, then lift it out:
+ + + +

+

+ Remove these screws, placing the screws in the same layout + and marking each screw hole (so that you know what ones + to put the screws back into later): + + + + + + +

+

+ Separate the motherboard:
+ + +

+

+ Connect your programmer, then connect GND and 3.3V
+ + + + + + +

+

+ A dedicated 3.3V PSU was used to create this guide, but + at ATX PSU is also fine:
+ +

+ +

+ Of course, make sure to turn on your PSU:
+ +

+ +

+ Now, you should be ready to install libreboot. +

+ +

+ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. +

+

+ Log in as root on your BBB, using the instructions in bbb_setup.html#bbb_access. +

+

+ Test that flashrom works:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512
+ In this case, the output was: +

+
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi.
+Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
+Please specify which chip definition to use with the -c <chipname> option.
+
+

+ How to backup factory.rom (change the -c option as neeed, for your flash chip):
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom
+ Note: the -c option is not required in libreboot's patched flashrom, because + the redundant flash chip definitions in flashchips.c have been removed.
+ Now compare the 3 images:
+ # sha512sum factory*.rom
+ If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not + the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware + that could be replicated in coreboot and libreboot. +

+

+ Follow the instructions at ../hcl/gm45_remove_me.html#ich9gen + to change the MAC address inside the libreboot ROM image, before flashing it. + Although there is a default MAC address inside the ROM image, this is not what you want. Make sure + to always change the MAC address to one that is correct for your system. +

+

+ Now flash it:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V +

+

+ +

+

+ You might see errors, but if it says Verifying flash... VERIFIED at the end, then it's flashed and should boot. + If you see errors, try again (and again, and again); the message Chip content is identical to the requested image + is also an indication of a successful installation. +

+

+ Example output from running the command (see above): +

+
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
+Reading old flash chip contents... done.
+Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
+ERASE FAILED!
+Reading current flash chip contents... done. Looking for another erase function.
+Erase/write done.
+Verifying flash... VERIFIED.
+
+ +

+ Back to top of page. +

+ +
+ +
+ +

Thermal paste (IMPORTANT)

+ +

+ Because part of this procedure involved removing the heatsink, you will need to apply new paste. + Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. +

+ +

+ When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. + Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems. +

+ +

+ +

+ +

+ NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. + Other guides online detail the proper application procedure. +

+ +
+ +
+ +

Wifi

+ +

+ The T400 typically comes with an Intel wifi chipset, which does not + work without proprietary software. For a list of wifi chipsets that + work without proprietary software, see + ../hcl/index.html#recommended_wifi. +

+ +

+ Some T400 laptops might come with an Atheros chipset, but this is 802.11g only. +

+ +

+ It is recommended that you install a new wifi chipset. This can only + be done after installing libreboot, because the original firmware has + a whitelist of approved chips, and it will refuse to boot if you + use an 'unauthorized' wifi card. +

+ +

+ The following photos show an Atheros AR5B95 being installed, to + replace the Intel chip that this T400 came with:
+ + +

+ +
+ +
+ +

WWAN

+

+ If you have a WWAN/3G card and/or sim card reader, remove them permanently. + The WWAN-3G card has proprietary firmware inside; the technology is + identical to what is used in mobile phones, so it can also track your movements. +

+

+ Not to be confused with wifi (wifi is fine). +

+ +
+ +
+ +

Memory

+ +

+ You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs + (speed/size). Non-matching pairs won't work. You can also install a + single module (meaning, one of the slots will be empty) in slot 0. +

+ +

+ Make sure that the RAM you buy is the 2Rx8 density. +

+ +

+ This page might be useful for RAM compatibility info + (note: coreboot raminit is different, so this page might be BS) +

+ +

+ The following photo shows 8GiB (2x4GiB) of RAM installed:
+ +

+ +
+ +
+ +

+ Boot it! +

+

+ You should see something like this: +

+

+ + +

+ +

+ Now install GNU/Linux. +

+ +
+ +
+ +

+ Copyright © 2015 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/t500_external.html b/docs/install/t500_external.html new file mode 100644 index 00000000..f83934b2 --- /dev/null +++ b/docs/install/t500_external.html @@ -0,0 +1,589 @@ + + + + + + + + + ThinkPad T500: flashing tutorial (BeagleBone Black) + + + + +
+

Flashing the T500 with a BeagleBone Black

+ +

Initial flashing instructions for T500.

+

+ This guide is for those who want libreboot on their ThinkPad T500 + while they still have the original Lenovo BIOS present. This guide + can also be followed (adapted) if you brick your T500, to know how + to recover. +

+ +

Back to main index

+
+ +
+ +

Libreboot T400

+

+ You may also be interested in the smaller, more portable Libreboot T400. +

+ +
+ +
+ +

Serial port

+ +

+ EHCI debug might not be needed. It has been reported that the docking station + for this laptop has a serial port, so it might be possible to use that instead. +

+ +
+ +
+ +

LCD compatibly

+

+ Not all LCD panels are compatible yet. See ../hcl/gm45_lcd.html. +

+ +
+ +
+ +

A note about CPUs

+

+ ThinkWiki has a list of CPUs + for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in libreboot. + The T9600 was also tested on the T400 and confirmed working, so the T9400/T9500/T9550 probably + also work, but they are untested. +

+ +

Quad-core CPUs

+ +

+ Incompatible. Do not use. +

+ +
+ +
+ +

A note about GPUs

+ +

+ Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this + is referred to as "switchable graphics". In the BIOS setup program + for lenovobios, you can specify that the system will use one or the other (but not both). +

+ +

+ Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization. + On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so + native graphics initialization works all the same. +

+ +

CPU paste required

+ +

+ See #paste. +

+ +
+ +
+ +

Flash chip size

+ +

+ Use this to find out:
+ # dmidecode | grep ROM\ Size +

+ +

+ Back to top of page. +

+ +
+ +
+ +

MAC address

+ +

+ On the T500, the MAC address for the onboard + gigabit ethernet chipset is stored inside the flash chip, + along with other configuration data. +

+

+ Keep a note of the MAC address before disassembly; this is + very important, because you will need to insert this into + the libreboot ROM image before flashing it. + It will be written in one of these locations: +

+ +

+ + + +

+ +
+ +
+ +

Initial BBB configuration

+ +

+ Refer to bbb_setup.html for how to + configure the BBB for flashing. +

+ +

+ The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +

+
+POMONA 5252 (correlate with the BBB guide)
+===  ethernet jack and VGA port ====
+ NC              -       - 21
+ 1               -       - 17
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ 18              -       - 3.3V (PSU)
+ 22              -       - NC - this is pin 1 on the flash chip
+===  SATA port ===
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

+
+
+

+ The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): +

+
+POMONA 5250 (correlate with the BBB guide)
+===  RAM slots ====
+ 18              -       - 1
+ 22              -       - NC
+ NC              -       - 21
+ 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
+===  slot where the AC jack is connected ===

+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

+
+
+ +

+ The procedure +

+ +

+ Remove all screws:
+
+ It is also advisable to, throughout the disassembly, + place any screws and/or components that you removed in + the same layout or arrangement. The follow photos demonstrate + this:
+ + +

+

+ Remove the HDD/SSD and optical drive:
+ + +

+

+ Remove the palm rest:
+ + +

+

+ Remove the keyboard and rear bezel:
+ + + + + + +

+

+ If you have a WWAN/3G card and/or sim card reader, + remove them permanently. The WWAN-3G card has proprietary firmware inside; the technology is identical + to what is used in mobile phones, so it can also track + your movements:
+ + + +

+

+ Remove this frame, and then remove the wifi chip:
+ + + +

+

+ Remove the speakers:
+ + + + + + + +

+

+ Remove the NVRAM battery (already removed in this photo):
+ +

+

+ When you re-assemble, you will be replacing the wifi chip + with another. These two screws don't hold anything together, + but they are included in your system because the screw + holes for half-height cards are a different size, so + use these if you will be installing a half-height card:
+ +

+

+ Unroute the antenna wires:
+ + + + +

+

+ Disconnect the LCD cable from the motherboard:
+ + +

+

+ Remove the LCD assembly hinge screws, and then remove the LCD + assembly:
+ + + +

+

+ Remove the fan and heatsink:
+ + + +

+

+ Remove this screw:
+ +

+

+ Remove these cables, keeping note of how and in what + arrangement they are connected:
+ + + + + + + + + +

+

+ Disconnect the power jack:
+ + +

+

+ Remove the motherboard and cage from the base + (the marked hole is where those cables were routed through):
+ + +

+

+ Remove all screws, arranging them in the same layout + when placing the screws on a surface and marking each screw + hole (this is to reduce the possibility of putting them + back in the wrong holes):
+ + +

+

+ Also remove this:
+ + +

+

+ Separate the motherboard from the cage:
+ + +

+

+ The flash chip is next to the memory slots. On this + system, it was a SOIC-8 (4MiB or 32Mb) flash chip:
+ +

+

+ Connect your programmer, then connect GND and 3.3V
+
+ + + + +

+

+ A dedicated 3.3V PSU was used to create this guide, but + at ATX PSU is also fine:
+ +

+ +

+ Of course, make sure to turn on your PSU:
+ +

+ +

+ Now, you should be ready to install libreboot. +

+ +

+ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. +

+

+ Log in as root on your BBB, using the instructions in bbb_setup.html#bbb_access. +

+

+ Test that flashrom works:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512
+ In this case, the output was: +

+
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi.
+Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
+Please specify which chip definition to use with the -c <chipname> option.
+
+

+ How to backup factory.rom (change the -c option as neeed, for your flash chip):
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom
+ Note: the -c option is not required in libreboot's patched flashrom, because + the redundant flash chip definitions in flashchips.c have been removed.
+ Now compare the 3 images:
+ # sha512sum factory*.rom
+ If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not + the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware + that could be replicated in coreboot and libreboot. +

+

+ Follow the instructions at ../hcl/gm45_remove_me.html#ich9gen + to change the MAC address inside the libreboot ROM image, before flashing it. + Although there is a default MAC address inside the ROM image, this is not what you want. Make sure + to always change the MAC address to one that is correct for your system. +

+

+ Now flash it:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V +

+

+ +

+

+ You might see errors, but if it says Verifying flash... VERIFIED at the end, then it's flashed and should boot. + If you see errors, try again (and again, and again); the message Chip content is identical to the requested image + is also an indication of a successful installation. +

+

+ Example output from running the command (see above): +

+
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
+Reading old flash chip contents... done.
+Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
+ERASE FAILED!
+Reading current flash chip contents... done. Looking for another erase function.
+Erase/write done.
+Verifying flash... VERIFIED.
+
+ +

+ Back to top of page. +

+ +
+ +
+ +

Thermal paste (IMPORTANT)

+ +

+ Because part of this procedure involved removing the heatsink, you will need to apply new paste. + Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. +

+ +

+ When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. + Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems. +

+ +

+ +

+ +

+ NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. + Other guides online detail the proper application procedure. +

+ +
+ +
+ +

Wifi

+ +

+ The T500 typically comes with an Intel wifi chipset, which does not + work without proprietary software. For a list of wifi chipsets that + work without proprietary software, see + ../hcl/index.html#recommended_wifi. +

+ +

+ Some T500 laptops might come with an Atheros chipset, but this is 802.11g only. +

+ +

+ It is recommended that you install a new wifi chipset. This can only + be done after installing libreboot, because the original firmware has + a whitelist of approved chips, and it will refuse to boot if you + use an 'unauthorized' wifi card. +

+ +

+ The following photos show an Atheros AR5B95 being installed, to + replace the Intel chip that this T500 came with:
+ + +

+ +
+ +
+ +

WWAN

+

+ If you have a WWAN/3G card and/or sim card reader, remove them permanently. + The WWAN-3G card has DMA, and proprietary firmware inside; the technology is + identical to what is used in mobile phones, so it can also track your movements. +

+

+ Not to be confused with wifi (wifi is fine). +

+ +
+ +
+ +

Memory

+ +

+ You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs + (speed/size). Non-matching pairs won't work. You can also install a + single module (meaning, one of the slots will be empty) in slot 0. +

+ +

+ Make sure that the RAM you buy is the 2Rx8 density. +

+ +

+ This page might be useful for RAM compatibility info + (note: coreboot raminit is different, so this page might be BS) +

+ +

+ The following photo shows 8GiB (2x4GiB) of RAM installed:
+ +

+ +
+ +
+ +

+ Boot it! +

+

+ You should see something like this: +

+

+ +

+ +

+ Now install GNU/Linux. +

+ +
+ +
+ +

+ Copyright © 2015 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/t60_unbrick.html b/docs/install/t60_unbrick.html new file mode 100644 index 00000000..a6a55cbe --- /dev/null +++ b/docs/install/t60_unbrick.html @@ -0,0 +1,322 @@ + + + + + + + + + ThinkPad T60: Recovery guide + + + + +
+

ThinkPad T60: Recovery guide

+

This section documents how to recover from a bad flash that prevents your ThinkPad T60 from booting.

+

Back to previous index

+
+ +
+

Table of Contents

+ +
+ +
+

Brick type 1: bucts not reset.

+

+ You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and + the ROM wasn't dd'd.* or if Lenovo BIOS was present and libreboot wasn't flashed.

+ + In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:
+

+ + *Those dd commands should be applied to all newly compiled T60 ROM images (the ROM images in libreboot binary archives already have this applied!):
+ dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k
+ dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump
+ dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc
+ (doing this makes the ROM suitable for use when flashing a system that still has Lenovo BIOS running, + using those instructions: http://www.coreboot.org/Board:lenovo/x60/Installation. + (it says x60, but instructions for t60 are identical) +

+
+ +
+ +

bad rom (or user error), system won't boot

+ +

+ In this scenario, you compiled a ROM that had an incorrect configuration, or there is an actual bug preventing your system from + booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS was running. In any case, your system is bricked and will not boot at all. +

+

+ "Unbricking" means flashing a known-good (working) ROM. The problem: you can't boot the system, making this difficult. In this situation, external hardware (see hardware requirements above) is needed which can flash the SPI chip (where libreboot resides). +

+ +

+ Remove those screws and remove the HDD:
+ +

+ +

+ Lift off the palm rest:
+ +

+ +

+ Lift up the keyboard, pull it back a bit, flip it over like that and then disconnect it from the board:
+ +

+ +

+ Gently wedge both sides loose:
+ +

+ +

+ Remove that cable from the position:
+ +

+ +

+ Now remove that bezel. Remove wifi, nvram battery and speaker connector (also remove 56k modem, on the left of wifi):
+ +

+ +

+ Remove those screws:
+ +

+ +

+ Disconnect the power jack:
+ +

+ +

+ Remove nvram battery:
+ +

+ +

+ Disconnect cable (for 56k modem) and disconnect the other cable:
+ +

+ +

+ Disconnect speaker cable:
+ +

+ +

+ Disconnect the other end of the 56k modem cable:
+ +

+ +

+ Make sure you removed it:
+ +

+ +

+ Unscrew those:
+ +

+ +

+ Make sure you removed those:
+ +

+ +

+ Disconnect LCD cable from board:
+ +

+ +

+ Remove those screws then remove the LCD assembly:
+ +

+ +

+ Once again, make sure you removed those:
+ +

+ +

+ Remove the shielding containing the motherboard, then flip it over. Remove these screws, placing them on a steady + surface in the same layout as they were in before you removed them. Also, you should mark each screw hole after removing the + screw (a permanent marker pen will do), this is so that you have a point of reference when re-assembling the system:
+ + +

+ +

+ Now wire up the BBB and the Pomona with your PSU.
+ Refer to bbb_setup.html for how to setup + the BBB for flashing.
+ Note, the guide mentions a 3.3v DC PSU but you don't need this on the T60: + if you don't have or don't want to use an external PSU, then make + sure not to connect the 3.3v leads mentioned in the guide; + instead, connect the AC adapter (the one that normally charges your + battery) so that the board has power (but don't boot it up)
+
+ Correlate the following with the BBB guide linked above: +

+
+POMONA 5250:
+===  DVD drive ====
+ 18              -       - 1
+ 22              -       - NC				---- RAM is on this end
+ NC              -       - 21
+ 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
+===  audio jacks ===
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
+
+ +

+ Connect the pomona from the BBB to the flash chip. No pics unfortunately. (use the text diagram above). +

+ +

+ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. +

+ +

+ SSH'd into the BBB:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom +

+

+ It should be Verifying flash... VERIFIED at the end. If flashrom complains about multiple flash chip + definitions detected, then choose one of them following the instructions in the output. +

+ +

+ Put those screws back:
+ +

+ +

+ Put it back into lower chassis:
+ +

+ +

+ Attach LCD and insert screws (also, attach the lcd cable to the board):
+ +

+ +

+ Insert those screws:
+ +

+ +

+ On the CPU (and there is another chip south-east to it, sorry forgot to take pic) + clean off the old thermal paste (with the alcohol) and apply new (Artic Silver 5 is good, others are good too) + you should also clean the heatsink the same way
+ +

+ +

+ Attach the heatsink and install the screws (also, make sure to install the AC jack as highlighted):
+ +

+ +

+ Reinstall that upper bezel:
+ +

+ +

+ Do that:
+ +

+ +

+ Re-attach modem, wifi, (wwan?), and all necessary cables. Sorry, forgot to take pics. Look at previous removal steps to see where they go back to. +

+ +

+ Attach keyboard and install nvram battery:
+ +

+ +

+ Place keyboard and (sorry, forgot to take pics) reinstall the palmrest and insert screws on the underside:
+ +

+ +

+ It lives!
+ +

+ +

+ Always stress test ('stress -c 2' and xsensors. below 90C is ok) when replacing cpu paste/heatsink:
+ +

+ +
+ +
+ +

+ Copyright © 2014, 2015 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/x200_external.html b/docs/install/x200_external.html new file mode 100644 index 00000000..a47d3ba5 --- /dev/null +++ b/docs/install/x200_external.html @@ -0,0 +1,477 @@ + + + + + + + + + ThinkPad X200: flashing tutorial (BeagleBone Black) + + + + +
+

Flashing the X200 with a BeagleBone Black

+

Initial flashing instructions for X200.

+

+ This guide is for those who want libreboot on their ThinkPad X200 + while they still have the original Lenovo BIOS present. This guide + can also be followed (adapted) if you brick your X200, to know how + to recover. +

+ + + +

Back to main index

+
+ +
+ +

X200 laptops with libreboot pre-installed

+ +

+ If you don't want to install libreboot yourself, companies exist that sell these laptops + with libreboot pre-installed, along with a free GNU/Linux distribution. +

+

+ Check the suppliers page for more information. +

+ +
+ +
+ +

Flash chip size

+ +

+ Use this to find out:
+ # dmidecode | grep ROM\ Size +

+ +

+ The X200S and X200 Tablet will use a WSON-8 flash chip, on the + bottom of the motherboard (this requires removal of the + motherboard). Not all X200S/X200T are supported; + see ../hcl/x200.html#x200s. +

+ +

+ Back to top of page. +

+ +
+ +
+ +

MAC address

+ +

+ On the X200/X200S/X200T, the MAC address for the onboard + gigabit ethernet chipset is stored inside the flash chip, + along with other configuration data. +

+

+ Keep a note of the MAC address before disassembly; this is + very important, because you will need to insert this into + the libreboot ROM image before flashing it. + It will be written in one of these locations: +

+ +

+ + +

+ +
+ +
+ +

Initial BBB configuration

+ +

+ Refer to bbb_setup.html for how to + set up the BBB for flashing. +

+ +

+ The following shows how to connect the clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): +

+
+POMONA 5252 (correlate with the BBB guide)
+===  front (display) on your X200 ====
+ NC              -       - 21
+ 1               -       - 17
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ 18              -       - 3.3V (PSU)
+ 22              -       - NC - this is pin 1 on the flash chip
+===  back (palmrest) on your X200 ===
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
+Here is a photo of the SOIC-16 flash chip. Pins are labelled:

+			
+
+

+ The following shows how to connect the clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): +

+
+POMONA 5250 (correlate with the BBB guide)
+===  left side of the X200 (where the VGA port is) ====
+ 18              -       - 1
+ 22              -       - NC
+ NC              -       - 21
+ 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip. in front of it is the screen.
+===  right side of the X200 (where the audio jacks are) ===
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
+Here is a photo of the SOIC-8 flash chip. The pins are labelled:

+
+
+Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16
+chip on those pins?
+
+

+ On the X200S and X200 Tablet the flash chip is underneath the board, in a WSON package. + The pinout is very much the same as a SOIC-8, except you need to solder (there are no clips available).
+ The following image shows how this is done:
+ +
+ In this image, a pin header was soldered onto the WSON. Another solution might be to de-solder the WSON-8 chip and put a SOIC-8 there instead. + Check the list of SOIC-8 flash chips at ../hcl/gm45_remove_me.html#flashchips but + do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case, + the X201 SOIC-8 flash chip (Macronix 25L6445E) might work. +

+ +

+ The procedure +

+

+ This section is for the X200. This does not apply to the X200S or X200 Tablet + (for those systems, you have to remove the motherboard completely, since + the flash chip is on the other side of the board). +

+

+ Remove these screws:
+ +

+

+ Push the keyboard forward, gently, then lift it off and + disconnect it from the board:
+ + +

+

+ Pull the palm rest off, lifting from the left and right side at the back of the + palm rest:
+ +

+

+ Lift back the tape that covers a part of the flash chip, and + then connect the clip:
+ + +

+

+ On pin 2 of the BBB, where you have the ground (GND), connect the + ground to your PSU:
+ + +

+

+ Connect the 3.3V supply from your PSU to the flash chip (via + the clip):
+ + +

+

+ Of course, make sure that your PSU is also plugged in and + turn on:
+ +

+

+ This tutorial tells you to use an ATX PSU, for the 3.3V DC + supply. The PSU used when taking these photos is actually + not an ATX PSU, but a PSU that is designed specifically + for providing 3.3V DC (an ATX PSU will also work):
+ +

+

+ Now, you should be ready to install libreboot. +

+

+ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. +

+

+ Log in as root on your BBB, using the instructions in + bbb_setup.html#bbb_access. +

+ +

+ Test that flashrom works:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512
+ In this case, the output was: +

+
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi.
+Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
+Please specify which chip definition to use with the -c <chipname> option.
+
+

+ How to backup factory.rom (change the -c option as neeed, for your flash chip):
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom
+ Note: the -c option is not required in libreboot's patched flashrom, because + the redundant flash chip definitions in flashchips.c have been removed.
+ Now compare the 3 images:
+ # sha512sum factory*.rom
+ If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not + the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware + that could be replicated in coreboot and libreboot. +

+

+ Follow the instructions at ../hcl/gm45_remove_me.html#ich9gen + to change the MAC address inside the libreboot ROM image, before flashing it. + Although there is a default MAC address inside the ROM image, this is not what you want. Make sure + to always change the MAC address to one that is correct for your system. +

+

+ Now flash it:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V +

+

+ +

+

+ You might see errors, but if it says Verifying flash... VERIFIED at the end, then it's flashed and should boot. + If you see errors, try again (and again, and again); the message Chip content is identical to the requested image + is also an indication of a successful installation. +

+

+ Example output from running the command (see above): +

+
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi.
+Reading old flash chip contents... done.
+Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
+ERASE FAILED!
+Reading current flash chip contents... done. Looking for another erase function.
+Erase/write done.
+Verifying flash... VERIFIED.
+
+ +

+ Back to top of page. +

+ +
+ +
+ +

Wifi

+ +

+ The X200 typically comes with an Intel wifi chipset, which does not + work without proprietary software. For a list of wifi chipsets that + work without proprietary software, see + ../hcl/index.html#recommended_wifi. +

+ +

+ Some X200 laptops come with an Atheros chipset, but this is 802.11g only. +

+ +

+ It is recommended that you install a new wifi chipset. This can only + be done after installing libreboot, because the original firmware has + a whitelist of approved chips, and it will refuse to boot if you + use an 'unauthorized' wifi card. +

+ +

+ The following photos show an Atheros AR5B95 being installed, to + replace the Intel chip that this X200 came with:
+ + +

+ +
+ +
+ +

WWAN

+

+ If you have a WWAN/3G card and/or sim card reader, remove them permanently. + The WWAN-3G card has proprietary firmware inside; the technology is + identical to what is used in mobile phones, so it can also track your movements. +

+

+ Not to be confused with wifi (wifi is fine). +

+ +
+ +
+ +

Memory

+ +

+ You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs + (speed/size). Non-matching pairs won't work. You can also install a + single module (meaning, one of the slots will be empty) in slot 0. +

+

+ NOTE: according to users repors, non matching pairs (e.g. 1+2 GiB) might work in some cases. +

+

+ Make sure that the RAM you buy is the 2Rx8 density. +

+ +

+ In this photo, 8GiB of RAM (2x4GiB) is installed:
+ +

+ +
+ +
+ +

+ Boot it! +

+

+ You should see something like this: +

+

+ +

+ +

+ Now install GNU/Linux. +

+ +
+ +
+

+ X200S and X200 Tablet users: GPIO33 trick will not work. +

+

+ sgsit found out about a pin called GPIO33, which can be grounded to disable the flashing protections + by the descriptor and stop the ME from starting (which itself interferes with flashing attempts). + The theory was proven correct; however, it is still useless in practise. +

+

+ Look just above the 7 in TP37 (that's GPIO33):
+ +

+

+ By default we would see this in lenovobios, when trying flashrom -p internal -w rom.rom: +

+
+FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only.
+FREG2: Warning: Management Engine region (0x00001000-0x005f5fff) is locked.
+
+

+ With GPIO33 grounded during boot, this disabled the flash protections as set + by descriptor, and stopped the ME from starting. The output changed to: +

+
+The Flash Descriptor Override Strap-Pin is set. Restrictions implied by
+the Master Section of the flash descriptor are NOT in effect. Please note
+that Protected Range (PR) restrictions still apply.
+
+

+ The part in bold is what got us. This was still observed: +

+
+PR0: Warning: 0x007e0000-0x01ffffff is read-only.
+PR4: Warning: 0x005f8000-0x005fffff is locked.
+
+ +

+ It is actually possible to disable these protections. Lenovobios does, + when updating the BIOS (proprietary one). One possible way to go about this + would be to debug the BIOS update utility from Lenovo, to find out + how it's disabling these protections. Some more research is available here: + http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research +

+ +

+ On a related note, libreboot has a utility that could help with investigating this: + ../hcl/gm45_remove_me.html#demefactory +

+
+ +
+ +

+ Copyright © 2014, 2015 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/x60_unbrick.html b/docs/install/x60_unbrick.html new file mode 100644 index 00000000..f8e969a8 --- /dev/null +++ b/docs/install/x60_unbrick.html @@ -0,0 +1,318 @@ + + + + + + + + + ThinkPad X60: Recovery guide + + + + +
+

ThinkPad X60: Recovery guide

+

This section documents how to recover from a bad flash that prevents your ThinkPad X60 from booting.

+

Back to previous index

+
+ +
+

Table of Contents

+ +
+ +
+

Brick type 1: bucts not reset.

+

+ You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and + the ROM wasn't dd'd.* or if Lenovo BIOS was present and libreboot wasn't flashed.

+ + In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:
+

+ + *Those dd commands should be applied to all newly compiled X60 ROM images (the ROM images in libreboot binary archives already have this applied!):
+ dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k
+ dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump
+ dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc
+ (doing this makes the ROM suitable for use when flashing a system that still has Lenovo BIOS running, + using those instructions: http://www.coreboot.org/Board:lenovo/x60/Installation. +

+
+ +
+ +

bad rom (or user error), system won't boot

+

+ In this scenario, you compiled a ROM that had an incorrect configuration, or there is an actual bug preventing your system from + booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS was running. In any case, your system is bricked and will not boot at all. +

+

+ "Unbricking" means flashing a known-good (working) ROM. The problem: you can't boot the system, making this difficult. In this situation, external hardware (see hardware requirements above) is needed which can flash the SPI chip (where libreboot resides). +

+

+ Remove those screws:
+ +

+

+ Push the keyboard forward (carefully):
+ +

+

+ Lift the keyboard up and disconnect it from the board:
+ +

+

+ Grab the right-hand side of the chassis and force it off (gently) and pry up the rest of the chassis:
+ +

+

+ You should now have this:
+ +

+

+ Disconnect the wifi antenna cables, the modem cable and the speaker:
+ +

+

+ Unroute the cables along their path, carefully lifting the tape that holds them in place. Then, disconnect the modem + cable (other end) and power connection and unroute all the cables so that they dangle by the monitor hinge on the right-hand + side:
+ +

+

+ Disconnect the monitor from the motherboard, and unroute the grey antenna cable, carefully lifting the tape + that holds it into place:
+ +

+

+ Carefully lift the remaining tape and unroute the left antenna cable so that it is loose:
+ +

+

+ Remove the screw that is highlighted (do NOT remove the other one; it holds part of the heatsink (other side) into place):
+ +

+

+ Remove those screws:
+ +

+

+ Carefully remove the plate, like so:
+ +

+

+ Remove the SATA connector:
+ +

+

+ Now remove the motherboard (gently) and cast the lcd/chassis aside:
+ +

+

+ Lift back that tape and hold it with something. Highlighted is the SPI flash chip:
+ +

+

+ Now wire up the BBB and the Pomona with your PSU.
+ Refer to bbb_setup.html for how to setup + the BBB for flashing.
+ Note, the guide mentions a 3.3v DC PSU but you don't need this on the X60: + if you don't have or don't want to use an external PSU, then make + sure not to connect the 3.3v leads mentioned in the guide; + instead, connect the AC adapter (the one that normally charges your + battery) so that the board has power (but don't boot it up) +
+ Correlate the following with the BBB guide linked above: +

+
+POMONA 5250:
+===  golden finger and wifi switch ====
+ 18              -       - 1
+ 22              -       - NC                    ---------- audio jacks are on this end
+ NC              -       - 21
+ 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
+===  CPU fan ===
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
+
+ +

+ Connecting the BBB and pomona (in this image, an external 3.3v DC PSU was used):
+ +

+ +

+ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. +

+ +

+ SSH'd into the BBB:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom +

+

+ It should be Verifying flash... VERIFIED at the end. If flashrom complains about multiple flash chip + definitions detected, then choose one of them following the instructions in the output. +

+ +

+ Remove the programmer and put it away somewhere. Put back the tape and press firmly over it:
+ +

+

+ Your empty chassis:
+ +

+

+ Put the motherboard back in:
+ +

+

+ Reconnect SATA:
+ +

+

+ Put the plate back and re-insert those screws:
+ +

+

+ Re-route that antenna cable around the fan and apply the tape:
+ +

+

+ Route the cable here and then (not shown, due to error on my part) reconnect the monitor cable to the motherboard + and re-insert the screws:
+ +

+

+ Re-insert that screw:
+ +

+

+ Route the black antenna cable like so:
+ +

+

+ Tuck it in neatly like so:
+ +

+

+ Route the modem cable like so:
+ +

+

+ Connect modem cable to board and tuck it in neatly like so:
+ +

+

+ Route the power connection and connect it to the board like so:
+ +

+

+ Route the antenna and modem cables neatly like so:
+ +

+

+ Connect the wifi antenna cables. At the start of the tutorial, this system had an Intel wifi chip. Here you see I've replaced it with an + Atheros AR5B95 (supports 802.11n and can be used without blobs):
+ +

+

+ Connect the modem cable:
+ +

+

+ Connect the speaker:
+ +

+

+ You should now have this:
+ +

+

+ Re-connect the upper chassis:
+ +

+

+ Re-connect the keyboard:
+ +

+

+ Re-insert the screws that you removed earlier:
+ +

+

+ Power on!
+ +

+

+ Trisquel live USB menu (using the GRUB ISOLINUX parser):
+ +

+

+ Trisquel live desktop:
+ +

+ +
+ +
+ +

+ Copyright © 2014, 2015 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + diff --git a/docs/install/x60flashscript.patch b/docs/install/x60flashscript.patch new file mode 100644 index 00000000..7f4c8307 --- /dev/null +++ b/docs/install/x60flashscript.patch @@ -0,0 +1,27 @@ +From 34270811fce1ecf0bcf3b1363b0dc3dbf284ab09 Mon Sep 17 00:00:00 2001 +From: Leah Rowe +Date: Wed, 10 Jun 2015 22:53:28 +0000 +Subject: flash script: fix a really really really dumb mistake + +--- +diff --git a/flash b/flash +index c96b915..04fd274 100755 +--- a/flash ++++ b/flash +@@ -95,12 +95,12 @@ if [ "$mode" = "i945lenovo_firstflash" ] || [ "$mode" = "i945lenovo_secondflash" + # git or libreboot_src + bucts="./bucts/bucts" + flashrom_lenovobios_sst="./flashrom/flashrom_lenovobios_sst" +- flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_sst" ++ flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_macronix" + else + # libreboot_util + bucts="./bucts/$arch/bucts" + flashrom_lenovobios_sst="./flashrom/$arch/flashrom_lenovobios_sst" +- flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_sst" ++ flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_macronix" + fi + + # anti-bricking precaution +-- +cgit v0.9.0.2 diff --git a/docs/install/x60tablet_unbrick.html b/docs/install/x60tablet_unbrick.html new file mode 100644 index 00000000..8da9d2f9 --- /dev/null +++ b/docs/install/x60tablet_unbrick.html @@ -0,0 +1,215 @@ + + + + + + + + + ThinkPad X60 Tablet: Recovery guide + + + + +
+

ThinkPad X60 Tablet: Recovery guide

+

This section documents how to recover from a bad flash that prevents your ThinkPad X60 Tablet from booting.

+

Back to previous index

+
+ +
+

Table of Contents

+ +
+ +
+

Brick type 1: bucts not reset.

+

+ You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and + the ROM wasn't dd'd.* or if Lenovo BIOS was present and libreboot wasn't flashed.

+ + In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:
+

+ + *Those dd commands should be applied to all newly compiled X60 ROM images (the ROM images in libreboot binary archives already have this applied!):
+ dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k
+ dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump
+ dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc
+ (doing this makes the ROM suitable for use when flashing a system that still has Lenovo BIOS running, + using those instructions: http://www.coreboot.org/Board:lenovo/x60/Installation. +

+
+ +
+ +

bad rom (or user error), system won't boot

+

+ In this scenario, you compiled a ROM that had an incorrect configuration, or there is an actual bug preventing your system from + booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS was running. In any case, your system is bricked and will not boot at all. +

+

+ "Unbricking" means flashing a known-good (working) ROM. The problem: you can't boot the system, making this difficult. In this situation, external hardware (see hardware requirements above) is needed which can flash the SPI chip (where libreboot resides). +

+ +

+ +

+ +

+ Remove those screws:
+ +

+ +

+ Remove the HDD:
+ +

+ +

+ Push keyboard forward to loosen it:
+ +

+ +

+ Lift:
+ +

+ +

+ Remove those:
+ +

+ +

+ + +

+ +

+ Also remove that (marked) and unroute the antenna cables:
+ +

+ +

+ For some X60T laptops, you have to unroute those too:
+ +

+ +

+ Remove the LCD extend board screws. Also remove those screws (see blue marks) and remove/unroute the cables and remove the metal plate:
+ +

+ +

+ Remove that screw and then remove the board:
+ +

+ +

+ Now wire up the BBB and the Pomona with your PSU.
+ Refer to bbb_setup.html for how to setup + the BBB for flashing.
+ Note, the guide mentions a 3.3v DC PSU but you don't need this on the X60 Tablet: + if you don't have or don't want to use an external PSU, then make + sure not to connect the 3.3v leads mentioned in the guide; + instead, connect the AC adapter (the one that normally charges your + battery) so that the board has power (but don't boot it up) +
+ Correlate the following with the BBB guide linked above: +

+
+POMONA 5250:
+===  golden finger and wifi switch ====
+ 18              -       - 1
+ 22              -       - NC                    ---------- audio jacks are on this end
+ NC              -       - 21
+ 3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
+===  CPU fan ===
+This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
+
+ +

+ Connecting the BBB and pomona (in this image, an external 3.3v DC PSU was used):
+ +

+ +

+ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. +

+ +

+ SSH'd into the BBB:
+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom +

+

+ It should be Verifying flash... VERIFIED at the end. If flashrom complains about multiple flash chip + definitions detected, then choose one of them following the instructions in the output. +

+ +

+ Reverse the steps to re-assemble your system. +

+ +
+ +
+ +

+ Copyright © 2014, 2015 Leah Rowe <info@minifree.org>
+ Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at ../gfdl-1.3.txt +

+ +

+ Updated versions of the license (when available) can be found at + https://www.gnu.org/licenses/licenses.html +

+ +

+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. +

+

+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. +

+

+ The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. +

+ +
+ + + -- cgit v1.2.3-70-g09d2