From 5c205cc981a2fd7128843fe1865442fa43cae73e Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 15 May 2016 03:50:09 +0200 Subject: i945: path to enable all VRAM options, libreboot config is set to 64MB --- resources/libreboot/config/grub/macbook21/config | 2 + resources/libreboot/config/grub/t60/config | 2 + resources/libreboot/config/grub/x60/config | 84 +++++++----- .../grub/macbook21/reused.list | 1 + .../grub/t60/reused.list | 1 + .../x60/0001-i945-Enable-changing-VRAM-size.patch | 152 +++++++++++++++++++++ 6 files changed, 210 insertions(+), 32 deletions(-) create mode 100644 resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/macbook21/reused.list create mode 100644 resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/x60/0001-i945-Enable-changing-VRAM-size.patch (limited to 'resources') diff --git a/resources/libreboot/config/grub/macbook21/config b/resources/libreboot/config/grub/macbook21/config index 27102dbf..7f46fbff 100644 --- a/resources/libreboot/config/grub/macbook21/config +++ b/resources/libreboot/config/grub/macbook21/config @@ -252,6 +252,8 @@ CONFIG_CHANNEL_XOR_RANDOMIZATION=y CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_HPET_MIN_TICKS=0x80 CONFIG_MAX_PIRQ_LINKS=4 +CONFIG_VRAM_SIZE_64MB=y +CONFIG_VRAM_SIZE=0x70 # # Southbridge diff --git a/resources/libreboot/config/grub/t60/config b/resources/libreboot/config/grub/t60/config index ee5cb7de..7833a152 100644 --- a/resources/libreboot/config/grub/t60/config +++ b/resources/libreboot/config/grub/t60/config @@ -262,6 +262,8 @@ CONFIG_CHANNEL_XOR_RANDOMIZATION=y CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_HPET_MIN_TICKS=0x80 CONFIG_MAX_PIRQ_LINKS=4 +CONFIG_VRAM_SIZE_64MB=y +CONFIG_VRAM_SIZE=0x70 # # Southbridge diff --git a/resources/libreboot/config/grub/x60/config b/resources/libreboot/config/grub/x60/config index 5426518f..d6cd2d29 100644 --- a/resources/libreboot/config/grub/x60/config +++ b/resources/libreboot/config/grub/x60/config @@ -19,15 +19,15 @@ CONFIG_USE_OPTION_TABLE=y # CONFIG_STATIC_OPTION_TABLE is not set # CONFIG_UNCOMPRESSED_RAMSTAGE is not set CONFIG_COMPRESS_RAMSTAGE=y -# CONFIG_COMPRESS_PRERAM_STAGES is not set CONFIG_INCLUDE_CONFIG_FILE=y +# CONFIG_NO_XIP_EARLY_STAGES is not set CONFIG_EARLY_CBMEM_INIT=y # CONFIG_COLLECT_TIMESTAMPS is not set # CONFIG_USE_BLOBS is not set # CONFIG_COVERAGE is not set # CONFIG_RELOCATABLE_MODULES is not set # CONFIG_RELOCATABLE_RAMSTAGE is not set -CONFIG_FLASHMAP_OFFSET=0x0 +# CONFIG_NO_STAGE_CACHE is not set CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set CONFIG_BOOTBLOCK_CUSTOM=y @@ -118,7 +118,6 @@ CONFIG_MAX_CPUS=2 CONFIG_VGA_BIOS_ID="8086,27a2" # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set # CONFIG_VGA_BIOS is not set -# CONFIG_UDELAY_IO is not set CONFIG_DCACHE_RAM_BASE=0xffdf8000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 @@ -133,9 +132,12 @@ CONFIG_CBFS_SIZE=0x200000 CONFIG_POST_DEVICE=y CONFIG_USBDEBUG_HCD_INDEX=0 CONFIG_TTYS0_LCS=3 +# CONFIG_CONSOLE_POST is not set +CONFIG_DRIVERS_UART_8250IO=y # CONFIG_BOARD_LENOVO_G505S is not set # CONFIG_BOARD_LENOVO_R400 is not set # CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T420 is not set # CONFIG_BOARD_LENOVO_T420S is not set # CONFIG_BOARD_LENOVO_T430S is not set # CONFIG_BOARD_LENOVO_T500 is not set @@ -153,7 +155,6 @@ CONFIG_CPU_ADDR_BITS=36 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 CONFIG_USBDEBUG=y CONFIG_DRIVERS_PS2_KEYBOARD=y -CONFIG_DRIVERS_UART_8250IO=y # CONFIG_NO_POST is not set CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0 CONFIG_BOARD_ROMSIZE_KB_2048=y @@ -182,19 +183,25 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y # # CONFIG_SOC_BROADCOM_CYGNUS is not set CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000 +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/i945/bootblock.c" CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801gx/bootblock.c" CONFIG_TTYS0_BASE=0x3f8 CONFIG_EHCI_BAR=0xfef00000 CONFIG_HEAP_SIZE=0x4000 +CONFIG_CONSOLE_CBMEM=y +CONFIG_UART_PCI_ADDR=0 # CONFIG_SOC_MARVELL_ARMADA38X is not set # CONFIG_SOC_MARVELL_BG4CD is not set # CONFIG_SOC_MEDIATEK_MT8173 is not set # CONFIG_SOC_NVIDIA_TEGRA124 is not set # CONFIG_SOC_NVIDIA_TEGRA132 is not set # CONFIG_SOC_NVIDIA_TEGRA210 is not set +# CONFIG_SOC_QC_IPQ40XX is not set # CONFIG_SOC_QC_IPQ806X is not set # CONFIG_SOC_ROCKCHIP_RK3288 is not set +# CONFIG_SOC_ROCKCHIP_RK3399 is not set # CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set # CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set # CONFIG_SOC_UCB_RISCV is not set @@ -217,21 +224,21 @@ CONFIG_SSE2=y # CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set # CONFIG_CPU_TI_AM335X is not set # CONFIG_PARALLEL_CPU_INIT is not set +# CONFIG_PARALLEL_MP is not set +# CONFIG_UDELAY_IO is not set CONFIG_UDELAY_LAPIC=y CONFIG_LAPIC_MONOTONIC_TIMER=y # CONFIG_UDELAY_TSC is not set # CONFIG_UDELAY_TIMER2 is not set -# CONFIG_TSC_CALIBRATE_WITH_IO is not set # CONFIG_TSC_SYNC_LFENCE is not set CONFIG_TSC_SYNC_MFENCE=y +# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set CONFIG_LOGICAL_CPUS=y # CONFIG_SMM_TSEG is not set CONFIG_SMM_LAPIC_REMAP_MITIGATION=y # CONFIG_SERIALIZED_SMM_INITIALIZATION is not set # CONFIG_X86_AMD_FIXED_MTRRS is not set # CONFIG_PLATFORM_USES_FSP1_0 is not set -# CONFIG_PARALLEL_MP is not set -# CONFIG_BACKUP_DEFAULT_SMM_REGION is not set # CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set CONFIG_CACHE_AS_RAM=y CONFIG_SMP=y @@ -253,6 +260,7 @@ CONFIG_CPU_MICROCODE_CBFS_NONE=y CONFIG_VIDEO_MB=0 # CONFIG_NORTHBRIDGE_AMD_PI is not set CONFIG_RAMBASE=0x100000 +# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y CONFIG_NORTHBRIDGE_INTEL_I945=y # CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC is not set @@ -260,6 +268,13 @@ CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y CONFIG_CHANNEL_XOR_RANDOMIZATION=y # CONFIG_OVERRIDE_CLOCK_DISABLE is not set # CONFIG_CHECK_SLFRCS_ON_RESUME is not set +# CONFIG_VRAM_SIZE_1MB is not set +# CONFIG_VRAM_SIZE_4MB is not set +# CONFIG_VRAM_SIZE_8MB is not set +# CONFIG_VRAM_SIZE_16MB is not set +# CONFIG_VRAM_SIZE_32MB is not set +CONFIG_VRAM_SIZE_64MB=y +CONFIG_VRAM_SIZE=0x70 CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_HPET_MIN_TICKS=0x80 CONFIG_MAX_PIRQ_LINKS=4 @@ -290,6 +305,7 @@ CONFIG_H8_DOCK_EARLY_INIT=y CONFIG_EC_LENOVO_PMH7=y # CONFIG_MAINBOARD_HAS_CHROMEOS is not set # CONFIG_UEFI_2_4_BINDING is not set +# CONFIG_USE_SIEMENS_HWILIB is not set # CONFIG_ARCH_ARM is not set # CONFIG_ARCH_BOOTBLOCK_ARM is not set # CONFIG_ARCH_VERSTAGE_ARM is not set @@ -343,7 +359,6 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y # CONFIG_USE_MARCH_586 is not set CONFIG_AP_IN_SIPI_WAIT=y # CONFIG_SIPI_VECTOR_IN_ROM is not set -CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y # CONFIG_ROMCC is not set # CONFIG_LATE_CBMEM_INIT is not set CONFIG_PC80_SYSTEM=y @@ -351,9 +366,8 @@ CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set -# CONFIG_COMPILE_IN_DSDT is not set -CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 +# CONFIG_POSTCAR_STAGE is not set # # Devices @@ -378,7 +392,6 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y # CONFIG_PCIEXP_L1_SUB_STATE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 -# CONFIG_PXE_ROM is not set # CONFIG_SOFTWARE_I2C is not set # @@ -391,38 +404,23 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 # # CONFIG_DRIVERS_AS3722_RTC is not set # CONFIG_GIC is not set -CONFIG_SMBIOS_PROVIDED_BY_MOBO=y -# CONFIG_DRIVERS_I2C_RTD2132 is not set -CONFIG_DRIVERS_ICS_954309=y -# CONFIG_INTEL_DP is not set -# CONFIG_INTEL_DDI is not set -CONFIG_INTEL_EDID=y -CONFIG_INTEL_INT15=y -CONFIG_INTEL_GMA_ACPI=y -# CONFIG_DRIVER_INTEL_I210 is not set # CONFIG_IPMI_KCS is not set CONFIG_DRIVERS_LENOVO_WACOM=y # CONFIG_DIGITIZER_AUTODETECT is not set CONFIG_DIGITIZER_PRESENT=y # CONFIG_DIGITIZER_ABSENT is not set -# CONFIG_DRIVER_MAXIM_MAX77686 is not set -# CONFIG_DRIVER_PARADE_PS8625 is not set -CONFIG_DRIVERS_MC146818=y -# CONFIG_MAINBOARD_HAS_LPC_TPM is not set -# CONFIG_DRIVERS_RICOH_RCE822 is not set -# CONFIG_DRIVERS_SIL_3114 is not set # CONFIG_SPI_FLASH is not set # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set -# CONFIG_DRIVER_TI_TPS65090 is not set -# CONFIG_DRIVERS_TI_TPS65913 is not set -# CONFIG_DRIVERS_TI_TPS65913_RTC is not set CONFIG_DRIVERS_UART=y # CONFIG_NO_UART_ON_SUPERIO is not set +# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set +# CONFIG_UART_OVERRIDE_REFCLK is not set # CONFIG_DRIVERS_UART_8250MEM is not set # CONFIG_DRIVERS_UART_8250MEM_32 is not set # CONFIG_HAVE_UART_SPECIAL is not set # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_DRIVERS_UART_PL011 is not set +# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set CONFIG_HAVE_USBDEBUG=y # CONFIG_HAVE_USBDEBUG_OPTIONS is not set CONFIG_USBDEBUG_IN_ROMSTAGE=y @@ -432,8 +430,27 @@ CONFIG_USBDEBUG_DONGLE_STD=y # CONFIG_USBDEBUG_DONGLE_BEAGLEBONE_BLACK is not set # CONFIG_USBDEBUG_DONGLE_FTDI_FT232H is not set CONFIG_USBDEBUG_OPTIONAL_HUB_PORT=0 +CONFIG_SMBIOS_PROVIDED_BY_MOBO=y +# CONFIG_DRIVERS_I2C_RTD2132 is not set +CONFIG_DRIVERS_ICS_954309=y +# CONFIG_INTEL_DP is not set +# CONFIG_INTEL_DDI is not set +CONFIG_INTEL_EDID=y +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +# CONFIG_DRIVER_INTEL_I210 is not set +# CONFIG_DRIVER_MAXIM_MAX77686 is not set +# CONFIG_DRIVER_PARADE_PS8625 is not set +# CONFIG_DRIVER_PARADE_PS8640 is not set +CONFIG_DRIVERS_MC146818=y +# CONFIG_MAINBOARD_HAS_LPC_TPM is not set +# CONFIG_DRIVERS_RICOH_RCE822 is not set +# CONFIG_DRIVERS_SIL_3114 is not set +# CONFIG_DRIVER_TI_TPS65090 is not set +# CONFIG_DRIVERS_TI_TPS65913 is not set +# CONFIG_DRIVERS_TI_TPS65913_RTC is not set # CONFIG_DRIVER_XPOWERS_AXP209 is not set -CONFIG_RTC=y +# CONFIG_RTC is not set # CONFIG_TPM is not set CONFIG_STACK_SIZE=0x1000 CONFIG_MMCONF_SUPPORT_DEFAULT=y @@ -465,7 +482,6 @@ CONFIG_TTYS0_BAUD=115200 # CONFIG_SPKMODEM is not set CONFIG_CONSOLE_USB=y # CONFIG_CONSOLE_NE2K is not set -CONFIG_CONSOLE_CBMEM=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set @@ -477,7 +493,6 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set # CONFIG_CMOS_POST is not set -# CONFIG_CONSOLE_POST is not set CONFIG_POST_DEVICE_NONE=y # CONFIG_POST_DEVICE_LPC is not set # CONFIG_POST_DEVICE_PCI_PCIE is not set @@ -528,8 +543,13 @@ CONFIG_PAYLOAD_FILE="grub.elf" CONFIG_PAYLOAD_OPTIONS="" CONFIG_COMPRESSED_PAYLOAD_LZMA=y # CONFIG_PAYLOAD_IS_FLAT_BINARY is not set + +# +# Secondary Payloads +# # CONFIG_COREINFO_SECONDARY_PAYLOAD is not set # CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set +# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set # # Debugging diff --git a/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/macbook21/reused.list b/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/macbook21/reused.list new file mode 100644 index 00000000..e4a183ed --- /dev/null +++ b/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/macbook21/reused.list @@ -0,0 +1 @@ +/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/x60/0001-i945-Enable-changing-VRAM-size.patch diff --git a/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/t60/reused.list b/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/t60/reused.list index ef0d1097..0522196b 100644 --- a/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/t60/reused.list +++ b/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/t60/reused.list @@ -1 +1,2 @@ /resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/x60/0001-NOTFORMERGE-ec-lenovo-h8-wlan-trackpoint-touchpad-bl.patch +/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/x60/0001-i945-Enable-changing-VRAM-size.patch diff --git a/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/x60/0001-i945-Enable-changing-VRAM-size.patch b/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/x60/0001-i945-Enable-changing-VRAM-size.patch new file mode 100644 index 00000000..d2f943a8 --- /dev/null +++ b/resources/libreboot/patch/coreboot/2a3434757ef425dbdfedf1fc69e1a033a6e7310d/grub/x60/0001-i945-Enable-changing-VRAM-size.patch @@ -0,0 +1,152 @@ +From a378e20a4306990747213288c52571056281f738 Mon Sep 17 00:00:00 2001 +From: Arthur Heymans +Date: Sun, 15 May 2016 02:17:12 +0200 +Subject: [PATCH] i945: Enable changing VRAM size + +On i945 the vram size was the default 8mb. It was also possible +to set it 1mb hardcoding it in early_init.c + +The intel documentation on i945 only mentions those two options. +It was set using 3 bits. The documententation also makes mention +of 4mb, 16mb, 32mb, 64mb but not how to set it. + +Other non documented (straight forward) bit combinations allows +to change the VRAM size to those other states. + +Change-Id: I5e510e81322a4c8315c01b7963ac4b5f7f58a17e +Signed-off-by: Arthur Heymans + +diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig +index 6e8d35b..484ed78 100644 +--- a/src/northbridge/intel/i945/Kconfig ++++ b/src/northbridge/intel/i945/Kconfig +@@ -72,3 +72,56 @@ config CHECK_SLFRCS_ON_RESUME + effectively making it impossible to resume. + + endif ++ ++config VRAM_CHOICE ++ bool ++choice ++ prompt "VRAM Size" ++ depends on NORTHBRIDGE_INTEL_I945 ++ default VRAM_SIZE_8MB ++ help ++ Set the size of vram that the integrated graphic device can use ++ for a framebuffer. ++ ++config VRAM_SIZE_1MB ++ bool "1 MB" ++ help ++ Set VRAM size to 1MB. ++config VRAM_SIZE_4MB ++ bool "4 MB" ++ help ++ Set VRAM size to 4MB. ++config VRAM_SIZE_8MB ++ bool "8 MB" ++ help ++ Set VRAM size to 8MB. ++config VRAM_SIZE_16MB ++ bool "16 MB" ++ help ++ Set VRAM size to 16MB. ++config VRAM_SIZE_32MB ++ bool "32 MB" ++ help ++ Set VRAM size to 32MB. ++config VRAM_SIZE_48MB ++ bool "48 MB" ++ help ++ Set VRAM size to 48MB. ++config VRAM_SIZE_64MB ++ bool "64 MB" ++ help ++ Set VRAM size to 64MB. ++ ++endchoice ++ ++config VRAM_SIZE ++ hex ++ default 0x10 if VRAM_SIZE_1MB ++ default 0x20 if VRAM_SIZE_4MB ++ default 0x30 if VRAM_SIZE_8MB ++ default 0x40 if VRAM_SIZE_16MB ++ default 0x50 if VRAM_SIZE_32MB ++ default 0x60 if VRAM_SIZE_48MB ++ default 0x70 if VRAM_SIZE_64MB ++ help ++ map the vram sizes to an integer. +diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c +index 475e88a..bd062ad 100644 +--- a/src/northbridge/intel/i945/early_init.c ++++ b/src/northbridge/intel/i945/early_init.c +@@ -177,11 +177,8 @@ static void i945_setup_bars(void) + pci_write_config32(PCI_DEV(0, 0x00, 0), DMIBAR, (uintptr_t)DEFAULT_DMIBAR | 1); + pci_write_config32(PCI_DEV(0, 0x00, 0), X60BAR, DEFAULT_X60BAR | 1); + +- /* Hardware default is 8MB UMA. If someone wants to make this a +- * CMOS or compile time option, send a patch. +- * pci_write_config16(PCI_DEV(0, 0x00, 0), GGC, 0x30); +- */ +- ++ /* Sets up VRAM size from the build option VRAM_SIZE */ ++ pci_write_config16(PCI_DEV(0, 0x00, 0), GGC, CONFIG_VRAM_SIZE); + /* Set C0000-FFFFF to access RAM on both reads and writes */ + pci_write_config8(PCI_DEV(0, 0x00, 0), PAM0, 0x30); + pci_write_config8(PCI_DEV(0, 0x00, 0), PAM1, 0x33); +diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c +index df13ef4..a1de89a 100644 +--- a/src/northbridge/intel/i945/gma.c ++++ b/src/northbridge/intel/i945/gma.c +@@ -359,9 +359,21 @@ static int intel_gma_init(struct northbridge_intel_i945_config *conf, + case 1: + uma_size = 1024; + break; ++ case 2: ++ uma_size = 4096; ++ break; + case 3: + uma_size = 8192; + break; ++ case 4: ++ uma_size = 16384; ++ break; ++ case 5: ++ uma_size = 32768; ++ break; ++ case 6: ++ uma_size = 65536; ++ break; + } + + printk(BIOS_DEBUG, "%dM UMA\n", uma_size >> 10); +diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c +index 514f88c..e7d09af 100644 +--- a/src/northbridge/intel/i945/northbridge.c ++++ b/src/northbridge/intel/i945/northbridge.c +@@ -112,9 +112,21 @@ static void pci_domain_set_resources(device_t dev) + case 1: + uma_size = 1024; + break; ++ case 2: ++ uma_size = 4096; ++ break; + case 3: + uma_size = 8192; + break; ++ case 4: ++ uma_size = 16384; ++ break; ++ case 5: ++ uma_size = 32768; ++ break; ++ case 6: ++ uma_size = 65536; ++ break; + } + + printk(BIOS_DEBUG, "%dM UMA\n", uma_size >> 10); +-- +2.8.2 + -- cgit v1.2.3-70-g09d2