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authorAlyssa Rosenzweig <alyssa@rosenzweig.io>2017-05-13 08:33:20 -0700
committerAlyssa Rosenzweig <alyssa@rosenzweig.io>2017-05-13 08:33:20 -0700
commit0474bc55f2d74aa34f4869546d1ad3a51d7a277a (patch)
tree3b4d64027df34df8681d876af0c71333e960e245 /docs/hardware
parentb4dd5438086697f5d49ede374a7d44fe55829bc2 (diff)
downloadlibrebootfr-0474bc55f2d74aa34f4869546d1ad3a51d7a277a.tar.gz
librebootfr-0474bc55f2d74aa34f4869546d1ad3a51d7a277a.zip
Cleanup more pseudo-code
Diffstat (limited to 'docs/hardware')
-rw-r--r--docs/hardware/gm45_remove_me.md45
-rw-r--r--docs/hardware/x200.md9
2 files changed, 36 insertions, 18 deletions
diff --git a/docs/hardware/gm45_remove_me.md b/docs/hardware/gm45_remove_me.md
index 062fe545..31882fb7 100644
--- a/docs/hardware/gm45_remove_me.md
+++ b/docs/hardware/gm45_remove_me.md
@@ -88,15 +88,24 @@ Two new files will be created:
Assuming that your libreboot image is named **libreboot.rom**, copy the
file to where **libreboot.rom** is located and then insert the
descriptor+gbe file into the ROM image.\
-For 16MiB flash chips:\
-\$ **dd if=ich9fdgbe\_16m.bin of=libreboot.rom bs=1 count=12k
-conv=notrunc**\
-For 8MiB flash chips:\
-\$ **dd if=ich9fdgbe\_8m.bin of=libreboot.rom bs=1 count=12k
-conv=notrunc**\
-For 4MiB flash chips:\
-\$ **dd if=ich9fdgbe\_4m.bin of=libreboot.rom bs=1 count=12k
-conv=notrunc**\
+For 16MiB flash chips:
+
+ # dd if=ich9fdgbe\_16m.bin of=libreboot.rom bs=1 count=12k
+conv=notrunc
+
+\
+For 8MiB flash chips:
+
+ # dd if=ich9fdgbe\_8m.bin of=libreboot.rom bs=1 count=12k
+conv=notrunc
+
+\
+For 4MiB flash chips:
+
+ # dd if=ich9fdgbe\_4m.bin of=libreboot.rom bs=1 count=12k
+conv=notrunc
+
+\
Your libreboot.rom image is now ready to be flashed on the system. Refer
back to [../install/\#flashrom](../install/#flashrom) for how to flash
@@ -196,9 +205,12 @@ Intel. Only the Intel NICs need a GbE region in the flash chip.
Assuming that your libreboot image is named **libreboot.rom**, copy the
**deblobbed\_descriptor.bin** file to where **libreboot.rom** is located
-and then run:\
-\$ **dd if=deblobbed\_descriptor.bin of=libreboot.rom bs=1 count=12k
-conv=notrunc**
+and then run:
+
+ # dd if=deblobbed\_descriptor.bin of=libreboot.rom bs=1 count=12k
+conv=notrunc
+
+
Alternatively, if you got a the **deblobbed\_4kdescriptor.bin** file (no
GbE defined), do this: \$ **dd if=deblobbed\_4kdescriptor.bin
@@ -239,9 +251,12 @@ Simply run (with factory.rom in the same directory):
It will generate a 4KiB descriptor file (only the descriptor, no GbE).
Insert that into a factory.rom image (NOTE: do this on a copy of it.
-Keep the original factory.rom stored safely somewhere):\
-\$ **dd if=demefactory\_4kdescriptor.bin of=factory\_nome.rom bs=1
-count=4k conv=notrunc**
+Keep the original factory.rom stored safely somewhere):
+
+ # dd if=demefactory\_4kdescriptor.bin of=factory\_nome.rom bs=1
+count=4k conv=notrunc
+
+
TODO: test this.\
TODO: lenovobios (GM45 thinkpads) still write-protects parts of the
diff --git a/docs/hardware/x200.md b/docs/hardware/x200.md
index c6f9230a..61d80660 100644
--- a/docs/hardware/x200.md
+++ b/docs/hardware/x200.md
@@ -228,9 +228,12 @@ be useful for RAM compatibility info (note: coreboot raminit is
different, so this page might be BS)
pehjota started collecting some steppings for different CPUs on several
-X200 laptops. You can get the CPUID by running:\
-\$ **dmesg | sed -n 's/\^.\* microcode: CPU0
-sig=0x\\(\[\^,\]\*\\),.\*\$/\\1/p'**
+X200 laptops. You can get the CPUID by running:
+
+ # dmesg | sed -n 's/\^.\* microcode: CPU0
+sig=0x\\(\[\^,\]\*\\),.\*\$/\\1/p'
+
+
What pehjota wrote: The laptops that have issues resuming from suspend,
as well as a laptop that (as I mentioned earlier in \#libreboot) won't