Merge with original repo

9 files changed, 66 insertions, 46 deletions

diff --git a/docs/install/bbb_setup.md b/docs/install/bbb_setup.md
index 94cfdc0b..5d684a7f 100644
--- a/docs/install/bbb_setup.md
+++ b/docs/install/bbb_setup.md
@@ -8,6 +8,16 @@ flash chip with the BeagleBone Black, using the
 rev. C was used when creating this guide, but earlier revisions may also
 work.
 
+***NOTE: Use of BeagleBone black is for example purposes only,
+don't buy it unless you want _it_ specifically.*** *There are many ARM
+Single Board Computers (SBC) that are capable of in system programming
+(external flashing) and they perform similarly terrible at that task.
+Common use of devicetrees on those devices allows for configuring them
+in similar way, but not identical, so a bit of own research is required.
+Lastly SBC is an example of self-contained device that is capable of flashing,
+but it's possible to use smaller device like stm32 bluepill
+with another computer to achieve similar result.*
+
 *NOTE: this documentation may be outdated, and discusses configuring
 SPI flashing on the default Debian system that the BBB sometimes comes
 with. If you want an easier time, just use [BBB
@@ -226,7 +236,7 @@ Output:
 
 Verify that the spidev device now exists:
 
-    # ls -al /dev/spid
+    # ls -al /dev/spid*
 
 Output:
 
diff --git a/docs/install/c201.md b/docs/install/c201.md
index 238c0734..fb39196a 100644
--- a/docs/install/c201.md
+++ b/docs/install/c201.md
@@ -155,10 +155,10 @@ to be opened.
 
 The SPI flash is located next to the write protect screw. Its layout is
 indicated in the picture below. Note that it is not necessary to connect
-`WP#` since removing the screw already connects it to ground. Before
-writing to the chip externally, the battery connector has to be
-detached. It is located under the heat spreader, that has to be
-unscrewed from the rest of the case. The battery connector is located on
+`WP#` since after removing the screw it is pulled up weakly to 3v3. Before
+writing to the chip externally, the battery has to be unplugged.
+Battery connector is located under the heat spreader, that has to be
+unscrewed from the rest of the case. It is located on
 the right and has colorful cables, as shown on the picture below.
 
 [![SPI flash
diff --git a/docs/install/index.md b/docs/install/index.md
index f2a70112..b54dca15 100644
--- a/docs/install/index.md
+++ b/docs/install/index.md
@@ -62,10 +62,12 @@ they don't have to build anything from source on their own.
 The ROM images in each archive use the following at the end of the file
 name, if they are built with the GRUB payload: `*_*keymap*_*mode*.rom`
 
-Available `modes`: `vesafb` or `txtmode`. The `vesafb` ROM images
-are recommended, in most cases; `txtmode` ROM images come with
-MemTest86+, which requires text-mode instead of the usual framebuffer
-used by coreboot native graphics initialization.
+Available modes: vesafb or txtmode. The vesafb ROM images are recommended
+for regular use, but when flashing for the first time use txtmode version,
+as it comes with Memtest86+, which requires text-mode instead of the usual
+framebuffer used by coreboot native graphics initialization.
+Machine should be tested with Memtest86+ after each reassembly or changing
+from vendor bios to libreboot due to differences in raminit code.
 
 `keymap` can be one of several keymaps that keyboard supports (there are
 quite a few), which affects the keyboard layout configuration that is
@@ -169,7 +171,7 @@ ASUS KCMA-D8?
 -------------
 
 If you have the proprietary BIOS, you need to flash libreboot
-externally. See [kcma-d8.md](kgpe-d8.md).
+externally. See [kcma-d8.md](kcma-d8.md).
 
 If you already have coreboot or libreboot installed, without write
 protection on the flash chip, then you can do it in software (otherwise,
@@ -244,7 +246,7 @@ Flash chip size
 
 Use this to find out:
 
-    # flashrom -p internal -V
+    # flashrom -p internal
 
 All good?
 ---------
@@ -264,13 +266,13 @@ executables from the libreboot source code archives.
 
 How to update the flash chip contents:
 
-`$ sudo ./flash update `[`yourrom.rom`](#rom)
+`$ sudo ./flash update `[`yourrom.rom`](#rom)
 
 Ocassionally, coreboot changes the name of a given board. If flashrom
 complains about a board mismatch, but you are sure that you chose the
 correct ROM image, then run this alternative command:
 
- `$ sudo ./flash forceupdate `[`yourrom.rom`](#rom)
+ `$ sudo ./flash forceupdate `[`yourrom.rom`](#rom)
 
 You should see `Verifying flash... VERIFIED.` written at the end
 of the flashrom output. *Shut down* after you see this, and then boot
@@ -283,6 +285,8 @@ ThinkPad X60/T60: Initial installation guide (if running the proprietary firmwar
 already have coreboot or libreboot running, then go to
 [\#flashrom](#flashrom) instead!*
 
+*If you can, make sure that RTC battery is not discharged. Discharged RTC battery may lead to brick due to not holding BUC register value*
+
 *If you are flashing a Lenovo ThinkPad T60, be sure to read
 [../hardware/\#supported\_t60\_list](../hardware/#supported_t60_list)*
 
@@ -303,7 +307,7 @@ the flashing script. do this: *
 
 The first half of the procedure is as follows:
 
-`$ sudo ./flash i945lenovo_firstflash `[`yourrom.rom`](#rom)
+`$ sudo ./flash i945lenovo_firstflash `[`yourrom.rom`](#rom)
 
 You should see within the output the following:
 
@@ -324,17 +328,17 @@ Seeing this means that the operation was a *resounding* success!
 See this link for more details:
 <http://thread.gmane.org/gmane.linux.bios.flashrom/575>.
 
-If the above is what you see, then *SHUT DOWN*. Wait a few seconds,
+If the above is what you see, then *SHUT DOWN* (but do not remove power, especially RTC battery). Wait a few seconds,
 and then boot; libreboot is running, but there is a 2nd procedure
 needed (see below).
 
 When you have booted up again, you must also do this:
 
-`$ sudo ./flash i945lenovo_secondflash `[`yourrom.rom`](#rom)
+`$ sudo ./flash i945lenovo_secondflash `[`yourrom.rom`](#rom)
 
 If flashing fails at this stage, try the following:
 
-`$ sudo ./flashrom/i686/flashrom -p internal:laptop=force_I_want_a_brick -w `[`yourrom.rom`](#rom)
+`$ sudo ./flashrom/i686/flashrom -p internal:laptop=force_I_want_a_brick -w `[`yourrom.rom`](#rom)
 
 You should see within the output the following:
 
@@ -370,7 +374,7 @@ with your device.
 
 Use this flashing script, to install libreboot:
 
-`$ sudo ./flash i945apple_firstflash `[`yourrom.rom`](#rom)
+`$ sudo ./flash i945apple_firstflash `[`yourrom.rom`](#rom)
 
 You should also see within the output the following:
 
diff --git a/docs/install/r400_external.md b/docs/install/r400_external.md
index 366896cb..4036c761 100644
--- a/docs/install/r400_external.md
+++ b/docs/install/r400_external.md
@@ -44,9 +44,10 @@ A note about GPUs
 =================
 
 Some models have an Intel GPU, while others have both an ATI and an
-Intel GPU; this is referred to as "switchable graphics". In the *BIOS
-setup* program for lenovobios, you can specify that the system will use
-one or the other (but not both).
+Intel GPU; this is referred to as "Dual Graphics" (previously
+"switchable graphics"). In the *BIOS setup* program for lenovobios,
+you can specify that the system will use one or the other (but not
+both).
 
 Libreboot is known to work on systems with only the Intel GPU, using
 native graphics initialization. On systems with switchable graphics, the
@@ -365,6 +366,7 @@ You should see something like this:
 Now [install GNU+Linux](../gnulinux/).
 
 Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
+Copyright © 2018 Nico Rikken <nico@nicorikken.eu>\
 
 Permission is granted to copy, distribute and/or modify this document
 under the terms of the GNU Free Documentation License Version 1.3 or any later
diff --git a/docs/install/rpi_setup.md b/docs/install/rpi_setup.md
index e74432d4..b083aac9 100644
--- a/docs/install/rpi_setup.md
+++ b/docs/install/rpi_setup.md
@@ -150,7 +150,7 @@ successfully. If not, just flash again.
     Pi](http://scruss.com/blog/2013/02/02/simple-adc-with-the-raspberry-pi/)
 -   [Flashing coreboot on a T60 with a Raspberry Pi -
     the\_unconventional's
-    blog](https://blogs.fsfe.org/the_unconventional/2015/05/08/flashing-coreboot-on-a-t60-with-a-raspberry-pi/)
+    blog](https://web.archive.org/web/20150709043222/http://blogs.fsfe.org:80/the_unconventional/2015/05/08/coreboot-t60-raspberry-pi/)
 -   *Pomona SOIC Clip flashing*
     -   [Arch Linux Wiki - Installing Arch Linux on
         Chromebook](https://wiki.archlinux.org/index.php/Chromebook)
@@ -283,10 +283,10 @@ your PI.
 Power on your Pi, and run the following. Ensure you swap out
 "your\_chip\_name" with the proper name/model of your chip. Check that
 it can be read successfully. If you cannot read the chip and receive an
-error similar to "no EEPROM Detected" or "0x0 Chip detected" then
-you may want to try powering off your PI, and switching the two pins
-which are connected to the IO ports. I.E. Connect pins (clip)8 to (pi)19
-and pins (clip)15 to (pi)21
+error similar to "no EEPROM Detected" then
+you may want to make sure that MISO/MOSI are not swapped around, check
+with multimeter whether voltage is right and that ground is connected
+between "programmer" and target.
 
     pi# cd ~/flashrom
 
diff --git a/docs/install/t500_external.md b/docs/install/t500_external.md
index 37217337..9e114bca 100644
--- a/docs/install/t500_external.md
+++ b/docs/install/t500_external.md
@@ -39,6 +39,9 @@ Quad-core CPUs
 Very likely to be compatible, but requires hardware modification.
 Based on info from German forum post about installing Core Quad CPU on T500 found in coreboot mailing list. Currently work in progress and no guide available.
 
+Q9100 is compatible and confirmed working (after hw mod), as reported by users in the IRC
+channel
+
 - [Coreboot mailing list post](https://mail.coreboot.org/pipermail/coreboot/2016-November/082463.html)
 - [German forum post about install Core Quad on T500](https://thinkpad-forum.de/threads/199129)
 
@@ -359,11 +362,12 @@ Not to be confused with wifi (wifi is fine).
 Memory
 ======
 
-You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs
-(speed/size). Non-matching pairs won't work. You can also install a
+DDR3 SO-DIMM sticks will work at PC3-8500 clock and voltage, so make sure that
+timings of sticks are matched while they operate at its frequency.
+Non-matching pairs won't work. You can also install a
 single module (meaning, one of the slots will be empty) in slot 0.
 
-Make sure that the RAM you buy is the 2Rx8 density.
+Make sure that the RAM you buy has 2Rx8 arrangement when buying 4GiB modules.
 
 [This page](http://www.forum.thinkpads.com/viewtopic.php?p=760721) might
 be useful for RAM compatibility info (note: coreboot raminit is
diff --git a/docs/install/x200_external.md b/docs/install/x200_external.md
index 3ff34501..83a5c23f 100644
--- a/docs/install/x200_external.md
+++ b/docs/install/x200_external.md
@@ -19,7 +19,7 @@ Flash chip size
 
 Run this command on x200 to find out flash chip model and its size:
 
-    # flashrom -p internal -V
+    # flashrom -p internal
 
 The X200S and X200 Tablet will use a WSON-8 flash chip, on the bottom of the
 motherboard (this requires removal of the motherboard). Not all X200S/X200T are
@@ -163,7 +163,9 @@ Now compare the 3 images:
 
     # sha512sum factory*.rom
 
-If the hashes match, then just copy one of them (the factory.rom) to a
+If the hashes match and if hex editor (like `dhex`) shows that
+they have valid contents (eg. it's not filled entirely with `0x00`/`0xFF`),
+then just copy one of them (the factory.rom) to a
 safe place (on a drive connected to another system, not the BBB). This
 is useful for reverse engineering work, if there is a desirable
 behaviour in the original firmware that could be replicated in coreboot
@@ -178,7 +180,7 @@ address to one that is correct for your system.
 
 Now flash it:
 
-    # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V
+    # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom
 
 ![](images/x200/disassembly/0015.jpg)
 
diff --git a/docs/install/x60_unbrick.md b/docs/install/x60_unbrick.md
index 0f215302..d7cb17a8 100644
--- a/docs/install/x60_unbrick.md
+++ b/docs/install/x60_unbrick.md
@@ -20,13 +20,12 @@ two:\
 
 \*Those dd commands should be applied to all newly compiled X60 ROM
 images (the ROM images in libreboot binary archives already have this
-applied!):\
-dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s
-coreboot.rom) - 0x10000\] count=64k\
-dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\]
-count=64k | hexdump\
-dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s
-coreboot.rom) - 0x20000\] count=64k conv=notrunc\
+applied!):
+
+    dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x10000\] count=64k
+    dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\] count=64k | hexdump
+    dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s coreboot.rom) - 0x20000\] count=64k conv=notrunc
+
 (doing this makes the ROM suitable for use when flashing a system that
 still has Lenovo BIOS running, using those instructions:
 <http://www.coreboot.org/Board:lenovo/x60/Installation>.
diff --git a/docs/install/x60tablet_unbrick.md b/docs/install/x60tablet_unbrick.md
index f4baebf4..fe4352bc 100644
--- a/docs/install/x60tablet_unbrick.md
+++ b/docs/install/x60tablet_unbrick.md
@@ -20,13 +20,12 @@ two:\
 
 \*Those dd commands should be applied to all newly compiled X60 ROM
 images (the ROM images in libreboot binary archives already have this
-applied!):\
-dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s
-coreboot.rom) - 0x10000\] count=64k\
-dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\]
-count=64k | hexdump\
-dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s
-coreboot.rom) - 0x20000\] count=64k conv=notrunc\
+applied!):
+
+    dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x10000\] count=64k
+    dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\] count=64k | hexdump
+    dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s coreboot.rom) - 0x20000\] count=64k conv=notrunc
+
 (doing this makes the ROM suitable for use when flashing a system that
 still has Lenovo BIOS running, using those instructions:
 <http://www.coreboot.org/Board:lenovo/x60/Installation>.