New board: ASUS KGPE-D16

coreboot build errors:

In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0:
src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration
 static inline enum cb_err get_option(void *dest, const char *name)
                           ^
In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0:
src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here
 enum cb_err get_option(void *dest, const char *name);

Ping tpearson about this.

Also ping him about the fact that there isn't actually an option to
enable or disable native graphics initialization, but that the option
MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the
Kconfig file. I think this is probably since there isn't even an option
ROM available for the machine, so it's pointless to offer the setting.

1 files changed, 661 insertions, 0 deletions

diff --git a/resources/libreboot/patch/kgpe-d16/0006-drivers-i2c-w83795-Add-full-support-for-fan-control-.patch b/resources/libreboot/patch/kgpe-d16/0006-drivers-i2c-w83795-Add-full-support-for-fan-control-.patch
new file mode 100644
index 00000000..f2f37ecf
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0006-drivers-i2c-w83795-Add-full-support-for-fan-control-.patch
@@ -0,0 +1,661 @@
+From 12a58e8598d572ee4997f0a6670796b5e82d318b Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
+Date: Sat, 5 Sep 2015 17:53:20 -0500
+Subject: [PATCH 006/146] drivers/i2c/w83795: Add full support for fan
+ control, fan monitoring, and voltage monitoring
+
+---
+ src/drivers/i2c/w83795/chip.h   |  146 +++++++++++++++++++
+ src/drivers/i2c/w83795/w83795.c |  301 +++++++++++++++++++++++++++------------
+ src/drivers/i2c/w83795/w83795.h |   50 +++++--
+ 3 files changed, 392 insertions(+), 105 deletions(-)
+ create mode 100644 src/drivers/i2c/w83795/chip.h
+
+diff --git a/src/drivers/i2c/w83795/chip.h b/src/drivers/i2c/w83795/chip.h
+new file mode 100644
+index 0000000..413ea87
+--- /dev/null
++++ b/src/drivers/i2c/w83795/chip.h
+@@ -0,0 +1,146 @@
++/*
++ * This file is part of the coreboot project.
++ *
++ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc.
++ */
++
++struct drivers_i2c_w83795_config {
++	uint8_t fanin_ctl1;
++	uint8_t fanin_ctl2;
++
++	uint8_t temp_ctl1;
++	uint8_t temp_ctl2;
++	uint8_t temp_dtse;
++
++	uint8_t volt_ctl1;
++	uint8_t volt_ctl2;
++
++	uint8_t temp1_fan_select;
++	uint8_t temp2_fan_select;
++	uint8_t temp3_fan_select;
++	uint8_t temp4_fan_select;
++	uint8_t temp5_fan_select;
++	uint8_t temp6_fan_select;
++
++	uint8_t temp1_source_select;
++	uint8_t temp2_source_select;
++	uint8_t temp3_source_select;
++	uint8_t temp4_source_select;
++	uint8_t temp5_source_select;
++	uint8_t temp6_source_select;
++
++	uint32_t vcore1_high_limit_mv;		/* mV */
++	uint32_t vcore1_low_limit_mv;		/* mV */
++	uint32_t vcore2_high_limit_mv;		/* mV */
++	uint32_t vcore2_low_limit_mv;		/* mV */
++	uint32_t vtt_high_limit_mv;		/* mV */
++	uint32_t vtt_low_limit_mv;		/* mV */
++	uint32_t vsen3_high_limit_mv;		/* mV */
++	uint32_t vsen3_low_limit_mv;		/* mV */
++	uint32_t vsen4_high_limit_mv;		/* mV */
++	uint32_t vsen4_low_limit_mv;		/* mV */
++	uint32_t vsen5_high_limit_mv;		/* mV */
++	uint32_t vsen5_low_limit_mv;		/* mV */
++	uint32_t vsen6_high_limit_mv;		/* mV */
++	uint32_t vsen6_low_limit_mv;		/* mV */
++	uint32_t vsen7_high_limit_mv;		/* mV */
++	uint32_t vsen7_low_limit_mv;		/* mV */
++	uint32_t vsen8_high_limit_mv;		/* mV */
++	uint32_t vsen8_low_limit_mv;		/* mV */
++	uint32_t vsen9_high_limit_mv;		/* mV */
++	uint32_t vsen9_low_limit_mv;		/* mV */
++	uint32_t vsen10_high_limit_mv;		/* mV */
++	uint32_t vsen10_low_limit_mv;		/* mV */
++	uint32_t vsen11_high_limit_mv;		/* mV */
++	uint32_t vsen11_low_limit_mv;		/* mV */
++	uint32_t vsen12_high_limit_mv;		/* mV */
++	uint32_t vsen12_low_limit_mv;		/* mV */
++	uint32_t vsen13_high_limit_mv;		/* mV */
++	uint32_t vsen13_low_limit_mv;		/* mV */
++	uint32_t vdd_high_limit_mv;		/* mV */
++	uint32_t vdd_low_limit_mv;		/* mV */
++	uint32_t vsb_high_limit_mv;		/* mV */
++	uint32_t vsb_low_limit_mv;		/* mV */
++	uint32_t vbat_high_limit_mv;		/* mV */
++	uint32_t vbat_low_limit_mv;		/* mV */
++
++	int8_t tr1_critical_temperature;	/* °C */
++	int8_t tr1_critical_hysteresis;		/* °C */
++	int8_t tr1_warning_temperature;		/* °C */
++	int8_t tr1_warning_hysteresis;		/* °C */
++	int8_t tr2_critical_temperature;	/* °C */
++	int8_t tr2_critical_hysteresis;		/* °C */
++	int8_t tr2_warning_temperature;		/* °C */
++	int8_t tr2_warning_hysteresis;		/* °C */
++	int8_t tr3_critical_temperature;	/* °C */
++	int8_t tr3_critical_hysteresis;		/* °C */
++	int8_t tr3_warning_temperature;		/* °C */
++	int8_t tr3_warning_hysteresis;		/* °C */
++	int8_t tr4_critical_temperature;	/* °C */
++	int8_t tr4_critical_hysteresis;		/* °C */
++	int8_t tr4_warning_temperature;		/* °C */
++	int8_t tr4_warning_hysteresis;		/* °C */
++	int8_t tr5_critical_temperature;	/* °C */
++	int8_t tr5_critical_hysteresis;		/* °C */
++	int8_t tr5_warning_temperature;		/* °C */
++	int8_t tr5_warning_hysteresis;		/* °C */
++	int8_t tr6_critical_temperature;	/* °C */
++	int8_t tr6_critical_hysteresis;		/* °C */
++	int8_t tr6_warning_temperature;		/* °C */
++	int8_t tr6_warning_hysteresis;		/* °C */
++	int8_t dts_critical_temperature;	/* °C */
++	int8_t dts_critical_hysteresis;		/* °C */
++	int8_t dts_warning_temperature;		/* °C */
++	int8_t dts_warning_hysteresis;		/* °C */
++
++	int8_t temp1_critical_temperature;	/* °C */
++	int8_t temp2_critical_temperature;	/* °C */
++	int8_t temp3_critical_temperature;	/* °C */
++	int8_t temp4_critical_temperature;	/* °C */
++	int8_t temp5_critical_temperature;	/* °C */
++	int8_t temp6_critical_temperature;	/* °C */
++
++	int8_t temp1_target_temperature;	/* °C */
++	int8_t temp2_target_temperature;	/* °C */
++	int8_t temp3_target_temperature;	/* °C */
++	int8_t temp4_target_temperature;	/* °C */
++	int8_t temp5_target_temperature;	/* °C */
++	int8_t temp6_target_temperature;	/* °C */
++
++	uint8_t fan1_nonstop;			/* % of full speed (0-100) */
++	uint8_t fan2_nonstop;			/* % of full speed (0-100) */
++	uint8_t fan3_nonstop;			/* % of full speed (0-100) */
++	uint8_t fan4_nonstop;			/* % of full speed (0-100) */
++	uint8_t fan5_nonstop;			/* % of full speed (0-100) */
++	uint8_t fan6_nonstop;			/* % of full speed (0-100) */
++	uint8_t fan7_nonstop;			/* % of full speed (0-100) */
++	uint8_t fan8_nonstop;			/* % of full speed (0-100) */
++
++	uint8_t default_speed;			/* % of full speed (0-100) */
++
++	uint8_t fan1_duty;			/* % of full speed (0-100) */
++	uint8_t fan2_duty;			/* % of full speed (0-100) */
++	uint8_t fan3_duty;			/* % of full speed (0-100) */
++	uint8_t fan4_duty;			/* % of full speed (0-100) */
++	uint8_t fan5_duty;			/* % of full speed (0-100) */
++	uint8_t fan6_duty;			/* % of full speed (0-100) */
++	uint8_t fan7_duty;			/* % of full speed (0-100) */
++	uint8_t fan8_duty;			/* % of full speed (0-100) */
++
++	uint8_t smbus_aux;			/* 0 == device located on first SMBUS,
++						 * 1 == device located on auxiliary SMBUS
++						 */
++};
+diff --git a/src/drivers/i2c/w83795/w83795.c b/src/drivers/i2c/w83795/w83795.c
+index 2bbe0be..0e40710 100644
+--- a/src/drivers/i2c/w83795/w83795.c
++++ b/src/drivers/i2c/w83795/w83795.c
+@@ -2,6 +2,7 @@
+  * This file is part of the coreboot project.
+  *
+  * Copyright (C) 2012 Advanced Micro Devices, Inc.
++ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
+  *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+@@ -21,12 +22,19 @@
+ #include <arch/cpu.h>
+ #include <console/console.h>
+ #include <device/device.h>
+-#include "southbridge/amd/cimx/sb700/smbus.h" /*SMBUS_IO_BASE*/
++#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_SB700)
++#  include "southbridge/amd/sb700/smbus.h" /*SMBUS_IO_BASE*/
++#else
++#  include "southbridge/amd/cimx/sb700/smbus.h" /*SMBUS_IO_BASE*/
++#endif
+ #include "w83795.h"
++#include "chip.h"
++
++static uint32_t smbus_io_base;
+ 
+ static int w83795_set_bank(u8 bank)
+ {
+-	return do_smbus_write_byte(SMBUS_IO_BASE, W83795_DEV, W83795_REG_BANKSEL, bank);
++	return do_smbus_write_byte(smbus_io_base, W83795_DEV, W83795_REG_BANKSEL, bank);
+ }
+ 
+ static u8 w83795_read(u16 reg)
+@@ -35,11 +43,11 @@ static u8 w83795_read(u16 reg)
+ 
+ 	ret = w83795_set_bank(reg >> 8);
+ 	if (ret < 0) {
+-		printk(BIOS_DEBUG, "read faild to set bank %x\n", reg >> 8);
++		printk(BIOS_DEBUG, "read failed to set bank %x\n", reg >> 8);
+ 		return -1;
+ 	}
+ 
+-	ret = do_smbus_read_byte(SMBUS_IO_BASE, W83795_DEV, reg & 0xff);
++	ret = do_smbus_read_byte(smbus_io_base, W83795_DEV, reg & 0xff);
+ 	return ret;
+ }
+ 
+@@ -49,18 +57,18 @@ static u8 w83795_write(u16 reg, u8 value)
+ 
+ 	err = w83795_set_bank(reg >> 8);
+ 	if (err < 0) {
+-		printk(BIOS_DEBUG, "write faild to set bank %x\n", reg >> 8);
++		printk(BIOS_DEBUG, "write failed to set bank %x\n", reg >> 8);
+ 		return -1;
+ 	}
+ 
+-	err = do_smbus_write_byte(SMBUS_IO_BASE, W83795_DEV, reg & 0xff, value);
++	err = do_smbus_write_byte(smbus_io_base, W83795_DEV, reg & 0xff, value);
+ 	return err;
+ }
+ 
+ /*
+- * Enable Digital Temperature Sensor
++ * Configure Digital Temperature Sensor
+  */
+-static void w83795_dts_enable(u8 dts_src)
++static void w83795_dts_configure(u8 dts_src)
+ {
+ 	u8 val;
+ 
+@@ -68,45 +76,6 @@ static void w83795_dts_enable(u8 dts_src)
+ 	val = w83795_read(W83795_REG_DTSC);
+ 	val |= (dts_src & 0x01);
+ 	w83795_write(W83795_REG_DTSC, val);
+-
+-	/* DTSE */
+-	val = w83795_read(W83795_REG_DTSE);
+-	val |= 0xFF;
+-	w83795_write(W83795_REG_DTSE, val);
+-
+-	/* store bank3 regs first before enable DTS */
+-
+-	/*
+-	 * TD/TR1-4 thermal diode by default
+-	 *  0x00 Disable
+-	 *  0x01 thermistors on motherboard
+-	 *  0x10 different mode voltage
+-	 *  0x11 CPU internal thermal diode output
+-	 *
+-	 * TR5-6 thermistors by default  TRn
+-	 */
+-	val = 0x55; /* thermal diode */
+-	w83795_write(W83795_REG_TEMP_CTRL2, val);
+-
+-	/* Enable Digital Temperature Sensor */
+-	val = w83795_read(W83795_REG_TEMP_CTRL1);
+-	val |= W83795_REG_TEMP_CTRL1_EN_DTS; /* EN_DTS */
+-	w83795_write(W83795_REG_TEMP_CTRL1, val);
+-}
+-
+-static void w83795_set_tfmr(w83795_fan_mode_t mode)
+-{
+-	u8 val;
+-	u8 i;
+-
+-	if ((mode == SMART_FAN_MODE) || (mode == THERMAL_CRUISE_MODE)) {
+-		val = 0xFF;
+-	} else {
+-		val = 0x00;
+-	}
+-
+-	for (i = 0; i < 6; i++)
+-		w83795_write(W83795_REG_TFMR(i), val);
+ }
+ 
+ static u32 w83795_set_fan_mode(w83795_fan_mode_t mode)
+@@ -131,40 +100,12 @@ static u32 w83795_set_fan_mode(w83795_fan_mode_t mode)
+ 	return 0;
+ }
+ 
+-static void w83795_set_tss(void)
+-{
+-	u8 val;
+-
+-	val = 0x00;
+-	w83795_write(W83795_REG_TSS(0), val); /* Temp1, 2 */
+-	w83795_write(W83795_REG_TSS(1), val); /* Temp3, 4 */
+-	w83795_write(W83795_REG_TSS(2), val); /* Temp5, 6 */
+-}
+-
+ static void w83795_set_fan(w83795_fan_mode_t mode)
+ {
+-	u8 i;
+-
+-	/* select temperature sensor (TSS)*/
+-	w83795_set_tss();
+-
+-	/* select Temperature to Fan mapping Relationships (TFMR)*/
+-	w83795_set_tfmr(mode);
+-
+ 	/* set fan output controlled mode (FCMS)*/
+ 	w83795_set_fan_mode(mode);
+ 
+-	/* Set Critical Temperature to Full Speed all fan (CTFS) */
+-	for (i = 0; i < 6; i++) {
+-		w83795_write(W83795_REG_CTFS(i), 0x50); /* default 80 celsius degree */
+-	}
+-
+-	if (mode == THERMAL_CRUISE_MODE) {
+-		/* Set Target Temperature of Temperature Inputs (TTTI) */
+-		for (i = 0; i < 6; i++) {
+-			w83795_write(W83795_REG_TTTI(i), 0x28); /* default 40 celsius degree */
+-		}
+-	} else if (mode == SMART_FAN_MODE) {
++	if (mode == SMART_FAN_MODE) {
+ 		/* Set the Relative Register-at SMART FAN IV Control Mode Table */
+ 		//SFIV TODO
+ 	}
+@@ -173,12 +114,45 @@ static void w83795_set_fan(w83795_fan_mode_t mode)
+ 	//TODO
+ }
+ 
+-static void w83795_init(w83795_fan_mode_t mode, u8 dts_src)
++static uint8_t fan_pct_to_cfg_val(uint8_t percent)
+ {
+-	u8 i;
+-	u8 val;
++	uint16_t cfg = (((unsigned int)percent * 10000) / 3922);
++	if (cfg > 0xff)
++		cfg = 0xff;
++	return cfg;
++}
++
++static uint8_t millivolts_to_limit_value_type1(int millivolts)
++{
++	/* Datasheet v1.41 page 44 (VSEN1 - VSEN13, VTT) */
++	return ((millivolts / 2) >> 2);
++}
++
++static uint8_t millivolts_to_limit_value_type2(int millivolts)
++{
++	/* Datasheet v1.41 page 44 (3VSB, 3VDD, VBAT) */
++	return ((millivolts / 6) >> 2);
++}
++
++static uint16_t millivolts_to_limit_value_type3(int millivolts)
++{
++	/* Datasheet v1.41 page 44 (VDSEN14 - VDSEN17) */
++	return (millivolts / 2);
++}
++
++static void w83795_init(struct device *dev, w83795_fan_mode_t mode, u8 dts_src)
++{
++	struct drivers_i2c_w83795_config *config = dev->chip_info;
++	uint8_t i;
++	uint8_t val;
++	uint16_t limit_value;
++
++	if (config->smbus_aux)
++		smbus_io_base = SMBUS_AUX_IO_BASE;
++	else
++		smbus_io_base = SMBUS_IO_BASE;
+ 
+-	if (do_smbus_read_byte(SMBUS_IO_BASE, W83795_DEV, 0x00) < 0) {
++	if (do_smbus_read_byte(smbus_io_base, W83795_DEV, 0x00) < 0) {
+ 		printk(BIOS_ERR, "W83795G/ADG Nuvoton H/W Monitor not found\n");
+ 		return;
+ 	}
+@@ -192,18 +166,156 @@ static void w83795_init(w83795_fan_mode_t mode, u8 dts_src)
+ 	val |= W83795_REG_CONFIG_INIT;
+ 	w83795_write(W83795_REG_CONFIG, val);
+ 
+-	/* Fan monitoring setting */
+-	val = 0xFF; /* FAN1-FAN8 */
+-	w83795_write(W83795_REG_FANIN_CTRL1, val);
+-	val = 0x3F; /* FAN9-FAN14 */
+-	w83795_write(W83795_REG_FANIN_CTRL2, val);
++	/* Fan monitor settings */
++	w83795_write(W83795_REG_FANIN_CTRL1, config->fanin_ctl1);
++	w83795_write(W83795_REG_FANIN_CTRL2, config->fanin_ctl2);
++
++	/* Temperature thresholds */
++	w83795_write(W83795_REG_TEMP_CRIT(0), config->tr1_critical_temperature);
++	w83795_write(W83795_REG_TEMP_CRIT_HYSTER(0), config->tr1_critical_hysteresis);
++	w83795_write(W83795_REG_TEMP_WARN(0), config->tr1_warning_temperature);
++	w83795_write(W83795_REG_TEMP_WARN_HYSTER(0), config->tr1_warning_hysteresis);
++	w83795_write(W83795_REG_TEMP_CRIT(1), config->tr2_critical_temperature);
++	w83795_write(W83795_REG_TEMP_CRIT_HYSTER(1), config->tr2_critical_hysteresis);
++	w83795_write(W83795_REG_TEMP_WARN(1), config->tr2_warning_temperature);
++	w83795_write(W83795_REG_TEMP_WARN_HYSTER(1), config->tr2_warning_hysteresis);
++	w83795_write(W83795_REG_TEMP_CRIT(2), config->tr3_critical_temperature);
++	w83795_write(W83795_REG_TEMP_CRIT_HYSTER(2), config->tr3_critical_hysteresis);
++	w83795_write(W83795_REG_TEMP_WARN(2), config->tr3_warning_temperature);
++	w83795_write(W83795_REG_TEMP_WARN_HYSTER(2), config->tr3_warning_hysteresis);
++	w83795_write(W83795_REG_TEMP_CRIT(3), config->tr4_critical_temperature);
++	w83795_write(W83795_REG_TEMP_CRIT_HYSTER(3), config->tr4_critical_hysteresis);
++	w83795_write(W83795_REG_TEMP_WARN(3), config->tr4_warning_temperature);
++	w83795_write(W83795_REG_TEMP_WARN_HYSTER(3), config->tr4_warning_hysteresis);
++	w83795_write(W83795_REG_TEMP_CRIT(4), config->tr5_critical_temperature);
++	w83795_write(W83795_REG_TEMP_CRIT_HYSTER(4), config->tr5_critical_hysteresis);
++	w83795_write(W83795_REG_TEMP_WARN(4), config->tr5_warning_temperature);
++	w83795_write(W83795_REG_TEMP_WARN_HYSTER(4), config->tr5_warning_hysteresis);
++	w83795_write(W83795_REG_TEMP_CRIT(5), config->tr6_critical_temperature);
++	w83795_write(W83795_REG_TEMP_CRIT_HYSTER(5), config->tr6_critical_hysteresis);
++	w83795_write(W83795_REG_TEMP_WARN(5), config->tr6_warning_temperature);
++	w83795_write(W83795_REG_TEMP_WARN_HYSTER(5), config->tr6_warning_hysteresis);
++
++	/* DTS enable */
++	w83795_write(W83795_REG_DTSE, config->temp_dtse);
++
++	/* DTS temperature thresholds */
++	w83795_write(W83795_REG_DTS_CRIT, config->dts_critical_temperature);
++	w83795_write(W83795_REG_DTS_CRIT_HYSTER, config->dts_critical_hysteresis);
++	w83795_write(W83795_REG_DTS_WARN, config->dts_warning_temperature);
++	w83795_write(W83795_REG_DTS_WARN_HYSTER, config->dts_warning_hysteresis);
++
++	/* Configure DTS registers in bank3 before enabling DTS */
++	w83795_dts_configure(dts_src);
++
++	/* Temperature monitor settings */
++	w83795_write(W83795_REG_TEMP_CTRL1, config->temp_ctl1);
++	w83795_write(W83795_REG_TEMP_CTRL2, config->temp_ctl2);
++
++	/* Temperature to fan mappings */
++	w83795_write(W83795_REG_TFMR(0), config->temp1_fan_select);
++	w83795_write(W83795_REG_TFMR(1), config->temp2_fan_select);
++	w83795_write(W83795_REG_TFMR(2), config->temp3_fan_select);
++	w83795_write(W83795_REG_TFMR(3), config->temp4_fan_select);
++	w83795_write(W83795_REG_TFMR(4), config->temp5_fan_select);
++	w83795_write(W83795_REG_TFMR(5), config->temp6_fan_select);
++
++	/* Temperature data source to temperature mappings */
++	w83795_write(W83795_REG_T12TSS, ((config->temp2_source_select & 0xff) << 8) | (config->temp1_source_select & 0xff));
++	w83795_write(W83795_REG_T34TSS, ((config->temp4_source_select & 0xff) << 8) | (config->temp3_source_select & 0xff));
++	w83795_write(W83795_REG_T56TSS, ((config->temp6_source_select & 0xff) << 8) | (config->temp5_source_select & 0xff));
+ 
+-	/* enable monitoring operations */
+-	val = w83795_read(W83795_REG_CONFIG);
+-	val |= W83795_REG_CONFIG_START;
+-	w83795_write(W83795_REG_CONFIG, val);
++	/* Set Critical Temperature to Full Speed all fan (CTFS) */
++	w83795_write(W83795_REG_CTFS(0), config->temp1_critical_temperature);
++	w83795_write(W83795_REG_CTFS(1), config->temp2_critical_temperature);
++	w83795_write(W83795_REG_CTFS(2), config->temp3_critical_temperature);
++	w83795_write(W83795_REG_CTFS(3), config->temp4_critical_temperature);
++	w83795_write(W83795_REG_CTFS(4), config->temp5_critical_temperature);
++	w83795_write(W83795_REG_CTFS(5), config->temp6_critical_temperature);
++
++	/* Set fan control target temperatures */
++	w83795_write(W83795_REG_TTTI(0), config->temp1_target_temperature);
++	w83795_write(W83795_REG_TTTI(1), config->temp2_target_temperature);
++	w83795_write(W83795_REG_TTTI(2), config->temp3_target_temperature);
++	w83795_write(W83795_REG_TTTI(3), config->temp4_target_temperature);
++	w83795_write(W83795_REG_TTTI(4), config->temp5_target_temperature);
++	w83795_write(W83795_REG_TTTI(5), config->temp6_target_temperature);
++
++	/* Set fan stall prevention parameters */
++	w83795_write(W83795_REG_FAN_NONSTOP(0), config->fan1_nonstop);
++	w83795_write(W83795_REG_FAN_NONSTOP(1), config->fan2_nonstop);
++	w83795_write(W83795_REG_FAN_NONSTOP(2), config->fan3_nonstop);
++	w83795_write(W83795_REG_FAN_NONSTOP(3), config->fan4_nonstop);
++	w83795_write(W83795_REG_FAN_NONSTOP(4), config->fan5_nonstop);
++	w83795_write(W83795_REG_FAN_NONSTOP(5), config->fan6_nonstop);
++	w83795_write(W83795_REG_FAN_NONSTOP(6), config->fan7_nonstop);
++	w83795_write(W83795_REG_FAN_NONSTOP(7), config->fan8_nonstop);
++
++	/* Set fan default speed */
++	w83795_write(W83795_REG_DFSP, fan_pct_to_cfg_val(config->default_speed));
++
++	/* Set initial fan speeds */
++	w83795_write(W83795_REG_FAN_MANUAL_SPEED(0), fan_pct_to_cfg_val(config->fan1_duty));
++	w83795_write(W83795_REG_FAN_MANUAL_SPEED(1), fan_pct_to_cfg_val(config->fan2_duty));
++	w83795_write(W83795_REG_FAN_MANUAL_SPEED(2), fan_pct_to_cfg_val(config->fan3_duty));
++	w83795_write(W83795_REG_FAN_MANUAL_SPEED(3), fan_pct_to_cfg_val(config->fan4_duty));
++	w83795_write(W83795_REG_FAN_MANUAL_SPEED(4), fan_pct_to_cfg_val(config->fan5_duty));
++	w83795_write(W83795_REG_FAN_MANUAL_SPEED(5), fan_pct_to_cfg_val(config->fan6_duty));
++	w83795_write(W83795_REG_FAN_MANUAL_SPEED(6), fan_pct_to_cfg_val(config->fan7_duty));
++	w83795_write(W83795_REG_FAN_MANUAL_SPEED(7), fan_pct_to_cfg_val(config->fan8_duty));
++
++	/* Voltage monitor settings */
++	w83795_write(W83795_REG_VOLT_CTRL1, config->volt_ctl1);
++	w83795_write(W83795_REG_VOLT_CTRL2, config->volt_ctl2);
++
++	/* Voltage high/low limits */
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(0), millivolts_to_limit_value_type1(config->vcore1_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(0), millivolts_to_limit_value_type1(config->vcore1_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(1), millivolts_to_limit_value_type1(config->vcore2_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(1), millivolts_to_limit_value_type1(config->vcore2_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(2), millivolts_to_limit_value_type1(config->vsen3_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(2), millivolts_to_limit_value_type1(config->vsen3_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(3), millivolts_to_limit_value_type1(config->vsen4_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(3), millivolts_to_limit_value_type1(config->vsen4_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(4), millivolts_to_limit_value_type1(config->vsen5_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(4), millivolts_to_limit_value_type1(config->vsen5_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(5), millivolts_to_limit_value_type1(config->vsen6_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(5), millivolts_to_limit_value_type1(config->vsen6_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(6), millivolts_to_limit_value_type1(config->vsen7_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(6), millivolts_to_limit_value_type1(config->vsen7_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(7), millivolts_to_limit_value_type1(config->vsen8_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(7), millivolts_to_limit_value_type1(config->vsen8_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(8), millivolts_to_limit_value_type1(config->vsen9_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(8), millivolts_to_limit_value_type1(config->vsen9_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(9), millivolts_to_limit_value_type1(config->vsen10_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(9), millivolts_to_limit_value_type1(config->vsen10_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(10), millivolts_to_limit_value_type1(config->vsen11_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(10), millivolts_to_limit_value_type1(config->vsen11_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(11), millivolts_to_limit_value_type1(config->vtt_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(11), millivolts_to_limit_value_type1(config->vtt_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(12), millivolts_to_limit_value_type2(config->vdd_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(12), millivolts_to_limit_value_type2(config->vdd_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(13), millivolts_to_limit_value_type2(config->vsb_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(13), millivolts_to_limit_value_type2(config->vsb_low_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_HIGH(14), millivolts_to_limit_value_type2(config->vbat_high_limit_mv));
++	w83795_write(W83795_REG_VOLT_LIM_LOW(14), millivolts_to_limit_value_type2(config->vbat_low_limit_mv));
++
++	/* VSEN12 limits */
++	limit_value = millivolts_to_limit_value_type3(config->vsen12_high_limit_mv);
++	w83795_write(W83795_REG_VOLT_LIM_HIGH_2_M(4), limit_value >> 2);
++	w83795_write(W83795_REG_VOLT_LIM_HIGH_2_L(4), limit_value & 0x3);
++	limit_value = millivolts_to_limit_value_type3(config->vsen12_low_limit_mv);
++	w83795_write(W83795_REG_VOLT_LIM_LOW_2_M(4), limit_value >> 2);
++	w83795_write(W83795_REG_VOLT_LIM_LOW_2_L(4), limit_value & 0x3);
++
++	/* VSEN13 limits */
++	limit_value = millivolts_to_limit_value_type3(config->vsen13_high_limit_mv);
++	w83795_write(W83795_REG_VOLT_LIM_HIGH_2_M(5), limit_value >> 2);
++	w83795_write(W83795_REG_VOLT_LIM_HIGH_2_L(5), limit_value & 0x3);
++	limit_value = millivolts_to_limit_value_type3(config->vsen13_low_limit_mv);
++	w83795_write(W83795_REG_VOLT_LIM_LOW_2_M(5), limit_value >> 2);
++	w83795_write(W83795_REG_VOLT_LIM_LOW_2_L(5), limit_value & 0x3);
+ 
+-	w83795_dts_enable(dts_src);
+ 	w83795_set_fan(mode);
+ 
+ 	printk(BIOS_INFO, "Fan   CTFS(celsius)  TTTI(celsius)\n");
+@@ -219,6 +331,11 @@ static void w83795_init(w83795_fan_mode_t mode, u8 dts_src)
+ 		val = w83795_read(W83795_REG_DTS(i));
+ 		printk(BIOS_DEBUG, "DTS%x ReadOut=%x\n", i, val);
+ 	}
++
++	/* start monitoring operation */
++	val = w83795_read(W83795_REG_CONFIG);
++	val |= W83795_REG_CONFIG_START;
++	w83795_write(W83795_REG_CONFIG, val);
+ }
+ 
+ static void w83795_hwm_init(struct device *dev)
+@@ -232,9 +349,9 @@ static void w83795_hwm_init(struct device *dev)
+ 		die("CPU: missing cpu device structure");
+ 
+ 	if (cpu->vendor == X86_VENDOR_AMD)
+-		w83795_init(THERMAL_CRUISE_MODE, DTS_SRC_AMD_SBTSI);
++		w83795_init(dev, THERMAL_CRUISE_MODE, DTS_SRC_AMD_SBTSI);
+ 	else if (cpu->vendor == X86_VENDOR_INTEL)
+-		w83795_init(THERMAL_CRUISE_MODE, DTS_SRC_INTEL_PECI);
++		w83795_init(dev, THERMAL_CRUISE_MODE, DTS_SRC_INTEL_PECI);
+ 	else
+ 		printk(BIOS_ERR, "Neither AMD nor INTEL CPU detected\n");
+ }
+diff --git a/src/drivers/i2c/w83795/w83795.h b/src/drivers/i2c/w83795/w83795.h
+index cac4d5f..59fa273 100644
+--- a/src/drivers/i2c/w83795/w83795.h
++++ b/src/drivers/i2c/w83795/w83795.h
+@@ -2,6 +2,7 @@
+  * This file is part of the coreboot project.
+  *
+  * Copyright (C) 2012 Advanced Micro Devices, Inc.
++ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
+  *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+@@ -29,6 +30,8 @@
+ #define W83795_REG_CONFIG_CONFIG48	0x04
+ #define W83795_REG_CONFIG_INIT		0x80
+ 
++#define W83795_REG_VOLT_CTRL1		0x02
++#define W83795_REG_VOLT_CTRL2		0x03
+ #define W83795_REG_TEMP_CTRL1		0x04 /* Temperature Monitoring Control Register */
+ #define W83795_REG_TEMP_CTRL2		0x05 /* Temperature Monitoring Control Register */
+ #define W83795_REG_FANIN_CTRL1		0x06
+@@ -37,37 +40,58 @@
+ #define DTS_SRC_INTEL_PECI		(0 << 0)
+ #define DTS_SRC_AMD_SBTSI		(1 << 0)
+ 
+-#define W83795_REG_TSS(n)		(0x209 + (n)) /* Temperature Source Selection Register */
+ #define W83795_REG_TTTI(n)		(0x260 + (n)) /* Target temperature W83795G/ADG will try to tune the fan output to keep */
+ #define W83795_REG_CTFS(n)		(0x268 + (n)) /* Critical Temperature to Full Speed all fan */
+-#define W83795_REG_HT(n)		(0x270 + (n)) /* Hysteresis of Temperature */
+ #define W83795_REG_DTSC			0x301 /* Digital Temperature Sensor Configuration */
+ 
+ #define W83795_REG_DTSE			0x302 /* Digital Temperature Sensor Enable */
+ #define W83795_REG_DTS(n)		(0x26 + (n))
+ #define W83795_REG_VRLSB		0x3C
+ 
+-#define W83795_TEMP_REG_TR1		0x21
+-#define W83795_TEMP_REG_TR2		0x22
+-#define W83795_TEMP_REG_TR3		0x23
+-#define W83795_TEMP_REG_TR4		0x24
+-#define W83795_TEMP_REG_TR5		0x1F
+-#define W83795_TEMP_REG_TR6		0x20
++#define W83795_REG_TEMP_TR1		0x21
++#define W83795_REG_TEMP_TR2		0x22
++#define W83795_REG_TEMP_TR3		0x23
++#define W83795_REG_TEMP_TR4		0x24
++#define W83795_REG_TEMP_TR5		0x1F
++#define W83795_REG_TEMP_TR6		0x20
++
++#define W83795_REG_VOLT_LIM_HIGH(n)	(0x70 + (n * 2))	/* Voltage high limit (0 == VSEN1) */
++#define W83795_REG_VOLT_LIM_LOW(n)	(0x71 + (n * 2))	/* Voltage low limit (0 == VSEN1) */
++#define W83795_REG_VOLT_LIM_HIGH_2_M(n)	(0x96 + (n * 4))	/* Voltage high limit MSB (0 == VDSEN14) */
++#define W83795_REG_VOLT_LIM_LOW_2_M(n)	(0x97 + (n * 4))	/* Voltage low limit MSB (0 == VDSEN14)  */
++#define W83795_REG_VOLT_LIM_HIGH_2_L(n)	(0x98 + (n * 4))	/* Voltage high limit LSB (0 == VDSEN14) */
++#define W83795_REG_VOLT_LIM_LOW_2_L(n)	(0x99 + (n * 4))	/* Voltage low limit LSB (0 == VDSEN14)  */
++
++#define W83795_REG_TEMP_CRIT(n)		(0x96 + (n * 4))	/* Temperature critical limit */
++#define W83795_REG_TEMP_CRIT_HYSTER(n)	(0x97 + (n * 4))	/* Temperature critical limit hysteresis */
++#define W83795_REG_TEMP_WARN(n)		(0x98 + (n * 4))	/* Temperature warning limit */
++#define W83795_REG_TEMP_WARN_HYSTER(n)	(0x99 + (n * 4))	/* Temperature warning limit hysteresis */
++
++#define W83795_REG_DTS_CRIT		0xB2			/* Temperature critical limit */
++#define W83795_REG_DTS_CRIT_HYSTER	0xB3			/* Temperature critical limit hysteresis */
++#define W83795_REG_DTS_WARN		0xB4			/* Temperature warning limit */
++#define W83795_REG_DTS_WARN_HYSTER	0xB5			/* Temperature warning limit hysteresis */
+ 
+ #define W83795_REG_FCMS1		0x201
+ #define W83795_REG_FCMS2		0x208
+-#define W83795_REG_TFMR(n)		(0x202 + (n)) /*temperature to fam mappig*/
++#define W83795_REG_TFMR(n)		(0x202 + (n))		/* Temperature to fan mapping */
++#define W83795_REG_T12TSS		0x209			/* Temperature Source Selection Register 1 */
++#define W83795_REG_T34TSS		0x20A			/* Temperature Source Selection Register 2 */
++#define W83795_REG_T56TSS		0x20B			/* Temperature Source Selection Register 3 */
++#define W83795_REG_FAN_MANUAL_SPEED(n)	(0x210 + n)
+ #define W83795_REG_DFSP			0x20C
+ 
++#define W83795_REG_FAN_NONSTOP(n)	(0x228 + (n))	/* Fan Nonstop Value */
++
+ #define W83795_REG_FTSH(n)		(0x240 + (n) * 2)
+ #define W83795_REG_FTSL(n)		(0x241 + (n) * 2)
+ #define W83795_REG_TFTS			0x250
+ 
+ typedef enum w83795_fan_mode {
+-	SPEED_CRUISE_MODE,	///< Fan Speed Cruise mode keeps the fan speed in a specified range
+-	THERMAL_CRUISE_MODE,	///< Thermal Cruise mode is an algorithm to control the fan speed to keep the temperature source around the TTTI
+-	SMART_FAN_MODE,		///< Smart Fan mode offers 6 slopes to control the fan speed
+-	MANUAL_MODE,		///< control manually
++	SPEED_CRUISE_MODE = 0,		///< Fan Speed Cruise mode keeps the fan speed in a specified range
++	THERMAL_CRUISE_MODE = 1,	///< Thermal Cruise mode is an algorithm to control the fan speed to keep the temperature source around the TTTI
++	SMART_FAN_MODE = 2,		///< Smart Fan mode offers 6 slopes to control the fan speed
++	MANUAL_MODE = 3,		///< control manually
+ } w83795_fan_mode_t;
+ 
+ #endif
+-- 
+1.7.9.5
+