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authorFrancis Rowe <info@gluglug.org.uk>2015-10-17 16:10:53 +0100
committerFrancis Rowe <info@gluglug.org.uk>2015-10-17 19:07:35 +0100
commit5999dba5f71f1c05040a551d2420ab8c7f3a9da4 (patch)
tree7313b1996a247bf938417d5cf2496f5f6625c0db /resources/libreboot/patch/kgpe-d16/0044-amd-amdmct-mct_ddr3-Improve-SPD-DIMM-detect-reliabil.patch
parent4d909153e79661e54999e51693668f6d1ecc1cca (diff)
downloadlibrebootfr-5999dba5f71f1c05040a551d2420ab8c7f3a9da4.tar.gz
librebootfr-5999dba5f71f1c05040a551d2420ab8c7f3a9da4.zip
New board: ASUS KGPE-D16
coreboot build errors: In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0: src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration static inline enum cb_err get_option(void *dest, const char *name) ^ In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0: src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here enum cb_err get_option(void *dest, const char *name); Ping tpearson about this. Also ping him about the fact that there isn't actually an option to enable or disable native graphics initialization, but that the option MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the Kconfig file. I think this is probably since there isn't even an option ROM available for the machine, so it's pointless to offer the setting.
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0044-amd-amdmct-mct_ddr3-Improve-SPD-DIMM-detect-reliabil.patch')
-rw-r--r--resources/libreboot/patch/kgpe-d16/0044-amd-amdmct-mct_ddr3-Improve-SPD-DIMM-detect-reliabil.patch47
1 files changed, 47 insertions, 0 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0044-amd-amdmct-mct_ddr3-Improve-SPD-DIMM-detect-reliabil.patch b/resources/libreboot/patch/kgpe-d16/0044-amd-amdmct-mct_ddr3-Improve-SPD-DIMM-detect-reliabil.patch
new file mode 100644
index 00000000..4b38efd1
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0044-amd-amdmct-mct_ddr3-Improve-SPD-DIMM-detect-reliabil.patch
@@ -0,0 +1,47 @@
+From a1a3d844b273e794df56059cb15c9d22fc5fd087 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
+Date: Thu, 4 Jun 2015 00:10:03 -0500
+Subject: [PATCH 044/146] amd/amdmct/mct_ddr3: Improve SPD DIMM detect
+ reliability
+
+---
+ src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+index b79b6c9..771d743 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+@@ -3654,6 +3654,7 @@ static u8 DIMMPresence_D(struct MCTStatStruc *pMCTstat,
+ u8 devwidth;
+ u16 DimmSlots;
+ u8 byte = 0, bytex;
++ uint8_t crc_status;
+
+ /* preload data structure with addrs */
+ mctGet_DIMMAddr(pDCTstat, pDCTstat->Node_ID);
+@@ -3674,10 +3675,20 @@ static u8 DIMMPresence_D(struct MCTStatStruc *pMCTstat,
+ int status;
+ smbaddr = Get_DIMMAddress_D(pDCTstat, i);
+ status = mctRead_SPD(smbaddr, SPD_ByteUse);
++ if (status >= 0) {
++ /* Verify result */
++ status = mctRead_SPD(smbaddr, SPD_ByteUse);
++ }
+ if (status >= 0) { /* SPD access is ok */
+ pDCTstat->DIMMPresent |= 1 << i;
+ read_spd_bytes(pMCTstat, pDCTstat, i);
+- if (crcCheck(pDCTstat, i)) { /* CRC is OK */
++ crc_status = crcCheck(pDCTstat, i);
++ if (!crc_status) {
++ /* Try again in case there was a transient glitch */
++ read_spd_bytes(pMCTstat, pDCTstat, i);
++ crc_status = crcCheck(pDCTstat, i);
++ }
++ if (crc_status) { /* CRC is OK */
+ byte = pDCTstat->spd_data.spd_bytes[i][SPD_TYPE];
+ if (byte == JED_DDR3SDRAM) {
+ /*Dimm is 'Present'*/
+--
+1.7.9.5
+