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-rw-r--r--docs/hcl/c201.md3
-rw-r--r--docs/hcl/d510mo.md3
-rw-r--r--docs/hcl/d945gclf.md63
-rw-r--r--docs/hcl/ga-g41m-es2l.md6
-rw-r--r--docs/hcl/gm45_remove_me.md54
-rw-r--r--docs/hcl/imac52.md3
-rw-r--r--docs/hcl/index.md24
-rw-r--r--docs/hcl/kcma-d8.md3
-rw-r--r--docs/hcl/kfsn4-dre.md3
-rw-r--r--docs/hcl/kgpe-d16.md3
-rw-r--r--docs/hcl/r400.md3
-rw-r--r--docs/hcl/t400.md3
-rw-r--r--docs/hcl/t500.md6
-rw-r--r--docs/hcl/x200.md9
14 files changed, 124 insertions, 62 deletions
diff --git a/docs/hcl/c201.md b/docs/hcl/c201.md
index 3d4aae4f..a1824b28 100644
--- a/docs/hcl/c201.md
+++ b/docs/hcl/c201.md
@@ -205,7 +205,8 @@ is such a stupidly simple idea, which all designs should implement.
-Copyright © 2015 Leah Rowe <info@minifree.org>\
+Copyright © 2015 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/d510mo.md b/docs/hcl/d510mo.md
index f8d950d7..7e68b727 100644
--- a/docs/hcl/d510mo.md
+++ b/docs/hcl/d510mo.md
@@ -15,7 +15,8 @@ Flashing instructions can be found at
-Copyright © 2016 Leah Rowe <info@minifree.org>\
+Copyright © 2016 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/d945gclf.md b/docs/hcl/d945gclf.md
index a537996c..3f538722 100644
--- a/docs/hcl/d945gclf.md
+++ b/docs/hcl/d945gclf.md
@@ -39,11 +39,16 @@ Remarks about vendor bios:
flashing to install libreboot on this device. Once libreboot is
flashed there is no problem to update the firmware internally
-Here is an image of the board:\
-![](../images/d945gclf/d945gclf.jpg)\
-Here is an image of the D945GCLF2 board:\
-![](../images/d945gclf/20160923_141521.jpg){width="80%" height="80%"}\
-And SPI SOIC8 flash chip\
+Here is an image of the board:
+
+![](../images/d945gclf/d945gclf.jpg)
+
+Here is an image of the D945GCLF2 board:
+
+![](../images/d945gclf/20160923_141521.jpg){width="80%" height="80%"}
+
+And SPI SOIC8 flash chip
+
![](../images/d945gclf/20160923_141550.jpg){width="50%" height="50%"}
@@ -53,33 +58,49 @@ How to replace thermal paste and fan
This board comes with very crappy disposable loud fan, that one has no
bearings, which can not be repaired or oiled properly, do not waste your
-time trying to fix it, just buy one chinese same size fan\
+time trying to fix it, just buy one chinese same size fan
+
![](../images/d945gclf/20160923_141620.jpg){width="50%" height="50%"}
-![](../images/d945gclf/20160923_141614.jpg){width="50%" height="50%"}\
-Make sure that new one has same wiring\
-![](../images/d945gclf/20160923_142618.jpg){width="50%" height="50%"}\
-This is a new one, with bearing and maintenable\
+![](../images/d945gclf/20160923_141614.jpg){width="50%" height="50%"}
+
+Make sure that new one has same wiring
+
+![](../images/d945gclf/20160923_142618.jpg){width="50%" height="50%"}
+
+This is a new one, with bearing and maintenable
+
![](../images/d945gclf/20160923_141738.jpg){width="50%" height="50%"}
-![](../images/d945gclf/20160923_141814.jpg){width="50%" height="50%"}\
+![](../images/d945gclf/20160923_141814.jpg){width="50%" height="50%"}
+
Now remove the both coolers rotating them a bit, slowly, then clean both
-silicons and both coolers (removing cmos battery first is recommended)\
-![](../images/d945gclf/20160923_141601.jpg){width="50%" height="50%"}\
+silicons and both coolers (removing cmos battery first is recommended)
+
+![](../images/d945gclf/20160923_141601.jpg){width="50%" height="50%"}
+
Put a little bit of non conductive thermal paste on both silicons (only
-cpu silicon iis shown on that image)\
-![](../images/d945gclf/20160923_142031.jpg){width="50%" height="50%"}\
+cpu silicon iis shown on that image)
+
+![](../images/d945gclf/20160923_142031.jpg){width="50%" height="50%"}
+
Before assembling new fan, some need new longer screws, make sure having
-these (on the left is original one, too short for new fan)\
-![](../images/d945gclf/20160923_141659.jpg){width="50%" height="50%"}\
-After that, assemble your new fan into CPU cooler\
-![](../images/d945gclf/20160923_141635.jpg){width="50%" height="50%"}\
+these (on the left is original one, too short for new fan)
+
+![](../images/d945gclf/20160923_141659.jpg){width="50%" height="50%"}
+
+After that, assemble your new fan into CPU cooler
+
+![](../images/d945gclf/20160923_141635.jpg){width="50%" height="50%"}
+
Finally assemle both coolers on both chips, do not forget put in the CPU
fan connector back, and you are done.
-Copyright © 2016 Arthur Heymans <arthur@aheymans.xyz>\
-Copyright © 2016 Vitaly Castaño Solana <vita\_cell@hotmail.com>\
+Copyright © 2016 Arthur Heymans <arthur@aheymans.xyz>
+
+Copyright © 2016 Vitaly Castaño Solana <vita\_cell@hotmail.com>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/ga-g41m-es2l.md b/docs/hcl/ga-g41m-es2l.md
index ef8e3563..f3a83884 100644
--- a/docs/hcl/ga-g41m-es2l.md
+++ b/docs/hcl/ga-g41m-es2l.md
@@ -11,7 +11,8 @@ using an IDE SATA adapter. The SATA ports do work.
You need to set a custom MAC address in GNU+Linux for the NIC to work.
In /etc/network/interfaces on debian-based systems like Debian or
-Devuan, this would be in the entry for your NIC:\
+Devuan, this would be in the entry for your NIC:
+
hwaddress ether macaddressgoeshere
Flashing instructions can be found at
@@ -19,7 +20,8 @@ Flashing instructions can be found at
-Copyright © 2016 Leah Rowe <info@minifree.org>\
+Copyright © 2016 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/gm45_remove_me.md b/docs/hcl/gm45_remove_me.md
index bd20cdfc..8c9fe2e8 100644
--- a/docs/hcl/gm45_remove_me.md
+++ b/docs/hcl/gm45_remove_me.md
@@ -40,11 +40,13 @@ factory.bin dump.
ich9gen executables can be found under ./ich9deblob/ statically compiled
in libreboot\_util. If you are using src or git, build ich9gen from
-source with:\
+source with:
+
$ ./oldbuild module ich9deblob
The executable will appear under resources/utilities/ich9deblob/
-Run:\
+Run:
+
$ **./ich9gen**
Running ich9gen this way (without any arguments) generates a default
@@ -70,7 +72,8 @@ the little sticker on the bottom/base of the laptop.
On GM45 laptops that use flash descriptors, the MAC address or the
onboard ethernet chipset is flashed (inside the ROM image). You should
generate a descriptor+gbe image with your own MAC address inside (with
-the Gbe checksum updated to match). Run:\
+the Gbe checksum updated to match). Run:
+
$ ./ich9gen \--macaddress XX:XX:XX:XX:XX:XX
(replace the XX chars with the hexadecimal chars in the MAC address that
you want)
@@ -86,16 +89,23 @@ Two new files will be created:
Assuming that your libreboot image is named **libreboot.rom**, copy the
file to where **libreboot.rom** is located and then insert the
-descriptor+gbe file into the ROM image.\
-For 16MiB flash chips:\
+descriptor+gbe file into the ROM image.
+
+For 16MiB flash chips:
+
$ **dd if=ich9fdgbe\_16m.bin of=libreboot.rom bs=1 count=12k
-conv=notrunc**\
-For 8MiB flash chips:\
+conv=notrunc**
+
+For 8MiB flash chips:
+
$ **dd if=ich9fdgbe\_8m.bin of=libreboot.rom bs=1 count=12k
-conv=notrunc**\
-For 4MiB flash chips:\
+conv=notrunc**
+
+For 4MiB flash chips:
+
$ **dd if=ich9fdgbe\_4m.bin of=libreboot.rom bs=1 count=12k
-conv=notrunc**\
+conv=notrunc**
+
Your libreboot.rom image is now ready to be flashed on the system. Refer
back to [../install/#flashrom](../install/#flashrom) for how to flash
@@ -165,7 +175,8 @@ regions for your libreboot ROM image.
If you are working with libreboot\_src (or git), you can find the source
under resources/utilities/ich9deblob/ and will already be compiled if
you ran **./oldbuild module all** or **./oldbuild module ich9deblob**
-from the main directory (./), otherwise you can build it like so:\
+from the main directory (./), otherwise you can build it like so:
+
$ ./oldbuild module ich9deblob
An executable file named **ich9deblob** will now appear under
resources/utilities/ich9deblob/
@@ -177,7 +188,8 @@ GNU+Linux) under ./ich9deblob/.
Place the factory.rom from your system (can be obtained using the
external flashing guides for GM45 targets linked
[../install/](../install/)) in the directory where you have your
-ich9deblob executable, then run the tool:\
+ich9deblob executable, then run the tool:
+
$ **./ich9deblob**
A 12kiB file named **deblobbed\_descriptor.bin** will now appear. **Keep
@@ -194,7 +206,8 @@ Intel. Only the Intel NICs need a GbE region in the flash chip.
Assuming that your libreboot image is named **libreboot.rom**, copy the
**deblobbed\_descriptor.bin** file to where **libreboot.rom** is located
-and then run:\
+and then run:
+
$ **dd if=deblobbed\_descriptor.bin of=libreboot.rom bs=1 count=12k
conv=notrunc**
@@ -233,16 +246,19 @@ The ME interferes with flash read/write in flashrom, and the default
descriptor locks some regions. The idea is that doing this will remove
all of those restrictions.
-Simply run (with factory.rom in the same directory):\
+Simply run (with factory.rom in the same directory):
+
$ **./demefactory**
It will generate a 4KiB descriptor file (only the descriptor, no GbE).
Insert that into a factory.rom image (NOTE: do this on a copy of it.
-Keep the original factory.rom stored safely somewhere):\
+Keep the original factory.rom stored safely somewhere):
+
$ **dd if=demefactory\_4kdescriptor.bin of=factory\_nome.rom bs=1
count=4k conv=notrunc**
-TODO: test this.\
+TODO: test this.
+
TODO: lenovobios (GM45 thinkpads) still write-protects parts of the
flash. Modify the assembly code inside. Note: the factory.rom (BIOS
region) from lenovobios is in a compressed format, which you have to
@@ -305,7 +321,8 @@ Flash chips {#flashchips}
<http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006075.pdf>
**~~- Page 20 and page 9 refer to SDA\_HDO or SDA\_HDOUT~~** only on
series 6 or higher chipsets. ICH9-M (X200) does it with a strap
- connected to GPIO33 pin (see IRC notes below)\
+ connected to GPIO33 pin (see IRC notes below)
+
- According to page 29, the X200 can have any of the following flash
chips:
- ATMEL AT26DF321-SU 72.26321.A01 - this is a 32Mb (4MiB) chip
@@ -540,7 +557,8 @@ It has only a 448 byte fragment different from 0x00 or 0xFF.
-Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
+Copyright © 2014, 2015 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/imac52.md b/docs/hcl/imac52.md
index 5ce29929..40bcfc96 100644
--- a/docs/hcl/imac52.md
+++ b/docs/hcl/imac52.md
@@ -6,7 +6,8 @@ Information to be written soon, but this board is merged in libreboot.
-Copyright © 2016 Leah Rowe <info@minifree.org>\
+Copyright © 2016 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/index.md b/docs/hcl/index.md
index b47465ad..aa87087a 100644
--- a/docs/hcl/index.md
+++ b/docs/hcl/index.md
@@ -90,10 +90,12 @@ handling.
How to find what EC version you have (i945/GM45) {#ecversion}
================================================
-In GNU+Linux, you can try this:\
+In GNU+Linux, you can try this:
+
**grep 'at EC' /proc/asound/cards**
-Sample output:\
+Sample output:
+
**ThinkPad Console Audio Control at EC reg 0x30, fw 7WHT19WW-3.6**
7WHT19WW is the version in different notation, use search engine to find
@@ -348,8 +350,10 @@ cannot be used with libreboot under any circumstances.
The following T60 motherboard (see area highlighted in white) shows an
empty space where the ATI GPU would be (this particular motherboard has
-an Intel GPU):\
-\
+an Intel GPU):
+
+
+
![](../images/t60_dev/t60_unbrick.jpg)
The reason that the ATI GPU on T60 is unsupported is due to the VBIOS
@@ -359,7 +363,8 @@ work in libreboot.
The 'Video BIOS' is what initializes graphics.
-See: <https://en.wikipedia.org/wiki/Video_BIOS>.\
+See: <https://en.wikipedia.org/wiki/Video_BIOS>.
+
In fact, lack of free VBIOS in general is a big problem in coreboot, and
is one reason (among others) why many ports for coreboot are unsuitable
for libreboot's purpose.
@@ -434,10 +439,12 @@ Referenced below are copies (up to date at the time of writing,
the macbook2,1. They are included here in case the main site goes down
for whatever reason, since they include a lot of useful information.
-Backups created using wget:\
+Backups created using wget:
+
$ wget -m -p -E -k -K -np http://macbook.donderklumpen.de/
**$ wget -m -p -E -k -K -np
-http://macbook.donderklumpen.de/coreboot/**\
+http://macbook.donderklumpen.de/coreboot/**
+
Use **-e robots=off** if using this trick for other sites and the site
restricts using robots.txt
@@ -588,7 +595,8 @@ libreboot git repository.
-Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\
+Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/kcma-d8.md b/docs/hcl/kcma-d8.md
index 31059374..a855f41e 100644
--- a/docs/hcl/kcma-d8.md
+++ b/docs/hcl/kcma-d8.md
@@ -114,7 +114,8 @@ Check the ASUS website.
-Copyright © 2016 Leah Rowe <info@minifree.org>\
+Copyright © 2016 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/kfsn4-dre.md b/docs/hcl/kfsn4-dre.md
index aed86dc1..9a97bccf 100644
--- a/docs/hcl/kfsn4-dre.md
+++ b/docs/hcl/kfsn4-dre.md
@@ -85,7 +85,8 @@ Other information
-Copyright © 2015 Leah Rowe <info@minifree.org>\
+Copyright © 2015 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/kgpe-d16.md b/docs/hcl/kgpe-d16.md
index 9038e147..1d55e96e 100644
--- a/docs/hcl/kgpe-d16.md
+++ b/docs/hcl/kgpe-d16.md
@@ -228,7 +228,8 @@ The information here is adapted, from the ASUS website.
-Copyright © 2015 Leah Rowe <info@minifree.org>\
+Copyright © 2015 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/r400.md b/docs/hcl/r400.md
index 9bac8134..167fa1e5 100644
--- a/docs/hcl/r400.md
+++ b/docs/hcl/r400.md
@@ -73,7 +73,8 @@ TODO: put hardware register logs here like on the [X200](x200.html) and
-Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
+Copyright © 2014, 2015 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/t400.md b/docs/hcl/t400.md
index 7d2f53d9..48ea16b5 100644
--- a/docs/hcl/t400.md
+++ b/docs/hcl/t400.md
@@ -86,7 +86,8 @@ outputs from the T400:
-Copyright © 2015 Leah Rowe <info@minifree.org>\
+Copyright © 2015 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/t500.md b/docs/hcl/t500.md
index 293c46fe..a5d5ef57 100644
--- a/docs/hcl/t500.md
+++ b/docs/hcl/t500.md
@@ -81,7 +81,8 @@ and
The patches above are based on the output from ich9deblob on a
factory.rom image dumped from the T500 with a SOIC-8 4MiB flash chip.
The patch re-creates the X200 descriptor/gbe source, so the commands
-were something like:\
+were something like:
+
$ diff -u t500gbe x200gbe
$ **diff -u t500descriptor x200descriptor**
@@ -108,7 +109,8 @@ outputs from the T500:
-Copyright © 2015 Leah Rowe <info@minifree.org>\
+Copyright © 2015 Leah Rowe <info@minifree.org>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative
diff --git a/docs/hcl/x200.md b/docs/hcl/x200.md
index 65b6ce23..9082d029 100644
--- a/docs/hcl/x200.md
+++ b/docs/hcl/x200.md
@@ -257,7 +257,8 @@ be useful for RAM compatibility info (note: coreboot raminit is
different, so this page might be BS)
pehjota started collecting some steppings for different CPUs on several
-X200 laptops. You can get the CPUID by running:\
+X200 laptops. You can get the CPUID by running:
+
$ **dmesg | sed -n 's/\^.* microcode: CPU0
sig=0x\\(\[\^,\]*\\),.*$/\\1/p'**
@@ -296,8 +297,10 @@ Unsorted notes {#unsorted}
-Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
-Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>\
+Copyright © 2014, 2015 Leah Rowe <info@minifree.org>
+
+Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>
+
Permission is granted to copy, distribute and/or modify this document
under the terms of the Creative Commons Attribution-ShareAlike 4.0
International license or any later version published by Creative