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diff --git a/docs/install/x200_external.html b/docs/install/x200_external.html deleted file mode 100644 index 0d820355..00000000 --- a/docs/install/x200_external.html +++ /dev/null @@ -1,477 +0,0 @@ -<!DOCTYPE html> -<html> -<head> - <meta charset="utf-8"> - <meta name="viewport" content="width=device-width, initial-scale=1"> - - <style type="text/css"> - @import url('../css/main.css'); - </style> - - <title>ThinkPad X200: flashing tutorial (BeagleBone Black)</title> -</head> - -<body> - - <div class="section"> - <h1 id="pagetop">Flashing the X200 with a BeagleBone Black</h1> - <p>Initial flashing instructions for X200.</p> - <p> - This guide is for those who want libreboot on their ThinkPad X200 - while they still have the original Lenovo BIOS present. This guide - can also be followed (adapted) if you brick your X200, to know how - to recover. - </p> - - <ul> - <li><a href="#preinstall">X200 laptops with libreboot pre-installed</a></li> - <li><a href="#flashchips">Flash chips</a></li> - <li><a href="#macaddress">MAC address</a></li> - <li><a href="#clip">Initial BBB configuration and installation procedure</a></li> - <li><a href="#boot">Boot it!</a></li> - <li><a href="#wifi">Wifi</a></li> - <li><a href="#wwan">wwan</a></li> - <li><a href="#memory">Memory</a></li> - <li><a href="#gpio33">X200S and X200 Tablet users: GPIO33 trick will not work.</a></li> - </ul> - - <p><a href="./">Back to main index</a></p> - </div> - - <div class="section"> - - <h1 id="preinstall">X200 laptops with libreboot pre-installed</h1> - - <p> - If you don't want to install libreboot yourself, companies exist that sell these laptops - with libreboot pre-installed, along with a free GNU+Linux distribution. - </p> - <p> - Check the <a href="../../suppliers">suppliers</a> page for more information. - </p> - - </div> - - <div class="section"> - - <h1 id="flashchips">Flash chip size</h1> - - <p> - Use this to find out:<br/> - # <b>flashrom -p internal -V</b> - </p> - - <p> - The X200S and X200 Tablet will use a WSON-8 flash chip, on the - bottom of the motherboard (this requires removal of the - motherboard). <b>Not all X200S/X200T are supported; - see <a href="../hcl/x200.html#x200s">../hcl/x200.html#x200s</a>.</b> - </p> - - <p> - <a href="#pagetop">Back to top of page.</a> - </p> - - </div> - - <div class="section"> - - <h1 id="macaddress">MAC address</h1> - - <p> - On the X200/X200S/X200T, the MAC address for the onboard - gigabit ethernet chipset is stored inside the flash chip, - along with other configuration data. - </p> - <p> - Keep a note of the MAC address before disassembly; this is - very important, because you will need to insert this into - the libreboot ROM image before flashing it. - It will be written in one of these locations: - </p> - - <p> - <img src="images/x200/disassembly/0002.jpg" alt="" /> - <img src="images/x200/disassembly/0001.jpg" alt="" /> - </p> - - </div> - - <div class="section"> - - <h1 id="clip">Initial BBB configuration</h1> - - <p> - Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to - set up the BBB for flashing. - </p> - - <p> - The following shows how to connect the clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): - </p> -<pre> -POMONA 5252 (correlate with the BBB guide) -=== front (display) on your X200 ==== - NC - - 21 - 1 - - 17 - NC - - NC - NC - - NC - NC - - NC - NC - - NC - 18 - - 3.3V (PSU) - 22 - - NC - this is pin 1 on the flash chip -=== back (palmrest) on your X200 === -<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i> -Here is a photo of the SOIC-16 flash chip. Pins are labelled:<br/> -<img src="images/x200/x200_pomona.jpg" alt="" /> -</pre> - <p> - The following shows how to connect the clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): - </p> -<pre> -POMONA 5250 (correlate with the BBB guide) -=== left side of the X200 (where the VGA port is) ==== - 18 - - 1 - 22 - - NC - NC - - 21 - 3.3V (PSU) - - 17 - this is pin 1 on the flash chip. in front of it is the screen. -=== right side of the X200 (where the audio jacks are) === -<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i> -Here is a photo of the SOIC-8 flash chip. The pins are labelled:<br/> -<img title="Copyright 2015 Patrick "P. J." McDermott <pj@pehjota.net>, see license notice at the end of this document" src="images/x200/soic8.jpg" /> - -Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16 -chip on those pins? -</pre> - <p> - <b>On the X200S and X200 Tablet the flash chip is underneath the board, in a WSON package. - The pinout is very much the same as a SOIC-8, except you need to solder (there are no clips available).<br/> - The following image shows how this is done:</b><br/> - <img src="images/x200/wson_soldered.jpg" title="Copyright 2014 Steve Shenton <sgsit@libreboot.org> see license notice at the end of this document" alt="" /> - <br/> - In this image, a pin header was soldered onto the WSON. Another solution might be to de-solder the WSON-8 chip and put a SOIC-8 there instead. - Check the list of SOIC-8 flash chips at <a href="../hcl/gm45_remove_me.html#flashchips">../hcl/gm45_remove_me.html#flashchips</a> but - do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case, - the X201 SOIC-8 flash chip (Macronix 25L6445E) might work. - </p> - - <h2> - The procedure - </h2> - <p> - This section is for the X200. This does not apply to the X200S or X200 Tablet - (for those systems, you have to remove the motherboard completely, since - the flash chip is on the other side of the board). - </p> - <p> - Remove these screws:<br/> - <img src="images/x200/disassembly/0003.jpg" alt="" /> - </p> - <p> - Push the keyboard forward, gently, then lift it off and - disconnect it from the board:<br/> - <img src="images/x200/disassembly/0004.jpg" alt="" /> - <img src="images/x200/disassembly/0005.jpg" alt="" /> - </p> - <p> - Pull the palm rest off, lifting from the left and right side at the back of the - palm rest:<br/> - <img src="images/x200/disassembly/0006.jpg" alt="" /> - </p> - <p> - Lift back the tape that covers a part of the flash chip, and - then connect the clip:<br/> - <img src="images/x200/disassembly/0007.jpg" alt="" /> - <img src="images/x200/disassembly/0008.jpg" alt="" /> - </p> - <p> - On pin 2 of the BBB, where you have the ground (GND), connect the - ground to your PSU:<br/> - <img src="images/x200/disassembly/0009.jpg" alt="" /> - <img src="images/x200/disassembly/0010.jpg" alt="" /> - </p> - <p> - Connect the 3.3V supply from your PSU to the flash chip (via - the clip):<br/> - <img src="images/x200/disassembly/0011.jpg" alt="" /> - <img src="images/x200/disassembly/0012.jpg" alt="" /> - </p> - <p> - Of course, make sure that your PSU is also plugged in and - turn on:<br/> - <img src="images/x200/disassembly/0013.jpg" alt="" /> - </p> - <p> - This tutorial tells you to use an ATX PSU, for the 3.3V DC - supply. The PSU used when taking these photos is actually - not an ATX PSU, but a PSU that is designed specifically - for providing 3.3V DC (an ATX PSU will also work):<br/> - <img src="images/x200/disassembly/0014.jpg" alt="" /> - </p> - <p> - Now, you should be ready to install libreboot. - </p> - <p> - Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, - libreboot also distributes flashrom source code which can be built. - </p> - <p> - Log in as root on your BBB, using the instructions in - <a href="bbb_setup.html#bbb_access">bbb_setup.html#bbb_access</a>. - </p> - - <p> - Test that flashrom works:<br/> - # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512</b><br/> - In this case, the output was: - </p> -<pre> -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. -Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. -Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" -Please specify which chip definition to use with the -c <chipname> option. -</pre> - <p> - How to backup factory.rom (change the -c option as neeed, for your flash chip):<br/> - # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom</b><br/> - # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom</b><br/> - # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom</b><br/> - Note: the <b>-c</b> option is not required in libreboot's patched flashrom, because - the redundant flash chip definitions in <i>flashchips.c</i> have been removed.<br/> - Now compare the 3 images:<br/> - # <b>sha512sum factory*.rom</b><br/> - If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not - the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware - that could be replicated in coreboot and libreboot. - </p> - <p> - Follow the instructions at <a href="../hcl/gm45_remove_me.html#ich9gen">../hcl/gm45_remove_me.html#ich9gen</a> - to change the MAC address inside the libreboot ROM image, before flashing it. - Although there is a default MAC address inside the ROM image, this is not what you want. <b>Make sure - to always change the MAC address to one that is correct for your system.</b> - </p> - <p> - Now flash it:<br/> - # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V</b> - </p> - <p> - <img src="images/x200/disassembly/0015.jpg" alt="" /> - </p> - <p> - You might see errors, but if it says <b>Verifying flash... VERIFIED</b> at the end, then it's flashed and should boot. - If you see errors, try again (and again, and again); the message <b>Chip content is identical to the requested image</b> - is also an indication of a successful installation. - </p> - <p> - Example output from running the command (see above): - </p> -<pre> -flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) -flashrom is free software, get the source code at http://www.flashrom.org -Calibrating delay loop... OK. -Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. -Reading old flash chip contents... done. -Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 -ERASE FAILED! -Reading current flash chip contents... done. Looking for another erase function. -Erase/write done. -Verifying flash... VERIFIED. -</pre> - - <p> - <a href="#pagetop">Back to top of page.</a> - </p> - - </div> - - <div class="section"> - - <h1 id="wifi">Wifi</h1> - - <p> - The X200 typically comes with an Intel wifi chipset, which does not - work without proprietary software. For a list of wifi chipsets that - work without proprietary software, see - <a href="../hcl/#recommended_wifi">../hcl/#recommended_wifi</a>. - </p> - - <p> - Some X200 laptops come with an Atheros chipset, but this is 802.11g only. - </p> - - <p> - It is recommended that you install a new wifi chipset. This can only - be done after installing libreboot, because the original firmware has - a whitelist of approved chips, and it will refuse to boot if you - use an 'unauthorized' wifi card. - </p> - - <p> - The following photos show an Atheros AR5B95 being installed, to - replace the Intel chip that this X200 came with:<br/> - <img src="images/x200/disassembly/0016.jpg" alt="" /> - <img src="images/x200/disassembly/0017.jpg" alt="" /> - </p> - - </div> - - <div class="section"> - - <h1 id="wwan">WWAN</h1> - <p> - If you have a WWAN/3G card and/or sim card reader, remove them permanently. - The WWAN-3G card has proprietary firmware inside; the technology is - identical to what is used in mobile phones, so it can also track your movements. - </p> - <p> - Not to be confused with wifi (wifi is fine). - </p> - - </div> - - <div class="section"> - - <h1 id="memory">Memory</h1> - - <p> - You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs - (speed/size). Non-matching pairs won't work. You can also install a - single module (meaning, one of the slots will be empty) in slot 0. - </p> - <p> - NOTE: according to users repors, non matching pairs (e.g. 1+2 GiB) might work in some cases. - </p> - <p> - Make sure that the RAM you buy is the 2Rx8 density. - </p> - - <p> - In this photo, 8GiB of RAM (2x4GiB) is installed:<br/> - <img src="images/x200/disassembly/0018.jpg" alt="" /> - </p> - - </div> - - <div class="section"> - - <h2 id="boot"> - Boot it! - </h2> - <p> - You should see something like this: - </p> - <p> - <img src="images/x200/disassembly/0019.jpg" alt="" /> - </p> - - <p> - Now <a href="../gnulinux/">install GNU+Linux</a>. - </p> - - </div> - - <div class="section"> - <h2 id="gpio33"> - X200S and X200 Tablet users: GPIO33 trick will not work. - </h2> - <p> - sgsit found out about a pin called GPIO33, which can be grounded to disable the flashing protections - by the descriptor and stop the ME from starting (which itself interferes with flashing attempts). - The theory was proven correct; however, it is still useless in practise. - </p> - <p> - Look just above the 7 in TP37 (that's GPIO33):<br/> - <img src="../hcl/images/x200/gpio33_location.jpg" alt="" /> - </p> - <p> - By default we would see this in lenovobios, when trying flashrom -p internal -w rom.rom: - </p> -<pre> -FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. -FREG2: Warning: Management Engine region (0x00001000-0x005f5fff) is locked. -</pre> - <p> - With GPIO33 grounded during boot, this disabled the flash protections as set - by descriptor, and stopped the ME from starting. The output changed to: - </p> -<pre> -The Flash Descriptor Override Strap-Pin is set. Restrictions implied by -the Master Section of the flash descriptor are NOT in effect. Please note -that <b>Protected Range (PR) restrictions still apply.</b> -</pre> - <p> - The part in bold is what got us. This was still observed: - </p> -<pre> -PR0: Warning: 0x007e0000-0x01ffffff is read-only. -PR4: Warning: 0x005f8000-0x005fffff is locked. -</pre> - - <p> - It is actually possible to disable these protections. Lenovobios does, - when updating the BIOS (proprietary one). One possible way to go about this - would be to debug the BIOS update utility from Lenovo, to find out - how it's disabling these protections. Some more research is available here: - <a href="http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research">http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research</a> - </p> - - <p> - On a related note, libreboot has a utility that could help with investigating this: - <a href="../hcl/gm45_remove_me.html#demefactory">../hcl/gm45_remove_me.html#demefactory</a> - </p> - </div> - - <div class="section"> - - <p> - Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> - Permission is granted to copy, distribute and/or modify this document - under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license - or any later version published by Creative Commons; - - A copy of the license can be found at <a href="../cc-by-sa-4.0.txt">../cc-by-sa-4.0.txt</a> - </p> - - <p> - Updated versions of the license (when available) can be found at - <a href="https://creativecommons.org/licenses/by-sa/4.0/legalcode">https://creativecommons.org/licenses/by-sa/4.0/legalcode</a> - </p> - - <p> - UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE - EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS - AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF - ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, - IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, - WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR - PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, - ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT - KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT - ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. - </p> - <p> - TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE - TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, - NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, - INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, - COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR - USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN - ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR - DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR - IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. - </p> - <p> - The disclaimer of warranties and limitation of liability provided - above shall be interpreted in a manner that, to the extent - possible, most closely approximates an absolute disclaimer and - waiver of all liability. - </p> - - </div> - -</body> -</html> |