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Diffstat (limited to 'docs/install/x200_external.md')
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1 files changed, 63 insertions, 62 deletions
diff --git a/docs/install/x200_external.md b/docs/install/x200_external.md index adb0dae8..ccfab1ae 100644 --- a/docs/install/x200_external.md +++ b/docs/install/x200_external.md @@ -1,4 +1,6 @@ -% Flashing the X200 with a BeagleBone Black + +Flashing the X200 with a BeagleBone Black +========================================= Initial flashing instructions for X200. @@ -16,6 +18,9 @@ followed (adapted) if you brick your X200, to know how to recover. - [Memory](#memory) - [X200S and X200 Tablet users: GPIO33 trick will not work.](#gpio33) + + + X200 laptops with libreboot pre-installed {#preinstall} ========================================= @@ -25,20 +30,23 @@ GNU+Linux distribution. Check the [suppliers](../../suppliers) page for more information. + + Flash chip size {#flashchips} =============== -Use this to find out: - -# **flashrom -p internal -V** +Use this to find out:\ +\# **flashrom -p internal -V** The X200S and X200 Tablet will use a WSON-8 flash chip, on the bottom of the motherboard (this requires removal of the motherboard). **Not all X200S/X200T are supported; see -[../hcl/x200.html#x200s](../hcl/x200.html#x200s).** +[../hcl/x200.html\#x200s](../hcl/x200.html#x200s).** [Back to top of page.](#pagetop) + + MAC address {#macaddress} =========== @@ -53,6 +61,8 @@ image before flashing it. It will be written in one of these locations:   + + Initial BBB configuration {#clip} ========================= @@ -91,21 +101,20 @@ header), for SOIC-8 (clip: Pomona 5250): This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. Here is a photo of the SOIC-8 flash chip. The pins are labelled: + + Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16 chip on those pins? **On the X200S and X200 Tablet the flash chip is underneath the board, in a WSON package. The pinout is very much the same as a SOIC-8, except -you need to solder (there are no clips available). - -The following image shows how this is done:** - - - +you need to solder (there are no clips available).\ +The following image shows how this is done:**\ +\ In this image, a pin header was soldered onto the WSON. Another solution might be to de-solder the WSON-8 chip and put a SOIC-8 there instead. Check the list of SOIC-8 flash chips at -[../hcl/gm45\_remove\_me.html#flashchips](../hcl/gm45_remove_me.html#flashchips) +[../hcl/gm45\_remove\_me.html\#flashchips](../hcl/gm45_remove_me.html#flashchips) but do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case, the X201 SOIC-8 flash chip (Macronix 25L6445E) might work. @@ -117,47 +126,39 @@ This section is for the X200. This does not apply to the X200S or X200 Tablet (for those systems, you have to remove the motherboard completely, since the flash chip is on the other side of the board). -Remove these screws: - +Remove these screws:\  Push the keyboard forward, gently, then lift it off and disconnect it -from the board: - +from the board:\   Pull the palm rest off, lifting from the left and right side at the back -of the palm rest: - +of the palm rest:\  Lift back the tape that covers a part of the flash chip, and then -connect the clip: - +connect the clip:\   On pin 2 of the BBB, where you have the ground (GND), connect the ground -to your PSU: - +to your PSU:\   -Connect the 3.3V supply from your PSU to the flash chip (via the clip): - +Connect the 3.3V supply from your PSU to the flash chip (via the clip):\   -Of course, make sure that your PSU is also plugged in and turn on: - +Of course, make sure that your PSU is also plugged in and turn on:\  This tutorial tells you to use an ATX PSU, for the 3.3V DC supply. The PSU used when taking these photos is actually not an ATX PSU, but a PSU that is designed specifically for providing 3.3V DC (an ATX PSU will -also work): - +also work):\  Now, you should be ready to install libreboot. @@ -167,11 +168,10 @@ libreboot\_util. Alternatively, libreboot also distributes flashrom source code which can be built. Log in as root on your BBB, using the instructions in -[bbb\_setup.html#bbb\_access](bbb_setup.html#bbb_access). - -Test that flashrom works: +[bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access). - # ./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 +Test that flashrom works:\ +\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512**\ In this case, the output was: flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) @@ -184,24 +184,18 @@ In this case, the output was: Please specify which chip definition to use with the -c <chipname> option. How to backup factory.rom (change the -c option as neeed, for your flash -chip): - -# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory.rom** - -# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory1.rom** - -# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory2.rom** - +chip):\ +\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r +factory.rom**\ +\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r +factory1.rom**\ +\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r +factory2.rom**\ Note: the **-c** option is not required in libreboot's patched flashrom, because the redundant flash chip definitions in *flashchips.c* -have been removed. - -Now compare the 3 images: - - # sha512sum factory*.rom +have been removed.\ +Now compare the 3 images:\ +\# **sha512sum factory\*.rom**\ If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not the BBB). This is useful for reverse engineering work, if there is a desirable @@ -209,20 +203,19 @@ behaviour in the original firmware that could be replicated in coreboot and libreboot. Follow the instructions at -[../hcl/gm45\_remove\_me.html#ich9gen](../hcl/gm45_remove_me.html#ich9gen) +[../hcl/gm45\_remove\_me.html\#ich9gen](../hcl/gm45_remove_me.html#ich9gen) to change the MAC address inside the libreboot ROM image, before flashing it. Although there is a default MAC address inside the ROM image, this is not what you want. **Make sure to always change the MAC address to one that is correct for your system.** -Now flash it: - -# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w +Now flash it:\ +\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V**  -You might see errors, but if it says **Verifying flash... VERIFIED** at +You might see errors, but if it says **Verifying flash\... VERIFIED** at the end, then it's flashed and should boot. If you see errors, try again (and again, and again); the message **Chip content is identical to the requested image** is also an indication of a successful @@ -243,13 +236,15 @@ Example output from running the command (see above): [Back to top of page.](#pagetop) + + Wifi ==== The X200 typically comes with an Intel wifi chipset, which does not work without proprietary software. For a list of wifi chipsets that work without proprietary software, see -[../hcl/#recommended\_wifi](../hcl/#recommended_wifi). +[../hcl/\#recommended\_wifi](../hcl/#recommended_wifi). Some X200 laptops come with an Atheros chipset, but this is 802.11g only. @@ -260,11 +255,12 @@ whitelist of approved chips, and it will refuse to boot if you use an 'unauthorized' wifi card. The following photos show an Atheros AR5B95 being installed, to replace -the Intel chip that this X200 came with: - +the Intel chip that this X200 came with:\   + + WWAN ==== @@ -275,6 +271,8 @@ track your movements. Not to be confused with wifi (wifi is fine). + + Memory ====== @@ -287,10 +285,11 @@ work in some cases. Make sure that the RAM you buy is the 2Rx8 density. -In this photo, 8GiB of RAM (2x4GiB) is installed: - +In this photo, 8GiB of RAM (2x4GiB) is installed:\  + + Boot it! {#boot} -------- @@ -300,6 +299,8 @@ You should see something like this: Now [install GNU+Linux](../gnulinux/). + + X200S and X200 Tablet users: GPIO33 trick will not work. {#gpio33} -------------------------------------------------------- @@ -308,8 +309,7 @@ disable the flashing protections by the descriptor and stop the ME from starting (which itself interferes with flashing attempts). The theory was proven correct; however, it is still useless in practise. -Look just above the 7 in TP37 (that's GPIO33): - +Look just above the 7 in TP37 (that's GPIO33):\  By default we would see this in lenovobios, when trying flashrom -p @@ -340,10 +340,11 @@ here: On a related note, libreboot has a utility that could help with investigating this: -[../hcl/gm45\_remove\_me.html#demefactory](../hcl/gm45_remove_me.html#demefactory) +[../hcl/gm45\_remove\_me.html\#demefactory](../hcl/gm45_remove_me.html#demefactory) + -Copyright © 2014, 2015 Leah Rowe <info@minifree.org> +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative |