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Diffstat (limited to 'docs/install')
| -rw-r--r-- | docs/install/bbb_setup.md | 92 | ||||
| -rw-r--r-- | docs/install/c201.md | 107 | ||||
| -rw-r--r-- | docs/install/d510mo.md | 3 | ||||
| -rw-r--r-- | docs/install/d945gclf.md | 2 | ||||
| -rw-r--r-- | docs/install/ga-g41m-es2l.md | 17 | ||||
| -rw-r--r-- | docs/install/images/x200/disassembly/0006.1.jpg | bin | 0 -> 32364 bytes | |||
| -rw-r--r-- | docs/install/index.md | 163 | ||||
| -rw-r--r-- | docs/install/kcma-d8.md | 14 | ||||
| -rw-r--r-- | docs/install/kgpe-d16.md | 16 | ||||
| -rw-r--r-- | docs/install/r400_external.md | 58 | ||||
| -rw-r--r-- | docs/install/rpi_setup.md | 130 | ||||
| -rw-r--r-- | docs/install/t400_external.md | 55 | ||||
| -rw-r--r-- | docs/install/t500_external.md | 49 | ||||
| -rw-r--r-- | docs/install/t60_unbrick.md | 39 | ||||
| -rw-r--r-- | docs/install/x200_external.md | 138 | ||||
| -rw-r--r-- | docs/install/x60_unbrick.md | 29 | ||||
| -rw-r--r-- | docs/install/x60tablet_unbrick.md | 29 |
17 files changed, 452 insertions, 489 deletions
diff --git a/docs/install/bbb_setup.md b/docs/install/bbb_setup.md index 1182bb16..18f0c7be 100644 --- a/docs/install/bbb_setup.md +++ b/docs/install/bbb_setup.md @@ -8,15 +8,15 @@ flash chip with the BeagleBone Black, using the rev. C was used when creating this guide, but earlier revisions may also work. -**NOTE: this documentation may be outdated, and discusses configuring +*NOTE: this documentation may be outdated, and discusses configuring SPI flashing on the default Debian system that the BBB sometimes comes with. If you want an easier time, just use [BBB ScrewDriver](https://www.coreboot.org/BBB_screwdriver) which comes -pre-configured.** +pre-configured.* -**This guide is written for Debian Wheezy 7.5, which is what came on the +*This guide is written for Debian Wheezy 7.5, which is what came on the BBB at the time this guide was written. This one: -<https://debian.beagleboard.org/images/bone-debian-7.8-lxde-4gb-armhf-2015-03-01-4gb.img.xz>** +<https://debian.beagleboard.org/images/bone-debian-7.8-lxde-4gb-armhf-2015-03-01-4gb.img.xz>* There was no justification for a further section for the Teensy. Simply refer to [this page on @@ -28,7 +28,7 @@ flashing on the ThinkPad X200, but it should work for other targets. here is a photo of the setup for the teensy: <http://h5ai.swiftgeek.net/IMG_20160601_120855.jpg> -Onto the Beaglebone black\... +Onto the Beaglebone black... Hardware requirements ===================== @@ -36,7 +36,7 @@ Hardware requirements Shopping list (pictures of this hardware is shown later): - A [Flashrom](http://flashrom.org)-compatible external SPI - programmer: **BeagleBone Black**, sometimes referred to as 'BBB', + programmer: *BeagleBone Black*, sometimes referred to as 'BBB', (rev. C) is highly recommended. You can buy one from [Adafruit](https://www.adafruit.com) (USA), [ElectroKit](http://electrokit.com) (Sweden) or any of the @@ -52,30 +52,30 @@ Shopping list (pictures of this hardware is shown later): bottom half of a [hammond plastic enclosure](http://www.hammondmfg.com/1593HAM.htm#BeagleBoneBlack). - Clip for connecting to the flash chip: if you have a SOIC-16 flash - chip (16 pins), you will need the **Pomona 5252** or equivalent. For - SOIC-8 flash chips (8 pins), you will need the **Pomona 5250** or + chip (16 pins), you will need the *Pomona 5252* or equivalent. For + SOIC-8 flash chips (8 pins), you will need the *Pomona 5250* or equivalent. Do check which chip you have, before ordering a clip. Also, you might as well buy two clips or more since they break easily. [Farnell element 14](http://farnell.com/) sells these and ships to many countries. Some people find these clips difficult to get hold of, especially in South America. If you know of any good suppliers, please contact the libreboot project with the relevant - information. **If you can't get hold of a pomona clip, some other + information. *If you can't get hold of a pomona clip, some other clips might work, e.g. 3M, but they are not always reliable. You can also directly solder the wires to the chip, if that suits you; the - clip is just for convenience, really.** -- **External 3.3V DC power supply**, for powering the flash chip: an + clip is just for convenience, really.* +- *External 3.3V DC power supply*, for powering the flash chip: an ATX power supply / PSU (common on Intel/AMD desktop computers) will work for this. A lab PSU (DC) will also work (adjusted to 3.3V). - Getting a multimeter might be worthwhile, to verify that it's supplying 3.3V. -- **External 5V DC power supply** (barrel connector), for powering the +- *External 5V DC power supply* (barrel connector), for powering the BBB: the latter can have power supplied via USB, but a dedicated power supply is recommended. These should be easy to find in most - places that sell electronics. **OPTIONAL. Only needed if not + places that sell electronics. OPTIONAL. Only needed if not powering with the USB cable, or if you want to use [EHCI - debug](../misc/bbb_ehci.md)**. -- **Pin header / jumper cables** (2.54mm / 0.1" headers): you should + debug](../misc/bbb_ehci.md). +- *Pin header / jumper cables* (2.54mm / 0.1" headers): you should get male--male, male--female and female--female cables in 10cm size. Just get a load of them. Other possible names for these cables/wires/leads are as follows: @@ -84,20 +84,20 @@ Shopping list (pictures of this hardware is shown later): - You might also be able to make these cables yourself. [Adafruit](https://www.adafruit.com) sell them, as do many others. - **Some people find them difficult to buy. Please contact the - libreboot project if you know of any good sellers.** You might also + *Some people find them difficult to buy. Please contact the + libreboot project if you know of any good sellers.* You might also be able to make these cables yourself. For PSU connections, using long cables, e.g. 20cm, is fine, and you can extend them longer than that if needed. -- **Mini USB A-B cable** (the BeagleBone probably already comes with - one.) - **OPTIONAL - only needed for [EHCI +- *Mini USB A-B cable* (the BeagleBone probably already comes with + one.) - *OPTIONAL - only needed for [EHCI debug](../misc/bbb_ehci.md) or for serial/ssh access without - ethernet cable (g\_multi kernel module)** -- **FTDI TTL cable or debug board**: used for accessing the serial + ethernet cable (g\_multi kernel module)* +- *FTDI TTL cable or debug board*: used for accessing the serial console on the BBB. [This page](http://elinux.org/Beagleboard:BeagleBone_Black_Serial) - contains a list. **OPTIONAL\---only needed for serial console on - the BBB, if not using SSH via ethernet cable.** + contains a list. *OPTIONAL\---only needed for serial console on + the BBB, if not using SSH via ethernet cable.* Setting up the 3.3V DC PSU ========================== @@ -112,13 +112,13 @@ Short PS\_ON\# / Power on (green wire; pin 16 on 24-pin ATX PSU, or pin it) using a wire/paperclip/jumper, then power on the PSU by grounding PS\_ON\# (this is also how an ATX motherboard turns on a PSU). -**DO \*\*NOT\*\* use pin 4, 6, do \*\*NOT\*\* use pin 19 or 20 (on a -20-pin ATX PSU), and DO \*\*NOT\*\* use pin 21, 22 or 23 (on a 24-pin -ATX PSU). Those wires (the red ones) are 5V, and they \*\*WILL\*\* kill -your flash chip. \*\*\*NEVER\*\*\* supply more than 3.3V to your flash +*DO NOT use pin 4, 6, do NOT use pin 19 or 20 (on a +20-pin ATX PSU), and DO NOT use pin 21, 22 or 23 (on a 24-pin +ATX PSU). Those wires (the red ones) are 5V, and they WILL kill +your flash chip. NEVER supply more than 3.3V to your flash chip (that is, if it's a 3.3V flash chip; 5V and 1.8V SPI flash chips do exist, but they are rare. Always check what voltage your chip takes. -Most of them take 3.3V).** +Most of them take 3.3V).* You only need one 3.3V supply and one ground for the flash chip, after grounding PS\_ON\#. @@ -150,12 +150,14 @@ Alternatives to SSH (in case SSH fails) You can also use a serial FTDI debug board with GNU Screen, to access the serial console. # screen /dev/ttyUSB0 115200 + Here are some example photos:\  \ You can also connect the USB cable from the BBB to another computer and a new network interface will appear, with its own IP address. This is directly accessible from SSH, or screen: + # screen /dev/ttyACM0 115200 You can also access the uboot console, using the serial method instead @@ -197,19 +199,21 @@ contents of this file with: /usr/bin/led_acc & fi -Run **apt-get update** and **apt-get upgrade** then reboot the BBB, +Run `apt-get update` and `apt-get upgrade` then reboot the BBB, before continuing. Check that the firmware exists: - # ls /lib/firmware/BB-SPI0-01-00A0.\* + # ls /lib/firmware/BB-SPI0-01-00A0. + Output: /lib/firmware/BB-SPI0-01-00A0.dtbo Then: - # echo BB-SPI0-01 > /sys/devices/bone\_capemgr.\*/slots - # cat /sys/devices/bone\_capemgr.\*/slots + # echo BB-SPI0-01 > /sys/devices/bone_capemgr./slots + # cat /sys/devices/bone_capemgr./slots + Output: 0: 54:PF--- @@ -222,15 +226,16 @@ Output: Verify that the spidev device now exists: - # ls -al /dev/spid\* + # ls -al /dev/spid + Output: crw-rw---T 1 root spi 153, 0 Nov 19 21:07 /dev/spidev1.0 Now the BBB is ready to be used for flashing. Make this persist across reboots:\ -In /etc/default/capemgr add **CAPE=BB-SPI0-01** at the end (or change -the existing **CAPE=** entry to say that, if an entry already exists. +In /etc/default/capemgr add `CAPE=BB-SPI0-01` at the end (or change +the existing `CAPE=` entry to say that, if an entry already exists. Get flashrom from the libreboot\_util release archive, or build it from libreboot\_src/git if you need to. An ARM binary (statically compiled) @@ -246,7 +251,8 @@ your BBB. Now test flashrom: - # ./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 + Output: Calibrating delay loop... OK. @@ -311,18 +317,18 @@ for SOIC-8 (clip: Pomona 5250): WP 3-6 SCK GND 4-5 MOSI -**NC = no connection** +`NC = no connection` -**DO NOT connect 3.3V (PSU) yet. ONLY connect this once the pomona is -connected to the flash chip.** +*DO NOT connect 3.3V (PSU) yet. ONLY connect this once the pomona is +connected to the flash chip.* -**You also need to connect the BLACK wire (ground/earth) from the 3.3V +*You also need to connect the BLACK wire (ground/earth) from the 3.3V PSU to pin 2 on the BBB (P9 header). It is safe to install this now (that is, before you connect the pomona to the flash chip); in fact, you -should.** +should.* if you need to extend the 3.3v psu leads, just use the same colour M-F -leads, **but** keep all other leads short (10cm or less) +leads, *but* keep all other leads short (10cm or less) You should now have something that looks like this:\   @@ -331,8 +337,6 @@ Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>\ Copyright © 2015 Albin Söderqvist\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/c201.md b/docs/install/c201.md index 2e1d23b8..4bb0583b 100644 --- a/docs/install/c201.md +++ b/docs/install/c201.md @@ -1,5 +1,6 @@ --- title: ASUS Chromebook C201 installation guide +x-toc-enable: true ... These instructions are for installing Libreboot to the ASUS Chromebook @@ -7,44 +8,32 @@ C201. Since the device ships with Coreboot, the installation instructions are the same before and after flashing Libreboot for the first time. -**If you are using libreboot\_src or git, then make sure that you built -the sources first (see [../git/\#build](../git/#build)).** +*If you are using libreboot\_src or git, then make sure that you built +the sources first (see [../git/\#build](../git/#build)).* Look at the [list of ROM images](#rom) to see which image is compatible with your device. Libreboot can be installed internally from the device, with sufficient -privileges. The installation process requires using **Google's modified -version of flashrom**, that has support for reflashing the Chromebook's +privileges. The installation process requires using *Google's modified +version of flashrom*, that has support for reflashing the Chromebook's SPI flash. Otherwise, flashing externally will work with the upstream flashrom version. -**Google's modified version of flashrom** is free software and its +*Google's modified version of flashrom* is free software and its source code is made available by Google: [flashrom](https://chromium.googlesource.com/chromiumos/third_party/flashrom/).\ It is not distributed along with Libreboot yet. However, it is preinstalled on the device, with ChromeOS. -Installing Libreboot internally requires sufficient privileges on the -system installed on the device.\ -When the device has ChromeOS installed (as it does initially), it is -necessary to gain root privileges in ChromeOS, to be able to access a -root shell. - -- [Gaining root privileges on ChromeOS](#root_chromeos) -- [Preparing the device for the installation](#preparing_device) - - [Configuring verified boot - parameters](#configuring_verified_boot_parameters) - - [Removing the write protect - screw](#removing_write_protect_screw) -- [Installing Libreboot to the SPI flash]() - - [Installing Libreboot internally, from the - device](#installing_libreboot_internally) - - [Installing Libreboot externally, with a SPI flash - programmer](#installing_libreboot_externally) -- [Debian GNU+Linux is recommended for this device](#debian) +Installing Libreboot internally requires sufficient privileges on the system +installed on the device. When the device has ChromeOS installed (as it does +initially), it is necessary to gain root privileges in ChromeOS, to be able to +access a root shell. Gaining root privileges on ChromeOS +-------------------------------- + In order to gain root privileges on ChromeOS, developer mode has to be enabled from the recovery mode screen and debugging features have to be enabled in ChromeOS. @@ -57,25 +46,25 @@ dedicated to [depthcharge](../depthcharge/). Once developer mode is enabled, the device will boot to the [developer mode screen](../depthcharge/#developer_mode_screen). ChromeOS can be booted by waiting for 30 seconds (the delay is shortened in Libreboot) -or by pressing **Ctrl + D** +or by pressing *Ctrl + D* After the system has booted, root access can be enabled by clicking on -the **Enable debugging features** link. A confirmation dialog will ask +the *Enable debugging features* link. A confirmation dialog will ask whether to proceed.\ -After confirming by clicking **Proceed**, the device will reboot and ask +After confirming by clicking *Proceed*, the device will reboot and ask for the root password to set. Finally, the operation has to be confirmed -by clicking **Enable**. +by clicking *Enable*. After setting the root password, it becomes possible to log-in as root. -A tty prompt can be obtained by pressing **Ctrl + Alt + Next**. The -**Next** key is the one on the top left of the keyboard. +A tty prompt can be obtained by pressing *Ctrl + Alt + Next*. The +*Next* key is the one on the top left of the keyboard. Preparing the device for the installation Before installing Libreboot on the device, both its software and hardware has to be prepared to allow the installation procedure and to ensure that security features don't get in the way. -Configuring verified boot parameters {#configuring_verified_boot_parameters} +Configuring verified boot parameters ------------------------------------ It is recommended to have access to the [developer mode @@ -89,7 +78,7 @@ parameters](../depthcharge/#configuring_verified_boot_parameters): Those changes can be reverted later, when the device is known to be in a working state. -Removing the write protect screw {#removing_write_protect_screw} +Removing the write protect screw -------------------------------- Since part of the SPI flash is write-protected by a screw, it is @@ -99,8 +88,8 @@ writing Libreboot to the *read-only* part of the flash. To access the screw, the device has to be opened. There are 8 screws to remove from the bottom of the device, as shown on the picture below. Two are hidden under the top pads. After removing the screws, the keyboard -plastic part can be carefully detached from the rest. **Beware: there -are cables attached to it!** It is advised to flip the keyboard plastic +plastic part can be carefully detached from the rest. *Beware: there +are cables attached to it!* It is advised to flip the keyboard plastic part over, as shown on the picture below. The write protect screw is located next to the SPI flash chip, circled in red in the picture below. It has to be removed. @@ -111,7 +100,7 @@ screw](images/c201/wp-screw.jpg)](images/c201/wp-screw.jpg) The write protect screw can be put back in place later, when the device is known to be in a working state. -Installing Libreboot to the SPI flash {#installing_libreboot_spi_flash} +Installing Libreboot to the SPI flash ===================================== The SPI flash (that holds Libreboot) is divided into various partitions @@ -119,28 +108,32 @@ that are used to implement parts of the CrOS security system. Libreboot is installed in the *read-only* coreboot partition, that becomes writable after removing the write-protect screw. -Installing Libreboot internally, from the device {#installing_libreboot_internally} +Installing Libreboot internally, from the device ------------------------------------------------ Before installing Libreboot to the SPI flash internally, the device has to be reassembled. -All the files from the **veyron\_speedy** release (or build) have to be +All the files from the `veyron_speedy` release (or build) have to be transferred to the device. The following operations have to be executed with root privileges on the -device (e.g. using the *root* account). In addition, the -**cros-flash-replace** script has to be made executable: +device (e.g. using the `root` account). In addition, the +`cros-flash-replace` script has to be made executable: + # chmod a+x cros-flash-replace The SPI flash has to be read first: - # flashrom -p host -r flash.img\ -**Note: it might be a good idea to copy the produced flash.img file at -this point and store it outside of the device for backup purposes.** -Then, the **cros-flash-replace** script has to be executed as such: + # flashrom -p host -r flash.img + +*Note: it might be a good idea to copy the produced flash.img file at +this point and store it outside of the device for backup purposes.* + +Then, the `cros-flash-replace` script has to be executed as such: # ./cros-flash-replace flash.img coreboot ro-frid + If any error is shown, it is definitely a bad idea to go further than this point. @@ -148,12 +141,13 @@ The resulting flash image can then be flashed back: # flashrom -p host -w flash.img -You should also see within the output the following:\ -**"Verifying flash\... VERIFIED."** +You should also see within the output the following: + + Verifying flash... VERIFIED. Shut down. The device will now boot to Libreboot. -Installing Libreboot externally, with a SPI flash programmer {#installing_libreboot_externally} +Installing Libreboot externally, with a SPI flash programmer ------------------------------------------------------------ Before installing Libreboot to the SPI flash internally, the device has @@ -161,7 +155,7 @@ to be opened. The SPI flash is located next to the write protect screw. Its layout is indicated in the picture below. Note that it is not necessary to connect -**WP\#** since removing the screw already connects it to ground. Before +`WP#` since removing the screw already connects it to ground. Before writing to the chip externally, the battery connector has to be detached. It is located under the heat spreader, that has to be unscrewed from the rest of the case. The battery connector is located on @@ -172,24 +166,26 @@ layout](images/c201/spi-flash-layout.jpg)](images/c201/spi-flash-layout.jpg) [](images/c201/battery-connector.jpg) -All the files from the **veyron\_speedy** release (or build) have to be +All the files from the `veyron_speedy` release (or build) have to be transferred to the host. The following operations have to be executed with root privileges on the -host (e.g. using the *root* account). In addition, the -**cros-flash-replace** script has to be made executable: +host (e.g. using the `root` account). In addition, the +`cros-flash-replace` script has to be made executable: # chmod a+x cros-flash-replace The SPI flash has to be read first (using the right spi programmer): # flashrom -p *programmer* -r flash.img -**Note: it might be a good idea to copy the produced flash.img file at -this point and store it outside of the device for backup purposes.** -Then, the **cros-flash-replace** script has to be executed as such: +*Note: it might be a good idea to copy the produced flash.img file at +this point and store it outside of the device for backup purposes.* + +Then, the `cros-flash-replace` script has to be executed as such: # ./cros-flash-replace flash.img coreboot ro-frid + If any error is shown, it is definitely a bad idea to go further than this point. @@ -198,8 +194,9 @@ programmer): # flashrom -p *programmer* -w flash.img -You should also see within the output the following:\ -**"Verifying flash\... VERIFIED."** +You should also see within the output the following: + + Verifying flash... VERIFIED. The device will now boot to Libreboot. @@ -211,8 +208,6 @@ See <https://wiki.debian.org/InstallingDebianOn/Asus/C201>. Copyright © 2015 Paul Kocialkowski <contact@paulk.fr>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/d510mo.md b/docs/install/d510mo.md index 818b5464..4a03c29c 100644 --- a/docs/install/d510mo.md +++ b/docs/install/d510mo.md @@ -9,6 +9,7 @@ Flash chip size {#flashchips} =============== Use this to find out: + # flashrom -p internal -V Flashing instructions {#clip} @@ -22,8 +23,6 @@ This is an image of the flash chip, for reference:\ Copyright © 2016 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/d945gclf.md b/docs/install/d945gclf.md index 4a87b1c3..ddb52a64 100644 --- a/docs/install/d945gclf.md +++ b/docs/install/d945gclf.md @@ -19,8 +19,6 @@ Here is an image of the flash chip:\ Copyright © 2016 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/ga-g41m-es2l.md b/docs/install/ga-g41m-es2l.md index a11364ed..0330c076 100644 --- a/docs/install/ga-g41m-es2l.md +++ b/docs/install/ga-g41m-es2l.md @@ -9,17 +9,18 @@ Flash chip size {#flashchips} =============== Use this to find out: + # flashrom -p internal -V Flashing instructions {#clip} ===================== Refer to [bbb\_setup.md](bbb_setup.md) for how to set up the BBB for -external flashing. **You can only externally reprogram one of the chips +external flashing. *You can only externally reprogram one of the chips at a time, and you need to disable the chip that you're not flashing, by connecting 3v3 to /CS of that chip, so you will actually need 2 test clips (you also need to connect GND on the chip that you're -disabling).** +disabling).* Here is an image of the flash chip:\  @@ -27,11 +28,13 @@ Here is an image of the flash chip:\ Internal flashing is possible. Boot with the proprietary BIOS and GNU+Linux. There are 2 flash chips (one is backup). -Flash the first chip:\ -**./flashrom -p internal:dualbiosindex=0 -w libreboot.rom** +Flash the first chip: + + ./flashrom -p internal:dualbiosindex=0 -w libreboot.rom + +Flash the second chip: -Flash the second chip:\ -**./flashrom -p internal:dualbiosindex=1 -w libreboot.rom** + ./flashrom -p internal:dualbiosindex=1 -w libreboot.rom NOTE: you can still boot the system with just the main flash chip connected, after desoldering the backup chip. This has been tested while @@ -46,8 +49,6 @@ operating system. Copyright © 2016 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/images/x200/disassembly/0006.1.jpg b/docs/install/images/x200/disassembly/0006.1.jpg Binary files differnew file mode 100644 index 00000000..1888012b --- /dev/null +++ b/docs/install/images/x200/disassembly/0006.1.jpg diff --git a/docs/install/index.md b/docs/install/index.md index 4bd14cf1..70dd554e 100644 --- a/docs/install/index.md +++ b/docs/install/index.md @@ -4,10 +4,10 @@ title: Installation instructions This section relates to installing Libreboot on supported targets. -**NOTE: if running flashrom -p internal for software based flashing, and -you get an error related to /dev/mem access, you should reboot with -iomem=relaxed kernel parameter before running flashrom, or use a kernel -that has CONFIG\_STRICT\_DEVMEM not enabled.** +NOTE: if running `flashrom -p internal` for software based flashing, and you +get an error related to `/dev/mem` access, you should reboot with +`iomem=relaxed` kernel parameter before running flashrom, or use a kernel that +has `CONFIG_STRICT_DEVMEM` not enabled. Which systems are Libreboot compatible with? -------------------------------------------- @@ -28,14 +28,11 @@ Flashing via software methods, on system: - [Apple MacBook2,1](#flashrom_macbook21) - [ASUS Chromebook C201](c201.md) -Setting up programmers, for external flashing via hardware method +Setting up programmers, for external SPI flashing ----------------------------------------------------------------- -- [How to program an SPI flash chip with the BeagleBone - Black](bbb_setup.md) - -- [How to program an SPI flash chip with the Raspberry - Pi](rpi_setup.md) +- [BeagleBone Black Setup](bbb_setup.md) +- [Raspberry Pi Setup](rpi_setup.md) Flashing via hardware methods, on system: ----------------------------------------- @@ -63,15 +60,14 @@ source code. These images are provided for user convenience, so that they don't have to build anything from source on their own. The ROM images in each archive use the following at the end of the file -name, if they are built with the GRUB payload: -**\_*keymap*\_*mode*.rom** +name, if they are built with the GRUB payload: `*_*keymap*_*mode*.rom` -Available *modes*: **vesafb** or **txtmode**. The *vesafb* ROM images -are recommended, in most cases; *txtmode* ROM images come with +Available `modes`: `vesafb` or `txtmode`. The `vesafb` ROM images +are recommended, in most cases; `txtmode` ROM images come with MemTest86+, which requires text-mode instead of the usual framebuffer used by coreboot native graphics initialization. -*keymap* can be one of several keymaps that keyboard supports (there are +`keymap` can be one of several keymaps that keyboard supports (there are quite a few), which affects the keyboard layout configuration that is used in GRUB. It doesn't matter which ROM image you choose here, as far as the keymap in GNU+Linux is concerned. @@ -87,12 +83,10 @@ Libreboot comes with ROM images built for QEMU, by default: Examples of how to use libreboot ROM images in QEMU: -- \$ **qemu-system-i386 -M q35 -m 512 -bios - qemu\_q35\_ich9\_keymap\_mode.rom** -- \$ **qemu-system-i386 -M pc -m 512 -bios - qemu\_i440fx\_piix4\_keymap\_mode.rom** + $ qemu-system-i386 -M q35 -m 512 -bios qemu_q35_ich9_keymap_mode.rom + $ qemu-system-i386 -M pc -m 512 -bios qemu_i440fx_piix4_keymap_mode.rom -You can optionally specify the **-serial stdio** argument, so that QEMU +You can optionally specify the `-serial stdio` argument, so that QEMU will emulate a serial terminal on the standard input/output (most likely your terminal emulator or TTY). @@ -108,8 +102,8 @@ any dedicated hardware. In other words, you can do everything entirely in software, directly from the OS that is running on your libreboot system. -**If you are using libreboot\_src or git, then make sure that you built -the sources first (see [../git/\#build](../git/#build)).** +*If you are using `libreboot_src` or git, then make sure that you built the +sources first (see [../git/\#build](../git/#build)).* Look at the [list of ROM images](#rom) to see which image is compatible with your device. @@ -149,9 +143,9 @@ now have a backup of the old image). Keeping at least one spare LPC PLCC chip with working firmware on it is highly recommended, in case of bricks. -**DO NOT hot-swap the chip with your bare hands. Use a PLCC chip +*DO NOT hot-swap the chip with your bare hands. Use a PLCC chip extractor. These can be found online. See -<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>** +<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>* Do check the HCL entry: [../hardware/kfsn4-dre.md](../hardware/kfsn4-dre.md) @@ -165,9 +159,9 @@ If you already have coreboot or libreboot installed, without write protection on the flash chip, then you can do it in software (otherwise, see link above). -**DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip +*DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip extractor. These can be found online. See -<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>** +<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>* Do check the HCL entry: [../hardware/kgpe-d16.md](../hardware/kgpe-d16.md) @@ -181,9 +175,9 @@ If you already have coreboot or libreboot installed, without write protection on the flash chip, then you can do it in software (otherwise, see link above). -**DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip +*DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip extractor. These can be found online. See -<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>** +<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>* Do check the HCL entry: [../hardware/kcma-d8.md](../hardware/kcma-d8.md) @@ -215,13 +209,13 @@ write-protected SPI flash requires external re-flashing, as is also the case when running the proprietary firmware). If you did not write-protect the flash chip, or it came to you without -any write-protection (***libreboot does not write-protect the flash chip -by default, so this probably applies to you***), read on! +any write-protection (*libreboot does not write-protect the flash chip +by default, so this probably applies to you*), read on! MAC address on GM45 (X200/R400/T400/T500/W500) ----------------------------------------- -**Users of the X200/R400/T400/T500/W500 take note:** The MAC address for the +*Users of the X200/R400/T400/T500/W500 take note:* The MAC address for the onboard ethernet chipset is located inside the flash chip. Libreboot ROM images for these laptops contain a generic MAC address by default, but this is not what you want. *Make sure to change the MAC address inside @@ -241,20 +235,21 @@ Apple iMac 5,2? Internal flashing works, even when flashing from Apple EFI to libreboot. Continue reading the instructions below. -**NOTE: If you're flashing an older version of Libreboot, the iMac5,2 +*NOTE: If you're flashing an older version of Libreboot, the iMac5,2 motherboard is compatible with the MacBook2,1. Simply flash a MacBook2,1 -ROM image, and it should work.** +ROM image, and it should work.* Flash chip size --------------- Use this to find out: + # flashrom -p internal -V All good? --------- -Excellent! Moving on\... +Excellent! Moving on... Download the *libreboot\_util.tar.xz* archive, and extract it. Inside, you will find a directory called *flashrom*. This contains statically @@ -268,6 +263,7 @@ appropriate executable. It is also possible for you to build these executables from the libreboot source code archives. How to update the flash chip contents: + $ sudo ./flash update [yourrom.rom](#rom) Ocassionally, coreboot changes the name of a given board. If flashrom @@ -276,88 +272,100 @@ correct ROM image, then run this alternative command: $ sudo ./flash forceupdate [yourrom.rom](#rom) -You should see **"Verifying flash\... VERIFIED."** written at the end -of the flashrom output. **Shut down** after you see this, and then boot +You should see `Verifying flash... VERIFIED.` written at the end +of the flashrom output. *Shut down* after you see this, and then boot up again after a few seconds. ThinkPad X60/T60: Initial installation guide (if running the proprietary firmware) {#flashrom_lenovobios} ================================================================================== -**This is for the ThinkPad X60 and T60 while running Lenovo BIOS. If you +*This is for the ThinkPad X60 and T60 while running Lenovo BIOS. If you already have coreboot or libreboot running, then go to -[\#flashrom](#flashrom) instead!** +[\#flashrom](#flashrom) instead!* -**If you are flashing a Lenovo ThinkPad T60, be sure to read -[../hardware/\#supported\_t60\_list](../hardware/#supported_t60_list)** +*If you are flashing a Lenovo ThinkPad T60, be sure to read +[../hardware/\#supported\_t60\_list](../hardware/#supported_t60_list)* -**If you are using libreboot\_src or git, then make sure that you built -the sources first (see [../git/\#build](../git/#build)).** +*If you are using libreboot\_src or git, then make sure that you built +the sources first (see [../git/\#build](../git/#build)).* -**Warning: this guide will not instruct the user how to backup the +*Warning: this guide will not instruct the user how to backup the original Lenovo BIOS firmware. These backups are tied to each system, and will not work on any other. For that, please refer to -<http://www.coreboot.org/Board:lenovo/x60/Installation>.** +<http://www.coreboot.org/Board:lenovo/x60/Installation>.* + +*If you're using libreboot 20150518, note that there is a mistake in +the flashing script. do this: * -**If you're using libreboot 20150518, note that there is a mistake in -the flashing script. do this: *rm -f patch && wget -O flash -https://notabug.org/libreboot/libreboot/raw/9d850543ad90b72e0e333c98075530b31e5d23f1/flash -&& chmod +x flash*** + rm -f patch + wget -O flash https://notabug.org/libreboot/libreboot/raw/9d850543ad90b72e0e333c98075530b31e5d23f1/flash + chmod +x flash The first half of the procedure is as follows: $ sudo ./flash i945lenovo\_firstflash [yourrom.rom](#rom). -You should see within the output the following:\ -**"Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000 -are swapped"**. +You should see within the output the following: + + Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000 are + swapped + +You should also see within the output the following: + + Your flash chip is in an unknown state + ... + FAILED + ... + DO NOT REBOOT OR POWEROFF -You should also see within the output the following:\ -**"Your flash chip is in an unknown state"**, **"FAILED"** and -**"DO NOT REBOOT OR POWEROFF"**\ -Seeing this means that the operation was a **resounding** success! -**DON'T PANIC**. +Seeing this means that the operation was a *resounding* success! +*DON'T PANIC*. See this link for more details: <http://thread.gmane.org/gmane.linux.bios.flashrom/575>. -If the above is what you see, then **SHUT DOWN**. Wait a few seconds, +If the above is what you see, then *SHUT DOWN*. Wait a few seconds, and then boot; libreboot is running, but there is a 2nd procedure -**\*needed\*** (see below). +needed (see below). When you have booted up again, you must also do this: $ sudo ./flash i945lenovo\_secondflash [yourrom.rom](#rom) -If flashing fails at this stage, try the following:\ -\$ **sudo ./flashrom/i686/flashrom -p -internal:laptop=force\_I\_want\_a\_brick -w [yourrom.rom](#rom)** +If flashing fails at this stage, try the following: -You should see within the output the following:\ -**"Updated BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is -untranslated"** + # sudo ./flashrom/i686/flashrom -p -You should also see within the output the following:\ -**"Verifying flash\... VERIFIED."** +internal:laptop=force\_I\_want\_a\_brick -w [yourrom.rom](#rom) + +You should see within the output the following: + + Updated BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is + untranslated + +You should also see within the output the following: + + Verifying flash... VERIFIED. MacBook2,1: Initial installation guide (if running the proprietary firmware) {#flashrom_macbook21} ============================================================================ -**If you have a MacBook1,1, refer to -[../hardware/\#macbook11](../hardware/#macbook11) for flashing instructions.** +*If you have a MacBook1,1, refer to +[../hardware/\#macbook11](../hardware/#macbook11) for flashing instructions.* -**This is for the MacBook2,1 while running Apple EFI firmware. If you +*This is for the MacBook2,1 while running Apple EFI firmware. If you already have coreboot or libreboot running, then go to -[\#flashrom](#flashrom) instead!** +[\#flashrom](#flashrom) instead!* Be sure to read the information in [../hardware/\#macbook21](../hardware/#macbook21). -**Warning: this guide will not instruct the user how to backup the +*Warning: this guide will not instruct the user how to backup the original Apple EFI firmware. For that, please refer to -<http://www.coreboot.org/Board:apple/macbook21>.** +<http://www.coreboot.org/Board:apple/macbook21>.* -**If you are using libreboot\_src or git, then make sure that you built -the sources first (see [../git/\#build](../git/#build)).** +*If you are using libreboot\_src or git, then make sure that you built +the sources first (see [../git/\#build](../git/#build)).* Look at the [list of ROM images](#rom) to see which image is compatible with your device. @@ -366,15 +374,14 @@ Use this flashing script, to install libreboot: $ sudo ./flash i945apple\_firstflash [yourrom.rom](#rom) -You should also see within the output the following:\ -**"Verifying flash\... VERIFIED."** +You should also see within the output the following: + + Verifying flash... VERIFIED. Shut down. Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/kcma-d8.md b/docs/install/kcma-d8.md index 5c2f8d47..8f9ecfc1 100644 --- a/docs/install/kcma-d8.md +++ b/docs/install/kcma-d8.md @@ -1,5 +1,6 @@ --- title: KCMA-D8 external flashing instructions +x-toc-enable: true ... Initial flashing instructions for kcma-d8. @@ -9,19 +10,14 @@ motherboard, while they still have the proprietary ASUS BIOS present. This guide can also be followed (adapted) if you brick you board, to know how to recover. -**Memory initialization is still problematic, for some modules. We -recommend avoiding Kingston modules.** +*Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules.* For more general information about this board, refer to [../hardware/kcma-d8.md](../hardware/kcma-d8.md). TODO: show photos here, and other info. -- [kcma-d8 boards (and full systems) with libreboot - preinstalled](#preinstall) - -- [External programmer](#programmer) - External programmer {#programmer} =================== @@ -30,13 +26,11 @@ an external SPI programmer. The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, which you take out and then re-flash with libreboot, using -the programmer. **DO NOT** remove the chip with your hands. Use a chip +the programmer. *DO NOT* remove the chip with your hands. Use a chip extractor tool. Copyright © 2016 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/kgpe-d16.md b/docs/install/kgpe-d16.md index ab73cdea..9810179f 100644 --- a/docs/install/kgpe-d16.md +++ b/docs/install/kgpe-d16.md @@ -1,5 +1,6 @@ --- title: KGPE-D16 external flashing instructions +x-toc-enable: true ... Initial flashing instructions for KGPE-D16. @@ -9,20 +10,15 @@ motherboard, while they still have the proprietary ASUS BIOS present. This guide can also be followed (adapted) if you brick you board, to know how to recover. -**Memory initialization is still problematic, for some modules. We -recommend avoiding Kingston modules.** +*Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules.* For more general information about this board, refer to [../hardware/kgpe-d16.md](../hardware/kgpe-d16.md). TODO: show photos here, and other info. -- [KGPE-D16 boards (and full systems) with libreboot - preinstalled](#preinstall) - -- [External programmer](#programmer) - -External programmer {#programmer} +External programmer =================== Refer to [bbb\_setup.md](bbb_setup.md) for a guide on how to set up @@ -30,13 +26,11 @@ an external SPI programmer. The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, which you take out and then re-flash with libreboot, using -the programmer. **DO NOT** remove the chip with your hands. Use a chip +the programmer. *DO NOT* remove the chip with your hands. Use a chip extractor tool. Copyright © 2015 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/r400_external.md b/docs/install/r400_external.md index 7d5721aa..366896cb 100644 --- a/docs/install/r400_external.md +++ b/docs/install/r400_external.md @@ -32,8 +32,8 @@ A note about CPUs [ThinkWiki](http://www.thinkwiki.org/wiki/Category:R400) has a list of CPUs for this system. The Core 2 Duo P8400 and P8600 are believed to work in libreboot. The Core 2 Duo T9600 was confirmed to work, so the -T9400 probably also works. **The Core 2 Duo T5870/5670 and Celeron M -575/585 are untested!** +T9400 probably also works. *The Core 2 Duo T5870/5670 and Celeron M +575/585 are untested!* Quad-core CPUs -------------- @@ -62,6 +62,7 @@ Flash chip size {#flashchips} =============== Use this to find out: + # flashrom -p internal -V MAC address {#macaddress} @@ -214,7 +215,9 @@ Log in as root on your BBB, using the instructions in [bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access). Test that flashrom works: - # ./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512\ + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512\ + In this case, the output was: flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) @@ -227,19 +230,28 @@ In this case, the output was: Please specify which chip definition to use with the -c <chipname> option. How to backup factory.rom (change the -c option as neeed, for your flash -chip):\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory.rom**\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory1.rom**\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory2.rom**\ -Note: the **-c** option is not required in libreboot's patched +chip): + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory1.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory2.rom + +Note: the `-c` option is not required in libreboot's patched flashrom, because the redundant flash chip definitions in *flashchips.c* -have been removed.\ +have been removed. + Now compare the 3 images: - # sha512sum factory\*.rom + # sha512sum factory*.rom + If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not the BBB). This is useful for reverse engineering work, if there is a desirable @@ -250,19 +262,21 @@ Follow the instructions at [../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) to change the MAC address inside the libreboot ROM image, before flashing it. Although there is a default MAC address inside the ROM -image, this is not what you want. **Make sure to always change the MAC -address to one that is correct for your system.** +image, this is not what you want. *Make sure to always change the MAC +address to one that is correct for your system.* -Now flash it:\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w -path/to/libreboot/rom/image.rom -V** +Now flash it: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +path/to/libreboot/rom/image.rom -V  -You might see errors, but if it says **Verifying flash\... VERIFIED** at +You might see errors, but if it says `Verifying flash... VERIFIED` at the end, then it's flashed and should boot. If you see errors, try -again (and again, and again); the message **Chip content is identical to -the requested image** is also an indication of a successful +again (and again, and again); the message `Chip content is identical to +the requested image` is also an indication of a successful installation. Example output from running the command (see above): @@ -352,8 +366,6 @@ Now [install GNU+Linux](../gnulinux/). Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/rpi_setup.md b/docs/install/rpi_setup.md index 64389a78..e74432d4 100644 --- a/docs/install/rpi_setup.md +++ b/docs/install/rpi_setup.md @@ -2,33 +2,29 @@ title: How to program an SPI flash chip with the Raspberry Pi ... -This document exists as a guide for reading from or writing to an SPI -flash chip with the Raspberry Pi, using the -[flashrom](http://flashrom.org/Flashrom) software. Most revisions of the -RPi should work. +This document exists as a guide for reading from or writing to an SPI flash +chip with the Raspberry Pi, using the [flashrom](http://flashrom.org/Flashrom) +software. Most revisions of the RPi should work. The Libreboot project recommends using [blobless GNU+Linux](https://blog.rosenzweig.io/blobless-linux-on-the-pi.html) -on the Raspberry Pi, to avoid having to run non-free software. This -only became possible in February 2017 and the instructions below are -not yet updated with the necessary steps, so please do not follow the -steps below unless you are willing to run non-free software on your -Raspberry Pi. +on the Raspberry Pi, to avoid having to run non-free software. This only became +possible in February 2017 and the instructions below are not yet updated with +the necessary steps, so please do not follow the steps below unless you are +willing to run non-free software on your Raspberry Pi. -This only covers SOIC-8 flash chips, for now. SOIC-16 guide coming later -(for now, it should be easy enough for you to figure this out for -SOIC-16). +This only covers SOIC-8 flash chips, for now. SOIC-16 guide coming later (for +now, it should be easy enough for you to figure this out for SOIC-16). -[](#raspberry-pi-thinkpad-x60t60-and-macbook-21){#user-content-raspberry-pi-thinkpad-x60t60-and-macbook-21 .anchor}Raspberry Pi (ThinkPad X60/T60 and Macbook 2,1) ------------------------------------------------------------------------------------------------------------------------------------------------------------------- +Raspberry Pi (ThinkPad X60/T60 and Macbook 2,1) +------------------------------------------------ The Raspberry Pi (a multipurpose \$25 GNU+Linux computer) can be used as a BIOS flashing tool, thanks to its GPIO pins and SPI support. -> **Note:** The Raspberry Pi Model A is not supported, since it has no -> GPIO pins. +Note: The Raspberry Pi Model A is not supported, since it has no GPIO pins. -### [](#disassembling-the-thinkpad){#user-content-disassembling-the-thinkpad .anchor}Disassembling the ThinkPad +### Disassembling the ThinkPad Follow the [X60 Hardware Maintenance Manual](http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42x3550_04.pdf) @@ -45,7 +41,7 @@ Guide](t60_unbrick.md). - On the T60, the BIOS chip is just under the palmrest, but blocked by a magnesium frame (which you will have to remove). -### [](#pomona-clip-pinout){#user-content-pomona-clip-pinout .anchor}Pomona Clip Pinout +### Pomona Clip Pinout Diagram of the 26 GPIO Pins of the Raspberry Pi Model B (for the Model B+ with 40 pins, start counting from the right and leave 14 pins): @@ -78,7 +74,7 @@ detect a chip, or it will "detect" a `0x0` chip. Finally, make sure that the Pomona clip makes contact with the metal wires of the chip. It can be a challenge, but keep trying. -### [](#how-to-supply-power-to-the-flashchip){#user-content-how-to-supply-power-to-the-flashchip .anchor}How to supply power to the flashchip +### How to supply power to the flashchip There are two ways to supply power to the chip: plugging in an AC adapter (without turning the laptop on), and using the 8th 3.3v pin. @@ -86,12 +82,12 @@ adapter (without turning the laptop on), and using the 8th 3.3v pin. I have found that the SST chips work best with the 8th pin, while the Macronix chips require an AC Adapter to power up. -**Never connect both the 8th pin and the AC adapter at the same time.** +*Never connect both the 8th pin and the AC adapter at the same time.* Your results may vary. -[](#reading-the-flashchip){#user-content-reading-the-flashchip .anchor}Reading the Flashchip --------------------------------------------------------------------------------------------- +Reading the Flashchip +---------------------- First, visually inspect (with a magnifying glass) the type of flashchip on the motherboard. @@ -99,7 +95,7 @@ on the motherboard. Next, download and compile the latest Flashrom source code on the Raspberry Pi. - sudo apt-get install build-essential pciutils usbutils libpci-dev libusb-dev libftdi1 libftdi-dev zlib1g-dev subversion + sudo apt-get install build-essential pciutils usbutils libpci-dev libusb-dev libftdi1 libftdi-dev zlib1g-dev subversion libusb-1.0-0-dev svn co svn://flashrom.org/flashrom/trunk flashrom cd flashrom make @@ -127,11 +123,11 @@ If the md5sums match after three tries, `flashrom` has managed to read the flashchip precisely (but not always accurately). You may try and flash Libreboot now. -[](#flashing-libreboot){#user-content-flashing-libreboot .anchor}Flashing Libreboot ------------------------------------------------------------------------------------ +Flashing Libreboot +------------------- -> **Note:** replace `/path/to/libreboot.rom` with the location of your -> chosen ROM, such as `../bin/x60/libreboot_usqwerty.rom`): +Note: replace `/path/to/libreboot.rom` with the location of your chosen ROM, +such as `../bin/x60/libreboot_usqwerty.rom`): If your chip is an SST, run this command: @@ -148,14 +144,14 @@ successfully. If not, just flash again. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED. -### [](#sources){#user-content-sources .anchor}Sources +### Sources - [Scruss - Simple ADC with the Raspberry Pi](http://scruss.com/blog/2013/02/02/simple-adc-with-the-raspberry-pi/) - [Flashing coreboot on a T60 with a Raspberry Pi - the\_unconventional's blog](https://blogs.fsfe.org/the_unconventional/2015/05/08/flashing-coreboot-on-a-t60-with-a-raspberry-pi/) -- **Pomona SOIC Clip flashing** +- *Pomona SOIC Clip flashing* - [Arch Linux Wiki - Installing Arch Linux on Chromebook](https://wiki.archlinux.org/index.php/Chromebook) - [Google Drive - Raspberry Pi SOIC Clip @@ -163,7 +159,7 @@ successfully. If not, just flash again. - [rPI with Flashrom and SOIC Clip Powerpoint](http://satxhackers.org/wp/hack-content/uploads/2013/04/rPI_flashrom.pdf) -### [](#raspberry-pi-pinout-diagrams){#user-content-raspberry-pi-pinout-diagrams .anchor}Raspberry Pi Pinout Diagrams +### Raspberry Pi Pinout Diagrams MCP 3008 Pin Pi GPIO Pin \# Pi Pin Name ----- ---------- ---------------- -------------------- @@ -179,10 +175,10 @@ successfully. If not, just flash again. - Source: [Perl & Raspberry Pi - Raspberry Pi GPIO Pinout](http://raspberrypi.znix.com/hipidocs/topic_gpiopins.htm) -[](#raspberry-pi-thinkpad-x200){#user-content-raspberry-pi-thinkpad-x200 .anchor}Raspberry Pi (ThinkPad X200) -------------------------------------------------------------------------------------------------------------- +Raspberry Pi (ThinkPad X200) +----------------------------- -### [](#requirements){#user-content-requirements .anchor}Requirements: +### Requirements: - An x86, x86\_64, or arm7l (for changing the libreboot.rom image mac address) @@ -196,16 +192,12 @@ Follow the [ThinkPad X200: Initial installation guide](x200_external.md) to disassemble the laptop, and access the BIOS rom chip. -> **Note:** `x86#` refers to commands to be run on the x86 computer, and -> `pi#` refers to commands to be run on the pi. A good practice is to -> make a work directory to keep your libreboot stuff inside. +Note: `x86#` refers to commands to be run on the x86 computer, and `pi#` refers +to commands to be run on the pi. A good practice is to make a work directory to +keep your libreboot stuff inside. x86# mkdir ~/work -Download NOOBS from [The Raspberry Pi -Foundation.](https://www.raspberrypi.org/downloads/) Torrent download -recommended, and remember to seed. :) - If you're running Raspian, you can do **sudo raspi-config**, enable SPI under Advanced and then spidev will be enabled. Simple, eh? @@ -217,43 +209,9 @@ GPG signature as well. x86# for signature in $(ls *.sig); do gpg --verify $signature; done -Extract NOOBS and libreboot. - - x86# mkdir ~/work/noobs - - x86# unzip ~/Downloads/NOOBS_v1_4_1.zip -d ~/work/noobs/ - - x86# cd ~/work && tar -xvJf ~/Downloads/libreboot_bin.tar.xz - -Install Noobs to your fat32 formatted SD card - - x86# cp -R ~/work/noobs/* /path/to/mounted/SDcard/ - -### [](#set-up-noobs-on-raspberry-pi){#user-content-set-up-noobs-on-raspberry-pi .anchor}Set up NOOBS on Raspberry Pi - -Plug in the NOOBs SDCard to your Raspberry Pi, and enable the following -under 'Advanced Options': - -SSH server - -SPI - -I2C - -On first boot - - pi# sudo apt-get update && sudo apt-get dist-upgrade && reboot - -On second boot - - pi# sudo apt-get update && sudo apt-get install libftdi1 libftdi-dev libusb-dev libpci-dev subversion - -Other dependencies that should already be installed with the noobs base -install include: - -pciutils, zlib, libusb, build-essential +Install dependencies: -If they are missing then install them. + pi# sudo apt-get update && sudo apt-get install libftdi1 libftdi-dev libusb-dev libpci-dev subversion libusb-1.0-0-dev pciutils, zlib, libusb, build-essential Download and build flashrom. @@ -309,10 +267,10 @@ text. 15 S1/SIO0 19 16 SCLK 23 -> **Note:** The raspberry pi 3.3V rail should be sufficient to power the -> chip during flashing, so no external power supply should be required; -> however, at the time of writing that has only been tested and -> confirmed for one chip, the MX25L6405D. +Note: The raspberry pi 3.3V rail should be sufficient to power the chip during +flashing, so no external power supply should be required; however, at the time +of writing that has only been tested and confirmed for one chip, the +MX25L6405D. Macronix Spec sheet so you can adjust your pinout for 8 pin 4Mb chips as necessary @@ -353,8 +311,8 @@ done. Shut down your pi, put your box back together, and install a libre OS for great good! -[](#raspberry-pi-c720-chromebook){#user-content-raspberry-pi-c720-chromebook .anchor}Raspberry Pi (C720 Chromebook) -------------------------------------------------------------------------------------------------------------------- +Raspberry Pi (C720 Chromebook) +------------------------------- The Raspberry Pi (a multipurpose \$25 GNU+Linux computer) can be used as a BIOS flashing tool, thanks to its GPIO pins and SPI support. @@ -408,14 +366,14 @@ Finally, put the Pomona SOIC clip on the chip:  -### [](#flashrom){#user-content-flashrom .anchor}Flashrom +### Flashrom [Once it's all set up, flashrom works out of the box.](http://www.flashrom.org/RaspberryPi) -### [](#sources-1){#user-content-sources-1 .anchor}Sources +### Sources -- **Pomona SOIC Clip flashing** +- *Pomona SOIC Clip flashing* - [Arch Linux Wiki - Installing Arch Linux on Chromebook](https://wiki.archlinux.org/index.php/Chromebook) - [Google Drive - Raspberry Pi SOIC Clip @@ -424,7 +382,7 @@ box.](http://www.flashrom.org/RaspberryPi) Powerpoint](http://satxhackers.org/wp/hack-content/uploads/2013/04/rPI_flashrom.pdf) - [Tnhh - Unbricking Chromebook with Beaglebone](http://www.tnhh.net/2014/08/25/unbricking-chromebook-with-beaglebone.md) -- **Use a DIY DIP System to flash an desoldered BIOS chip** +- *Use a DIY DIP System to flash an desoldered BIOS chip* - [Viktak - How to recover laptop after failed BIOS flash](http://diy.viktak.com/2014/07/how-to-recover-laptop-after-failed-bios.md) - [Win-Raid - Recover from Failed BIOS Flashing using Raspberry diff --git a/docs/install/t400_external.md b/docs/install/t400_external.md index b3773c34..d48c15d4 100644 --- a/docs/install/t400_external.md +++ b/docs/install/t400_external.md @@ -59,6 +59,7 @@ Flash chip size {#flashchips} =============== Use this to find out: + # flashrom -p internal -V MAC address {#macaddress} @@ -212,7 +213,9 @@ Log in as root on your BBB, using the instructions in [bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access). Test that flashrom works: - # ./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 + In this case, the output was: flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) @@ -225,19 +228,27 @@ In this case, the output was: Please specify which chip definition to use with the -c <chipname> option. How to backup factory.rom (change the -c option as neeed, for your flash -chip):\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory.rom**\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory1.rom**\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory2.rom**\ -Note: the **-c** option is not required in libreboot's patched -flashrom, because the redundant flash chip definitions in *flashchips.c* -have been removed.\ +chip): + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory1.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory2.rom + +Note: the `-c` option is not required in libreboot's patched flashrom, because +the redundant flash chip definitions in `flashchips.c` have been removed. + Now compare the 3 images: - # sha512sum factory\*.rom + # sha512sum factory*.rom + If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not the BBB). This is useful for reverse engineering work, if there is a desirable @@ -248,19 +259,21 @@ Follow the instructions at [../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) to change the MAC address inside the libreboot ROM image, before flashing it. Although there is a default MAC address inside the ROM -image, this is not what you want. **Make sure to always change the MAC -address to one that is correct for your system.** +image, this is not what you want. *Make sure to always change the MAC +address to one that is correct for your system.* -Now flash it:\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w -path/to/libreboot/rom/image.rom -V** +Now flash it: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +path/to/libreboot/rom/image.rom -V  -You might see errors, but if it says **Verifying flash\... VERIFIED** at +You might see errors, but if it says `Verifying flash... VERIFIED` at the end, then it's flashed and should boot. If you see errors, try -again (and again, and again); the message **Chip content is identical to -the requested image** is also an indication of a successful +again (and again, and again); the message `Chip content is identical to +the requested image` is also an indication of a successful installation. Example output from running the command (see above): @@ -350,8 +363,6 @@ Now [install GNU+Linux](../gnulinux/). Copyright © 2015 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/t500_external.md b/docs/install/t500_external.md index 567f9159..5490744f 100644 --- a/docs/install/t500_external.md +++ b/docs/install/t500_external.md @@ -61,6 +61,7 @@ Flash chip size {#flashchips} =============== Use this to find out: + # flashrom -p internal -V MAC address {#macaddress} @@ -229,7 +230,9 @@ Log in as root on your BBB, using the instructions in [bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access). Test that flashrom works: - # ./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 + In this case, the output was: flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) @@ -242,19 +245,27 @@ In this case, the output was: Please specify which chip definition to use with the -c <chipname> option. How to backup factory.rom (change the -c option as neeed, for your flash -chip):\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory.rom**\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory1.rom**\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory2.rom**\ -Note: the **-c** option is not required in libreboot's patched +chip): + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory1.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory2.rom + +Note: the `-c` option is not required in libreboot's patched flashrom, because the redundant flash chip definitions in *flashchips.c* have been removed.\ Now compare the 3 images: # sha512sum factory\*.rom + If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not the BBB). This is useful for reverse engineering work, if there is a desirable @@ -265,19 +276,21 @@ Follow the instructions at [../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) to change the MAC address inside the libreboot ROM image, before flashing it. Although there is a default MAC address inside the ROM -image, this is not what you want. **Make sure to always change the MAC -address to one that is correct for your system.** +image, this is not what you want. *Make sure to always change the MAC +address to one that is correct for your system.* + +Now flash it: -Now flash it:\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w -path/to/libreboot/rom/image.rom -V** + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +path/to/libreboot/rom/image.rom -V  -You might see errors, but if it says **Verifying flash\... VERIFIED** at +You might see errors, but if it says `Verifying flash... VERIFIED` at the end, then it's flashed and should boot. If you see errors, try -again (and again, and again); the message **Chip content is identical to -the requested image** is also an indication of a successful +again (and again, and again); the message `Chip content is identical to +the requested image` is also an indication of a successful installation. Example output from running the command (see above): @@ -367,8 +380,6 @@ Now [install GNU+Linux](../gnulinux/). Copyright © 2015 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/t60_unbrick.md b/docs/install/t60_unbrick.md index 98c0be51..c61c3a5e 100644 --- a/docs/install/t60_unbrick.md +++ b/docs/install/t60_unbrick.md @@ -1,30 +1,23 @@ --- title: ThinkPad T60 Recovery guide +x-toc-enable: true ... This section documents how to recover from a bad flash that prevents your ThinkPad T60 from booting. -Table of Contents ------------------ - -- Types of brick: - - [Brick type 1: bucts not reset](#bucts_brick) - - [Brick type 2: bad rom (or user error), system won't - boot](#recovery) - Brick type 1: bucts not reset. {#bucts_brick} ============================== You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if Lenovo BIOS was present and libreboot wasn't flashed.\ -\ + In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:\ \ -\ + \*Those dd commands should be applied to all newly compiled T60 ROM images (the ROM images in libreboot binary archives already have this applied!):\ @@ -116,20 +109,24 @@ Remove these screws, placing them on a steady surface in the same layout as they were in before you removed them. Also, you should mark each screw hole after removing the screw (a permanent marker pen will do), this is so that you have a point of reference when re-assembling the -system:\ +system: +       Now wire up the BBB and the Pomona with your PSU.\ Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for -flashing.\ -**Note, the guide mentions a 3.3v DC PSU but you don't need this on the +flashing. + +*Note, the guide mentions a 3.3v DC PSU but you don't need this on the T60: if you don't have or don't want to use an external PSU, then make sure not to connect the 3.3v leads mentioned in the guide; instead, connect the AC adapter (the one that normally charges your battery) so -that the board has power (but don't boot it up)**\ -\ +that the board has power (but don't boot it up)* + + + Correlate the following with the BBB guide linked above: POMONA 5250: @@ -148,11 +145,13 @@ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot\_util. Alternatively, libreboot also distributes flashrom source code which can be built. -SSH'd into the BBB:\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w -yourrom.rom** +SSH'd into the BBB: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w -It should be **Verifying flash\... VERIFIED** at the end. If flashrom +yourrom.rom + +It should be `Verifying flash... VERIFIED` at the end. If flashrom complains about multiple flash chip definitions detected, then choose one of them following the instructions in the output. @@ -205,8 +204,6 @@ replacing cpu paste/heatsink:\ Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/x200_external.md b/docs/install/x200_external.md index cf4f74c7..6414fe7c 100644 --- a/docs/install/x200_external.md +++ b/docs/install/x200_external.md @@ -1,42 +1,31 @@ --- -title: Flashing the X200 with a BeagleBone Black +title: Flashing the X200 with a BeagleBone Black +x-toc-enable: true ... -Initial flashing instructions for X200. - This guide is for those who want libreboot on their ThinkPad X200 while they still have the original Lenovo BIOS present. This guide can also be followed (adapted) if you brick your X200, to know how to recover. -- [X200 laptops with libreboot pre-installed](#preinstall) -- [Flash chips](#flashchips) -- [MAC address](#macaddress) -- [Initial BBB configuration and installation procedure](#clip) -- [Boot it!](#boot) -- [Wifi](#wifi) -- [wwan](#wwan) -- [Memory](#memory) -- [X200S and X200 Tablet users: GPIO33 trick will not work.](#gpio33) - -X200 laptops with libreboot pre-installed {#preinstall} +X200 laptops with libreboot pre-installed ========================================= If you don't want to install libreboot yourself, companies exist that sell these laptops with libreboot pre-installed, along with a free GNU+Linux distribution. -Flash chip size {#flashchips} +Flash chip size =============== Use this to find out: + # flashrom -p internal -V -The X200S and X200 Tablet will use a WSON-8 flash chip, on the bottom of -the motherboard (this requires removal of the motherboard). **Not all -X200S/X200T are supported; see -[../hardware/x200.html\#x200s](../hardware/x200.html#x200s).** +The X200S and X200 Tablet will use a WSON-8 flash chip, on the bottom of the +motherboard (this requires removal of the motherboard). Not all X200S/X200T are +supported; see [here](../hardware/x200.html#x200s). -MAC address {#macaddress} +MAC address =========== On the X200/X200S/X200T, the MAC address for the onboard gigabit @@ -50,7 +39,7 @@ image before flashing it. It will be written in one of these locations:   -Initial BBB configuration {#clip} +Initial BBB configuration ========================= Refer to [bbb\_setup.md](bbb_setup.md) for how to set up the BBB for @@ -73,8 +62,6 @@ header), for SOIC-16 (clip: Pomona 5252): This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. Here is a photo of the SOIC-16 flash chip. Pins are labelled: - - The following shows how to connect the clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): @@ -91,12 +78,15 @@ header), for SOIC-8 (clip: Pomona 5250): Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16 chip on those pins? -**On the X200S and X200 Tablet the flash chip is underneath the board, -in a WSON package. The pinout is very much the same as a SOIC-8, but such package makes it impossible to use testclip. -In order to enable external flashing of device, chip has to be changed to SOIC-8 one. Such procedure requires hot air station and soldering station (with "knife" K-Tip to easily solder SOIC-8).\ -Check the list of SOIC-8 flash chips at -[List of supported flash chips](https://www.flashrom.org/Supported_hardware#Supported_flash_chips)\ -25XX series SPI NOR Flash in 8/16MiB sizes will work fine with libreboot. +On the X200S and X200 Tablet the flash chip is underneath the board, in a WSON +package. The pinout is very much the same as a SOIC-8, but such package makes +it impossible to use testclip. In order to enable external flashing of device, +chip has to be changed to SOIC-8 one. Such procedure requires hot air station +and soldering station (with "knife" K-Tip to easily solder SOIC-8). + +Check the list of SOIC-8 flash chips at [List of supported flash +chips](https://www.flashrom.org/Supported_hardware#Supported_flash_chips)\ 25XX +series SPI NOR Flash in 8/16MiB sizes will work fine with libreboot. The procedure ------------- @@ -108,13 +98,14 @@ completely, since the flash chip is on the other side of the board). Remove these screws:\  -Push the keyboard forward, gently, then lift it off and disconnect it -from the board:\ +Gently push the keyboard towards the screen, then lift it off, and optionally +disconnect it from the board:\   -Pull the palm rest off, lifting from the left and right side at the back -of the palm rest:\ +Disconnect the cable of the fingerpring reader, and then pull up the palm rest, +lifting up the left and right side of it:\ +  Lift back the tape that covers a part of the flash chip, and then @@ -127,19 +118,10 @@ to your PSU:\   -Connect the 3.3V supply from your PSU to the flash chip (via the clip):\ +Connect the 3.3V DC supply from your PSU to the flash chip (via the clip):\   -Of course, make sure that your PSU is also plugged in and turn on:\ - - -This tutorial tells you to use an ATX PSU, for the 3.3V DC supply. The -PSU used when taking these photos is actually not an ATX PSU, but a PSU -that is designed specifically for providing 3.3V DC (an ATX PSU will -also work):\ - - Now, you should be ready to install libreboot. Flashrom binaries for ARM (tested on a BBB) are distributed in @@ -150,7 +132,9 @@ Log in as root on your BBB, using the instructions in [bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access). Test that flashrom works: - # ./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 + In this case, the output was: flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) @@ -162,20 +146,20 @@ In this case, the output was: Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" Please specify which chip definition to use with the -c <chipname> option. -How to backup factory.rom (change the -c option as neeed, for your flash -chip):\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory.rom**\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory1.rom**\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r -factory2.rom**\ -Note: the **-c** option is not required in libreboot's patched +Here is how to backup factory.rom: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom + +Note: the `-c` option is not required in libreboot's patched flashrom, because the redundant flash chip definitions in *flashchips.c* -have been removed.\ +have been removed. + Now compare the 3 images: - # sha512sum factory\*.rom + # sha512sum factory*.rom + If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not the BBB). This is useful for reverse engineering work, if there is a desirable @@ -186,19 +170,19 @@ Follow the instructions at [../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) to change the MAC address inside the libreboot ROM image, before flashing it. Although there is a default MAC address inside the ROM -image, this is not what you want. **Make sure to always change the MAC -address to one that is correct for your system.** +image, this is not what you want. Make sure to always change the MAC +address to one that is correct for your system. + +Now flash it: -Now flash it:\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w -path/to/libreboot/rom/image.rom -V** + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V  -You might see errors, but if it says **Verifying flash\... VERIFIED** at +You might see errors, but if it says `Verifying flash... VERIFIED` at the end, then it's flashed and should boot. If you see errors, try -again (and again, and again); the message **Chip content is identical to -the requested image** is also an indication of a successful +again (and again, and again); the message `Chip content is identical to +the requested image` is also an indication of a successful installation. Example output from running the command (see above): @@ -231,7 +215,8 @@ whitelist of approved chips, and it will refuse to boot if you use an 'unauthorized' wifi card. The following photos show an Atheros AR5B95 being installed, to replace -the Intel chip that this X200 came with:\ +the Intel chip that this X200 came with: +   @@ -245,6 +230,17 @@ track your movements. Not to be confused with wifi (wifi is fine). +Intel Turbo Memory +================== + +Some X200 devices were sold with Intel Turbo Memory installed in the top-most +mini PCI-e slot. This has been [shown to be +ineffective](http://www.anandtech.com/show/2252) at disk caching or battery +saving in most use cases. While there are [Linux +drivers](https://github.com/yarrick/turbomem) available, it is blacklisted in +at least GNU+Trisquel, and possibly other free operating systems. It should +probably be removed. + Memory ====== @@ -257,10 +253,11 @@ work in some cases. Make sure that the RAM you buy is the 2Rx8 density. -In this photo, 8GiB of RAM (2x4GiB) is installed:\ +In this photo, 8GiB of RAM (2x4GiB) is installed: +  -Boot it! {#boot} +Boot it! -------- You should see something like this: @@ -269,7 +266,7 @@ You should see something like this: Now [install GNU+Linux](../gnulinux/). -X200S and X200 Tablet users: GPIO33 trick will not work. {#gpio33} +X200S and X200 Tablet users: GPIO33 trick will not work. -------------------------------------------------------- sgsit found out about a pin called GPIO33, which can be grounded to @@ -277,7 +274,8 @@ disable the flashing protections by the descriptor and stop the ME from starting (which itself interferes with flashing attempts). The theory was proven correct; however, it is still useless in practise. -Look just above the 7 in TP37 (that's GPIO33):\ +Look just above the 7 in TP37 (that's GPIO33): +  By default we would see this in lenovobios, when trying flashrom -p @@ -310,9 +308,7 @@ On a related note, libreboot has a utility that could help with investigating this: [../hardware/gm45\_remove\_me.html\#demefactory](../hardware/gm45_remove_me.md#demefactory) -Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ - - +Copyright © 2014, 2015 Leah Rowe <info@minifree.org> Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later diff --git a/docs/install/x60_unbrick.md b/docs/install/x60_unbrick.md index e1c9098a..0f215302 100644 --- a/docs/install/x60_unbrick.md +++ b/docs/install/x60_unbrick.md @@ -1,30 +1,23 @@ --- title: ThinkPad X60 Recovery guide +x-toc-enable: true ... This section documents how to recover from a bad flash that prevents your ThinkPad X60 from booting. -Table of Contents -================= - -- Types of brick: - - [Brick type 1: bucts not reset](#bucts_brick) - - [Brick type 2: bad rom (or user error), system won't - boot](#recovery) - Brick type 1: bucts not reset. {#bucts_brick} ============================== You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if Lenovo BIOS was present and libreboot wasn't flashed.\ -\ + In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:\ \ -\ + \*Those dd commands should be applied to all newly compiled X60 ROM images (the ROM images in libreboot binary archives already have this applied!):\ @@ -108,11 +101,11 @@ flash chip:\ Now wire up the BBB and the Pomona with your PSU.\ Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for flashing.\ -**Note, the guide mentions a 3.3v DC PSU but you don't need this on the +*Note, the guide mentions a 3.3v DC PSU but you don't need this on the X60: if you don't have or don't want to use an external PSU, then make sure not to connect the 3.3v leads mentioned in the guide; instead, connect the AC adapter (the one that normally charges your battery) so -that the board has power (but don't boot it up)** +that the board has power (but don't boot it up)* \ Correlate the following with the BBB guide linked above: @@ -133,11 +126,13 @@ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot\_util. Alternatively, libreboot also distributes flashrom source code which can be built. -SSH'd into the BBB:\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w -yourrom.rom** +SSH'd into the BBB: -It should be **Verifying flash\... VERIFIED** at the end. If flashrom + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +yourrom.rom + +It should be `Verifying flash... VERIFIED` at the end. If flashrom complains about multiple flash chip definitions detected, then choose one of them following the instructions in the output. @@ -217,8 +212,6 @@ Operating system:\ Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation diff --git a/docs/install/x60tablet_unbrick.md b/docs/install/x60tablet_unbrick.md index d11e7cbb..f4baebf4 100644 --- a/docs/install/x60tablet_unbrick.md +++ b/docs/install/x60tablet_unbrick.md @@ -1,30 +1,23 @@ --- title: ThinkPad X60 Tablet Recovery guide +x-toc-enable: true ... This section documents how to recover from a bad flash that prevents your ThinkPad X60 Tablet from booting. -Table of Contents ------------------ - -- Types of brick: - - [Brick type 1: bucts not reset](#bucts_brick) - - [Brick type 2: bad rom (or user error), system won't - boot](#recovery) - Brick type 1: bucts not reset. {#bucts_brick} ============================== You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if Lenovo BIOS was present and libreboot wasn't flashed.\ -\ + In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:\ \ -\ + \*Those dd commands should be applied to all newly compiled X60 ROM images (the ROM images in libreboot binary archives already have this applied!):\ @@ -87,11 +80,11 @@ Remove that screw and then remove the board:\ Now wire up the BBB and the Pomona with your PSU.\ Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for flashing.\ -**Note, the guide mentions a 3.3v DC PSU but you don't need this on the +*Note, the guide mentions a 3.3v DC PSU but you don't need this on the X60 Tablet: if you don't have or don't want to use an external PSU, then make sure not to connect the 3.3v leads mentioned in the guide; instead, connect the AC adapter (the one that normally charges your -battery) so that the board has power (but don't boot it up)** +battery) so that the board has power (but don't boot it up)* \ Correlate the following with the BBB guide linked above: @@ -112,11 +105,13 @@ Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot\_util. Alternatively, libreboot also distributes flashrom source code which can be built. -SSH'd into the BBB:\ -\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w -yourrom.rom** +SSH'd into the BBB: -It should be **Verifying flash\... VERIFIED** at the end. If flashrom + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +yourrom.rom + +It should be `Verifying flash... VERIFIED` at the end. If flashrom complains about multiple flash chip definitions detected, then choose one of them following the instructions in the output. @@ -124,8 +119,6 @@ Reverse the steps to re-assemble your system. Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ - - Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License Version 1.3 or any later version published by the Free Software Foundation |
