diff options
Diffstat (limited to 'projects/coreboot/configs')
118 files changed, 850 insertions, 57 deletions
diff --git a/projects/coreboot/configs/d510mo/config b/projects/coreboot/configs/d510mo/config index cf8d27f6..1e1c2630 100644 --- a/projects/coreboot/configs/d510mo/config +++ b/projects/coreboot/configs/d510mo/config @@ -594,7 +594,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/d510mo/textmode/16mb/seabios/config b/projects/coreboot/configs/d510mo/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/d510mo/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/d510mo/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/d510mo/textmode/1mb/seabios/config b/projects/coreboot/configs/d510mo/textmode/1mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/d510mo/textmode/1mb/seabios/config +++ b/projects/coreboot/configs/d510mo/textmode/1mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/d945gclf/config b/projects/coreboot/configs/d945gclf/config index 1f2d39b7..50e647c6 100644 --- a/projects/coreboot/configs/d945gclf/config +++ b/projects/coreboot/configs/d945gclf/config @@ -622,7 +622,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/d945gclf/textmode/16mb/seabios/config b/projects/coreboot/configs/d945gclf/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/d945gclf/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/d945gclf/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/d945gclf/textmode/512kb/seabios/config b/projects/coreboot/configs/d945gclf/textmode/512kb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/d945gclf/textmode/512kb/seabios/config +++ b/projects/coreboot/configs/d945gclf/textmode/512kb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/ga-g41m-es2l/config b/projects/coreboot/configs/ga-g41m-es2l/config index 237f6daa..755afcd5 100644 --- a/projects/coreboot/configs/ga-g41m-es2l/config +++ b/projects/coreboot/configs/ga-g41m-es2l/config @@ -581,7 +581,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/ga-g41m-es2l/corebootfb/16mb/seabios/config b/projects/coreboot/configs/ga-g41m-es2l/corebootfb/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/ga-g41m-es2l/corebootfb/16mb/seabios/config +++ b/projects/coreboot/configs/ga-g41m-es2l/corebootfb/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/ga-g41m-es2l/corebootfb/1mb/seabios/config b/projects/coreboot/configs/ga-g41m-es2l/corebootfb/1mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/ga-g41m-es2l/corebootfb/1mb/seabios/config +++ b/projects/coreboot/configs/ga-g41m-es2l/corebootfb/1mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/ga-g41m-es2l/textmode/16mb/seabios/config b/projects/coreboot/configs/ga-g41m-es2l/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/ga-g41m-es2l/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/ga-g41m-es2l/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/ga-g41m-es2l/textmode/1mb/seabios/config b/projects/coreboot/configs/ga-g41m-es2l/textmode/1mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/ga-g41m-es2l/textmode/1mb/seabios/config +++ b/projects/coreboot/configs/ga-g41m-es2l/textmode/1mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/imac52 b/projects/coreboot/configs/imac52 new file mode 120000 index 00000000..a5b8c293 --- /dev/null +++ b/projects/coreboot/configs/imac52 @@ -0,0 +1 @@ +macbook21
\ No newline at end of file diff --git a/projects/coreboot/configs/kcma-d8/config b/projects/coreboot/configs/kcma-d8/config index 8b78ab25..b46824cb 100644 --- a/projects/coreboot/configs/kcma-d8/config +++ b/projects/coreboot/configs/kcma-d8/config @@ -627,7 +627,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/kcma-d8/textmode/16mb/seabios/config b/projects/coreboot/configs/kcma-d8/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/kcma-d8/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/kcma-d8/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/kcma-d8/textmode/2mb/seabios/config b/projects/coreboot/configs/kcma-d8/textmode/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/kcma-d8/textmode/2mb/seabios/config +++ b/projects/coreboot/configs/kcma-d8/textmode/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/kfsn4-dre/config b/projects/coreboot/configs/kfsn4-dre/config index e4435801..3ade5731 100644 --- a/projects/coreboot/configs/kfsn4-dre/config +++ b/projects/coreboot/configs/kfsn4-dre/config @@ -646,7 +646,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/kfsn4-dre/corebootfb/1mb/seabios/config b/projects/coreboot/configs/kfsn4-dre/corebootfb/1mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/kfsn4-dre/corebootfb/1mb/seabios/config +++ b/projects/coreboot/configs/kfsn4-dre/corebootfb/1mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/kfsn4-dre/corebootfb/2mb/seabios/config b/projects/coreboot/configs/kfsn4-dre/corebootfb/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/kfsn4-dre/corebootfb/2mb/seabios/config +++ b/projects/coreboot/configs/kfsn4-dre/corebootfb/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/kfsn4-dre/textmode/1mb/seabios/config b/projects/coreboot/configs/kfsn4-dre/textmode/1mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/kfsn4-dre/textmode/1mb/seabios/config +++ b/projects/coreboot/configs/kfsn4-dre/textmode/1mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/kfsn4-dre/textmode/2mb/seabios/config b/projects/coreboot/configs/kfsn4-dre/textmode/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/kfsn4-dre/textmode/2mb/seabios/config +++ b/projects/coreboot/configs/kfsn4-dre/textmode/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/kgpe-d16/config b/projects/coreboot/configs/kgpe-d16/config index 7a2eca9c..ff31b4a0 100644 --- a/projects/coreboot/configs/kgpe-d16/config +++ b/projects/coreboot/configs/kgpe-d16/config @@ -629,7 +629,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/kgpe-d16/textmode/16mb/seabios/config b/projects/coreboot/configs/kgpe-d16/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/kgpe-d16/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/kgpe-d16/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/kgpe-d16/textmode/2mb/seabios/config b/projects/coreboot/configs/kgpe-d16/textmode/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/kgpe-d16/textmode/2mb/seabios/config +++ b/projects/coreboot/configs/kgpe-d16/textmode/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/macbook21/config b/projects/coreboot/configs/macbook21/config index 2fcf83ea..9726814a 100644 --- a/projects/coreboot/configs/macbook21/config +++ b/projects/coreboot/configs/macbook21/config @@ -574,7 +574,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/macbook21/corebootfb/16mb/seabios/config b/projects/coreboot/configs/macbook21/corebootfb/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/macbook21/corebootfb/16mb/seabios/config +++ b/projects/coreboot/configs/macbook21/corebootfb/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/macbook21/corebootfb/2mb/seabios/config b/projects/coreboot/configs/macbook21/corebootfb/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/macbook21/corebootfb/2mb/seabios/config +++ b/projects/coreboot/configs/macbook21/corebootfb/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/macbook21/textmode/16mb/seabios/config b/projects/coreboot/configs/macbook21/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/macbook21/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/macbook21/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/macbook21/textmode/2mb/seabios/config b/projects/coreboot/configs/macbook21/textmode/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/macbook21/textmode/2mb/seabios/config +++ b/projects/coreboot/configs/macbook21/textmode/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/macbook21/variants/imac52 b/projects/coreboot/configs/macbook21/variants/imac52 new file mode 100644 index 00000000..91464e6e --- /dev/null +++ b/projects/coreboot/configs/macbook21/variants/imac52 @@ -0,0 +1,4 @@ +CONFIG_MAINBOARD_PART_NUMBER="iMac5,2" +CONFIG_BOARD_APPLE_MACBOOK21=n +CONFIG_BOARD_APPLE_IMAC52=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="iMac5,2" diff --git a/projects/coreboot/configs/macbook21/variants/macbook21 b/projects/coreboot/configs/macbook21/variants/macbook21 new file mode 100644 index 00000000..a83cd1f3 --- /dev/null +++ b/projects/coreboot/configs/macbook21/variants/macbook21 @@ -0,0 +1,3 @@ +CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1" +CONFIG_BOARD_APPLE_MACBOOK21=y +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1" diff --git a/projects/coreboot/configs/nyan/big/corebootfb/16mb/config b/projects/coreboot/configs/nyan/big/corebootfb/16mb/config new file mode 100644 index 00000000..d3e3b7aa --- /dev/null +++ b/projects/coreboot/configs/nyan/big/corebootfb/16mb/config @@ -0,0 +1,5 @@ +CONFIG_CBFS_SIZE=0x1000000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=n +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x1000000 diff --git a/projects/coreboot/configs/nyan/big/corebootfb/16mb/depthcharge/config b/projects/coreboot/configs/nyan/big/corebootfb/16mb/depthcharge/config new file mode 100644 index 00000000..4fb44ffa --- /dev/null +++ b/projects/coreboot/configs/nyan/big/corebootfb/16mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-nyan-big/depthcharge.elf" diff --git a/projects/coreboot/configs/nyan/big/corebootfb/16mb/targets b/projects/coreboot/configs/nyan/big/corebootfb/16mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/nyan/big/corebootfb/16mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/nyan/big/corebootfb/4mb/config b/projects/coreboot/configs/nyan/big/corebootfb/4mb/config new file mode 100644 index 00000000..f8445518 --- /dev/null +++ b/projects/coreboot/configs/nyan/big/corebootfb/4mb/config @@ -0,0 +1,4 @@ +CONFIG_CBFS_SIZE=0x400000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=y +CONFIG_COREBOOT_ROMSIZE_KB=4096 +CONFIG_ROM_SIZE=0x400000 diff --git a/projects/coreboot/configs/nyan/big/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/nyan/big/corebootfb/4mb/depthcharge/config new file mode 100644 index 00000000..4fb44ffa --- /dev/null +++ b/projects/coreboot/configs/nyan/big/corebootfb/4mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-nyan-big/depthcharge.elf" diff --git a/projects/coreboot/configs/nyan/big/corebootfb/4mb/targets b/projects/coreboot/configs/nyan/big/corebootfb/4mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/nyan/big/corebootfb/4mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/nyan/big/corebootfb/targets b/projects/coreboot/configs/nyan/big/corebootfb/targets new file mode 100644 index 00000000..0169dcf0 --- /dev/null +++ b/projects/coreboot/configs/nyan/big/corebootfb/targets @@ -0,0 +1,2 @@ +16mb +4mb diff --git a/projects/coreboot/configs/nyan/big/targets b/projects/coreboot/configs/nyan/big/targets new file mode 100644 index 00000000..ffc50041 --- /dev/null +++ b/projects/coreboot/configs/nyan/big/targets @@ -0,0 +1 @@ +corebootfb diff --git a/projects/coreboot/configs/nyan/blaze/corebootfb/16mb/config b/projects/coreboot/configs/nyan/blaze/corebootfb/16mb/config new file mode 100644 index 00000000..d3e3b7aa --- /dev/null +++ b/projects/coreboot/configs/nyan/blaze/corebootfb/16mb/config @@ -0,0 +1,5 @@ +CONFIG_CBFS_SIZE=0x1000000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=n +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x1000000 diff --git a/projects/coreboot/configs/nyan/blaze/corebootfb/16mb/depthcharge/config b/projects/coreboot/configs/nyan/blaze/corebootfb/16mb/depthcharge/config new file mode 100644 index 00000000..1a6c06bc --- /dev/null +++ b/projects/coreboot/configs/nyan/blaze/corebootfb/16mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-nyan-blaze/depthcharge.elf" diff --git a/projects/coreboot/configs/nyan/blaze/corebootfb/16mb/targets b/projects/coreboot/configs/nyan/blaze/corebootfb/16mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/nyan/blaze/corebootfb/16mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/nyan/blaze/corebootfb/4mb/config b/projects/coreboot/configs/nyan/blaze/corebootfb/4mb/config new file mode 100644 index 00000000..f8445518 --- /dev/null +++ b/projects/coreboot/configs/nyan/blaze/corebootfb/4mb/config @@ -0,0 +1,4 @@ +CONFIG_CBFS_SIZE=0x400000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=y +CONFIG_COREBOOT_ROMSIZE_KB=4096 +CONFIG_ROM_SIZE=0x400000 diff --git a/projects/coreboot/configs/nyan/blaze/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/nyan/blaze/corebootfb/4mb/depthcharge/config new file mode 100644 index 00000000..1a6c06bc --- /dev/null +++ b/projects/coreboot/configs/nyan/blaze/corebootfb/4mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-nyan-blaze/depthcharge.elf" diff --git a/projects/coreboot/configs/nyan/blaze/corebootfb/4mb/targets b/projects/coreboot/configs/nyan/blaze/corebootfb/4mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/nyan/blaze/corebootfb/4mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/nyan/blaze/corebootfb/targets b/projects/coreboot/configs/nyan/blaze/corebootfb/targets new file mode 100644 index 00000000..0169dcf0 --- /dev/null +++ b/projects/coreboot/configs/nyan/blaze/corebootfb/targets @@ -0,0 +1,2 @@ +16mb +4mb diff --git a/projects/coreboot/configs/nyan/blaze/targets b/projects/coreboot/configs/nyan/blaze/targets new file mode 100644 index 00000000..ffc50041 --- /dev/null +++ b/projects/coreboot/configs/nyan/blaze/targets @@ -0,0 +1 @@ +corebootfb diff --git a/projects/coreboot/configs/qemu_i440fx_piix4/config b/projects/coreboot/configs/qemu_i440fx_piix4/config index a6110151..68d9efe7 100644 --- a/projects/coreboot/configs/qemu_i440fx_piix4/config +++ b/projects/coreboot/configs/qemu_i440fx_piix4/config @@ -530,7 +530,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/qemu_q35_ich9/config b/projects/coreboot/configs/qemu_q35_ich9/config index 7c3a47cf..f7f05e75 100644 --- a/projects/coreboot/configs/qemu_q35_ich9/config +++ b/projects/coreboot/configs/qemu_q35_ich9/config @@ -530,7 +530,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/revision b/projects/coreboot/configs/revision index 24940261..30357a1c 100644 --- a/projects/coreboot/configs/revision +++ b/projects/coreboot/configs/revision @@ -1 +1 @@ -a17796e6012041e2d8ebe16b0bde0b99809ee87c +8f560d9b9c20c7e72b031e60cf0e828d7d27ec8e diff --git a/projects/coreboot/configs/t400/config b/projects/coreboot/configs/t400/config index 045c9d37..f6f7b95b 100644 --- a/projects/coreboot/configs/t400/config +++ b/projects/coreboot/configs/t400/config @@ -584,7 +584,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/t400/corebootfb/16mb/seabios/config b/projects/coreboot/configs/t400/corebootfb/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t400/corebootfb/16mb/seabios/config +++ b/projects/coreboot/configs/t400/corebootfb/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/t400/corebootfb/4mb/seabios/config b/projects/coreboot/configs/t400/corebootfb/4mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t400/corebootfb/4mb/seabios/config +++ b/projects/coreboot/configs/t400/corebootfb/4mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/t400/corebootfb/8mb/seabios/config b/projects/coreboot/configs/t400/corebootfb/8mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t400/corebootfb/8mb/seabios/config +++ b/projects/coreboot/configs/t400/corebootfb/8mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/t400/textmode/16mb/seabios/config b/projects/coreboot/configs/t400/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t400/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/t400/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/t400/textmode/4mb/seabios/config b/projects/coreboot/configs/t400/textmode/4mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t400/textmode/4mb/seabios/config +++ b/projects/coreboot/configs/t400/textmode/4mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/t400/textmode/8mb/seabios/config b/projects/coreboot/configs/t400/textmode/8mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t400/textmode/8mb/seabios/config +++ b/projects/coreboot/configs/t400/textmode/8mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/t60/config b/projects/coreboot/configs/t60/config index 04512207..e4910cea 100644 --- a/projects/coreboot/configs/t60/config +++ b/projects/coreboot/configs/t60/config @@ -598,7 +598,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/t60/corebootfb/16mb/seabios/config b/projects/coreboot/configs/t60/corebootfb/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t60/corebootfb/16mb/seabios/config +++ b/projects/coreboot/configs/t60/corebootfb/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/t60/corebootfb/2mb/seabios/config b/projects/coreboot/configs/t60/corebootfb/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t60/corebootfb/2mb/seabios/config +++ b/projects/coreboot/configs/t60/corebootfb/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/t60/textmode/16mb/seabios/config b/projects/coreboot/configs/t60/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t60/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/t60/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/t60/textmode/2mb/seabios/config b/projects/coreboot/configs/t60/textmode/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/t60/textmode/2mb/seabios/config +++ b/projects/coreboot/configs/t60/textmode/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/targets b/projects/coreboot/configs/targets index c6aa3b64..8bc162d5 100644 --- a/projects/coreboot/configs/targets +++ b/projects/coreboot/configs/targets @@ -1,6 +1,7 @@ d510mo d945gclf ga-g41m-es2l +imac52 kcma-d8 kfsn4-dre kgpe-d16 @@ -16,3 +17,4 @@ veyron w500 x200 x60 +z61t diff --git a/projects/coreboot/configs/veyron/jerry/config b/projects/coreboot/configs/veyron/jerry/config index 9393e7de..30c978cf 100644 --- a/projects/coreboot/configs/veyron/jerry/config +++ b/projects/coreboot/configs/veyron/jerry/config @@ -110,7 +110,7 @@ CONFIG_MAINBOARD_PART_NUMBER="Veyron_Jerry" CONFIG_MAINBOARD_VENDOR="Google" CONFIG_MAX_CPUS=1 CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0 -CONFIG_CBFS_SIZE=0x100000 +CONFIG_CBFS_SIZE=0x400000 CONFIG_UART_FOR_CONSOLE=0 CONFIG_DIMM_SPD_SIZE=256 CONFIG_DEVICETREE="devicetree.cb" diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/config b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/config new file mode 100644 index 00000000..d3e3b7aa --- /dev/null +++ b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/config @@ -0,0 +1,5 @@ +CONFIG_CBFS_SIZE=0x1000000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=n +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x1000000 diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/depthcharge/config b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/depthcharge/config new file mode 100644 index 00000000..afde4a80 --- /dev/null +++ b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-jerry/depthcharge.elf" diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/targets b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/config b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/config new file mode 100644 index 00000000..f8445518 --- /dev/null +++ b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/config @@ -0,0 +1,4 @@ +CONFIG_CBFS_SIZE=0x400000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=y +CONFIG_COREBOOT_ROMSIZE_KB=4096 +CONFIG_ROM_SIZE=0x400000 diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/depthcharge/config new file mode 100644 index 00000000..afde4a80 --- /dev/null +++ b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-jerry/depthcharge.elf" diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/targets b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/targets b/projects/coreboot/configs/veyron/jerry/corebootfb/targets new file mode 100644 index 00000000..0169dcf0 --- /dev/null +++ b/projects/coreboot/configs/veyron/jerry/corebootfb/targets @@ -0,0 +1,2 @@ +16mb +4mb diff --git a/projects/coreboot/configs/veyron/jerry/targets b/projects/coreboot/configs/veyron/jerry/targets new file mode 100644 index 00000000..ffc50041 --- /dev/null +++ b/projects/coreboot/configs/veyron/jerry/targets @@ -0,0 +1 @@ +corebootfb diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config new file mode 100644 index 00000000..f8445518 --- /dev/null +++ b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config @@ -0,0 +1,4 @@ +CONFIG_CBFS_SIZE=0x400000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=y +CONFIG_COREBOOT_ROMSIZE_KB=4096 +CONFIG_ROM_SIZE=0x400000 diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/depthcharge/config new file mode 100644 index 00000000..e27c1a5b --- /dev/null +++ b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-mickey/depthcharge.elf" diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/targets b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/targets b/projects/coreboot/configs/veyron/mickey/corebootfb/targets new file mode 100644 index 00000000..50d4bf27 --- /dev/null +++ b/projects/coreboot/configs/veyron/mickey/corebootfb/targets @@ -0,0 +1 @@ +4mb diff --git a/projects/coreboot/configs/veyron/mickey/targets b/projects/coreboot/configs/veyron/mickey/targets new file mode 100644 index 00000000..ffc50041 --- /dev/null +++ b/projects/coreboot/configs/veyron/mickey/targets @@ -0,0 +1 @@ +corebootfb diff --git a/projects/coreboot/configs/veyron/minnie/config b/projects/coreboot/configs/veyron/minnie/config index 45672bc9..d9d9206e 100644 --- a/projects/coreboot/configs/veyron/minnie/config +++ b/projects/coreboot/configs/veyron/minnie/config @@ -110,7 +110,7 @@ CONFIG_MAINBOARD_PART_NUMBER="Veyron_Minnie" CONFIG_MAINBOARD_VENDOR="Google" CONFIG_MAX_CPUS=1 CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0 -CONFIG_CBFS_SIZE=0x100000 +CONFIG_CBFS_SIZE=0x400000 CONFIG_UART_FOR_CONSOLE=0 CONFIG_DIMM_SPD_SIZE=256 CONFIG_DEVICETREE="devicetree.cb" diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/config b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/config new file mode 100644 index 00000000..d3e3b7aa --- /dev/null +++ b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/config @@ -0,0 +1,5 @@ +CONFIG_CBFS_SIZE=0x1000000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=n +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x1000000 diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/depthcharge/config b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/depthcharge/config new file mode 100644 index 00000000..aee1ccef --- /dev/null +++ b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-minnie/depthcharge.elf" diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/targets b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/config b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/config new file mode 100644 index 00000000..f8445518 --- /dev/null +++ b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/config @@ -0,0 +1,4 @@ +CONFIG_CBFS_SIZE=0x400000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=y +CONFIG_COREBOOT_ROMSIZE_KB=4096 +CONFIG_ROM_SIZE=0x400000 diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/depthcharge/config new file mode 100644 index 00000000..aee1ccef --- /dev/null +++ b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-minnie/depthcharge.elf" diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/targets b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/targets b/projects/coreboot/configs/veyron/minnie/corebootfb/targets new file mode 100644 index 00000000..0169dcf0 --- /dev/null +++ b/projects/coreboot/configs/veyron/minnie/corebootfb/targets @@ -0,0 +1,2 @@ +16mb +4mb diff --git a/projects/coreboot/configs/veyron/minnie/targets b/projects/coreboot/configs/veyron/minnie/targets new file mode 100644 index 00000000..ffc50041 --- /dev/null +++ b/projects/coreboot/configs/veyron/minnie/targets @@ -0,0 +1 @@ +corebootfb diff --git a/projects/coreboot/configs/veyron/speedy/config b/projects/coreboot/configs/veyron/speedy/config index b4a74b9a..27ddca6b 100644 --- a/projects/coreboot/configs/veyron/speedy/config +++ b/projects/coreboot/configs/veyron/speedy/config @@ -110,7 +110,7 @@ CONFIG_MAINBOARD_PART_NUMBER="Veyron_Speedy" CONFIG_MAINBOARD_VENDOR="Google" CONFIG_MAX_CPUS=1 CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0 -CONFIG_CBFS_SIZE=0x100000 +CONFIG_CBFS_SIZE=0x400000 CONFIG_UART_FOR_CONSOLE=0 CONFIG_DIMM_SPD_SIZE=256 CONFIG_DEVICETREE="devicetree.cb" diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/config b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/config new file mode 100644 index 00000000..d3e3b7aa --- /dev/null +++ b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/config @@ -0,0 +1,5 @@ +CONFIG_CBFS_SIZE=0x1000000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=n +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x1000000 diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/depthcharge/config b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/depthcharge/config new file mode 100644 index 00000000..8b705934 --- /dev/null +++ b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-speedy/depthcharge.elf" diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/targets b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/config b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/config new file mode 100644 index 00000000..f8445518 --- /dev/null +++ b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/config @@ -0,0 +1,4 @@ +CONFIG_CBFS_SIZE=0x400000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=y +CONFIG_COREBOOT_ROMSIZE_KB=4096 +CONFIG_ROM_SIZE=0x400000 diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/depthcharge/config new file mode 100644 index 00000000..8b705934 --- /dev/null +++ b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/depthcharge/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-speedy/depthcharge.elf" diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/targets b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/targets new file mode 100644 index 00000000..d7e90413 --- /dev/null +++ b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/targets @@ -0,0 +1 @@ +depthcharge diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/targets b/projects/coreboot/configs/veyron/speedy/corebootfb/targets new file mode 100644 index 00000000..0169dcf0 --- /dev/null +++ b/projects/coreboot/configs/veyron/speedy/corebootfb/targets @@ -0,0 +1,2 @@ +16mb +4mb diff --git a/projects/coreboot/configs/veyron/speedy/targets b/projects/coreboot/configs/veyron/speedy/targets new file mode 100644 index 00000000..ffc50041 --- /dev/null +++ b/projects/coreboot/configs/veyron/speedy/targets @@ -0,0 +1 @@ +corebootfb diff --git a/projects/coreboot/configs/x200/config b/projects/coreboot/configs/x200/config index 8e2be019..01efbc79 100644 --- a/projects/coreboot/configs/x200/config +++ b/projects/coreboot/configs/x200/config @@ -582,7 +582,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/x200/corebootfb/16mb/seabios/config b/projects/coreboot/configs/x200/corebootfb/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x200/corebootfb/16mb/seabios/config +++ b/projects/coreboot/configs/x200/corebootfb/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/x200/corebootfb/4mb/seabios/config b/projects/coreboot/configs/x200/corebootfb/4mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x200/corebootfb/4mb/seabios/config +++ b/projects/coreboot/configs/x200/corebootfb/4mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/x200/corebootfb/8mb/seabios/config b/projects/coreboot/configs/x200/corebootfb/8mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x200/corebootfb/8mb/seabios/config +++ b/projects/coreboot/configs/x200/corebootfb/8mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/x200/textmode/16mb/seabios/config b/projects/coreboot/configs/x200/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x200/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/x200/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/x200/textmode/4mb/seabios/config b/projects/coreboot/configs/x200/textmode/4mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x200/textmode/4mb/seabios/config +++ b/projects/coreboot/configs/x200/textmode/4mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/x200/textmode/8mb/seabios/config b/projects/coreboot/configs/x200/textmode/8mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x200/textmode/8mb/seabios/config +++ b/projects/coreboot/configs/x200/textmode/8mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/x60/config b/projects/coreboot/configs/x60/config index 8257be82..510854f5 100644 --- a/projects/coreboot/configs/x60/config +++ b/projects/coreboot/configs/x60/config @@ -603,7 +603,7 @@ CONFIG_PAYLOAD_ELF=y # CONFIG_PAYLOAD_UBOOT is not set # CONFIG_PAYLOAD_LINUX is not set # CONFIG_PAYLOAD_TIANOCORE is not set -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" CONFIG_PAYLOAD_OPTIONS="" # CONFIG_PXE is not set CONFIG_COMPRESSED_PAYLOAD_LZMA=y diff --git a/projects/coreboot/configs/x60/corebootfb/16mb/seabios/config b/projects/coreboot/configs/x60/corebootfb/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x60/corebootfb/16mb/seabios/config +++ b/projects/coreboot/configs/x60/corebootfb/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/x60/corebootfb/2mb/seabios/config b/projects/coreboot/configs/x60/corebootfb/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x60/corebootfb/2mb/seabios/config +++ b/projects/coreboot/configs/x60/corebootfb/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/x60/textmode/16mb/seabios/config b/projects/coreboot/configs/x60/textmode/16mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x60/textmode/16mb/seabios/config +++ b/projects/coreboot/configs/x60/textmode/16mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/x60/textmode/2mb/seabios/config b/projects/coreboot/configs/x60/textmode/2mb/seabios/config index b1e08f99..a3c13aff 100644 --- a/projects/coreboot/configs/x60/textmode/2mb/seabios/config +++ b/projects/coreboot/configs/x60/textmode/2mb/seabios/config @@ -1 +1 @@ -CONFIG_PAYLOAD_FILE="$(obj)/../seabios-bios/bios.bin.elf" +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/z61t/arch b/projects/coreboot/configs/z61t/arch new file mode 100644 index 00000000..5a9a476a --- /dev/null +++ b/projects/coreboot/configs/z61t/arch @@ -0,0 +1 @@ +i386 diff --git a/projects/coreboot/configs/z61t/config b/projects/coreboot/configs/z61t/config new file mode 100644 index 00000000..69a55442 --- /dev/null +++ b/projects/coreboot/configs/z61t/config @@ -0,0 +1,674 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_COREBOOT_BUILD=y +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_USE_OPTION_TABLE=y +CONFIG_STATIC_OPTION_TABLE=y +CONFIG_COMPRESS_RAMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +# CONFIG_COLLECT_TIMESTAMPS is not set +# CONFIG_USE_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_RELOCATABLE_RAMSTAGE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_A_TREND is not set +# CONFIG_VENDOR_AAEON is not set +# CONFIG_VENDOR_ABIT is not set +# CONFIG_VENDOR_ADI is not set +# CONFIG_VENDOR_ADLINK is not set +# CONFIG_VENDOR_ADVANSUS is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARTECGROUP is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_AVALUE is not set +# CONFIG_VENDOR_AZZA is not set +# CONFIG_VENDOR_BACHMANN is not set +# CONFIG_VENDOR_BAP is not set +# CONFIG_VENDOR_BCOM is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BROADCOM is not set +# CONFIG_VENDOR_COMPAQ is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CUBIETECH is not set +# CONFIG_VENDOR_DIGITALLOGIC is not set +# CONFIG_VENDOR_DMP is not set +# CONFIG_VENDOR_ECS is not set +# CONFIG_VENDOR_ELMEX is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ESD is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GIZMOSPHERE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IEI is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_IWAVE is not set +# CONFIG_VENDOR_IWILL is not set +# CONFIG_VENDOR_JETWAY is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LANNER is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LINUTOP is not set +# CONFIG_VENDOR_LIPPERT is not set +# CONFIG_VENDOR_LOWRISC is not set +# CONFIG_VENDOR_MITAC is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NEC is not set +# CONFIG_VENDOR_NOKIA is not set +# CONFIG_VENDOR_NVIDIA is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RCA is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SOYO is not set +# CONFIG_VENDOR_SUNW is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_TECHNEXION is not set +# CONFIG_VENDOR_THOMSON is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TRAVERSE is not set +# CONFIG_VENDOR_TYAN is not set +# CONFIG_VENDOR_VIA is not set +# CONFIG_VENDOR_WINENT is not set +# CONFIG_VENDOR_WINNET is not set +# CONFIG_VENDOR_WYSE is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_DIR="lenovo/z61t" +CONFIG_MAINBOARD_PART_NUMBER="ThinkPad Z61t" +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_MAX_CPUS=2 +CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0 +CONFIG_CBFS_SIZE=0x200000 +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VGA_BIOS_ID="8086,27a2" +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_DIMM_SPD_SIZE=256 +# CONFIG_VGA_BIOS is not set +CONFIG_DCACHE_RAM_BASE=0xfefc0000 +CONFIG_DCACHE_RAM_SIZE=0x8000 +CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_POST_IO=y +CONFIG_DEVICETREE="devicetree.cb" +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_ID_SECTION_OFFSET=0x80 +# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set +# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set +# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set +# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set +# CONFIG_BOARD_EMULATION_QEMU_UCB_RISCV is not set +# CONFIG_BOARD_EMULATION_SPIKE_UCB_RISCV is not set +CONFIG_POST_DEVICE=y +# CONFIG_VBOOT is not set +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_FMDFILE="" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_TTYS0_LCS=3 +CONFIG_DRIVERS_UART_8250IO=y +# CONFIG_BOARD_LENOVO_G505S is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_BOARD_LENOVO_Z61T=y +CONFIG_CPU_ADDR_BITS=36 +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 +# CONFIG_USBDEBUG is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +# CONFIG_PCIEXP_L1_SUB_STATE is not set +# CONFIG_NO_POST is not set +CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0 +CONFIG_BOARD_ROMSIZE_KB_2048=y +# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +CONFIG_COREBOOT_ROMSIZE_KB_2048=y +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=2048 +CONFIG_ROM_SIZE=0x200000 +# CONFIG_MAINBOARD_HAS_TPM2 is not set +CONFIG_SYSTEM_TYPE_LAPTOP=y +# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set + +# +# Chipset +# + +# +# SoC +# +CONFIG_RAMTOP=0x200000 +CONFIG_HEAP_SIZE=0x4000 +CONFIG_RAMBASE=0x100000 +CONFIG_EHCI_BAR=0xfef00000 +CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d" +# CONFIG_SOC_BROADCOM_CYGNUS is not set +# CONFIG_SOC_INTEL_GLK is not set +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000 +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +# CONFIG_PCIEXP_ASPM is not set +# CONFIG_PCIEXP_COMMON_CLOCK is not set +# CONFIG_PCIEXP_CLK_PM is not set +CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/i945/bootblock.c" +CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801gx/bootblock.c" +CONFIG_TTYS0_BASE=0x3f8 +CONFIG_STACK_SIZE=0x1000 +CONFIG_CONSOLE_CBMEM=y +CONFIG_UART_PCI_ADDR=0x0 +CONFIG_HPET_MIN_TICKS=0x80 +# CONFIG_SOC_INTEL_KABYLAKE is not set +# CONFIG_SOC_LOWRISC_LOWRISC is not set +# CONFIG_SOC_MARVELL_MVMAP2315 is not set +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_MEDIATEK_MT8173 is not set +# CONFIG_SOC_NVIDIA_TEGRA124 is not set +# CONFIG_SOC_NVIDIA_TEGRA210 is not set +# CONFIG_SOC_QC_IPQ40XX is not set +# CONFIG_SOC_QC_IPQ806X is not set +# CONFIG_SOC_ROCKCHIP_RK3288 is not set +# CONFIG_SOC_ROCKCHIP_RK3399 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set +# CONFIG_SOC_UCB_RISCV is not set + +# +# CPU +# +# CONFIG_CPU_ALLWINNER_A10 is not set +CONFIG_SOCKET_SPECIFIC_OPTIONS=y +CONFIG_XIP_ROM_SIZE=0x10000 +CONFIG_NUM_IPI_STARTS=2 +# CONFIG_CPU_AMD_AGESA is not set +# CONFIG_CPU_AMD_PI is not set +# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set +CONFIG_CPU_INTEL_MODEL_6EX=y +CONFIG_CPU_INTEL_MODEL_6FX=y +CONFIG_CPU_INTEL_SOCKET_MFCPGA478=y +CONFIG_SSE2=y +# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set +# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_VMX_LOCK_BIT=y +# CONFIG_CPU_TI_AM335X is not set +# CONFIG_PARALLEL_CPU_INIT is not set +# CONFIG_PARALLEL_MP is not set +# CONFIG_UDELAY_IO is not set +CONFIG_UDELAY_LAPIC=y +CONFIG_LAPIC_MONOTONIC_TIMER=y +# CONFIG_UDELAY_TSC is not set +# CONFIG_UDELAY_TIMER2 is not set +# CONFIG_TSC_SYNC_LFENCE is not set +CONFIG_TSC_SYNC_MFENCE=y +# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set +CONFIG_LOGICAL_CPUS=y +# CONFIG_SMM_TSEG is not set +CONFIG_SMM_LAPIC_REMAP_MITIGATION=y +# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set +# CONFIG_X86_AMD_FIXED_MTRRS is not set +# CONFIG_PLATFORM_USES_FSP1_0 is not set +# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set +# CONFIG_SOC_SETS_MSRS is not set +CONFIG_CACHE_AS_RAM=y +# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set +CONFIG_SMP=y +CONFIG_AP_SIPI_VECTOR=0xfffff000 +CONFIG_MMX=y +CONFIG_SSE=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +# CONFIG_USES_MICROCODE_HEADER_FILES is not set +# CONFIG_CPU_MICROCODE_CBFS_GENERATE is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +CONFIG_CPU_MICROCODE_CBFS_NONE=y + +# +# Northbridge +# +# CONFIG_NORTHBRIDGE_AMD_AGESA is not set +# CONFIG_NO_MMCONF_SUPPORT is not set +# CONFIG_AMD_NB_CIMX is not set +# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set +# CONFIG_NORTHBRIDGE_AMD_PI is not set +# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set +CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y +CONFIG_NORTHBRIDGE_INTEL_I945=y +# CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC is not set +CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y +# CONFIG_I945_LVDS is not set +CONFIG_CHANNEL_XOR_RANDOMIZATION=y +# CONFIG_OVERRIDE_CLOCK_DISABLE is not set +# CONFIG_CHECK_SLFRCS_ON_RESUME is not set +CONFIG_HPET_ADDRESS=0xfed00000 +CONFIG_MAX_PIRQ_LINKS=4 + +# +# Southbridge +# +# CONFIG_AMD_SB_CIMX is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set +CONFIG_SOUTHBRIDGE_INTEL_COMMON=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set +# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set +# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set +CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y +CONFIG_SOUTHBRIDGE_TI_PCI1X2X=y + +# +# Super I/O +# +CONFIG_SUPERIO_NSC_PC87382=y +CONFIG_SUPERIO_NSC_PC87384=y +# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_BEEP_ON_DEATH=y +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +CONFIG_H8_DOCK_EARLY_INIT=y +CONFIG_EC_LENOVO_PMH7=y +# CONFIG_MAINBOARD_HAS_CHROMEOS is not set +# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set +# CONFIG_UEFI_2_4_BINDING is not set +# CONFIG_UDK_2015_BINDING is not set +# CONFIG_USE_SIEMENS_HWILIB is not set +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_BOOTBLOCK_ARM is not set +# CONFIG_ARCH_VERSTAGE_ARM is not set +# CONFIG_ARCH_ROMSTAGE_ARM is not set +# CONFIG_ARCH_RAMSTAGE_ARM is not set +# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set +# CONFIG_ARCH_VERSTAGE_ARMV4 is not set +# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set +# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set +# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set +# CONFIG_ARCH_VERSTAGE_ARMV7 is not set +# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set +# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set +# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set +# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set +# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set +# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set +# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set +# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set +# CONFIG_ARM_LPAE is not set +# CONFIG_ARCH_ARM64 is not set +# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set +# CONFIG_ARCH_VERSTAGE_ARM64 is not set +# CONFIG_ARCH_ROMSTAGE_ARM64 is not set +# CONFIG_ARCH_RAMSTAGE_ARM64 is not set +# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set +# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set +# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set +# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set +# CONFIG_ARM64_A53_ERRATUM_843419 is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_BOOTBLOCK_MIPS is not set +# CONFIG_ARCH_VERSTAGE_MIPS is not set +# CONFIG_ARCH_ROMSTAGE_MIPS is not set +# CONFIG_ARCH_RAMSTAGE_MIPS is not set +# CONFIG_ARCH_POWER8 is not set +# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set +# CONFIG_ARCH_VERSTAGE_POWER8 is not set +# CONFIG_ARCH_ROMSTAGE_POWER8 is not set +# CONFIG_ARCH_RAMSTAGE_POWER8 is not set +# CONFIG_ARCH_RISCV is not set +# CONFIG_ARCH_BOOTBLOCK_RISCV is not set +# CONFIG_ARCH_VERSTAGE_RISCV is not set +# CONFIG_ARCH_ROMSTAGE_RISCV is not set +# CONFIG_ARCH_RAMSTAGE_RISCV is not set +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set +# CONFIG_ARCH_VERSTAGE_X86_64 is not set +# CONFIG_ARCH_ROMSTAGE_X86_64 is not set +# CONFIG_ARCH_RAMSTAGE_X86_64 is not set +# CONFIG_USE_MARCH_586 is not set +CONFIG_AP_IN_SIPI_WAIT=y +# CONFIG_SIPI_VECTOR_IN_ROM is not set +# CONFIG_ROMCC is not set +# CONFIG_CBMEM_TOP_BACKUP is not set +# CONFIG_LATE_CBMEM_INIT is not set +# CONFIG_EARLY_EBDA_INIT is not set +CONFIG_PC80_SYSTEM=y +# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set +# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y +# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set +# CONFIG_POSTCAR_STAGE is not set +# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set +# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y +# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set +# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set +CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_NO_GFX_INIT is not set +# CONFIG_MULTIPLE_VGA_ADAPTERS is not set + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set +CONFIG_PCI=y +CONFIG_MMCONF_SUPPORT=y +# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +# CONFIG_AZALIA_PLUGIN_SUPPORT is not set +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +# CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE is not set +# CONFIG_SOFTWARE_I2C is not set + +# +# Generic Drivers +# +# CONFIG_DRIVERS_AS3722_RTC is not set +# CONFIG_GIC is not set +# CONFIG_IPMI_KCS is not set +# CONFIG_DRIVERS_LENOVO_WACOM is not set +# CONFIG_RT8168_GET_MAC_FROM_VPD is not set +# CONFIG_RT8168_SET_LED_MODE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set +# CONFIG_SPI_FLASH_SMM is not set +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set +# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set +# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set +# CONFIG_NO_UART_ON_SUPERIO is not set +# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set +# CONFIG_UART_OVERRIDE_REFCLK is not set +# CONFIG_DRIVERS_UART_8250MEM is not set +# CONFIG_DRIVERS_UART_8250MEM_32 is not set +# CONFIG_HAVE_UART_SPECIAL is not set +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_DRIVERS_UART_PL011 is not set +# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set +CONFIG_HAVE_USBDEBUG=y +# CONFIG_HAVE_USBDEBUG_OPTIONS is not set +# CONFIG_DRIVERS_AMD_PI is not set +CONFIG_SMBIOS_PROVIDED_BY_MOBO=y +CONFIG_DRIVERS_I2C_CK505=y +# CONFIG_DRIVERS_I2C_MAX98927 is not set +# CONFIG_DRIVERS_I2C_PCF8523 is not set +# CONFIG_DRIVERS_I2C_RT5663 is not set +# CONFIG_DRIVERS_I2C_RTD2132 is not set +# CONFIG_DRIVERS_I2C_RX6110SA is not set +# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set +# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set +# CONFIG_INTEL_DDI is not set +CONFIG_INTEL_EDID=y +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y +# CONFIG_DRIVER_INTEL_I210 is not set +# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set +# CONFIG_DRIVERS_INTEL_WIFI is not set +# CONFIG_USE_SAR is not set +# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set +# CONFIG_DRIVER_MAXIM_MAX77686 is not set +# CONFIG_DRIVER_PARADE_PS8625 is not set +# CONFIG_DRIVER_PARADE_PS8640 is not set +CONFIG_DRIVERS_MC146818=y +# CONFIG_MAINBOARD_HAS_LPC_TPM is not set +CONFIG_VGA=y +# CONFIG_DRIVERS_RICOH_RCE822 is not set +# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set +# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set +# CONFIG_DRIVERS_SIL_3114 is not set +# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set +# CONFIG_DRIVER_TI_TPS65090 is not set +# CONFIG_DRIVERS_TI_TPS65913 is not set +# CONFIG_DRIVERS_TI_TPS65913_RTC is not set +# CONFIG_DRIVER_XPOWERS_AXP209 is not set +# CONFIG_COMMONLIB_STORAGE is not set + +# +# Security +# + +# +# Verified Boot (vboot) +# +# CONFIG_ACPI_SATA_GENERATOR is not set +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set +# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set +# CONFIG_RTC is not set +# CONFIG_TPM is not set +# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set + +# +# Console +# +CONFIG_SQUELCH_EARLY_SMP=y +CONFIG_CONSOLE_SERIAL=y + +# +# I/O mapped, 8250-compatible +# + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +# CONFIG_CONSOLE_SPI_FLASH is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +# CONFIG_CMOS_POST is not set +# CONFIG_CONSOLE_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set +CONFIG_HWBASE_DEBUG_CB=y +CONFIG_HAVE_ACPI_RESUME=y +# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_HARD_RESET=y +# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set +CONFIG_HAVE_MONOTONIC_TIMER=y +# CONFIG_GENERIC_UDELAY is not set +# CONFIG_TIMER_QUEUE is not set +CONFIG_HAVE_OPTION_TABLE=y +# CONFIG_PIRQ_ROUTE is not set +CONFIG_HAVE_SMI_HANDLER=y +# CONFIG_PCI_IO_CFG_EXT is not set +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y +# CONFIG_GFXUMA is not set +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_HAVE_MP_TABLE=y +CONFIG_COMMON_FADT=y +# CONFIG_ACPI_NHLT is not set + +# +# System tables +# +CONFIG_GENERATE_MP_TABLE=y +# CONFIG_GENERATE_PIRQ_TABLE is not set +CONFIG_GENERATE_SMBIOS_TABLES=y + +# +# Payload +# +# CONFIG_PAYLOAD_NONE is not set +CONFIG_PAYLOAD_ELF=y +# CONFIG_PAYLOAD_BAYOU is not set +# CONFIG_PAYLOAD_FILO is not set +# CONFIG_PAYLOAD_GRUB2 is not set +# CONFIG_PAYLOAD_SEABIOS is not set +# CONFIG_PAYLOAD_UBOOT is not set +# CONFIG_PAYLOAD_LINUX is not set +# CONFIG_PAYLOAD_TIANOCORE is not set +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" +# CONFIG_SEABIOS_STABLE is not set +# CONFIG_SEABIOS_MASTER is not set +# CONFIG_SEABIOS_REVISION is not set +CONFIG_PAYLOAD_OPTIONS="" +# CONFIG_PXE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set + +# +# Secondary Payloads +# +# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set +# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set +# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set +# CONFIG_TINT_SECONDARY_PAYLOAD is not set + +# +# Debugging +# +# CONFIG_GDB_STUB is not set +# CONFIG_FATAL_ASSERTS is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set +# CONFIG_HAVE_DEBUG_CAR is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_SMI is not set +# CONFIG_DEBUG_SMM_RELOCATION is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_ACPI is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_TRACE is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +# CONFIG_ENABLE_APIC_EXT_ID is not set +CONFIG_WARNINGS_ARE_ERRORS=y +# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set +# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set +# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set +# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set +# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set +# CONFIG_REG_SCRIPT is not set +# CONFIG_CREATE_BOARD_CHECKLIST is not set +# CONFIG_MAKE_CHECKLIST_PUBLIC is not set +# CONFIG_NO_XIP_EARLY_STAGES is not set +CONFIG_EARLY_CBMEM_INIT=y +# CONFIG_EARLY_CBMEM_LIST is not set +CONFIG_RELOCATABLE_MODULES=y +CONFIG_BOOTBLOCK_CUSTOM=y diff --git a/projects/coreboot/configs/z61t/targets b/projects/coreboot/configs/z61t/targets new file mode 100644 index 00000000..3ee846a9 --- /dev/null +++ b/projects/coreboot/configs/z61t/targets @@ -0,0 +1 @@ +textmode diff --git a/projects/coreboot/configs/z61t/textmode/16mb/config b/projects/coreboot/configs/z61t/textmode/16mb/config new file mode 100644 index 00000000..a4cf5cf7 --- /dev/null +++ b/projects/coreboot/configs/z61t/textmode/16mb/config @@ -0,0 +1,5 @@ +CONFIG_CBFS_SIZE=0x1000000 +CONFIG_COREBOOT_ROMSIZE_KB_2048=n +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x1000000 diff --git a/projects/coreboot/configs/z61t/textmode/16mb/grub/config b/projects/coreboot/configs/z61t/textmode/16mb/grub/config new file mode 100644 index 00000000..5170a90a --- /dev/null +++ b/projects/coreboot/configs/z61t/textmode/16mb/grub/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../grub-coreboot/grub2" diff --git a/projects/coreboot/configs/z61t/textmode/16mb/seabios/config b/projects/coreboot/configs/z61t/textmode/16mb/seabios/config new file mode 100644 index 00000000..a3c13aff --- /dev/null +++ b/projects/coreboot/configs/z61t/textmode/16mb/seabios/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/z61t/textmode/16mb/targets b/projects/coreboot/configs/z61t/textmode/16mb/targets new file mode 100644 index 00000000..f2cba0e5 --- /dev/null +++ b/projects/coreboot/configs/z61t/textmode/16mb/targets @@ -0,0 +1,2 @@ +grub +seabios diff --git a/projects/coreboot/configs/z61t/textmode/2mb/config b/projects/coreboot/configs/z61t/textmode/2mb/config new file mode 100644 index 00000000..adffe7ae --- /dev/null +++ b/projects/coreboot/configs/z61t/textmode/2mb/config @@ -0,0 +1,4 @@ +CONFIG_CBFS_SIZE=0x200000 +CONFIG_COREBOOT_ROMSIZE_KB_2048=y +CONFIG_COREBOOT_ROMSIZE_KB=2048 +CONFIG_ROM_SIZE=0x200000 diff --git a/projects/coreboot/configs/z61t/textmode/2mb/grub/config b/projects/coreboot/configs/z61t/textmode/2mb/grub/config new file mode 100644 index 00000000..5170a90a --- /dev/null +++ b/projects/coreboot/configs/z61t/textmode/2mb/grub/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../grub-coreboot/grub2" diff --git a/projects/coreboot/configs/z61t/textmode/2mb/seabios/config b/projects/coreboot/configs/z61t/textmode/2mb/seabios/config new file mode 100644 index 00000000..a3c13aff --- /dev/null +++ b/projects/coreboot/configs/z61t/textmode/2mb/seabios/config @@ -0,0 +1 @@ +CONFIG_PAYLOAD_FILE="$(obj)/../seabios/bios.bin.elf" diff --git a/projects/coreboot/configs/z61t/textmode/2mb/targets b/projects/coreboot/configs/z61t/textmode/2mb/targets new file mode 100644 index 00000000..f2cba0e5 --- /dev/null +++ b/projects/coreboot/configs/z61t/textmode/2mb/targets @@ -0,0 +1,2 @@ +grub +seabios diff --git a/projects/coreboot/configs/z61t/textmode/targets b/projects/coreboot/configs/z61t/textmode/targets new file mode 100644 index 00000000..b22e49ab --- /dev/null +++ b/projects/coreboot/configs/z61t/textmode/targets @@ -0,0 +1,2 @@ +16mb +2mb |