diff options
Diffstat (limited to 'projects/ich9gen/sources/src/gbe/gbe.h')
| -rw-r--r-- | projects/ich9gen/sources/src/gbe/gbe.h | 116 |
1 files changed, 58 insertions, 58 deletions
diff --git a/projects/ich9gen/sources/src/gbe/gbe.h b/projects/ich9gen/sources/src/gbe/gbe.h index a1350fdd..14548e71 100644 --- a/projects/ich9gen/sources/src/gbe/gbe.h +++ b/projects/ich9gen/sources/src/gbe/gbe.h @@ -18,21 +18,21 @@ * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. */ - + /* * Purpose: provide struct representing gbe region. * Map actual buffers of this regions, directly to instances of these * structs. This makes working with gbe really easy. */ - + /* * bit fields used, corresponding to datasheet. See links to datasheets * and documentation in ich9deblob.c */ - + /* * See docs/hardware/x200_remove_me.html for info plus links to datasheet (also linked below) - * + * * Info about Gbe region (read whole datasheet): * http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf * https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums @@ -49,14 +49,14 @@ /* Size of the full gbe region in bytes */ #define GBEREGIONSIZE_8K 0x2000 /* - * Size of each sub-region in gbe. + * Size of each sub-region in gbe. * gbe contains two regions which * can be identical: main and backup. * These are each half the size of the full region */ #define GBEREGIONSIZE_4K 0x1000 -/* +/* * When adding up the first 0x3F 16-bit words * in a 4KiB GBE region, it should be equal * to 0xBABA @@ -74,7 +74,7 @@ * --------------------------------------------------------------------- * Gbe struct representing the data: * --------------------------------------------------------------------- - */ + */ struct GBE_RESERVED_WORD_03H { /* least significant bits */ @@ -147,17 +147,17 @@ struct GBE_EXTENDED_CONFIGURATION_CONTROL_WORD_2 { /* * Word 17h: LED 1 Configuration and Power Management - * + * * Default values for LEDCTL register fields controlling LED1 (LINK_1000) * output behaviours and OEM fields that define PHY power management * parameters loaded to the PHY_CTRL register. */ struct LED_CTL_1 { /* least significant bits */ - + /* See page 16 in the datasheet to show the different modes. deblobbed_descriptor.bin has "ACTIVITY" mode set */ uint8_t led1Mode : 4; /* Default value 0111 (bin) 7 (hex) says datasheet. 1011 (bin) B (hex) according to deblobbed_descriptor.bin */ - + uint8_t reserved1 : 1; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */ uint8_t led1BlinkMode : 1; /* 0 = slow blink, 1 = fast blink. should be identical to led0 blink mode. Default is 0 according to datasheet and deblobbed_descriptor.bin */ /* By setting this and led0 blink mode (see word 18h) to 1, you could enable a faster blinking on the LED's where the ethernet cable goes @@ -175,26 +175,26 @@ struct LED_CTL_1 { /* most significant bits */ }; -/* +/* * Word 18: LED 0 and 2 Configuration Defaults - * + * * Hardware defaults for LEDCTL register fields controlling LED0 (LINK/ACTIVITY) * and LED2 (LINK_100) output behaviours. */ struct LED_CTL_02 { /* least significant bits */ - + /* see page 16 in datasheet to show the different modes. deblobbed_descriptor has "LINK-UP" mode set */ uint8_t led0Mode : 4; /* default value 0100 (bin) or 4 (hex) according to datasheet. It's 0010 (bin) or 2 (hex) according to deblobbed_descriptor.bin */ - + uint8_t reserved1 : 1; /* Reserved. Should be set to 0 according to datasheet and deblobbed_descriptor.bin */ uint8_t led0BlinkMode : 1; /* This should be the same as led1BlinkMode (see word 17h). Default is 0 according to datasheet and deblobbed_descriptor.bin */ uint8_t led0Invert : 1; /* initial value of LED0_IVRT field. 0 = led0 has active low output, 1 is high active output. Default is 0 according to datasheet and deblobbed_descriptor.bin */ uint8_t led0Blink : 1; /* LED0_BLINK field. Should be 0 according to datasheet and deblobbed_descriptor.bin */ - + /* see page 16 in datasheet to shew the different modes. deblobbed_descriptor has "LINK_100" mode set */ uint8_t led2Mode : 4; /* default value 0110 (bin) or 6 (hex) according to datasheet and deblobbed_descriptor.bin */ - + uint8_t reserved2 : 1; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */ uint8_t led2BlinkMode : 1; /* 0 = slow blink. 1 = fast. default 0 according to datasheet and deblobbed_descriptor.bin */ uint8_t led2Invert : 1; /* LED2_IVRT field. Should be 0 according to datasheet and deblobbed_descriptor.bin */ @@ -218,7 +218,7 @@ struct GBE_PXE_BOOT_AGENT_MAIN_SETUP_OPTIONS { uint8_t efiPresence : 1; /* 1 means that an EFI image is present (0 means not present). deblobbed_descriptor.bin says 0. if 1, eeprom word 33h (efi version) becomes valid. if pxePresent is 1, that means EFI and PXE are both present.*/ uint8_t pxePresence : 1; /* 0 means that a PXE image is present. 1 means to pxe present. deblobbed_descriptor.bin says 0. if 0, then word 32h (PXE version) in eeprom becomes valid */ /* most significant bits */ - + /* This whole data structure is pointless, since libreboot doesn't (read: won't) * include the proprietary intel boot agent. Struct exists here simply for documentations sake. */ }; @@ -232,18 +232,18 @@ struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_31H { uint8_t disableLegacyWakeupSupport : 1; /* 1 means no changes in legacy wakeup support menu is allowed. default is 0, and deblobbed_descriptor.bin says 0 */ uint8_t disableFlashUpdate : 1; /* 1 means no changes to flash image using PROset is allowed. default is 0, and deblobbed_descriptor.bin says 0 */ uint8_t reserved1 : 2; /* Reserved. Datasheet says these must be 0, and deblobbed_descriptor.bin sets them to 0. */ - + /* * deblobbed_descriptor says 000 * 000 = normal behaviour * see datasheet (page 21) for other modes. */ uint8_t ibaBootOrderSetupMode : 3; - + uint8_t reserved2 : 3; /* Reserved. Datasheet says these must be set to 0, and deblobbed_descriptor.bin sets them to 0. */ uint8_t signature : 2; /* Must be set to 01 to indicate that this whole word has been configured by the agent or other software. deblobbed_descriptor.bin says 01. */ /* most significant bits */ - + /* This whole data structure is pointless, since libreboot doesn't (read: won't) * include the proprietary intel boot agent. Struct exists here simply for documentations sake. */ }; @@ -254,7 +254,7 @@ struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_32H { uint8_t minorVersionNumber : 4; /* PXE boot agent minor number. default is 2 (hex). deblobbed_descriptor.bin says 3 (hex) */ uint8_t majorVersionNumber : 4; /* PXE boot agent major number. default is F (hex). deblobbed_descriptor.bin says 1 (hex) */ /* most significant bits */ - + /* This whole data structure is pointless, since libreboot doesn't (read: won't) * include the proprietary intel boot agent. Struct exists here simply for documentations sake. */ }; @@ -269,7 +269,7 @@ struct GBE_PXE_IBA_CAPABILITIES { uint8_t reserved2_1 : 6; /* ^ part of reserved2_0. split this way so that the bitfields align */ uint8_t signature : 2; /* must be 01 to indicate that the word is configured by the agent or other software. deblobbed_descriptor.bin says 01 */ /* most significant bits */ - + /* This whole data structure is pointless, since libreboot doesn't (read: won't) * include the proprietary intel boot agent. Struct exists here simply for documentations sake. */ }; @@ -279,14 +279,14 @@ struct GBE_PXE_SOFTWARE_REGION { struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_31H bootAgentConfigurationCustomizationOptions31h; /* Word 31h */ struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_32H bootAgentConfigurationCustomizationOptions32h; /* Word 32h */ struct GBE_PXE_IBA_CAPABILITIES ibaCapabilities; /* Word 33h */ - + /* Words 34h to 3Eh (padding). Set these to 0xFFFF (according to deblobbed_descriptor.bin) */ uint16_t paddingWords34hTo3Eh[11]; - + /* * the pxe software region is practically useless in libreboot, since - * libreboot does not include the intel boot agent (it's proprietary software). - * + * libreboot does not include the intel boot agent (it's proprietary software). + * * Having this struct in place is simply for documentations sake. It is completely * irrelevant what you put here. filling it with 0xFFFF would probably be fine. */ @@ -301,90 +301,90 @@ struct GBEREGIONRECORD_4K { /* * Word 08 and 09 (pba low and pba high): - * + * * Both of these should be set to 0xFFFF by default, according to the datasheet. * "nine digit printed board assembly (PBA) number" for intel cards to be stored - * in a 4 byte (read: 2 word) field. - * + * in a 4 byte (read: 2 word) field. + * * Example: if pba number is 123456-003, then word 08 should be 1234h and word 09 becomes 5603. * Note: 1234 and 5603 above are big endian. In the image it would actually be 34 12 and 0356 - * + * * Example: in mine it was (in the image): 08 10 FF FF. That becomes 1008h and FFFFh, or * basically: 1008FF-0FF. The same was observed in another. - * + * * Setting it to FF FF FF FF should be fine, according to the datasheet. */ uint16_t pbaLow; /* Word 08. Set it to 0x1008 (according to deblobbed_descriptor.bin). */ uint16_t pbaHigh; /* Word 09. Set it to 0xFFFF (according to deblobbed_descriptor.bin). */ - + /* Word 0A */ struct GBE_PCI_INITIALIZATION_CONTROL_WORD pciInitializationControlWord; - - /* + + /* * Word 0B; subsystem ID - * + * * If load subsystem ID bit of word 0A (pci init control word) is * set to 1 (read: it is. in my deblobbed_descriptor.bin), store * the subsystem id here. Datasheet says that the default value is * 0000h, but you should set this to 20EEh (little endian: EE 20) */ uint16_t subsystemId; /* Set this to 0x20EE */ - + /* * Word 0C; subsystem vendor ID - * + * * If load subsystem vendor ID bit of word 0A (pci init control word) * is set to 1 (read: it is. in my deblobbed_descriptor.bin), store - * the subsystem vendor id here. Datasheet says that the default + * the subsystem vendor id here. Datasheet says that the default * value is 8086h, but you should set this to 17AAh (lendian: AA 17). */ uint16_t subsystemVendorId; /* Set this to 0x17AA */ - - /* + + /* * Word 0D: device ID - * + * * If load vendor/device ID in word 0A (pci init control word) is 1 * (it is) then this word is used to init device id using word 21h, * 1Eh or 1Fh. In my case, deviceId is 0x10F5. Word 21h is set to * 0x10CB, word 1Eh is 0x10F5 and 1Fh is 0x10BF - * + * * The datasheet says that 10F5 is for Intel 82567LM gigabit ethernet * controller; 10BF is for Intel 82567LF and 10CB is for Intel 82567V. - * + * * Based on this, the X200 is shown to have the Intel 82567LM ethernet * controller. */ uint16_t deviceId; /* Set this to 0x10F5. */ /* It is important that this is correct, for the linux kernel driver */ - - /* + + /* * Word 0E: vendor ID - * + * * If load vendor/device ID in word 0A (pci init control) is 1 (it is), * then this word used read to initialize the PCI vendor ID. Default - * value is 8086 according to datasheets, and deblobbed_descriptor.bin. - * + * value is 8086 according to datasheets, and deblobbed_descriptor.bin. + * * Intel is often 8086 as a PCI vendor ID. Because 8086. As in the CPU architecture. */ uint16_t vendorId; - + uint16_t deviceRevId; /* Word 0F: reserved bits. Set all bits to 0. */ struct GBE_LAN_POWER_CONSUMPTION lanPowerConsumption; /* Word 10: LAN Power Consumption (see struct definition) */ uint16_t reservedWords11h12h[2]; /* Words 11-12: Reserved. Set both of them to 0x0000 (according to datasheet). */ - + /* Word 13: Shared Initialization Control Word */ struct GBE_SHARED_INITIALIZATION_CONTROL_WORD sharedInitializationControlWord; - + /* Word 14: Extended Configuration Control Word 1 */ struct GBE_EXTENDED_CONFIGURATION_CONTROL_WORD_1 extendedConfigurationControlWord1; - + /* Word 15: Extended Configuration Control Word 2 */ struct GBE_EXTENDED_CONFIGURATION_CONTROL_WORD_2 extendedConfigurationControlWord2; - + /* Word 16: Extended Configuration Control Word 3 */ /* All bits reserved. Datasheet and deblobbed_descriptor.bin say to set it to zero */ uint16_t extendedConfigurationControlWord3; - + struct LED_CTL_1 ledCtl1; /* Word 17: LED 1 Configuration and Power Management */ struct LED_CTL_02 ledCtl02; /* Word 18: LED 0 and 2 Configuration Defaults */ uint16_t reservedWord19h; /* Word 19: Reserved. Default is 0x2B00 according to datasheet, but in deblobbed_descriptor.bin it is 0x2B40 */ @@ -401,16 +401,16 @@ struct GBEREGIONRECORD_4K { uint16_t reservedWords24to2Fh[12]; /* Words 24-2F: Reserved. These should all be 0x0000 according to datasheet and deblobbed_descriptor.bin */ struct GBE_PXE_SOFTWARE_REGION pxeSoftwareRegion; /* Words 30-3E: PXE Software Region */ uint16_t checkSum; /* when added to the sum of all words above, this should match GBECHECKSUMTOTAL */ - + /* set all bytes in here to 0xFF */ uint8_t padding[3968]; }; -/* main and backup region in gbe */ +/* main and backup region in gbe */ struct GBEREGIONRECORD_8K { struct GBEREGIONRECORD_4K main; struct GBEREGIONRECORD_4K backup; - /* + /* * Backup region: * This is actually "main" on X200, since the real main has a bad checksum * and other errors. You should do what you need on this one (if modifying @@ -423,7 +423,7 @@ struct GBEREGIONRECORD_8K { * Function declarations (keep gcc/make happy. check them in gbe.c) * --------------------------------------------------------------------- */ - + uint16_t gbeGetChecksumFrom4kBuffer(uint16_t* gbeWord, uint16_t desiredValue, int gbeRegionBase); uint16_t gbeGetChecksumFrom4kStruct(struct GBEREGIONRECORD_4K gbeStruct4k, uint16_t desiredValue); struct GBEREGIONRECORD_8K deblobbedGbeStructFromFactory(struct GBEREGIONRECORD_8K factoryGbeStruct8k); |