diff options
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0053-northbridge-amd-amdfam10-Add-ability-to-set-maximum-.patch')
| -rw-r--r-- | resources/libreboot/patch/kgpe-d16/0053-northbridge-amd-amdfam10-Add-ability-to-set-maximum-.patch | 84 |
1 files changed, 0 insertions, 84 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0053-northbridge-amd-amdfam10-Add-ability-to-set-maximum-.patch b/resources/libreboot/patch/kgpe-d16/0053-northbridge-amd-amdfam10-Add-ability-to-set-maximum-.patch deleted file mode 100644 index 7f456638..00000000 --- a/resources/libreboot/patch/kgpe-d16/0053-northbridge-amd-amdfam10-Add-ability-to-set-maximum-.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 1103d319eede186dc340a9c1701432f3ff33c468 Mon Sep 17 00:00:00 2001 -From: Timothy Pearson <tpearson@raptorengineeringinc.com> -Date: Wed, 10 Jun 2015 00:35:05 -0500 -Subject: [PATCH 053/143] northbridge/amd/amdfam10: Add ability to set maximum - P-state limit - -Change-Id: Ifdbb1ad11a856f855c59702ae0ee99e95b08520e -Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> ---- - src/mainboard/asus/kgpe-d16/cmos.default | 1 + - src/mainboard/asus/kgpe-d16/cmos.layout | 3 ++- - src/northbridge/amd/amdfam10/misc_control.c | 24 ++++++++++++++++++++---- - 3 files changed, 23 insertions(+), 5 deletions(-) - -diff --git a/src/mainboard/asus/kgpe-d16/cmos.default b/src/mainboard/asus/kgpe-d16/cmos.default -index 5bfaadd..a52b7fa 100644 ---- a/src/mainboard/asus/kgpe-d16/cmos.default -+++ b/src/mainboard/asus/kgpe-d16/cmos.default -@@ -17,6 +17,7 @@ interleave_memory_channels = Enable - cpu_c_states = Enable - cpu_cc6_state = Enable - sata_ahci_mode = Enable -+maximum_p_state_limit = 0xf - ieee1394 = Enable - power_on_after_fail = On - boot_option = Fallback -diff --git a/src/mainboard/asus/kgpe-d16/cmos.layout b/src/mainboard/asus/kgpe-d16/cmos.layout -index 247fd7b..307bddc 100644 ---- a/src/mainboard/asus/kgpe-d16/cmos.layout -+++ b/src/mainboard/asus/kgpe-d16/cmos.layout -@@ -46,7 +46,8 @@ entries - 465 1 e 1 cpu_c_states - 466 1 e 1 cpu_cc6_state - 467 1 e 1 sata_ahci_mode --468 1 r 0 allow_spd_nvram_cache_restore -+468 4 h 0 maximum_p_state_limit -+473 1 r 0 allow_spd_nvram_cache_restore - 477 1 e 1 ieee1394 - 728 256 h 0 user_data - 984 16 h 0 check_sum -diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c -index 8777e8f..703ae51 100644 ---- a/src/northbridge/amd/amdfam10/misc_control.c -+++ b/src/northbridge/amd/amdfam10/misc_control.c -@@ -124,16 +124,32 @@ static void mcf3_set_resources(device_t dev) - - static void misc_control_init(struct device *dev) - { -- u32 cmd; -+ uint32_t dword; -+ uint8_t nvram; -+ uint8_t boost_limit; -+ uint8_t current_boost; - - printk(BIOS_DEBUG, "NB: Function 3 Misc Control.. "); - - /* Disable Machine checks from Invalid Locations. - * This is needed for PC backwards compatibility. - */ -- cmd = pci_read_config32(dev, 0x44); -- cmd |= (1<<6) | (1<<25); -- pci_write_config32(dev, 0x44, cmd ); -+ dword = pci_read_config32(dev, 0x44); -+ dword |= (1<<6) | (1<<25); -+ pci_write_config32(dev, 0x44, dword); -+ -+ boost_limit = 0xf; -+ if (get_option(&nvram, "maximum_p_state_limit") == CB_SUCCESS) -+ boost_limit = nvram & 0xf; -+ -+ /* Set P-state maximum value */ -+ dword = pci_read_config32(dev, 0xdc); -+ current_boost = (dword >> 8) & 0x7; -+ if (boost_limit > current_boost) -+ boost_limit = current_boost; -+ dword &= ~(0x7 << 8); -+ dword |= (boost_limit & 0x7) << 8; -+ pci_write_config32(dev, 0xdc, dword); - - printk(BIOS_DEBUG, "done.\n"); - } --- -1.7.9.5 - |