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Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0060-mainboard-asus-kgpe-d16-Properly-configure-SR5690-so.patch')
-rw-r--r--resources/libreboot/patch/kgpe-d16/0060-mainboard-asus-kgpe-d16-Properly-configure-SR5690-so.patch32
1 files changed, 32 insertions, 0 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0060-mainboard-asus-kgpe-d16-Properly-configure-SR5690-so.patch b/resources/libreboot/patch/kgpe-d16/0060-mainboard-asus-kgpe-d16-Properly-configure-SR5690-so.patch
new file mode 100644
index 00000000..40a2116e
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0060-mainboard-asus-kgpe-d16-Properly-configure-SR5690-so.patch
@@ -0,0 +1,32 @@
+From c3b35b628326f2b6f8b6b8fca8ab744654e8631b Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Fri, 12 Jun 2015 20:10:58 -0500
+Subject: [PATCH 060/143] mainboard/asus/kgpe-d16: Properly configure SR5690
+ southbridge PIKE slot
+
+Change-Id: I2f1373905ffd6460ac3c7c21738e2e2a9aa2e463
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/mainboard/asus/kgpe-d16/devicetree.cb | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/src/mainboard/asus/kgpe-d16/devicetree.cb b/src/mainboard/asus/kgpe-d16/devicetree.cb
+index cd22893..8eeb33e 100644
+--- a/src/mainboard/asus/kgpe-d16/devicetree.cb
++++ b/src/mainboard/asus/kgpe-d16/devicetree.cb
+@@ -43,9 +43,9 @@ chip northbridge/amd/amdfam10/root_complex # Root complex
+ end
+ register "gpp1_configuration" = "0" # Configuration 16:0 default
+ register "gpp2_configuration" = "1" # Configuration 8:8
+- #register "gpp3a_configuration" = "2" # Configuration 4:1:1:0:0:0
+- register "gpp3a_configuration" = "11" # Configuration 1:1:1:1:1:1
+- register "port_enable" = "0x3ffc" # Enable all ports except 0 and 1
++ register "gpp3a_configuration" = "2" # Configuration 4:1:1:0:0:0
++ register "port_enable" = "0x3f1c" # Enable all ports except 0, 1, 5, 6, and 7
++ register "pcie_settling_time" = "1000000" # Allow PIKE to be detected / configured
+ end
+ chip southbridge/amd/sb700 # Secondary southbridge
+ device pci 11.0 on end # SATA
+--
+1.7.9.5
+