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| * Declare and support dependencies for dejavu-fontsAndrew Robbins2019-02-102-0/+9
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| * Declare and support dependencies for cros-ecAndrew Robbins2019-02-106-0/+13
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* Merge branch 'swic201pafix' of swiftgeek/libreboot into masterAndrew Robbins2019-01-301-1/+2
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| * Clarify C201PA nameSebastian 'Swift Geek' Grzywna2019-01-291-1/+2
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* Merge branch 'project-dependencies' of and_who/libreboot into masterSwift Geek2019-01-24116-2/+199
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| * Declare project dependencies for coreboot depthcharge targetsAndrew Robbins2019-01-2211-0/+11
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| * Declare project dependencies for coreboot seabios targetsAndrew Robbins2019-01-2243-0/+43
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| * Declare project dependencies for coreboot grub targetsAndrew Robbins2019-01-2242-0/+42
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| * Declare minimum project dependencies for all boardsAndrew Robbins2019-01-2216-0/+20
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| * Support declaring dependencies for coreboot targetsAndrew Robbins2019-01-222-0/+9
| | | | | | | | | | | | | | | | | | | | | | Projects listed in projects/coreboot/configs/dependencies are the minimum required by all boards. Dependencies required by a target in addition to those specified in parent dependencies files may be declared in the target's directory, e.g: projects/coreboot/configs/x200/dependencies
| * Add preliminary dependency handling supportAndrew Robbins2019-01-222-2/+74
|/ | | | | | | | | | | | | | Projects may now declare other projects it depends upon through the file "dependencies" located in a project's $CONFIGS directory. This file requires that each dependency listed, one per line, correspond to a project in the $PROJECTS directory; the dependency may be in any form accepted by the libreboot script, e.g: ./libreboot build $dependency Multiple dependencies files, one per target, are read provided they are located in target directories and those targets were included in the list of arguments passed to the libreboot script.
* Merge branch 'restructure' of and_who/libreboot into masterSwift Geek2019-01-21316-156/+125
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| * Restructure Z61t coreboot target directoriesAndrew Robbins2019-01-1412-3/+4
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure X60 coreboot target directoriesAndrew Robbins2019-01-1425-15/+10
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure X200 coreboot target directoriesAndrew Robbins2019-01-1436-26/+17
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure Veyron Speedy coreboot target directoriesAndrew Robbins2019-01-1410-3/+4
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure Veyron Minnie coreboot target directoriesAndrew Robbins2019-01-1410-3/+4
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure Veyron Mickey coreboot target directoriesAndrew Robbins2019-01-146-2/+2
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure Veyron Jerry coreboot target directoriesAndrew Robbins2019-01-1410-3/+4
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure T60 coreboot target directoriesAndrew Robbins2019-01-1425-15/+10
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure T400 coreboot target directoriesAndrew Robbins2019-01-1436-26/+17
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure Nyan Blaze coreboot target directoriesAndrew Robbins2019-01-1410-3/+4
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure Nyan Big coreboot target directoriesAndrew Robbins2019-01-1410-3/+4
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure Macbook2,1 coreboot target directoriesAndrew Robbins2019-01-1425-15/+10
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure KGPE-D16 coreboot target directoriesAndrew Robbins2019-01-1412-3/+4
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure KFSN4-DRE coreboot target directoriesAndrew Robbins2019-01-1425-15/+10
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure KCMA-D8 coreboot target directoriesAndrew Robbins2019-01-1412-3/+4
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure GA-G41M-ES2L coreboot target directoriesAndrew Robbins2019-01-1425-15/+10
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure D945GCLF coreboot target directoriesAndrew Robbins2019-01-1415-0/+3
| | | | | | | | | | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
| * Restructure D510MO coreboot target directoriesAndrew Robbins2019-01-1412-3/+4
|/ | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
* Merge branch 'd945gclf' of and_who/libreboot into masterSwift Geek2019-01-135-0/+10
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| * Create SeaBIOS/GRUB targets for D945GCLF corebootAndrew Robbins2019-01-123-0/+4
| | | | | | | | | | | | | | D945GCLF ROMs can now be built with either SeaBIOS or GRUB as a default payload for use with a 1MiB flash, e.g.: './libreboot build coreboot d945gclf textmode 1mb seabios'
| * Create 1MiB coreboot config/target for D945GCLFAndrew Robbins2019-01-122-0/+6
|/ | | | | | | | | Previously it was thought that only boards with 512KiB flash chips were produced but JohnMH (in #libreboot) ran across one with an SST25LF080A 1MiB flash. D945GCLF Coreboot ROMs can be built with, e.g.: './libreboot build coreboot d945gclf textmode 1mb'
* Merge branch 'less-bugs' of and_who/libreboot into masterSwift Geek2019-01-111-24/+24
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| * Don't display paths in libreboot_usage() outputAndrew Robbins2019-01-091-2/+2
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| * Print libreboot usage to stdout, not stderrAndrew Robbins2019-01-091-24/+24
|/ | | | | Makes things simpler if piping the usage output to less, for example.
* Merge branch 'kfsn4-dre' of eskere/libreboot into masterAndrew Robbins2019-01-091-10/+41
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| * Update KFSN4-DRE board infoeskere2019-01-081-10/+41
| | | | | | | | | | | | | | | | | | | | I have pointed out the various version of this board ("standard", 2S, iKVM, iKVM/IST, SAS, SAS/iKVM and SAS/iKVM/IST), and specified their differences and which CPUs they do support, also providing a link to the official ASUS website and to the board manual. Also I've tested the board with the text mode ROM and it's not usable (because it's jittery), so I'm suggesting to flash with the vesafb ROM.
* | Merge branch 'www/g41m-debian-trisquel-instructions' of libreboot/libreboot ↵Swift Geek2019-01-063-1/+20
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| * | Add note about fb=false parameter for debian-installer on G41MLeah Rowe2019-01-063-1/+20
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* | | Merge branch 'www-generation' of and_who/libreboot into masterLeah Rowe2019-01-061-6/+1
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| * | Condense sed invocations in publish.shAndrew Robbins2019-01-051-6/+1
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| * | Rework regexp for .md extension replacement (www)Andrew Robbins2019-01-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Related issue #570 The markdown file extension was not consistently replaced with an HTML extension due to a bug in the regexps used in www/publish.sh caused by the A-Z character range not being included in the character alternative. Along with correcting the aforementioned, this patch allows for more robust link anchor capturing by allowing the use and replacement of characters within the ranges a-z, A-Z, 0-9, _ (underscore), and - (hyphen).
* | | Merge branch 'master' of YwJxK25H/libreboot into masterAndrew Robbins2019-01-061-13/+5
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| * | Fix improper line breaks and typoYwJxK25H2019-01-061-13/+5
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* | Merge branch 'namefix' of swiftgeek/libreboot into masterLeah Rowe2018-12-291-38/+54
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| * | docs/misc/codenames.md: Some fixesSebastian 'Swift Geek' Grzywna2018-12-291-38/+54
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* | Merge branch 'grub-misc' of and_who/libreboot into masterLeah Rowe2018-12-293-20/+16
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| * | Update BIOS GRUB prefix hard coded in core.imgAndrew Robbins2018-12-291-1/+1
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| * | Copy correct number of bytes for floppy BPBAndrew Robbins2018-12-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The Bios Parameter Block (BPB) is 51 bytes, not 52. As-is, the first byte of executable code from the floppy image boot record is copied along with the BPB to boot.img; this extra byte isn't harmful to leave in since execution begins at offset 0x63+2 rather than 0x3C+2, but is a little messy.
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