| Commit message (Collapse) | Author | Age | Files | Lines |
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Macbook2,1 ROM can now be built with either SeaBIOS or GRUB as a
default payload, e.g.:
'./libreboot build coreboot macbook21 textmode 2mb seabios'
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The 16mb target is included as an example.
Macbook2,1 Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot macbook21 corebootfb 2mb'
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The corebootfb ROM will use Coreboot's framebuffer for display while
the textmode ROM will use the legacy VGA text mode which is necessary
for payloads such as Memtest86+.
Options (and their values) changed in the new corebootfb config:
#CONFIG_VGA_TEXT_FRAMEBUFFER is not set
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
Macbook2,1 Coreboot ROMs can now be built with
'./libreboot build coreboot macbook21 corebootfb' or
'./libreboot build coreboot macbook21 textmode', respectively.
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T60 ROM can now be built with either SeaBIOS or GRUB as a
default payload, e.g.:
'./libreboot build coreboot t60 textmode 2mb seabios'
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The 16mb target is included as an example.
T60 Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot t60 corebootfb 2mb'
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The corebootfb ROM will use Coreboot's framebuffer for display while
the textmode ROM will use the legacy VGA text mode which is necessary
for payloads such as Memtest86+.
Options (and their values) changed in the new corebootfb config:
#CONFIG_VGA_TEXT_FRAMEBUFFER is not set
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
T60 Coreboot ROMs can now be built with
'./libreboot build coreboot t60 corebootfb' or
'./libreboot build coreboot t60 textmode', respectively.
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X60 ROM can now be built with either SeaBIOS or GRUB as a
default payload, e.g.:
'./libreboot build coreboot x60 textmode 2mb seabios'
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These configurations will be read and supplied to make as
command-line arguments and override those defined in the config at
projects/coreboot/configs/x60/config
The 16mb target is included as an example.
X60 Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot x60 corebootfb 2mb'
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The corebootfb ROM will use Coreboot's framebuffer for display while
the textmode ROM will use the legacy VGA text mode which is necessary
for payloads such as Memtest86+.
Options (and their values) changed in the new corebootfb config:
#CONFIG_VGA_TEXT_FRAMEBUFFER is not set
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
X60 Coreboot ROMs can now be built with
'./libreboot build coreboot x60 corebootfb' or
'./libreboot build coreboot x60 textmode', respectively.
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X200 can now be built with either SeaBIOS or GRUB as a default
payload, e.g.:
'./libreboot build coreboot x200 textmode 16mb seabios'
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These configurations will be read and supplied to make as
command-line arguments and override those defined in the config at
projects/coreboot/configs/x200/config
X200 Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot x200 corebootfb 8mb'
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The corebootfb ROM will use Coreboot's framebuffer for display while
the textmode ROM will use the legacy VGA text mode which is necessary
for payloads such as Memtest86+.
Options (and their values) changed in the new corebootfb config:
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
X200 Coreboot ROMs can now be built with
'./libreboot build coreboot x200 corebootfb' or
'./libreboot build coreboot x200 textmode', respectively.
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The 8mb X200 config from projects/coreboot/configs/x200_8mb/config
is used as the base config for the x200 target.
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T400 (and variants) can now be built with either SeaBIOS or GRUB
as default payloads, e.g.:
'./libreboot build coreboot t400 textmode 16mb seabios'
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These configurations are intended to be read and supplied to make as
command-line arguments and override those defined in the config at
projects/coreboot/configs/{corebootfb,textmode}/config
For now, these configs do nothing--subsequent commits will add this
overriding functionality.
T400 Coreboot ROMs can be built with
'./libreboot build coreboot t400 corebootfb 8mb', for example, though
the last argument specifying flash chip size does nothing currently.
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The corebootfb ROM will use Coreboot's framebuffer for display while
the textmode ROM will use the legacy VGA text mode which is necessary
for payloads such as Memtest86+.
Options (and their values) changed in the new corebootfb config:
#CONFIG_VGA_TEXT_FRAMEBUFFER is not set
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
T400 Coreboot ROMs can now be built with
'./libreboot build coreboot t400 corebootfb' or
'./libreboot build coreboot t400 textmode', respectively.
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The goal here is to have fewer full configuration files.
By consolidating the T400 board configs (and board variants such as
the R400/T500/W500) into at most two base configs we can rely on
separate target-specific configs (e.g., for different flash sizes) to
override our default values given in
projects/coreboot/configs/t400/config
File contents of the new configs located at
projects/coreboot/t400/variants/ are now supplied to make as
command-line arguments, overriding the same configurations in the
base config. The T400 file is included as an example of which
configurations need to be overriden by a variant for a proper
SMBIOS name to be used.
Configs allowing for different ROM chip sizes other than the default
are reimplemented in a subsequent commit.
The following are no longer valid targets when building Coreboot:
r400_16mb
r400_8mb
r400_4mb
t400_16mb
t400_8mb
t400_4mb
t500_16mb
t500_8mb
t500_4mb
w500_16mb
w500_8mb
w500_4mb
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Moving the board-specific directories into projects/coreboot/configs/
and removing the payload-specific directories (depthcharge, seabios)
will allow for better management of Coreboot configs for each
board. Instead of having a config for each payload, there will be
at most two main configs (textmode, corebootfb) for each board.
Selecting a default payload will be reimplemented in a subsequent
commit.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This config was updated using Coreboot's 'oldconfig' make target.
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This only affects the GM45-based systems (e.g., X200, T400, etcetera)
and GA-G41M-ES2L board as they require an MAC address hardcoded into
the ROM for their integrated NIC to function.
The new default MAC address is now '00:4c:69:62:72:65' (Libre).
Credit goes to specing from the #libreboot IRC channel for coming up
with it.
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This config was updated using Coreboot's 'oldconfig' make target.
New configuration options enabled with this commit:
* ENABLE_VMX=y
* SET_VMX_LOCK_BIT=y
* H8_BEEP_ON_DEATH=y
* H8_FLASH_LEDS_ON_DEATH=y
* VGA_TEXT_FRAMEBUFFER=y
* UART_PCI_ADDR=0x0
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