| Commit message (Collapse) | Author | Age | Files | Lines |
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Avoid redundant actions if certain projects which are part of
another (e.g. crossgcc in the coreboot repository) are left out of the
download process.
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There is more than one correct ordering of projects in this file;
"correct" includes handling of project dependencies.
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Projects listed in this file are those (and their dependencies)
which are necessary for creating Libreboot images in all configurations.
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The projects listed in this file are those which are built when
running the build action.
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All tools currently in the build system should be represented
in these files now.
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Projects listed in projects/coreboot/configs/dependencies
are the minimum required by all boards.
Dependencies required by a target in addition to those
specified in parent dependencies files may be declared in the target's
directory, e.g:
projects/coreboot/configs/x200/dependencies
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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The intent is to create a simple rule of thumb where arguments
are given beginning with those that relate to the device's physical
attributes, such as flash chip size, continuing with arguments
on how to use the hardware (e.g. display mode), and ending with
anything else.
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D945GCLF ROMs can now be built with either SeaBIOS or GRUB as
a default payload for use with a 1MiB flash, e.g.:
'./libreboot build coreboot d945gclf textmode 1mb seabios'
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Previously it was thought that only boards with 512KiB flash chips
were produced but JohnMH (in #libreboot) ran across one with an
SST25LF080A 1MiB flash.
D945GCLF Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot d945gclf textmode 1mb'
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The Bios Parameter Block (BPB) is 51 bytes, not 52. As-is, the
first byte of executable code from the floppy image boot record
is copied along with the BPB to boot.img; this extra byte
isn't harmful to leave in since execution begins at offset 0x63+2
rather than 0x3C+2, but is a little messy.
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