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* Change default Libreboot MAC addressAndrew Robbins2018-01-162-2/+2
| | | | | | | | | | This only affects the GM45-based systems (e.g., X200, T400, etcetera) and GA-G41M-ES2L board as they require an MAC address hardcoded into the ROM for their integrated NIC to function. The new default MAC address is now '00:4c:69:62:72:65' (Libre). Credit goes to specing from the #libreboot IRC channel for coming up with it.
* Add project ich9gen install, macaddress filesAndrew Robbins2018-01-162-0/+10
| | | | | | | The file 'macaddress' is expected to contain a correctly formed MAC address to be compiled into the descriptor binary generated by ich9gen. The file is optional and poses no issue if not present, however, as ich9gen will simply insert its own default in that case.
* Add project ich9gen action scriptsAndrew Robbins2018-01-152-0/+129
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* Make 'all', 'clean' phony targets in ich9gen MakefileAndrew Robbins2018-01-151-0/+2
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* Delete trailing whitespace from ich9gen & co.Andrew Robbins2018-01-1517-292/+290
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* Copy ich9gen sources into projects/ich9gen/sourcesAndrew Robbins2018-01-1524-0/+3474
| | | | | Sources for ich9deblob and demefactory are included alongside ich9gen and preserved for future applications.
* Update Coreboot config for board x60Andrew Robbins2018-01-141-103/+210
| | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * VGA_TEXT_FRAMEBUFFER=y * UART_PCI_ADDR=0x0
* Update Coreboot config for board x200_8mbAndrew Robbins2018-01-141-62/+147
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_8m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board x200_4mbAndrew Robbins2018-01-141-62/+147
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_4m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board x200_16mbAndrew Robbins2018-01-141-62/+147
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_16m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board w500_8mbAndrew Robbins2018-01-141-74/+156
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_8m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board w500_4mbAndrew Robbins2018-01-141-74/+156
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_4m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board w500_16mbAndrew Robbins2018-01-141-74/+156
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_16m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board t60Andrew Robbins2018-01-141-101/+208
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * VGA_TEXT_FRAMEBUFFER=y * UART_PCI_ADDR=0x0 Previously configured options which were changed with this commit: * LOCALVERSION=""
* Update Coreboot config for board t500_8mbAndrew Robbins2018-01-141-73/+155
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_8m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board t500_4mbAndrew Robbins2018-01-141-73/+155
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_4m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board t500_16mbAndrew Robbins2018-01-141-73/+155
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_16m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board t400_8mbAndrew Robbins2018-01-141-73/+155
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_8m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board t400_4mbAndrew Robbins2018-01-141-73/+155
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_4m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board t400_16mbAndrew Robbins2018-01-141-73/+155
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_16m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board r400_8mbAndrew Robbins2018-01-141-73/+155
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_8m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board r400_4mbAndrew Robbins2018-01-141-73/+155
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_4m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board r400_16mbAndrew Robbins2018-01-141-73/+155
| | | | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * H8_BEEP_ON_DEATH=y * H8_FLASH_LEDS_ON_DEATH=y * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_16m.bin" * VGA_TEXT_FRAMEBUFFER=y The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board qemu_q35_ich9Andrew Robbins2018-01-141-94/+183
| | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * HAVE_IFD_BIN=y * IFD_BIN_PATH="$(obj)/../ich9gen/ich9fdgbe_8m.bin" * VGA_TEXT_FRAMEBUFFER=y * UART_PCI_ADDR=0x0 The Intel Firmware Descriptor (IFD) will be generated by ich9gen in Libreboot's new build system.
* Update Coreboot config for board qemu_i440fx_piix4Andrew Robbins2018-01-141-89/+167
| | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * VGA_TEXT_FRAMEBUFFER=y * UART_PCI_ADDR=0x0
* Update Coreboot config for board macbook2,1Andrew Robbins2018-01-141-101/+201
| | | | | | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * VGA_TEXT_FRAMEBUFFER=y * UART_PCI_ADDR=0x0 Previously configured options which were changed with this commit: * LOCALVERSION=""
* Update Coreboot config for board kgpe-d16Andrew Robbins2018-01-141-71/+146
| | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y * UART_PCI_ADDR=0x0
* Update Coreboot config for board kfsn4-dreAndrew Robbins2018-01-141-87/+173
| | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * VGA_TEXT_FRAMEBUFFER=y * UART_PCI_ADDR=0x0
* Update Coreboot config for board kcma-d8Andrew Robbins2018-01-141-70/+143
| | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y * UART_PCI_ADDR=0x0
* Update Coreboot config for board ga-g41m-es2lAndrew Robbins2018-01-141-72/+160
| | | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * VGA_TEXT_FRAMEBUFFER=y * REALTEK_8168_MACADDRESS="00:f5:f0:40:71:fe"
* Update Coreboot config for board d945gclfAndrew Robbins2018-01-121-77/+152
| | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y
* Update Coreboot config for board d510moAndrew Robbins2018-01-121-95/+217
| | | | | | | | | | This config was updated using Coreboot's 'oldconfig' make target. New configuration options enabled with this commit: * ENABLE_VMX=y * SET_VMX_LOCK_BIT=y * UART_PCI_ADDR=0x0
* Bump flashrom revision to v1.0Andrew Robbins2018-01-031-1/+1
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* Prefer canonical flashrom repository over mirrorAndrew Robbins2018-01-031-1/+1
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* Merge branch 'coreboot-rebase' of and_who/libreboot into masterSwift Geek2017-12-3129-80/+25
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| * Delete board-specific Coreboot revision filesAndrew Robbins2017-12-2226-26/+0
| | | | | | | | | | | | | | Testing needs to be done on the revision specified at 'projects/coreboot/configs/revision', thus all board-specific revision files should be removed in order to avoid checking out an older commit in the meantime.
| * Delete obsolete Coreboot patch from treeAndrew Robbins2017-12-221-27/+0
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| * Update Coreboot patch for removing git submodulesAndrew Robbins2017-12-221-26/+24
| | | | | | | | | | | | | | This is an update to Paul Kocialkowski's previous patch. Only an absolute minimum of changes were made over those of Paul's in order for it to apply, successfully, hence keeping Paul as the author of the patch.
| * Bump Coreboot revision to current upstream HEADAndrew Robbins2017-12-211-1/+1
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* | Revert "Statically link bucts"Sebastian 'Swift Geek' Grzywna2017-12-232-2/+2
| | | | | | | | | | This reverts commit 5100c4e7e9cc5e06cf32e06a5a0bd0d79d7655c6. We do not have yet libc and other deps for bucts inside libreboot
* | Remove bucts' download(), download_check() actionsAndrew Robbins2017-12-221-12/+0
| | | | | | | | | | bucts is now merged in-tree, so the download() and download_check() actions are no longer necessary.
* | Delete obsolete bucts patchesAndrew Robbins2017-12-222-37/+0
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* | Statically link buctsAndrew Robbins2017-12-222-2/+2
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* | Bring bucts source files into libreboot treeAndrew Robbins2017-12-222-0/+211
|/ | | | | | | Considering bucts is no longer maintained by Peter Stuge--its original author--and it being integral to Librebooting the X60/T60, it seems best for bucts to be merged into the main Libreboot repository.
* Update 'projects/coreboot/configs/seabios/w500_8mb/config'CoreShoe2017-12-051-1/+1
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* Update 'projects/coreboot/configs/seabios/w500_4mb/config'CoreShoe2017-12-051-1/+1
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* Update 'projects/coreboot/configs/seabios/w500_16mb/config'CoreShoe2017-12-051-1/+1
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* Update 'projects/coreboot/configs/seabios/t500_8mb/config'CoreShoe2017-12-051-1/+1
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* Update 'projects/coreboot/configs/seabios/t500_4mb/config'CoreShoe2017-12-051-1/+1
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* Update 'projects/coreboot/configs/seabios/t500_16mb/config'CoreShoe2017-12-051-1/+1
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