| Commit message (Collapse) | Author | Age | Files | Lines |
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Add coreinfo as optional payload providing various
useful system information.
As part of coreboot, coreinfo does not need to be
downloaded seperately, just build it using
$ ./build module coreinfo
after downloading and building coreboot.
See https://www.coreboot.org/Payloads#Coreinfo for
more information.
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We now tell coreboot's build system what version string to use.
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This is one of the things needed, for building coreboot in a
reproducible fashion.
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find bin/grub [...] also searches other boards'
ROMs and thus would print a ROM layout not
neccessarily belonging to the same board images
got built for.
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Also contains other fixes from coreboot, like:
* 551cff0 Derive lvds_dual_channel from EDID timings.
^ makes single/dual channel LVDS selection on GM45 automatic
* 26fc544 lenovo/t60: Enable native intel gfx init.
^ was being maintained in libreboot, now upstreamed so not needed
Framebuffer mode was disabled for the KGPE-D16, because only
text-mode works at the moment.
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Forgot to do this during rebase
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The ich9deblob and ich9gen utilities were modified, so that they
support reading and/or writing descriptor images where the GbE
region is not defined. These utilities were also re-factored
and tidied up a bit.
A quick was noticed during the course of this work, in that
Compenent 1 Density was being set to 8MiB constantly, even
on systems with 4MiB flash chips. Component 2 Density was
set statically to 2MiB. ich9gen now sets both to 4MiB or 8MiB,
depending on whether building the descriptor for a 4MiB or
8MiB ROM image.
There are still some ACPI bugs (see docs/hcl/r500.html), which
will have to be fixed upstream. TODO: get hw reg dumps from
a factory R500, and compare with the X200 or T400 dumps.
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