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* iunfinished patch: copy coreboot per revision, not boardFrancis Rowe2016-03-011-107/+11
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* use only 1 crossgcc revision in librebootFrancis Rowe2016-02-271-38/+18
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* download/coreboot: reset to common revisionFrancis Rowe2016-02-271-0/+5
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* download/coreboot: use HTTPS (works reliably now, but didn't before)Francis Rowe2016-01-191-1/+1
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* download/coreboot: fix unsafe rm -RfFrancis Rowe2016-01-051-1/+1
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* Use different coreboot revisions and patches per boardFrancis Rowe2016-01-041-99/+183
| | | | | | | | | | | | | | | | | | The release archives will be bigger, but this is a necessary change that makes libreboot development easier. At present, there are boards maintained in libreboot by different people. By doing it this way, that becomes much easier. This is in contrast to the present situation, where a change to one board potentially affects all other boards, especially when updating to a new version of coreboot. Coreboot-libre scripts, download scripts, build scripts - everything. The entire build system has been modified to reflect this change of development. For reasons of consistency, cbfstool and nvramtool are no longer included in the util archives.
* download/coreboot: note about new patch in upstream (2)Francis Rowe2015-12-311-0/+2
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* download/coreboot: note about new patch in upstreamFrancis Rowe2015-12-311-0/+2
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* Replace Chromebook mentions with CrOS, that is more genericPaul Kocialkowski2015-11-061-2/+2
| | | | | | | | | | Not all CrOS devices are Chromebooks (laptops) or run on ARM, not all RK3288 CrOS devices are Chromebooks, either. We want to support more CrOS devices, including some that are not Chromebooks, such as the ASUS Chromebit! Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* veyron_speedy config update, depthcharge menus improvementPaul Kocialkowski2015-11-061-3/+2
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* download/coreboot: add missing copyright attributionFrancis Rowe2015-11-061-0/+1
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* download/coreboot: remove false informationFrancis Rowe2015-11-061-1/+1
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* Update coreboot to new version (use latest stable kgpe-d16 tree)Francis Rowe2015-11-061-1/+1
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* download/coreboot: temporary fix: revert vboot (for ASUS C201)Francis Rowe2015-11-061-1/+1
| | | | Temporary fix for build error.
* KGPE-D16: update patch set (also update coreboot and vboot)Francis Rowe2015-10-191-72/+23
| | | | | | | | | | | Also contains other fixes from coreboot, like: * 551cff0 Derive lvds_dual_channel from EDID timings. ^ makes single/dual channel LVDS selection on GM45 automatic * 26fc544 lenovo/t60: Enable native intel gfx init. ^ was being maintained in libreboot, now upstreamed so not needed Framebuffer mode was disabled for the KGPE-D16, because only text-mode works at the moment.
* New board: ASUS KGPE-D16Francis Rowe2015-10-171-0/+6
| | | | | | | | | | | | | | | | | | | | coreboot build errors: In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0: src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration static inline enum cb_err get_option(void *dest, const char *name) ^ In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0: src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here enum cb_err get_option(void *dest, const char *name); Ping tpearson about this. Also ping him about the fact that there isn't actually an option to enable or disable native graphics initialization, but that the option MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the Kconfig file. I think this is probably since there isn't even an option ROM available for the machine, so it's pointless to offer the setting.
* download/coreboot: add note about patchFrancis Rowe2015-10-141-0/+3
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* download/coreboot: note about patch that was merged upstreamFrancis Rowe2015-10-121-0/+1
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* download/coreboot: comment the git reset instruction for vbootFrancis Rowe2015-10-121-0/+1
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* Chromebook C201 (codename veyron_speedy) supportPaul Kocialkowski2015-10-111-0/+42
| | | | | | | | | | | | | | | | | This introduces Libreboot support for the Asus Chromebook C201 (codename veyron_speedy). At this point, this produces a standalone Libreboot image that can be flashed to the RO Coreboot partition of the SPI flash, as well as the Libreboot version that can be flash to the RO Firmware ID partition. Libreboot on the Chromebook C201 uses the depthcharge bootloader, modified to display text messages instead of ChromeOS bitmaps (that encourage the use of ChromeOS). For convenience, an installation script, chromebook-flash-replace, is provided along with a description of the flash layout, to ease the replacement of the Coreboot and RO Firmware ID partitions on the full SPI flash image. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* download/coreboot: add coreboot version infoFrancis Rowe2015-10-111-0/+9
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* Update coreboot-libre based on coreboot a2bed346aFrancis Rowe2015-10-111-5/+8
| | | | | | | | | | | | | | | More microcode blobs were deleted upstream, which are therefore no longer deleted by coreboot-libre. util/broadcom/secimage/misc.c is not a blob. Some non-blobs were deleted upstream, which are therefore no longer listed in libreboot's nonblobs list. New non-blobs were found, added to the nonblobs list. vboot submodule was added, since there are parts of it that cbfstool needs. This submodule is now deblobbed by libreboot.
* New board: ThinkPad R500 (experimental)Francis Rowe2015-09-201-0/+1
| | | | | | | | | | | | | | | | | | The ich9deblob and ich9gen utilities were modified, so that they support reading and/or writing descriptor images where the GbE region is not defined. These utilities were also re-factored and tidied up a bit. A quick was noticed during the course of this work, in that Compenent 1 Density was being set to 8MiB constantly, even on systems with 4MiB flash chips. Component 2 Density was set statically to 2MiB. ich9gen now sets both to 4MiB or 8MiB, depending on whether building the descriptor for a 4MiB or 8MiB ROM image. There are still some ACPI bugs (see docs/hcl/r500.html), which will have to be fixed upstream. TODO: get hw reg dumps from a factory R500, and compare with the X200 or T400 dumps.
* all scripts: general fixes and clean upFrancis Rowe2015-08-301-3/+0
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* downloads: don't check sha512 on git/svm downloadsFrancis Rowe2015-08-291-7/+0
| | | | | Resetting to those commits already implies that they are correct, because git already does integrity checking.
* Update coreboot to the latest as of 4 August 2015Francis Rowe2015-08-041-33/+20
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* download/coreboot: verify the checksums of downloaded filesFrancis Rowe2015-07-121-0/+7
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* kfsn4-dre: Add CONFIG_VGA=y to the configFrancis Rowe2015-06-261-0/+6
| | | | Video initialization won't work without it.
* docs/index.html: Add historical context to the descriptionFrancis Rowe2015-06-241-0/+3
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* Update coreboot again (a patch was merged upstream)Francis Rowe2015-06-161-7/+1
| | | | | | | | | | The patch for only requiring cmake for clang users was merged. This patch is important, because libreboot doesn't want to use clang, and doesn't want any dependences that it relies on which it doesn't need. Also, this and the other recent update re-add support for ACPI brightness methods on the Thinkpad X60 and T60.
* Update coreboot-libreFrancis Rowe2015-06-161-98/+60
| | | | | | | | | | | | Rebase all patches. Remove the ones that are no longer needed. More CPU microcode updates were moved to coreboot's 3rdparty repository, so there are less blobs for libreboot to delete now (because the 3rdparty repository is not checked out in libreboot). Correct HDA verbs used for T400 (also R400, T500) (patch is in coreboot, merged).
* download/coreboot: update notesFrancis Rowe2015-06-141-1/+1
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* coreboot-libre: delete the 3rdparty/ directoryFrancis Rowe2015-06-141-0/+3
| | | | | Libreboot doesn't even checkout this submodule in coreboot, so this change is quite redundant. However, it can't hurt.
* download/coreboot: add notes for when updating coreboot-libreFrancis Rowe2015-06-141-26/+40
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* build/release/util: add powertop scriptFrancis Rowe2015-06-131-1/+33
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* all script: use a standard styleFrancis Rowe2015-06-111-30/+30
| | | | | Based on the style used for the script in resources/scripts/helpers/build/release/
* download/coreboot: don't trim the coreboot source codeFrancis Rowe2015-06-081-3/+0
| | | | It saved only a few MiB, and makes maintenance a pain in the ass.
* Replace rm -r with rm -RFrancis Rowe2015-06-071-2/+2
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* coreboot-libre: backport patches for X200 Tablet digitizer supportFrancis Rowe2015-05-171-0/+6
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* coreboot-libre: delete unused code (reduce size of src archive)Francis Rowe2015-05-161-0/+3
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* scripts/download/coreboot: use diffs, not gerritFrancis Rowe2015-05-111-17/+40
| | | | | | | Solves the problem where coreboot.org down down makes libreboot.git useless. Now if coreboot.org goes down, you can just use a backup coreboot repository and then run the script.
* Update coreboot + merge GM45 hybrid GPU patchesFrancis Rowe2015-05-041-6/+30
| | | | | | | | | | | | | Also add power_on_after_fail to X200 and others (prevents the bug where the system would boot when connecting the AC adapter) (option in menuconfig to use CMOS/nvram settings is now enabled) Also NetDCDC is now the default USB debug dongle used (compatible with the BBB rev C). Add two new methods for managing coreboot configs: ./build config corebootreplace ./build config corebootmodify
* trim a few long lines, eliminate/add trailing newlines for consistencyJoseph Michael Thompson2015-04-101-5/+4
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* ThinkPad T500 supportFrancis Rowe2015-03-311-1/+3
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* New board: ThinkPad T400Francis Rowe2015-03-181-0/+2
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* Update corebootFrancis Rowe2015-03-161-15/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update to new coreboot revision: 83b05eb0a85d7b7ac0837cece67afabbdb46ea65 Intel microcode updates are no longer deleted, because these no longer exist in the main coreboot branch. Instead, they exist in the optional 3rdparty repository which libreboot does not merge. note: the microcode in src/soc/intel/ still exists and is still deleted in libreboot, therefore TODO: delete the instructions in coreboot that download the 3rdparty branch MacBook2,1 cstate patch is no longer cherry picked, because this is now merged in the main coreboot repository. The patch to disable use of timestamps in non-git is now removed, because a better version of patch was submitted to and merged in coreboot. coreboot-libre: These blobs either don't exist in coreboot anymore, or have had their names changed. They are no longer listed in the deblob script: src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000025.c src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000028.c src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000101.c src/cpu/amd/model_10xxx/mc_patch_01000086.h src/cpu/amd/model_10xxx/mc_patch_0100009f.h src/cpu/amd/model_10xxx/mc_patch_010000b6.h src/cpu/amd/model_10xxx/mc_patch_010000bf.h src/cpu/amd/model_10xxx/mc_patch_010000c4.h src/northbridge/amd/agesa/family12/ssdt.asl coreboot-libre: These nonblobs either don't exist in coreboot anymore, or have had their names changed. They are no longer listed in the nonblobs or nonblobs_notes files: ./src/mainboard/digitallogic/msm586seg/mainboard.c ./src/mainboard/intel/jarrell/irq_tables.c ./src/mainboard/supermicro/x6dai_g/irq_tables.c ./src/mainboard/technologic/ts5300/mainboard.c ./src/mainboard/via/epia/irq_tables.c ./src/northbridge/via/vx800/examples/chipset_init.c ./src/southbridge/amd/cs5530/bitmap.c ./src/southbridge/amd/pi/avalon/Kconfig ./src/mainboard/google/samus/samsung_8Gb.spd.hex ./src/mainboard/google/samus/empty.spd.hex ./src/mainboard/google/samus/elpida_4Gb.spd.hex ./src/mainboard/google/samus/elpida_8Gb.spd.hex ./src/mainboard/google/samus/samsung_4Gb.spd.hex coreboot-libre: The following were added to the nonblobs file: ./src/mainboard/google/samus/spd/samsung_4Gb.spd.hex ./src/mainboard/google/samus/spd/empty.spd.hex ./src/mainboard/google/samus/spd/elpida_8Gb.spd.hex ./src/mainboard/google/samus/spd/hynix_4Gb.spd.hex ./src/mainboard/google/samus/spd/samsung_8Gb.spd.hex ./src/mainboard/google/samus/spd/hynix_8Gb.spd.hex ./src/mainboard/google/samus/spd/elpida_4Gb.spd.hex ./src/drivers/xgi/common/vb_table.h ./src/drivers/xgi/common/vb_setmode.c ./src/drivers/xgi/common/XGI_main.h ./src/mainboard/siemens/mc_tcu3/romstage.c ./src/mainboard/siemens/mc_tcu3/lcd_panel.c ./src/mainboard/siemens/mc_tcu3/modhwinfo.c ./src/mainboard/pcengines/apu1/Kconfig ./src/mainboard/asus/kfsn4-dre/get_bus_conf.c ./src/mainboard/google/samus/spd/spd.c ./src/mainboard/hp/abm/mptable.c ./src/northbridge/amd/pi/00630F01/Kconfig ./src/cpu/amd/microcode/microcode.c ./src/lib/tlcl_structures.h coreboot-libre: New blobs in coreboot are now deleted in libreboot: src/soc/intel/baytrail/microcode/M0C3067_0000031E.h src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c src/cpu/amd/model_10xxx/mc_patch_010000d9.h src/cpu/amd/model_10xxx/mc_patch_010000dc.h src/cpu/amd/model_10xxx/mc_patch_010000db.h src/cpu/amd/model_10xxx/mc_patch_010000c7.h src/cpu/amd/model_10xxx/mc_patch_010000c8.h
* bash scripts: Make script output more user-friendlyFrancis Rowe2015-02-201-16/+18
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* bash scripts: Only enable verbose output if DEBUG= is usedFrancis Rowe2015-02-201-1/+2
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* Move DEBLOB to resources/utilities/coreboot-libre/deblobFrancis Rowe2015-02-151-1/+1
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* Rename scripts/helpers/fetch to scripts/helpers/downloadFrancis Rowe2015-02-141-0/+105
generated by cgit v1.2.3-70-g09d2 (git 2.47.0) at 2024-11-01 21:38:43 +0000