From d2aeff186dc6d672acfeb947dc1d35f203755548 Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Mon, 29 Oct 2018 23:36:53 -0400
Subject: Correct CBFS_SIZE in Veyron Jerry Coreboot Config

---
 projects/coreboot/configs/veyron/jerry/config | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/jerry/config b/projects/coreboot/configs/veyron/jerry/config
index 9393e7de..30c978cf 100644
--- a/projects/coreboot/configs/veyron/jerry/config
+++ b/projects/coreboot/configs/veyron/jerry/config
@@ -110,7 +110,7 @@ CONFIG_MAINBOARD_PART_NUMBER="Veyron_Jerry"
 CONFIG_MAINBOARD_VENDOR="Google"
 CONFIG_MAX_CPUS=1
 CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
-CONFIG_CBFS_SIZE=0x100000
+CONFIG_CBFS_SIZE=0x400000
 CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_DEVICETREE="devicetree.cb"
-- 
cgit v1.2.3-70-g09d2


From b87eeca4559e7cd94af1ad4273d082b4f3ecba8b Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Mon, 29 Oct 2018 23:43:34 -0400
Subject: Create 4,16MiB Coreboot configs/targets for Veyron Jerry

4MiB flash is the default for this board. A 16MiB config is
included for those looking to modify their board with a larger flash
chip.

Also, corebootfb is the only display mode available for this board;
as such, inclusion of the corebootfb subtarget serves only to
explicitly indicate the display mode when packaging ROMs upon
release.

Veyron Jerry Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot veyron jerry corebootfb 4mb'
---
 projects/coreboot/configs/veyron/jerry/corebootfb/16mb/config | 5 +++++
 projects/coreboot/configs/veyron/jerry/corebootfb/4mb/config  | 4 ++++
 projects/coreboot/configs/veyron/jerry/corebootfb/targets     | 2 ++
 projects/coreboot/configs/veyron/jerry/targets                | 1 +
 4 files changed, 12 insertions(+)
 create mode 100644 projects/coreboot/configs/veyron/jerry/corebootfb/16mb/config
 create mode 100644 projects/coreboot/configs/veyron/jerry/corebootfb/4mb/config
 create mode 100644 projects/coreboot/configs/veyron/jerry/corebootfb/targets
 create mode 100644 projects/coreboot/configs/veyron/jerry/targets

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/config b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/config
new file mode 100644
index 00000000..d3e3b7aa
--- /dev/null
+++ b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/config
@@ -0,0 +1,5 @@
+CONFIG_CBFS_SIZE=0x1000000
+CONFIG_COREBOOT_ROMSIZE_KB_4096=n
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x1000000
diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/config b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/config
new file mode 100644
index 00000000..f8445518
--- /dev/null
+++ b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/config
@@ -0,0 +1,4 @@
+CONFIG_CBFS_SIZE=0x400000
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x400000
diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/targets b/projects/coreboot/configs/veyron/jerry/corebootfb/targets
new file mode 100644
index 00000000..0169dcf0
--- /dev/null
+++ b/projects/coreboot/configs/veyron/jerry/corebootfb/targets
@@ -0,0 +1,2 @@
+16mb
+4mb
diff --git a/projects/coreboot/configs/veyron/jerry/targets b/projects/coreboot/configs/veyron/jerry/targets
new file mode 100644
index 00000000..ffc50041
--- /dev/null
+++ b/projects/coreboot/configs/veyron/jerry/targets
@@ -0,0 +1 @@
+corebootfb
-- 
cgit v1.2.3-70-g09d2


From a8113fbc3e0007772df577e9d946ba1a1dbd90f0 Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Mon, 29 Oct 2018 23:47:45 -0400
Subject: Create Coreboot Depthcharge target for Veyron Jerry

Veyron Jerry ROMs are built with Depthcharge as the default payload,
e.g.:

'./libreboot build coreboot veyron jerry corebootfb 4mb depthcharge'
---
 .../coreboot/configs/veyron/jerry/corebootfb/16mb/depthcharge/config     | 1 +
 projects/coreboot/configs/veyron/jerry/corebootfb/16mb/targets           | 1 +
 projects/coreboot/configs/veyron/jerry/corebootfb/4mb/depthcharge/config | 1 +
 projects/coreboot/configs/veyron/jerry/corebootfb/4mb/targets            | 1 +
 4 files changed, 4 insertions(+)
 create mode 100644 projects/coreboot/configs/veyron/jerry/corebootfb/16mb/depthcharge/config
 create mode 100644 projects/coreboot/configs/veyron/jerry/corebootfb/16mb/targets
 create mode 100644 projects/coreboot/configs/veyron/jerry/corebootfb/4mb/depthcharge/config
 create mode 100644 projects/coreboot/configs/veyron/jerry/corebootfb/4mb/targets

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/depthcharge/config b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/depthcharge/config
new file mode 100644
index 00000000..afde4a80
--- /dev/null
+++ b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/depthcharge/config
@@ -0,0 +1 @@
+CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-jerry/depthcharge.elf"
diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/targets b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/targets
new file mode 100644
index 00000000..d7e90413
--- /dev/null
+++ b/projects/coreboot/configs/veyron/jerry/corebootfb/16mb/targets
@@ -0,0 +1 @@
+depthcharge
diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/depthcharge/config
new file mode 100644
index 00000000..afde4a80
--- /dev/null
+++ b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/depthcharge/config
@@ -0,0 +1 @@
+CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-jerry/depthcharge.elf"
diff --git a/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/targets b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/targets
new file mode 100644
index 00000000..d7e90413
--- /dev/null
+++ b/projects/coreboot/configs/veyron/jerry/corebootfb/4mb/targets
@@ -0,0 +1 @@
+depthcharge
-- 
cgit v1.2.3-70-g09d2


From 37ab282b3619012d9c97aaac03fd82aa8b3d3bac Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Tue, 30 Oct 2018 00:36:19 -0400
Subject: Create 4MiB Coreboot config/target for Veyron Mickey

4MiB flash is the default for this board. A 16MiB config is not
included (yet) as I was unable to find a teardown of this device
(Asus Chromebit CS10) online to be sure that reassembly is possible.

Also, corebootfb is the only display mode available for this board;
as such, inclusion of the corebootfb subtarget serves only to
explicitly indicate the display mode when packaging ROMs upon
release.

Veyron Mickey Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot veyron mickey corebootfb 4mb'
---
 projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config | 4 ++++
 projects/coreboot/configs/veyron/mickey/corebootfb/targets    | 1 +
 projects/coreboot/configs/veyron/mickey/targets               | 1 +
 3 files changed, 6 insertions(+)
 create mode 100644 projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config
 create mode 100644 projects/coreboot/configs/veyron/mickey/corebootfb/targets
 create mode 100644 projects/coreboot/configs/veyron/mickey/targets

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config
new file mode 100644
index 00000000..f8445518
--- /dev/null
+++ b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config
@@ -0,0 +1,4 @@
+CONFIG_CBFS_SIZE=0x400000
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x400000
diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/targets b/projects/coreboot/configs/veyron/mickey/corebootfb/targets
new file mode 100644
index 00000000..50d4bf27
--- /dev/null
+++ b/projects/coreboot/configs/veyron/mickey/corebootfb/targets
@@ -0,0 +1 @@
+4mb
diff --git a/projects/coreboot/configs/veyron/mickey/targets b/projects/coreboot/configs/veyron/mickey/targets
new file mode 100644
index 00000000..ffc50041
--- /dev/null
+++ b/projects/coreboot/configs/veyron/mickey/targets
@@ -0,0 +1 @@
+corebootfb
-- 
cgit v1.2.3-70-g09d2


From 8acbf2f5b25d43ab8a6619e1d30a41cd68d04a41 Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Tue, 30 Oct 2018 00:39:31 -0400
Subject: Create Coreboot Depthcharge target for Veyron Mickey

Veyron Mickey ROMs are built with Depthcharge as the default payload,
e.g.:

'./libreboot build coreboot veyron mickey corebootfb 4mb depthcharge'
---
 .../coreboot/configs/veyron/mickey/corebootfb/4mb/depthcharge/config     | 1 +
 projects/coreboot/configs/veyron/mickey/corebootfb/4mb/targets           | 1 +
 2 files changed, 2 insertions(+)
 create mode 100644 projects/coreboot/configs/veyron/mickey/corebootfb/4mb/depthcharge/config
 create mode 100644 projects/coreboot/configs/veyron/mickey/corebootfb/4mb/targets

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/depthcharge/config
new file mode 100644
index 00000000..e27c1a5b
--- /dev/null
+++ b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/depthcharge/config
@@ -0,0 +1 @@
+CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-mickey/depthcharge.elf"
diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/targets b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/targets
new file mode 100644
index 00000000..d7e90413
--- /dev/null
+++ b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/targets
@@ -0,0 +1 @@
+depthcharge
-- 
cgit v1.2.3-70-g09d2


From f0d10ac149186c8f258e7a694c4390160ed08b40 Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Tue, 30 Oct 2018 00:43:29 -0400
Subject: Correct CBFS_SIZE in Veyron Minnie Coreboot Config

---
 projects/coreboot/configs/veyron/minnie/config | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/minnie/config b/projects/coreboot/configs/veyron/minnie/config
index 45672bc9..d9d9206e 100644
--- a/projects/coreboot/configs/veyron/minnie/config
+++ b/projects/coreboot/configs/veyron/minnie/config
@@ -110,7 +110,7 @@ CONFIG_MAINBOARD_PART_NUMBER="Veyron_Minnie"
 CONFIG_MAINBOARD_VENDOR="Google"
 CONFIG_MAX_CPUS=1
 CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
-CONFIG_CBFS_SIZE=0x100000
+CONFIG_CBFS_SIZE=0x400000
 CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_DEVICETREE="devicetree.cb"
-- 
cgit v1.2.3-70-g09d2


From 14945e86ee133e8294b69e370b23d0615a3d15bd Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Tue, 30 Oct 2018 00:47:37 -0400
Subject: Create 4,16MiB Coreboot configs/targets for Veyron Minnie

4MiB flash is the default for this board. A 16MiB config is included
for those looking to modify their board with a larger flash chip.

Also, corebootfb is the only display mode available for this board;
as such, inclusion of the corebootfb subtarget serves only to
explicitly indicate the display mode when packaging ROMs upon
release.

Veyron Minnie Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot veyron minnie corebootfb 4mb'
---
 projects/coreboot/configs/veyron/minnie/corebootfb/16mb/config | 5 +++++
 projects/coreboot/configs/veyron/minnie/corebootfb/4mb/config  | 4 ++++
 projects/coreboot/configs/veyron/minnie/corebootfb/targets     | 2 ++
 projects/coreboot/configs/veyron/minnie/targets                | 1 +
 4 files changed, 12 insertions(+)
 create mode 100644 projects/coreboot/configs/veyron/minnie/corebootfb/16mb/config
 create mode 100644 projects/coreboot/configs/veyron/minnie/corebootfb/4mb/config
 create mode 100644 projects/coreboot/configs/veyron/minnie/corebootfb/targets
 create mode 100644 projects/coreboot/configs/veyron/minnie/targets

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/config b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/config
new file mode 100644
index 00000000..d3e3b7aa
--- /dev/null
+++ b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/config
@@ -0,0 +1,5 @@
+CONFIG_CBFS_SIZE=0x1000000
+CONFIG_COREBOOT_ROMSIZE_KB_4096=n
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x1000000
diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/config b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/config
new file mode 100644
index 00000000..f8445518
--- /dev/null
+++ b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/config
@@ -0,0 +1,4 @@
+CONFIG_CBFS_SIZE=0x400000
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x400000
diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/targets b/projects/coreboot/configs/veyron/minnie/corebootfb/targets
new file mode 100644
index 00000000..0169dcf0
--- /dev/null
+++ b/projects/coreboot/configs/veyron/minnie/corebootfb/targets
@@ -0,0 +1,2 @@
+16mb
+4mb
diff --git a/projects/coreboot/configs/veyron/minnie/targets b/projects/coreboot/configs/veyron/minnie/targets
new file mode 100644
index 00000000..ffc50041
--- /dev/null
+++ b/projects/coreboot/configs/veyron/minnie/targets
@@ -0,0 +1 @@
+corebootfb
-- 
cgit v1.2.3-70-g09d2


From 8be0442ffe018f27c554a0afed627d4b0951e3fa Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Tue, 30 Oct 2018 00:51:22 -0400
Subject: Create Coreboot Depthcharge target for Veyron Minnie

Veyron Minnie ROMs are built with Depthcharge as the default payload,
e.g.:

'./libreboot build coreboot veyron minnie corebootfb 4mb depthcharge'
---
 .../coreboot/configs/veyron/minnie/corebootfb/16mb/depthcharge/config    | 1 +
 projects/coreboot/configs/veyron/minnie/corebootfb/16mb/targets          | 1 +
 .../coreboot/configs/veyron/minnie/corebootfb/4mb/depthcharge/config     | 1 +
 projects/coreboot/configs/veyron/minnie/corebootfb/4mb/targets           | 1 +
 4 files changed, 4 insertions(+)
 create mode 100644 projects/coreboot/configs/veyron/minnie/corebootfb/16mb/depthcharge/config
 create mode 100644 projects/coreboot/configs/veyron/minnie/corebootfb/16mb/targets
 create mode 100644 projects/coreboot/configs/veyron/minnie/corebootfb/4mb/depthcharge/config
 create mode 100644 projects/coreboot/configs/veyron/minnie/corebootfb/4mb/targets

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/depthcharge/config b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/depthcharge/config
new file mode 100644
index 00000000..aee1ccef
--- /dev/null
+++ b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/depthcharge/config
@@ -0,0 +1 @@
+CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-minnie/depthcharge.elf"
diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/targets b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/targets
new file mode 100644
index 00000000..d7e90413
--- /dev/null
+++ b/projects/coreboot/configs/veyron/minnie/corebootfb/16mb/targets
@@ -0,0 +1 @@
+depthcharge
diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/depthcharge/config
new file mode 100644
index 00000000..aee1ccef
--- /dev/null
+++ b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/depthcharge/config
@@ -0,0 +1 @@
+CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-minnie/depthcharge.elf"
diff --git a/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/targets b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/targets
new file mode 100644
index 00000000..d7e90413
--- /dev/null
+++ b/projects/coreboot/configs/veyron/minnie/corebootfb/4mb/targets
@@ -0,0 +1 @@
+depthcharge
-- 
cgit v1.2.3-70-g09d2


From db19cee793a882dc1ee6a7be8dc787bf7be93049 Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Tue, 30 Oct 2018 00:56:15 -0400
Subject: Correct CBFS_SIZE in Veyron Speedy Coreboot Config

---
 projects/coreboot/configs/veyron/speedy/config | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/speedy/config b/projects/coreboot/configs/veyron/speedy/config
index b4a74b9a..27ddca6b 100644
--- a/projects/coreboot/configs/veyron/speedy/config
+++ b/projects/coreboot/configs/veyron/speedy/config
@@ -110,7 +110,7 @@ CONFIG_MAINBOARD_PART_NUMBER="Veyron_Speedy"
 CONFIG_MAINBOARD_VENDOR="Google"
 CONFIG_MAX_CPUS=1
 CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
-CONFIG_CBFS_SIZE=0x100000
+CONFIG_CBFS_SIZE=0x400000
 CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_DEVICETREE="devicetree.cb"
-- 
cgit v1.2.3-70-g09d2


From 2ba70b22e494a67f9bc8e53c4a9803582e9668e6 Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Tue, 30 Oct 2018 00:57:48 -0400
Subject: Create 4,16MiB Coreboot configs/targets for Veyron Speedy

4MiB flash is the default for this board. A 16MiB config is included
for those looking to modify their board with a larger flash chip.

Also, corebootfb is the only display mode available for this board;
as such, inclusion of the corebootfb subtarget serves only to
explicitly indicate the display mode when packaging ROMs upon
release.

Veyron Speedy Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot veyron speedy corebootfb 4mb'
---
 projects/coreboot/configs/veyron/speedy/corebootfb/16mb/config | 5 +++++
 projects/coreboot/configs/veyron/speedy/corebootfb/4mb/config  | 4 ++++
 projects/coreboot/configs/veyron/speedy/corebootfb/targets     | 2 ++
 projects/coreboot/configs/veyron/speedy/targets                | 1 +
 4 files changed, 12 insertions(+)
 create mode 100644 projects/coreboot/configs/veyron/speedy/corebootfb/16mb/config
 create mode 100644 projects/coreboot/configs/veyron/speedy/corebootfb/4mb/config
 create mode 100644 projects/coreboot/configs/veyron/speedy/corebootfb/targets
 create mode 100644 projects/coreboot/configs/veyron/speedy/targets

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/config b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/config
new file mode 100644
index 00000000..d3e3b7aa
--- /dev/null
+++ b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/config
@@ -0,0 +1,5 @@
+CONFIG_CBFS_SIZE=0x1000000
+CONFIG_COREBOOT_ROMSIZE_KB_4096=n
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x1000000
diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/config b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/config
new file mode 100644
index 00000000..f8445518
--- /dev/null
+++ b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/config
@@ -0,0 +1,4 @@
+CONFIG_CBFS_SIZE=0x400000
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x400000
diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/targets b/projects/coreboot/configs/veyron/speedy/corebootfb/targets
new file mode 100644
index 00000000..0169dcf0
--- /dev/null
+++ b/projects/coreboot/configs/veyron/speedy/corebootfb/targets
@@ -0,0 +1,2 @@
+16mb
+4mb
diff --git a/projects/coreboot/configs/veyron/speedy/targets b/projects/coreboot/configs/veyron/speedy/targets
new file mode 100644
index 00000000..ffc50041
--- /dev/null
+++ b/projects/coreboot/configs/veyron/speedy/targets
@@ -0,0 +1 @@
+corebootfb
-- 
cgit v1.2.3-70-g09d2


From f34e968d2c4e460825cf16461df7356ebe728922 Mon Sep 17 00:00:00 2001
From: Andrew Robbins <contact@andrewrobbins.info>
Date: Tue, 30 Oct 2018 00:59:41 -0400
Subject: Create Coreboot Depthcharge target for Veyron Speedy

Veyron Speedy ROMs are built with Depthcharge as the default payload,
e.g.:

'./libreboot build coreboot veyron speedy corebootfb 4mb depthcharge'
---
 .../coreboot/configs/veyron/speedy/corebootfb/16mb/depthcharge/config    | 1 +
 projects/coreboot/configs/veyron/speedy/corebootfb/16mb/targets          | 1 +
 .../coreboot/configs/veyron/speedy/corebootfb/4mb/depthcharge/config     | 1 +
 projects/coreboot/configs/veyron/speedy/corebootfb/4mb/targets           | 1 +
 4 files changed, 4 insertions(+)
 create mode 100644 projects/coreboot/configs/veyron/speedy/corebootfb/16mb/depthcharge/config
 create mode 100644 projects/coreboot/configs/veyron/speedy/corebootfb/16mb/targets
 create mode 100644 projects/coreboot/configs/veyron/speedy/corebootfb/4mb/depthcharge/config
 create mode 100644 projects/coreboot/configs/veyron/speedy/corebootfb/4mb/targets

(limited to 'projects/coreboot')

diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/depthcharge/config b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/depthcharge/config
new file mode 100644
index 00000000..8b705934
--- /dev/null
+++ b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/depthcharge/config
@@ -0,0 +1 @@
+CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-speedy/depthcharge.elf"
diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/targets b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/targets
new file mode 100644
index 00000000..d7e90413
--- /dev/null
+++ b/projects/coreboot/configs/veyron/speedy/corebootfb/16mb/targets
@@ -0,0 +1 @@
+depthcharge
diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/depthcharge/config b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/depthcharge/config
new file mode 100644
index 00000000..8b705934
--- /dev/null
+++ b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/depthcharge/config
@@ -0,0 +1 @@
+CONFIG_PAYLOAD_FILE="$(obj)/../depthcharge-veyron-speedy/depthcharge.elf"
diff --git a/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/targets b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/targets
new file mode 100644
index 00000000..d7e90413
--- /dev/null
+++ b/projects/coreboot/configs/veyron/speedy/corebootfb/4mb/targets
@@ -0,0 +1 @@
+depthcharge
-- 
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