It is believed that all or most T500 laptops are compatible. See notes about CPU compatibility for potential incompatibilities.
There are two possible flash chip sizes for the T500: 4MiB (32Mbit) or 8MiB (64Mbit). This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB is SOIC-16.
The T500 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it by using a modified descriptor: see gm45_remove_me.html (contains notes, plus instructions)
Flashing instructions can be found at ../install/index.html#flashrom
The T500, when run without CPU microcode updates in coreboot, currently kernel panics if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled for the guest, the guest panics (but the host is fine). Working around this in QEMU might be possible; if not, software virtualization should work fine (it's just slower).
On GM45 hardware (with libreboot), make sure that the kvm and kvm_intel kernel modules are not loaded, when using QEMU.
The following errata datasheet from Intel might help with investigation: http://download.intel.com/design/mobile/specupdt/320121.pdf
The T500 is almost identical to the X200, code-wise. See x200.html.
See ../future/dumps/t500_x200_descriptor/descriptor_diff_t500_x200.txt and ../future/dumps/t500_x200_descriptor/gbe_diff_t500_x200.txt
The patches above are based on the output from ich9deblob on a factory.rom image dumped from the T500
with a SOIC-8 4MiB flash chip. The patch re-creates the X200 descriptor/gbe source, so the commands were
something like:
$ diff -u t500gbe x200gbe
$ diff -u t500descriptor x200descriptor
ME VSCC table is in a different place and a different size on the T500. Libreboot disables and removes the ME anyway, so it doesn't matter.
The very same descriptor/gbe used on the X200 (generated by ich9gen) was re-used on the T500, and it still worked.
The coreboot wiki shows how to collect various logs useful in porting to new boards. Following are outputs from the T500:
This one had a screen (1920x1200) that is currently incompatible. Working to fix it. EDID:
user@user-ThinkPad-T500:~/Desktop$ sudo i2cdump -y 2 0x50 No size specified (using byte-data access) 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: XX ff ff ff ff ff ff 00 30 ae 55 40 00 00 00 00 X.......0?U@.... 10: 00 11 01 03 80 21 15 78 ea ba 70 98 59 52 8c 28 .????!?x??p?YR?( 20: 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 %PT...?????????? 30: 01 01 01 01 01 01 e7 3a 80 8c 70 b0 14 40 1e 50 ???????:??p??@?P 40: 24 00 4b cf 10 00 00 19 16 31 80 8c 70 b0 14 40 $.K??..??1??p??@ 50: 1e 50 24 00 4b cf 10 00 00 19 00 00 00 0f 00 d1 ?P$.K??..?...?.? 60: 0a 32 d1 0a 28 11 01 00 32 0c 00 00 00 00 00 fe ?2??(??.2?.....? 70: 00 4c 50 31 35 34 57 55 31 2d 54 4c 42 31 00 9a .LP154WU1-TLB1.? 80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ 90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
What happens: backlight turns on at boot, then turns off. At no point is there a working visual display.
Another incompatible screen (EDID) 1680 x 1050 with the same issue:
EDID: 00 ff ff ff ff ff ff 00 30 ae 53 40 00 00 00 00 00 11 01 03 80 21 15 78 ea cd 75 91 55 4f 8b 26 21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 a8 2f 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 b7 27 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 00 00 00 0f 00 b3 0a 32 b3 0a 28 14 01 00 4c a3 50 33 00 00 00 fe 00 4c 54 4e 31 35 34 50 33 2d 4c 30 32 0a 00 7e Extracted contents: header: 00 ff ff ff ff ff ff 00 serial number: 30 ae 53 40 00 00 00 00 00 11 version: 01 03 basic params: 80 21 15 78 ea chroma info: cd 75 91 55 4f 8b 26 21 50 54 established: 00 00 00 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 descriptor 1: a8 2f 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 descriptor 2: b7 27 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 descriptor 3: 00 00 00 0f 00 b3 0a 32 b3 0a 28 14 01 00 4c a3 50 33 descriptor 4: 00 00 00 fe 00 4c 54 4e 31 35 34 50 33 2d 4c 30 32 0a extensions: 00 checksum: 7e Manufacturer: LEN Model 4053 Serial Number 0 Made week 0 of 2007 EDID version: 1.3 Digital display Maximum image size: 33 cm x 21 cm Gamma: 220% Check DPMS levels DPMS levels: Standby Suspend Off Supported color formats: RGB 4:4:4, YCrCb 4:2:2 First detailed timing is preferred timing Established timings supported: Standard timings supported: Detailed timings Hex of detail: a82f90e0601a1040204013004bcf10000019 Did detailed timing Detailed mode (IN HEX): Clock 122000 KHz, 14b mm x cf mm 0690 06b0 06f0 0770 hborder 0 041a 041b 041e 042a vborder 0 -hsync -vsync Hex of detail: b72790e0601a1040204013004bcf10000019 Detailed mode (IN HEX): Clock 122000 KHz, 14b mm x cf mm 0690 06b0 06f0 0770 hborder 0 041a 041b 041e 042a vborder 0 -hsync -vsync Hex of detail: 0000000f00b30a32b30a281401004ca35033 Manufacturer-specified data, tag 15 Hex of detail: 000000fe004c544e31353450332d4c30320a ASCII string: LTN154P3-L02 Checksum Checksum: 0x7e (valid) WARNING: EDID block does NOT fully conform to EDID 1.3. Missing name descriptor Missing monitor ranges bringing up panel at resolution 1680 x 1050 Borders 0 x 0 Blank 224 x 16 Sync 64 x 3 Front porch 32 x 1 Spread spectrum clock Single channel Polarities 1, 1 Data M1=2132104, N1=8388608 Link frequency 270000 kHz Link M1=236900, N1=524288 Pixel N=9, M1=24, M2=8, P1=1 Pixel clock 243809 kHz waiting for panel powerup panel powered up
For comparison, here is a working display (T400 screen, but was connected to a T500. Some T500 displays also work, but no EDID available on this page yet):
EDID: 00 ff ff ff ff ff ff 00 30 ae 31 40 00 00 00 00 00 12 01 03 80 1e 13 78 ea b3 85 95 58 53 8a 28 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 26 1b 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 8b 16 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 00 00 00 0f 00 81 0a 32 81 0a 28 14 01 00 30 e4 28 01 00 00 00 fe 00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 00 d8 Extracted contents: header: 00 ff ff ff ff ff ff 00 serial number: 30 ae 31 40 00 00 00 00 00 12 version: 01 03 basic params: 80 1e 13 78 ea chroma info: b3 85 95 58 53 8a 28 25 50 54 established: 00 00 00 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 descriptor 1: 26 1b 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 descriptor 2: 8b 16 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 descriptor 3: 00 00 00 0f 00 81 0a 32 81 0a 28 14 01 00 30 e4 28 01 descriptor 4: 00 00 00 fe 00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 extensions: 00 checksum: d8 Manufacturer: LEN Model 4031 Serial Number 0 Made week 0 of 2008 EDID version: 1.3 Digital display Maximum image size: 30 cm x 19 cm Gamma: 220% Check DPMS levels DPMS levels: Standby Suspend Off Supported color formats: RGB 4:4:4, YCrCb 4:2:2 First detailed timing is preferred timing Established timings supported: Standard timings supported: Detailed timings Hex of detail: 261b007d502016303020360030be10000018 Did detailed timing Detailed mode (IN HEX): Clock 69500 KHz, 130 mm x be mm 0500 0530 0550 057d hborder 0 0320 0323 0329 0336 vborder 0 -hsync -vsync Hex of detail: 8b16007d502016303020360030be10000018 Detailed mode (IN HEX): Clock 69500 KHz, 130 mm x be mm 0500 0530 0550 057d hborder 0 0320 0323 0329 0336 vborder 0 -hsync -vsync Hex of detail: 0000000f00810a32810a2814010030e42801 Manufacturer-specified data, tag 15 Hex of detail: 000000fe004c503134315758332d544c5231 ASCII string: LP141WX3-TLR1 Checksum Checksum: 0xd8 (valid) WARNING: EDID block does NOT fully conform to EDID 1.3. Missing name descriptor Missing monitor ranges bringing up panel at resolution 1280 x 800 Borders 0 x 0 Blank 125 x 22 Sync 32 x 6 Front porch 48 x 3 Spread spectrum clock Single channel Polarities 1, 1 Data M1=1214600, N1=8388608 Link frequency 270000 kHz Link M1=134955, N1=524288 Pixel N=10, M1=14, M2=11, P1=1 Pixel clock 138857 kHz waiting for panel powerup panel powered up
Copyright © 2015 Francis Rowe <info@gluglug.org.uk>
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