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| author | Andrew Robbins <contact@andrewrobbins.info> | 2018-10-30 00:36:19 -0400 |
|---|---|---|
| committer | Andrew Robbins <contact@andrewrobbins.info> | 2018-10-30 01:00:25 -0400 |
| commit | 37ab282b3619012d9c97aaac03fd82aa8b3d3bac (patch) | |
| tree | 619aca0cbde023ce4c24096a57945d1651d348d9 | |
| parent | a8113fbc3e0007772df577e9d946ba1a1dbd90f0 (diff) | |
| download | librebootfr-37ab282b3619012d9c97aaac03fd82aa8b3d3bac.tar.gz librebootfr-37ab282b3619012d9c97aaac03fd82aa8b3d3bac.zip | |
Create 4MiB Coreboot config/target for Veyron Mickey
4MiB flash is the default for this board. A 16MiB config is not
included (yet) as I was unable to find a teardown of this device
(Asus Chromebit CS10) online to be sure that reassembly is possible.
Also, corebootfb is the only display mode available for this board;
as such, inclusion of the corebootfb subtarget serves only to
explicitly indicate the display mode when packaging ROMs upon
release.
Veyron Mickey Coreboot ROMs can be built with, e.g.:
'./libreboot build coreboot veyron mickey corebootfb 4mb'
3 files changed, 6 insertions, 0 deletions
diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config new file mode 100644 index 00000000..f8445518 --- /dev/null +++ b/projects/coreboot/configs/veyron/mickey/corebootfb/4mb/config @@ -0,0 +1,4 @@ +CONFIG_CBFS_SIZE=0x400000 +CONFIG_COREBOOT_ROMSIZE_KB_4096=y +CONFIG_COREBOOT_ROMSIZE_KB=4096 +CONFIG_ROM_SIZE=0x400000 diff --git a/projects/coreboot/configs/veyron/mickey/corebootfb/targets b/projects/coreboot/configs/veyron/mickey/corebootfb/targets new file mode 100644 index 00000000..50d4bf27 --- /dev/null +++ b/projects/coreboot/configs/veyron/mickey/corebootfb/targets @@ -0,0 +1 @@ +4mb diff --git a/projects/coreboot/configs/veyron/mickey/targets b/projects/coreboot/configs/veyron/mickey/targets new file mode 100644 index 00000000..ffc50041 --- /dev/null +++ b/projects/coreboot/configs/veyron/mickey/targets @@ -0,0 +1 @@ +corebootfb |