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| author | Leah Rowe <info@minifree.org> | 2017-04-05 22:41:59 +0100 |
|---|---|---|
| committer | Leah Rowe <info@minifree.org> | 2017-04-05 22:41:59 +0100 |
| commit | 1938235eafc29827682da4bb11885f24a204c15a (patch) | |
| tree | abea11d6b8936409e3ba075a32b3e20fab62a74f /docs/hardware | |
| parent | f5bdf1f8fdc975653efec9d5a2d1b36838d4ddf7 (diff) | |
| download | librebootfr-1938235eafc29827682da4bb11885f24a204c15a.tar.gz librebootfr-1938235eafc29827682da4bb11885f24a204c15a.zip | |
rename docs/hcl/ to docs/hardware/
Diffstat (limited to 'docs/hardware')
53 files changed, 13897 insertions, 0 deletions
diff --git a/docs/hardware/c201.md b/docs/hardware/c201.md new file mode 100644 index 00000000..1aede14a --- /dev/null +++ b/docs/hardware/c201.md @@ -0,0 +1,180 @@ +--- +title: ASUS Chromebook C201 +... + +This is a Chromebook, using the Rockchip RK3288 SoC. It uses an ARM CPU, +and has free EC firmware (unlike some other laptops). More RK3288-based +laptops will be added to libreboot at a later date. + +Paul Kocialkowski, a [Replicant](http://www.replicant.us/) developer, +ported this laptop to libreboot. Thank you, Paul! + +**More info will be added later, including build/installation +instructions. The board is supported in libreboot, however, and has been +confirmed to work.** + +Flashing instructions can be found at +[../install/\#flashrom](../install/#flashrom) + +- [Google's intent with CrOS devices](#googlesintent) +- [Considerations about ChromeOS and free operating systems](#os) +- [Caution: Video acceleration requires a non-free blob, software + rendering can be used instead.](#videoblobs) +- [Caution: WiFi requires a non-free blob, a USB dongle can be used + instead.](#wifiblobs) +- [EC firmware is free software!](#ec) +- [No microcode!](#microcode) +- [Depthcharge payload](#depthcharge) +- [Flash chip write protection: the screw](#thescrew) + +Google's intent with CrOS devices {#googlesintent} +================================== + +CrOS (Chromium OS/Chrome OS) devices, such as Chromebooks, were not +designed with the intent of bringing more freedom to users. However, +they run with a lot of free software at the boot software and embedded +controller levels, since free software gives Google enough flexibility +to optimize various aspects such as boot time and most importantly, to +implement the CrOS security system, that involves various aspects of the +software. Google does hire a lot of Coreboot developers, who are +generally friendly to the free software movement and try to be good +members of the free software community, by contributing code back. + +CrOS devices are designed (from the factory) to actually coax the user +into using proprietary web services (SaaSS) that invade the user's +privacy (ChromeOS is literally just the Google Chrome browser when you +boot up, itself proprietary and comes with proprietary add-ons like +flash. It's only intended for SaaSS, not actual, real computing). +Google is even a member of the *PRISM* program, as outlined by Edward +Snowden. See notes about ChromeOS below. The libreboot project +recommends that the user replace the default *ChromeOS* with a +distribution that can be used in freedom, without invading the user's +privacy. + +We also use a similar argument for the MacBook and the ThinkPads that +are supported in libreboot. Those laptops are supported, in spite of +Apple and Lenovo, companies which are actually *hostile* to the free +software movement. + +Considerations about ChromeOS and free operating systems {#os} +======================================================== + +This laptop comes preinstalled (from the factory) with Google ChromeOS. +This is a GNU+Linux distribution, but it's not general purpose and it +comes with proprietary software. It's designed for SaaSS. Libreboot +recommends that users of this laptop replace it with another +distribution. + +Debian GNU+Linux +---------------- + +<https://wiki.debian.org/InstallingDebianOn/Asus/C201> shows how to +install Debian. + +TODO: instructions for Devuan + +Caution: Video acceleration requires a non-free blob, software rendering can be used instead. {#videoblobs} +============================================================================================= + +The Tamil driver source code for the onboard Mali T GPU is not released. +The developer has so-far withheld it. Until that is released, the only +way to use video (in freedom) on this laptop is to not have video +acceleration, by making sure not to install the relevant blob. Most +tasks can still be performed without video acceleration, without any +noticeable performance penalty. + +In practise, this means that certain things like games, blender and +GNOME shell (or other fancy desktops) won't work well. The libreboot +project recommends a lightweight desktop which does not need video +acceleration, such as *XFCE* or *LXDE*. + +The Tamil developer wrote this blog post, which sheds light on the +story: +[http://libv.livejournal.com/27461.html,http://libv.livejournal.com/27461.html](http://libv.livejournal.com/27461.html). + +Caution: WiFi requires a non-free blob, a USB dongle can be used instead. {#wifiblobs} +========================================================================= + +These laptops have non-removeable (soldered on) WiFi chips, which +require non-free firmware in the Linux kernel in order to work. + +The libreboot project recommends using an external USB wifi dongle that +works with free software. See +[\#recommended\_wifi](./#recommended_wifi). + +There are 2 companies (endorsed by Creative Commons, under their +*Respects your Freedom* guidelines), that sell USB WiFi dongles +guaranteed to work with free software (i.e. linux-libre kernel): + +- [ThinkPenguin sells + them](https://www.thinkpenguin.com/gnu-linux/penguin-wireless-n-usb-adapter-gnu-linux-tpe-n150usb) + (company based in USA) +- [Tehnoetic sells + them](https://tehnoetic.com/tehnoetic-wireless-adapter-gnu-linux-libre-tet-n150) + (company based in Europe) + +These wifi dongles use the AR9271 (atheros) chipset, supported by the +free *ath9k\_htc* driver in the Linux kernel. They work in *linux-libre* +too. + +EC firmware is free software! {#ec} +============================= + +It's free software. Google provides the source. Build scripts will be +added later, with EC sources provided in libreboot, and builds of the EC +firmware. + +This is unlike the other current libreboot laptops (Intel based). In +practise, you can (if you do without the video/wifi blobs, and replace +ChromeOS with a distribution that respects your freedom) be more free +when using one of these laptops. + +The libreboot FAQ briefly describes what an *EC* is: +[../../faq/#firmware-ec](../../faq/#firmware-ec) + +No microcode! {#microcode} +============= + +Unlike x86 (e.g. Intel/AMD) CPUs, ARM CPUs do not use microcode, not +even built in. On the Intel/AMD based libreboot systems, there is still +microcode in the CPU (not considered problematic by the FSF, provided +that it is reasonably trusted to not be malicious, since it's part of +the hardware and read-only), but we exclude microcode updates (volatile +updates which are uploaded at boot time by the boot firmware, if +present), which are proprietary software. + +On ARM CPUs, the instruction set is implemented in circuitry, without +microcode. + +Depthcharge payload {#depthcharge} +=================== + +These systems do not use the GRUB payload. Instead, they use a payload +called depthcharge, which is common on CrOS devices. This is free +software, maintained by Google. + +Flash chip write protection: the screw {#thescrew} +====================================== + +It's next to the flash chip. Unscrew it, and the flash chip is +read-write. Screw it back in, and the flash chip is read-only. It's +called the screw. + +*The screw* is accessible by removing other screws and gently prying off +the upper shell, where the flash chip and the screw are then directly +accessible. User flashing from software is possible, without having to +externally re-flash, but the flash chip is SPI (SOIC-8 form factor) so +you can also externally re-flash if you want to. In practise, you only +need to externally re-flash if you brick the laptop; read +[../install/bbb\_setup.html](../install/bbb_setup.html) for an example +of how to set up an SPI programmer. + +Write protection is useful, because it prevents the firmware from being +re-flashed by any malicious software that might become executed on your +GNU+Linux system, as root. In other words, it can prevent a +firmware-level *evil maid* attack. It's possible to write protect on +all current libreboot systems, but CrOS devices make it easy. The screw +is such a stupidly simple idea, which all designs should implement. + +Copyright © 2015 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/d510mo.md b/docs/hardware/d510mo.md new file mode 100644 index 00000000..d71e054d --- /dev/null +++ b/docs/hardware/d510mo.md @@ -0,0 +1,17 @@ +--- +title: Intel D510MO desktop board +... + +This is a desktop board using intel hardware (circa \~2009, ICH7 +southbridge, similar performance-wise to the Libreboot X200. It can make +for quite a nifty desktop. Powered by libreboot. + +NOTE: This board has a working framebuffer in Grub, but in GNU+Linux in +native resolution the display is unusable due to some raminit issues. +This board can however be used for building a headless server. + +Flashing instructions can be found at +[../install/d510mo.html](../install/d510mo.html) + +Copyright © 2016 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/d945gclf.md b/docs/hardware/d945gclf.md new file mode 100644 index 00000000..2f4a41bc --- /dev/null +++ b/docs/hardware/d945gclf.md @@ -0,0 +1,110 @@ +--- +title: Intel D945GCLF desktop board +... + +If you just want flashing instructions, go to +[../install/d945gclf.html](../install/d945gclf.html) + +This board is a mini-itx desktop board for 2008. It uses an atom 230, +which is a singe core CPU but it is hyperthreaded so it appears to have +2 thread to the OS. The flash chip is very small, 512KiB, so grub2 does +not fit, which is why libreboot has to use seabios on this target. Full +disk encryption like on other supported targets will not be possible, so +plan accordingly. + +This board has a 945gc chipset which is the desktop equivalent of 945gm +which can be found in the Lenovo x60/t60 or macbook2,1. This chipset +features an ICH7 southbridge. It has 1 DIMM slot that can accommodate up +to 2G of DDR2 RAM. + +Connectivity-wise it has 1 PCI slot, a 10/100 ethernet port, 4 usb slot +and 4 usb ports, with one internal header and 2 SATA ports. + +The D945GCLF2 is an upgraded version of this board. The differences are: +1 more USB header, 10/100/1000 ethernet and a dual core cpu (also +hyperthreaded). Since the board is almost identical (and coreboot code +seem to indicate that it works, since MAX\_CPU=4 is set), it is believed +that it should also work but this is untested. + +Remarks about vendor bios: +-------------------------- + +- Without coreboot/libreboot this board is utery useless, since the + vendor bios is very bad. It cannot boot from any HDD wether it is + connected to the SATA port or USB. With libreboot it works just + fine. + +- The vendor bios write protects the flash so it requires external + flashing to install libreboot on this device. Once libreboot is + flashed there is no problem to update the firmware internally + +Here is an image of the board:\ +\ +Here is an image of the D945GCLF2 board:\ +{width="80%" height="80%"}\ +And SPI SOIC8 flash chip\ +{width="50%" height="50%"} + +How to replace thermal paste and fan +------------------------------------ + +This board comes with very crappy disposable loud fan, that one has no +bearings, which can not be repaired or oiled properly, do not waste your +time trying to fix it, just buy one chinese same size fan\ +{width="50%" height="50%"} +{width="50%" height="50%"}\ +Make sure that new one has same wiring\ +{width="50%" height="50%"}\ +This is a new one, with bearing and maintenable\ +{width="50%" height="50%"} +{width="50%" height="50%"}\ +Now remove the both coolers rotating them a bit, slowly, then clean both +silicons and both coolers (removing cmos battery first is recommended)\ +{width="50%" height="50%"}\ +Put a little bit of non conductive thermal paste on both silicons (only +cpu silicon iis shown on that image)\ +{width="50%" height="50%"}\ + +Before assembling new fan, some need new longer screws, make sure having +these (on the left is original one, too short for new fan)\ +{width="50%" height="50%"}\ +After that, assemble your new fan into CPU cooler\ +{width="50%" height="50%"}\ +Finally assemle both coolers on both chips, do not forget put in the CPU +fan connector back, and you are done. + +Copyright © 2016 Arthur Heymans <arthur@aheymans.xyz>\ +Copyright © 2016 Vitaly Castaño Solana <vita\_cell@hotmail.com>\ +Permission is granted to copy, distribute and/or modify this document +under the terms of the Creative Commons Attribution-ShareAlike 4.0 +International license or any later version published by Creative +Commons; A copy of the license can be found at +[../cc-by-sa-4.0.txt](../cc-by-sa-4.0.txt) + +Updated versions of the license (when available) can be found at +<https://creativecommons.org/licenses/by-sa/4.0/legalcode> + +UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE EXTENT +POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS AND +AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND +CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, IMPLIED, STATUTORY, +OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, WARRANTIES OF TITLE, +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NON-INFRINGEMENT, +ABSENCE OF LATENT OR OTHER DEFECTS, ACCURACY, OR THE PRESENCE OR ABSENCE +OF ERRORS, WHETHER OR NOT KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF +WARRANTIES ARE NOT ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT +APPLY TO YOU. + +TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE TO YOU +ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, NEGLIGENCE) OR +OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, CONSEQUENTIAL, +PUNITIVE, EXEMPLARY, OR OTHER LOSSES, COSTS, EXPENSES, OR DAMAGES +ARISING OUT OF THIS PUBLIC LICENSE OR USE OF THE LICENSED MATERIAL, EVEN +IF THE LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH LOSSES, +COSTS, EXPENSES, OR DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT +ALLOWED IN FULL OR IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + +The disclaimer of warranties and limitation of liability provided above +shall be interpreted in a manner that, to the extent possible, most +closely approximates an absolute disclaimer and waiver of all liability. + diff --git a/docs/hardware/ga-g41m-es2l.md b/docs/hardware/ga-g41m-es2l.md new file mode 100644 index 00000000..bfa73e91 --- /dev/null +++ b/docs/hardware/ga-g41m-es2l.md @@ -0,0 +1,21 @@ +--- +title: Gigabyte GA-G41M-ES2L desktop board +... + +This is a desktop board using intel hardware (circa \~2009, ICH7 +southbridge, similar performance-wise to the Libreboot X200. It can make +for quite a nifty desktop. Powered by libreboot. + +IDE on the board is untested, but it might be possible to use a SATA HDD +using an IDE SATA adapter. The SATA ports do work. + +You need to set a custom MAC address in GNU+Linux for the NIC to work. +In /etc/network/interfaces on debian-based systems like Debian or +Devuan, this would be in the entry for your NIC:\ +hwaddress ether macaddressgoeshere + +Flashing instructions can be found at +[../install/\#flashrom](../install/#flashrom) + +Copyright © 2016 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/gm45_remove_me.md b/docs/hardware/gm45_remove_me.md new file mode 100644 index 00000000..9d2209f4 --- /dev/null +++ b/docs/hardware/gm45_remove_me.md @@ -0,0 +1,520 @@ +--- +title: "GM45 chipsets: remove the ME (manageability engine)" +... + +This sections relates to disabling and removing the ME (Intel +**M**anagement **E**ngine) on GM45. This was originally done on the +ThinkPad X200, and later adapted for the ThinkPad R400/T400/T500. It can +in principle be done on any GM45 or GS45 system. + +The ME is a blob that typically must be left inside the flash chip (in +the ME region, as outlined by the default descriptor). On GM45, it is +possible to remove it without any ill effects. All other parts of +coreboot on GM45 systems (provided GMA MHD4500 / Intel graphics) can be +blob-free, so removing the ME was the last obstacle to make GM45 a +feasible target in libreboot (the systems can also work without the +microcode blobs). + +The ME is removed and disabled in libreboot by modifying the descriptor. +More info about this can be found in the ich9deblob/ich9gen source code +in resources/utilities/ich9deblob/ in libreboot, or more generally on +this page. + +More information about the ME can be found at +<http://www.coreboot.org/Intel_Management_Engine> and +<http://me.bios.io/Main_Page>. + +Another project recently found: <http://io.smashthestack.org/me/> + +ICH9 gen utility {#ich9gen} +================ + +It is no longer necessary to use [ich9deblob](#ich9deblob) to generate a +deblobbed descriptor+gbe image for GM45 targets. ich9gen is a small +utility within ich9deblob that can generate them from scratch, without a +factory.bin dump. + +ich9gen executables can be found under ./ich9deblob/ statically compiled +in libreboot\_util. If you are using src or git, build ich9gen from +source with: + $ ./oldbuild module ich9deblob + +The executable will appear under resources/utilities/ich9deblob/ + +Run: + $ ./ich9gen + +Running ich9gen this way (without any arguments) generates a default +descriptor+gbe image with a generic MAC address. You probably don't +want to use the generic one; the ROM images in libreboot contain a +descriptor+gbe image by default (already inserted) just to prevent or +mitigate the risk of bricking your laptop, but with the generic MAC +address (the libreboot project does not know what your real MAC address +is). + +You can find out your MAC address from **ip addr** or **ifconfig** in +GNU+Linux. Alternatively, if you are running libreboot already (with the +correct MAC address in your ROM), dump it (flashrom -r) and read the +first 6 bytes from position 0x1000 (or 0x2000) in a hex editor (or, +rename it to factory.rom and run it in ich9deblob: in the newly created +mkgbe.c will be the individual bytes of your MAC address). If you are +currently running the stock firmware and haven't installed libreboot +yet, you can also run that through ich9deblob to get the mac address. + +An even simpler way to get the MAC address would be to read what's on +the little sticker on the bottom/base of the laptop. + +On GM45 laptops that use flash descriptors, the MAC address or the +onboard ethernet chipset is flashed (inside the ROM image). You should +generate a descriptor+gbe image with your own MAC address inside (with +the Gbe checksum updated to match). Run: + + $ ./ich9gen --macaddress XX:XX:XX:XX:XX:XX +(replace the XX chars with the hexadecimal chars in the MAC address that +you want) + +Two new files will be created: + +- **ich9fdgbe\_4m.bin**: this is for GM45 laptops with the 4MB flash + chip. +- **ich9fdgbe\_8m.bin**: this is for GM45 laptops with the 8MB flash + chip. +- **ich9fdgbe\_16m.bin**: this is for GM45 laptops with the 16MB flash + chip. + +Assuming that your libreboot image is named **libreboot.rom**, copy the +file to where **libreboot.rom** is located and then insert the +descriptor+gbe file into the ROM image.\ +For 16MiB flash chips:\ +\$ **dd if=ich9fdgbe\_16m.bin of=libreboot.rom bs=1 count=12k +conv=notrunc**\ +For 8MiB flash chips:\ +\$ **dd if=ich9fdgbe\_8m.bin of=libreboot.rom bs=1 count=12k +conv=notrunc**\ +For 4MiB flash chips:\ +\$ **dd if=ich9fdgbe\_4m.bin of=libreboot.rom bs=1 count=12k +conv=notrunc**\ + +Your libreboot.rom image is now ready to be flashed on the system. Refer +back to [../install/\#flashrom](../install/#flashrom) for how to flash +it. + +Write-protecting the flash chip +------------------------------- + +Look in *resources/utilities/ich9deblob/src/descriptor/descriptor.c* for +the following lines in the *descriptorHostRegionsUnlocked* function: + + descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = 0x1; + descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x1; + descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x1; + descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x1; + descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x1; + +Also look in *resources/utilities/ich9deblob/src/ich9gen/mkdescriptor.c* +for the following lines: + + descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ + descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ + descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ + descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ + descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ + +NOTE: When you write-protect the flash chip, re-flashing is no longer +possible unless you use dedicated external equipment, which also means +disassembling the laptop. The same equipment can also be used to remove +the write-protection later on, if you choose to do so. \*Only\* +write-protect the chip if you have the right equipment for external +flashing later on; for example, see +[../install/bbb\_setup.html](../install/bbb_setup.html). + +Change them all to 0x0, then re-compile ich9gen. After you have done +that, follow the notes in [\#ich9gen](#ich9gen) to generate a new +descriptor+gbe image and insert that into your ROM image, then flash it. +The next time you boot, the flash chip will be read-only in software +(hardware re-flashing will still work, which you will need for +re-flashing the chip after write-protecting it, to clear the write +protection or to flash yet another ROM image with write protection set +in the descriptor). + +Flashrom will tell you that you can still forcefully re-flash, using *-p +internal:ich\_spi\_force=yes* but this won't actually work; it'll just +brick your laptop. + +For external flashing guides, refer to [../install/](../install/). + +ICH9 deblob utility {#ich9deblob} +=================== + +**This is no longer strictly necessary. Libreboot ROM images for GM45 +systems now contain the 12KiB descriptor+gbe generated from ich9gen, by +default.** + +This was the tool originally used to disable the ME on X200 (later +adapted for other systems that use the GM45 chipset). +[ich9gen](#ich9gen) now supersedes it; ich9gen is better because it does +not rely on dumping the factory.rom image (whereas, ich9deblob does). + +This is what you will use to generate the deblobbed descriptor+gbe +regions for your libreboot ROM image. + +If you are working with libreboot\_src (or git), you can find the source +under resources/utilities/ich9deblob/ and will already be compiled if +you ran **./oldbuild module all** or **./oldbuild module ich9deblob** +from the main directory (./), otherwise you can build it like so: + + $ ./oldbuild module ich9deblob +An executable file named **ich9deblob** will now appear under +resources/utilities/ich9deblob/ + +If you are working with libreboot\_util release archive, you can find +the utility included, statically compiled (for i686 and x86\_64 on +GNU+Linux) under ./ich9deblob/. + +Place the factory.rom from your system (can be obtained using the +external flashing guides for GM45 targets linked +[../install/](../install/)) in the directory where you have your +ich9deblob executable, then run the tool: + + $ ./ich9deblob + +A 12kiB file named **deblobbed\_descriptor.bin** will now appear. **Keep +this and the factory.rom stored in a safe location!** The first 4KiB +contains the descriptor data region for your system, and the next 8KiB +contains the gbe region (config data for your gigabit NIC). These 2 +regions could actually be separate files, but they are joined into 1 +file in this case. + +A 4KiB file named **deblobbed\_4kdescriptor.bin** will alternatively +appear, if no GbE region was detected inside the ROM image. This is +usually the case, when a discrete NIC is used (eg Broadcom) instead of +Intel. Only the Intel NICs need a GbE region in the flash chip. + +Assuming that your libreboot image is named **libreboot.rom**, copy the +**deblobbed\_descriptor.bin** file to where **libreboot.rom** is located +and then run:\ +\$ **dd if=deblobbed\_descriptor.bin of=libreboot.rom bs=1 count=12k +conv=notrunc** + +Alternatively, if you got a the **deblobbed\_4kdescriptor.bin** file (no +GbE defined), do this: \$ **dd if=deblobbed\_4kdescriptor.bin +of=libreboot.rom bs=1 count=4k conv=notrunc** + +The utility will also generate 4 additional files: + +- mkdescriptor.c +- mkdescriptor.h +- mkgbe.c +- mkgbe.h + +These are C source files that can re-generate the very same Gbe and +Descriptor structs (from ich9deblob/ich9gen). To use these, place them +in src/ich9gen/ in ich9deblob, then re-build. The newly built +**ich9gen** executable will be able to re-create the very same 12KiB +file from scratch, based on the C structs, this time **without** the +need for a factory.rom dump! + +You should now have a **libreboot.rom** image containing the correct 4K +descriptor and 8K gbe regions, which will then be safe to flash. Refer +back to [../install/\#flashrom](../install/#flashrom) for how to flash +it. + +demefactory utility {#demefactory} +=================== + +This takes a factory.rom dump and disables the ME/TPM, but leaves the +region intact. It also sets all regions read-write. + +The ME interferes with flash read/write in flashrom, and the default +descriptor locks some regions. The idea is that doing this will remove +all of those restrictions. + +Simply run (with factory.rom in the same directory): + + $ ./demefactory + +It will generate a 4KiB descriptor file (only the descriptor, no GbE). +Insert that into a factory.rom image (NOTE: do this on a copy of it. +Keep the original factory.rom stored safely somewhere):\ +\$ **dd if=demefactory\_4kdescriptor.bin of=factory\_nome.rom bs=1 +count=4k conv=notrunc** + +TODO: test this.\ +TODO: lenovobios (GM45 thinkpads) still write-protects parts of the +flash. Modify the assembly code inside. Note: the factory.rom (BIOS +region) from lenovobios is in a compressed format, which you have to +extract. bios\_extract upstream won't work, but the following was said +in \#coreboot on freenode IRC: + + <roxfan> vimuser: try bios_extract with ffv patch http://patchwork.coreboot.org/patch/3444/ + <roxfan> or https://github.com/coreboot/bios_extract/blob/master/phoenix_extract.py + <roxfan> what are you looking for specifically, btw? + + 0x74: 0x9fff03e0 PR0: Warning: 0x003e0000-0x01ffffff is read-only. + 0x84: 0x81ff81f8 PR4: Warning: 0x001f8000-0x001fffff is locked. + +Use-case: a factory.rom image modified in this way would theoretically +have no flash protections whatsoever, making it easy to quickly switch +between factory/libreboot in software, without ever having to +disassemble and re-flash externally unless you brick the device. + +demefactory is part of the ich9deblob src, found at +*resources/utilities/ich9deblob/* + +The sections below are adapted from (mostly) IRC logs related to early +development getting the ME removed on GM45. They are useful for +background information. This could not have been done without sgsit's +help. + +Early notes {#early_notes} +----------- + +- <http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-10-family-datasheet.pdf> + page 230 mentions about descriptor and non-descriptor mode (which + wipes out gbe and ME/AMT). +- ~~**See reference to HDA\_SDO (disable descriptor security)**~~ + strap connected GPIO33 pin is it on ICH9-M (X200). HDA\_SDO applies + to later chipsets (series 6 or higher). Disabling descriptor + security also disables the ethernet according to sgsit. sgsit's + method involves use of 'soft straps' (see IRC logs below) instead + of disabling the descriptor. +- **and the location of GPIO33 on the x200s: (was an external link. + Putting it here instead)** + [images/x200/gpio33\_location.jpg](images/x200/gpio33_location.jpg) - + it's above the number 7 on TP37 (which is above the big intel chip + at the bottom) +- The ME datasheet may not be for the mobile chipsets but it doesn't + vary that much. This one gives some detail and covers QM67 which is + what the X201 uses: + <http://www.intel.co.uk/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf> + +Flash chips {#flashchips} +----------- + +- Schematics for X200 laptop: + <http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006075.pdf> + **~~- Page 20 and page 9 refer to SDA\_HDO or SDA\_HDOUT~~** only on + series 6 or higher chipsets. ICH9-M (X200) does it with a strap + connected to GPIO33 pin (see IRC notes below) + + - According to page 29, the X200 can have any of the following flash + chips: + - ATMEL AT26DF321-SU 72.26321.A01 - this is a 32Mb (4MiB) chip + - MXIC (Macronix?) MX25L3205DM2I-12G 72.25325.A01 - another 32Mb + (4MiB) chip + - MXIC (Macronix?) MX25L6405DMI-12G 41R0820AA - this is a 64Mb + (8MiB) chip + - Winbond W25X64VSFIG 41R0820BA - another 64Mb (8MiB) chip + + sgsit says that the X200s with the 64Mb flash chips are (probably) + the ones with AMT (alongside the ME), whereas the 32Mb chips contain + only the ME. +- Schematics for X200s laptop: + <http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006104.pdf>. + +Early development notes {#early_development_notes} +----------------------- + + Start (hex) End (hex) Length (hex) Area Name + ----------- --------- ------------ --------- + 00000000 003FFFFF 00400000 Flash Image + + 00000000 00000FFF 00001000 Descriptor Region + 00000004 0000000F 0000000C Descriptor Map + 00000010 0000001B 0000000C Component Section + 00000040 0000004F 00000010 Region Section + 00000060 0000006B 0000000C Master Access Section + 00000060 00000063 00000004 CPU/BIOS + 00000064 00000067 00000004 Manageability Engine (ME) + 00000068 0000006B 00000004 GbE LAN + 00000100 00000103 00000004 ICH Strap 0 + 00000104 00000107 00000004 ICH Strap 1 + 00000200 00000203 00000004 MCH Strap 0 + 00000EFC 00000EFF 00000004 Descriptor Map 2 + 00000ED0 00000EF7 00000028 ME VSCC Table + 00000ED0 00000ED7 00000008 Flash device 1 + 00000ED8 00000EDF 00000008 Flash device 2 + 00000EE0 00000EE7 00000008 Flash device 3 + 00000EE8 00000EEF 00000008 Flash device 4 + 00000EF0 00000EF7 00000008 Flash device 5 + 00000F00 00000FFF 00000100 OEM Section + 00001000 001F5FFF 001F5000 ME Region + 001F6000 001F7FFF 00002000 GbE Region + 001F8000 001FFFFF 00008000 PDR Region + 00200000 003FFFFF 00200000 BIOS Region + + Start (hex) End (hex) Length (hex) Area Name + ----------- --------- ------------ --------- + 00000000 003FFFFF 00400000 Flash Image + + 00000000 00000FFF 00001000 Descriptor Region + 00000004 0000000F 0000000C Descriptor Map + 00000010 0000001B 0000000C Component Section + 00000040 0000004F 00000010 Region Section + 00000060 0000006B 0000000C Master Access Section + 00000060 00000063 00000004 CPU/BIOS + 00000064 00000067 00000004 Manageability Engine (ME) + 00000068 0000006B 00000004 GbE LAN + 00000100 00000103 00000004 ICH Strap 0 + 00000104 00000107 00000004 ICH Strap 1 + 00000200 00000203 00000004 MCH Strap 0 + 00000ED0 00000EF7 00000028 ME VSCC Table + 00000ED0 00000ED7 00000008 Flash device 1 + 00000ED8 00000EDF 00000008 Flash device 2 + 00000EE0 00000EE7 00000008 Flash device 3 + 00000EE8 00000EEF 00000008 Flash device 4 + 00000EF0 00000EF7 00000008 Flash device 5 + 00000EFC 00000EFF 00000004 Descriptor Map 2 + 00000F00 00000FFF 00000100 OEM Section + 00001000 00002FFF 00002000 GbE Region + 00003000 00202FFF 00200000 BIOS Region + + Build Settings + -------------- + Flash Erase Size = 0x1000 + +It's a utility called 'Flash Image Tool' for ME 4.x that was used for +this. You drag a complete image into in and the utility decomposes the +various components, allowing you to set soft straps. + +This tool is proprietary, for Windows only, but was used to deblob the +X200. End justified means, and the utility is no longer needed since the +ich9deblob utility (documented on this page) can now be used to create +deblobbed descriptors. + +GBE (gigabit ethernet) region in SPI flash {#gbe_region} +------------------------------------------ + +Of the 8K, about 95% is 0xFF. The data is the gbe region is fully +documented in this public datasheet: +<http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf> + +The only actual content found was: + + 00 1F 1F 1F 1F 1F 00 08 FF FF 83 10 FF FF FF FF + 08 10 FF FF C3 10 EE 20 AA 17 F5 10 86 80 00 00 + 01 0D 00 00 00 00 05 06 20 30 00 0A 00 00 8B 8D + 02 06 40 2B 43 00 00 00 F5 10 AD BA F5 10 BF 10 + AD BA CB 10 AD BA AD BA 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 01 00 40 28 12 07 40 FF FF FF FF FF FF FF FF + FF FF FF FF FF FF FF FF FF FF FF FF FF FF D9 F0 + 20 60 1F 00 02 00 13 00 00 80 1D 00 FF 00 16 00 + DD CC 18 00 11 20 17 00 DD DD 18 00 12 20 17 00 + 00 80 1D 00 00 00 1F + +The first part is the MAC address set to all 0x1F. It's repeated haly +way through the 8K area, and the rest is all 0xFF. This is all +documented in the datasheet. + +The GBe region starts at 0x20A000 bytes from the \*end\* of a factory +image and is 0x2000 bytes long. In libreboot (deblobbed) the descriptor +is set to put gbe directly after the initial 4K flash descriptor. So the +first 4K of the ROM is the descriptor, and then the next 8K is the gbe +region. + +### GBE region: change MAC address {#gbe_region_changemacaddress} + +According to the datasheet, it's supposed to add up to 0xBABA but can +actually be others on the X200. +<https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums> + +*"One of those engineers loves classic rock music, so they selected +0xBABA"* + +In honour of the song *Baba O'Reilly* by *The Who* apparently. We're +not making this stuff up\... + +0x3ABA, 0x34BA, 0x40BA and more have been observed in the main Gbe +regions on the X200 factory.rom dumps. The checksums of the backup +regions match BABA, however. + +By default, the X200 (as shipped by Lenovo) actually has an invalid main +gbe checksum. The backup gbe region is correct, and is what these +systems default to. Basically, you should do what you need on the +\*backup\* gbe region, and then correct the main one by copying from the +backup. + +Look at resources/utilities/ich9deblob/ich9deblob.c. + +- Add the first 0x3F 16bit numbers (unsigned) of the GBe descriptor + together (this includes the checksum value) and that has to add up + to 0xBABA. In other words, the checksum is 0xBABA minus the total of + the first 0x3E 16bit numbers (unsigned), ignoring any overflow. + +Flash descriptor region {#flash_descriptor_region} +----------------------- + +<http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf> +from page 850 onwards. This explains everything that is in the flash +descriptor, which can be used to understand what libreboot is doing +about modifying it. + +How to deblob: + +- patch the number of regions present in the descriptor from 5 - 3 +- originally descriptor + bios + me + gbe + platform +- modified = descriptor + bios + gbe +- the next stage is to patch the part of the descriptor which defines + the start and end point of each section +- then cut out the gbe region and insert it just after the region +- all this can be substantiated with public docs (ICH9 datasheet) +- the final part is flipping 2 bits. Halting the ME via 1 MCH soft + strap and 1 ICH soft strap +- the part of the descriptor described there gives the base address + and length of each region (bits 12:24 of each address) +- to disable a region, you set the base address to 0xFFF and the + length to 0 +- and you change the number of regions from 4 (zero based) to 2 + +There's an interesting parameter called 'ME Alternate disable', which +allows the ME to only handle hardware errata in the southbridge, but +disables any other functionality. This is similar to the 'ignition' in +the 5 series and higher but using the standard firmware instead of a +small 128K version. Useless for libreboot, though. + +To deblob GM45, you chop out the platform and ME regions and correct the +addresses in flReg1-4. Then you set meDisable to 1 in ICHSTRAP0 and +MCHSTRAP0. + +How to patch the descriptor from the factory.rom dump + +- map the first 4k into the struct (minus the gbe region) +- set NR in FLMAP0 to 2 (from 4) +- adjust BASE and LIMIT in flReg1,2,3,4 to reflect the new location of + each region (or remove them in the case of Platform and ME) +- set meDisable to 1/true in ICHSTRAP0 and MCHSTRAP0 +- extract the 8k GBe region and append that to the end of the 4k + descriptor +- output the 12k concatenated chunk +- Then it can be dd'd into the first 12K part of a coreboot image. +- the GBe region always starts 0x20A000 bytes from the end of the ROM + +This means that libreboot's descriptor region will simply define the +following regions: + +- descriptor (4K) +- gbe (8K) +- bios (rest of flash chip. CBFS also set to occupy this whole size) + +The data in the descriptor region is little endian, and it represents +bits 24:12 of the address (bits 12-24, written this way since bit 24 is +nearer to left than bit 12 in the binary representation). + +So, *x << 12 = address* + +If it's in descriptor mode, then the first 4 bytes will be 5A A5 F0 0F. + +platform data partition in boot flash (factory.rom / lenovo bios) {#platform_data_region} +----------------------------------------------------------------- + +Basically useless for libreboot, since it appears to be a blob. Removing +it didn't cause any issues in libreboot. + +This is a 32K region from the factory image. It could be data +(non-functional) that the original Lenovo BIOS used, but we don't know. + +It has only a 448 byte fragment different from 0x00 or 0xFF. + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/hwdumps/x200/biosdecode.err.log b/docs/hardware/hwdumps/x200/biosdecode.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/biosdecode.err.log diff --git a/docs/hardware/hwdumps/x200/biosdecode.log b/docs/hardware/hwdumps/x200/biosdecode.log new file mode 100644 index 00000000..bfeaba39 --- /dev/null +++ b/docs/hardware/hwdumps/x200/biosdecode.log @@ -0,0 +1,24 @@ +# biosdecode 2.12 +VPD present. + BIOS Build ID: 6DET65WW + Box Serial Number: L3AAR0B + Motherboard Serial Number: 1ZFDS89N4DD + Machine Type/Model: 7459GW4 +SMBIOS 2.4 present. + Structure Table Length: 2464 bytes + Structure Table Address: 0x000E0010 + Number Of Structures: 68 + Maximum Structure Size: 120 bytes +BIOS32 Service Directory present. + Revision: 0 + Calling Interface Address: 0x000FDC80 +ACPI 2.0 present. + OEM Identifier: LENOVO + RSD Table 32-bit Address: 0x79B5B843 + XSD Table 64-bit Address: 0x0000000079B5B8AB +PNP BIOS 1.0 present. + Event Notification: Not Supported + Real Mode 16-bit Code Address: E2CA:1868 + Real Mode 16-bit Data Address: 0040:0000 + 16-bit Protected Mode Code Address: 0x000F97BD + 16-bit Protected Mode Data Address: 0x00000400 diff --git a/docs/hardware/hwdumps/x200/codec#0 b/docs/hardware/hwdumps/x200/codec#0 new file mode 100644 index 00000000..2b9d6f35 --- /dev/null +++ b/docs/hardware/hwdumps/x200/codec#0 @@ -0,0 +1,208 @@ +Codec: Conexant CX20561 (Hermosa) +Address: 0 +AFG Function Id: 0x1 (unsol 1) +MFG Function Id: 0x2 (unsol 1) +Vendor Id: 0x14f15051 +Subsystem Id: 0x17aa20ff +Revision Id: 0x100000 +Modem Function Group: 0x2 +Default PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM +Default Amp-In caps: N/A +Default Amp-Out caps: N/A +State of AFG node 0x01: + Power states: D0 D1 D2 D3 CLKSTOP + Power: setting=D0, actual=D0 +GPIO: io=4, o=0, i=0, unsolicited=1, wake=0 + IO[0]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[1]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[2]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[3]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 +Node 0x10 [Audio Output] wcaps 0xc1d: Stereo Amp-Out R/L + Control: name="Speaker Playback Volume", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Control: name="Speaker Playback Switch", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Device: name="CX20561 Analog", type="Audio", device=0 + Amp-Out caps: ofs=0x4a, nsteps=0x4a, stepsize=0x03, mute=0 + Amp-Out vals: [0x4a 0x4a] + Converter: stream=8, channel=0 + PCM: + rates [0x560]: 44100 48000 96000 192000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x11 [Audio Output] wcaps 0xc1d: Stereo Amp-Out R/L + Control: name="Headphone Playback Volume", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Control: name="Headphone Playback Switch", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Amp-Out caps: ofs=0x4a, nsteps=0x4a, stepsize=0x03, mute=0 + Amp-Out vals: [0x4a 0x4a] + Converter: stream=8, channel=0 + PCM: + rates [0x560]: 44100 48000 96000 192000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x12 [Audio Output] wcaps 0x211: Stereo Digital + Control: name="IEC958 Playback Con Mask", index=0, device=0 + Control: name="IEC958 Playback Pro Mask", index=0, device=0 + Control: name="IEC958 Playback Default", index=0, device=0 + Control: name="IEC958 Playback Switch", index=0, device=0 + Control: name="IEC958 Default PCM Playback Switch", index=0, device=0 + Device: name="CX20561 Digital", type="SPDIF", device=1 + Converter: stream=8, channel=0 + Digital: + Digital category: 0x0 + IEC Coding Type: 0x0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x5]: PCM AC3 +Node 0x13 [Beep Generator Widget] wcaps 0x70000c: Mono Amp-Out + Control: name="Beep Playback Volume", index=0, device=0 + ControlAmp: chs=1, dir=Out, idx=0, ofs=0 + Control: name="Beep Playback Switch", index=0, device=0 + ControlAmp: chs=1, dir=Out, idx=0, ofs=0 + Amp-Out caps: ofs=0x03, nsteps=0x03, stepsize=0x17, mute=0 + Amp-Out vals: [0x00] +Node 0x14 [Audio Input] wcaps 0x100d1b: Stereo Amp-In R/L + Device: name="CX20561 Analog", type="Audio", device=0 + Amp-In caps: ofs=0x4a, nsteps=0x50, stepsize=0x03, mute=0 + Amp-In vals: [0x50 0x50] [0x50 0x50] + Converter: stream=4, channel=0 + SDI-Select: 0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x1d* 0x17 +Node 0x15 [Audio Input] wcaps 0x100d1b: Stereo Amp-In R/L + Control: name="Capture Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=1, ofs=0 + Amp-In caps: ofs=0x4a, nsteps=0x50, stepsize=0x03, mute=0 + Amp-In vals: [0x50 0x50] + Converter: stream=0, channel=0 + SDI-Select: 0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 1 + 0x18 +Node 0x16 [Pin Complex] wcaps 0x400581: Stereo + Control: name="Headphone Jack", index=0, device=0 + Pincap 0x0000001c: OUT HP Detect + Pin Default 0x042140f0: [Jack] HP Out at Ext Right + Conn = 1/8, Color = Green + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0xc0: OUT HP + Unsolicited: tag=02, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10 0x11* +Node 0x17 [Pin Complex] wcaps 0x40048b: Stereo Amp-In + Control: name="Dock Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Dock Mic Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x27, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00001224: IN Detect + Vref caps: 50 80 + Pin Default 0x61a190f0: [N/A] Mic at Sep Rear + Conn = 1/8, Color = Pink + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x24: IN VREF_80 + Unsolicited: tag=03, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x18 [Pin Complex] wcaps 0x40048b: Stereo Amp-In + Control: name="Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Mic Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x27, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00001224: IN Detect + Vref caps: 50 80 + Pin Default 0x04a190f0: [Jack] Mic at Ext Right + Conn = 1/8, Color = Pink + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x24: IN VREF_80 + Unsolicited: tag=04, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x19 [Pin Complex] wcaps 0x400581: Stereo + Control: name="Dock Headphone Jack", index=0, device=0 + Pincap 0x00000014: OUT Detect + Pin Default 0x612140f0: [N/A] HP Out at Sep Rear + Conn = 1/8, Color = Green + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x40: OUT + Unsolicited: tag=01, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10 0x11* +Node 0x1a [Pin Complex] wcaps 0x400501: Stereo + Control: name="Speaker Phantom Jack", index=0, device=0 + Pincap 0x00010010: OUT EAPD + EAPD 0x2: EAPD + Pin Default 0x901701f0: [Fixed] Speaker at Int N/A + Conn = Analog, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10* 0x11 +Node 0x1b [Pin Complex] wcaps 0x400500: Mono + Pincap 0x00010010: OUT EAPD + EAPD 0x2: EAPD + Pin Default 0x40f001f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10* 0x11 +Node 0x1c [Pin Complex] wcaps 0x400701: Stereo Digital + Control: name="SPDIF Phantom Jack", index=0, device=0 + Pincap 0x00000010: OUT + Pin Default 0x40f001f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 1 + 0x12 +Node 0x1d [Pin Complex] wcaps 0x40040b: Stereo Amp-In + Control: name="Internal Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Internal Mic Phantom Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x2f, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00000020: IN + Pin Default 0x90a601f0: [Fixed] Mic at Int N/A + Conn = Digital, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x20: IN + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x1e [Vendor Defined Widget] wcaps 0xf00000: Mono diff --git a/docs/hardware/hwdumps/x200/cpuinfo.err.log b/docs/hardware/hwdumps/x200/cpuinfo.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/cpuinfo.err.log diff --git a/docs/hardware/hwdumps/x200/cpuinfo.log b/docs/hardware/hwdumps/x200/cpuinfo.log new file mode 100644 index 00000000..8b01059e --- /dev/null +++ b/docs/hardware/hwdumps/x200/cpuinfo.log @@ -0,0 +1,52 @@ +processor : 0 +vendor_id : GenuineIntel +cpu family : 6 +model : 23 +model name : Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz +stepping : 6 +microcode : 0x60c +cpu MHz : 800.000 +cache size : 3072 KB +physical id : 0 +siblings : 2 +core id : 0 +cpu cores : 2 +apicid : 0 +initial apicid : 0 +fpu : yes +fpu_exception : yes +cpuid level : 10 +wp : yes +flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts nopl aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 lahf_lm dtherm tpr_shadow vnmi flexpriority +bogomips : 4787.97 +clflush size : 64 +cache_alignment : 64 +address sizes : 36 bits physical, 48 bits virtual +power management: + +processor : 1 +vendor_id : GenuineIntel +cpu family : 6 +model : 23 +model name : Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz +stepping : 6 +microcode : 0x60c +cpu MHz : 1600.000 +cache size : 3072 KB +physical id : 0 +siblings : 2 +core id : 1 +cpu cores : 2 +apicid : 1 +initial apicid : 1 +fpu : yes +fpu_exception : yes +cpuid level : 10 +wp : yes +flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts nopl aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 lahf_lm dtherm tpr_shadow vnmi flexpriority +bogomips : 4787.97 +clflush size : 64 +cache_alignment : 64 +address sizes : 36 bits physical, 48 bits virtual +power management: + diff --git a/docs/hardware/hwdumps/x200/dmesg.err.log b/docs/hardware/hwdumps/x200/dmesg.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/dmesg.err.log diff --git a/docs/hardware/hwdumps/x200/dmesg.log b/docs/hardware/hwdumps/x200/dmesg.log new file mode 100644 index 00000000..64eb5805 --- /dev/null +++ b/docs/hardware/hwdumps/x200/dmesg.log @@ -0,0 +1,1066 @@ +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 3.13.0-39-lowlatency (root@devel.trisquel.info) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #66+7.0trisquel2 SMP PREEMPT Wed Oct 29 17:10:10 UTC 2014 (Ubuntu 3.13.0-39.66+7.0trisquel2-lowlatency 3.13.11.8-gnu) +[ 0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-3.13.0-39-lowlatency root=UUID=097336a2-7389-4897-a7e8-1f43e91aae96 ro nomdmonddf nomdmonisw nomdmonddf nomdmonisw +[ 0.000000] KERNEL supported cpus: +[ 0.000000] Intel GenuineIntel +[ 0.000000] AMD AuthenticAMD +[ 0.000000] Centaur CentaurHauls +[ 0.000000] Disabled fast string operations +[ 0.000000] e820: BIOS-provided physical RAM map: +[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009ebff] usable +[ 0.000000] BIOS-e820: [mem 0x000000000009ec00-0x000000000009ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000000dc000-0x00000000000fffff] reserved +[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000796a0fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000796a1000-0x00000000796a6fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000796a7000-0x00000000797b6fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000797b7000-0x000000007980efff] reserved +[ 0.000000] BIOS-e820: [mem 0x000000007980f000-0x00000000798c6fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000798c7000-0x00000000798d1fff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000798d2000-0x00000000798d4fff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x00000000798d5000-0x00000000798d8fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000798d9000-0x00000000798dcfff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000798dd000-0x00000000798dffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000798e0000-0x0000000079906fff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x0000000079907000-0x0000000079907fff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x0000000079908000-0x0000000079b0efff] reserved +[ 0.000000] BIOS-e820: [mem 0x0000000079b0f000-0x0000000079b9efff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x0000000079b9f000-0x0000000079bfefff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x0000000079bff000-0x0000000079bfffff] usable +[ 0.000000] BIOS-e820: [mem 0x0000000079c00000-0x000000007bffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec0ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed003ff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed10000-0x00000000fed13fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed18000-0x00000000fed19fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed8ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000ff800000-0x00000000ffffffff] reserved +[ 0.000000] NX (Execute Disable) protection: active +[ 0.000000] SMBIOS 2.4 present. +[ 0.000000] DMI: LENOVO 7459GW4/7459GW4, BIOS 6DET65WW (3.15 ) 08/24/2010 +[ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved +[ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable +[ 0.000000] No AGP bridge found +[ 0.000000] e820: last_pfn = 0x79c00 max_arch_pfn = 0x400000000 +[ 0.000000] MTRR default type: uncachable +[ 0.000000] MTRR fixed ranges enabled: +[ 0.000000] 00000-9FFFF write-back +[ 0.000000] A0000-BFFFF uncachable +[ 0.000000] C0000-D3FFF write-protect +[ 0.000000] D4000-DBFFF uncachable +[ 0.000000] DC000-FFFFF write-protect +[ 0.000000] MTRR variable ranges enabled: +[ 0.000000] 0 base 07D000000 mask FFF000000 uncachable +[ 0.000000] 1 base 07E000000 mask FFE000000 uncachable +[ 0.000000] 2 base 000000000 mask F80000000 write-back +[ 0.000000] 3 base 079E00000 mask FFFE00000 uncachable +[ 0.000000] 4 disabled +[ 0.000000] 5 disabled +[ 0.000000] 6 disabled +[ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 +[ 0.000000] original variable MTRRs +[ 0.000000] reg 0, base: 2000MB, range: 16MB, type UC +[ 0.000000] reg 1, base: 2016MB, range: 32MB, type UC +[ 0.000000] reg 2, base: 0GB, range: 2GB, type WB +[ 0.000000] reg 3, base: 1950MB, range: 2MB, type UC +[ 0.000000] total RAM covered: 1998M +[ 0.000000] gran_size: 64K chunk_size: 64K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 128K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 256K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 512K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 1M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 2M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 4M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 64K chunk_size: 8M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 64K chunk_size: 16M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 64K chunk_size: 32M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 64K chunk_size: 64M num_reg: 7 lose cover RAM: 0G +[ 0.000000] gran_size: 64K chunk_size: 128M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 256M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 512M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 1G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 64K chunk_size: 2G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 128K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 256K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 512K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 1M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 2M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 4M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 128K chunk_size: 8M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 128K chunk_size: 16M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 128K chunk_size: 32M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 128K chunk_size: 64M num_reg: 7 lose cover RAM: 0G +[ 0.000000] gran_size: 128K chunk_size: 128M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 256M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 512M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 1G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 128K chunk_size: 2G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 256K chunk_size: 256K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 256K chunk_size: 512K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 256K chunk_size: 1M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 256K chunk_size: 2M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 256K chunk_size: 4M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 256K chunk_size: 8M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 256K chunk_size: 16M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 256K chunk_size: 32M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 256K chunk_size: 64M num_reg: 7 lose cover RAM: 0G +[ 0.000000] gran_size: 256K chunk_size: 128M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 256K chunk_size: 256M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 256K chunk_size: 512M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 256K chunk_size: 1G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 256K chunk_size: 2G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 512K chunk_size: 512K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 512K chunk_size: 1M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 512K chunk_size: 2M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 512K chunk_size: 4M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 512K chunk_size: 8M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 512K chunk_size: 16M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 512K chunk_size: 32M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 512K chunk_size: 64M num_reg: 7 lose cover RAM: 0G +[ 0.000000] gran_size: 512K chunk_size: 128M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 512K chunk_size: 256M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 512K chunk_size: 512M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 512K chunk_size: 1G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 512K chunk_size: 2G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 1M chunk_size: 1M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 1M chunk_size: 2M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 1M chunk_size: 4M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 1M chunk_size: 8M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 1M chunk_size: 16M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 1M chunk_size: 32M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 1M chunk_size: 64M num_reg: 7 lose cover RAM: 0G +[ 0.000000] gran_size: 1M chunk_size: 128M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 1M chunk_size: 256M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 1M chunk_size: 512M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 1M chunk_size: 1G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 1M chunk_size: 2G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 2M chunk_size: 2M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 2M chunk_size: 4M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 2M chunk_size: 8M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 2M chunk_size: 16M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 2M chunk_size: 32M num_reg: 7 lose cover RAM: 16M +[ 0.000000] gran_size: 2M chunk_size: 64M num_reg: 7 lose cover RAM: 0G +[ 0.000000] gran_size: 2M chunk_size: 128M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 2M chunk_size: 256M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 2M chunk_size: 512M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 2M chunk_size: 1G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 2M chunk_size: 2G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 4M chunk_size: 4M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 4M chunk_size: 8M num_reg: 7 lose cover RAM: 18M +[ 0.000000] gran_size: 4M chunk_size: 16M num_reg: 7 lose cover RAM: 18M +[ 0.000000] gran_size: 4M chunk_size: 32M num_reg: 7 lose cover RAM: 18M +[ 0.000000] gran_size: 4M chunk_size: 64M num_reg: 7 lose cover RAM: 2M +[ 0.000000] gran_size: 4M chunk_size: 128M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 4M chunk_size: 256M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 4M chunk_size: 512M num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 4M chunk_size: 1G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 4M chunk_size: 2G num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 8M chunk_size: 8M num_reg: 7 lose cover RAM: 22M +[ 0.000000] gran_size: 8M chunk_size: 16M num_reg: 7 lose cover RAM: 22M +[ 0.000000] gran_size: 8M chunk_size: 32M num_reg: 7 lose cover RAM: 22M +[ 0.000000] gran_size: 8M chunk_size: 64M num_reg: 7 lose cover RAM: 6M +[ 0.000000] gran_size: 8M chunk_size: 128M num_reg: 7 lose cover RAM: 22M +[ 0.000000] gran_size: 8M chunk_size: 256M num_reg: 7 lose cover RAM: 22M +[ 0.000000] gran_size: 8M chunk_size: 512M num_reg: 7 lose cover RAM: 22M +[ 0.000000] gran_size: 8M chunk_size: 1G num_reg: 7 lose cover RAM: 22M +[ 0.000000] gran_size: 8M chunk_size: 2G num_reg: 7 lose cover RAM: 22M +[ 0.000000] gran_size: 16M chunk_size: 16M num_reg: 7 lose cover RAM: 14M +[ 0.000000] gran_size: 16M chunk_size: 32M num_reg: 7 lose cover RAM: 30M +[ 0.000000] gran_size: 16M chunk_size: 64M num_reg: 7 lose cover RAM: 14M +[ 0.000000] gran_size: 16M chunk_size: 128M num_reg: 7 lose cover RAM: 14M +[ 0.000000] gran_size: 16M chunk_size: 256M num_reg: 7 lose cover RAM: 14M +[ 0.000000] gran_size: 16M chunk_size: 512M num_reg: 7 lose cover RAM: 14M +[ 0.000000] gran_size: 16M chunk_size: 1G num_reg: 7 lose cover RAM: 14M +[ 0.000000] gran_size: 16M chunk_size: 2G num_reg: 7 lose cover RAM: 14M +[ 0.000000] gran_size: 32M chunk_size: 32M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 64M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 128M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 256M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 512M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 1G num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 2G num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 64M chunk_size: 64M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 128M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 256M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 512M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 1G num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 2G num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 128M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 256M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 512M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 1G num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 2G num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 256M chunk_size: 256M num_reg: 3 lose cover RAM: 206M +[ 0.000000] gran_size: 256M chunk_size: 512M num_reg: 3 lose cover RAM: 206M +[ 0.000000] gran_size: 256M chunk_size: 1G num_reg: 3 lose cover RAM: 206M +[ 0.000000] gran_size: 256M chunk_size: 2G num_reg: 3 lose cover RAM: 206M +[ 0.000000] gran_size: 512M chunk_size: 512M num_reg: 2 lose cover RAM: 462M +[ 0.000000] gran_size: 512M chunk_size: 1G num_reg: 2 lose cover RAM: 462M +[ 0.000000] gran_size: 512M chunk_size: 2G num_reg: 2 lose cover RAM: 462M +[ 0.000000] gran_size: 1G chunk_size: 1G num_reg: 1 lose cover RAM: 974M +[ 0.000000] gran_size: 1G chunk_size: 2G num_reg: 1 lose cover RAM: 974M +[ 0.000000] gran_size: 2G chunk_size: 2G num_reg: 0 lose cover RAM: 1998M +[ 0.000000] mtrr_cleanup: can not find optimal value +[ 0.000000] please specify mtrr_gran_size/mtrr_chunk_size +[ 0.000000] e820: update [mem 0x79e00000-0x79ffffff] usable ==> reserved +[ 0.000000] found SMP MP-table at [mem 0x000f72d0-0x000f72df] mapped at [ffff8800000f72d0] +[ 0.000000] Scanning 1 areas for low memory corruption +[ 0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576 +[ 0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff] +[ 0.000000] [mem 0x00000000-0x000fffff] page 4k +[ 0.000000] BRK [0x01fd9000, 0x01fd9fff] PGTABLE +[ 0.000000] BRK [0x01fda000, 0x01fdafff] PGTABLE +[ 0.000000] BRK [0x01fdb000, 0x01fdbfff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x79400000-0x795fffff] +[ 0.000000] [mem 0x79400000-0x795fffff] page 2M +[ 0.000000] BRK [0x01fdc000, 0x01fdcfff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x78000000-0x793fffff] +[ 0.000000] [mem 0x78000000-0x793fffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x00100000-0x77ffffff] +[ 0.000000] [mem 0x00100000-0x001fffff] page 4k +[ 0.000000] [mem 0x00200000-0x77ffffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x79600000-0x796a0fff] +[ 0.000000] [mem 0x79600000-0x796a0fff] page 4k +[ 0.000000] BRK [0x01fdd000, 0x01fddfff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x796a7000-0x797b6fff] +[ 0.000000] [mem 0x796a7000-0x797b6fff] page 4k +[ 0.000000] init_memory_mapping: [mem 0x7980f000-0x798c6fff] +[ 0.000000] [mem 0x7980f000-0x798c6fff] page 4k +[ 0.000000] BRK [0x01fde000, 0x01fdefff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x79bff000-0x79bfffff] +[ 0.000000] [mem 0x79bff000-0x79bfffff] page 4k +[ 0.000000] RAMDISK: [mem 0x35314000-0x36981fff] +[ 0.000000] ACPI: RSDP 00000000000f7290 000024 (v02 LENOVO) +[ 0.000000] ACPI: XSDT 0000000079b5b8ab 00008C (v01 LENOVO TP-6D 00003150 LTP 00000000) +[ 0.000000] ACPI: FACP 0000000079b5ba00 0000F4 (v03 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: DSDT 0000000079b5bdf4 00DF28 (v01 LENOVO TP-6D 00003150 MSFT 03000000) +[ 0.000000] ACPI: FACS 0000000079b8e000 000040 +[ 0.000000] ACPI: SSDT 0000000079b5bbb4 000240 (v01 LENOVO TP-6D 00003150 MSFT 03000000) +[ 0.000000] ACPI: ECDT 0000000079b69d1c 000052 (v01 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: APIC 0000000079b69d6e 000078 (v01 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: MCFG 0000000079b69de6 00003C (v01 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: HPET 0000000079b69e22 000038 (v01 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: BOOT 0000000079b69f38 000028 (v01 LENOVO TP-6D 00003150 LTP 00000001) +[ 0.000000] ACPI: ASF! 0000000079b69f60 0000A0 (v16 LENOVO TP-6D 00003150 PTL 00000001) +[ 0.000000] ACPI: SSDT 0000000079b8d1ea 000578 (v01 LENOVO TP-6D 00003150 INTL 20050513) +[ 0.000000] ACPI: TCPA 0000000079907000 000032 (v00 00000000 00000000) +[ 0.000000] ACPI: SSDT 00000000798d4000 000655 (v01 PmRef CpuPm 00003000 INTL 20050624) +[ 0.000000] ACPI: SSDT 00000000798d3000 000274 (v01 PmRef Cpu0Tst 00003000 INTL 20050624) +[ 0.000000] ACPI: SSDT 00000000798d2000 000242 (v01 PmRef ApTst 00003000 INTL 20050624) +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] No NUMA configuration found +[ 0.000000] Faking a node at [mem 0x0000000000000000-0x0000000079bfffff] +[ 0.000000] Initmem setup node 0 [mem 0x00000000-0x79bfffff] +[ 0.000000] NODE_DATA [mem 0x798c1000-0x798c5fff] +[ 0.000000] [ffffea0000000000-ffffea0001ffffff] PMD -> [ffff880076e00000-ffff880078dfffff] on node 0 +[ 0.000000] Zone ranges: +[ 0.000000] DMA [mem 0x00001000-0x00ffffff] +[ 0.000000] DMA32 [mem 0x01000000-0xffffffff] +[ 0.000000] Normal empty +[ 0.000000] Movable zone start for each node +[ 0.000000] Early memory node ranges +[ 0.000000] node 0: [mem 0x00001000-0x0009dfff] +[ 0.000000] node 0: [mem 0x00100000-0x796a0fff] +[ 0.000000] node 0: [mem 0x796a7000-0x797b6fff] +[ 0.000000] node 0: [mem 0x7980f000-0x798c6fff] +[ 0.000000] node 0: [mem 0x79bff000-0x79bfffff] +[ 0.000000] On node 0 totalpages: 497671 +[ 0.000000] DMA zone: 64 pages used for memmap +[ 0.000000] DMA zone: 21 pages reserved +[ 0.000000] DMA zone: 3997 pages, LIFO batch:0 +[ 0.000000] DMA32 zone: 7728 pages used for memmap +[ 0.000000] DMA32 zone: 493674 pages, LIFO batch:31 +[ 0.000000] ACPI: PM-Timer IO Port: 0x1008 +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] disabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x03] disabled) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) +[ 0.000000] ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0]) +[ 0.000000] IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-23 +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) +[ 0.000000] ACPI: IRQ0 used by override. +[ 0.000000] ACPI: IRQ2 used by override. +[ 0.000000] ACPI: IRQ9 used by override. +[ 0.000000] Using ACPI (MADT) for SMP configuration information +[ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000 +[ 0.000000] smpboot: Allowing 4 CPUs, 2 hotplug CPUs +[ 0.000000] nr_irqs_gsi: 40 +[ 0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x0009f000-0x0009ffff] +[ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000dbfff] +[ 0.000000] PM: Registered nosave memory: [mem 0x000dc000-0x000fffff] +[ 0.000000] PM: Registered nosave memory: [mem 0x796a1000-0x796a6fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x797b7000-0x7980efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798c7000-0x798d1fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798d2000-0x798d4fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798d5000-0x798d8fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798d9000-0x798dcfff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798dd000-0x798dffff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798e0000-0x79906fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x79907000-0x79907fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x79908000-0x79b0efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x79b0f000-0x79b9efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x79b9f000-0x79bfefff] +[ 0.000000] e820: [mem 0x7c000000-0xdfffffff] available for PCI devices +[ 0.000000] Booting paravirtualized kernel on bare hardware +[ 0.000000] setup_percpu: NR_CPUS:256 nr_cpumask_bits:256 nr_cpu_ids:4 nr_node_ids:1 +[ 0.000000] PERCPU: Embedded 29 pages/cpu @ffff880079400000 s86848 r8192 d23744 u524288 +[ 0.000000] pcpu-alloc: s86848 r8192 d23744 u524288 alloc=1*2097152 +[ 0.000000] pcpu-alloc: [0] 0 1 2 3 +[ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 489858 +[ 0.000000] Policy zone: DMA32 +[ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-3.13.0-39-lowlatency root=UUID=097336a2-7389-4897-a7e8-1f43e91aae96 ro nomdmonddf nomdmonisw nomdmonddf nomdmonisw +[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.000000] Checking aperture... +[ 0.000000] No AGP bridge found +[ 0.000000] Calgary: detecting Calgary via BIOS EBDA area +[ 0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing! +[ 0.000000] Memory: 1917872K/1990684K available (7418K kernel code, 1135K rwdata, 3420K rodata, 1324K init, 1444K bss, 72812K reserved) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] RCU dyntick-idle grace-period acceleration is enabled. +[ 0.000000] Dump stacks of tasks blocking RCU-preempt GP. +[ 0.000000] RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=4. +[ 0.000000] Offload RCU callbacks from all CPUs +[ 0.000000] Offload RCU callbacks from CPUs: 0-3. +[ 0.000000] NR_IRQS:16640 nr_irqs:712 16 +[ 0.000000] Console: colour VGA+ 80x25 +[ 0.000000] console [tty0] enabled +[ 0.000000] allocated 8388608 bytes of page_cgroup +[ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups +[ 0.000000] hpet clockevent registered +[ 0.000000] tsc: Fast TSC calibration using PIT +[ 0.000000] tsc: Detected 2393.987 MHz processor +[ 0.001004] Calibrating delay loop (skipped), value calculated using timer frequency.. 4787.97 BogoMIPS (lpj=2393987) +[ 0.001099] pid_max: default: 32768 minimum: 301 +[ 0.001179] Security Framework initialized +[ 0.001251] AppArmor: AppArmor initialized +[ 0.001296] Yama: becoming mindful. +[ 0.001557] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes) +[ 0.002848] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes) +[ 0.003415] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.003468] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.003789] Initializing cgroup subsys memory +[ 0.003844] Initializing cgroup subsys devices +[ 0.003891] Initializing cgroup subsys freezer +[ 0.003939] Initializing cgroup subsys blkio +[ 0.003986] Initializing cgroup subsys bfqio +[ 0.004005] Initializing cgroup subsys perf_event +[ 0.004053] Initializing cgroup subsys hugetlb +[ 0.004120] Disabled fast string operations +[ 0.004170] CPU: Physical Processor ID: 0 +[ 0.004216] CPU: Processor Core ID: 0 +[ 0.004262] mce: CPU supports 6 MCE banks +[ 0.004312] CPU0: Thermal monitoring enabled (TM2) +[ 0.004366] Last level iTLB entries: 4KB 128, 2MB 4, 4MB 4 +[ 0.004366] Last level dTLB entries: 4KB 256, 2MB 0, 4MB 32 +[ 0.004366] tlb_flushall_shift: -1 +[ 0.004516] Freeing SMP alternatives memory: 24K (ffffffff81e68000 - ffffffff81e6e000) +[ 0.006138] ACPI: Core revision 20131115 +[ 0.012497] ACPI: All ACPI Tables successfully acquired +[ 0.013011] ftrace: allocating 28647 entries in 112 pages +[ 0.022461] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 +[ 0.032521] smpboot: CPU0: Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz (fam: 06, model: 17, stepping: 06) +[ 0.033000] Performance Events: PEBS fmt0+, 4-deep LBR, Core2 events, Intel PMU driver. +[ 0.033000] ... version: 2 +[ 0.033000] ... bit width: 40 +[ 0.033000] ... generic registers: 2 +[ 0.033000] ... value mask: 000000ffffffffff +[ 0.033000] ... max period: 000000007fffffff +[ 0.033000] ... fixed-purpose events: 3 +[ 0.033000] ... event mask: 0000000700000003 +[ 0.041071] x86: Booting SMP configuration: +[ 0.039030] Disabled fast string operations +[ 0.053119] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter. +[ 0.041119] .... node #0, CPUs: #1 +[ 0.053279] x86: Booted up 1 node, 2 CPUs +[ 0.053366] smpboot: Total of 2 processors activated (9575.94 BogoMIPS) +[ 0.054131] devtmpfs: initialized +[ 0.057653] EVM: security.selinux +[ 0.057699] EVM: security.SMACK64 +[ 0.057744] EVM: security.ima +[ 0.057788] EVM: security.capability +[ 0.058036] PM: Registering ACPI NVS region [mem 0x798c7000-0x798d1fff] (45056 bytes) +[ 0.058098] PM: Registering ACPI NVS region [mem 0x798d9000-0x798dcfff] (16384 bytes) +[ 0.058098] PM: Registering ACPI NVS region [mem 0x798e0000-0x79906fff] (159744 bytes) +[ 0.058098] PM: Registering ACPI NVS region [mem 0x79b0f000-0x79b9efff] (589824 bytes) +[ 0.059097] pinctrl core: initialized pinctrl subsystem +[ 0.059220] regulator-dummy: no parameters +[ 0.059299] RTC time: 6:48:55, date: 08/30/15 +[ 0.059386] NET: Registered protocol family 16 +[ 0.059557] cpuidle: using governor ladder +[ 0.059604] cpuidle: using governor menu +[ 0.059697] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it +[ 0.059758] ACPI: bus type PCI registered +[ 0.059805] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 +[ 0.059912] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xe0000000-0xe3ffffff] (base 0xe0000000) +[ 0.059976] PCI: MMCONFIG at [mem 0xe0000000-0xe3ffffff] reserved in E820 +[ 0.067547] PCI: Using configuration type 1 for base access +[ 0.067698] mtrr: your CPUs had inconsistent variable MTRR settings +[ 0.067747] mtrr: probably your BIOS does not setup all CPUs. +[ 0.067795] mtrr: corrected configuration. +[ 0.069011] bio: create slab <bio-0> at 0 +[ 0.069081] ACPI: Added _OSI(Module Device) +[ 0.069129] ACPI: Added _OSI(Processor Device) +[ 0.069176] ACPI: Added _OSI(3.0 _SCP Extensions) +[ 0.069176] ACPI: Added _OSI(Processor Aggregator Device) +[ 0.071018] ACPI : EC: EC description table is found, configuring boot EC +[ 0.075408] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored +[ 0.082370] ACPI: SSDT 00000000798d7c20 0002C8 (v01 PmRef Cpu0Ist 00003000 INTL 20050624) +[ 0.083085] ACPI: Dynamic OEM Table Load: +[ 0.083193] ACPI: SSDT (null) 0002C8 (v01 PmRef Cpu0Ist 00003000 INTL 20050624) +[ 0.083433] ACPI: SSDT 00000000798d5020 00087A (v01 PmRef Cpu0Cst 00003001 INTL 20050624) +[ 0.083951] ACPI: Dynamic OEM Table Load: +[ 0.084045] ACPI: SSDT (null) 00087A (v01 PmRef Cpu0Cst 00003001 INTL 20050624) +[ 0.087198] ACPI: SSDT 00000000798d6ca0 0001CF (v01 PmRef ApIst 00003000 INTL 20050624) +[ 0.088064] ACPI: Dynamic OEM Table Load: +[ 0.088171] ACPI: SSDT (null) 0001CF (v01 PmRef ApIst 00003000 INTL 20050624) +[ 0.089066] ACPI: SSDT 00000000798d6f20 00008D (v01 PmRef ApCst 00003000 INTL 20050624) +[ 0.089562] ACPI: Dynamic OEM Table Load: +[ 0.090005] ACPI: SSDT (null) 00008D (v01 PmRef ApCst 00003000 INTL 20050624) +[ 0.092138] ACPI: Interpreter enabled +[ 0.092190] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20131115/hwxface-580) +[ 0.092315] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20131115/hwxface-580) +[ 0.092449] ACPI: (supports S0 S3 S4 S5) +[ 0.092496] ACPI: Using IOAPIC for interrupt routing +[ 0.092565] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug +[ 0.093465] ACPI: ACPI Dock Station Driver: 3 docks/bays found +[ 0.103102] ACPI: Power Resource [PUBS] (on) +[ 0.108348] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.108789] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.109225] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.109664] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.110091] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.110528] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.110966] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.111407] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.111809] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff]) +[ 0.111863] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] +[ 0.112338] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability] +[ 0.112429] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge +[ 0.112651] PCI host bridge to bus 0000:00 +[ 0.112699] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.112748] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7] +[ 0.112797] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff] +[ 0.112847] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff] +[ 0.112897] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff] +[ 0.112947] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff] +[ 0.112997] pci_bus 0000:00: root bus resource [mem 0x7c000000-0xfebfffff] +[ 0.113013] pci 0000:00:00.0: [8086:2a40] type 00 class 0x060000 +[ 0.113033] DMAR: Forcing write-buffer flush capability +[ 0.113081] DMAR: Disabling IOMMU for graphics on this chipset +[ 0.113196] pci 0000:00:02.0: [8086:2a42] type 00 class 0x030000 +[ 0.113209] pci 0000:00:02.0: reg 0x10: [mem 0xf2000000-0xf23fffff 64bit] +[ 0.113216] pci 0000:00:02.0: reg 0x18: [mem 0xd0000000-0xdfffffff 64bit pref] +[ 0.113222] pci 0000:00:02.0: reg 0x20: [io 0x1800-0x1807] +[ 0.113301] pci 0000:00:02.1: [8086:2a43] type 00 class 0x038000 +[ 0.113311] pci 0000:00:02.1: reg 0x10: [mem 0xf2400000-0xf24fffff 64bit] +[ 0.113403] pci 0000:00:03.0: [8086:2a44] type 00 class 0x078000 +[ 0.113419] pci 0000:00:03.0: reg 0x10: [mem 0xf2826800-0xf282680f 64bit] +[ 0.113469] pci 0000:00:03.0: PME# supported from D0 D3hot D3cold +[ 0.113534] pci 0000:00:03.3: [8086:2a47] type 00 class 0x070002 +[ 0.113548] pci 0000:00:03.3: reg 0x10: [io 0x1830-0x1837] +[ 0.113555] pci 0000:00:03.3: reg 0x14: [mem 0xf2624000-0xf2624fff] +[ 0.113704] pci 0000:00:19.0: [8086:10f5] type 00 class 0x020000 +[ 0.113729] pci 0000:00:19.0: reg 0x10: [mem 0xf2600000-0xf261ffff] +[ 0.113740] pci 0000:00:19.0: reg 0x14: [mem 0xf2625000-0xf2625fff] +[ 0.113751] pci 0000:00:19.0: reg 0x18: [io 0x1840-0x185f] +[ 0.113839] pci 0000:00:19.0: PME# supported from D0 D3hot D3cold +[ 0.113882] pci 0000:00:19.0: System wakeup disabled by ACPI +[ 0.114019] pci 0000:00:1a.0: [8086:2937] type 00 class 0x0c0300 +[ 0.114075] pci 0000:00:1a.0: reg 0x20: [io 0x1860-0x187f] +[ 0.114173] pci 0000:00:1a.0: System wakeup disabled by ACPI +[ 0.114259] pci 0000:00:1a.1: [8086:2938] type 00 class 0x0c0300 +[ 0.114315] pci 0000:00:1a.1: reg 0x20: [io 0x1880-0x189f] +[ 0.114427] pci 0000:00:1a.2: [8086:2939] type 00 class 0x0c0300 +[ 0.114483] pci 0000:00:1a.2: reg 0x20: [io 0x18a0-0x18bf] +[ 0.114579] pci 0000:00:1a.2: System wakeup disabled by ACPI +[ 0.114674] pci 0000:00:1a.7: [8086:293c] type 00 class 0x0c0320 +[ 0.114700] pci 0000:00:1a.7: reg 0x10: [mem 0xf2826c00-0xf2826fff] +[ 0.114810] pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold +[ 0.114854] pci 0000:00:1a.7: System wakeup disabled by ACPI +[ 0.114944] pci 0000:00:1b.0: [8086:293e] type 00 class 0x040300 +[ 0.114964] pci 0000:00:1b.0: reg 0x10: [mem 0xf2620000-0xf2623fff 64bit] +[ 0.115066] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold +[ 0.115120] pci 0000:00:1b.0: System wakeup disabled by ACPI +[ 0.115204] pci 0000:00:1c.0: [8086:2940] type 01 class 0x060400 +[ 0.115305] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold +[ 0.115352] pci 0000:00:1c.0: System wakeup disabled by ACPI +[ 0.115436] pci 0000:00:1c.1: [8086:2942] type 01 class 0x060400 +[ 0.115536] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold +[ 0.115584] pci 0000:00:1c.1: System wakeup disabled by ACPI +[ 0.115669] pci 0000:00:1c.3: [8086:2946] type 01 class 0x060400 +[ 0.115769] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold +[ 0.115816] pci 0000:00:1c.3: System wakeup disabled by ACPI +[ 0.115906] pci 0000:00:1d.0: [8086:2934] type 00 class 0x0c0300 +[ 0.115962] pci 0000:00:1d.0: reg 0x20: [io 0x18c0-0x18df] +[ 0.116067] pci 0000:00:1d.0: System wakeup disabled by ACPI +[ 0.116153] pci 0000:00:1d.1: [8086:2935] type 00 class 0x0c0300 +[ 0.116209] pci 0000:00:1d.1: reg 0x20: [io 0x18e0-0x18ff] +[ 0.116320] pci 0000:00:1d.2: [8086:2936] type 00 class 0x0c0300 +[ 0.116376] pci 0000:00:1d.2: reg 0x20: [io 0x1c00-0x1c1f] +[ 0.116498] pci 0000:00:1d.7: [8086:293a] type 00 class 0x0c0320 +[ 0.116523] pci 0000:00:1d.7: reg 0x10: [mem 0xf2827000-0xf28273ff] +[ 0.116632] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold +[ 0.116678] pci 0000:00:1d.7: System wakeup disabled by ACPI +[ 0.116764] pci 0000:00:1e.0: [8086:2448] type 01 class 0x060401 +[ 0.116898] pci 0000:00:1f.0: [8086:2917] type 00 class 0x060100 +[ 0.117115] pci 0000:00:1f.2: [8086:2929] type 00 class 0x010601 +[ 0.117142] pci 0000:00:1f.2: reg 0x10: [io 0x1c48-0x1c4f] +[ 0.117153] pci 0000:00:1f.2: reg 0x14: [io 0x183c-0x183f] +[ 0.117164] pci 0000:00:1f.2: reg 0x18: [io 0x1c40-0x1c47] +[ 0.117175] pci 0000:00:1f.2: reg 0x1c: [io 0x1838-0x183b] +[ 0.117186] pci 0000:00:1f.2: reg 0x20: [io 0x1c20-0x1c3f] +[ 0.117197] pci 0000:00:1f.2: reg 0x24: [mem 0xf2826000-0xf28267ff] +[ 0.117265] pci 0000:00:1f.2: PME# supported from D3hot +[ 0.117338] pci 0000:00:1f.3: [8086:2930] type 00 class 0x0c0500 +[ 0.117359] pci 0000:00:1f.3: reg 0x10: [mem 0xf2827400-0xf28274ff 64bit] +[ 0.117388] pci 0000:00:1f.3: reg 0x20: [io 0x1c60-0x1c7f] +[ 0.117535] pci 0000:00:1c.0: PCI bridge to [bus 02] +[ 0.117690] pci 0000:03:00.0: [8086:4237] type 00 class 0x028000 +[ 0.117730] pci 0000:03:00.0: reg 0x10: [mem 0xf2500000-0xf2501fff 64bit] +[ 0.117924] pci 0000:03:00.0: PME# supported from D0 D3hot D3cold +[ 0.119021] pci 0000:00:1c.1: PCI bridge to [bus 03] +[ 0.119076] pci 0000:00:1c.1: bridge window [mem 0xf2500000-0xf25fffff] +[ 0.119155] pci 0000:00:1c.3: PCI bridge to [bus 05-0c] +[ 0.119207] pci 0000:00:1c.3: bridge window [io 0x2000-0x2fff] +[ 0.119211] pci 0000:00:1c.3: bridge window [mem 0xf0000000-0xf1ffffff] +[ 0.119219] pci 0000:00:1c.3: bridge window [mem 0xf2900000-0xf29fffff 64bit pref] +[ 0.119318] pci 0000:00:1e.0: PCI bridge to [bus 0d] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [mem 0x7c000000-0xfebfffff] (subtractive decode) +[ 0.119318] acpi PNP0A08:00: Disabling ASPM (FADT indicates it is unsupported) +[ 0.121307] ACPI: Enabled 3 GPEs in block 00 to 3F +[ 0.121425] ACPI: \_SB_.PCI0: notify handler is installed +[ 0.121469] Found 1 acpi root devices +[ 0.121543] ACPI : EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62 +[ 0.121671] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none +[ 0.121671] vgaarb: loaded +[ 0.121671] vgaarb: bridge control possible 0000:00:02.0 +[ 0.122188] SCSI subsystem initialized +[ 0.122251] libata version 3.00 loaded. +[ 0.122251] ACPI: bus type USB registered +[ 0.122251] usbcore: registered new interface driver usbfs +[ 0.122251] usbcore: registered new interface driver hub +[ 0.122251] usbcore: registered new device driver usb +[ 0.123053] PCI: Using ACPI for IRQ routing +[ 0.125422] PCI: pci_cache_line_size set to 64 bytes +[ 0.125494] e820: reserve RAM buffer [mem 0x0009ec00-0x0009ffff] +[ 0.125496] e820: reserve RAM buffer [mem 0x796a1000-0x7bffffff] +[ 0.125498] e820: reserve RAM buffer [mem 0x797b7000-0x7bffffff] +[ 0.125500] e820: reserve RAM buffer [mem 0x798c7000-0x7bffffff] +[ 0.125503] e820: reserve RAM buffer [mem 0x79c00000-0x7bffffff] +[ 0.125588] NetLabel: Initializing +[ 0.125634] NetLabel: domain hash size = 128 +[ 0.125680] NetLabel: protocols = UNLABELED CIPSOv4 +[ 0.125737] NetLabel: unlabeled traffic allowed by default +[ 0.125795] HPET: 4 timers in total, 0 timers will be used for per-cpu timer +[ 0.125795] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0 +[ 0.126107] hpet0: 4 comparators, 64-bit 14.318180 MHz counter +[ 0.128030] Switched to clocksource hpet +[ 0.134288] AppArmor: AppArmor Filesystem Enabled +[ 0.134388] pnp: PnP ACPI init +[ 0.134450] ACPI: bus type PNP registered +[ 0.154864] system 00:00: [mem 0x00000000-0x0009ffff] could not be reserved +[ 0.154916] system 00:00: [mem 0x000c0000-0x000c3fff] could not be reserved +[ 0.154967] system 00:00: [mem 0x000c4000-0x000c7fff] could not be reserved +[ 0.155029] system 00:00: [mem 0x000c8000-0x000cbfff] has been reserved +[ 0.155080] system 00:00: [mem 0x000cc000-0x000cffff] has been reserved +[ 0.155130] system 00:00: [mem 0x000d0000-0x000d3fff] could not be reserved +[ 0.155181] system 00:00: [mem 0x000dc000-0x000dffff] could not be reserved +[ 0.155231] system 00:00: [mem 0x000e0000-0x000e3fff] could not be reserved +[ 0.155282] system 00:00: [mem 0x000e4000-0x000e7fff] could not be reserved +[ 0.155332] system 00:00: [mem 0x000e8000-0x000ebfff] could not be reserved +[ 0.155383] system 00:00: [mem 0x000ec000-0x000effff] could not be reserved +[ 0.155433] system 00:00: [mem 0x000f0000-0x000fffff] could not be reserved +[ 0.155484] system 00:00: [mem 0x00100000-0x7bffffff] could not be reserved +[ 0.155535] system 00:00: [mem 0xfec00000-0xfed3ffff] could not be reserved +[ 0.155585] system 00:00: [mem 0xfed4c000-0xffffffff] could not be reserved +[ 0.155638] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active) +[ 0.175625] system 00:01: [io 0x1000-0x107f] could not be reserved +[ 0.175676] system 00:01: [io 0x1180-0x11ff] has been reserved +[ 0.175726] system 00:01: [io 0x0800-0x080f] has been reserved +[ 0.175775] system 00:01: [io 0x15e0-0x15ef] has been reserved +[ 0.175825] system 00:01: [io 0x1600-0x167f] has been reserved +[ 0.175874] system 00:01: [io 0x1680-0x169f] has been reserved +[ 0.175923] system 00:01: [mem 0xe0000000-0xefffffff] has been reserved +[ 0.175974] system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved +[ 0.176035] system 00:01: [mem 0xfed10000-0xfed13fff] has been reserved +[ 0.176086] system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved +[ 0.176136] system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved +[ 0.176187] system 00:01: [mem 0xfed45000-0xfed4bfff] has been reserved +[ 0.176238] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active) +[ 0.176291] pnp 00:02: Plug and Play ACPI device, IDs PNP0103 (active) +[ 0.176300] pnp 00:03: [dma 4] +[ 0.176318] pnp 00:03: Plug and Play ACPI device, IDs PNP0200 (active) +[ 0.176344] pnp 00:04: Plug and Play ACPI device, IDs PNP0800 (active) +[ 0.176381] pnp 00:05: Plug and Play ACPI device, IDs PNP0c04 (active) +[ 0.176413] pnp 00:06: Plug and Play ACPI device, IDs PNP0b00 (active) +[ 0.176441] pnp 00:07: Plug and Play ACPI device, IDs PNP0303 (active) +[ 0.176472] pnp 00:08: Plug and Play ACPI device, IDs IBM3780 PNP0f13 (active) +[ 0.196442] pnp 00:09: Plug and Play ACPI device, IDs PNP0c31 (active) +[ 0.196872] pnp: PnP ACPI: found 10 devices +[ 0.196919] ACPI: bus type PNP unregistered +[ 0.203744] pci 0000:00:1c.0: bridge window [io 0x1000-0x0fff] to [bus 02] add_size 1000 +[ 0.203748] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 02] add_size 200000 +[ 0.203751] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 02] add_size 200000 +[ 0.203761] pci 0000:00:1c.1: bridge window [io 0x1000-0x0fff] to [bus 03] add_size 1000 +[ 0.203764] pci 0000:00:1c.1: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 03] add_size 200000 +[ 0.203790] pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x000fffff] get_res_add_size add_size 200000 +[ 0.203792] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 +[ 0.203794] pci 0000:00:1c.1: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 +[ 0.203797] pci 0000:00:1c.0: res[13]=[io 0x1000-0x0fff] get_res_add_size add_size 1000 +[ 0.203799] pci 0000:00:1c.1: res[13]=[io 0x1000-0x0fff] get_res_add_size add_size 1000 +[ 0.203803] pci 0000:00:1c.0: BAR 14: assigned [mem 0x7c000000-0x7c1fffff] +[ 0.203855] pci 0000:00:1c.0: BAR 15: assigned [mem 0x7c200000-0x7c3fffff 64bit pref] +[ 0.203917] pci 0000:00:1c.1: BAR 15: assigned [mem 0x7c400000-0x7c5fffff 64bit pref] +[ 0.203979] pci 0000:00:1c.0: BAR 13: assigned [io 0x3000-0x3fff] +[ 0.204040] pci 0000:00:1c.1: BAR 13: assigned [io 0x4000-0x4fff] +[ 0.204091] pci 0000:00:1c.0: PCI bridge to [bus 02] +[ 0.204141] pci 0000:00:1c.0: bridge window [io 0x3000-0x3fff] +[ 0.204194] pci 0000:00:1c.0: bridge window [mem 0x7c000000-0x7c1fffff] +[ 0.204247] pci 0000:00:1c.0: bridge window [mem 0x7c200000-0x7c3fffff 64bit pref] +[ 0.204313] pci 0000:00:1c.1: PCI bridge to [bus 03] +[ 0.204362] pci 0000:00:1c.1: bridge window [io 0x4000-0x4fff] +[ 0.204415] pci 0000:00:1c.1: bridge window [mem 0xf2500000-0xf25fffff] +[ 0.204468] pci 0000:00:1c.1: bridge window [mem 0x7c400000-0x7c5fffff 64bit pref] +[ 0.204534] pci 0000:00:1c.3: PCI bridge to [bus 05-0c] +[ 0.204583] pci 0000:00:1c.3: bridge window [io 0x2000-0x2fff] +[ 0.204636] pci 0000:00:1c.3: bridge window [mem 0xf0000000-0xf1ffffff] +[ 0.204689] pci 0000:00:1c.3: bridge window [mem 0xf2900000-0xf29fffff 64bit pref] +[ 0.204755] pci 0000:00:1e.0: PCI bridge to [bus 0d] +[ 0.204815] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7] +[ 0.204817] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff] +[ 0.204819] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.204821] pci_bus 0000:00: resource 7 [mem 0x000d4000-0x000d7fff] +[ 0.204823] pci_bus 0000:00: resource 8 [mem 0x000d8000-0x000dbfff] +[ 0.204824] pci_bus 0000:00: resource 9 [mem 0x7c000000-0xfebfffff] +[ 0.204827] pci_bus 0000:02: resource 0 [io 0x3000-0x3fff] +[ 0.204828] pci_bus 0000:02: resource 1 [mem 0x7c000000-0x7c1fffff] +[ 0.204830] pci_bus 0000:02: resource 2 [mem 0x7c200000-0x7c3fffff 64bit pref] +[ 0.204832] pci_bus 0000:03: resource 0 [io 0x4000-0x4fff] +[ 0.204834] pci_bus 0000:03: resource 1 [mem 0xf2500000-0xf25fffff] +[ 0.204836] pci_bus 0000:03: resource 2 [mem 0x7c400000-0x7c5fffff 64bit pref] +[ 0.204838] pci_bus 0000:05: resource 0 [io 0x2000-0x2fff] +[ 0.204840] pci_bus 0000:05: resource 1 [mem 0xf0000000-0xf1ffffff] +[ 0.204842] pci_bus 0000:05: resource 2 [mem 0xf2900000-0xf29fffff 64bit pref] +[ 0.204844] pci_bus 0000:0d: resource 4 [io 0x0000-0x0cf7] +[ 0.204846] pci_bus 0000:0d: resource 5 [io 0x0d00-0xffff] +[ 0.204848] pci_bus 0000:0d: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.204850] pci_bus 0000:0d: resource 7 [mem 0x000d4000-0x000d7fff] +[ 0.204852] pci_bus 0000:0d: resource 8 [mem 0x000d8000-0x000dbfff] +[ 0.204853] pci_bus 0000:0d: resource 9 [mem 0x7c000000-0xfebfffff] +[ 0.204887] NET: Registered protocol family 2 +[ 0.205147] TCP established hash table entries: 16384 (order: 5, 131072 bytes) +[ 0.205279] TCP bind hash table entries: 16384 (order: 6, 262144 bytes) +[ 0.205428] TCP: Hash tables configured (established 16384 bind 16384) +[ 0.205529] TCP: reno registered +[ 0.205578] UDP hash table entries: 1024 (order: 3, 32768 bytes) +[ 0.205641] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes) +[ 0.205757] NET: Registered protocol family 1 +[ 0.205816] pci 0000:00:02.0: Boot video device +[ 0.206766] PCI: CLS 64 bytes, default 64 +[ 0.206828] Trying to unpack rootfs image as initramfs... +[ 0.654139] Freeing initrd memory: 22968K (ffff880035314000 - ffff880036982000) +[ 0.654271] Simple Boot Flag at 0x35 set to 0x1 +[ 0.654472] microcode: CPU0 sig=0x10676, pf=0x80, revision=0x60c +[ 0.654527] microcode: CPU1 sig=0x10676, pf=0x80, revision=0x60c +[ 0.654675] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba +[ 0.654738] Scanning for low memory corruption every 60 seconds +[ 0.655070] Initialise system trusted keyring +[ 0.655166] audit: initializing netlink socket (disabled) +[ 0.655228] type=2000 audit(1440917335.654:1): initialized +[ 0.677686] HugeTLB registered 2 MB page size, pre-allocated 0 pages +[ 0.678936] zbud: loaded +[ 0.679129] VFS: Disk quotas dquot_6.5.2 +[ 0.679222] Dquot-cache hash table entries: 512 (order 0, 4096 bytes) +[ 0.679760] fuse init (API version 7.22) +[ 0.679888] msgmni has been set to 3790 +[ 0.679992] Key type big_key registered +[ 0.680581] Key type asymmetric registered +[ 0.680630] Asymmetric key parser 'x509' registered +[ 0.680708] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) +[ 0.680805] io scheduler noop registered +[ 0.680854] io scheduler deadline registered +[ 0.680926] io scheduler cfq registered +[ 0.680975] io scheduler bfq registered (default) +[ 0.681033] BFQ I/O-scheduler version: v7r5 +[ 0.681277] pcieport 0000:00:1c.0: irq 40 for MSI/MSI-X +[ 0.681485] pcieport 0000:00:1c.1: irq 41 for MSI/MSI-X +[ 0.681648] pcieport 0000:00:1c.3: irq 42 for MSI/MSI-X +[ 0.681801] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt +[ 0.681856] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded +[ 0.681914] pcieport 0000:00:1c.1: Signaling PME through PCIe PME interrupt +[ 0.681967] pci 0000:03:00.0: Signaling PME through PCIe PME interrupt +[ 0.682032] pcie_pme 0000:00:1c.1:pcie01: service driver pcie_pme loaded +[ 0.682086] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt +[ 0.682140] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded +[ 0.682156] pci_hotplug: PCI Hot Plug PCI Core version: 0.5 +[ 0.682263] pciehp 0000:00:1c.0:pcie04: HPC vendor_id 8086 device_id 2940 ss_vid 17aa ss_did 20f3 +[ 0.682387] pciehp 0000:00:1c.0:pcie04: service driver pciehp loaded +[ 0.682402] pciehp 0000:00:1c.1:pcie04: HPC vendor_id 8086 device_id 2942 ss_vid 17aa ss_did 20f3 +[ 0.682519] pciehp 0000:00:1c.1:pcie04: service driver pciehp loaded +[ 0.682533] pciehp 0000:00:1c.3:pcie04: HPC vendor_id 8086 device_id 2946 ss_vid 17aa ss_did 20f3 +[ 0.682653] pciehp 0000:00:1c.3:pcie04: service driver pciehp loaded +[ 0.682659] pciehp: PCI Express Hot Plug Controller Driver version: 0.4 +[ 0.682755] intel_idle: does not run on family 6 model 23 +[ 0.682764] ipmi message handler version 39.2 +[ 0.682977] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.683222] ACPI: AC Adapter [AC] (on-line) +[ 0.683362] input: Lid Switch as /devices/LNXSYSTM:00/device:00/PNP0C0D:00/input/input0 +[ 0.683702] ACPI: Lid Switch [LID] +[ 0.683781] input: Sleep Button as /devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1 +[ 0.683844] ACPI: Sleep Button [SLPB] +[ 0.683929] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 +[ 0.683991] ACPI: Power Button [PWRF] +[ 0.685432] Monitor-Mwait will be used to enter C-1 state +[ 0.685438] Monitor-Mwait will be used to enter C-2 state +[ 0.685441] Monitor-Mwait will be used to enter C-3 state +[ 0.685444] tsc: Marking TSC unstable due to TSC halts in idle +[ 0.685502] ACPI: acpi_idle registered with cpuidle +[ 0.687967] thermal LNXTHERM:00: registered as thermal_zone0 +[ 0.688045] ACPI: Thermal Zone [THM0] (56 C) +[ 0.689472] thermal LNXTHERM:01: registered as thermal_zone1 +[ 0.689527] ACPI: Thermal Zone [THM1] (55 C) +[ 0.689603] GHES: HEST is not enabled! +[ 0.689793] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.689861] ACPI: Battery Slot [BAT0] (battery absent) +[ 0.689943] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled +[ 0.712208] 0000:00:03.3: ttyS4 at I/O 0x1830 (irq = 17, base_baud = 115200) is a 16550A +[ 0.712544] Linux agpgart interface v0.103 +[ 0.712661] agpgart-intel 0000:00:00.0: Intel GM45 Chipset +[ 0.712794] agpgart-intel 0000:00:00.0: detected gtt size: 2097152K total, 262144K mappable +[ 0.713914] agpgart-intel 0000:00:00.0: detected 32768K stolen memory +[ 0.714136] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000 +[ 0.720051] tpm_tis 00:09: 1.2 TPM (device-id 0x1020, rev-id 6) +[ 0.720104] tpm_tis 00:09: Intel iTPM workaround enabled +[ 0.792118] tpm_tis 00:09: TPM is disabled/deactivated (0x6) +[ 0.793802] brd: module loaded +[ 0.794673] loop: module loaded +[ 0.795114] libphy: Fixed MDIO Bus: probed +[ 0.795245] tun: Universal TUN/TAP device driver, 1.6 +[ 0.795292] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> +[ 0.795389] PPP generic driver version 2.4.2 +[ 0.795505] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver +[ 0.795557] ehci-pci: EHCI PCI platform driver +[ 0.795729] ehci-pci 0000:00:1a.7: EHCI Host Controller +[ 0.795781] ehci-pci 0000:00:1a.7: new USB bus registered, assigned bus number 1 +[ 0.795855] ehci-pci 0000:00:1a.7: debug port 1 +[ 0.799819] ehci-pci 0000:00:1a.7: cache line size of 64 is not supported +[ 0.799914] ehci-pci 0000:00:1a.7: irq 23, io mem 0xf2826c00 +[ 0.806055] ehci-pci 0000:00:1a.7: USB 2.0 started, EHCI 1.00 +[ 0.806198] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.806249] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.806309] usb usb1: Product: EHCI Host Controller +[ 0.806356] usb usb1: Manufacturer: Linux 3.13.0-39-lowlatency ehci_hcd +[ 0.806406] usb usb1: SerialNumber: 0000:00:1a.7 +[ 0.806572] hub 1-0:1.0: USB hub found +[ 0.806625] hub 1-0:1.0: 6 ports detected +[ 0.806964] ehci-pci 0000:00:1d.7: EHCI Host Controller +[ 0.807027] ehci-pci 0000:00:1d.7: new USB bus registered, assigned bus number 2 +[ 0.807102] ehci-pci 0000:00:1d.7: debug port 1 +[ 0.811047] ehci-pci 0000:00:1d.7: cache line size of 64 is not supported +[ 0.811128] ehci-pci 0000:00:1d.7: irq 19, io mem 0xf2827000 +[ 0.817124] ehci-pci 0000:00:1d.7: USB 2.0 started, EHCI 1.00 +[ 0.817761] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.817811] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.817871] usb usb2: Product: EHCI Host Controller +[ 0.817919] usb usb2: Manufacturer: Linux 3.13.0-39-lowlatency ehci_hcd +[ 0.817968] usb usb2: SerialNumber: 0000:00:1d.7 +[ 0.818141] hub 2-0:1.0: USB hub found +[ 0.818192] hub 2-0:1.0: 6 ports detected +[ 0.818460] ehci-platform: EHCI generic platform driver +[ 0.818515] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver +[ 0.818986] ohci-pci: OHCI PCI platform driver +[ 0.819056] ohci-platform: OHCI generic platform driver +[ 0.819118] uhci_hcd: USB Universal Host Controller Interface driver +[ 0.819235] uhci_hcd 0000:00:1a.0: UHCI Host Controller +[ 0.819286] uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 3 +[ 0.819442] uhci_hcd 0000:00:1a.0: irq 20, io base 0x00001860 +[ 0.819539] usb usb3: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.819590] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.819651] usb usb3: Product: UHCI Host Controller +[ 0.819698] usb usb3: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.819748] usb usb3: SerialNumber: 0000:00:1a.0 +[ 0.819903] hub 3-0:1.0: USB hub found +[ 0.819962] hub 3-0:1.0: 2 ports detected +[ 0.820186] uhci_hcd 0000:00:1a.1: UHCI Host Controller +[ 0.820237] uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4 +[ 0.820407] uhci_hcd 0000:00:1a.1: irq 21, io base 0x00001880 +[ 0.820506] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.820557] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.820617] usb usb4: Product: UHCI Host Controller +[ 0.820665] usb usb4: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.820714] usb usb4: SerialNumber: 0000:00:1a.1 +[ 0.820868] hub 4-0:1.0: USB hub found +[ 0.820930] hub 4-0:1.0: 2 ports detected +[ 0.821160] uhci_hcd 0000:00:1a.2: UHCI Host Controller +[ 0.821212] uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5 +[ 0.821367] uhci_hcd 0000:00:1a.2: irq 22, io base 0x000018a0 +[ 0.821465] usb usb5: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.821516] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.821577] usb usb5: Product: UHCI Host Controller +[ 0.821624] usb usb5: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.821674] usb usb5: SerialNumber: 0000:00:1a.2 +[ 0.821836] hub 5-0:1.0: USB hub found +[ 0.821893] hub 5-0:1.0: 2 ports detected +[ 0.822114] uhci_hcd 0000:00:1d.0: UHCI Host Controller +[ 0.822166] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6 +[ 0.822323] uhci_hcd 0000:00:1d.0: irq 16, io base 0x000018c0 +[ 0.822435] usb usb6: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.822486] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.822552] usb usb6: Product: UHCI Host Controller +[ 0.822599] usb usb6: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.822649] usb usb6: SerialNumber: 0000:00:1d.0 +[ 0.822816] hub 6-0:1.0: USB hub found +[ 0.822867] hub 6-0:1.0: 2 ports detected +[ 0.823088] uhci_hcd 0000:00:1d.1: UHCI Host Controller +[ 0.823139] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7 +[ 0.823297] uhci_hcd 0000:00:1d.1: irq 17, io base 0x000018e0 +[ 0.823398] usb usb7: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.823449] usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.823509] usb usb7: Product: UHCI Host Controller +[ 0.823557] usb usb7: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.823607] usb usb7: SerialNumber: 0000:00:1d.1 +[ 0.823765] hub 7-0:1.0: USB hub found +[ 0.823816] hub 7-0:1.0: 2 ports detected +[ 0.824045] uhci_hcd 0000:00:1d.2: UHCI Host Controller +[ 0.824097] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8 +[ 0.824267] uhci_hcd 0000:00:1d.2: irq 18, io base 0x00001c00 +[ 0.824365] usb usb8: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.824415] usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.824476] usb usb8: Product: UHCI Host Controller +[ 0.824524] usb usb8: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.824573] usb usb8: SerialNumber: 0000:00:1d.2 +[ 0.824732] hub 8-0:1.0: USB hub found +[ 0.824784] hub 8-0:1.0: 2 ports detected +[ 0.824974] i8042: PNP: PS/2 Controller [PNP0303:KBD,PNP0f13:MOU] at 0x60,0x64 irq 1,12 +[ 0.835273] serio: i8042 KBD port at 0x60,0x64 irq 1 +[ 0.835347] serio: i8042 AUX port at 0x60,0x64 irq 12 +[ 0.835524] mousedev: PS/2 mouse device common for all mice +[ 0.835806] rtc_cmos 00:06: RTC can wake from S4 +[ 0.835996] rtc_cmos 00:06: rtc core: registered rtc_cmos as rtc0 +[ 0.836163] rtc_cmos 00:06: alarms up to one month, y3k, 114 bytes nvram, hpet irqs +[ 0.836291] device-mapper: uevent: version 1.0.3 +[ 0.836409] device-mapper: ioctl: 4.27.0-ioctl (2013-10-30) initialised: dm-devel@redhat.com +[ 0.836476] ledtrig-cpu: registered to indicate activity on CPUs +[ 0.836624] TCP: cubic registered +[ 0.836776] NET: Registered protocol family 10 +[ 0.837000] NET: Registered protocol family 17 +[ 0.837068] Key type dns_resolver registered +[ 0.837424] Loading compiled-in X.509 certificates +[ 0.838592] Loaded X.509 cert 'Magrathea: Glacier signing key: a7171335f18ca6131c1947ca87d46fb662317fa6' +[ 0.838684] registered taskstats version 1 +[ 0.841129] Key type trusted registered +[ 0.843261] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3 +[ 0.843344] Key type encrypted registered +[ 0.845402] AppArmor: AppArmor sha1 policy hashing enabled +[ 0.863122] tpm_tis 00:09: A TPM error (6) occurred attempting to read a pcr value +[ 0.863186] IMA: No TPM chip found, activating TPM-bypass! +[ 0.863533] regulator-dummy: disabling +[ 0.863620] Magic number: 11:688:823 +[ 0.863809] rtc_cmos 00:06: setting system clock to 2015-08-30 06:48:56 UTC (1440917336) +[ 0.866119] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found +[ 0.866172] EDD information not available. +[ 0.866304] PM: Hibernation image not present or could not be loaded. +[ 0.868348] Freeing unused kernel memory: 1324K (ffffffff81d1d000 - ffffffff81e68000) +[ 0.868413] Write protecting the kernel read-only data: 12288k +[ 0.872016] Freeing unused kernel memory: 764K (ffff880001741000 - ffff880001800000) +[ 0.875110] Freeing unused kernel memory: 676K (ffff880001b57000 - ffff880001c00000) +[ 0.894972] systemd-udevd[126]: starting version 204 +[ 0.928980] pps_core: LinuxPPS API ver. 1 registered +[ 0.930015] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> +[ 0.934247] PTP clock support registered +[ 0.940925] [drm] Initialized drm 1.1.0 20060810 +[ 0.948317] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k +[ 0.948333] wmi: Mapper loaded +[ 0.949020] e1000e: Copyright(c) 1999 - 2013 Intel Corporation. +[ 0.949310] e1000e 0000:00:19.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode +[ 0.949407] e1000e 0000:00:19.0: irq 43 for MSI/MSI-X +[ 1.143351] e1000e 0000:00:19.0 eth0: (PCI Express:2.5GT/s:Width x1) 00:1f:16:0b:4d:8c +[ 1.143422] e1000e 0000:00:19.0 eth0: Intel(R) PRO/1000 Network Connection +[ 1.143503] e1000e 0000:00:19.0 eth0: MAC: 7, PHY: 8, PBA No: 1008FF-0FF +[ 1.143581] ahci 0000:00:1f.2: version 3.0 +[ 1.143759] ahci 0000:00:1f.2: irq 44 for MSI/MSI-X +[ 1.143807] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled +[ 1.143886] ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 4 ports 3 Gbps 0x3 impl SATA mode +[ 1.143952] ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pio slum part ccc sxs +[ 1.144931] scsi0 : ahci +[ 1.145135] scsi1 : ahci +[ 1.145511] scsi2 : ahci +[ 1.145741] scsi3 : ahci +[ 1.145851] ata1: SATA max UDMA/133 abar m2048@0xf2826000 port 0xf2826100 irq 44 +[ 1.145924] ata2: SATA max UDMA/133 abar m2048@0xf2826000 port 0xf2826180 irq 44 +[ 1.145987] ata3: DUMMY +[ 1.146051] ata4: DUMMY +[ 1.146776] [drm] Memory usable by graphics device = 2048M +[ 1.211100] i915 0000:00:02.0: irq 45 for MSI/MSI-X +[ 1.211112] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.211164] [drm] Driver supports precise vblank timestamp query. +[ 1.211360] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem +[ 1.356901] fbcon: inteldrmfb (fb0) is primary device +[ 1.429783] psmouse serio1: alps: Unknown ALPS touchpad: E7=10 00 64, EC=10 00 64 +[ 1.451120] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300) +[ 1.452184] ata1.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.452187] ata1.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out +[ 1.452301] ata1.00: ACPI cmd ef/5f:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.452303] ata1.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.464094] usb 4-2: new full-speed USB device number 2 using uhci_hcd +[ 1.498665] ata1.00: ATA-8: WDC WD1600BEVS-08VAT2, 14.01A14, max UDMA/133 +[ 1.498667] ata1.00: 312581808 sectors, multi 16: LBA48 NCQ (depth 31/32), AA +[ 1.500316] ata1.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.500319] ata1.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out +[ 1.500465] ata1.00: ACPI cmd ef/5f:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.500467] ata1.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.502270] ata1.00: configured for UDMA/133 +[ 1.502467] scsi 0:0:0:0: Direct-Access ATA WDC WD1600BEVS-0 14.0 PQ: 0 ANSI: 5 +[ 1.502651] sd 0:0:0:0: [sda] 312581808 512-byte logical blocks: (160 GB/149 GiB) +[ 1.502695] sd 0:0:0:0: Attached scsi generic sg0 type 0 +[ 1.502732] sd 0:0:0:0: [sda] Write Protect is off +[ 1.502734] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00 +[ 1.502774] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA +[ 1.537914] sda: sda1 sda2 < sda5 sda6 > +[ 1.538544] sd 0:0:0:0: [sda] Attached SCSI disk +[ 1.618541] usb 4-2: New USB device found, idVendor=0a5c, idProduct=2145 +[ 1.618544] usb 4-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0 +[ 1.618546] usb 4-2: Product: ThinkPad Bluetooth with Enhanced Data Rate II +[ 1.618547] usb 4-2: Manufacturer: Lenovo Computer Corp +[ 1.796484] psmouse serio1: trackpoint: IBM TrackPoint firmware: 0x0e, buttons: 3/3 +[ 1.807121] ata2: SATA link down (SStatus 0 SControl 300) +[ 1.814662] input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio1/input/input5 +[ 1.894282] Console: switching to colour frame buffer device 160x50 +[ 1.901135] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device +[ 1.902865] i915 0000:00:02.0: registered panic notifier +[ 1.907397] ACPI: Video Device [VID] (multi-head: yes rom: no post: no) +[ 1.916101] acpi device:02: registered as cooling_device2 +[ 1.917970] input: Video Bus as /devices/LNXSYSTM:00/device:00/PNP0A08:00/LNXVIDEO:00/input/input6 +[ 1.919867] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0 +[ 2.603154] md: linear personality registered for level -1 +[ 2.607184] md: multipath personality registered for level -4 +[ 2.611208] md: raid0 personality registered for level 0 +[ 2.615754] md: raid1 personality registered for level 1 +[ 2.637037] raid6: sse2x1 2871 MB/s +[ 2.654032] raid6: sse2x2 3125 MB/s +[ 2.671029] raid6: sse2x4 4628 MB/s +[ 2.671057] raid6: using algorithm sse2x4 (4628 MB/s) +[ 2.671090] raid6: using ssse3x2 recovery algorithm +[ 2.673224] xor: measuring software checksum speed +[ 2.683030] prefetch64-sse: 6432.000 MB/sec +[ 2.693030] generic_sse: 5720.000 MB/sec +[ 2.693061] xor: using function: prefetch64-sse (6432.000 MB/sec) +[ 2.695037] async_tx: api initialized (async) +[ 2.706535] md: raid6 personality registered for level 6 +[ 2.706574] md: raid5 personality registered for level 5 +[ 2.706609] md: raid4 personality registered for level 4 +[ 2.715477] md: raid10 personality registered for level 10 +[ 2.777351] random: nonblocking pool is initialized +[ 2.912964] bio: create slab <bio-1> at 1 +[ 2.914076] Btrfs loaded +[ 3.142639] EXT4-fs (sda1): mounted filesystem with ordered data mode. Opts: (null) +[ 13.257389] Adding 4230140k swap on /dev/sda5. Priority:-1 extents:1 across:4230140k FS +[ 13.348717] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 13.512598] systemd-udevd[410]: starting version 204 +[ 13.698475] lp: driver loaded but no devices found +[ 13.718842] ppdev: user-space parallel port driver +[ 13.888756] Bluetooth: Core ver 2.17 +[ 13.888782] NET: Registered protocol family 31 +[ 13.888785] Bluetooth: HCI device and connection manager initialized +[ 13.888797] Bluetooth: HCI socket layer initialized +[ 13.888801] Bluetooth: L2CAP socket layer initialized +[ 13.888807] Bluetooth: SCO socket layer initialized +[ 13.902331] usbcore: registered new interface driver btusb +[ 13.909756] ACPI Warning: 0x0000000000001028-0x000000000000102f SystemIO conflicts with Region \_SB_.PCI0.LPC_.PMIO 1 (20131115/utaddress-251) +[ 13.909766] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 13.909772] ACPI Warning: 0x00000000000011b0-0x00000000000011bf SystemIO conflicts with Region \_SB_.PCI0.LPC_.LPIO 1 (20131115/utaddress-251) +[ 13.909777] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 13.909779] ACPI Warning: 0x0000000000001180-0x00000000000011af SystemIO conflicts with Region \_SB_.PCI0.LPC_.LPIO 1 (20131115/utaddress-251) +[ 13.909783] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 13.909785] lpc_ich: Resource conflict(s) found affecting gpio_ich +[ 13.924585] EXT4-fs (sda1): re-mounted. Opts: errors=remount-ro +[ 13.962851] Non-volatile memory driver v1.3 +[ 14.000898] thinkpad_acpi: ThinkPad ACPI Extras v0.25 +[ 14.000903] thinkpad_acpi: http://ibm-acpi.sf.net/ +[ 14.000905] thinkpad_acpi: ThinkPad BIOS 6DET65WW (3.15 ), EC 7XHT24WW-1.06 +[ 14.000907] thinkpad_acpi: Lenovo ThinkPad X200, model 7459GW4 +[ 14.023348] thinkpad_acpi: detected a 16-level brightness capable ThinkPad +[ 14.023562] thinkpad_acpi: radio switch found; radios are enabled +[ 14.023579] thinkpad_acpi: This ThinkPad has standard ACPI backlight brightness control, supported by the ACPI video driver +[ 14.023581] thinkpad_acpi: Disabling thinkpad-acpi brightness events by default... +[ 14.027716] thinkpad_acpi: rfkill switch tpacpi_bluetooth_sw: radio is unblocked +[ 14.033143] thinkpad_acpi: Standard ACPI backlight interface available, not loading native one +[ 14.033423] thinkpad_acpi: Console audio control enabled, mode: monitor (read only) +[ 14.037967] input: ThinkPad Extra Buttons as /devices/platform/thinkpad_acpi/input/input7 +[ 14.094334] snd_hda_intel 0000:00:1b.0: irq 46 for MSI/MSI-X +[ 14.117123] hda_codec: CX20561 (Hermosa): BIOS auto-probing. +[ 14.117573] autoconfig: line_outs=1 (0x1a/0x0/0x0/0x0/0x0) type:speaker +[ 14.117576] speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) +[ 14.117578] hp_outs=2 (0x19/0x16/0x0/0x0/0x0) +[ 14.117580] mono: mono_out=0x0 +[ 14.117582] dig-out=0x1c/0x0 +[ 14.117583] inputs: +[ 14.117585] Mic=0x18 +[ 14.117587] Internal Mic=0x1d +[ 14.117589] Dock Mic=0x17 +[ 14.118587] hda_codec: Enable sync_write for stable communication +[ 14.121304] input: HDA Intel Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input11 +[ 14.121403] input: HDA Intel Dock Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input10 +[ 14.121491] input: HDA Intel Dock Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input9 +[ 14.121572] input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input8 +[ 14.141178] device-mapper: multipath: version 1.6.0 loaded +[ 14.154949] kvm: disabled by bios +[ 14.165173] kvm: disabled by bios +[ 14.310307] mei_me 0000:00:03.0: irq 47 for MSI/MSI-X +[ 14.401058] cfg80211: Calling CRDA to update world regulatory domain +[ 14.440429] Intel(R) Wireless WiFi driver for Linux, in-tree: +[ 14.440433] Copyright(c) 2003-2013 Intel Corporation +[ 14.440762] iwlwifi 0000:03:00.0: can't disable ASPM; OS doesn't have ASPM control +[ 14.440834] iwlwifi 0000:03:00.0: irq 48 for MSI/MSI-X +[ 14.441053] 0000:03:00.0: Missing Free firmware +[ 14.441095] iwlwifi 0000:03:00.0: Couldn't request the fw +[ 14.442753] iwlwifi: probe of 0000:03:00.0 failed with error -22 +[ 14.514047] pci 0000:03:00.0: Direct firmware load failed with error -2 +[ 14.514052] pci 0000:03:00.0: Falling back to user helper +[ 14.519440] type=1400 audit(1440917350.154:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/sbin/dhclient" pid=569 comm="apparmor_parser" +[ 14.519450] type=1400 audit(1440917350.154:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=569 comm="apparmor_parser" +[ 14.519457] type=1400 audit(1440917350.154:4): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=569 comm="apparmor_parser" +[ 14.520174] systemd-udevd[425]: renamed network interface eth0 to eth4 +[ 14.520232] type=1400 audit(1440917350.155:5): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=569 comm="apparmor_parser" +[ 14.520241] type=1400 audit(1440917350.155:6): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=569 comm="apparmor_parser" +[ 14.520582] type=1400 audit(1440917350.155:7): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=569 comm="apparmor_parser" +[ 15.055767] SGI XFS with ACLs, security attributes, realtime, large block/inode numbers, no debug enabled +[ 15.119824] XFS (sda6): Mounting Filesystem +[ 15.569603] XFS (sda6): Ending clean mount +[ 15.844338] init: failsafe main process (725) killed by TERM signal +[ 16.170233] type=1400 audit(1440917351.805:8): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/sbin/dhclient" pid=831 comm="apparmor_parser" +[ 16.170245] type=1400 audit(1440917351.805:9): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=831 comm="apparmor_parser" +[ 16.170252] type=1400 audit(1440917351.805:10): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=831 comm="apparmor_parser" +[ 16.170906] type=1400 audit(1440917351.805:11): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=831 comm="apparmor_parser" +[ 16.548278] Bluetooth: RFCOMM TTY layer initialized +[ 16.548295] Bluetooth: RFCOMM socket layer initialized +[ 16.548303] Bluetooth: RFCOMM ver 1.11 +[ 16.702630] init: cups main process (887) killed by HUP signal +[ 16.702645] init: cups main process ended, respawning +[ 16.717535] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 +[ 16.717540] Bluetooth: BNEP filters: protocol multicast +[ 16.717552] Bluetooth: BNEP socket layer initialized +[ 18.798586] init: plymouth-upstart-bridge main process ended, respawning +[ 19.246364] e1000e 0000:00:19.0: irq 43 for MSI/MSI-X +[ 19.347188] e1000e 0000:00:19.0: irq 43 for MSI/MSI-X +[ 19.347386] IPv6: ADDRCONF(NETDEV_UP): eth4: link is not ready +[ 19.347784] IPv6: ADDRCONF(NETDEV_UP): eth4: link is not ready +[ 22.755913] e1000e: eth4 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx +[ 22.756058] IPv6: ADDRCONF(NETDEV_CHANGE): eth4: link becomes ready +[ 46.558282] audit_printk_skb: 96 callbacks suppressed +[ 46.558287] type=1400 audit(1440913378.392:44): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/cups/backend/cups-pdf" pid=2159 comm="apparmor_parser" +[ 46.558298] type=1400 audit(1440913378.392:45): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=2159 comm="apparmor_parser" +[ 46.558959] type=1400 audit(1440913378.392:46): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=2159 comm="apparmor_parser" diff --git a/docs/hardware/hwdumps/x200/dmidecode.err.log b/docs/hardware/hwdumps/x200/dmidecode.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/dmidecode.err.log diff --git a/docs/hardware/hwdumps/x200/dmidecode.log b/docs/hardware/hwdumps/x200/dmidecode.log new file mode 100644 index 00000000..a5a19616 --- /dev/null +++ b/docs/hardware/hwdumps/x200/dmidecode.log @@ -0,0 +1,587 @@ +# dmidecode 2.12 +SMBIOS 2.4 present. +68 structures occupying 2464 bytes. +Table at 0x000E0010. + +Handle 0x0000, DMI type 0, 24 bytes +BIOS Information + Vendor: LENOVO + Version: 6DET65WW (3.15 ) + Release Date: 08/24/2010 + Address: 0xE0000 + Runtime Size: 128 kB + ROM Size: 8192 kB + Characteristics: + PCI is supported + PC Card (PCMCIA) is supported + PNP is supported + BIOS is upgradeable + BIOS shadowing is allowed + ESCD support is available + Boot from CD is supported + Selectable boot is supported + BIOS ROM is socketed + EDD is supported + ACPI is supported + USB legacy is supported + BIOS boot specification is supported + Targeted content distribution is supported + BIOS Revision: 3.21 + Firmware Revision: 1.6 + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: LENOVO + Product Name: 7459GW4 + Version: ThinkPad X200 + Serial Number: L3AAR0B + UUID: 93861E01-4A15-11CB-8F2C-D4BC407E0839 + Wake-up Type: Power Switch + SKU Number: Not Specified + Family: ThinkPad X200 + +Handle 0x0002, DMI type 2, 8 bytes +Base Board Information + Manufacturer: LENOVO + Product Name: 7459GW4 + Version: Not Available + Serial Number: 1ZFDS89N4DD + +Handle 0x0003, DMI type 3, 13 bytes +Chassis Information + Manufacturer: LENOVO + Type: Notebook + Lock: Not Present + Version: Not Available + Serial Number: Not Available + Asset Tag: 1S7459GW4L3AAR0B + Boot-up State: Unknown + Power Supply State: Unknown + Thermal State: Unknown + Security Status: Unknown + +Handle 0x0004, DMI type 126, 13 bytes +Inactive + +Handle 0x0005, DMI type 126, 13 bytes +Inactive + +Handle 0x0006, DMI type 4, 35 bytes +Processor Information + Socket Designation: None + Type: Central Processor + Family: Other + Manufacturer: GenuineIntel + ID: 76 06 01 00 FF FB EB BF + Signature: Type 0, Family 6, Model 23, Stepping 6 + Flags: + FPU (Floating-point unit on-chip) + VME (Virtual mode extension) + DE (Debugging extension) + PSE (Page size extension) + TSC (Time stamp counter) + MSR (Model specific registers) + PAE (Physical address extension) + MCE (Machine check exception) + CX8 (CMPXCHG8 instruction supported) + APIC (On-chip APIC hardware supported) + SEP (Fast system call) + MTRR (Memory type range registers) + PGE (Page global enable) + MCA (Machine check architecture) + CMOV (Conditional move instruction supported) + PAT (Page attribute table) + PSE-36 (36-bit page size extension) + CLFSH (CLFLUSH instruction supported) + DS (Debug store) + ACPI (ACPI supported) + MMX (MMX technology supported) + FXSR (FXSAVE and FXSTOR instructions supported) + SSE (Streaming SIMD extensions) + SSE2 (Streaming SIMD extensions 2) + SS (Self-snoop) + HTT (Multi-threading) + TM (Thermal monitor supported) + PBE (Pending break enabled) + Version: Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz + Voltage: 1.2 V + External Clock: 266 MHz + Max Speed: 2400 MHz + Current Speed: 2400 MHz + Status: Populated, Enabled + Upgrade: None + L1 Cache Handle: 0x000A + L2 Cache Handle: 0x000C + L3 Cache Handle: Not Provided + Serial Number: Not Specified + Asset Tag: Not Specified + Part Number: Not Specified + +Handle 0x0007, DMI type 5, 20 bytes +Memory Controller Information + Error Detecting Method: None + Error Correcting Capabilities: + None + Supported Interleave: One-way Interleave + Current Interleave: One-way Interleave + Maximum Memory Module Size: 4096 MB + Maximum Total Memory Size: 8192 MB + Supported Speeds: + Other + Supported Memory Types: + DIMM + SDRAM + Memory Module Voltage: 2.9 V + Associated Memory Slots: 2 + 0x0008 + 0x0009 + Enabled Error Correcting Capabilities: + Unknown + +Handle 0x0008, DMI type 6, 12 bytes +Memory Module Information + Socket Designation: DIMM Slot 1 + Bank Connections: 0 1 + Current Speed: 42 ns + Type: DIMM SDRAM + Installed Size: 2048 MB (Double-bank Connection) + Enabled Size: 2048 MB (Double-bank Connection) + Error Status: OK + +Handle 0x0009, DMI type 6, 12 bytes +Memory Module Information + Socket Designation: DIMM Slot 2 + Bank Connections: 2 3 + Current Speed: 42 ns + Type: DIMM SDRAM + Installed Size: Not Installed + Enabled Size: Not Installed + Error Status: OK + +Handle 0x000A, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L1 Cache + Configuration: Enabled, Socketed, Level 1 + Operational Mode: Write Back + Location: Internal + Installed Size: 64 kB + Maximum Size: 64 kB + Supported SRAM Types: + Synchronous + Installed SRAM Type: Synchronous + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Instruction + Associativity: 8-way Set-associative + +Handle 0x000B, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L1 Cache + Configuration: Enabled, Socketed, Level 1 + Operational Mode: Write Back + Location: Internal + Installed Size: 64 kB + Maximum Size: 64 kB + Supported SRAM Types: + Synchronous + Installed SRAM Type: Synchronous + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Data + Associativity: 8-way Set-associative + +Handle 0x000C, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L2 Cache + Configuration: Enabled, Socketed, Level 2 + Operational Mode: Write Back + Location: Internal + Installed Size: 3072 kB + Maximum Size: 3072 kB + Supported SRAM Types: + Burst + Installed SRAM Type: Burst + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Unified + Associativity: 8-way Set-associative + +Handle 0x000D, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: External Monitor + External Connector Type: DB-15 female + Port Type: Video Port + +Handle 0x000E, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Microphone Jack + External Connector Type: Mini Jack (headphones) + Port Type: Audio Port + +Handle 0x000F, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Headphone Jack + External Connector Type: Mini Jack (headphones) + Port Type: Audio Port + +Handle 0x0010, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Modem + External Connector Type: RJ-11 + Port Type: Modem Port + +Handle 0x0011, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Ethernet + External Connector Type: RJ-45 + Port Type: Network Port + +Handle 0x0012, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 1 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0013, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 2 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0014, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 3 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0015, DMI type 126, 9 bytes +Inactive + +Handle 0x0016, DMI type 126, 9 bytes +Inactive + +Handle 0x0017, DMI type 126, 9 bytes +Inactive + +Handle 0x0018, DMI type 126, 9 bytes +Inactive + +Handle 0x0019, DMI type 126, 9 bytes +Inactive + +Handle 0x001A, DMI type 126, 9 bytes +Inactive + +Handle 0x001B, DMI type 126, 13 bytes +Inactive + +Handle 0x001C, DMI type 10, 6 bytes +On Board Device Information + Type: Other + Status: Disabled + Description: IBM Embedded Security hardware + +Handle 0x001D, DMI type 11, 5 bytes +OEM Strings + String 1: IBM ThinkPad Embedded Controller -[7XHT24WW-1.06 ]- + +Handle 0x001E, DMI type 13, 22 bytes +BIOS Language Information + Language Description Format: Abbreviated + Installable Languages: 1 + enUS + Currently Installed Language: enUS + +Handle 0x001F, DMI type 15, 25 bytes +System Event Log + Area Length: 0 bytes + Header Start Offset: 0x0000 + Header Length: 16 bytes + Data Start Offset: 0x0010 + Access Method: General-purpose non-volatile data functions + Access Address: 0x0000 + Status: Valid, Not Full + Change Token: 0x000000FC + Header Format: Type 1 + Supported Log Type Descriptors: 1 + Descriptor 1: POST error + Data Format 1: POST results bitmap + +Handle 0x0020, DMI type 16, 15 bytes +Physical Memory Array + Location: System Board Or Motherboard + Use: System Memory + Error Correction Type: None + Maximum Capacity: 4 GB + Error Information Handle: Not Provided + Number Of Devices: 2 + +Handle 0x0021, DMI type 17, 27 bytes +Memory Device + Array Handle: 0x0020 + Error Information Handle: No Error + Total Width: 64 bits + Data Width: 64 bits + Size: 2048 MB + Form Factor: SODIMM + Set: None + Locator: DIMM 1 + Bank Locator: Bank 0/1 + Type: DDR3 + Type Detail: Synchronous + Speed: 1066 MHz + Manufacturer: 02FE + Serial Number: F4BB7CA2 + Asset Tag: 0839 + Part Number: EBJ21UE8BASA-AE-E + +Handle 0x0022, DMI type 17, 27 bytes +Memory Device + Array Handle: 0x0020 + Error Information Handle: No Error + Total Width: Unknown + Data Width: Unknown + Size: No Module Installed + Form Factor: SODIMM + Set: None + Locator: DIMM 2 + Bank Locator: Bank 2/3 + Type: DDR2 + Type Detail: Synchronous + Speed: 1066 MHz + Manufacturer: + Serial Number: + Asset Tag: + Part Number: + +Handle 0x0023, DMI type 18, 23 bytes +32-bit Memory Error Information + Type: OK + Granularity: Unknown + Operation: Unknown + Vendor Syndrome: Unknown + Memory Array Address: Unknown + Device Address: Unknown + Resolution: Unknown + +Handle 0x0024, DMI type 19, 15 bytes +Memory Array Mapped Address + Starting Address: 0x00000000000 + Ending Address: 0x0007FFFFFFF + Range Size: 2 GB + Physical Array Handle: 0x0020 + Partition Width: 2 + +Handle 0x0025, DMI type 20, 19 bytes +Memory Device Mapped Address + Starting Address: 0x00000000000 + Ending Address: 0x0007FFFFFFF + Range Size: 2 GB + Physical Device Handle: 0x0021 + Memory Array Mapped Address Handle: 0x0024 + Partition Row Position: 1 + +Handle 0x0026, DMI type 20, 19 bytes +Memory Device Mapped Address + Starting Address: 0x0007FFFFC00 + Ending Address: 0x0007FFFFFFF + Range Size: 1 kB + Physical Device Handle: 0x0022 + Memory Array Mapped Address Handle: 0x0024 + Partition Row Position: 1 + +Handle 0x0027, DMI type 21, 7 bytes +Built-in Pointing Device + Type: Track Point + Interface: PS/2 + Buttons: 3 + +Handle 0x0028, DMI type 126, 26 bytes +Inactive + +Handle 0x0029, DMI type 126, 26 bytes +Inactive + +Handle 0x002A, DMI type 24, 5 bytes +Hardware Security + Power-On Password Status: Disabled + Keyboard Password Status: Disabled + Administrator Password Status: Disabled + Front Panel Reset Status: Unknown + +Handle 0x002B, DMI type 32, 11 bytes +System Boot Information + Status: No errors detected + +Handle 0x002C, DMI type 131, 17 bytes +OEM-specific Type + Header and Data: + 83 11 2C 00 01 02 03 FF FF 1F 00 00 00 00 00 02 + 00 + Strings: + BOOTINF 20h + BOOTDEV 21h + KEYPTRS 23h + +Handle 0x002D, DMI type 131, 22 bytes +OEM-specific Type + Header and Data: + 83 16 2D 00 01 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 01 + Strings: + TVT-Enablement + +Handle 0x002E, DMI type 132, 7 bytes +OEM-specific Type + Header and Data: + 84 07 2E 00 02 D8 36 + +Handle 0x002F, DMI type 133, 5 bytes +OEM-specific Type + Header and Data: + 85 05 2F 00 01 + Strings: + KHOIHGIUCCHHII + +Handle 0x0030, DMI type 134, 13 bytes +OEM-specific Type + Header and Data: + 86 0D 30 00 30 10 08 20 00 00 00 00 00 + +Handle 0x0031, DMI type 134, 16 bytes +OEM-specific Type + Header and Data: + 86 10 31 00 00 49 4E 54 43 01 01 00 00 02 01 02 + Strings: + TPM INFO + System Reserved + +Handle 0x0032, DMI type 135, 13 bytes +OEM-specific Type + Header and Data: + 87 0D 32 00 54 50 07 00 01 00 00 00 00 + +Handle 0x0033, DMI type 135, 18 bytes +OEM-specific Type + Header and Data: + 87 12 33 00 54 50 07 01 01 B9 05 00 00 00 00 00 + 00 00 + +Handle 0x0034, DMI type 135, 35 bytes +OEM-specific Type + Header and Data: + 87 23 34 00 54 50 07 02 42 41 59 20 49 2F 4F 20 + 01 00 02 00 00 0B 00 48 1C 3E 18 02 00 0B 00 40 + 1C 3A 18 + +Handle 0x0035, DMI type 135, 34 bytes +OEM-specific Type + Header and Data: + 87 22 35 00 54 50 07 04 01 06 01 01 02 00 02 01 + 02 00 03 01 02 00 04 01 02 00 05 01 02 00 06 01 + 02 00 + +Handle 0x0036, DMI type 135, 10 bytes +OEM-specific Type + Header and Data: + 87 0A 36 00 54 50 07 03 01 0A + +Handle 0x0037, DMI type 136, 6 bytes +OEM-specific Type + Header and Data: + 88 06 37 00 5A 5A + +Handle 0x0038, DMI type 126, 28 bytes +Inactive + +Handle 0x0039, DMI type 138, 40 bytes +OEM-specific Type + Header and Data: + 8A 28 39 00 14 01 02 01 40 02 01 40 02 01 40 02 + 01 40 01 40 42 49 4F 53 20 50 61 73 73 77 6F 72 + 64 20 46 6F 72 6D 61 74 + +Handle 0x003A, DMI type 139, 37 bytes +OEM-specific Type + Header and Data: + 8B 25 3A 00 11 01 0A 00 00 00 00 00 00 00 00 00 + 00 50 57 4D 53 20 4B 65 79 20 49 6E 66 6F 72 6D + 61 74 69 6F 6E + +Handle 0x003B, DMI type 140, 67 bytes +OEM-specific Type + Header and Data: + 8C 43 3B 00 4C 45 4E 4F 56 4F 0B 00 01 9A 13 CD + C4 7A 2A 8E 76 C3 C4 4E B9 B1 DD 4E 7C 01 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 + +Handle 0x003C, DMI type 140, 47 bytes +OEM-specific Type + Header and Data: + 8C 2F 3C 00 4C 45 4E 4F 56 4F 0B 01 01 08 00 BF + DA 3C 04 5C 72 D9 7D 0D 79 DE 46 98 23 10 B1 00 + 00 00 00 10 00 10 00 10 01 D0 00 20 01 00 01 + +Handle 0x003D, DMI type 140, 63 bytes +OEM-specific Type + Header and Data: + 8C 3F 3D 00 4C 45 4E 4F 56 4F 0B 02 01 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +Handle 0x003E, DMI type 140, 17 bytes +OEM-specific Type + Header and Data: + 8C 11 3E 00 4C 45 4E 4F 56 4F 0B 03 01 00 00 00 + 00 + +Handle 0x003F, DMI type 140, 19 bytes +OEM-specific Type + Header and Data: + 8C 13 3F 00 4C 45 4E 4F 56 4F 0B 04 01 B2 00 53 + 4D 20 00 + +Handle 0x0040, DMI type 129, 8 bytes +OEM-specific Type + Header and Data: + 81 08 40 00 01 01 02 01 + Strings: + Intel_ASF + Intel_ASF_001 + +Handle 0x0041, DMI type 130, 20 bytes +OEM-specific Type + Header and Data: + 82 14 41 00 24 41 4D 54 01 01 01 01 01 A5 0B 04 + 00 00 00 00 + +Handle 0x0042, DMI type 131, 64 bytes +OEM-specific Type + Header and Data: + 83 40 42 00 14 00 00 00 00 00 40 2A 00 00 00 00 + F8 00 17 29 00 00 00 00 2D 00 00 00 00 00 04 00 + 64 04 03 00 01 00 01 15 C8 00 F5 10 00 00 00 00 + 00 00 00 00 07 00 00 00 76 50 72 6F 00 00 00 00 + +Handle 0x0043, DMI type 127, 4 bytes +End Of Table + diff --git a/docs/hardware/hwdumps/x200/ectool.err.log b/docs/hardware/hwdumps/x200/ectool.err.log new file mode 100644 index 00000000..452503e5 --- /dev/null +++ b/docs/hardware/hwdumps/x200/ectool.err.log @@ -0,0 +1 @@ +bash: ectool: command not found diff --git a/docs/hardware/hwdumps/x200/ectool.log b/docs/hardware/hwdumps/x200/ectool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/ectool.log diff --git a/docs/hardware/hwdumps/x200/flashrom_info.err.log b/docs/hardware/hwdumps/x200/flashrom_info.err.log new file mode 100644 index 00000000..933ac573 --- /dev/null +++ b/docs/hardware/hwdumps/x200/flashrom_info.err.log @@ -0,0 +1,14 @@ +======================================================================== +WARNING! You seem to be running flashrom on an unsupported laptop. +Laptops, notebooks and netbooks are difficult to support and we +recommend to use the vendor flashing utility. The embedded controller +(EC) in these machines often interacts badly with flashing. +See http://www.flashrom.org/Laptops for details. + +If flash is shared with the EC, erase is guaranteed to brick your laptop +and write may brick your laptop. +Read and probe may irritate your EC and cause fan failure, backlight +failure and sudden poweroff. +You have been warned. +======================================================================== +Proceeding anyway because user forced us to. diff --git a/docs/hardware/hwdumps/x200/flashrom_info.log b/docs/hardware/hwdumps/x200/flashrom_info.log new file mode 100644 index 00000000..d9a82f8b --- /dev/null +++ b/docs/hardware/hwdumps/x200/flashrom_info.log @@ -0,0 +1,289 @@ +flashrom v0.9.6.1-r1563 on Linux 3.13.0-39-lowlatency (x86_64) +flashrom is free software, get the source code at http://www.flashrom.org + +flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian +Command line (3 args): flashrom -V -p internal:laptop=force_I_want_a_brick +Calibrating delay loop... OS timer resolution is 1 usecs, 1578M loops per second, 10 myus = 11 us, 100 myus = 114 us, 1000 myus = 1002 us, 10000 myus = 10004 us, 4 myus = 5 us, OK. +Initializing internal programmer +No coreboot table found. +DMI string system-manufacturer: "LENOVO" +DMI string system-product-name: "7459GW4" +DMI string system-version: "ThinkPad X200" +DMI string baseboard-manufacturer: "LENOVO" +DMI string baseboard-product-name: "7459GW4" +DMI string baseboard-version: "Not Available" +DMI string chassis-type: "Notebook" +Laptop detected via DMI. +Found chipset "Intel ICH9M-E" with PCI ID 8086:2917. Enabling flash write... +0xfff80000/0xffb80000 FWH IDSEL: 0x0 +0xfff00000/0xffb00000 FWH IDSEL: 0x0 +0xffe80000/0xffa80000 FWH IDSEL: 0x0 +0xffe00000/0xffa00000 FWH IDSEL: 0x0 +0xffd80000/0xff980000 FWH IDSEL: 0x0 +0xffd00000/0xff900000 FWH IDSEL: 0x0 +0xffc80000/0xff880000 FWH IDSEL: 0x0 +0xffc00000/0xff800000 FWH IDSEL: 0x0 +0xff700000/0xff300000 FWH IDSEL: 0x4 +0xff600000/0xff200000 FWH IDSEL: 0x5 +0xff500000/0xff100000 FWH IDSEL: 0x6 +0xff400000/0xff000000 FWH IDSEL: 0x7 +0xfff80000/0xffb80000 FWH decode enabled +0xfff00000/0xffb00000 FWH decode enabled +0xffe80000/0xffa80000 FWH decode enabled +0xffe00000/0xffa00000 FWH decode enabled +0xffd80000/0xff980000 FWH decode enabled +0xffd00000/0xff900000 FWH decode enabled +0xffc80000/0xff880000 FWH decode enabled +0xffc00000/0xff800000 FWH decode enabled +0xff700000/0xff300000 FWH decode disabled +0xff600000/0xff200000 FWH decode disabled +0xff500000/0xff100000 FWH decode disabled +0xff400000/0xff000000 FWH decode disabled +Maximum FWH chip size: 0x400000 bytes +BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 +Root Complex Register Block address = 0xfed1c000 +GCS = 0x7b0461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI) +Top Swap : not enabled +SPIBAR = 0xfed1c000 + 0x3800 +0x04: 0xe008 (HSFS) +HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 +WARNING: SPI Configuration Lockdown activated. +Reading OPCODES... done +0x06: 0x3f04 (HSFC) +HSFC: FGO=0, FCYCLE=2, FDBC=63, SME=0 +0x08: 0x00001000 (FADDR) +0x50: 0x00001a1b (FRAP) +BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b +0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. +0x58: 0x07ff0600 FREG1: BIOS region (0x00600000-0x007fffff) is read-write. +0x5C: 0x05f50001 FREG2: WARNING: Management Engine region (0x00001000-0x005f5fff) is locked. +0x60: 0x05f705f6 FREG3: Gigabit Ethernet region (0x005f6000-0x005f7fff) is read-write. +0x64: 0x05ff05f8 FREG4: Platform Data region (0x005f8000-0x005fffff) is read-write. +0x74: 0x9fff07e0 PR0: WARNING: 0x007e0000-0x01ffffff is read-only. +0x84: 0x85ff85f8 PR4: WARNING: 0x005f8000-0x005fffff is locked. +Please send a verbose log to flashrom@flashrom.org if this board is not listed on +http://flashrom.org/Supported_hardware#Supported_mainboards yet. +Writes have been disabled. You can enforce write support with the +ich_spi_force programmer option, but it will most likely harm your hardware! +If you force flashrom you will get no support if something breaks. +0x90: 0x04 (SSFS) +SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 +0x91: 0x000000 (SSFC) +SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0 +0x94: 0x5006 (PREOP) +0x96: 0x143b (OPTYPE) +0x98: 0x05200302 (OPMENU) +0x9C: 0x0601209f (OPMENU+4) +0xA0: 0x00000000 (BBAR) +0xC4: 0x00002005 (LVSCC) +LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xC8: 0x00002005 (UVSCC) +UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xD0: 0x00000000 (FPB) + +SPI Read Configuration: prefetching disabled, caching enabled, OK. +The following protocols are supported: FWH, SPI. +Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Chip status register is 00 +Chip status register: Status Register Write Disable (SRWD) is not set +Chip status register: Bit 6 is not set +Chip status register: Block Protect 3 (BP3) is not set +Chip status register: Block Protect 2 (BP2) is not set +Chip status register: Block Protect 1 (BP1) is not set +Chip status register: Block Protect 0 (BP0) is not set +Chip status register: Write Enable Latch (WEL) is not set +Chip status register: Write In Progress (WIP/BUSY) is not set +Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000. +Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. +Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute. +Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. +Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. +Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. +Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not execute. +Receiving SFDP signature failed. +Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. +Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x0a, id2 0xce, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Found Macronix flash chip "MX25L6405" (8192 kB, SPI). +No operations were specified. +Restoring MMIO space at 0x7f9c951da8a0 +Restoring PCI config space for 00:1f:0 reg 0xdc diff --git a/docs/hardware/hwdumps/x200/flashrom_read.err.log b/docs/hardware/hwdumps/x200/flashrom_read.err.log new file mode 100644 index 00000000..0a7925d7 --- /dev/null +++ b/docs/hardware/hwdumps/x200/flashrom_read.err.log @@ -0,0 +1,16 @@ +======================================================================== +WARNING! You seem to be running flashrom on an unsupported laptop. +Laptops, notebooks and netbooks are difficult to support and we +recommend to use the vendor flashing utility. The embedded controller +(EC) in these machines often interacts badly with flashing. +See http://www.flashrom.org/Laptops for details. + +If flash is shared with the EC, erase is guaranteed to brick your laptop +and write may brick your laptop. +Read and probe may irritate your EC and cause fan failure, backlight +failure and sudden poweroff. +You have been warned. +======================================================================== +Proceeding anyway because user forced us to. +Transaction error! +Read operation failed! diff --git a/docs/hardware/hwdumps/x200/flashrom_read.log b/docs/hardware/hwdumps/x200/flashrom_read.log new file mode 100644 index 00000000..0c78c81c --- /dev/null +++ b/docs/hardware/hwdumps/x200/flashrom_read.log @@ -0,0 +1,292 @@ +flashrom v0.9.6.1-r1563 on Linux 3.13.0-39-lowlatency (x86_64) +flashrom is free software, get the source code at http://www.flashrom.org + +flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian +Command line (5 args): flashrom -V -p internal:laptop=force_I_want_a_brick -r rom.bin +Calibrating delay loop... OS timer resolution is 2 usecs, 1579M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1004 us, 10000 myus = 10014 us, 8 myus = 9 us, OK. +Initializing internal programmer +No coreboot table found. +DMI string system-manufacturer: "LENOVO" +DMI string system-product-name: "7459GW4" +DMI string system-version: "ThinkPad X200" +DMI string baseboard-manufacturer: "LENOVO" +DMI string baseboard-product-name: "7459GW4" +DMI string baseboard-version: "Not Available" +DMI string chassis-type: "Notebook" +Laptop detected via DMI. +Found chipset "Intel ICH9M-E" with PCI ID 8086:2917. Enabling flash write... +0xfff80000/0xffb80000 FWH IDSEL: 0x0 +0xfff00000/0xffb00000 FWH IDSEL: 0x0 +0xffe80000/0xffa80000 FWH IDSEL: 0x0 +0xffe00000/0xffa00000 FWH IDSEL: 0x0 +0xffd80000/0xff980000 FWH IDSEL: 0x0 +0xffd00000/0xff900000 FWH IDSEL: 0x0 +0xffc80000/0xff880000 FWH IDSEL: 0x0 +0xffc00000/0xff800000 FWH IDSEL: 0x0 +0xff700000/0xff300000 FWH IDSEL: 0x4 +0xff600000/0xff200000 FWH IDSEL: 0x5 +0xff500000/0xff100000 FWH IDSEL: 0x6 +0xff400000/0xff000000 FWH IDSEL: 0x7 +0xfff80000/0xffb80000 FWH decode enabled +0xfff00000/0xffb00000 FWH decode enabled +0xffe80000/0xffa80000 FWH decode enabled +0xffe00000/0xffa00000 FWH decode enabled +0xffd80000/0xff980000 FWH decode enabled +0xffd00000/0xff900000 FWH decode enabled +0xffc80000/0xff880000 FWH decode enabled +0xffc00000/0xff800000 FWH decode enabled +0xff700000/0xff300000 FWH decode disabled +0xff600000/0xff200000 FWH decode disabled +0xff500000/0xff100000 FWH decode disabled +0xff400000/0xff000000 FWH decode disabled +Maximum FWH chip size: 0x400000 bytes +BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 +Root Complex Register Block address = 0xfed1c000 +GCS = 0x7b0461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI) +Top Swap : not enabled +SPIBAR = 0xfed1c000 + 0x3800 +0x04: 0xe008 (HSFS) +HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 +WARNING: SPI Configuration Lockdown activated. +Reading OPCODES... done +0x06: 0x3f04 (HSFC) +HSFC: FGO=0, FCYCLE=2, FDBC=63, SME=0 +0x08: 0x00000000 (FADDR) +0x50: 0x00001a1b (FRAP) +BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b +0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. +0x58: 0x07ff0600 FREG1: BIOS region (0x00600000-0x007fffff) is read-write. +0x5C: 0x05f50001 FREG2: WARNING: Management Engine region (0x00001000-0x005f5fff) is locked. +0x60: 0x05f705f6 FREG3: Gigabit Ethernet region (0x005f6000-0x005f7fff) is read-write. +0x64: 0x05ff05f8 FREG4: Platform Data region (0x005f8000-0x005fffff) is read-write. +0x74: 0x9fff07e0 PR0: WARNING: 0x007e0000-0x01ffffff is read-only. +0x84: 0x85ff85f8 PR4: WARNING: 0x005f8000-0x005fffff is locked. +Please send a verbose log to flashrom@flashrom.org if this board is not listed on +http://flashrom.org/Supported_hardware#Supported_mainboards yet. +Writes have been disabled. You can enforce write support with the +ich_spi_force programmer option, but it will most likely harm your hardware! +If you force flashrom you will get no support if something breaks. +0x90: 0x04 (SSFS) +SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 +0x91: 0x004240 (SSFC) +SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=2, SME=0, SCF=0 +0x94: 0x5006 (PREOP) +0x96: 0x143b (OPTYPE) +0x98: 0x05200302 (OPMENU) +0x9C: 0x0601209f (OPMENU+4) +0xA0: 0x00000000 (BBAR) +0xC4: 0x00002005 (LVSCC) +LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xC8: 0x00002005 (UVSCC) +UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xD0: 0x00000000 (FPB) + +SPI Read Configuration: prefetching disabled, caching enabled, OK. +The following protocols are supported: FWH, SPI. +Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Chip status register is 00 +Chip status register: Status Register Write Disable (SRWD) is not set +Chip status register: Bit 6 is not set +Chip status register: Block Protect 3 (BP3) is not set +Chip status register: Block Protect 2 (BP2) is not set +Chip status register: Block Protect 1 (BP1) is not set +Chip status register: Block Protect 0 (BP0) is not set +Chip status register: Write Enable Latch (WEL) is not set +Chip status register: Write In Progress (WIP/BUSY) is not set +Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000. +Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. +Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute. +Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. +Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. +Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. +Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not execute. +Receiving SFDP signature failed. +Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. +Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x0a, id2 0xce, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Found Macronix flash chip "MX25L6405" (8192 kB, SPI). +Reading flash... SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 +SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 +Running OPCODE 0x03 failed at address 0x001000 (payload length was 64). +FAILED. +Restoring MMIO space at 0x7f53b721c8a0 +Restoring PCI config space for 00:1f:0 reg 0xdc diff --git a/docs/hardware/hwdumps/x200/input_bustypes.log b/docs/hardware/hwdumps/x200/input_bustypes.log new file mode 100644 index 00000000..ebce5d5b --- /dev/null +++ b/docs/hardware/hwdumps/x200/input_bustypes.log @@ -0,0 +1,11 @@ +0019 +0000 +0000 +0019 +0019 +0011 +0011 +0019 +0019 +0000 +0000 diff --git a/docs/hardware/hwdumps/x200/inteltool.err.log b/docs/hardware/hwdumps/x200/inteltool.err.log new file mode 100644 index 00000000..b192da99 --- /dev/null +++ b/docs/hardware/hwdumps/x200/inteltool.err.log @@ -0,0 +1 @@ +bash: inteltool: command not found diff --git a/docs/hardware/hwdumps/x200/inteltool.log b/docs/hardware/hwdumps/x200/inteltool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/inteltool.log diff --git a/docs/hardware/hwdumps/x200/ioports.err.log b/docs/hardware/hwdumps/x200/ioports.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/ioports.err.log diff --git a/docs/hardware/hwdumps/x200/ioports.log b/docs/hardware/hwdumps/x200/ioports.log new file mode 100644 index 00000000..54e3a06a --- /dev/null +++ b/docs/hardware/hwdumps/x200/ioports.log @@ -0,0 +1,60 @@ +0000-0cf7 : PCI Bus 0000:00 + 0000-001f : dma1 + 0020-0021 : pic1 + 0040-0043 : timer0 + 0050-0053 : timer1 + 0060-0060 : keyboard + 0062-0062 : EC data + 0064-0064 : keyboard + 0066-0066 : EC cmd + 0070-0071 : rtc0 + 0080-008f : dma page reg + 00a0-00a1 : pic2 + 00c0-00df : dma2 + 00f0-00ff : fpu + 03c0-03df : vga+ + 0800-080f : pnp 00:01 +0cf8-0cff : PCI conf1 +0d00-ffff : PCI Bus 0000:00 + 1000-1003 : ACPI PM1a_EVT_BLK + 1004-1005 : ACPI PM1a_CNT_BLK + 1008-100b : ACPI PM_TMR + 1010-1015 : ACPI CPU throttle + 1020-102f : ACPI GPE0_BLK + 1030-1033 : iTCO_wdt + 1050-1050 : ACPI PM2_CNT_BLK + 1060-107f : iTCO_wdt + 1180-11ff : pnp 00:01 + 15e0-15ef : pnp 00:01 + 1600-167f : pnp 00:01 + 1680-169f : pnp 00:01 + 1800-1807 : 0000:00:02.0 + 1830-1837 : 0000:00:03.3 + 1830-1837 : serial + 1838-183b : 0000:00:1f.2 + 1838-183b : ahci + 183c-183f : 0000:00:1f.2 + 183c-183f : ahci + 1840-185f : 0000:00:19.0 + 1860-187f : 0000:00:1a.0 + 1860-187f : uhci_hcd + 1880-189f : 0000:00:1a.1 + 1880-189f : uhci_hcd + 18a0-18bf : 0000:00:1a.2 + 18a0-18bf : uhci_hcd + 18c0-18df : 0000:00:1d.0 + 18c0-18df : uhci_hcd + 18e0-18ff : 0000:00:1d.1 + 18e0-18ff : uhci_hcd + 1c00-1c1f : 0000:00:1d.2 + 1c00-1c1f : uhci_hcd + 1c20-1c3f : 0000:00:1f.2 + 1c20-1c3f : ahci + 1c40-1c47 : 0000:00:1f.2 + 1c40-1c47 : ahci + 1c48-1c4f : 0000:00:1f.2 + 1c48-1c4f : ahci + 1c60-1c7f : 0000:00:1f.3 + 2000-2fff : PCI Bus 0000:05 + 3000-3fff : PCI Bus 0000:02 + 4000-4fff : PCI Bus 0000:03 diff --git a/docs/hardware/hwdumps/x200/lspci.err.log b/docs/hardware/hwdumps/x200/lspci.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/lspci.err.log diff --git a/docs/hardware/hwdumps/x200/lspci.log b/docs/hardware/hwdumps/x200/lspci.log new file mode 100644 index 00000000..df6b6ccd --- /dev/null +++ b/docs/hardware/hwdumps/x200/lspci.log @@ -0,0 +1,2287 @@ +00:00.0 Host bridge [0600]: Intel Corporation Mobile 4 Series Chipset Memory Controller Hub [8086:2a40] (rev 07) + Subsystem: Lenovo Device [17aa:20e0] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0a <?> + Kernel driver in use: agpgart-intel +00: 86 80 40 2a 06 01 90 20 07 00 00 06 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e0 20 +30: 00 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00 00 00 00 00 00 00 00 00 00 00 +e20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ea0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +eb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ec0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ed0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ee0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ef0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller [8086:2a42] (rev 07) (prog-if 00 [VGA controller]) + Subsystem: Lenovo Device [17aa:20e4] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 45 + Region 0: Memory at f2000000 (64-bit, non-prefetchable) [size=4M] + Region 2: Memory at d0000000 (64-bit, prefetchable) [size=256M] + Region 4: I/O ports at 1800 [size=8] + Expansion ROM at <unassigned> [disabled] + Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4152 + Capabilities: [d0] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: i915 +00: 86 80 42 2a 07 04 90 00 07 00 00 03 00 00 80 00 +10: 04 00 00 f2 00 00 00 00 0c 00 00 d0 00 00 00 00 +20: 01 18 00 00 00 00 00 00 00 00 00 00 aa 17 e4 20 +30: 00 00 00 00 90 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 48 00 00 00 09 00 0a 11 88 64 00 1c +50: 01 00 50 03 19 00 00 00 00 00 00 00 00 00 00 7a +60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 05 d0 01 00 0c 30 e0 fe 52 41 00 00 00 00 00 00 +a0: 00 00 00 00 09 00 06 20 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 40 01 00 00 +d0: 01 00 23 00 00 00 00 00 00 00 00 00 34 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 80 00 1a 41 20 00 00 +f0: 0d 1c 34 07 eb 00 00 00 a0 0f 07 00 ea b0 b6 79 + +00:02.1 Display controller [0380]: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller [8086:2a43] (rev 07) + Subsystem: Lenovo Device [17aa:20e4] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Region 0: Memory at f2400000 (64-bit, non-prefetchable) [size=1M] + Capabilities: [d0] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- +00: 86 80 43 2a 07 00 90 00 07 00 80 03 00 00 80 00 +10: 04 00 40 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e4 20 +30: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 +40: 00 00 00 00 48 00 00 00 09 00 0a 11 88 64 00 1c +50: 01 00 50 03 19 00 00 00 00 00 00 00 00 00 00 7a +60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 40 01 00 00 +d0: 01 00 23 00 00 00 00 00 00 00 00 00 34 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 0d 1c 34 07 eb 00 00 00 a0 0f 07 00 00 00 00 00 + +00:03.0 Communication controller [0780]: Intel Corporation Mobile 4 Series Chipset MEI Controller [8086:2a44] (rev 07) + Subsystem: Lenovo Device [17aa:20e6] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 47 + Region 0: Memory at f2826800 (64-bit, non-prefetchable) [size=16] + Capabilities: [50] Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4172 + Kernel driver in use: mei_me +00: 86 80 44 2a 06 04 10 00 07 00 80 07 00 00 80 00 +10: 04 68 82 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e6 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 4a 0e 0a 30 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 8c 03 c8 08 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 05 00 81 00 +90: 0c 30 e0 fe 00 00 00 00 72 41 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:03.3 Serial controller [0700]: Intel Corporation Mobile 4 Series Chipset AMT SOL Redirection [8086:2a47] (rev 07) (prog-if 02 [16550]) + Subsystem: Lenovo Device [17aa:20ec] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 17 + Region 0: I/O ports at 1830 [size=8] + Region 1: Memory at f2624000 (32-bit, non-prefetchable) [size=4K] + Capabilities: [c8] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [d0] MSI: Enable- Count=1/1 Maskable- 64bit+ + Address: 0000000000000000 Data: 0000 + Kernel driver in use: serial +00: 86 80 47 2a 07 00 b0 00 07 02 00 07 00 00 00 00 +10: 31 18 00 00 00 40 62 f2 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 ec 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 23 00 08 00 00 00 +d0: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:19.0 Ethernet controller [0200]: Intel Corporation 82567LM Gigabit Network Connection [8086:10f5] (rev 03) + Subsystem: Lenovo Device [17aa:20ee] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 43 + Region 0: Memory at f2600000 (32-bit, non-prefetchable) [size=128K] + Region 1: Memory at f2625000 (32-bit, non-prefetchable) [size=4K] + Region 2: I/O ports at 1840 [size=32] + Capabilities: [c8] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- + Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 41a2 + Capabilities: [e0] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: e1000e +00: 86 80 f5 10 07 05 10 00 03 00 00 02 00 00 00 00 +10: 00 00 60 f2 00 50 62 f2 41 18 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 ee 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 22 c8 00 20 00 0d +d0: 05 e0 81 00 0c 30 e0 fe 00 00 00 00 a2 41 00 00 +e0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1a.0 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #4 [8086:2937] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 20 + Region 4: I/O ports at 1860 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 37 29 05 00 90 02 03 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1a.1 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #5 [8086:2938] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 21 + Region 4: I/O ports at 1880 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 38 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 81 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1a.2 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #6 [8086:2939] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin C routed to IRQ 22 + Region 4: I/O ports at 18a0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 39 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: a1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1a.7 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #2 [8086:293c] (rev 03) (prog-if 20 [EHCI]) + Subsystem: Lenovo Device [17aa:20f1] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 23 + Region 0: Memory at f2826c00 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Capabilities: [98] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ehci-pci +00: 86 80 3c 29 06 01 90 02 03 20 03 0c 00 00 00 00 +10: 00 6c 82 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f1 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 +60: 20 20 ff 00 00 00 00 00 01 00 00 01 00 00 00 c0 +70: 40 00 9f 0f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 88 85 40 00 86 0f 03 00 06 17 02 20 + +00:1b.0 Audio device [0403]: Intel Corporation 82801I (ICH9 Family) HD Audio Controller [8086:293e] (rev 03) + Subsystem: Lenovo Device [17aa:20f2] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Interrupt: pin B routed to IRQ 46 + Region 0: Memory at f2620000 (64-bit, non-prefetchable) [size=16K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4162 + Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed- WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [130 v1] Root Complex Link + Desc: PortNumber=0f ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: snd_hda_intel +00: 86 80 3e 29 06 05 10 00 03 00 03 04 10 00 00 00 +10: 04 00 62 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f2 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 01 00 00 07 00 00 00 00 00 00 00 00 00 80 00 00 +50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 +60: 05 70 81 00 0c 30 e0 fe 00 00 00 00 62 41 00 00 +70: 10 00 91 00 00 00 00 10 00 08 10 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 01 00 00 00 00 31 00 a3 02 00 00 00 00 +d0: 61 00 a3 02 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 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00 00 00 00 00 00 + +00:1c.0 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 1 [8086:2940] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 + I/O behind bridge: 00003000-00003fff + Memory behind bridge: 7c000000-7c1fffff + Prefetchable memory behind bridge: 000000007c200000-000000007c3fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #0, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41c1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=01 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 40 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 02 02 00 30 30 00 00 +20: 00 7c 10 7c 21 7c 31 7c 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 04 00 +40: 10 80 41 01 00 80 00 00 00 00 10 00 11 4c 11 01 +50: 00 00 01 10 e0 a0 00 00 38 00 00 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe c1 41 00 00 00 00 00 00 +90: 0d a0 00 00 aa 17 f3 20 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00 +e0: 00 0f c7 00 06 07 08 00 31 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 +100: 02 00 01 18 00 00 00 00 01 00 00 00 00 00 00 00 +110: 01 00 00 00 ff 00 00 80 00 00 00 00 00 00 00 00 +120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 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00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.1 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 2 [8086:2942] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 + I/O behind bridge: 00004000-00004fff + Memory behind bridge: f2500000-f25fffff + Prefetchable memory behind bridge: 000000007c400000-000000007c5fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #1, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- + Changed: MRL- PresDet- LinkState+ + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41d1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=02 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 42 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 03 03 00 40 40 00 00 +20: 50 f2 50 f2 41 7c 51 7c 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 02 04 00 +40: 10 80 41 01 00 80 00 00 00 00 10 00 11 2c 11 02 +50: 40 00 11 30 e0 a0 08 00 38 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00 00 00 +e40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ea0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +eb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ec0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ed0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ee0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ef0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.3 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 4 [8086:2946] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=05, subordinate=0c, sec-latency=0 + I/O behind bridge: 00002000-00002fff + Memory behind bridge: f0000000-f1ffffff + Prefetchable memory behind bridge: 00000000f2900000-00000000f29fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #3, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41e1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=04 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 46 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 05 0c 00 20 20 00 00 +20: 00 f0 f0 f1 91 f2 91 f2 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 04 04 00 +40: 10 80 41 01 00 80 00 00 00 00 10 00 11 4c 11 04 +50: 03 00 01 10 e0 a0 18 00 38 00 00 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe e1 41 00 00 00 00 00 00 +90: 0d a0 00 00 aa 17 f3 20 00 00 00 00 00 00 00 00 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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ea0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +eb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ec0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ed0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ee0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ef0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1d.0 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 [8086:2934] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 16 + Region 4: I/O ports at 18c0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 34 29 05 00 90 02 03 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: c1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1d.1 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 [8086:2935] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 17 + Region 4: I/O ports at 18e0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 35 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: e1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1d.2 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 [8086:2936] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin C routed to IRQ 18 + Region 4: I/O ports at 1c00 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 36 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 01 1c 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1d.7 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 [8086:293a] (rev 03) (prog-if 20 [EHCI]) + Subsystem: Lenovo Device [17aa:20f1] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 19 + Region 0: Memory at f2827000 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Capabilities: [98] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ehci-pci +00: 86 80 3a 29 06 01 90 02 03 20 03 0c 00 00 00 00 +10: 00 70 82 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f1 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 +60: 20 20 9f 00 00 00 00 00 01 00 00 01 00 00 00 c0 +70: c0 00 1f 0f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 88 85 40 00 86 0f 03 00 06 17 02 20 + +00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev 93) (prog-if 01 [Subtractive decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Bus: primary=00, secondary=0d, subordinate=0d, sec-latency=0 + I/O behind bridge: 0000f000-00000fff + Memory behind bridge: fff00000-000fffff + Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff + Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [50] Subsystem: Lenovo Device [17aa:20f4] +00: 86 80 48 24 07 01 10 00 93 01 04 06 00 00 01 00 +10: 00 00 00 00 00 00 00 00 00 0d 0d 00 f0 00 80 22 +20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 04 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 +50: 0d 00 00 00 aa 17 f4 20 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1f.0 ISA bridge [0601]: Intel Corporation ICH9M-E LPC Interface Controller [8086:2917] (rev 03) + Subsystem: Lenovo Device [17aa:20f5] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0c <?> + Kernel driver in use: lpc_ich +00: 86 80 17 29 07 00 10 02 03 00 01 06 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f5 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 10 00 00 80 00 00 00 81 11 00 00 10 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 8b 8b 8b 8b 90 00 00 00 8b 8b 8b 8b f8 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 10 00 0f 3f 01 16 7c 00 e1 15 0c 00 81 16 1c 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 24 0a 00 00 39 00 80 00 2b 1c 0a 00 00 03 00 c0 +b0: 00 00 f0 00 00 00 00 00 08 00 02 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 67 45 00 00 00 ff 00 00 00 00 00 00 +e0: 09 00 0c 10 00 02 c4 03 04 00 00 00 00 00 00 00 +f0: 01 c0 d1 fe 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1f.2 SATA controller [0106]: Intel Corporation 82801IBM/IEM (ICH9M/ICH9M-E) 4 port SATA Controller [AHCI mode] [8086:2929] (rev 03) (prog-if 01 [AHCI 1.0]) + Subsystem: Lenovo Device [17aa:20f8] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 44 + Region 0: I/O ports at 1c48 [size=8] + Region 1: I/O ports at 183c [size=4] + Region 2: I/O ports at 1c40 [size=8] + Region 3: I/O ports at 1838 [size=4] + Region 4: I/O ports at 1c20 [size=32] + Region 5: Memory at f2826000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit- + Address: fee0300c Data: 4142 + Capabilities: [70] Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004 + Capabilities: [b0] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ahci +00: 86 80 29 29 07 04 b0 02 03 01 06 01 00 00 00 00 +10: 49 1c 00 00 3d 18 00 00 41 1c 00 00 39 18 00 00 +20: 21 1c 00 00 00 60 82 f2 00 00 00 00 aa 17 f8 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 +80: 05 70 09 00 0c 30 e0 fe 42 41 00 00 00 00 00 00 +90: 60 0c 03 81 93 01 00 4c 00 00 00 00 0c 00 00 00 +a0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00 +b0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1f.3 SMBus [0c05]: Intel Corporation 82801I (ICH9 Family) SMBus Controller [8086:2930] (rev 03) + Subsystem: Lenovo Device [17aa:20f9] + Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 11 + Region 0: Memory at f2827400 (64-bit, non-prefetchable) [size=256] + Region 4: I/O ports at 1c60 [size=32] +00: 86 80 30 29 03 01 80 02 03 00 05 0c 00 00 00 00 +10: 04 74 82 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 1c 00 00 00 00 00 00 00 00 00 00 aa 17 f9 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 02 04 04 00 f0 00 08 08 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +03:00.0 Network controller [0280]: Intel Corporation PRO/Wireless 5100 AGN [Shiloh] Network Connection [8086:4237] + Subsystem: Intel Corporation WiFi Link 5100 AGN [8086:1211] + Physical Slot: 1 + Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 17 + Region 0: Memory at f2500000 (64-bit, non-prefetchable) [size=8K] + Capabilities: [c8] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [d0] MSI: Enable- Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4182 + Capabilities: [e0] Express (v1) Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 unlimited + ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- + LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <128ns, L1 <32us + ClockPM+ Surprise- LLActRep- BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + Capabilities: [100 v1] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn- + Capabilities: [140 v1] Device Serial Number 00-21-5d-ff-ff-b3-e0-86 +00: 86 80 37 42 02 01 10 00 00 00 80 02 10 00 00 00 +10: 04 00 50 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 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00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + diff --git a/docs/hardware/hwdumps/x200/lspnp.err.log b/docs/hardware/hwdumps/x200/lspnp.err.log new file mode 100644 index 00000000..9c0cb27f --- /dev/null +++ b/docs/hardware/hwdumps/x200/lspnp.err.log @@ -0,0 +1 @@ +bash: lspnp: command not found diff --git a/docs/hardware/hwdumps/x200/lspnp.log b/docs/hardware/hwdumps/x200/lspnp.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/lspnp.log diff --git a/docs/hardware/hwdumps/x200/lsusb.err.log b/docs/hardware/hwdumps/x200/lsusb.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/lsusb.err.log diff --git a/docs/hardware/hwdumps/x200/lsusb.log b/docs/hardware/hwdumps/x200/lsusb.log new file mode 100644 index 00000000..e64c87dd --- /dev/null +++ b/docs/hardware/hwdumps/x200/lsusb.log @@ -0,0 +1,820 @@ + +Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0002 2.0 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency ehci_hcd + iProduct 2 EHCI Host Controller + iSerial 1 0000:00:1d.7 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0004 1x 4 bytes + bInterval 12 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 6 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 10 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x38 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power + Port 3: 0000.0100 power + Port 4: 0000.0100 power + Port 5: 0000.0100 power + Port 6: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 008 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.2 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x02 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 007 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.1 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x06 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 006 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0002 2.0 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency ehci_hcd + iProduct 2 EHCI Host Controller + iSerial 1 0000:00:1a.7 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0004 1x 4 bytes + bInterval 12 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 6 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 10 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x58 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power + Port 3: 0000.0100 power + Port 4: 0000.0100 power + Port 5: 0000.0100 power + Port 6: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 005 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.2 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x04 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 004 Device 002: ID 0a5c:2145 Broadcom Corp. BCM2045B (BDC-2.1) [Bluetooth Controller] +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 224 Wireless + bDeviceSubClass 1 Radio Frequency + bDeviceProtocol 1 Bluetooth + bMaxPacketSize0 64 + idVendor 0x0a5c Broadcom Corp. + idProduct 0x2145 BCM2045B (BDC-2.1) [Bluetooth Controller] + bcdDevice 3.52 + iManufacturer 1 Lenovo Computer Corp + iProduct 2 ThinkPad Bluetooth with Enhanced Data Rate II + iSerial 0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 216 + bNumInterfaces 4 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 100mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 3 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0010 1x 16 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x82 EP 2 IN + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x02 EP 2 OUT + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 0 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0000 1x 0 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0000 1x 0 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 1 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0009 1x 9 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0009 1x 9 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 2 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0011 1x 17 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0011 1x 17 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 3 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 4 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 5 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 2 + bAlternateSetting 0 + bNumEndpoints 2 + bInterfaceClass 255 Vendor Specific Class + bInterfaceSubClass 255 Vendor Specific Subclass + bInterfaceProtocol 255 Vendor Specific Protocol + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x84 EP 4 IN + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x04 EP 4 OUT + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 3 + bAlternateSetting 0 + bNumEndpoints 0 + bInterfaceClass 254 Application Specific Interface + bInterfaceSubClass 1 Device Firmware Update + bInterfaceProtocol 0 + iInterface 0 + Device Firmware Upgrade Interface Descriptor: + bLength 7 + bDescriptorType 33 + bmAttributes 7 + Will Not Detach + Manifestation Tolerant + Upload Supported + Download Supported + wDetachTimeout 5000 milliseconds + wTransferSize 64 bytes +Device Status: 0x0001 + Self Powered + +Bus 004 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.1 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x06 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0103 power enable connect +Device Status: 0x0001 + Self Powered + +Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered diff --git a/docs/hardware/hwdumps/x200/msrtool.err.log b/docs/hardware/hwdumps/x200/msrtool.err.log new file mode 100644 index 00000000..14418aae --- /dev/null +++ b/docs/hardware/hwdumps/x200/msrtool.err.log @@ -0,0 +1 @@ +bash: msrtool: command not found diff --git a/docs/hardware/hwdumps/x200/msrtool.log b/docs/hardware/hwdumps/x200/msrtool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/msrtool.log diff --git a/docs/hardware/hwdumps/x200/nvramtool.err.log b/docs/hardware/hwdumps/x200/nvramtool.err.log new file mode 100644 index 00000000..fb45ec80 --- /dev/null +++ b/docs/hardware/hwdumps/x200/nvramtool.err.log @@ -0,0 +1 @@ +bash: nvramtool: command not found diff --git a/docs/hardware/hwdumps/x200/nvramtool.log b/docs/hardware/hwdumps/x200/nvramtool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/nvramtool.log diff --git a/docs/hardware/hwdumps/x200/pin_hwC0D0 b/docs/hardware/hwdumps/x200/pin_hwC0D0 new file mode 100644 index 00000000..7a212707 --- /dev/null +++ b/docs/hardware/hwdumps/x200/pin_hwC0D0 @@ -0,0 +1,8 @@ +0x16 0x042140f0 +0x17 0x61a190f0 +0x18 0x04a190f0 +0x19 0x612140f0 +0x1a 0x901701f0 +0x1b 0x40f001f0 +0x1c 0x40f001f0 +0x1d 0x90a601f0 diff --git a/docs/hardware/hwdumps/x200/superiotool.err.log b/docs/hardware/hwdumps/x200/superiotool.err.log new file mode 100644 index 00000000..a45039d4 --- /dev/null +++ b/docs/hardware/hwdumps/x200/superiotool.err.log @@ -0,0 +1 @@ +bash: superiotool: command not found diff --git a/docs/hardware/hwdumps/x200/superiotool.log b/docs/hardware/hwdumps/x200/superiotool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hardware/hwdumps/x200/superiotool.log diff --git a/docs/hardware/imac52.md b/docs/hardware/imac52.md new file mode 100644 index 00000000..a868b128 --- /dev/null +++ b/docs/hardware/imac52.md @@ -0,0 +1,8 @@ +--- +title: Apple iMac 5,2 +... + +Information to be written soon, but this board is merged in libreboot. + +Copyright © 2016 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/images/x200/gpio33_location.jpg b/docs/hardware/images/x200/gpio33_location.jpg Binary files differnew file mode 100644 index 00000000..2f36bda8 --- /dev/null +++ b/docs/hardware/images/x200/gpio33_location.jpg diff --git a/docs/hardware/index.md b/docs/hardware/index.md new file mode 100644 index 00000000..7e41ad35 --- /dev/null +++ b/docs/hardware/index.md @@ -0,0 +1,542 @@ +--- +title: Hardware compatibility list +... + +This sections relates to known hardware compatibility in libreboot. + +For installatation instructions, refer to [../install/](../install/). + +- [List of supported hardware](#supported_list) + - [Desktops (x86, AMD and Intel)](#supported_desktops_x86amdintel) + - [Servers/workstations](#supported_workstations_x86amd) + - [Laptops (ARM)](#supported_laptops_arm) + - [Laptops (Intel, x86)](#supported_laptops_x86intel) + +- NOTES: + - [Updating the EC firmware on i945 and GM45 + (recommended)](#ecupdate) + - [How to find what EC version you have (i945/GM45)](#ecversion) +- [Recommended wifi chipsets](#recommended_wifi) + +List of supported hardware {#supported_list} +-------------------------- + +Libreboot supports the following systems in this release: + +### Desktops (AMD, Intel, x86) {#supported_desktops_x86amdintel} + +- [Gigabyte GA-G41M-ES2L motherboard](ga-g41m-es2l.html) +- [Intel D510MO motherboard](d510mo.html) +- [ASUS KCMA-D8 motherboard](kcma-d8.html) +- [Intel D945GCLF](d945gclf.html) +- [Apple iMac 5,2](imac52.html) + +### Servers/workstations (AMD, x86) {#supported_workstations_x86amd} + +- [ASUS KFSN4-DRE motherboard](kfsn4-dre.html) +- [ASUS KGPE-D16 motherboard](kgpe-d16.html) + +### Laptops (ARM) {#supported_laptops_arm} + +- [ASUS Chromebook C201](c201.html) + +### Laptops (Intel, x86) {#supported_laptops_x86intel} + +- [Lenovo ThinkPad X60/X60s](#supported_x60_list) +- [Lenovo ThinkPad X60 Tablet](#supported_x60t_list) +- [Lenovo ThinkPad T60](#supported_t60_list) (there are exceptions. + see link) +- [Lenovo ThinkPad X200](x200.html) +- [Lenovo ThinkPad R400](r400.html) +- [Lenovo ThinkPad T400](t400.html) +- [Lenovo ThinkPad T500](t500.html) +- [Apple MacBook1,1](#macbook11) +- [Apple MacBook2,1](#macbook21) + +'Supported' means that the build scripts know how to build ROM images +for these systems, and that the systems have been tested (confirmed +working). There may be exceptions; in other words, this is a list of +'officially' supported systems. + +It is also possible to build ROM images (from source) for other systems +(and virtual systems, e.g. QEMU). + +EC update on i945 (X60, T60) and GM45 (X200, T400, T500, R400) {#ecupdate} +============================================================== + +It is recommended that you update to the latest EC firmware version. The +[EC firmware](../../faq/#firmware-ec) is separate from +libreboot, so we don't actually provide that, but if you still have +Lenovo BIOS then you can just run the Lenovo BIOS update utility, which +will update both the BIOS and EC version. See: + +- [../install/index.html#flashrom](../install/index.html#flashrom) +- <http://www.thinkwiki.org/wiki/BIOS_update_without_optical_disk> + +NOTE: this can only be done when you are using Lenovo BIOS. How to +update the EC firmware while running libreboot is unknown. Libreboot +only replaces the BIOS firmware, not EC. + +Updated EC firmware has several advantages e.g. bettery battery +handling. + +How to find what EC version you have (i945/GM45) {#ecversion} +================================================ + +In GNU+Linux, you can try this:\ +**grep 'at EC' /proc/asound/cards** + +Sample output:\ +**ThinkPad Console Audio Control at EC reg 0x30, fw 7WHT19WW-3.6** + +7WHT19WW is the version in different notation, use search engine to find +out regular version - in this case it's a 1.06 for x200 tablet + +Recommended wifi chipsets {#recommended_wifi} +------------------------- + +The following are known to work well: + +- mini PCI express cards using the Atheros AR9285 chipset (e.g. + Atheros AR5B95) - 802.11n +- USB dongles using the AR9271 chipset (e.g. Unex DNuA 93-F) - 802.11n +- Any of the chipsets listed at + <https://h-node.org/wifi/catalogue/en/1/1/undef/undef/yes?> + +The following was mentioned (on IRC), but it's unknown to the libreboot +project if these work with linux-libre kernel (TODO: test): + +- ar5bhb116 ar9382 ABGN +- \[0200\]: Qualcomm Atheros AR242x / AR542x Wireless Network Adapter + (PCI-Express) \[168c:001c\] + +List of supported ThinkPad X60s {#supported_x60_list} +------------------------------- + +Native gpu initialization ('native graphics') which replaces the +proprietary VGA Option ROM ('[Video +BIOS](https://en.wikipedia.org/wiki/Video_BIOS)' or 'VBIOS'), all +known LCD panels are currently compatible: + +To find what LCD panel you have, see: +[../misc/\#get\_edid\_panelname](../misc/#get_edid_panelname). + +- TMD-Toshiba LTD121ECHB: \# +- CMO N121X5-L06: \# +- Samsung LTN121XJ-L07: \# +- BOE-Hydis HT121X01-101: \# + +You can remove an X61/X61s motherboard from the chassis and install an +X60/X60s motherboard in it's place (for flashing libreboot). The +chassis is mostly identical and the motherboards are the same +shape/size. + +The X60 typically comes with an Intel wifi chipset which does not work +at all without proprietary firmware, and while Lenovo BIOS is running +the system will refuse to boot if you replace the card. Fortunately it +is very easily replaced; just remove the card and install another one +**after** libreboot is installed. See +[\#recommended\_wifi](#recommended_wifi) for replacements. + +List of supported ThinkPad X60 Tablets {#supported_x60t_list} +-------------------------------------- + +Native gpu initialization ('native graphics') which replaces the +proprietary VGA Option ROM ('[Video +BIOS](https://en.wikipedia.org/wiki/Video_BIOS)' or 'VBIOS'). + +To find what LCD panel you have, see: +[../misc/\#get\_edid\_panelname](../misc/#get_edid_panelname). + +There are 5 known LCD panels for the X60 Tablet: + +- **X60T XGA (1024x768):** + - BOE-Hydis HV121X03-100 (works) + - Samsung LTN121XP01 (does not work. blank screen) + - BOE-Hydis HT12X21-351 (does not work. blank screen) +- **X60T SXGA+ (1400x1050):** + - BOE-Hydis HV121P01-100 (works) + - BOE-Hydis HV121P01-101 (works) + +Most X60Ts only have digitizer (pen), but some have finger (touch) +aswell as pen; finger/multitouch doesn't work, only digitizer (pen) +does. + +You can remove an X61/X61s motherboard from the chassis and install an +X60/X60s motherboard in its place (for flashing libreboot). The chassis +is mostly identical and the motherboards are the same shape/size. **It +is unknown if the same applies between the X60 Tablet and the X61 +Tablet**. + +The X60 Tablet typically comes with an Intel wifi chipset which does not +work at all without proprietary firmware, and while Lenovo BIOS is +running the system will refuse to boot if you replace the card. +Fortunately it is very easily replaced; just remove the card and install +another one **after** libreboot is installed. See +[\#recommended\_wifi](#recommended_wifi) for replacements. + +A user with a X60T that has digitizer+finger support, reported that they +could get finger input working. They used linuxwacom at git tag +0.25.99.2 and had the following in their xorg.conf: + + # Now, for some reason (probably a bug in linuxwacom), + # the 'Touch=on' directive gets reset to 'off'. + # So you'll need to do + # $ xsetwacom --set WTouch Touch on + # + # tested with linuxwacom git 42a42b2a8636abc9e105559e5dea467163499de7 + + Section "Monitor" + Identifier "<default monitor>" + DisplaySize 245 184 + EndSection + + Section "Screen" + Identifier "Default Screen Section" + Monitor "<default monitor<" + EndSection + + Section "InputDevice" + Identifier "WTouch" + Driver "wacom" + Option "Device" "/dev/ttyS0" + # Option "DebugLevel" "12" + Option "BaudRate" "38400" + Option "Type" "touch" + Option "Touch" "on" + Option "Gesture" "on" + Option "ForceDevice" "ISDV4" + # Option "KeepShape" "on" + Option "Mode" "Absolute" + Option "RawSample" "2" + # Option "TPCButton" "off" + Option "TopX" "17" + Option "TopY" "53" + Option "BottomX" "961" + Option "BottomY" "985" + EndSection + + Section "ServerLayout" + Identifier "Default Layout" + Screen "Default Screen Section" + InputDevice "WTouch" "SendCoreEvents" + EndSection + +Supported T60 list {#supported_t60_list} +------------------ + +Native gpu initialization ('native graphics') which replaces the +proprietary VGA Option ROM ('[Video +BIOS](https://en.wikipedia.org/wiki/Video_BIOS)' or 'VBIOS'). + +To find what LCD panel you have, see: +[../misc/\#get\_edid\_panelname](../misc/#get_edid_panelname). + +**Some T60s have ATI GPUs, and all T60P laptops have ATI GPUs These are +incompatible! See [\#t60\_ati\_intel](#t60_ati_intel) for how to remedy +this.** + +Tested LCD panels: **working(compatible)** + +- TMD-Toshiba LTD141EN9B (14.1" 1400x1050) (FRU P/N 41W1478 + recommended for the inverter board) +- Samsung LTN141P4-L02 (14.1" 1400x1050) (FRU P/N 41W1478 recommended + for the inverter board) +- LG-Philips LP150E05-A2K1 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 + or P/N 41W1338 recommended for the inverter board) +- Samsung LTN150P4-L01 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 or + P/N 41W1338 recommended for the inverter board) (not a T60 screen + afaik, but it works) +- BOE-Hydis HV150UX1-100 (15.1" 1600x1200) (P/N 42T0078 FRU 42T0079 + or P/N 41W1338 recommended for the inverter board) + +Tested LCD panels: **not working yet (incompatible; see +[../future/\#lcd\_i945\_incompatibility](../future/#lcd_i945_incompatibility))** + +- Samsung LTN141XA-L01 (14.1" 1024x768) +- LG-Philips LP150X09 (15.1" 1024x768) +- Samsung LTN150XG (15.1" 1024x768) +- LG-Philips LP150E06-A5K4 (15.1" 1400x1050) (also, not an official + T60 screen) +- Samsung LTN154X3-L0A (15.4" 1280x800) +- IDtech IAQX10N (15.1" 2048x1536) (no display in GRUB, display in + GNU+Linux is temperamental) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 + recommended for the inverter board) +- IDtech N150U3-L01 (15.1" 1600x1200) (no display in GRUB, display in + GNU+Linux works) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended + for the inverter board) + +*The following LCD panels are **UNTESTED**. If you have one of these +panels then please submit a report!*: + +- CMO(IDtech?) N141XC (14.1" 1024x768) +- BOE-Hydis HT14X14 (14.1" 1024x768) +- TMD-Toshiba LTD141ECMB (14.1" 1024x768) +- Boe-Hydis HT14P12 (14.1" 1400x1050) (FRU P/N 41W1478 recommended + for the inverter board) +- CMO (IDtech?) 13N7068 (15.1" 1024x768) +- CMO (IDtech?) 13N7069 (15.1" 1024x768) +- BOE-Hydis HV150P01-100 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 + or P/N 41W1338 recommended for the inverter board) +- BOE-Hydis HV150UX1-102 (15.1" 1600x1200) (P/N 42T0078 FRU 42T0079 + or P/N 41W1338 recommended for the inverter board) +- IDtech IAQX10S (15.1" 2048x1536) (P/N 42T0078 FRU 42T0079 or P/N + 41W1338 recommended for the inverter board) +- Samsung LTN154P2-L05 (42X4641 42T0329) (15.4" 1680x1050) +- LG-Philips LP154W02-TL10 (13N7020 42T0423) (15.4" 1680x1050) +- LG-Philips LP154WU1-TLB1 (42T0361) (15.4" 1920x1200) **(for T61p + but it might work in T60. Unknown!)** +- Samsung LTN154U2-L05 (42T0408 42T0574) (15.4" 1920x1200) **(for + T61p but it might work in T60. Unknown!)** + +It is unknown whether the 1680x1050 (15.4") and 1920x1200 (15.4") +panels use a different inverter board than the 1280x800 panels. + +The T60 typically comes with an Intel wifi chipset which does not work +at all without proprietary firmware, and while Lenovo BIOS is running +the system will refuse to boot if you replace the card. Fortunately it +is very easily replaced; just remove the card and install another one +**after** libreboot is installed. See +[\#recommended\_wifi](#recommended_wifi) for replacements. + +ThinkPad T60 (ATI GPU) and ThinkPad T60 (Intel GPU) differences. {#t60_ati_intel} +---------------------------------------------------------------- + +If your T60 is a 14.1" or 15.1" model with an ATI GPU, it won't work +with libreboot by default but you can replace the motherboard with +another T60 motherboard that has an Intel GPU, and then libreboot should +work. + +As far as I know, 14.1" (Intel GPU) and 15.1" (Intel GPU) T60 +motherboards are the same, where 'spacers' are used on the 15.1" T60. +In any case, it makes sense to find one that is guaranteed to fit in +your chassis. + +There is also a 15.4" T60 with Intel GPU. + +Note: the T60**p** laptops all have ATI graphics. The T60p laptops +cannot be used with libreboot under any circumstances. + +The following T60 motherboard (see area highlighted in white) shows an +empty space where the ATI GPU would be (this particular motherboard has +an Intel GPU):\ +\ + + +The reason that the ATI GPU on T60 is unsupported is due to the VBIOS +(Video BIOS) which is non-free. The VBIOS for the Intel GPU on X60/T60 +has been reverse engineered, and replaced with Free Software and so will +work in libreboot. + +The 'Video BIOS' is what initializes graphics. + +See: <https://en.wikipedia.org/wiki/Video_BIOS>.\ +In fact, lack of free VBIOS in general is a big problem in coreboot, and +is one reason (among others) why many ports for coreboot are unsuitable +for libreboot's purpose. + +Theoretically, the ThinkPad T60 with ATI GPU can work with libreboot and +have ROM images compiled for it, however in practise it would not be +usable as a laptop because there would be no visual display at all. That +being said, such a configuration is acceptable for use in a 'headless' +server setup (with serial and/or ssh console as the display). + +Information about the macbook1,1 {#macbook11} +-------------------------------- + +There is an Apple laptop called the macbook1,1 from 2006 which uses the +same i945 chipset as the ThinkPad X60/T60. A developer ported the +[MacBook2,1](#macbook21) to coreboot, the ROM images also work on the +macbook1,1. + +You can refer to [\#macbook21](#macbook21) for most of this. Macbook2,1 +laptops come with Core 2 Duo processors which support 64-bit operating +systems (and 32-bit). The MacBook1,1 uses Core Duo processors (supports +32-bit OS but not 64-bit), and it is believed that this is the only +difference. + +It is believed that all models are compatible, listed here: + +- <http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook1,1> + +### Compatible models + +Specifically (Order No. / Model No. / CPU): + +- MA255LL/A / A1181 (EMC 2092) / Core Duo T2500 **(tested - working)** +- MA254LL/A / A1181 (EMC 2092) / Core Duo T2400 **(tested - working)** +- MA472LL/A / A1181 (EMC 2092) / Core Duo T2500 (untested) + +Also of interest: +[../git/\#config\_macbook21](../git/#config_macbook21). + +Unbricking: [this page shows disassembly +guides](https://www.ifixit.com/Device/MacBook_Core_2_Duo) and mono's +page (see [\#macbook21](#macbook21)) shows the location of the SPI flash +chip on the motherboard. [How to remove the +motherboard](https://www.ifixit.com/Guide/MacBook+Core+2+Duo+PRAM+Battery+Replacement/529). + +No method is yet known for flashing in GNU+Linux while the Apple +firmware is running. You will need to disassemble the system and flash +externally. Reading from flash seems to work. For external flashing, +refer to [../install/bbb\_setup.html](../install/bbb_setup.html). + +Information about the macbook2,1 {#macbook21} +-------------------------------- + +There is an Apple laptop called the macbook2,1 from late 2006 or early +2007 that uses the same i945 chipset as the ThinkPad X60 and ThinkPad +T60. A developer ported coreboot to their macbook2,1, and now libreboot +can run on it. + +Mono Moosbart is the person who wrote the port for macbook2,1. +Referenced below are copies (up to date at the time of writing, +20140630) of the pages that this person wrote when porting coreboot to +the macbook2,1. They are included here in case the main site goes down +for whatever reason, since they include a lot of useful information. + +Backups created using wget: + + $ wget -m -p -E -k -K -np http://macbook.donderklumpen.de/ +**\$ wget -m -p -E -k -K -np +http://macbook.donderklumpen.de/coreboot/**\ +Use **-e robots=off** if using this trick for other sites and the site +restricts using robots.txt + +**Links to wget backups (and the backups themselves) of Mono's pages +(see above) removed temporarily. Mono has given me permission to +distribute them, but I need to ask this person to tell me what license +these works fall under first. Otherwise, the above URLs should be fine. +NOTE TO SELF: REMOVE THIS WHEN DONE** + +### Installing GNU+Linux distributions (on Apple EFI firmware) + +- [Parabola GNU+Linux installation on a macbook2,1 with Apple EFI + firmware](#) (this is a copy of Mono's page, see above) + +How to boot an ISO: burn it to a CD (like you would normally) and hold +down the Alt/Control key while booting. The bootloader will detect the +GNU+Linux CD as 'Windows' (because Apple doesn't think GNU+Linux +exists). Install it like you normally would. When you boot up again, +hold Alt/Control once more. The installation (on the HDD) will once +again be seen as 'Windows'. (it's not actually Windows, but Apple +likes to think that Apple and Microsoft are all that exist.) Now to +install libreboot, follow +[../install/\#flashrom\_macbook21](../install/#flashrom_macbook21). + +### Information about coreboot + +- [Coreboot on the macbook2,1](#) (this is a copy of Mono's page, see + above) + +### coreboot wiki page + +- <https://www.coreboot.org/Board:apple/macbook21> + +### Compatible models + +It is believed that all models are compatible, listed here: + +- <http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook2,1> + +Specifically (Order No. / Model No. / CPU): + +- MA699LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T5600 **(tested - + working)** +- MA701LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T7200 **(tested - + working)** +- MB061LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7200 (untested) +- MA700LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T7200 **(tested - + working)** +- MB063LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7400 (works) +- MB062LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7400 **(tested - + working)** + +Also of interest: +[../git/\#config\_macbook21](../git/#config_macbook21). + +Unbricking: [this page shows disassembly +guides](https://www.ifixit.com/Device/MacBook_Core_2_Duo) and mono's +page (see above) shows the location of the SPI flash chip on the +motherboard. [How to remove the +motherboard](https://www.ifixit.com/Guide/MacBook+Core+2+Duo+PRAM+Battery+Replacement/529). + +For external flashing, refer to +[../install/bbb\_setup.html](../install/bbb_setup.html). + +You need to replace OS X with GNU+Linux before flashing libreboot. (OSX +won't run at all in libreboot). + +There are some issues with this system (compared to other computers that +libreboot supports): + +This is an apple laptop, so it comes with OS X: it has an Apple +keyboard, which means that certain keys are missing: insert, del, home, +end, pgup, pgdown. There is also one mouse button only. Battery life is +poor compared to X60/T60 (for now). It also has other issues: for +example, the Apple logo on the back is a hole, exposing the backlight, +which means that it glows. You should cover it up. + +The system does get a bit hotter compared to when running the original +firmware. It is certainly hotter than an X60/T60. The heat issues have +been partially fixed by the following patch (now merged in libreboot): +<https://review.coreboot.org/#/c/7923/>. + +**The MacBook2,1 comes with a webcam, which does not work without +proprietary software. Also, webcams are a security risk; cover it up! Or +remove it.** + +A user reported that they could get better response from the touchpad +with the following in their xorg.conf: + + Section "InputClass" + Identifier "Synaptics Touchpad" + Driver "synaptics" + MatchIsTouchpad "on" + MatchDevicePath "/dev/input/event*" + Driver "synaptics" + # The next two values determine how much pressure one needs + # for tapping, moving the cursor and other events. + Option "FingerLow" "10" + Option "FingerHigh" "15" + # Do not emulate mouse buttons in the touchpad corners. + Option "RTCornerButton" "0" + Option "RBCornerButton" "0" + Option "LTCornerButton" "0" + Option "LBCornerButton" "0" + # One finger tap = left-click + Option "TapButton1" "1" + # Two fingers tap = right-click + Option "TapButton2" "3" + # Three fingers tap = middle-mouse + Option "TapButton3" "2" + # Try to not count the palm of the hand landing on the touchpad + # as a tap. Not sure if helps. + Option "PalmDetect" "1" + # The following modifies how long and how fast scrolling continues + # after lifting the finger when scrolling + Option "CoastingSpeed" "20" + Option "CoastingFriction" "200" + # Smaller number means that the finger has to travel less distance + # for it to count as cursor movement. Larger number prevents cursor + # shaking. + Option "HorizHysteresis" "10" + Option "VertHysteresis" "10" + # Prevent two-finger scrolling. Very jerky movement + Option "HorizTwoFingerScroll" "0" + Option "VertTwoFingerScroll" "0" + # Use edge scrolling + Option "HorizEdgeScroll" "1" + Option "VertEdgeScroll" "1" + EndSection + +A user reported that the above is only for linux kernel 3.15 or lower. +For newer kernels, the touchpad works fine out of the box, except middle +tapping. + +A user submitted a utility to enable 3-finger tap on this laptop. It's +available at *resources/utilities/macbook21-three-finger-tap* in the +libreboot git repository. + +Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/kcma-d8.md b/docs/hardware/kcma-d8.md new file mode 100644 index 00000000..9745c9a1 --- /dev/null +++ b/docs/hardware/kcma-d8.md @@ -0,0 +1,99 @@ +--- +title: ASUS KCMA-D8 desktop/workstation board +... + +This is a desktop board using AMD hardware (Fam10h **and Fam15h** CPUs +available). It can also be used for building a high-powered workstation. +Powered by libreboot. The coreboot port was done by Timothy Pearson of +Raptor Engineering Inc. and, working with them, merged into libreboot. + +**Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules.** + +Flashing instructions can be found at +[../install/\#flashrom](../install/#flashrom) - note that external +flashing is required (e.g. BBB), if the proprietary (ASUS) firmware is +currently installed. If you already have libreboot, by default it is +possible to re-flash using software running in GNU+Linux on the kcma-d8, +without using external hardware. + +CPU compatibility +================= + +**Use Opteron 4200 series (works without microcode updates, including hw +virt).** 4300 series needs microcode updates, so avoid those CPUs. 4100 +series is too old, and mostly untested. + +Board status (compatibility) {#boardstatus} +============================ + +See <https://raptorengineeringinc.com/coreboot/kcma-d8-status.php>. + +Form factor {#formfactor} +=========== + +These boards use the SSI EEB 3.61 form factor; make sure that your case +supports this. This form factor is similar to E-ATX in that the size is +identical, but the position of the screws are different. + +IPMI iKVM module add-on {#ipmi} +======================= + +Don't use it. It uses proprietary firmware and adds a backdoor (remote +out-of-band management chip, similar to the [Intel Management +Engine](../../faq/#intelme). Fortunately, the firmware is +unsigned (possibly to replace) and physically separate from the +mainboard since it's on the add-on module, which you don't have to +install. + +Flash chips {#flashchips} +=========== + +2MiB flash chips are included by default, on these boards. It's on a +P-DIP 8 slot (SPI chip). The flash chip can be upgraded to higher sizes: +4MiB, 8MiB or 16MiB. With at least 8MiB, you could feasibly fit a +compressed linux+initramfs image (BusyBox+Linux system) into CBFS and +boot that, loading it into memory. + +Libreboot has configs for 2, 4, 8 and 16 MiB flash chip sizes (default +flash chip is 2MiB). + +**DO NOT hot-swap the chip with your bare hands. Use a P-DIP 8 chip +extractor. These can be found online. See +<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>** + +Native graphics initialization {#graphics} +============================== + +Only text-mode is known to work, but linux(kernel) can initialize the +framebuffer display (if it has KMS - kernel mode setting). + +Current issues {#issues} +============== + +- LRDIMM memory modules are currently incompatible +- SAS (via PIKE 2008 module) requires non-free option ROM (and + SeaBIOS) to boot from it (theoretically possible to replace, but you + can put a kernel in CBFS or on SATA and use that to boot GNU, which + can be on a SAS drive. The linux kernel can use those SAS drives + (via PIKE module) without an option ROM). + +- IPMI iKVM module (optional add-on card) uses proprietary firmware. + Since it's for remote out-of-band management, it's theoretically a + backdoor similar to the Intel Management Engine. Fortunately, unlike + the ME, this firmware is unsigned which means that a free + replacement is theoretically possible. For now, the libreboot + project recommends not installing the module. [This + project](https://github.com/facebook/openbmc) might be interesting + to derive from, for those who want to work on a free replacement. In + practise, out-of-band management isn't very useful anyway (or at + the very least, it's not a major inconvenience to not have it). +- Graphics: only text-mode works. See [\#graphics](#graphics) + +Hardware specifications {#specifications} +----------------------- + +Check the ASUS website. + +Copyright © 2016 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/kfsn4-dre.md b/docs/hardware/kfsn4-dre.md new file mode 100644 index 00000000..f180f3f0 --- /dev/null +++ b/docs/hardware/kfsn4-dre.md @@ -0,0 +1,72 @@ +--- +title: ASUS KFSN4-DRE server/workstation board +... + +This is a server board using AMD hardware (Fam10h). It can also be used +for building a high-powered workstation. Powered by libreboot. + +Flashing instructions can be found at +[../install/\#flashrom](../install/#flashrom) + +Form factor {#formfactor} +=========== + +These boards use the SSI EEB 3.61 form factor; make sure that your case +supports this. This form factor is similar to E-ATX in that the size is +identical, but the position of the screws are different. + +Flash chips {#flashchips} +=========== + +These boards use LPC flash (not SPI), in a PLCC socket. The default +flash size 1MiB (8Mbits), and can be upgraded to 2MiB (16Mbits). +SST49LF080A is the default that the board uses. SST49LF016C is an +example of a 2MiB (16Mbits) chip, which might work. It is believed that +2MiB (16Mbits) is the maximum size available for the flash chip. + +**DO NOT hot-swap the chip with your bare hands. Use a PLCC chip +extractor. These can be found online. See +<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>** + +Native graphics initialization {#graphics} +============================== + +Native graphics initialization exists (XGI Z9s) for this board. +Framebuffer- and text-mode both work. A serial port is also available. + +Memory +====== + +DDR2 533/667 Registered ECC. 16 slots. Total capacity up to 64GiB. + +Hex-core CPUs {#hexcore} +============= + +PCB revision 1.05G is the best version of this board (the revision +number will be printed on the board), because it can use dual hex-core +CPUs (Opteron 2400/8400 series). Other revisions are believed to only +support dual quad-core CPUs. + +Current issues {#issues} +============== + +- There seems to be a 30 second bootblock delay (observed by + tpearson); the system otherwise boots and works as expected. See + [text/kfsn4-dre/bootlog.txt](text/kfsn4-dre/bootlog.txt) - this uses + the 'simple' bootblock, while tpearson uses the 'normal' + bootblock, which tpearson suspects may be a possible cause. This + person says that they will look into it. [This + config](http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asus/kfsn4-dre/4.0-10101-g039edeb/2015-06-27T03:59:16Z/config.txt;h=4742905c185a93fbda8eb14322dd82c70641aef0;hb=055f5df4e000a97453dfad6c91c2d06ea22b8545) + doesn't have the issue. + +- Text-mode is a bit jittery (but still usable). (the jitter + disappears if using KMS, once the kernel starts. The jitter will + remain, if booting the kernel in text-mode). + +Other information +================= + +[specifications](ftp://ftp.sgi.com/public/Technical%20Support/Pdf%20files/Asus/kfsn4-dre.pdf) + +Copyright © 2015 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/kgpe-d16.md b/docs/hardware/kgpe-d16.md new file mode 100644 index 00000000..04a8c9be --- /dev/null +++ b/docs/hardware/kgpe-d16.md @@ -0,0 +1,213 @@ +--- +title: ASUS KGPE-D16 server/workstation board +... + +This is a server board using AMD hardware (Fam10h **and Fam15h** CPUs +available). It can also be used for building a high-powered workstation. +Powered by libreboot. The coreboot port was done by Timothy Pearson of +Raptor Engineering Inc. and, working with them (and sponsoring the +work), merged into libreboot. + +**Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules.** + +Flashing instructions can be found at +[../install/\#flashrom](../install/#flashrom) - note that external +flashing is required (e.g. BBB), if the proprietary (ASUS) firmware is +currently installed. If you already have libreboot, by default it is +possible to re-flash using software running in GNU+Linux on the +KGPE-D16, without using external hardware. + +CPU compatibility +================= + +**Use Opteron 6200 series (works without microcode updates, including hw +virt).** 6300 series needs microcode updates, so avoid those CPUs. 6100 +series is too old, and mostly untested. + +Board status (compatibility) {#boardstatus} +============================ + +See <https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php>. + +Form factor {#formfactor} +=========== + +These boards use the SSI EEB 3.61 form factor; make sure that your case +supports this. This form factor is similar to E-ATX in that the size is +identical, but the position of the screws are different. + +IPMI iKVM module add-on {#ipmi} +======================= + +Don't use it. It uses proprietary firmware and adds a backdoor (remote +out-of-band management chip, similar to the [Intel Management +Engine](../../faq/#intelme). Fortunately, the firmware is +unsigned (possibly to replace) and physically separate from the +mainboard since it's on the add-on module, which you don't have to +install. + +Flash chips {#flashchips} +=========== + +2MiB flash chips are included by default, on these boards. It's on a +P-DIP 8 slot (SPI chip). The flash chip can be upgraded to higher sizes: +4MiB, 8MiB or 16MiB. With at least 8MiB, you could feasibly fit a +compressed linux+initramfs image (BusyBox+Linux system) into CBFS and +boot that, loading it into memory. + +Libreboot has configs for 2, 4, 8 and 16 MiB flash chip sizes (default +flash chip is 2MiB). + +**DO NOT hot-swap the chip with your bare hands. Use a P-DIP 8 chip +extractor. These can be found online. See +<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>** + +Native graphics initialization {#graphics} +============================== + +Only text-mode is known to work, but linux(kernel) can initialize the +framebuffer display (if it has KMS - kernel mode setting). + +Current issues {#issues} +============== + +- LRDIMM memory modules are currently incompatible +- SAS (via PIKE 2008 module) requires non-free option ROM (and + SeaBIOS) to boot from it (theoretically possible to replace, but you + can put a kernel in CBFS or on SATA and use that to boot GNU, which + can be on a SAS drive. The linux kernel can use those SAS drives + (via PIKE module) without an option ROM). + +- IPMI iKVM module (optional add-on card) uses proprietary firmware. + Since it's for remote out-of-band management, it's theoretically a + backdoor similar to the Intel Management Engine. Fortunately, unlike + the ME, this firmware is unsigned which means that a free + replacement is theoretically possible. For now, the libreboot + project recommends not installing the module. [This + project](https://github.com/facebook/openbmc) might be interesting + to derive from, for those who want to work on a free replacement. In + practise, out-of-band management isn't very useful anyway (or at + the very least, it's not a major inconvenience to not have it). +- Graphics: only text-mode works. See [\#graphics](#graphics) + +Hardware specifications {#specifications} +----------------------- + +The information here is adapted, from the ASUS website. + +### Processor / system bus + +- 2 CPU sockets (G34 compatible) +- HyperTransport™ Technology 3.0 +- CPUs supported: + - AMD Opteron 6100 series (Fam10h. No IOMMU support. **Not** + recommended - old. View errata datasheet here: + <http://support.amd.com/TechDocs/41322_10h_Rev_Gd.pdf>) + - AMD Opteron 6200 series (Fam15h, with full IOMMU support in + libreboot - **highly recommended - fast, and works well without + microcode updates, including virtualization**) + - AMD Opteron 6300 series (Fam15h, with full IOMMU support in + libreboot. **AVOID LIKE THE PLAGUE - virtualization is broken + without microcode updates.** + - NOTE: 6300 series CPUs have buggy microcode built-in, and + libreboot recommends avoiding the updates. The 6200 series CPUs + have more reliable microcode. Look at this errata datasheet: + <http://support.amd.com/TechDocs/48063_15h_Mod_00h-0Fh_Rev_Guide.pdf> + (see Errata 734 - this is what kills the 6300 series) +- 6.4 GT/s per link (triple link) + +### Core logic + +- AMD SR5690 +- AMD SP5100 + +### Memory compatibility (with libreboot) + +- **Total Slots:** 16 (4-channel per CPU, 8 DIMM per CPU), ECC +- **Capacity:** Maximum up to 256GB RDIMM +- **Memory Type that is compatible:** + - DDR3 1600/1333/1066/800 UDIMM\* + - DDR3 1600/1333/1066/800 RDIMM\* +- **Compatible sizes per memory module:** + - 16GB, 8GB, 4GB, 3GB, 2GB, 1GB RDIMM + - 8GB, 4GB, 2GB, 1GB UDIMM + +### Expansion slots + +- **Total slot:** 6 +- **Slot Location 1:** PCI 32bit/33MHz +- **Slot Location 2:** PCI-E x16 (Gen2 X8 Link) +- **Slot Location 3:** PCI-E x16 (Gen2 X16 Link), Auto switch to x8 + link if slot 2 is occupied +- **Slot Location 4:** PCI-E x8 (Gen2 X4 Link) +- **Slot Location 5:** PCI-E x16 (Gen2 X16 Link) +- **Slot Location 6:** PCI-E x16 (Gen2 X16 Link), Auto turn off if + slot 5 is occupied, For 1U FH/FL Card, MIO supported +- **Additional Slot 1:** PIKE slot (for SAS drives. See notes above) +- Follow SSI Location\# + +### Form factor {#form-factor} + +- SSI EEB 3.61 (12"x13") + +### ASUS features + +- Fan Speed Control +- Rack Ready (Rack and Pedestal dual use) + +### Storage + +- **SATA controller:** + - AMD SP5100 + - 6 x SATA2 300MB/s +- **SAS/SATA Controller:** + - ASUS PIKE2008 3Gbps 8-port SAS card included + +### Networking + +- 2 x Intel® 82574L + 1 x Mgmt LAN + +### Graphics + +- Aspeed AST2050 with 8MB VRAM + +### On board I/O + +- 1 x PSU Power Connector (24-pin SSI power connector + 8-pin SSI + 12V + 8-pin SSI 12V power connector) +- 1 x Management Connector , Onboard socket for management card +- 3 x USB pin header , Up to 6 Devices +- 1 x Internal A Type USB Port +- 8 x Fan Header , 4pin (3pin/4pin fan dual support) +- 2 x SMBus +- 1 x Serial Port Header +- 1 x TPM header +- 1 x PS/2 KB/MS port + +### Back I/O ports + +- 1 x External Serial Port +- 2 x External USB Port +- 1 x VGA Port +- 2 x RJ-45 +- 1 x PS/2 KB/Mouse + +### Environment + +- **Operation temperature:** 10C \~ 35C +- **Non operation temperature:** -40C \~ 70C +- **Non operation humidity:** 20% \~ 90% ( Non condensing) + +### Monitoring + +- CPU temperatures +- Fan speed (RPM) + +### Note: + +- \* DDR3 1600 can only be supported with AMD Opteron 6300/6200 series + processor + +Copyright © 2015 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/r400.md b/docs/hardware/r400.md new file mode 100644 index 00000000..09b98464 --- /dev/null +++ b/docs/hardware/r400.md @@ -0,0 +1,65 @@ +--- +title: ThinkPad R400 +... + +It is believed that all or most R400 laptops are compatible. See notes +about [CPU +compatibility](../install/r400_external.html#cpu_compatibility) for +potential incompatibilities. + +There are two possible flash chip sizes for the R400: 4MiB (32Mbit) or +8MiB (64Mbit). This can be identified by the type of flash chip below +the palmrest: 4MiB is SOIC-8, 8MiB is SOIC-16. + +**The R400 laptops come with the ME (and sometimes AMT in addition) +before flashing libreboot. Libreboot disables and removes it by using a +modified descriptor: see [gm45\_remove\_me.html](gm45_remove_me.html)** +(contains notes, plus instructions) + +Flashing instructions can be found at +[../install/\#flashrom](../install/#flashrom) + +EC update {#ecupdate} +========= + +It is recommended that you update to the latest EC firmware version. The +[EC firmware](../../faq/#firmware-ec) is separate from +libreboot, so we don't actually provide that, but if you still have +Lenovo BIOS then you can just run the Lenovo BIOS update utility, which +will update both the BIOS and EC version. See: + +- [../install/index.html#flashrom](../install/index.html#flashrom) +- <http://www.thinkwiki.org/wiki/BIOS_update_without_optical_disk> + +NOTE: this can only be done when you are using Lenovo BIOS. How to +update the EC firmware while running libreboot is unknown. Libreboot +only replaces the BIOS firmware, not EC. + +Updated EC firmware has several advantages e.g. bettery battery +handling. + +Compatibility (without blobs) {#compatibility_noblobs} +----------------------------- + +### Hardware virtualization (vt-x) {#hwvirt} + +The R400, when run without CPU microcode updates in coreboot, currently +kernel panics if running QEMU with vt-x enabled on 2 cores for the +guest. With a single core enabled for the guest, the guest panics (but +the host is fine). Working around this in QEMU might be possible; if +not, software virtualization should work fine (it's just slower). + +On GM45 hardware (with libreboot), make sure that the *kvm* and +*kvm\_intel* kernel modules are not loaded, when using QEMU. + +The following errata datasheet from Intel might help with investigation: +<http://download.intel.com/design/mobile/specupdt/320121.pdf> + +The R400 is almost identical to the X200, code-wise. See +[x200.html](x200.html). + +TODO: put hardware register logs here like on the [X200](x200.html) and +[T400](t400.html) page. + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/t400.md b/docs/hardware/t400.md new file mode 100644 index 00000000..2ff2c836 --- /dev/null +++ b/docs/hardware/t400.md @@ -0,0 +1,77 @@ +--- +title: ThinkPad T400 +... + +It is believed that all or most T400 laptops are compatible. See notes +about [CPU +compatibility](../install/t400_external.html#cpu_compatibility) for +potential incompatibilities. + +There are two possible flash chip sizes for the T400: 4MiB (32Mbit) or +8MiB (64Mbit). This can be identified by the type of flash chip below +the palmrest: 4MiB is SOIC-8, 8MiB is SOIC-16. + +**The T400 laptops come with the ME (and sometimes AMT in addition) +before flashing libreboot. Libreboot disables and removes it by using a +modified descriptor: see [gm45\_remove\_me.html](gm45_remove_me.html)** +(contains notes, plus instructions) + +Flashing instructions can be found at +[../install/\#flashrom](../install/#flashrom) + +EC update {#ecupdate} +========= + +It is recommended that you update to the latest EC firmware version. The +[EC firmware](../../faq/#firmware-ec) is separate from +libreboot, so we don't actually provide that, but if you still have +Lenovo BIOS then you can just run the Lenovo BIOS update utility, which +will update both the BIOS and EC version. See: + +- [../install/index.html#flashrom](../install/index.html#flashrom) +- <http://www.thinkwiki.org/wiki/BIOS_update_without_optical_disk> + +NOTE: this can only be done when you are using Lenovo BIOS. How to +update the EC firmware while running libreboot is unknown. Libreboot +only replaces the BIOS firmware, not EC. + +Updated EC firmware has several advantages e.g. bettery battery +handling. + +Compatibility (without blobs) {#compatibility_noblobs} +----------------------------- + +### Hardware virtualization (vt-x) {#hwvirt} + +The T400, when run without CPU microcode updates in coreboot, currently +kernel panics if running QEMU with vt-x enabled on 2 cores for the +guest. With a single core enabled for the guest, the guest panics (but +the host is fine). Working around this in QEMU might be possible; if +not, software virtualization should work fine (it's just slower). + +On GM45 hardware (with libreboot), make sure that the *kvm* and +*kvm\_intel* kernel modules are not loaded, when using QEMU. + +The following errata datasheet from Intel might help with investigation: +<http://download.intel.com/design/mobile/specupdt/320121.pdf> + +The T400 is almost identical to the X200, code-wise. See +[x200.html](x200.html). + +Hardware register dumps {#regdumps} +----------------------- + +The coreboot wiki +[shows](http://www.coreboot.org/Motherboard_Porting_Guide) how to +collect various logs useful in porting to new boards. Following are +outputs from the T400: + +- T400 with **Winbond W25X64** flash chip (8MiB, SOIC-16) and Lenovo + BIOS 2.02 (EC firmware 1.01): + - [../future/dumps/logs-t400-bios2.02-ec1.01/](../future/dumps/logs-t400-bios2.02-ec1.01/) + +- Version of flashrom used for the external flashing/reading logs is + the one that libreboot git revision c164960 uses. + +Copyright © 2015 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/t500.md b/docs/hardware/t500.md new file mode 100644 index 00000000..be919227 --- /dev/null +++ b/docs/hardware/t500.md @@ -0,0 +1,96 @@ +--- +title: ThinkPad T500 +... + +It is believed that all or most T500 laptops are compatible. See notes +about [CPU +compatibility](../install/t500_external.html#cpu_compatibility) for +potential incompatibilities. + +There are two possible flash chip sizes for the T500: 4MiB (32Mbit) or +8MiB (64Mbit). This can be identified by the type of flash chip below +the palmrest: 4MiB is SOIC-8, 8MiB is SOIC-16. + +**The T500 laptops come with the ME (and sometimes AMT in addition) +before flashing libreboot. Libreboot disables and removes it by using a +modified descriptor: see [gm45\_remove\_me.html](gm45_remove_me.html)** +(contains notes, plus instructions) + +Flashing instructions can be found at +[../install/\#flashrom](../install/#flashrom) + +EC update {#ecupdate} +========= + +It is recommended that you update to the latest EC firmware version. The +[EC firmware](../../faq/#firmware-ec) is separate from +libreboot, so we don't actually provide that, but if you still have +Lenovo BIOS then you can just run the Lenovo BIOS update utility, which +will update both the BIOS and EC version. See: + +- [../install/index.html#flashrom](../install/index.html#flashrom) +- <http://www.thinkwiki.org/wiki/BIOS_update_without_optical_disk> + +NOTE: this can only be done when you are using Lenovo BIOS. How to +update the EC firmware while running libreboot is unknown. Libreboot +only replaces the BIOS firmware, not EC. + +Updated EC firmware has several advantages e.g. bettery battery +handling. + +Compatibility (without blobs) {#compatibility_noblobs} +----------------------------- + +### Hardware virtualization (vt-x) {#hwvirt} + +The T500, when run without CPU microcode updates in coreboot, currently +kernel panics if running QEMU with vt-x enabled on 2 cores for the +guest. With a single core enabled for the guest, the guest panics (but +the host is fine). Working around this in QEMU might be possible; if +not, software virtualization should work fine (it's just slower). + +On GM45 hardware (with libreboot), make sure that the *kvm* and +*kvm\_intel* kernel modules are not loaded, when using QEMU. + +The following errata datasheet from Intel might help with investigation: +<http://download.intel.com/design/mobile/specupdt/320121.pdf> + +The T500 is almost identical to the X200, code-wise. See +[x200.html](x200.html). + +Descriptor and Gbe differences {#descriptor_difference} +------------------------------ + +See +[../future/dumps/t500\_x200\_descriptor/descriptor\_diff\_t500\_x200.txt](../future/dumps/t500_x200_descriptor/descriptor_diff_t500_x200.txt) +and +[../future/dumps/t500\_x200\_descriptor/gbe\_diff\_t500\_x200.txt](../future/dumps/t500_x200_descriptor/gbe_diff_t500_x200.txt) + +The patches above are based on the output from ich9deblob on a +factory.rom image dumped from the T500 with a SOIC-8 4MiB flash chip. +The patch re-creates the X200 descriptor/gbe source, so the commands +were something like: + $ diff -u t500gbe x200gbe + $ diff -u t500descriptor x200descriptor + +ME VSCC table is in a different place and a different size on the T500. +Libreboot disables and removes the ME anyway, so it doesn't matter. + +The very same descriptor/gbe used on the X200 (generated by +[ich9gen](gm45_remove_me.html#ich9gen)) was re-used on the T500, and it +still worked. + +Hardware register dumps {#regdumps} +----------------------- + +The coreboot wiki +[shows](http://www.coreboot.org/Motherboard_Porting_Guide) how to +collect various logs useful in porting to new boards. Following are +outputs from the T500: + +- T500 with **Macronix MX25L3205D** flash chip (4MiB, SOIC-8) and + Lenovo BIOS 3.13 7VET83WW (EC firmware 1.06): + - [../future/dumps/t500log/](../future/dumps/t500log/) + +Copyright © 2015 Leah Rowe <info@minifree.org>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/docs/hardware/text/kfsn4-dre/bootlog.txt b/docs/hardware/text/kfsn4-dre/bootlog.txt new file mode 100644 index 00000000..ea6722d8 --- /dev/null +++ b/docs/hardware/text/kfsn4-dre/bootlog.txt @@ -0,0 +1,3871 @@ +*****TEXT MODE ROM IMAGE***** + +<hangs here for 30 seconds or more> + +coreboot-4.0 Fri Jun 26 20:19:07 UTC 2015 romstage starting... +BSP Family_Model: 00100f21 +*sysinfo range: [000c4000,000c6899] +bsp_apicid = 00 +cpu_init_detectedx = 00000000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cpu_microcode_blob.bin' +CBFS: 'cpu_microcode_blob.bin' not found. +[microcode] microcode file not found. Skipping updates. +cpuSetAMDMSR done +Enter amd_ht_init() +AMD_CB_EventNotify() + event class: 05 + event: 1004 + data: 04 00 00 01 +AMD_CB_EventNotify() + event class: 05 + event: 2006 + data: 04 00 01 00 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Exit amd_ht_init() +cpuSetAMDPCI 00 done +cpuSetAMDPCI 01 done +Prep FID/VID Node:00 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f23 + F3xD8: 03001c14 + F3xDC: 00005428 +Prep FID/VID Node:01 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f23 + F3xD8: 03001c14 + F3xDC: 00005428 +setup_remote_node: 01 done +Start node 01 done. +core0 started: 01 + +Begin FIDVID MSR 0xc0010071 0x20a600e4 0x38045044 +FIDVID on BSP, APIC_id: 00 +BSP fid = 10400 +Wait for AP stage 1: ap_apicid = 1 +init_fidvid_bsp_stage1: timed out reading from ap 01 +Wait for AP stage 1: ap_apicid = 2 +init_fidvid_bsp_stage1: timed out reading from ap 02 +Wait for AP stage 1: ap_apicid = 3 +init_fidvid_bsp_stage1: timed out reading from ap 03 +Wait for AP stage 1: ap_apicid = 4 + readback = 4010401 + common_fid(packed) = 10400 +Wait for AP stage 1: ap_apicid = 5 +init_fidvid_bsp_stage1: timed out reading from ap 05 +Wait for AP stage 1: ap_apicid = 6 +init_fidvid_bsp_stage1: timed out reading from ap 06 +Wait for AP stage 1: ap_apicid = 7 +init_fidvid_bsp_stage1: timed out reading from ap 07 +common_fid = 10400 +FID Change Node:00, F3xD4: c3310f24 +FID Change Node:01, F3xD4: c3310f24 +End FIDVIDMSR 0xc0010071 0x20a600e4 0x38005044 +start_other_cores() +init node: 00 cores: 03 +Start other core - nodeid: 00 cores: 03 +init node: 01 cores: 03 +Start other core - nodeid: 01 cores: 03 +started ap apicid: * AP 01started +* AP 02started +* AP 03started +* AP 05started +* AP 06started +* AP 07started + +set_ck804_base_unit_id() +...WARM RESET... + + + + +coreboot-4.0 Fri Jun 26 20:19:07 UTC 2015 romstage starting... +BSP Family_Model: 00100f21 +*sysinfo range: [000c4000,000c6899] +bsp_apicid = 00 +cpu_init_detectedx = 00000000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cpu_microcode_blob.bin' +CBFS: 'cpu_microcode_blob.bin' not found. +[microcode] microcode file not found. Skipping updates. +cpuSetAMDMSR done +Enter amd_ht_init() +AMD_CB_EventNotify() + event class: 05 + event: 1004 + data: 04 00 00 01 +AMD_CB_EventNotify() + event class: 05 + event: 2006 + data: 04 00 01 00 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Exit amd_ht_init() +cpuSetAMDPCI 00 done +cpuSetAMDPCI 01 done +Prep FID/VID Node:00 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f24 + F3xD8: 03001c14 + F3xDC: 00005428 +Prep FID/VID Node:01 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f24 + F3xD8: 03001c14 + F3xDC: 00005428 +setup_remote_node: 01 done +Start node 01 done. +core0 started: 01 + +Begin FIDVID MSR 0xc0010071 0x20a600e4 0x38005044 +End FIDVIDMSR 0xc0010071 0x20a600e4 0x38003803 +start_other_cores() +init node: 00 cores: 03 +Start other core - nodeid: 00 cores: 03 +init node: 01 cores: 03 +Start other core - nodeid: 01 cores: 03 +started ap apicid: * AP 01started +* AP 02started +* AP 03started +* AP 05started +* AP 06started +* AP 07started + +set_ck804_base_unit_id() +fill_mem_ctrl() +enable_smbus() +SMBus controller enabled +raminit_amdmct() +raminit_amdmct begin: +activate_spd_rom() for node 00 +enable_spd_node0() +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +activate_spd_rom() for node 01 +enable_spd_node1() +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + Node: 00 base: 00 limit: ffffff BottomIO: c00000 + Node: 01 base: 1400000 limit: 17fffff BottomIO: c00000 + Copy dram map from Node 0 to Node 01 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +raminit_amdmct end: +CBMEM: +IMD: root @ bffff000 254 entries. +IMD: root @ bfffec00 62 entries. +amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +disable_spd() +enable_msi_mapping() +Prepare CAR migration and stack regions... Fill [003fd000-003fffff] ... Done +Copying data from cache to RAM... Copy [000c4000-000c693f] to [003fd6c0 - 003fffff] ... Done +Switching to use RAM as stack... Top about 003fd6ac ... Done +Disabling cache as ram now +Prepare ramstage memory region... Fill [00000000-003fcfff] ... Done +CBFS provider active. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/ramstage' +CBFS: Found @ offset 15440 size 147e1 +'fallback/ramstage' located at offset: 15478 size: 147e1 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Capability: type 0x0a @ 0x44 + + +coreboot-4.0 Fri Jun 26 20:19:07 UTC 2015 ramstage starting... +Moving GDT to bfffe980...ok +BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0 +BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 +Enumerating buses... +Show all devs... Before device enumeration. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:18.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:01.0: enabled 1 +PNP: 002e.0: enabled 1 +PNP: 002e.1: enabled 0 +PNP: 002e.2: enabled 1 +PNP: 002e.3: enabled 1 +PNP: 002e.5: enabled 1 +PNP: 002e.7: enabled 0 +PNP: 002e.8: enabled 0 +PNP: 002e.9: enabled 1 +PNP: 002e.a: enabled 0 +PNP: 002e.b: enabled 1 +PCI: 00:01.1: enabled 1 +I2C: 00:50: enabled 1 +I2C: 00:51: enabled 1 +I2C: 00:52: enabled 1 +I2C: 00:53: enabled 1 +I2C: 00:54: enabled 1 +I2C: 00:55: enabled 1 +I2C: 00:56: enabled 1 +I2C: 00:57: enabled 1 +I2C: 00:2f: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:04.0: enabled 0 +PCI: 00:04.1: enabled 0 +PCI: 00:06.0: enabled 1 +PCI: 00:07.0: enabled 1 +PCI: 00:08.0: enabled 1 +PCI: 00:09.0: enabled 1 +PCI: 00:04.0: enabled 1 +PCI: 00:0a.0: enabled 0 +PCI: 00:0b.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0c.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0d.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0e.0: enabled 1 +PCI: 00:0f.0: enabled 0 +PCI: 00:18.1: enabled 1 +PCI: 00:18.2: enabled 1 +PCI: 00:18.3: enabled 1 +PCI: 00:18.4: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:19.1: enabled 1 +PCI: 00:19.2: enabled 1 +PCI: 00:19.3: enabled 1 +PCI: 00:19.4: enabled 1 +Compare with tree... +Root Device: enabled 1 + CPU_CLUSTER: 0: enabled 1 + APIC: 00: enabled 1 + DOMAIN: 0000: enabled 1 + PCI: 00:18.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:01.0: enabled 1 + PNP: 002e.0: enabled 1 + PNP: 002e.1: enabled 0 + PNP: 002e.2: enabled 1 + PNP: 002e.3: enabled 1 + PNP: 002e.5: enabled 1 + PNP: 002e.7: enabled 0 + PNP: 002e.8: enabled 0 + PNP: 002e.9: enabled 1 + PNP: 002e.a: enabled 0 + PNP: 002e.b: enabled 1 + PCI: 00:01.1: enabled 1 + I2C: 00:50: enabled 1 + I2C: 00:51: enabled 1 + I2C: 00:52: enabled 1 + I2C: 00:53: enabled 1 + I2C: 00:54: enabled 1 + I2C: 00:55: enabled 1 + I2C: 00:56: enabled 1 + I2C: 00:57: enabled 1 + I2C: 00:2f: enabled 1 + PCI: 00:02.0: enabled 1 + PCI: 00:02.1: enabled 1 + PCI: 00:04.0: enabled 0 + PCI: 00:04.1: enabled 0 + PCI: 00:06.0: enabled 1 + PCI: 00:07.0: enabled 1 + PCI: 00:08.0: enabled 1 + PCI: 00:09.0: enabled 1 + PCI: 00:04.0: enabled 1 + PCI: 00:0a.0: enabled 0 + PCI: 00:0b.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0c.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0d.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0e.0: enabled 1 + PCI: 00:0f.0: enabled 0 + PCI: 00:18.1: enabled 1 + PCI: 00:18.2: enabled 1 + PCI: 00:18.3: enabled 1 + PCI: 00:18.4: enabled 1 + PCI: 00:19.0: enabled 1 + PCI: 00:19.1: enabled 1 + PCI: 00:19.2: enabled 1 + PCI: 00:19.3: enabled 1 + PCI: 00:19.4: enabled 1 +Root Device scanning... +root_dev_scan_bus for Root Device +setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 +setup_bsp_ramtop, TOP MEM2: msr.lo = 0x80000000, msr.hi = 0x00000001 +CPU_CLUSTER: 0 enabled +DOMAIN: 0000 enabled +CPU_CLUSTER: 0 scanning... +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + PCI: 00:18.3 siblings=3 +CPU: APIC: 00 enabled +CPU: APIC: 01 enabled +CPU: APIC: 02 enabled +CPU: APIC: 03 enabled + PCI: 00:19.3 siblings=3 +CPU: APIC: 04 enabled +CPU: APIC: 05 enabled +CPU: APIC: 06 enabled +CPU: APIC: 07 enabled +DOMAIN: 0000 scanning... +PCI: pci_scan_bus for bus 00 +PCI: 00:18.0 [1022/1200] bus ops +PCI: 00:18.0 [1022/1200] enabled +PCI: 00:18.1 [1022/1201] enabled +PCI: 00:18.2 [1022/1202] enabled +PCI: 00:18.3 [1022/1203] ops +PCI: 00:18.3 [1022/1203] enabled +PCI: 00:18.4 [1022/1204] enabled +PCI: 00:19.0 [1022/1200] bus ops +PCI: 00:19.0 [1022/1200] enabled +PCI: 00:19.1 [1022/1201] enabled +PCI: 00:19.2 [1022/1202] enabled +PCI: 00:19.3 [1022/1203] ops +PCI: 00:19.3 [1022/1203] enabled +PCI: 00:19.4 [1022/1204] enabled +PCI: 00:18.0 scanning... +PCI: 00:00.0 [10de/005e] ops +PCI: 00:00.0 [10de/005e] enabled +Capability: type 0x08 @ 0x44 +flags: 0x01e0 +PCI: 00:00.0 count: 000f static_count: 0010 +PCI: 00:00.0 [10de/005e] enabled next_unitid: 0010 +PCI: pci_scan_bus for bus 00 +PCI: 00:00.0 [10de/005e] enabled +PCI: 00:01.0 [10de/0051] bus ops +PCI: 00:01.0 [10de/0051] enabled +PCI: 00:01.1 [10de/0052] bus ops +PCI: 00:01.1 [10de/0052] enabled +PCI: 00:02.0 [10de/005a] ops +PCI: 00:02.0 [10de/005a] enabled +PCI: 00:02.1 [10de/005b] ops +PCI: 00:02.1 [10de/005b] enabled +PCI: 00:04.0 [10de/0059] ops +PCI: 00:04.0 [10de/0059] disabled +PCI: 00:04.1 [10de/0058] ops +PCI: 00:04.1 [10de/0058] disabled +PCI: 00:06.0 [10de/0053] ops +PCI: 00:06.0 [10de/0053] enabled +PCI: 00:07.0 [10de/0054] ops +PCI: 00:07.0 [10de/0054] enabled +PCI: 00:08.0 [10de/0055] ops +PCI: 00:08.0 [10de/0055] enabled +PCI: 00:09.0 [10de/005c] bus ops +PCI: 00:09.0 [10de/005c] enabled +PCI: 00:0b.0 [10de/005d] bus ops +PCI: 00:0b.0 [10de/005d] enabled +PCI: 00:0c.0 [10de/005d] bus ops +PCI: 00:0c.0 [10de/005d] enabled +PCI: 00:0d.0 [10de/005d] bus ops +PCI: 00:0d.0 [10de/005d] enabled +PCI: 00:0e.0 [10de/005d] bus ops +PCI: 00:0e.0 [10de/005d] enabled +PCI: 00:01.0 scanning... +scan_lpc_bus for PCI: 00:01.0 +PNP: 002e.0 enabled +PNP: 002e.1 disabled +PNP: 002e.2 enabled +PNP: 002e.3 enabled +PNP: 002e.5 enabled +PNP: 002e.7 disabled +PNP: 002e.8 disabled +PNP: 002e.9 enabled +PNP: 002e.a disabled +PNP: 002e.b enabled +scan_lpc_bus for PCI: 00:01.0 done +PCI: 00:01.1 scanning... +scan_smbus for PCI: 00:01.1 +smbus: PCI: 00:01.1[0]->I2C: 01:50 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:51 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:52 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:53 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:54 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:55 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:56 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:57 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:2f enabled +scan_smbus for PCI: 00:01.1 done +PCI: 00:09.0 scanning... +do_pci_scan_bridge for PCI: 00:09.0 +PCI: pci_scan_bus for bus 01 +PCI: 01:04.0 [18ca/0020] ops +PCI: 01:04.0 [18ca/0020] enabled +PCI: 00:0b.0 scanning... +do_pci_scan_bridge for PCI: 00:0b.0 +PCI: pci_scan_bus for bus 02 +PCI: 02:00.0 [14e4/1659] enabled +PCI: 00:0c.0 scanning... +do_pci_scan_bridge for PCI: 00:0c.0 +PCI: pci_scan_bus for bus 03 +PCI: 03:00.0 [14e4/1659] enabled +PCI: 00:0d.0 scanning... +do_pci_scan_bridge for PCI: 00:0d.0 +PCI: pci_scan_bus for bus 04 +PCI: Static device PCI: 04:00.0 not found, disabling it. +PCI: 00:0e.0 scanning... +do_pci_scan_bridge for PCI: 00:0e.0 +PCI: pci_scan_bus for bus 05 +PCI: 00:19.0 scanning... +DOMAIN: 0000 passpw: enabled +DOMAIN: 0000 passpw: enabled +root_dev_scan_bus for Root Device done +done +BS: BS_DEV_ENUMERATE times (us): entry 0 run 598152 exit 0 +found VGA at PCI: 01:04.0 +Setting up VGA for PCI: 01:04.0 +Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:09.0 +Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 +Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 +Setting PCI_BRIDGE_CTL_VGA for bridge Root Device +Allocating resources... +Reading resources... +Root Device read_resources bus 0 link: 0 +CPU_CLUSTER: 0 read_resources bus 0 link: 0 +APIC: 00 missing read_resources +APIC: 01 missing read_resources +APIC: 02 missing read_resources +APIC: 03 missing read_resources +APIC: 04 missing read_resources +APIC: 05 missing read_resources +APIC: 06 missing read_resources +APIC: 07 missing read_resources +CPU_CLUSTER: 0 read_resources bus 0 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 +PCI: 00:18.0 read_resources bus 0 link: 1 +PCI: 00:01.0 read_resources bus 0 link: 0 +PCI: 00:01.0 read_resources bus 0 link: 0 done +PCI: 00:01.1 read_resources bus 1 link: 0 +I2C: 01:50 missing read_resources +I2C: 01:51 missing read_resources +I2C: 01:52 missing read_resources +I2C: 01:53 missing read_resources +I2C: 01:54 missing read_resources +I2C: 01:55 missing read_resources +I2C: 01:56 missing read_resources +I2C: 01:57 missing read_resources +PCI: 00:01.1 read_resources bus 1 link: 0 done +PCI: 00:01.1 read_resources bus 2 link: 1 +PCI: 00:01.1 read_resources bus 2 link: 1 done +PCI: 00:09.0 read_resources bus 1 link: 0 +PCI: 00:09.0 read_resources bus 1 link: 0 done +PCI: 00:0b.0 read_resources bus 2 link: 0 +PCI: 00:0b.0 read_resources bus 2 link: 0 done +PCI: 00:0c.0 read_resources bus 3 link: 0 +PCI: 00:0c.0 read_resources bus 3 link: 0 done +PCI: 00:0d.0 read_resources bus 4 link: 0 +PCI: 00:0d.0 read_resources bus 4 link: 0 done +PCI: 00:0e.0 read_resources bus 5 link: 0 +PCI: 00:0e.0 read_resources bus 5 link: 0 done +PCI: 00:18.0 read_resources bus 0 link: 1 done +PCI: 00:18.0 read_resources bus 0 link: 0 +PCI: 00:18.0 read_resources bus 0 link: 0 done +PCI: 00:18.0 read_resources bus 0 link: 2 +PCI: 00:18.0 read_resources bus 0 link: 2 done +PCI: 00:18.0 read_resources bus 0 link: 3 +PCI: 00:18.0 read_resources bus 0 link: 3 done +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +PCI: 00:18.4 read_resources bus 0 link: 0 +PCI: 00:18.4 read_resources bus 0 link: 0 done +PCI: 00:18.4 read_resources bus 0 link: 1 +PCI: 00:18.4 read_resources bus 0 link: 1 done +PCI: 00:18.4 read_resources bus 0 link: 2 +PCI: 00:18.4 read_resources bus 0 link: 2 done +PCI: 00:18.4 read_resources bus 0 link: 3 +PCI: 00:18.4 read_resources bus 0 link: 3 done +PCI: 00:19.0 read_resources bus 0 link: 0 +PCI: 00:19.0 read_resources bus 0 link: 0 done +PCI: 00:19.0 read_resources bus 0 link: 1 +PCI: 00:19.0 read_resources bus 0 link: 1 done +PCI: 00:19.0 read_resources bus 0 link: 2 +PCI: 00:19.0 read_resources bus 0 link: 2 done +PCI: 00:19.0 read_resources bus 0 link: 3 +PCI: 00:19.0 read_resources bus 0 link: 3 done +PCI: 00:19.4 read_resources bus 0 link: 0 +PCI: 00:19.4 read_resources bus 0 link: 0 done +PCI: 00:19.4 read_resources bus 0 link: 1 +PCI: 00:19.4 read_resources bus 0 link: 1 done +PCI: 00:19.4 read_resources bus 0 link: 2 +PCI: 00:19.4 read_resources bus 0 link: 2 done +PCI: 00:19.4 read_resources bus 0 link: 3 +PCI: 00:19.4 read_resources bus 0 link: 3 done +DOMAIN: 0000 read_resources bus 0 link: 0 done +Root Device read_resources bus 0 link: 0 done +Done reading resources. +Show resources in subtree (Root Device)...After reading. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: 01 + APIC: 02 + APIC: 03 + APIC: 04 + APIC: 05 + APIC: 06 + APIC: 07 + DOMAIN: 0000 child on link 0 PCI: 00:18.0 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 + DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 + PCI: 00:18.0 child on link 0 PCI: 00:00.0 + PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8 + PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b8 + PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b0 + PCI: 00:00.0 + PCI: 00:01.0 child on link 0 PNP: 002e.0 + PCI: 00:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10 + PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 14 + PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 44 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 60 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 64 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 68 + PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PNP: 002e.0 + PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.3 + PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000500 index f1 + PNP: 002e.5 + PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 + PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 + PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 + PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.7 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 + PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.8 + PNP: 002e.9 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 + PNP: 002e.a + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.b + PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60 + PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PCI: 00:01.1 child on link 0 I2C: 01:50 + PCI: 00:01.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10 + PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 + PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 24 + I2C: 01:50 + I2C: 01:51 + I2C: 01:52 + I2C: 01:53 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:2f + PCI: 00:02.0 + PCI: 00:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 + PCI: 00:02.1 + PCI: 00:02.1 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 00:04.0 + PCI: 00:04.1 + PCI: 00:06.0 + PCI: 00:06.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:07.0 + PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:07.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:07.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 00:08.0 + PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:08.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 00:09.0 child on link 0 PCI: 01:04.0 + PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 + PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 01:04.0 + PCI: 01:04.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 1200 index 10 + PCI: 01:04.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 14 + PCI: 01:04.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18 + PCI: 00:0a.0 + PCI: 00:0b.0 child on link 0 PCI: 02:00.0 + PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:0c.0 child on link 0 PCI: 03:00.0 + PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 03:00.0 + PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:0d.0 child on link 0 PCI: 04:00.0 + PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 04:00.0 + PCI: 00:0e.0 + PCI: 00:0e.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:0f.0 + PCI: 00:18.1 + PCI: 00:18.2 + PCI: 00:18.3 + PCI: 00:18.4 + PCI: 00:19.0 + PCI: 00:19.1 + PCI: 00:19.2 + PCI: 00:19.3 + PCI: 00:19.4 +DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff +PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 01:04.0 18 * [0x0 - 0x7f] io +PCI: 00:09.0 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done +PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:09.0 1c * [0x0 - 0xfff] io +PCI: 00:01.0 60 * [0x1000 - 0x10ff] io +PCI: 00:01.0 64 * [0x1400 - 0x14ff] io +PCI: 00:01.0 68 * [0x1800 - 0x18ff] io +PCI: 00:01.0 10 * [0x1c00 - 0x1c7f] io +PCI: 00:01.1 20 * [0x1c80 - 0x1cbf] io +PCI: 00:01.1 24 * [0x1cc0 - 0x1cff] io +PCI: 00:01.1 10 * [0x2000 - 0x201f] io +PCI: 00:06.0 20 * [0x2020 - 0x202f] io +PCI: 00:07.0 20 * [0x2030 - 0x203f] io +PCI: 00:08.0 20 * [0x2040 - 0x204f] io +PCI: 00:07.0 10 * [0x2050 - 0x2057] io +PCI: 00:07.0 18 * [0x2058 - 0x205f] io +PCI: 00:08.0 10 * [0x2060 - 0x2067] io +PCI: 00:08.0 18 * [0x2068 - 0x206f] io +PCI: 00:07.0 14 * [0x2070 - 0x2073] io +PCI: 00:07.0 1c * [0x2074 - 0x2077] io +PCI: 00:08.0 14 * [0x2078 - 0x207b] io +PCI: 00:08.0 1c * [0x207c - 0x207f] io +PCI: 00:18.0 io: base: 2080 size: 3000 align: 12 gran: 12 limit: ffff done +PCI: 00:18.0 110d8 * [0x0 - 0x2fff] io +DOMAIN: 0000 io: base: 3000 size: 3000 align: 12 gran: 0 limit: ffff done +DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff +PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff +PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:04.0 10 * [0x0 - 0x3ffffff] prefmem +PCI: 00:09.0 prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done +PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:09.0 24 * [0x0 - 0x3ffffff] prefmem +PCI: 00:18.0 prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done +PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff +PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:04.0 14 * [0x0 - 0x3ffff] mem +PCI: 00:09.0 mem: base: 40000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 02:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:0b.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 03:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:0c.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:09.0 20 * [0x0 - 0xfffff] mem +PCI: 00:0b.0 20 * [0x100000 - 0x1fffff] mem +PCI: 00:0c.0 20 * [0x200000 - 0x2fffff] mem +PCI: 00:02.0 10 * [0x300000 - 0x300fff] mem +PCI: 00:07.0 24 * [0x301000 - 0x301fff] mem +PCI: 00:08.0 24 * [0x302000 - 0x302fff] mem +PCI: 00:02.1 10 * [0x303000 - 0x3030ff] mem +PCI: 00:18.0 mem: base: 303100 size: 400000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:18.0 110b8 * [0x0 - 0x3ffffff] prefmem +PCI: 00:18.0 110b0 * [0x4000000 - 0x43fffff] mem +DOMAIN: 0000 mem: base: 4400000 size: 4400000 align: 26 gran: 0 limit: ffffffff done +avoid_fixed_resources: DOMAIN: 0000 +avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff +constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed) +constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed) +constrain_resources: PCI: 00:01.0 14 base fec00000 limit fec00fff mem (fixed) +constrain_resources: PCI: 00:01.0 10000000 base 00000000 limit 00000fff io (fixed) +avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 base f8000000 limit febfffff +Setting resources... +DOMAIN: 0000 io: base:1000 size:3000 align:12 gran:0 limit:ffff +PCI: 00:18.0 110d8 * [0x1000 - 0x3fff] io +DOMAIN: 0000 io: next_base: 4000 size: 3000 align: 12 gran: 0 done +PCI: 00:18.0 io: base:1000 size:3000 align:12 gran:12 limit:3fff +PCI: 00:09.0 1c * [0x1000 - 0x1fff] io +PCI: 00:01.0 60 * [0x2000 - 0x20ff] io +PCI: 00:01.0 64 * [0x2400 - 0x24ff] io +PCI: 00:01.0 68 * [0x2800 - 0x28ff] io +PCI: 00:01.0 10 * [0x2c00 - 0x2c7f] io +PCI: 00:01.1 20 * [0x2c80 - 0x2cbf] io +PCI: 00:01.1 24 * [0x2cc0 - 0x2cff] io +PCI: 00:01.1 10 * [0x3000 - 0x301f] io +PCI: 00:06.0 20 * [0x3020 - 0x302f] io +PCI: 00:07.0 20 * [0x3030 - 0x303f] io +PCI: 00:08.0 20 * [0x3040 - 0x304f] io +PCI: 00:07.0 10 * [0x3050 - 0x3057] io +PCI: 00:07.0 18 * [0x3058 - 0x305f] io +PCI: 00:08.0 10 * [0x3060 - 0x3067] io +PCI: 00:08.0 18 * [0x3068 - 0x306f] io +PCI: 00:07.0 14 * [0x3070 - 0x3073] io +PCI: 00:07.0 1c * [0x3074 - 0x3077] io +PCI: 00:08.0 14 * [0x3078 - 0x307b] io +PCI: 00:08.0 1c * [0x307c - 0x307f] io +PCI: 00:18.0 io: next_base: 3080 size: 3000 align: 12 gran: 12 done +PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff +PCI: 01:04.0 18 * [0x1000 - 0x107f] io +PCI: 00:09.0 io: next_base: 1080 size: 1000 align: 12 gran: 12 done +PCI: 00:0b.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0b.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0c.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0c.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0d.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0d.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0e.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0e.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +DOMAIN: 0000 mem: base:f8000000 size:4400000 align:26 gran:0 limit:febfffff +PCI: 00:18.0 110b8 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:18.0 110b0 * [0xfc000000 - 0xfc3fffff] mem +DOMAIN: 0000 mem: next_base: fc400000 size: 4400000 align: 26 gran: 0 done +PCI: 00:18.0 prefmem: base:f8000000 size:4000000 align:26 gran:20 limit:fbffffff +PCI: 00:09.0 24 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:18.0 prefmem: next_base: fc000000 size: 4000000 align: 26 gran: 20 done +PCI: 00:09.0 prefmem: base:f8000000 size:4000000 align:26 gran:20 limit:fbffffff +PCI: 01:04.0 10 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:09.0 prefmem: next_base: fc000000 size: 4000000 align: 26 gran: 20 done +PCI: 00:0b.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0b.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0c.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0c.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0d.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0d.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0e.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0e.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:18.0 mem: base:fc000000 size:400000 align:20 gran:20 limit:fc3fffff +PCI: 00:09.0 20 * [0xfc000000 - 0xfc0fffff] mem +PCI: 00:0b.0 20 * [0xfc100000 - 0xfc1fffff] mem +PCI: 00:0c.0 20 * [0xfc200000 - 0xfc2fffff] mem +PCI: 00:02.0 10 * [0xfc300000 - 0xfc300fff] mem +PCI: 00:07.0 24 * [0xfc301000 - 0xfc301fff] mem +PCI: 00:08.0 24 * [0xfc302000 - 0xfc302fff] mem +PCI: 00:02.1 10 * [0xfc303000 - 0xfc3030ff] mem +PCI: 00:18.0 mem: next_base: fc303100 size: 400000 align: 20 gran: 20 done +PCI: 00:09.0 mem: base:fc000000 size:100000 align:20 gran:20 limit:fc0fffff +PCI: 01:04.0 14 * [0xfc000000 - 0xfc03ffff] mem +PCI: 00:09.0 mem: next_base: fc040000 size: 100000 align: 20 gran: 20 done +PCI: 00:0b.0 mem: base:fc100000 size:100000 align:20 gran:20 limit:fc1fffff +PCI: 02:00.0 10 * [0xfc100000 - 0xfc10ffff] mem +PCI: 00:0b.0 mem: next_base: fc110000 size: 100000 align: 20 gran: 20 done +PCI: 00:0c.0 mem: base:fc200000 size:100000 align:20 gran:20 limit:fc2fffff +PCI: 03:00.0 10 * [0xfc200000 - 0xfc20ffff] mem +PCI: 00:0c.0 mem: next_base: fc210000 size: 100000 align: 20 gran: 20 done +PCI: 00:0d.0 mem: base:fc3fffff size:0 align:20 gran:20 limit:fc3fffff +PCI: 00:0d.0 mem: next_base: fc3fffff size: 0 align: 20 gran: 20 done +PCI: 00:0e.0 mem: base:fc3fffff size:0 align:20 gran:20 limit:fc3fffff +PCI: 00:0e.0 mem: next_base: fc3fffff size: 0 align: 20 gran: 20 done +Root Device assign_resources, bus 0 link: 0 +0: mmio_basek=00300000, basek=00400000, limitk=00500000 +1: mmio_basek=00300000, basek=00500000, limitk=00600000 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device +PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io <node 0 link 1> +PCI: 00:18.0 110b8 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x14 prefmem <node 0 link 1> +PCI: 00:18.0 110b0 <- [0x00fc000000 - 0x00fc3fffff] size 0x00400000 gran 0x14 mem <node 0 link 1> +PCI: 00:18.0 assign_resources, bus 0 link: 1 +PCI: 00:01.0 10 <- [0x0000002c00 - 0x0000002c7f] size 0x00000080 gran 0x07 io +PCI: 00:01.0 60 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 64 <- [0x0000002400 - 0x00000024ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 68 <- [0x0000002800 - 0x00000028ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 assign_resources, bus 0 link: 0 +PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io +PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq +PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq +PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io +PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq +PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io +PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq +PNP: 002e.3 f1 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 io +PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io +PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io +PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq +PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq +ERROR: PNP: 002e.5 f0 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 30 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 f0 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 f1 irq size: 0x0000000001 not assigned +PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io +PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq +PCI: 00:01.0 assign_resources, bus 0 link: 0 +PCI: 00:01.0 14 <- [0x00fec00000 - 0x00fec00fff] size 0x00001000 gran 0x0c mem +PCI: 00:01.0 44 <- [0x00fed00000 - 0x00fed00fff] size 0x00001000 gran 0x0c mem +PCI: 00:01.1 10 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io +PCI: 00:01.1 20 <- [0x0000002c80 - 0x0000002cbf] size 0x00000040 gran 0x06 io +PCI: 00:01.1 24 <- [0x0000002cc0 - 0x0000002cff] size 0x00000040 gran 0x06 io +PCI: 00:01.1 assign_resources, bus 1 link: 0 +PCI: 00:01.1 assign_resources, bus 1 link: 0 +PCI: 00:02.0 10 <- [0x00fc300000 - 0x00fc300fff] size 0x00001000 gran 0x0c mem +PCI: 00:02.1 10 <- [0x00fc303000 - 0x00fc3030ff] size 0x00000100 gran 0x08 mem +PCI: 00:06.0 20 <- [0x0000003020 - 0x000000302f] size 0x00000010 gran 0x04 io +PCI: 00:07.0 10 <- [0x0000003050 - 0x0000003057] size 0x00000008 gran 0x03 io +PCI: 00:07.0 14 <- [0x0000003070 - 0x0000003073] size 0x00000004 gran 0x02 io +PCI: 00:07.0 18 <- [0x0000003058 - 0x000000305f] size 0x00000008 gran 0x03 io +PCI: 00:07.0 1c <- [0x0000003074 - 0x0000003077] size 0x00000004 gran 0x02 io +PCI: 00:07.0 20 <- [0x0000003030 - 0x000000303f] size 0x00000010 gran 0x04 io +PCI: 00:07.0 24 <- [0x00fc301000 - 0x00fc301fff] size 0x00001000 gran 0x0c mem +PCI: 00:08.0 10 <- [0x0000003060 - 0x0000003067] size 0x00000008 gran 0x03 io +PCI: 00:08.0 14 <- [0x0000003078 - 0x000000307b] size 0x00000004 gran 0x02 io +PCI: 00:08.0 18 <- [0x0000003068 - 0x000000306f] size 0x00000008 gran 0x03 io +PCI: 00:08.0 1c <- [0x000000307c - 0x000000307f] size 0x00000004 gran 0x02 io +PCI: 00:08.0 20 <- [0x0000003040 - 0x000000304f] size 0x00000010 gran 0x04 io +PCI: 00:08.0 24 <- [0x00fc302000 - 0x00fc302fff] size 0x00001000 gran 0x0c mem +PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io +PCI: 00:09.0 24 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x14 bus 01 prefmem +PCI: 00:09.0 20 <- [0x00fc000000 - 0x00fc0fffff] size 0x00100000 gran 0x14 bus 01 mem +PCI: 00:09.0 assign_resources, bus 1 link: 0 +PCI: 01:04.0 10 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a prefmem +PCI: 01:04.0 14 <- [0x00fc000000 - 0x00fc03ffff] size 0x00040000 gran 0x12 mem +PCI: 01:04.0 18 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran 0x07 io +PCI: 00:09.0 assign_resources, bus 1 link: 0 +PCI: 00:0b.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 02 io +PCI: 00:0b.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 02 prefmem +PCI: 00:0b.0 20 <- [0x00fc100000 - 0x00fc1fffff] size 0x00100000 gran 0x14 bus 02 mem +PCI: 00:0b.0 assign_resources, bus 2 link: 0 +PCI: 02:00.0 10 <- [0x00fc100000 - 0x00fc10ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:0b.0 assign_resources, bus 2 link: 0 +PCI: 00:0c.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 03 io +PCI: 00:0c.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 03 prefmem +PCI: 00:0c.0 20 <- [0x00fc200000 - 0x00fc2fffff] size 0x00100000 gran 0x14 bus 03 mem +PCI: 00:0c.0 assign_resources, bus 3 link: 0 +PCI: 03:00.0 10 <- [0x00fc200000 - 0x00fc20ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:0c.0 assign_resources, bus 3 link: 0 +PCI: 00:0d.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 04 io +PCI: 00:0d.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 04 prefmem +PCI: 00:0d.0 20 <- [0x00fc3fffff - 0x00fc3ffffe] size 0x00000000 gran 0x14 bus 04 mem +PCI: 00:0d.0 assign_resources, bus 4 link: 0 +PCI: 00:0d.0 assign_resources, bus 4 link: 0 +PCI: 00:0e.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 05 io +PCI: 00:0e.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 05 prefmem +PCI: 00:0e.0 20 <- [0x00fc3fffff - 0x00fc3ffffe] size 0x00000000 gran 0x14 bus 05 mem +PCI: 00:18.0 assign_resources, bus 0 link: 1 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +Root Device assign_resources, bus 0 link: 0 +Done setting resources. +Show resources in subtree (Root Device)...After assigning values. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: 01 + APIC: 02 + APIC: 03 + APIC: 04 + APIC: 05 + APIC: 06 + APIC: 07 + DOMAIN: 0000 child on link 0 PCI: 00:18.0 + DOMAIN: 0000 resource base 1000 size 3000 align 12 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base f8000000 size 4400000 align 26 gran 0 limit febfffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 + DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 + DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20 + DOMAIN: 0000 resource base 100000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 30 + DOMAIN: 0000 resource base 140000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 41 + PCI: 00:18.0 child on link 0 PCI: 00:00.0 + PCI: 00:18.0 resource base 1000 size 3000 align 12 gran 12 limit 3fff flags 60080100 index 110d8 + PCI: 00:18.0 resource base f8000000 size 4000000 align 26 gran 20 limit fbffffff flags 60081200 index 110b8 + PCI: 00:18.0 resource base fc000000 size 400000 align 20 gran 20 limit fc3fffff flags 60080200 index 110b0 + PCI: 00:00.0 + PCI: 00:01.0 child on link 0 PNP: 002e.0 + PCI: 00:01.0 resource base 2c00 size 80 align 7 gran 7 limit 2c7f flags 60000100 index 10 + PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 14 + PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 44 + PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 60 + PCI: 00:01.0 resource base 2400 size 100 align 8 gran 8 limit 24ff flags 60000100 index 64 + PCI: 00:01.0 resource base 2800 size 100 align 8 gran 8 limit 28ff flags 60000100 index 68 + PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PNP: 002e.0 + PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.3 + PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000500 index f1 + PNP: 002e.5 + PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 + PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 + PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 + PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.7 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 + PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.8 + PNP: 002e.9 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 + PNP: 002e.a + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.b + PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60 + PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PCI: 00:01.1 child on link 0 I2C: 01:50 + PCI: 00:01.1 resource base 3000 size 20 align 5 gran 5 limit 301f flags 60000100 index 10 + PCI: 00:01.1 resource base 2c80 size 40 align 6 gran 6 limit 2cbf flags 60000100 index 20 + PCI: 00:01.1 resource base 2cc0 size 40 align 6 gran 6 limit 2cff flags 60000100 index 24 + I2C: 01:50 + I2C: 01:51 + I2C: 01:52 + I2C: 01:53 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:2f + PCI: 00:02.0 + PCI: 00:02.0 resource base fc300000 size 1000 align 12 gran 12 limit fc300fff flags 60000200 index 10 + PCI: 00:02.1 + PCI: 00:02.1 resource base fc303000 size 100 align 8 gran 8 limit fc3030ff flags 60000200 index 10 + PCI: 00:04.0 + PCI: 00:04.1 + PCI: 00:06.0 + PCI: 00:06.0 resource base 3020 size 10 align 4 gran 4 limit 302f flags 60000100 index 20 + PCI: 00:07.0 + PCI: 00:07.0 resource base 3050 size 8 align 3 gran 3 limit 3057 flags 60000100 index 10 + PCI: 00:07.0 resource base 3070 size 4 align 2 gran 2 limit 3073 flags 60000100 index 14 + PCI: 00:07.0 resource base 3058 size 8 align 3 gran 3 limit 305f flags 60000100 index 18 + PCI: 00:07.0 resource base 3074 size 4 align 2 gran 2 limit 3077 flags 60000100 index 1c + PCI: 00:07.0 resource base 3030 size 10 align 4 gran 4 limit 303f flags 60000100 index 20 + PCI: 00:07.0 resource base fc301000 size 1000 align 12 gran 12 limit fc301fff flags 60000200 index 24 + PCI: 00:08.0 + PCI: 00:08.0 resource base 3060 size 8 align 3 gran 3 limit 3067 flags 60000100 index 10 + PCI: 00:08.0 resource base 3078 size 4 align 2 gran 2 limit 307b flags 60000100 index 14 + PCI: 00:08.0 resource base 3068 size 8 align 3 gran 3 limit 306f flags 60000100 index 18 + PCI: 00:08.0 resource base 307c size 4 align 2 gran 2 limit 307f flags 60000100 index 1c + PCI: 00:08.0 resource base 3040 size 10 align 4 gran 4 limit 304f flags 60000100 index 20 + PCI: 00:08.0 resource base fc302000 size 1000 align 12 gran 12 limit fc302fff flags 60000200 index 24 + PCI: 00:09.0 child on link 0 PCI: 01:04.0 + PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c + PCI: 00:09.0 resource base f8000000 size 4000000 align 26 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:09.0 resource base fc000000 size 100000 align 20 gran 20 limit fc0fffff flags 60080202 index 20 + PCI: 01:04.0 + PCI: 01:04.0 resource base f8000000 size 4000000 align 26 gran 26 limit fbffffff flags 60001200 index 10 + PCI: 01:04.0 resource base fc000000 size 40000 align 18 gran 18 limit fc03ffff flags 60000200 index 14 + PCI: 01:04.0 resource base 1000 size 80 align 7 gran 7 limit 107f flags 60000100 index 18 + PCI: 01:04.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3 + PCI: 00:0a.0 + PCI: 00:0b.0 child on link 0 PCI: 02:00.0 + PCI: 00:0b.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0b.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0b.0 resource base fc100000 size 100000 align 20 gran 20 limit fc1fffff flags 60080202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base fc100000 size 10000 align 16 gran 16 limit fc10ffff flags 60000201 index 10 + PCI: 00:0c.0 child on link 0 PCI: 03:00.0 + PCI: 00:0c.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0c.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0c.0 resource base fc200000 size 100000 align 20 gran 20 limit fc2fffff flags 60080202 index 20 + PCI: 03:00.0 + PCI: 03:00.0 resource base fc200000 size 10000 align 16 gran 16 limit fc20ffff flags 60000201 index 10 + PCI: 00:0d.0 child on link 0 PCI: 04:00.0 + PCI: 00:0d.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0d.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0d.0 resource base fc3fffff size 0 align 20 gran 20 limit fc3fffff flags 60080202 index 20 + PCI: 04:00.0 + PCI: 00:0e.0 + PCI: 00:0e.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0e.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0e.0 resource base fc3fffff size 0 align 20 gran 20 limit fc3fffff flags 60080202 index 20 + PCI: 00:0f.0 + PCI: 00:18.1 + PCI: 00:18.2 + PCI: 00:18.3 + PCI: 00:18.4 + PCI: 00:19.0 + PCI: 00:19.1 + PCI: 00:19.2 + PCI: 00:19.3 + PCI: 00:19.4 +Done allocating resources. +BS: BS_DEV_RESOURCES times (us): entry 0 run 3267943 exit 0 +Enabling resources... +PCI: 00:18.0 cmd <- 00 +PCI: 00:18.1 subsystem <- 1043/8162 +PCI: 00:18.1 cmd <- 00 +PCI: 00:18.2 subsystem <- 1043/8162 +PCI: 00:18.2 cmd <- 00 +PCI: 00:18.3 cmd <- 00 +PCI: 00:18.4 subsystem <- 1043/8162 +PCI: 00:18.4 cmd <- 00 +PCI: 00:19.0 cmd <- 00 +PCI: 00:19.1 subsystem <- 1043/8162 +PCI: 00:19.1 cmd <- 00 +PCI: 00:19.2 subsystem <- 1043/8162 +PCI: 00:19.2 cmd <- 00 +PCI: 00:19.3 cmd <- 00 +PCI: 00:19.4 subsystem <- 1043/8162 +PCI: 00:19.4 cmd <- 00 +PCI: 00:00.0 subsystem <- 1043/8162 +PCI: 00:00.0 cmd <- 06 +PCI: 00:01.0 subsystem <- 1043/8162 +PCI: 00:01.0 cmd <- 0f +ck804 lpc decode:PNP: 002e.0, base=0x000003f0, end=0x000003f7 +ck804 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff +ck804 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff +ck804 lpc decode:PNP: 002e.3, base=0x00000004, end=0x00000004 +ck804 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 +ck804 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 +ck804 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000297 +PCI: 00:01.1 subsystem <- 1043/8162 +PCI: 00:01.1 cmd <- 01 +PCI: 00:02.0 subsystem <- 1043/8162 +PCI: 00:02.0 cmd <- 02 +PCI: 00:02.1 subsystem <- 1043/8162 +PCI: 00:02.1 cmd <- 02 +PCI: 00:06.0 subsystem <- 1043/8162 +PCI: 00:06.0 cmd <- 01 +PCI: 00:07.0 subsystem <- 1043/8162 +PCI: 00:07.0 cmd <- 03 +PCI: 00:08.0 subsystem <- 1043/8162 +PCI: 00:08.0 cmd <- 03 +PCI: 00:09.0 bridge ctrl <- 000b +PCI: 00:09.0 cmd <- 07 +PCI: 00:0b.0 bridge ctrl <- 0003 +PCI: 00:0b.0 cmd <- 06 +PCI: 00:0c.0 bridge ctrl <- 0003 +PCI: 00:0c.0 cmd <- 06 +PCI: 00:0d.0 bridge ctrl <- 0003 +PCI: 00:0d.0 cmd <- 00 +PCI: 00:0e.0 bridge ctrl <- 0003 +PCI: 00:0e.0 cmd <- 00 +PCI: 01:04.0 cmd <- 03 +PCI: 02:00.0 subsystem <- 1043/8162 +PCI: 02:00.0 cmd <- 02 +PCI: 03:00.0 subsystem <- 1043/8162 +PCI: 03:00.0 cmd <- 02 +done. +BS: BS_DEV_ENABLE times (us): entry 0 run 162779 exit 0 +Initializing devices... +Root Device init ... +Root Device init finished in 1931 usecs +CPU_CLUSTER: 0 init ... +start_eip=0x00001000, code_size=0x00000031 +CPU1: stack_base 00138000, stack_end 00138ff8 +Asserting INIT. +Waiting for send to finish... ++Deasserting INIT. +Waiting for send to finish... ++#startup loops: 2. +Sending STARTUP #1 to 1. +After apic_write. +Initializing CPU #1 +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Sending STARTUP #2 to 1. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++nodeid = 00, coreid = 01 +After Startup. +CPU2: stack_base 00137000, stack_end 00137ff8 +Enabling cache +Asserting INIT. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Waiting for send to finish... ++MTRR: Physical address space: +0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 +0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 +0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 +0x00000000c0000000 - 0x00000000f8000000 size 0x38000000 type 0 +0x00000000f8000000 - 0x00000000fc000000 size 0x04000000 type 1 +0x00000000fc000000 - 0x0000000100000000 size 0x04000000 type 0 +0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 +Deasserting INIT. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Waiting for send to finish... ++MTRR: default type WB/UC MTRR counts: 5/3. +MTRR: UC selected as default type. +MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6 +MTRR: 2 base 0x00000000f8000000 mask 0x0000fffffc000000 type 1 +#startup loops: 2. +Sending STARTUP #1 to 2. +After apic_write. + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Startup point 1. +Waiting for send to finish... ++Setting up local apic...Sending STARTUP #2 to 2. +After apic_write. + apic_id: 0x01 done. +Startup point 1. +Waiting for send to finish... ++CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Initializing CPU #2 +After Startup. +siblings = 03, CPU3: stack_base 00136000, stack_end 00136ff8 +CPU #1 initialized +Asserting INIT. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Deasserting INIT. +Waiting for send to finish... ++CPU: family 10, model 02, stepping 01 +#startup loops: 2. +Sending STARTUP #1 to 3. +After apic_write. +nodeid = 00, coreid = 02 +Startup point 1. +Waiting for send to finish... ++Initializing CPU #3 +Sending STARTUP #2 to 3. +After apic_write. +Enabling cache +Startup point 1. +Waiting for send to finish... ++CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +After Startup. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU4: stack_base 00135000, stack_end 00135ff8 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Asserting INIT. +Setting up local apic...Waiting for send to finish... ++ apic_id: 0x02 done. +Deasserting INIT. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Waiting for send to finish... ++siblings = 03, #startup loops: 2. +Sending STARTUP #1 to 4. +After apic_write. +CPU #2 initialized +Startup point 1. +Waiting for send to finish... ++Initializing CPU #4 +Sending STARTUP #2 to 4. +After apic_write. +CPU: vendor AMD device 100f21 +Startup point 1. +Waiting for send to finish... ++CPU: family 10, model 02, stepping 01 +After Startup. +CPU5: stack_base 00134000, stack_end 00134ff8 +nodeid = 00, coreid = 03 +Asserting INIT. +Waiting for send to finish... ++Enabling cache +Deasserting INIT. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Waiting for send to finish... ++MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +#startup loops: 2. +Sending STARTUP #1 to 5. +After apic_write. + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Startup point 1. +Waiting for send to finish... ++Setting up local apic...Sending STARTUP #2 to 5. +After apic_write. + apic_id: 0x03 done. +Startup point 1. +Waiting for send to finish... ++CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +After Startup. +siblings = 03, CPU6: stack_base 00133000, stack_end 00133ff8 +CPU #3 initialized +Asserting INIT. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Deasserting INIT. +Waiting for send to finish... ++Initializing CPU #5 +#startup loops: 2. +Sending STARTUP #1 to 6. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Sending STARTUP #2 to 6. +After apic_write. +Initializing CPU #6 +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +After Startup. +CPU7: stack_base 00132000, stack_end 00132ff8 +nodeid = 01, coreid = 00 +Asserting INIT. +Waiting for send to finish... ++CPU: family 10, model 02, stepping 01 +Deasserting INIT. +Waiting for send to finish... ++nodeid = 01, coreid = 01 +#startup loops: 2. +Sending STARTUP #1 to 7. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++Enabling cache +Sending STARTUP #2 to 7. +After apic_write. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Startup point 1. +Waiting for send to finish... ++MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +After Startup. +Initializing CPU #0 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +CPU: vendor AMD device 100f21 +CPU: family 10, model 02, stepping 01 +Setting up local apic...nodeid = 00, coreid = 00 + apic_id: 0x05 done. +Enabling cache +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +siblings = 03, MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU #5 initialized + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Enabling cache +Setting up local apic...CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB + apic_id: 0x00 done. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +siblings = 03, Setting up local apic...CPU #0 initialized + apic_id: 0x04 done. +Waiting for 3 CPUS to stop +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +siblings = 03, nodeid = 01, coreid = 02 +CPU #4 initialized +Enabling cache +Waiting for 2 CPUS to stop +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Initializing CPU #7 +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU: vendor AMD device 100f21 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +CPU: family 10, model 02, stepping 01 +Setting up local apic...nodeid = 01, coreid = 03 + apic_id: 0x06 done. +Enabling cache +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +siblings = 03, MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU #6 initialized + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Waiting for 1 CPUS to stop +Setting up local apic... apic_id: 0x07 done. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +siblings = 03, CPU #7 initialized +All AP CPUs stopped (14884 loops) +CPU1: stack: 00138000 - 00139000, lowest used address 00138c8c, stack used: 884 bytes +CPU2: stack: 00137000 - 00138000, lowest used address 00137cd4, stack used: 812 bytes +CPU3: stack: 00136000 - 00137000, lowest used address 00136cd4, stack used: 812 bytes +CPU4: stack: 00135000 - 00136000, lowest used address 00135cd4, stack used: 812 bytes +CPU5: stack: 00134000 - 00135000, lowest used address 00134cd4, stack used: 812 bytes +CPU6: stack: 00133000 - 00134000, lowest used address 00133cd4, stack used: 812 bytes +CPU7: stack: 00132000 - 00133000, lowest used address 00132cd4, stack used: 812 bytes +CPU_CLUSTER: 0 init finished in 995136 usecs +PCI: 00:18.0 init ... +PCI: 00:18.0 init finished in 2030 usecs +PCI: 00:18.1 init ... +PCI: 00:18.1 init finished in 2027 usecs +PCI: 00:18.2 init ... +PCI: 00:18.2 init finished in 2018 usecs +PCI: 00:18.3 init ... +NB: Function 3 Misc Control.. done. +PCI: 00:18.3 init finished in 5293 usecs +PCI: 00:18.4 init ... +PCI: 00:18.4 init finished in 2018 usecs +PCI: 00:19.0 init ... +PCI: 00:19.0 init finished in 2019 usecs +PCI: 00:19.1 init ... +PCI: 00:19.1 init finished in 2018 usecs +PCI: 00:19.2 init ... +PCI: 00:19.2 init finished in 2017 usecs +PCI: 00:19.3 init ... +NB: Function 3 Misc Control.. done. +PCI: 00:19.3 init finished in 5268 usecs +PCI: 00:19.4 init ... +PCI: 00:19.4 init finished in 2017 usecs +PCI: 00:00.0 init ... +PCI: 00:00.0 init finished in 2028 usecs +PCI: 00:01.0 init ... +IOAPIC: Initializing IOAPIC at 0xfec00000 +IOAPIC: Bootstrap Processor Local APIC = 0x00 +IOAPIC: Dumping registers + reg 0x0000: 0x00000000 + reg 0x0001: 0x00170011 + reg 0x0002: 0x00000000 +IOAPIC: 24 interrupts +IOAPIC: Enabling interrupts on FSB +IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 +IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 +IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 +lpc_init: pm_base = 2000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +set power on after power fail +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +RTC Init +PCI: 00:01.0 init finished in 164685 usecs +PCI: 00:02.0 init ... +PCI: 00:02.0 init finished in 2026 usecs +PCI: 00:02.1 init ... +PCI: 00:02.1 init finished in 2018 usecs +PCI: 00:06.0 init ... +IDE1 IDE0 +PCI: 00:06.0 init finished in 3105 usecs +PCI: 00:07.0 init ... +SATA S SATA P +PCI: 00:07.0 init finished in 3534 usecs +PCI: 00:08.0 init ... +SATA S SATA P +PCI: 00:08.0 init finished in 3517 usecs +PCI: 00:09.0 init ... +PCI DOMAIN mem base = 0x00f8000000 +[0x50] <-- 0xf8000000 +PCI: 00:09.0 init finished in 7192 usecs +PCI: 00:0b.0 init ... +PCI: 00:0b.0 init finished in 2017 usecs +PCI: 00:0c.0 init ... +PCI: 00:0c.0 init finished in 2019 usecs +PCI: 00:0d.0 init ... +PCI: 00:0d.0 init finished in 2019 usecs +PCI: 00:0e.0 init ... +PCI: 00:0e.0 init finished in 2018 usecs +PNP: 002e.0 init ... +PNP: 002e.0 init finished in 1939 usecs +PNP: 002e.2 init ... +PNP: 002e.2 init finished in 1930 usecs +PNP: 002e.3 init ... +PNP: 002e.3 init finished in 1931 usecs +PNP: 002e.5 init ... +Keyboard init... +PNP: 002e.5 init finished in 352042 usecs +PNP: 002e.9 init ... +PNP: 002e.9 init finished in 1928 usecs +PNP: 002e.b init ... +PNP: 002e.b init finished in 1929 usecs +smbus: PCI: 00:01.1[0]->I2C: 01:2f init ... +ID: 5ca3 +I2C: 01:2f init finished in 101140 usecs +PCI: 01:04.0 init ... +XGI Z9s: initializing video device +XGI VGA: Relocate IO address: 1000 [00001030] +XGI VGA: chipid = 31 +XGI VGA: Framebuffer at 0xf8000000, mapped to 0xf8000000, size 16384k +XGI VGA: MMIO at 0xfc000000, mapped to 0xfc000000, size 256k +XGI VGA: No or unknown bridge type detected +XGI VGA: Default mode is 800x600x16 (60Hz) +XGI VGA: Set new mode: 800x600x16-60 +PCI: 01:04.0 init finished in 42544 usecs +PCI: 02:00.0 init ... +PCI: 02:00.0 init finished in 2018 usecs +PCI: 03:00.0 init ... +PCI: 03:00.0 init finished in 2018 usecs +Devices initialized +Show all devs... After init. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:18.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:01.0: enabled 1 +PNP: 002e.0: enabled 1 +PNP: 002e.1: enabled 0 +PNP: 002e.2: enabled 1 +PNP: 002e.3: enabled 1 +PNP: 002e.5: enabled 1 +PNP: 002e.7: enabled 0 +PNP: 002e.8: enabled 0 +PNP: 002e.9: enabled 1 +PNP: 002e.a: enabled 0 +PNP: 002e.b: enabled 1 +PCI: 00:01.1: enabled 1 +I2C: 01:50: enabled 1 +I2C: 01:51: enabled 1 +I2C: 01:52: enabled 1 +I2C: 01:53: enabled 1 +I2C: 01:54: enabled 1 +I2C: 01:55: enabled 1 +I2C: 01:56: enabled 1 +I2C: 01:57: enabled 1 +I2C: 01:2f: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:04.0: enabled 0 +PCI: 00:04.1: enabled 0 +PCI: 00:06.0: enabled 1 +PCI: 00:07.0: enabled 1 +PCI: 00:08.0: enabled 1 +PCI: 00:09.0: enabled 1 +PCI: 01:04.0: enabled 1 +PCI: 00:0a.0: enabled 0 +PCI: 00:0b.0: enabled 1 +PCI: 02:00.0: enabled 1 +PCI: 00:0c.0: enabled 1 +PCI: 03:00.0: enabled 1 +PCI: 00:0d.0: enabled 1 +PCI: 04:00.0: enabled 0 +PCI: 00:0e.0: enabled 1 +PCI: 00:0f.0: enabled 0 +PCI: 00:18.1: enabled 1 +PCI: 00:18.2: enabled 1 +PCI: 00:18.3: enabled 1 +PCI: 00:18.4: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:19.1: enabled 1 +PCI: 00:19.2: enabled 1 +PCI: 00:19.3: enabled 1 +PCI: 00:19.4: enabled 1 +APIC: 01: enabled 1 +APIC: 02: enabled 1 +APIC: 03: enabled 1 +APIC: 04: enabled 1 +APIC: 05: enabled 1 +APIC: 06: enabled 1 +APIC: 07: enabled 1 +BS: BS_DEV_INIT times (us): entry 0 run 1990325 exit 0 +Finalize devices... +Devices finalized +BS: BS_POST_DEVICE times (us): entry 0 run 3526 exit 0 +BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CONFIG_LOGICAL_CPUS==1: apicid_base: 00000001 +Writing IRQ routing tables to 0xf0000...done. +Writing IRQ routing tables to 0xbffd8000...done. +PIRQ table: 224 bytes. +Wrote the mp table end at: 000f0410 - 000f05cc +Wrote the mp table end at: bffd7010 - bffd71cc +MP table: 460 bytes. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/dsdt.aml' +CBFS: Found @ offset c00 size 2644 +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/slic' +CBFS: 'fallback/slic' not found. +ACPI: Writing ACPI tables at bffb3000. +ACPI: * FACS +ACPI: * DSDT +ACPI: * FADT +pm_base: 0x2000 +ACPI: added table 1/32, length now 40 +ACPI: * SSDT +processor_brand=Quad-Core AMD Opteron(tm) Processor 8347 +Pstates algorithm ... +Pstate_freq[0] = 1900MHz Pstate_power[0] = 23040mw +Pstate_latency[0] = 5us +Pstate_freq[1] = 1700MHz Pstate_power[1] = 21385mw +Pstate_latency[1] = 5us +Pstate_freq[2] = 1400MHz Pstate_power[2] = 18787mw +Pstate_latency[2] = 5us +Pstate_freq[3] = 1200MHz Pstate_power[3] = 16770mw +Pstate_latency[3] = 5us +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +ACPI: added table 2/32, length now 44 +ACPI: * MCFG +ACPI: * TCPA +TCPA log created at bffa3000 +ACPI: added table 3/32, length now 48 +ACPI: * MADT +ACPI: added table 4/32, length now 52 +current = bffb6910 +ACPI: * SRAT at bffb6910 +SRAT: lapic cpu_index=00, node_id=00, apic_id=00 +SRAT: lapic cpu_index=01, node_id=00, apic_id=01 +SRAT: lapic cpu_index=02, node_id=00, apic_id=02 +SRAT: lapic cpu_index=03, node_id=00, apic_id=03 +SRAT: lapic cpu_index=04, node_id=01, apic_id=04 +SRAT: lapic cpu_index=05, node_id=01, apic_id=05 +SRAT: lapic cpu_index=06, node_id=01, apic_id=06 +SRAT: lapic cpu_index=07, node_id=01, apic_id=07 +set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 +set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 +set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 +set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00100000 +set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00500000, sizek=00100000 +ACPI: added table 5/32, length now 56 +ACPI: * SLIT at bffb6a88 +ACPI: added table 6/32, length now 60 +ACPI: * HPET +ACPI: added table 7/32, length now 64 +ACPI: * SRAT at bffb6b00 +SRAT: lapic cpu_index=00, node_id=00, apic_id=00 +SRAT: lapic cpu_index=01, node_id=00, apic_id=01 +SRAT: lapic cpu_index=02, node_id=00, apic_id=02 +SRAT: lapic cpu_index=03, node_id=00, apic_id=03 +SRAT: lapic cpu_index=04, node_id=01, apic_id=04 +SRAT: lapic cpu_index=05, node_id=01, apic_id=05 +SRAT: lapic cpu_index=06, node_id=01, apic_id=06 +SRAT: lapic cpu_index=07, node_id=01, apic_id=07 +set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 +set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 +set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 +set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00100000 +set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00500000, sizek=00100000 +ACPI: added table 8/32, length now 68 +ACPI: * SLIT at bffb6c78 +ACPI: added table 9/32, length now 72 +ACPI: done. +ACPI tables: 15536 bytes. +smbios_write_tables: bffa2000 +Root Device (ASUS KFSN4-DRE) +CPU_CLUSTER: 0 (AMD FAM10 Root Complex) +APIC: 00 (unknown) +DOMAIN: 0000 (AMD FAM10 Root Complex) +PCI: 00:18.0 (AMD FAM10 Northbridge) +PCI: 00:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:01.0 (NVIDIA CK804 Southbridge) +PNP: 002e.0 (Winbond W83627THG Super I/O) +PNP: 002e.1 (Winbond W83627THG Super I/O) +PNP: 002e.2 (Winbond W83627THG Super I/O) +PNP: 002e.3 (Winbond W83627THG Super I/O) +PNP: 002e.5 (Winbond W83627THG Super I/O) +PNP: 002e.7 (Winbond W83627THG Super I/O) +PNP: 002e.8 (Winbond W83627THG Super I/O) +PNP: 002e.9 (Winbond W83627THG Super I/O) +PNP: 002e.a (Winbond W83627THG Super I/O) +PNP: 002e.b (Winbond W83627THG Super I/O) +PCI: 00:01.1 (NVIDIA CK804 Southbridge) +I2C: 01:50 (unknown) +I2C: 01:51 (unknown) +I2C: 01:52 (unknown) +I2C: 01:53 (unknown) +I2C: 01:54 (unknown) +I2C: 01:55 (unknown) +I2C: 01:56 (unknown) +I2C: 01:57 (unknown) +I2C: 01:2f (Nuvoton W83793 Hardware Monitor) +PCI: 00:02.0 (NVIDIA CK804 Southbridge) +PCI: 00:02.1 (NVIDIA CK804 Southbridge) +PCI: 00:04.0 (NVIDIA CK804 Southbridge) +PCI: 00:04.1 (NVIDIA CK804 Southbridge) +PCI: 00:06.0 (NVIDIA CK804 Southbridge) +PCI: 00:07.0 (NVIDIA CK804 Southbridge) +PCI: 00:08.0 (NVIDIA CK804 Southbridge) +PCI: 00:09.0 (NVIDIA CK804 Southbridge) +PCI: 01:04.0 (NVIDIA CK804 Southbridge) +PCI: 00:0a.0 (NVIDIA CK804 Southbridge) +PCI: 00:0b.0 (NVIDIA CK804 Southbridge) +PCI: 02:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0c.0 (NVIDIA CK804 Southbridge) +PCI: 03:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0d.0 (NVIDIA CK804 Southbridge) +PCI: 04:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0e.0 (NVIDIA CK804 Southbridge) +PCI: 00:0f.0 (NVIDIA CK804 Southbridge) +PCI: 00:18.1 (AMD FAM10 Northbridge) +PCI: 00:18.2 (AMD FAM10 Northbridge) +PCI: 00:18.3 (AMD FAM10 Northbridge) +PCI: 00:18.4 (AMD FAM10 Northbridge) +PCI: 00:19.0 (AMD FAM10 Northbridge) +PCI: 00:19.1 (AMD FAM10 Northbridge) +PCI: 00:19.2 (AMD FAM10 Northbridge) +PCI: 00:19.3 (AMD FAM10 Northbridge) +PCI: 00:19.4 (AMD FAM10 Northbridge) +APIC: 01 (unknown) +APIC: 02 (unknown) +APIC: 03 (unknown) +APIC: 04 (unknown) +APIC: 05 (unknown) +APIC: 06 (unknown) +APIC: 07 (unknown) +SMBIOS tables: 553 bytes. +Writing table forward entry at 0x00000500 +Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9fe4 +Table forward entry ends at 0x00000528. +... aligned to 0x00001000 +Writing coreboot table at 0xbff9a000 +rom_table_end = 0xbff9a000 +... aligned to 0xbffa0000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES + 1. 0000000000001000-000000000009ffff: RAM + 2. 00000000000a0000-00000000000bffff: RESERVED + 3. 00000000000c0000-00000000bff99fff: RAM + 4. 00000000bff9a000-00000000bfffffff: CONFIGURATION TABLES + 5. 00000000c0000000-00000000cfffffff: RESERVED + 6. 0000000100000000-000000017fffffff: RAM +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Wrote coreboot table at: bff9a000, 0xc08 bytes, checksum 440a +coreboot table: 3104 bytes. +IMD ROOT 0. bffff000 00001000 +IMD SMALL 1. bfffe000 00001000 +CAR GLOBALS 2. bfffb000 0000291c +CONSOLE 3. bffdb000 00020000 +AMDMEM INFO 4. bffd9000 0000172c +IRQ TABLE 5. bffd8000 00001000 +SMP TABLE 6. bffd7000 00001000 +ACPI 7. bffb3000 00024000 +54435041 8. bffa3000 00010000 +SMBIOS 9. bffa2000 00000800 +COREBOOT 10. bff9a000 00008000 +IMD small region: + IMD ROOT 0. bfffec00 00000400 + USBDEBUG 1. bfffeba0 00000058 + ROMSTAGE 2. bfffeb80 00000004 + GDT 3. bfffe980 00000200 +BS: BS_WRITE_TABLES times (us): entry 0 run 759226 exit 0 +CBFS provider active. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/payload' +CBFS: Found @ offset 29c80 size 92b41 +'fallback/payload' located at offset: 29cb8 size: 92b41 +Loading segment from rom address 0xfff29cb8 + code (compression=1) + New segment dstaddr 0x8200 memsize 0x17420 srcaddr 0xfff29d0c filesize 0x8215 +Loading segment from rom address 0xfff29cd4 + code (compression=1) + New segment dstaddr 0x100000 memsize 0x23f9f0 srcaddr 0xfff31f21 filesize 0x8a8d8 +Loading segment from rom address 0xfff29cf0 + Entry Point 0x00008200 +Bounce Buffer at bfc5b000, 3401660 bytes +Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz: 0x0000000000008215 +lb: [0x0000000000100000, 0x00000000001fedcc) +Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz: 0x0000000000008215 +using LZMA +[ 0x00008200, 00017ce3, 0x0001f620) <- fff29d0c +Clearing Segment: addr: 0x0000000000017ce3 memsz: 0x000000000000793d +dest 00008200, end 0001f620, bouncebuffer bfc5b000 +Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000023f9f0 filesz: 0x000000000008a8d8 +lb: [0x0000000000100000, 0x00000000001fedcc) +segment: [0x0000000000100000, 0x000000000018a8d8, 0x000000000033f9f0) + bounce: [0x00000000bfc5b000, 0x00000000bfce58d8, 0x00000000bfe9a9f0) +Post relocation: addr: 0x00000000bfc5b000 memsz: 0x000000000023f9f0 filesz: 0x000000000008a8d8 +using LZMA +[ 0xbfc5b000, bfe9a9f0, 0xbfe9a9f0) <- fff31f21 +dest bfc5b000, end bfe9a9f0, bouncebuffer bfc5b000 +move suffix around: from bfd59dcc, to 1fedcc, amount: 140c24 +Loaded segments +BS: BS_PAYLOAD_LOAD times (us): entry 0 run 781450 exit 0 +Jumping to boot code at 00008200(bff9a000) +CPU0: stack: 00139000 - 0013a000, lowest used address 00139ae0, stack used: 1312 bytes +entry = 0x00008200 +lb_start = 0x00100000 +lb_size = 0x000fedcc +buffer = 0xbfc5b000 +[H[J[1;1H[?25l[m[H[J[1;1H[2;32HFREE AS IN FREEDOM + + +[m[4;2H+----------------------------------------------------------------------------+[5;2H|[5;79H|[6;2H|[6;79H|[7;2H|[7;79H|[8;2H|[8;79H|[9;2H|[9;79H|[10;2H|[10;79H|[11;2H|[11;79H|[12;2H|[12;79H|[13;2H|[13;79H|[14;2H|[14;79H|[15;2H|[15;79H|[16;2H|[16;79H|[17;2H+----------------------------------------------------------------------------+[m[18;2H[19;2H[m Use the ^ and v keys to select which entry is highlighted. + + Press enter to boot the selected OS, `e' to edit the commands + + before booting or `c' for a command-line. [5;80H [7m[5;3H*Load Operating System [m[5;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) [m[6;78H[m[m[7;3H Parse ISOLINUX menu (USB) [m[7;78H[m[m[8;3H Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[m[9;3H Switch to grubtest.cfg [m[9;78H[m[m[10;3H Search for GRUB configuration (grub.cfg) outside of CBFS [m[10;78H[m[m[11;3H Load MemTest86+ [m[11;78H[m[m[12;3H [m[12;78H[m[m[13;3H [m[13;78H[m[m[14;3H [m[14;78H[m[m[15;3H [m[15;78H[m[m[16;3H [m[16;78H[m[16;80H [5;78H[22;1H The highlighted entry will be executed automatically in 1s. [5;78H[22;1H The highlighted entry will be executed automatically in 0s. [5;78H[?25h[H[J[1;1H[H[J[1;1H Booting `Load Operating System' + + + + Failed to boot both default and fallback entries. + + +Press any key to continue... + +[?25l[m[H[J[1;1H[2;32HFREE AS IN FREEDOM + + +[m[4;2H+----------------------------------------------------------------------------+[5;2H|[5;79H|[6;2H|[6;79H|[7;2H|[7;79H|[8;2H|[8;79H|[9;2H|[9;79H|[10;2H|[10;79H|[11;2H|[11;79H|[12;2H|[12;79H|[13;2H|[13;79H|[14;2H|[14;79H|[15;2H|[15;79H|[16;2H|[16;79H|[17;2H+----------------------------------------------------------------------------+[m[18;2H[19;2H[m Use the ^ and v keys to select which entry is highlighted. + + Press enter to boot the selected OS, `e' to edit the commands + + before booting or `c' for a command-line. [5;80H [7m[5;3H*Load Operating System [m[5;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) [m[6;78H[m[m[7;3H Parse ISOLINUX menu (USB) [m[7;78H[m[m[8;3H Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[m[9;3H Switch to grubtest.cfg [m[9;78H[m[m[10;3H Search for GRUB configuration (grub.cfg) outside of CBFS [m[10;78H[m[m[11;3H Load MemTest86+ [m[11;78H[m[m[12;3H [m[12;78H[m[m[13;3H [m[13;78H[m[m[14;3H [m[14;78H[m[m[15;3H [m[15;78H[m[m[16;3H [m[16;78H[m[16;80H [5;78H[22;1H [23;1H [5;78H[m[5;3H Load Operating System [m[5;78H[m[7m[6;3H*Parse ISOLINUX menu (ahci0) [m[6;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) [m[6;78H[m[7m[7;3H*Parse ISOLINUX menu (USB) [m[7;78H[m[m[7;3H Parse ISOLINUX menu (USB) [m[7;78H[m[7m[8;3H*Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[m[8;3H Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[7m[9;3H*Switch to grubtest.cfg [m[9;78H[m ��ޒ���������� + +*****GRAPHICAL FRAMEBUFFER ROM IMAGE***** + +<hangs here for 30 seconds or more> + +coreboot-4.0 Fri Jun 26 20:19:42 UTC 2015 romstage starting... +BSP Family_Model: 00100f21 +*sysinfo range: [000c4000,000c6899] +bsp_apicid = 00 +cpu_init_detectedx = 00000000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cpu_microcode_blob.bin' +CBFS: 'cpu_microcode_blob.bin' not found. +[microcode] microcode file not found. Skipping updates. +cpuSetAMDMSR done +Enter amd_ht_init() +AMD_CB_EventNotify() + event class: 05 + event: 1004 + data: 04 00 00 01 +AMD_CB_EventNotify() + event class: 05 + event: 2006 + data: 04 00 01 00 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Exit amd_ht_init() +cpuSetAMDPCI 00 done +cpuSetAMDPCI 01 done +Prep FID/VID Node:00 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f23 + F3xD8: 03001c14 + F3xDC: 00005428 +Prep FID/VID Node:01 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f23 + F3xD8: 03001c14 + F3xDC: 00005428 +setup_remote_node: 01 done +Start node 01 done. +core0 started: 01 + +Begin FIDVID MSR 0xc0010071 0x20a600e4 0x38045044 +FIDVID on BSP, APIC_id: 00 +BSP fid = 10400 +Wait for AP stage 1: ap_apicid = 1 +init_fidvid_bsp_stage1: timed out reading from ap 01 +Wait for AP stage 1: ap_apicid = 2 +init_fidvid_bsp_stage1: timed out reading from ap 02 +Wait for AP stage 1: ap_apicid = 3 +init_fidvid_bsp_stage1: timed out reading from ap 03 +Wait for AP stage 1: ap_apicid = 4 + readback = 4010401 + common_fid(packed) = 10400 +Wait for AP stage 1: ap_apicid = 5 +init_fidvid_bsp_stage1: timed out reading from ap 05 +Wait for AP stage 1: ap_apicid = 6 +init_fidvid_bsp_stage1: timed out reading from ap 06 +Wait for AP stage 1: ap_apicid = 7 +init_fidvid_bsp_stage1: timed out reading from ap 07 +common_fid = 10400 +FID Change Node:00, F3xD4: c3310f24 +FID Change Node:01, F3xD4: c3310f24 +End FIDVIDMSR 0xc0010071 0x20a600e4 0x38005044 +start_other_cores() +init node: 00 cores: 03 +Start other core - nodeid: 00 cores: 03 +init node: 01 cores: 03 +Start other core - nodeid: 01 cores: 03 +started ap apicid: 01start + +coreboot-4.0 Fri Jun 26 20:19:42 UTC 2015 romstage starting... +BSP Family_Model: 00100f21 +*sysinfo range: [000c4000,000c6899] +bsp_apicid = 00 +cpu_init_detectedx = 00000000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cpu_microcode_blob.bin' +CBFS: 'cpu_microcode_blob.bin' not found. +[microcode] microcode file not found. Skipping updates. +cpuSetAMDMSR done +Enter amd_ht_init() +AMD_CB_EventNotify() + event class: 05 + event: 1004 + data: 04 00 00 01 +AMD_CB_EventNotify() + event class: 05 + event: 2006 + data: 04 00 01 00 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Exit amd_ht_init() +cpuSetAMDPCI 00 done +cpuSetAMDPCI 01 done +Prep FID/VID Node:00 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f24 + F3xD8: 03001c14 + F3xDC: 00005428 +Prep FID/VID Node:01 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f24 + F3xD8: 03001c14 + F3xDC: 00005428 +setup_remote_node: 01 done +Start node 01 done. +core0 started: 01 + +Begin FIDVID MSR 0xc0010071 0x20a600e4 0x38005044 +End FIDVIDMSR 0xc0010071 0x20a600e4 0x38003803 +start_other_cores() +init node: 00 cores: 03 +Start other core - nodeid: 00 cores: 03 +init node: 01 cores: 03 +Start other core - nodeid: 01 cores: 03 +started ap apicid: * AP 01started +* AP 02started +* AP 03started +* AP 05started +* AP 06started +* AP 07started + +set_ck804_base_unit_id() +fill_mem_ctrl() +enable_smbus() +SMBus controller enabled +raminit_amdmct() +raminit_amdmct begin: +activate_spd_rom() for node 00 +enable_spd_node0() +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +activate_spd_rom() for node 01 +enable_spd_node1() +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + Node: 00 base: 00 limit: ffffff BottomIO: c00000 + Node: 01 base: 1400000 limit: 17fffff BottomIO: c00000 + Copy dram map from Node 0 to Node 01 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +raminit_amdmct end: +CBMEM: +IMD: root @ bffff000 254 entries. +IMD: root @ bfffec00 62 entries. +amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +disable_spd() +enable_msi_mapping() +Prepare CAR migration and stack regions... Fill [003fd000-003fffff] ... Done +Copying data from cache to RAM... Copy [000c4000-000c693f] to [003fd6c0 - 003fffff] ... Done +Switching to use RAM as stack... Top about 003fd6ac ... Done +Disabling cache as ram now +Prepare ramstage memory region... Fill [00000000-003fcfff] ... Done +CBFS provider active. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/ramstage' +CBFS: Found @ offset 15440 size 147e1 +'fallback/ramstage' located at offset: 15478 size: 147e1 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Capability: type 0x0a @ 0x44 + +coreboot-4.0 Fri Jun 26 20:19:42 UTC 2015 ramstage starting... +Moving GDT to bfffe980...ok +BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0 +BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 +Enumerating buses... +Show all devs... Before device enumeration. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:18.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:01.0: enabled 1 +PNP: 002e.0: enabled 1 +PNP: 002e.1: enabled 0 +PNP: 002e.2: enabled 1 +PNP: 002e.3: enabled 1 +PNP: 002e.5: enabled 1 +PNP: 002e.7: enabled 0 +PNP: 002e.8: enabled 0 +PNP: 002e.9: enabled 1 +PNP: 002e.a: enabled 0 +PNP: 002e.b: enabled 1 +PCI: 00:01.1: enabled 1 +I2C: 00:50: enabled 1 +I2C: 00:51: enabled 1 +I2C: 00:52: enabled 1 +I2C: 00:53: enabled 1 +I2C: 00:54: enabled 1 +I2C: 00:55: enabled 1 +I2C: 00:56: enabled 1 +I2C: 00:57: enabled 1 +I2C: 00:2f: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:04.0: enabled 0 +PCI: 00:04.1: enabled 0 +PCI: 00:06.0: enabled 1 +PCI: 00:07.0: enabled 1 +PCI: 00:08.0: enabled 1 +PCI: 00:09.0: enabled 1 +PCI: 00:04.0: enabled 1 +PCI: 00:0a.0: enabled 0 +PCI: 00:0b.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0c.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0d.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0e.0: enabled 1 +PCI: 00:0f.0: enabled 0 +PCI: 00:18.1: enabled 1 +PCI: 00:18.2: enabled 1 +PCI: 00:18.3: enabled 1 +PCI: 00:18.4: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:19.1: enabled 1 +PCI: 00:19.2: enabled 1 +PCI: 00:19.3: enabled 1 +PCI: 00:19.4: enabled 1 +Compare with tree... +Root Device: enabled 1 + CPU_CLUSTER: 0: enabled 1 + APIC: 00: enabled 1 + DOMAIN: 0000: enabled 1 + PCI: 00:18.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:01.0: enabled 1 + PNP: 002e.0: enabled 1 + PNP: 002e.1: enabled 0 + PNP: 002e.2: enabled 1 + PNP: 002e.3: enabled 1 + PNP: 002e.5: enabled 1 + PNP: 002e.7: enabled 0 + PNP: 002e.8: enabled 0 + PNP: 002e.9: enabled 1 + PNP: 002e.a: enabled 0 + PNP: 002e.b: enabled 1 + PCI: 00:01.1: enabled 1 + I2C: 00:50: enabled 1 + I2C: 00:51: enabled 1 + I2C: 00:52: enabled 1 + I2C: 00:53: enabled 1 + I2C: 00:54: enabled 1 + I2C: 00:55: enabled 1 + I2C: 00:56: enabled 1 + I2C: 00:57: enabled 1 + I2C: 00:2f: enabled 1 + PCI: 00:02.0: enabled 1 + PCI: 00:02.1: enabled 1 + PCI: 00:04.0: enabled 0 + PCI: 00:04.1: enabled 0 + PCI: 00:06.0: enabled 1 + PCI: 00:07.0: enabled 1 + PCI: 00:08.0: enabled 1 + PCI: 00:09.0: enabled 1 + PCI: 00:04.0: enabled 1 + PCI: 00:0a.0: enabled 0 + PCI: 00:0b.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0c.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0d.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0e.0: enabled 1 + PCI: 00:0f.0: enabled 0 + PCI: 00:18.1: enabled 1 + PCI: 00:18.2: enabled 1 + PCI: 00:18.3: enabled 1 + PCI: 00:18.4: enabled 1 + PCI: 00:19.0: enabled 1 + PCI: 00:19.1: enabled 1 + PCI: 00:19.2: enabled 1 + PCI: 00:19.3: enabled 1 + PCI: 00:19.4: enabled 1 +Root Device scanning... +root_dev_scan_bus for Root Device +setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 +setup_bsp_ramtop, TOP MEM2: msr.lo = 0x80000000, msr.hi = 0x00000001 +CPU_CLUSTER: 0 enabled +DOMAIN: 0000 enabled +CPU_CLUSTER: 0 scanning... +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + PCI: 00:18.3 siblings=3 +CPU: APIC: 00 enabled +CPU: APIC: 01 enabled +CPU: APIC: 02 enabled +CPU: APIC: 03 enabled + PCI: 00:19.3 siblings=3 +CPU: APIC: 04 enabled +CPU: APIC: 05 enabled +CPU: APIC: 06 enabled +CPU: APIC: 07 enabled +DOMAIN: 0000 scanning... +PCI: pci_scan_bus for bus 00 +PCI: 00:18.0 [1022/1200] bus ops +PCI: 00:18.0 [1022/1200] enabled +PCI: 00:18.1 [1022/1201] enabled +PCI: 00:18.2 [1022/1202] enabled +PCI: 00:18.3 [1022/1203] ops +PCI: 00:18.3 [1022/1203] enabled +PCI: 00:18.4 [1022/1204] enabled +PCI: 00:19.0 [1022/1200] bus ops +PCI: 00:19.0 [1022/1200] enabled +PCI: 00:19.1 [1022/1201] enabled +PCI: 00:19.2 [1022/1202] enabled +PCI: 00:19.3 [1022/1203] ops +PCI: 00:19.3 [1022/1203] enabled +PCI: 00:19.4 [1022/1204] enabled +PCI: 00:18.0 scanning... +PCI: 00:00.0 [10de/005e] ops +PCI: 00:00.0 [10de/005e] enabled +Capability: type 0x08 @ 0x44 +flags: 0x01e0 +PCI: 00:00.0 count: 000f static_count: 0010 +PCI: 00:00.0 [10de/005e] enabled next_unitid: 0010 +PCI: pci_scan_bus for bus 00 +PCI: 00:00.0 [10de/005e] enabled +PCI: 00:01.0 [10de/0051] bus ops +PCI: 00:01.0 [10de/0051] enabled +PCI: 00:01.1 [10de/0052] bus ops +PCI: 00:01.1 [10de/0052] enabled +PCI: 00:02.0 [10de/005a] ops +PCI: 00:02.0 [10de/005a] enabled +PCI: 00:02.1 [10de/005b] ops +PCI: 00:02.1 [10de/005b] enabled +PCI: 00:04.0 [10de/0059] ops +PCI: 00:04.0 [10de/0059] disabled +PCI: 00:04.1 [10de/0058] ops +PCI: 00:04.1 [10de/0058] disabled +PCI: 00:06.0 [10de/0053] ops +PCI: 00:06.0 [10de/0053] enabled +PCI: 00:07.0 [10de/0054] ops +PCI: 00:07.0 [10de/0054] enabled +PCI: 00:08.0 [10de/0055] ops +PCI: 00:08.0 [10de/0055] enabled +PCI: 00:09.0 [10de/005c] bus ops +PCI: 00:09.0 [10de/005c] enabled +PCI: 00:0b.0 [10de/005d] bus ops +PCI: 00:0b.0 [10de/005d] enabled +PCI: 00:0c.0 [10de/005d] bus ops +PCI: 00:0c.0 [10de/005d] enabled +PCI: 00:0d.0 [10de/005d] bus ops +PCI: 00:0d.0 [10de/005d] enabled +PCI: 00:0e.0 [10de/005d] bus ops +PCI: 00:0e.0 [10de/005d] enabled +PCI: 00:01.0 scanning... +scan_lpc_bus for PCI: 00:01.0 +PNP: 002e.0 enabled +PNP: 002e.1 disabled +PNP: 002e.2 enabled +PNP: 002e.3 enabled +PNP: 002e.5 enabled +PNP: 002e.7 disabled +PNP: 002e.8 disabled +PNP: 002e.9 enabled +PNP: 002e.a disabled +PNP: 002e.b enabled +scan_lpc_bus for PCI: 00:01.0 done +PCI: 00:01.1 scanning... +scan_smbus for PCI: 00:01.1 +smbus: PCI: 00:01.1[0]->I2C: 01:50 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:51 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:52 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:53 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:54 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:55 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:56 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:57 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:2f enabled +scan_smbus for PCI: 00:01.1 done +PCI: 00:09.0 scanning... +do_pci_scan_bridge for PCI: 00:09.0 +PCI: pci_scan_bus for bus 01 +PCI: 01:04.0 [18ca/0020] ops +PCI: 01:04.0 [18ca/0020] enabled +PCI: 00:0b.0 scanning... +do_pci_scan_bridge for PCI: 00:0b.0 +PCI: pci_scan_bus for bus 02 +PCI: 02:00.0 [14e4/1659] enabled +PCI: 00:0c.0 scanning... +do_pci_scan_bridge for PCI: 00:0c.0 +PCI: pci_scan_bus for bus 03 +PCI: 03:00.0 [14e4/1659] enabled +PCI: 00:0d.0 scanning... +do_pci_scan_bridge for PCI: 00:0d.0 +PCI: pci_scan_bus for bus 04 +PCI: Static device PCI: 04:00.0 not found, disabling it. +PCI: 00:0e.0 scanning... +do_pci_scan_bridge for PCI: 00:0e.0 +PCI: pci_scan_bus for bus 05 +PCI: 00:19.0 scanning... +DOMAIN: 0000 passpw: enabled +DOMAIN: 0000 passpw: enabled +root_dev_scan_bus for Root Device done +done +BS: BS_DEV_ENUMERATE times (us): entry 0 run 598144 exit 0 +found VGA at PCI: 01:04.0 +Setting up VGA for PCI: 01:04.0 +Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:09.0 +Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 +Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 +Setting PCI_BRIDGE_CTL_VGA for bridge Root Device +Allocating resources... +Reading resources... +Root Device read_resources bus 0 link: 0 +CPU_CLUSTER: 0 read_resources bus 0 link: 0 +APIC: 00 missing read_resources +APIC: 01 missing read_resources +APIC: 02 missing read_resources +APIC: 03 missing read_resources +APIC: 04 missing read_resources +APIC: 05 missing read_resources +APIC: 06 missing read_resources +APIC: 07 missing read_resources +CPU_CLUSTER: 0 read_resources bus 0 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 +PCI: 00:18.0 read_resources bus 0 link: 1 +PCI: 00:01.0 read_resources bus 0 link: 0 +PCI: 00:01.0 read_resources bus 0 link: 0 done +PCI: 00:01.1 read_resources bus 1 link: 0 +I2C: 01:50 missing read_resources +I2C: 01:51 missing read_resources +I2C: 01:52 missing read_resources +I2C: 01:53 missing read_resources +I2C: 01:54 missing read_resources +I2C: 01:55 missing read_resources +I2C: 01:56 missing read_resources +I2C: 01:57 missing read_resources +PCI: 00:01.1 read_resources bus 1 link: 0 done +PCI: 00:01.1 read_resources bus 2 link: 1 +PCI: 00:01.1 read_resources bus 2 link: 1 done +PCI: 00:09.0 read_resources bus 1 link: 0 +PCI: 00:09.0 read_resources bus 1 link: 0 done +PCI: 00:0b.0 read_resources bus 2 link: 0 +PCI: 00:0b.0 read_resources bus 2 link: 0 done +PCI: 00:0c.0 read_resources bus 3 link: 0 +PCI: 00:0c.0 read_resources bus 3 link: 0 done +PCI: 00:0d.0 read_resources bus 4 link: 0 +PCI: 00:0d.0 read_resources bus 4 link: 0 done +PCI: 00:0e.0 read_resources bus 5 link: 0 +PCI: 00:0e.0 read_resources bus 5 link: 0 done +PCI: 00:18.0 read_resources bus 0 link: 1 done +PCI: 00:18.0 read_resources bus 0 link: 0 +PCI: 00:18.0 read_resources bus 0 link: 0 done +PCI: 00:18.0 read_resources bus 0 link: 2 +PCI: 00:18.0 read_resources bus 0 link: 2 done +PCI: 00:18.0 read_resources bus 0 link: 3 +PCI: 00:18.0 read_resources bus 0 link: 3 done +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +PCI: 00:18.4 read_resources bus 0 link: 0 +PCI: 00:18.4 read_resources bus 0 link: 0 done +PCI: 00:18.4 read_resources bus 0 link: 1 +PCI: 00:18.4 read_resources bus 0 link: 1 done +PCI: 00:18.4 read_resources bus 0 link: 2 +PCI: 00:18.4 read_resources bus 0 link: 2 done +PCI: 00:18.4 read_resources bus 0 link: 3 +PCI: 00:18.4 read_resources bus 0 link: 3 done +PCI: 00:19.0 read_resources bus 0 link: 0 +PCI: 00:19.0 read_resources bus 0 link: 0 done +PCI: 00:19.0 read_resources bus 0 link: 1 +PCI: 00:19.0 read_resources bus 0 link: 1 done +PCI: 00:19.0 read_resources bus 0 link: 2 +PCI: 00:19.0 read_resources bus 0 link: 2 done +PCI: 00:19.0 read_resources bus 0 link: 3 +PCI: 00:19.0 read_resources bus 0 link: 3 done +PCI: 00:19.4 read_resources bus 0 link: 0 +PCI: 00:19.4 read_resources bus 0 link: 0 done +PCI: 00:19.4 read_resources bus 0 link: 1 +PCI: 00:19.4 read_resources bus 0 link: 1 done +PCI: 00:19.4 read_resources bus 0 link: 2 +PCI: 00:19.4 read_resources bus 0 link: 2 done +PCI: 00:19.4 read_resources bus 0 link: 3 +PCI: 00:19.4 read_resources bus 0 link: 3 done +DOMAIN: 0000 read_resources bus 0 link: 0 done +Root Device read_resources bus 0 link: 0 done +Done reading resources. +Show resources in subtree (Root Device)...After reading. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: 01 + APIC: 02 + APIC: 03 + APIC: 04 + APIC: 05 + APIC: 06 + APIC: 07 + DOMAIN: 0000 child on link 0 PCI: 00:18.0 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 + DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 + PCI: 00:18.0 child on link 0 PCI: 00:00.0 + PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8 + PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b8 + PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b0 + PCI: 00:00.0 + PCI: 00:01.0 child on link 0 PNP: 002e.0 + PCI: 00:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10 + PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 14 + PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 44 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 60 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 64 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 68 + PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PNP: 002e.0 + PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.3 + PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000500 index f1 + PNP: 002e.5 + PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 + PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 + PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 + PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.7 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 + PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.8 + PNP: 002e.9 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 + PNP: 002e.a + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.b + PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60 + PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PCI: 00:01.1 child on link 0 I2C: 01:50 + PCI: 00:01.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10 + PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 + PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 24 + I2C: 01:50 + I2C: 01:51 + I2C: 01:52 + I2C: 01:53 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:2f + PCI: 00:02.0 + PCI: 00:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 + PCI: 00:02.1 + PCI: 00:02.1 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 00:04.0 + PCI: 00:04.1 + PCI: 00:06.0 + PCI: 00:06.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:07.0 + PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:07.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:07.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 00:08.0 + PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:08.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 00:09.0 child on link 0 PCI: 01:04.0 + PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 + PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 01:04.0 + PCI: 01:04.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 1200 index 10 + PCI: 01:04.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 14 + PCI: 01:04.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18 + PCI: 00:0a.0 + PCI: 00:0b.0 child on link 0 PCI: 02:00.0 + PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:0c.0 child on link 0 PCI: 03:00.0 + PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 03:00.0 + PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:0d.0 child on link 0 PCI: 04:00.0 + PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 04:00.0 + PCI: 00:0e.0 + PCI: 00:0e.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:0f.0 + PCI: 00:18.1 + PCI: 00:18.2 + PCI: 00:18.3 + PCI: 00:18.4 + PCI: 00:19.0 + PCI: 00:19.1 + PCI: 00:19.2 + PCI: 00:19.3 + PCI: 00:19.4 +DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff +PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 01:04.0 18 * [0x0 - 0x7f] io +PCI: 00:09.0 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done +PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:09.0 1c * [0x0 - 0xfff] io +PCI: 00:01.0 60 * [0x1000 - 0x10ff] io +PCI: 00:01.0 64 * [0x1400 - 0x14ff] io +PCI: 00:01.0 68 * [0x1800 - 0x18ff] io +PCI: 00:01.0 10 * [0x1c00 - 0x1c7f] io +PCI: 00:01.1 20 * [0x1c80 - 0x1cbf] io +PCI: 00:01.1 24 * [0x1cc0 - 0x1cff] io +PCI: 00:01.1 10 * [0x2000 - 0x201f] io +PCI: 00:06.0 20 * [0x2020 - 0x202f] io +PCI: 00:07.0 20 * [0x2030 - 0x203f] io +PCI: 00:08.0 20 * [0x2040 - 0x204f] io +PCI: 00:07.0 10 * [0x2050 - 0x2057] io +PCI: 00:07.0 18 * [0x2058 - 0x205f] io +PCI: 00:08.0 10 * [0x2060 - 0x2067] io +PCI: 00:08.0 18 * [0x2068 - 0x206f] io +PCI: 00:07.0 14 * [0x2070 - 0x2073] io +PCI: 00:07.0 1c * [0x2074 - 0x2077] io +PCI: 00:08.0 14 * [0x2078 - 0x207b] io +PCI: 00:08.0 1c * [0x207c - 0x207f] io +PCI: 00:18.0 io: base: 2080 size: 3000 align: 12 gran: 12 limit: ffff done +PCI: 00:18.0 110d8 * [0x0 - 0x2fff] io +DOMAIN: 0000 io: base: 3000 size: 3000 align: 12 gran: 0 limit: ffff done +DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff +PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff +PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:04.0 10 * [0x0 - 0x3ffffff] prefmem +PCI: 00:09.0 prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done +PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:09.0 24 * [0x0 - 0x3ffffff] prefmem +PCI: 00:18.0 prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done +PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff +PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:04.0 14 * [0x0 - 0x3ffff] mem +PCI: 00:09.0 mem: base: 40000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 02:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:0b.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 03:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:0c.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:09.0 20 * [0x0 - 0xfffff] mem +PCI: 00:0b.0 20 * [0x100000 - 0x1fffff] mem +PCI: 00:0c.0 20 * [0x200000 - 0x2fffff] mem +PCI: 00:02.0 10 * [0x300000 - 0x300fff] mem +PCI: 00:07.0 24 * [0x301000 - 0x301fff] mem +PCI: 00:08.0 24 * [0x302000 - 0x302fff] mem +PCI: 00:02.1 10 * [0x303000 - 0x3030ff] mem +PCI: 00:18.0 mem: base: 303100 size: 400000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:18.0 110b8 * [0x0 - 0x3ffffff] prefmem +PCI: 00:18.0 110b0 * [0x4000000 - 0x43fffff] mem +DOMAIN: 0000 mem: base: 4400000 size: 4400000 align: 26 gran: 0 limit: ffffffff done +avoid_fixed_resources: DOMAIN: 0000 +avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff +constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed) +constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed) +constrain_resources: PCI: 00:01.0 14 base fec00000 limit fec00fff mem (fixed) +constrain_resources: PCI: 00:01.0 10000000 base 00000000 limit 00000fff io (fixed) +avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 base f8000000 limit febfffff +Setting resources... +DOMAIN: 0000 io: base:1000 size:3000 align:12 gran:0 limit:ffff +PCI: 00:18.0 110d8 * [0x1000 - 0x3fff] io +DOMAIN: 0000 io: next_base: 4000 size: 3000 align: 12 gran: 0 done +PCI: 00:18.0 io: base:1000 size:3000 align:12 gran:12 limit:3fff +PCI: 00:09.0 1c * [0x1000 - 0x1fff] io +PCI: 00:01.0 60 * [0x2000 - 0x20ff] io +PCI: 00:01.0 64 * [0x2400 - 0x24ff] io +PCI: 00:01.0 68 * [0x2800 - 0x28ff] io +PCI: 00:01.0 10 * [0x2c00 - 0x2c7f] io +PCI: 00:01.1 20 * [0x2c80 - 0x2cbf] io +PCI: 00:01.1 24 * [0x2cc0 - 0x2cff] io +PCI: 00:01.1 10 * [0x3000 - 0x301f] io +PCI: 00:06.0 20 * [0x3020 - 0x302f] io +PCI: 00:07.0 20 * [0x3030 - 0x303f] io +PCI: 00:08.0 20 * [0x3040 - 0x304f] io +PCI: 00:07.0 10 * [0x3050 - 0x3057] io +PCI: 00:07.0 18 * [0x3058 - 0x305f] io +PCI: 00:08.0 10 * [0x3060 - 0x3067] io +PCI: 00:08.0 18 * [0x3068 - 0x306f] io +PCI: 00:07.0 14 * [0x3070 - 0x3073] io +PCI: 00:07.0 1c * [0x3074 - 0x3077] io +PCI: 00:08.0 14 * [0x3078 - 0x307b] io +PCI: 00:08.0 1c * [0x307c - 0x307f] io +PCI: 00:18.0 io: next_base: 3080 size: 3000 align: 12 gran: 12 done +PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff +PCI: 01:04.0 18 * [0x1000 - 0x107f] io +PCI: 00:09.0 io: next_base: 1080 size: 1000 align: 12 gran: 12 done +PCI: 00:0b.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0b.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0c.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0c.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0d.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0d.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0e.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0e.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +DOMAIN: 0000 mem: base:f8000000 size:4400000 align:26 gran:0 limit:febfffff +PCI: 00:18.0 110b8 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:18.0 110b0 * [0xfc000000 - 0xfc3fffff] mem +DOMAIN: 0000 mem: next_base: fc400000 size: 4400000 align: 26 gran: 0 done +PCI: 00:18.0 prefmem: base:f8000000 size:4000000 align:26 gran:20 limit:fbffffff +PCI: 00:09.0 24 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:18.0 prefmem: next_base: fc000000 size: 4000000 align: 26 gran: 20 done +PCI: 00:09.0 prefmem: base:f8000000 size:4000000 align:26 gran:20 limit:fbffffff +PCI: 01:04.0 10 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:09.0 prefmem: next_base: fc000000 size: 4000000 align: 26 gran: 20 done +PCI: 00:0b.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0b.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0c.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0c.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0d.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0d.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0e.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0e.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:18.0 mem: base:fc000000 size:400000 align:20 gran:20 limit:fc3fffff +PCI: 00:09.0 20 * [0xfc000000 - 0xfc0fffff] mem +PCI: 00:0b.0 20 * [0xfc100000 - 0xfc1fffff] mem +PCI: 00:0c.0 20 * [0xfc200000 - 0xfc2fffff] mem +PCI: 00:02.0 10 * [0xfc300000 - 0xfc300fff] mem +PCI: 00:07.0 24 * [0xfc301000 - 0xfc301fff] mem +PCI: 00:08.0 24 * [0xfc302000 - 0xfc302fff] mem +PCI: 00:02.1 10 * [0xfc303000 - 0xfc3030ff] mem +PCI: 00:18.0 mem: next_base: fc303100 size: 400000 align: 20 gran: 20 done +PCI: 00:09.0 mem: base:fc000000 size:100000 align:20 gran:20 limit:fc0fffff +PCI: 01:04.0 14 * [0xfc000000 - 0xfc03ffff] mem +PCI: 00:09.0 mem: next_base: fc040000 size: 100000 align: 20 gran: 20 done +PCI: 00:0b.0 mem: base:fc100000 size:100000 align:20 gran:20 limit:fc1fffff +PCI: 02:00.0 10 * [0xfc100000 - 0xfc10ffff] mem +PCI: 00:0b.0 mem: next_base: fc110000 size: 100000 align: 20 gran: 20 done +PCI: 00:0c.0 mem: base:fc200000 size:100000 align:20 gran:20 limit:fc2fffff +PCI: 03:00.0 10 * [0xfc200000 - 0xfc20ffff] mem +PCI: 00:0c.0 mem: next_base: fc210000 size: 100000 align: 20 gran: 20 done +PCI: 00:0d.0 mem: base:fc3fffff size:0 align:20 gran:20 limit:fc3fffff +PCI: 00:0d.0 mem: next_base: fc3fffff size: 0 align: 20 gran: 20 done +PCI: 00:0e.0 mem: base:fc3fffff size:0 align:20 gran:20 limit:fc3fffff +PCI: 00:0e.0 mem: next_base: fc3fffff size: 0 align: 20 gran: 20 done +Root Device assign_resources, bus 0 link: 0 +0: mmio_basek=00300000, basek=00400000, limitk=00500000 +1: mmio_basek=00300000, basek=00500000, limitk=00600000 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device +PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io <node 0 link 1> +PCI: 00:18.0 110b8 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x14 prefmem <node 0 link 1> +PCI: 00:18.0 110b0 <- [0x00fc000000 - 0x00fc3fffff] size 0x00400000 gran 0x14 mem <node 0 link 1> +PCI: 00:18.0 assign_resources, bus 0 link: 1 +PCI: 00:01.0 10 <- [0x0000002c00 - 0x0000002c7f] size 0x00000080 gran 0x07 io +PCI: 00:01.0 60 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 64 <- [0x0000002400 - 0x00000024ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 68 <- [0x0000002800 - 0x00000028ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 assign_resources, bus 0 link: 0 +PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io +PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq +PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq +PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io +PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq +PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io +PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq +PNP: 002e.3 f1 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 io +PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io +PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io +PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq +PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq +ERROR: PNP: 002e.5 f0 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 30 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 f0 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 f1 irq size: 0x0000000001 not assigned +PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io +PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq +PCI: 00:01.0 assign_resources, bus 0 link: 0 +PCI: 00:01.0 14 <- [0x00fec00000 - 0x00fec00fff] size 0x00001000 gran 0x0c mem +PCI: 00:01.0 44 <- [0x00fed00000 - 0x00fed00fff] size 0x00001000 gran 0x0c mem +PCI: 00:01.1 10 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io +PCI: 00:01.1 20 <- [0x0000002c80 - 0x0000002cbf] size 0x00000040 gran 0x06 io +PCI: 00:01.1 24 <- [0x0000002cc0 - 0x0000002cff] size 0x00000040 gran 0x06 io +PCI: 00:01.1 assign_resources, bus 1 link: 0 +PCI: 00:01.1 assign_resources, bus 1 link: 0 +PCI: 00:02.0 10 <- [0x00fc300000 - 0x00fc300fff] size 0x00001000 gran 0x0c mem +PCI: 00:02.1 10 <- [0x00fc303000 - 0x00fc3030ff] size 0x00000100 gran 0x08 mem +PCI: 00:06.0 20 <- [0x0000003020 - 0x000000302f] size 0x00000010 gran 0x04 io +PCI: 00:07.0 10 <- [0x0000003050 - 0x0000003057] size 0x00000008 gran 0x03 io +PCI: 00:07.0 14 <- [0x0000003070 - 0x0000003073] size 0x00000004 gran 0x02 io +PCI: 00:07.0 18 <- [0x0000003058 - 0x000000305f] size 0x00000008 gran 0x03 io +PCI: 00:07.0 1c <- [0x0000003074 - 0x0000003077] size 0x00000004 gran 0x02 io +PCI: 00:07.0 20 <- [0x0000003030 - 0x000000303f] size 0x00000010 gran 0x04 io +PCI: 00:07.0 24 <- [0x00fc301000 - 0x00fc301fff] size 0x00001000 gran 0x0c mem +PCI: 00:08.0 10 <- [0x0000003060 - 0x0000003067] size 0x00000008 gran 0x03 io +PCI: 00:08.0 14 <- [0x0000003078 - 0x000000307b] size 0x00000004 gran 0x02 io +PCI: 00:08.0 18 <- [0x0000003068 - 0x000000306f] size 0x00000008 gran 0x03 io +PCI: 00:08.0 1c <- [0x000000307c - 0x000000307f] size 0x00000004 gran 0x02 io +PCI: 00:08.0 20 <- [0x0000003040 - 0x000000304f] size 0x00000010 gran 0x04 io +PCI: 00:08.0 24 <- [0x00fc302000 - 0x00fc302fff] size 0x00001000 gran 0x0c mem +PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io +PCI: 00:09.0 24 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x14 bus 01 prefmem +PCI: 00:09.0 20 <- [0x00fc000000 - 0x00fc0fffff] size 0x00100000 gran 0x14 bus 01 mem +PCI: 00:09.0 assign_resources, bus 1 link: 0 +PCI: 01:04.0 10 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a prefmem +PCI: 01:04.0 14 <- [0x00fc000000 - 0x00fc03ffff] size 0x00040000 gran 0x12 mem +PCI: 01:04.0 18 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran 0x07 io +PCI: 00:09.0 assign_resources, bus 1 link: 0 +PCI: 00:0b.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 02 io +PCI: 00:0b.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 02 prefmem +PCI: 00:0b.0 20 <- [0x00fc100000 - 0x00fc1fffff] size 0x00100000 gran 0x14 bus 02 mem +PCI: 00:0b.0 assign_resources, bus 2 link: 0 +PCI: 02:00.0 10 <- [0x00fc100000 - 0x00fc10ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:0b.0 assign_resources, bus 2 link: 0 +PCI: 00:0c.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 03 io +PCI: 00:0c.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 03 prefmem +PCI: 00:0c.0 20 <- [0x00fc200000 - 0x00fc2fffff] size 0x00100000 gran 0x14 bus 03 mem +PCI: 00:0c.0 assign_resources, bus 3 link: 0 +PCI: 03:00.0 10 <- [0x00fc200000 - 0x00fc20ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:0c.0 assign_resources, bus 3 link: 0 +PCI: 00:0d.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 04 io +PCI: 00:0d.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 04 prefmem +PCI: 00:0d.0 20 <- [0x00fc3fffff - 0x00fc3ffffe] size 0x00000000 gran 0x14 bus 04 mem +PCI: 00:0d.0 assign_resources, bus 4 link: 0 +PCI: 00:0d.0 assign_resources, bus 4 link: 0 +PCI: 00:0e.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 05 io +PCI: 00:0e.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 05 prefmem +PCI: 00:0e.0 20 <- [0x00fc3fffff - 0x00fc3ffffe] size 0x00000000 gran 0x14 bus 05 mem +PCI: 00:18.0 assign_resources, bus 0 link: 1 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +Root Device assign_resources, bus 0 link: 0 +Done setting resources. +Show resources in subtree (Root Device)...After assigning values. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: 01 + APIC: 02 + APIC: 03 + APIC: 04 + APIC: 05 + APIC: 06 + APIC: 07 + DOMAIN: 0000 child on link 0 PCI: 00:18.0 + DOMAIN: 0000 resource base 1000 size 3000 align 12 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base f8000000 size 4400000 align 26 gran 0 limit febfffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 + DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 + DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20 + DOMAIN: 0000 resource base 100000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 30 + DOMAIN: 0000 resource base 140000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 41 + PCI: 00:18.0 child on link 0 PCI: 00:00.0 + PCI: 00:18.0 resource base 1000 size 3000 align 12 gran 12 limit 3fff flags 60080100 index 110d8 + PCI: 00:18.0 resource base f8000000 size 4000000 align 26 gran 20 limit fbffffff flags 60081200 index 110b8 + PCI: 00:18.0 resource base fc000000 size 400000 align 20 gran 20 limit fc3fffff flags 60080200 index 110b0 + PCI: 00:00.0 + PCI: 00:01.0 child on link 0 PNP: 002e.0 + PCI: 00:01.0 resource base 2c00 size 80 align 7 gran 7 limit 2c7f flags 60000100 index 10 + PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 14 + PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 44 + PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 60 + PCI: 00:01.0 resource base 2400 size 100 align 8 gran 8 limit 24ff flags 60000100 index 64 + PCI: 00:01.0 resource base 2800 size 100 align 8 gran 8 limit 28ff flags 60000100 index 68 + PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PNP: 002e.0 + PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.3 + PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000500 index f1 + PNP: 002e.5 + PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 + PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 + PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 + PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.7 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 + PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.8 + PNP: 002e.9 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 + PNP: 002e.a + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.b + PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60 + PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PCI: 00:01.1 child on link 0 I2C: 01:50 + PCI: 00:01.1 resource base 3000 size 20 align 5 gran 5 limit 301f flags 60000100 index 10 + PCI: 00:01.1 resource base 2c80 size 40 align 6 gran 6 limit 2cbf flags 60000100 index 20 + PCI: 00:01.1 resource base 2cc0 size 40 align 6 gran 6 limit 2cff flags 60000100 index 24 + I2C: 01:50 + I2C: 01:51 + I2C: 01:52 + I2C: 01:53 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:2f + PCI: 00:02.0 + PCI: 00:02.0 resource base fc300000 size 1000 align 12 gran 12 limit fc300fff flags 60000200 index 10 + PCI: 00:02.1 + PCI: 00:02.1 resource base fc303000 size 100 align 8 gran 8 limit fc3030ff flags 60000200 index 10 + PCI: 00:04.0 + PCI: 00:04.1 + PCI: 00:06.0 + PCI: 00:06.0 resource base 3020 size 10 align 4 gran 4 limit 302f flags 60000100 index 20 + PCI: 00:07.0 + PCI: 00:07.0 resource base 3050 size 8 align 3 gran 3 limit 3057 flags 60000100 index 10 + PCI: 00:07.0 resource base 3070 size 4 align 2 gran 2 limit 3073 flags 60000100 index 14 + PCI: 00:07.0 resource base 3058 size 8 align 3 gran 3 limit 305f flags 60000100 index 18 + PCI: 00:07.0 resource base 3074 size 4 align 2 gran 2 limit 3077 flags 60000100 index 1c + PCI: 00:07.0 resource base 3030 size 10 align 4 gran 4 limit 303f flags 60000100 index 20 + PCI: 00:07.0 resource base fc301000 size 1000 align 12 gran 12 limit fc301fff flags 60000200 index 24 + PCI: 00:08.0 + PCI: 00:08.0 resource base 3060 size 8 align 3 gran 3 limit 3067 flags 60000100 index 10 + PCI: 00:08.0 resource base 3078 size 4 align 2 gran 2 limit 307b flags 60000100 index 14 + PCI: 00:08.0 resource base 3068 size 8 align 3 gran 3 limit 306f flags 60000100 index 18 + PCI: 00:08.0 resource base 307c size 4 align 2 gran 2 limit 307f flags 60000100 index 1c + PCI: 00:08.0 resource base 3040 size 10 align 4 gran 4 limit 304f flags 60000100 index 20 + PCI: 00:08.0 resource base fc302000 size 1000 align 12 gran 12 limit fc302fff flags 60000200 index 24 + PCI: 00:09.0 child on link 0 PCI: 01:04.0 + PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c + PCI: 00:09.0 resource base f8000000 size 4000000 align 26 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:09.0 resource base fc000000 size 100000 align 20 gran 20 limit fc0fffff flags 60080202 index 20 + PCI: 01:04.0 + PCI: 01:04.0 resource base f8000000 size 4000000 align 26 gran 26 limit fbffffff flags 60001200 index 10 + PCI: 01:04.0 resource base fc000000 size 40000 align 18 gran 18 limit fc03ffff flags 60000200 index 14 + PCI: 01:04.0 resource base 1000 size 80 align 7 gran 7 limit 107f flags 60000100 index 18 + PCI: 01:04.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3 + PCI: 00:0a.0 + PCI: 00:0b.0 child on link 0 PCI: 02:00.0 + PCI: 00:0b.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0b.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0b.0 resource base fc100000 size 100000 align 20 gran 20 limit fc1fffff flags 60080202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base fc100000 size 10000 align 16 gran 16 limit fc10ffff flags 60000201 index 10 + PCI: 00:0c.0 child on link 0 PCI: 03:00.0 + PCI: 00:0c.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0c.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0c.0 resource base fc200000 size 100000 align 20 gran 20 limit fc2fffff flags 60080202 index 20 + PCI: 03:00.0 + PCI: 03:00.0 resource base fc200000 size 10000 align 16 gran 16 limit fc20ffff flags 60000201 index 10 + PCI: 00:0d.0 child on link 0 PCI: 04:00.0 + PCI: 00:0d.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0d.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0d.0 resource base fc3fffff size 0 align 20 gran 20 limit fc3fffff flags 60080202 index 20 + PCI: 04:00.0 + PCI: 00:0e.0 + PCI: 00:0e.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0e.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0e.0 resource base fc3fffff size 0 align 20 gran 20 limit fc3fffff flags 60080202 index 20 + PCI: 00:0f.0 + PCI: 00:18.1 + PCI: 00:18.2 + PCI: 00:18.3 + PCI: 00:18.4 + PCI: 00:19.0 + PCI: 00:19.1 + PCI: 00:19.2 + PCI: 00:19.3 + PCI: 00:19.4 +Done allocating resources. +BS: BS_DEV_RESOURCES times (us): entry 0 run 3268064 exit 0 +Enabling resources... +PCI: 00:18.0 cmd <- 00 +PCI: 00:18.1 subsystem <- 1043/8162 +PCI: 00:18.1 cmd <- 00 +PCI: 00:18.2 subsystem <- 1043/8162 +PCI: 00:18.2 cmd <- 00 +PCI: 00:18.3 cmd <- 00 +PCI: 00:18.4 subsystem <- 1043/8162 +PCI: 00:18.4 cmd <- 00 +PCI: 00:19.0 cmd <- 00 +PCI: 00:19.1 subsystem <- 1043/8162 +PCI: 00:19.1 cmd <- 00 +PCI: 00:19.2 subsystem <- 1043/8162 +PCI: 00:19.2 cmd <- 00 +PCI: 00:19.3 cmd <- 00 +PCI: 00:19.4 subsystem <- 1043/8162 +PCI: 00:19.4 cmd <- 00 +PCI: 00:00.0 subsystem <- 1043/8162 +PCI: 00:00.0 cmd <- 06 +PCI: 00:01.0 subsystem <- 1043/8162 +PCI: 00:01.0 cmd <- 0f +ck804 lpc decode:PNP: 002e.0, base=0x000003f0, end=0x000003f7 +ck804 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff +ck804 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff +ck804 lpc decode:PNP: 002e.3, base=0x00000004, end=0x00000004 +ck804 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 +ck804 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 +ck804 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000297 +PCI: 00:01.1 subsystem <- 1043/8162 +PCI: 00:01.1 cmd <- 01 +PCI: 00:02.0 subsystem <- 1043/8162 +PCI: 00:02.0 cmd <- 02 +PCI: 00:02.1 subsystem <- 1043/8162 +PCI: 00:02.1 cmd <- 02 +PCI: 00:06.0 subsystem <- 1043/8162 +PCI: 00:06.0 cmd <- 01 +PCI: 00:07.0 subsystem <- 1043/8162 +PCI: 00:07.0 cmd <- 03 +PCI: 00:08.0 subsystem <- 1043/8162 +PCI: 00:08.0 cmd <- 03 +PCI: 00:09.0 bridge ctrl <- 000b +PCI: 00:09.0 cmd <- 07 +PCI: 00:0b.0 bridge ctrl <- 0003 +PCI: 00:0b.0 cmd <- 06 +PCI: 00:0c.0 bridge ctrl <- 0003 +PCI: 00:0c.0 cmd <- 06 +PCI: 00:0d.0 bridge ctrl <- 0003 +PCI: 00:0d.0 cmd <- 00 +PCI: 00:0e.0 bridge ctrl <- 0003 +PCI: 00:0e.0 cmd <- 00 +PCI: 01:04.0 cmd <- 03 +PCI: 02:00.0 subsystem <- 1043/8162 +PCI: 02:00.0 cmd <- 02 +PCI: 03:00.0 subsystem <- 1043/8162 +PCI: 03:00.0 cmd <- 02 +done. +BS: BS_DEV_ENABLE times (us): entry 0 run 162780 exit 0 +Initializing devices... +Root Device init ... +Root Device init finished in 1931 usecs +CPU_CLUSTER: 0 init ... +start_eip=0x00001000, code_size=0x00000031 +CPU1: stack_base 00138000, stack_end 00138ff8 +Asserting INIT. +Waiting for send to finish... ++Deasserting INIT. +Waiting for send to finish... ++#startup loops: 2. +Sending STARTUP #1 to 1. +After apic_write. +Initializing CPU #1 +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Sending STARTUP #2 to 1. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++nodeid = 00, coreid = 01 +After Startup. +CPU2: stack_base 00137000, stack_end 00137ff8 +Enabling cache +Asserting INIT. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Waiting for send to finish... ++MTRR: Physical address space: +0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 +0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 +0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 +0x00000000c0000000 - 0x00000000f8000000 size 0x38000000 type 0 +0x00000000f8000000 - 0x00000000fc000000 size 0x04000000 type 1 +0x00000000fc000000 - 0x0000000100000000 size 0x04000000 type 0 +0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 +Deasserting INIT. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Waiting for send to finish... ++MTRR: default type WB/UC MTRR counts: 5/3. +MTRR: UC selected as default type. +MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6 +MTRR: 2 base 0x00000000f8000000 mask 0x0000fffffc000000 type 1 +#startup loops: 2. +Sending STARTUP #1 to 2. +After apic_write. + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Startup point 1. +Waiting for send to finish... ++Setting up local apic...Sending STARTUP #2 to 2. +After apic_write. + apic_id: 0x01 done. +Startup point 1. +Waiting for send to finish... ++CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +After Startup. +siblings = 03, CPU3: stack_base 00136000, stack_end 00136ff8 +CPU #1 initialized +Asserting INIT. +Waiting for send to finish... ++Initializing CPU #2 +Deasserting INIT. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +#startup loops: 2. +Sending STARTUP #1 to 3. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++nodeid = 00, coreid = 02 +Sending STARTUP #2 to 3. +After apic_write. +Enabling cache +Startup point 1. +Waiting for send to finish... ++CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +After Startup. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU4: stack_base 00135000, stack_end 00135ff8 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Asserting INIT. +Setting up local apic...Waiting for send to finish... ++ apic_id: 0x02 done. +Deasserting INIT. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Waiting for send to finish... ++siblings = 03, #startup loops: 2. +Sending STARTUP #1 to 4. +After apic_write. +CPU #2 initialized +Startup point 1. +Waiting for send to finish... ++Initializing CPU #3 +Sending STARTUP #2 to 4. +After apic_write. +CPU: vendor AMD device 100f21 +Startup point 1. +Waiting for send to finish... ++Initializing CPU #4 +After Startup. +CPU5: stack_base 00134000, stack_end 00134ff8 +CPU: vendor AMD device 100f21 +Asserting INIT. +Waiting for send to finish... ++CPU: family 10, model 02, stepping 01 +Deasserting INIT. +Waiting for send to finish... ++nodeid = 01, coreid = 00 +#startup loops: 2. +Sending STARTUP #1 to 5. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++Enabling cache +Sending STARTUP #2 to 5. +After apic_write. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Startup point 1. +Waiting for send to finish... ++MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +After Startup. +CPU6: stack_base 00133000, stack_end 00133ff8 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Asserting INIT. +Setting up local apic...Waiting for send to finish... ++ apic_id: 0x04 done. +Deasserting INIT. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Waiting for send to finish... ++siblings = 03, #startup loops: 2. +Sending STARTUP #1 to 6. +After apic_write. +CPU #4 initialized +Startup point 1. +Waiting for send to finish... ++nodeid = 00, coreid = 03 +Sending STARTUP #2 to 6. +After apic_write. +Initializing CPU #6 +Startup point 1. +Waiting for send to finish... ++Enabling cache +After Startup. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +CPU7: stack_base 00132000, stack_end 00132ff8 +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Asserting INIT. +Waiting for send to finish... ++ +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Deasserting INIT. +Setting up local apic...Waiting for send to finish... ++ apic_id: 0x03 done. +#startup loops: 2. +Sending STARTUP #1 to 7. +After apic_write. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Startup point 1. +Waiting for send to finish... ++siblings = 03, Sending STARTUP #2 to 7. +After apic_write. +CPU #3 initialized +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +After Startup. +Initializing CPU #0 +Initializing CPU #5 +CPU: vendor AMD device 100f21 +CPU: family 10, model 02, stepping 01 +nodeid = 00, coreid = 00 +Enabling cache +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Initializing CPU #7 +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU: vendor AMD device 100f21 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +CPU: family 10, model 02, stepping 01 +Setting up local apic...nodeid = 01, coreid = 02 + apic_id: 0x00 done. +CPU: family 10, model 02, stepping 01 +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +siblings = 03, CPU: vendor AMD device 100f21 +CPU #0 initialized +Waiting for 3 CPUS to stop +Enabling cache +CPU: family 10, model 02, stepping 01 +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +nodeid = 01, coreid = 01 +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Enabling cache +nodeid = 01, coreid = 03 +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Setting up local apic... +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + + apic_id: 0x06 done. +Setting up local apic...CPU model: Quad-Core AMD Opteron(tm) Processor 8347 + apic_id: 0x05 done. +siblings = 03, Enabling cache +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +CPU #6 initialized +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +siblings = 03, MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU #5 initialized + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Waiting for 2 CPUS to stop +Setting up local apic...Waiting for 1 CPUS to stop + apic_id: 0x07 done. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +siblings = 03, CPU #7 initialized +All AP CPUs stopped (15172 loops) +CPU1: stack: 00138000 - 00139000, lowest used address 00138c8c, stack used: 884 bytes +CPU2: stack: 00137000 - 00138000, lowest used address 00137cd4, stack used: 812 bytes +CPU3: stack: 00136000 - 00137000, lowest used address 00136cd4, stack used: 812 bytes +CPU4: stack: 00135000 - 00136000, lowest used address 00135cd4, stack used: 812 bytes +CPU5: stack: 00134000 - 00135000, lowest used address 00134cd4, stack used: 812 bytes +CPU6: stack: 00133000 - 00134000, lowest used address 00133cd4, stack used: 812 bytes +CPU7: stack: 00132000 - 00133000, lowest used address 00132cd4, stack used: 812 bytes +CPU_CLUSTER: 0 init finished in 995136 usecs +PCI: 00:18.0 init ... +PCI: 00:18.0 init finished in 2028 usecs +PCI: 00:18.1 init ... +PCI: 00:18.1 init finished in 2027 usecs +PCI: 00:18.2 init ... +PCI: 00:18.2 init finished in 2018 usecs +PCI: 00:18.3 init ... +NB: Function 3 Misc Control.. done. +PCI: 00:18.3 init finished in 5294 usecs +PCI: 00:18.4 init ... +PCI: 00:18.4 init finished in 2018 usecs +PCI: 00:19.0 init ... +PCI: 00:19.0 init finished in 2018 usecs +PCI: 00:19.1 init ... +PCI: 00:19.1 init finished in 2018 usecs +PCI: 00:19.2 init ... +PCI: 00:19.2 init finished in 2019 usecs +PCI: 00:19.3 init ... +NB: Function 3 Misc Control.. done. +PCI: 00:19.3 init finished in 5277 usecs +PCI: 00:19.4 init ... +PCI: 00:19.4 init finished in 2017 usecs +PCI: 00:00.0 init ... +PCI: 00:00.0 init finished in 2028 usecs +PCI: 00:01.0 init ... +IOAPIC: Initializing IOAPIC at 0xfec00000 +IOAPIC: Bootstrap Processor Local APIC = 0x00 +IOAPIC: Dumping registers + reg 0x0000: 0x00000000 + reg 0x0001: 0x00170011 + reg 0x0002: 0x00000000 +IOAPIC: 24 interrupts +IOAPIC: Enabling interrupts on FSB +IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 +IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 +IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 +lpc_init: pm_base = 2000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +set power on after power fail +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +RTC Init +PCI: 00:01.0 init finished in 164771 usecs +PCI: 00:02.0 init ... +PCI: 00:02.0 init finished in 2026 usecs +PCI: 00:02.1 init ... +PCI: 00:02.1 init finished in 2018 usecs +PCI: 00:06.0 init ... +IDE1 IDE0 +PCI: 00:06.0 init finished in 3096 usecs +PCI: 00:07.0 init ... +SATA S SATA P +PCI: 00:07.0 init finished in 3535 usecs +PCI: 00:08.0 init ... +SATA S SATA P +PCI: 00:08.0 init finished in 3526 usecs +PCI: 00:09.0 init ... +PCI DOMAIN mem base = 0x00f8000000 +[0x50] <-- 0xf8000000 +PCI: 00:09.0 init finished in 7192 usecs +PCI: 00:0b.0 init ... +PCI: 00:0b.0 init finished in 2018 usecs +PCI: 00:0c.0 init ... +PCI: 00:0c.0 init finished in 2019 usecs +PCI: 00:0d.0 init ... +PCI: 00:0d.0 init finished in 2019 usecs +PCI: 00:0e.0 init ... +PCI: 00:0e.0 init finished in 2019 usecs +PNP: 002e.0 init ... +PNP: 002e.0 init finished in 1939 usecs +PNP: 002e.2 init ... +PNP: 002e.2 init finished in 1929 usecs +PNP: 002e.3 init ... +PNP: 002e.3 init finished in 1930 usecs +PNP: 002e.5 init ... +Keyboard init... +PNP: 002e.5 init finished in 351037 usecs +PNP: 002e.9 init ... +PNP: 002e.9 init finished in 1928 usecs +PNP: 002e.b init ... +PNP: 002e.b init finished in 1930 usecs +smbus: PCI: 00:01.1[0]->I2C: 01:2f init ... +ID: 5ca3 +I2C: 01:2f init finished in 101155 usecs +PCI: 01:04.0 init ... +XGI Z9s: initializing video device +XGI VGA: Relocate IO address: 1000 [00001030] +XGI VGA: chipid = 31 +XGI VGA: Framebuffer at 0xf8000000, mapped to 0xf8000000, size 16384k +XGI VGA: MMIO at 0xfc000000, mapped to 0xfc000000, size 256k +XGI VGA: No or unknown bridge type detected +XGI VGA: Default mode is 800x600x16 (60Hz) +XGI VGA: Set new mode: 800x600x16-60 +PCI: 01:04.0 init finished in 42560 usecs +PCI: 02:00.0 init ... +PCI: 02:00.0 init finished in 2017 usecs +PCI: 03:00.0 init ... +PCI: 03:00.0 init finished in 2018 usecs +Devices initialized +Show all devs... After init. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:18.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:01.0: enabled 1 +PNP: 002e.0: enabled 1 +PNP: 002e.1: enabled 0 +PNP: 002e.2: enabled 1 +PNP: 002e.3: enabled 1 +PNP: 002e.5: enabled 1 +PNP: 002e.7: enabled 0 +PNP: 002e.8: enabled 0 +PNP: 002e.9: enabled 1 +PNP: 002e.a: enabled 0 +PNP: 002e.b: enabled 1 +PCI: 00:01.1: enabled 1 +I2C: 01:50: enabled 1 +I2C: 01:51: enabled 1 +I2C: 01:52: enabled 1 +I2C: 01:53: enabled 1 +I2C: 01:54: enabled 1 +I2C: 01:55: enabled 1 +I2C: 01:56: enabled 1 +I2C: 01:57: enabled 1 +I2C: 01:2f: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:04.0: enabled 0 +PCI: 00:04.1: enabled 0 +PCI: 00:06.0: enabled 1 +PCI: 00:07.0: enabled 1 +PCI: 00:08.0: enabled 1 +PCI: 00:09.0: enabled 1 +PCI: 01:04.0: enabled 1 +PCI: 00:0a.0: enabled 0 +PCI: 00:0b.0: enabled 1 +PCI: 02:00.0: enabled 1 +PCI: 00:0c.0: enabled 1 +PCI: 03:00.0: enabled 1 +PCI: 00:0d.0: enabled 1 +PCI: 04:00.0: enabled 0 +PCI: 00:0e.0: enabled 1 +PCI: 00:0f.0: enabled 0 +PCI: 00:18.1: enabled 1 +PCI: 00:18.2: enabled 1 +PCI: 00:18.3: enabled 1 +PCI: 00:18.4: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:19.1: enabled 1 +PCI: 00:19.2: enabled 1 +PCI: 00:19.3: enabled 1 +PCI: 00:19.4: enabled 1 +APIC: 01: enabled 1 +APIC: 02: enabled 1 +APIC: 03: enabled 1 +APIC: 04: enabled 1 +APIC: 05: enabled 1 +APIC: 06: enabled 1 +APIC: 07: enabled 1 +BS: BS_DEV_INIT times (us): entry 0 run 1989467 exit 0 +Finalize devices... +Devices finalized +BS: BS_POST_DEVICE times (us): entry 0 run 3526 exit 0 +BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CONFIG_LOGICAL_CPUS==1: apicid_base: 00000001 +Writing IRQ routing tables to 0xf0000...done. +Writing IRQ routing tables to 0xbffd8000...done. +PIRQ table: 224 bytes. +Wrote the mp table end at: 000f0410 - 000f05cc +Wrote the mp table end at: bffd7010 - bffd71cc +MP table: 460 bytes. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/dsdt.aml' +CBFS: Found @ offset c00 size 2644 +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/slic' +CBFS: 'fallback/slic' not found. +ACPI: Writing ACPI tables at bffb3000. +ACPI: * FACS +ACPI: * DSDT +ACPI: * FADT +pm_base: 0x2000 +ACPI: added table 1/32, length now 40 +ACPI: * SSDT +processor_brand=Quad-Core AMD Opteron(tm) Processor 8347 +Pstates algorithm ... +Pstate_freq[0] = 1900MHz Pstate_power[0] = 23040mw +Pstate_latency[0] = 5us +Pstate_freq[1] = 1700MHz Pstate_power[1] = 21385mw +Pstate_latency[1] = 5us +Pstate_freq[2] = 1400MHz Pstate_power[2] = 18787mw +Pstate_latency[2] = 5us +Pstate_freq[3] = 1200MHz Pstate_power[3] = 16770mw +Pstate_latency[3] = 5us +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +l 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +ACPI: added table 2/32, length now 44 +ACPI: * MCFG +ACPI: * TCPA +TCPA log created at bffa3000 +ACPI: added table 3/32, length now 48 +ACPI: * MADT +ACPI: added table 4/32, length now 52 +current = bffb6910 +ACPI: * SRAT at bffb6910 +SRAT: lapic cpu_index=00, node_id=00, apic_id=00 +SRAT: lapic cpu_index=01, node_id=00, apic_id=01 +SRAT: lapic cpu_index=02, node_id=00, apic_id=02 +SRAT: lapic cpu_index=03, node_id=00, apic_id=03 +SRAT: lapic cpu_index=04, node_id=01, apic_id=04 +SRAT: lapic cpu_index=05, node_id=01, apic_id=05 +SRAT: lapic cpu_index=06, node_id=01, apic_id=06 +SRAT: lapic cpu_index=07, node_id=01, apic_id=07 +set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 +set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 +set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 +set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00100000 +set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00500000, sizek=00100000 +ACPI: added table 5/32, length now 56 +ACPI: * SLIT at bffb6a88 +ACPI: added table 6/32, length now 60 +ACPI: * HPET +ACPI: added table 7/32, length now 64 +ACPI: * SRAT at bffb6b00 +SRAT: lapic cpu_index=00, node_id=00, apic_id=00 +SRAT: lapic cpu_index=01, node_id=00, apic_id=01 +SRAT: lapic cpu_index=02, node_id=00, apic_id=02 +SRAT: lapic cpu_index=03, node_id=00, apic_id=03 +SRAT: lapic cpu_index=04, node_id=01, apic_id=04 +SRAT: lapic cpu_index=05, node_id=01, apic_id=05 +SRAT: lapic cpu_index=06, node_id=01, apic_id=06 +SRAT: lapic cpu_index=07, node_id=01, apic_id=07 +set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 +set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 +set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 +set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00100000 +set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00500000, sizek=00100000 +ACPI: added table 8/32, length now 68 +ACPI: * SLIT at bffb6c78 +ACPI: added table 9/32, length now 72 +ACPI: done. +ACPI tables: 15536 bytes. +smbios_write_tables: bffa2000 +Root Device (ASUS KFSN4-DRE) +CPU_CLUSTER: 0 (AMD FAM10 Root Complex) +APIC: 00 (unknown) +DOMAIN: 0000 (AMD FAM10 Root Complex) +PCI: 00:18.0 (AMD FAM10 Northbridge) +PCI: 00:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:01.0 (NVIDIA CK804 Southbridge) +PNP: 002e.0 (Winbond W83627THG Super I/O) +PNP: 002e.1 (Winbond W83627THG Super I/O) +PNP: 002e.2 (Winbond W83627THG Super I/O) +PNP: 002e.3 (Winbond W83627THG Super I/O) +PNP: 002e.5 (Winbond W83627THG Super I/O) +PNP: 002e.7 (Winbond W83627THG Super I/O) +PNP: 002e.8 (Winbond W83627THG Super I/O) +PNP: 002e.9 (Winbond W83627THG Super I/O) +PNP: 002e.a (Winbond W83627THG Super I/O) +PNP: 002e.b (Winbond W83627THG Super I/O) +PCI: 00:01.1 (NVIDIA CK804 Southbridge) +I2C: 01:50 (unknown) +I2C: 01:51 (unknown) +I2C: 01:52 (unknown) +I2C: 01:53 (unknown) +I2C: 01:54 (unknown) +I2C: 01:55 (unknown) +I2C: 01:56 (unknown) +I2C: 01:57 (unknown) +I2C: 01:2f (Nuvoton W83793 Hardware Monitor) +PCI: 00:02.0 (NVIDIA CK804 Southbridge) +PCI: 00:02.1 (NVIDIA CK804 Southbridge) +PCI: 00:04.0 (NVIDIA CK804 Southbridge) +PCI: 00:04.1 (NVIDIA CK804 Southbridge) +PCI: 00:06.0 (NVIDIA CK804 Southbridge) +PCI: 00:07.0 (NVIDIA CK804 Southbridge) +PCI: 00:08.0 (NVIDIA CK804 Southbridge) +PCI: 00:09.0 (NVIDIA CK804 Southbridge) +PCI: 01:04.0 (NVIDIA CK804 Southbridge) +PCI: 00:0a.0 (NVIDIA CK804 Southbridge) +PCI: 00:0b.0 (NVIDIA CK804 Southbridge) +PCI: 02:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0c.0 (NVIDIA CK804 Southbridge) +PCI: 03:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0d.0 (NVIDIA CK804 Southbridge) +PCI: 04:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0e.0 (NVIDIA CK804 Southbridge) +PCI: 00:0f.0 (NVIDIA CK804 Southbridge) +PCI: 00:18.1 (AMD FAM10 Northbridge) +PCI: 00:18.2 (AMD FAM10 Northbridge) +PCI: 00:18.3 (AMD FAM10 Northbridge) +PCI: 00:18.4 (AMD FAM10 Northbridge) +PCI: 00:19.0 (AMD FAM10 Northbridge) +PCI: 00:19.1 (AMD FAM10 Northbridge) +PCI: 00:19.2 (AMD FAM10 Northbridge) +PCI: 00:19.3 (AMD FAM10 Northbridge) +PCI: 00:19.4 (AMD FAM10 Northbridge) +APIC: 01 (unknown) +APIC: 02 (unknown) +APIC: 03 (unknown) +APIC: 04 (unknown) +APIC: 05 (unknown) +APIC: 06 (unknown) +APIC: 07 (unknown) +SMBIOS tables: 553 bytes. +Writing table forward entry at 0x00000500 +Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9fe4 +Table forward entry ends at 0x00000528. +... aligned to 0x00001000 +Writing coreboot table at 0xbff9a000 +rom_table_end = 0xbff9a000 +... aligned to 0xbffa0000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES + 1. 0000000000001000-000000000009ffff: RAM + 2. 00000000000a0000-00000000000bffff: RESERVED + 3. 00000000000c0000-00000000bff99fff: RAM + 4. 00000000bff9a000-00000000bfffffff: CONFIGURATION TABLES + 5. 00000000c0000000-00000000cfffffff: RESERVED + 6. 0000000100000000-000000017fffffff: RAM +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Wrote coreboot table at: bff9a000, 0xc08 bytes, checksum 44e8 +coreboot table: 3104 bytes. +IMD ROOT 0. bffff000 00001000 +IMD SMALL 1. bfffe000 00001000 +CAR GLOBALS 2. bfffb000 0000291c +CONSOLE 3. bffdb000 00020000 +AMDMEM INFO 4. bffd9000 0000172c +IRQ TABLE 5. bffd8000 00001000 +SMP TABLE 6. bffd7000 00001000 +ACPI 7. bffb3000 00024000 +54435041 8. bffa3000 00010000 +SMBIOS 9. bffa2000 00000800 +COREBOOT 10. bff9a000 00008000 +IMD small region: + IMD ROOT 0. bfffec00 00000400 + USBDEBUG 1. bfffeba0 00000058 + ROMSTAGE 2. bfffeb80 00000004 + GDT 3. bfffe980 00000200 +BS: BS_WRITE_TABLES times (us): entry 0 run 760427 exit 0 +CBFS provider active. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/payload' +CBFS: Found @ offset 29c80 size 8f395 +'fallback/payload' located at offset: 29cb8 size: 8f395 +Loading segment from rom address 0xfff29cb8 + code (compression=1) + New segment dstaddr 0x8200 memsize 0x17420 srcaddr 0xfff29d0c filesize 0x8215 +Loading segment from rom address 0xfff29cd4 + code (compression=1) + New segment dstaddr 0x100000 memsize 0x2213f0 srcaddr 0xfff31f21 filesize 0x8712c +Loading segment from rom address 0xfff29cf0 + Entry Point 0x00008200 +Bounce Buffer at bfc79000, 3277244 bytes +Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz: 0x0000000000008215 +lb: [0x0000000000100000, 0x00000000001fedcc) +Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz: 0x0000000000008215 +using LZMA +[ 0x00008200, 00017ce3, 0x0001f620) <- fff29d0c +Clearing Segment: addr: 0x0000000000017ce3 memsz: 0x000000000000793d +dest 00008200, end 0001f620, bouncebuffer bfc79000 +Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000002213f0 filesz: 0x000000000008712c +lb: [0x0000000000100000, 0x00000000001fedcc) +segment: [0x0000000000100000, 0x000000000018712c, 0x00000000003213f0) + bounce: [0x00000000bfc79000, 0x00000000bfd0012c, 0x00000000bfe9a3f0) +Post relocation: addr: 0x00000000bfc79000 memsz: 0x00000000002213f0 filesz: 0x000000000008712c +using LZMA +[ 0xbfc79000, bfe9a3f0, 0xbfe9a3f0) <- fff31f21 +dest bfc79000, end bfe9a3f0, bouncebuffer bfc79000 +move suffix around: from bfd77dcc, to 1fedcc, amount: 122624 +Loaded segments +BS: BS_PAYLOAD_LOAD times (us): entry 0 run 819203 exit 0 +Jumping to boot code at 00008200(bff9a000) +CPU0: stack: 00139000 - 0013a000, lowest used address 00139ae0, stack used: 1312 bytes +entry = 0x00008200 +lb_start = 0x00100000 +lb_size = 0x000fedcc +buffer = 0xbfc79000 +[H[J[1;1H[?25l[m[H[J[1;1H[2;32HFREE AS IN FREEDOM + + +[m[4;2H+----------------------------------------------------------------------------+[5;2H|[5;79H|[6;2H|[6;79H|[7;2H|[7;79H|[8;2H|[8;79H|[9;2H|[9;79H|[10;2H|[10;79H|[11;2H|[11;79H|[12;2H|[12;79H|[13;2H|[13;79H|[14;2H|[14;79H|[15;2H|[15;79H|[16;2H|[16;79H|[17;2H+----------------------------------------------------------------------------+[m[18;2H[19;2H[m Use the ^ and v keys to select which entry is highlighted. + + Press enter to boot the selected OS, `e' to edit the commands + + before booting or `c' for a command-line. [5;80H [7m[5;3H*Load Operating System [m[5;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) [m[6;78H[m[m[7;3H Parse ISOLINUX menu (USB) [m[7;78H[m[m[8;3H Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[m[9;3H Switch to grubtest.cfg [m[9;78H[m[m[10;3H Search for GRUB configuration (grub.cfg) outside of CBFS [m[10;78H[m[m[11;3H [m[11;78H[m[m[12;3H [m[12;78H[m[m[13;3H [m[13;78H[m[m[14;3H [m[14;78H[m[m[15;3H [m[15;78H[m[m[16;3H [m[16;78H[m[16;80H [5;78H[22;1H The highlighted entry will be executed automatically in 1s. [5;78H[22;1H The highlighted entry will be executed automatically in 0s. [5;78H[?25h[H[J[1;1H[H[J[1;1H Booting `Load Operating System' + + + + Failed to boot both default and fallback entries. + + +Press any key to continue... + +[?25l[m[H[J[1;1H[2;32HFREE AS IN FREEDOM + + +[m[4;2H+----------------------------------------------------------------------------+[5;2H|[5;79H|[6;2H|[6;79H|[7;2H|[7;79H|[8;2H|[8;79H|[9;2H|[9;79H|[10;2H|[10;79H|[11;2H|[11;79H|[12;2H|[12;79H|[13;2H|[13;79H|[14;2H|[14;79H|[15;2H|[15;79H|[16;2H|[16;79H|[17;2H+----------------------------------------------------------------------------+[m[18;2H[19;2H[m Use the ^ and v keys to select which entry is highlighted. + + Press enter to boot the selected OS, `e' to edit the commands + + before booting or `c' for a command-line. [5;80H [7m[5;3H*Load Operating System [m[5;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) diff --git a/docs/hardware/text/x200s/cblog00.txt b/docs/hardware/text/x200s/cblog00.txt new file mode 100644 index 00000000..331cb643 --- /dev/null +++ b/docs/hardware/text/x200s/cblog00.txt @@ -0,0 +1,196 @@ +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +WARNING: Ignoring S4-assertion-width violation. +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using low power mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 14 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 15 + Max clock: 533 MHz + CAS: 0x01c0 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +SFF platform unsupported in RCOMP initialization. +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +Interrupted RAM init, reset required. +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using low power mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 14 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 15 + Max clock: 533 MHz + CAS: 0x01c0 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +SFF platform unsupported in RCOMP initialization. +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +Interrupted RAM init, reset required. +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using low power mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 14 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 15 + Max clock: 533 MHz + CAS: 0x01c0 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +SFF platform unsupported in RCOMP initialization. diff --git a/docs/hardware/text/x200s/cblog01.txt b/docs/hardware/text/x200s/cblog01.txt new file mode 100644 index 00000000..afad2fed --- /dev/null +++ b/docs/hardware/text/x200s/cblog01.txt @@ -0,0 +1,1569 @@ +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +WARNING: Ignoring S4-assertion-width violation. +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using high performance mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Bank 1 populated: + Raw card type: F + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +DIMMs support 666 MHz, but chipset only runs at up to 533. Limiting... +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +Memory configured in dual-channel assymetric mode. +Memory map: +TOM = 512MB +TOLUD = 512MB +TOUUD = 512MB +REMAP: base = 65535MB + limit = 0MB +usedMEsize: 0MB +Performing Jedec initialization at address 0x00000000. +Performing Jedec initialization at address 0x08000000. +Performing Jedec initialization at address 0x10000000. +Performing Jedec initialization at address 0x18000000. +Final timings for group 0 on channel 0: 6.1.0.2.2 +Final timings for group 1 on channel 0: 6.0.2.6.1 +Final timings for group 2 on channel 0: 6.1.0.8.7 +Final timings for group 3 on channel 0: 6.1.0.7.1 +Final timings for group 0 on channel 1: 6.1.0.0.6 +Final timings for group 1 on channel 1: 6.0.2.3.4 +Final timings for group 2 on channel 1: 6.1.0.6.6 +Final timings for group 3 on channel 1: 6.1.0.3.6 +Lower bound for byte lane 0 on channel 0: 0.0 +Upper bound for byte lane 0 on channel 0: 10.1 +Final timings for byte lane 0 on channel 0: 5.0 +Lower bound for byte lane 1 on channel 0: 0.0 +Upper bound for byte lane 1 on channel 0: 11.1 +Final timings for byte lane 1 on channel 0: 5.4 +Lower bound for byte lane 2 on channel 0: 0.0 +Upper bound for byte lane 2 on channel 0: 11.3 +Final timings for byte lane 2 on channel 0: 5.5 +Lower bound for byte lane 3 on channel 0: 0.0 +Upper bound for byte lane 3 on channel 0: 10.2 +Final timings for byte lane 3 on channel 0: 5.1 +Lower bound for byte lane 4 on channel 0: 0.0 +Upper bound for byte lane 4 on channel 0: 10.2 +Final timings for byte lane 4 on channel 0: 5.1 +Lower bound for byte lane 5 on channel 0: 0.0 +Upper bound for byte lane 5 on channel 0: 8.6 +Final timings for byte lane 5 on channel 0: 4.3 +Lower bound for byte lane 6 on channel 0: 0.0 +Upper bound for byte lane 6 on channel 0: 11.2 +Final timings for byte lane 6 on channel 0: 5.5 +Lower bound for byte lane 7 on channel 0: 0.0 +Upper bound for byte lane 7 on channel 0: 9.3 +Final timings for byte lane 7 on channel 0: 4.5 +Lower bound for byte lane 0 on channel 1: 0.0 +Upper bound for byte lane 0 on channel 1: 10.0 +Final timings for byte lane 0 on channel 1: 5.0 +Lower bound for byte lane 1 on channel 1: 0.0 +Upper bound for byte lane 1 on channel 1: 11.2 +Final timings for byte lane 1 on channel 1: 5.5 +Lower bound for byte lane 2 on channel 1: 0.0 +Upper bound for byte lane 2 on channel 1: 10.3 +Final timings for byte lane 2 on channel 1: 5.1 +Lower bound for byte lane 3 on channel 1: 0.0 +Upper bound for byte lane 3 on channel 1: 9.6 +Final timings for byte lane 3 on channel 1: 4.7 +Lower bound for byte lane 4 on channel 1: 0.0 +Upper bound for byte lane 4 on channel 1: 11.3 +Final timings for byte lane 4 on channel 1: 5.5 +Lower bound for byte lane 5 on channel 1: 0.0 +Upper bound for byte lane 5 on channel 1: 8.4 +Final timings for byte lane 5 on channel 1: 4.2 +Lower bound for byte lane 6 on channel 1: 0.0 +Upper bound for byte lane 6 on channel 1: 11.2 +Final timings for byte lane 6 on channel 1: 5.5 +Lower bound for byte lane 7 on channel 1: 0.0 +Upper bound for byte lane 7 on channel 1: 9.4 +Final timings for byte lane 7 on channel 1: 4.6 +Lower bound for group 0 on channel 0: 1.6.3 +Upper bound for group 0 on channel 0: 2.2.7 +Final timings for group 0 on channel 0: 1.10.5 +Lower bound for group 1 on channel 0: 1.5.5 +Upper bound for group 1 on channel 0: 2.1.6 +Final timings for group 1 on channel 0: 1.9.5 +Lower bound for group 2 on channel 0: 2.0.0 +Upper bound for group 2 on channel 0: 2.8.7 +Final timings for group 2 on channel 0: 2.4.3 +Lower bound for group 3 on channel 0: 2.4.2 +Upper bound for group 3 on channel 0: 3.0.4 +Final timings for group 3 on channel 0: 2.8.3 +IGD decoded, subtracting 32M UMA and 4M GTT +Memory configured in dual-channel interleaved mode. +Memory map: +TOM = 8192MB +TOLUD = 3072MB +TOUUD = 9216MB +REMAP: base = 8192MB + limit = 9152MB +usedMEsize: 0MB +Enabling IGD. +Finally disabling PEG in favor of IGD. +PEG x1 disabled, SDVO disabled +ICH9 waits for VC1 negotiation... done. +ICH9 waits for port arbitration table update... done. +CBMEM: root @ bdbff000 254 entries. +exit main() +Trying CBFS ramstage loader. +CBFS: loading stage fallback/ramstage @ 0x100000 (290876 bytes), entry @ 0x100000 +EHCI debug port found in CBMEM. +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 booting... +BS: Entering BS_PRE_DEVICE state. +CBMEM: recovering 6/254 entries from root @ bdbff000 +Moving GDT to bdbda000...ok +BS: Exiting BS_PRE_DEVICE state. +BS: Entering BS_DEV_INIT_CHIPS state. +Initializing i82801ix southbridge... +BS: Exiting BS_DEV_INIT_CHIPS state. +BS: Entering BS_DEV_ENUMERATE state. +Enumerating buses... +Show all devs...Before device enumeration. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +APIC: acac: enabled 0 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:03.0: enabled 1 +PCI: 00:03.1: enabled 0 +PCI: 00:03.2: enabled 0 +PCI: 00:03.3: enabled 0 +IOAPIC: 02: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:1a.0: enabled 1 +PCI: 00:1a.1: enabled 1 +PCI: 00:1a.2: enabled 1 +PCI: 00:1a.7: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1c.2: enabled 1 +PCI: 00:1c.3: enabled 1 +PCI: 00:1c.4: enabled 0 +PCI: 00:1c.5: enabled 0 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1e.0: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 00:54: enabled 1 +I2C: 00:55: enabled 1 +I2C: 00:56: enabled 1 +I2C: 00:57: enabled 1 +I2C: 00:5c: enabled 1 +I2C: 00:5d: enabled 1 +I2C: 00:5e: enabled 1 +I2C: 00:5f: enabled 1 +PCI: 00:1f.5: enabled 0 +PCI: 00:1f.6: enabled 0 +Compare with tree... +Root Device: enabled 1 + CPU_CLUSTER: 0: enabled 1 + APIC: 00: enabled 1 + APIC: acac: enabled 0 + DOMAIN: 0000: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:02.0: enabled 1 + PCI: 00:02.1: enabled 1 + PCI: 00:03.0: enabled 1 + PCI: 00:03.1: enabled 0 + PCI: 00:03.2: enabled 0 + PCI: 00:03.3: enabled 0 + IOAPIC: 02: enabled 1 + PCI: 00:19.0: enabled 1 + PCI: 00:1a.0: enabled 1 + PCI: 00:1a.1: enabled 1 + PCI: 00:1a.2: enabled 1 + PCI: 00:1a.7: enabled 1 + PCI: 00:1b.0: enabled 1 + PCI: 00:1c.0: enabled 1 + PCI: 00:1c.1: enabled 1 + PCI: 00:1c.2: enabled 1 + PCI: 00:1c.3: enabled 1 + PCI: 00:1c.4: enabled 0 + PCI: 00:1c.5: enabled 0 + PCI: 00:1d.0: enabled 1 + PCI: 00:1d.1: enabled 1 + PCI: 00:1d.2: enabled 1 + PCI: 00:1d.7: enabled 1 + PCI: 00:1e.0: enabled 1 + PCI: 00:1f.0: enabled 1 + PNP: 00ff.1: enabled 1 + PNP: 00ff.2: enabled 1 + PCI: 00:1f.2: enabled 1 + PCI: 00:1f.3: enabled 1 + I2C: 00:54: enabled 1 + I2C: 00:55: enabled 1 + I2C: 00:56: enabled 1 + I2C: 00:57: enabled 1 + I2C: 00:5c: enabled 1 + I2C: 00:5d: enabled 1 + I2C: 00:5e: enabled 1 + I2C: 00:5f: enabled 1 + PCI: 00:1f.5: enabled 0 + PCI: 00:1f.6: enabled 0 +scan_static_bus for Root Device +CPU_CLUSTER: 0 enabled +Normal boot. +DOMAIN: 0000 enabled +DOMAIN: 0000 scanning... +PCI: pci_scan_bus for bus 00 +PCI: 00:00.0 [8086/2a40] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:02.0 [8086/0000] ops +PCI: 00:02.0 [8086/2a42] enabled +PCI: 00:02.1 [8086/2a43] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: Static device PCI: 00:03.0 not found, disabling it. +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:19.0 [8086/10f5] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1a.0 [8086/2937] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1a.1 [8086/2938] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1a.2 [8086/2939] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:1a.7 [8086/0000] ops +PCI: 00:1a.7 [8086/293c] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1b.0 [8086/293e] ops +PCI: 00:1b.0 [8086/293e] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1c.0 [8086/0000] bus ops +PCI: 00:1c.0 [8086/2940] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1c.1 [8086/0000] bus ops +PCI: 00:1c.1 [8086/2942] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1c.2 [8086/0000] bus ops +PCI: 00:1c.2 [8086/2944] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1c.3 [8086/0000] bus ops +PCI: 00:1c.3 [8086/2946] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:1d.0 [8086/2934] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1d.1 [8086/2935] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1d.2 [8086/2936] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:1d.7 [8086/0000] ops +PCI: 00:1d.7 [8086/293a] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1e.0 [8086/0000] bus ops +PCI: 00:1e.0 [8086/2448] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1f.0 [8086/0000] bus ops +PCI: 00:1f.0 [8086/2917] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:1f.2 [8086/0000] ops +PCI: 00:1f.2 [8086/2928] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1f.3 [8086/0000] bus ops +PCI: 00:1f.3 [8086/2930] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: Left over static devices: +IOAPIC: 02 +PCI: Check your devicetree.cb. +do_pci_scan_bridge for PCI: 00:1c.0 +PCI: pci_scan_bus for bus 01 +PCI: pci_scan_bus returning with max=001 +do_pci_scan_bridge returns max 1 +do_pci_scan_bridge for PCI: 00:1c.1 +PCI: pci_scan_bus for bus 02 +PCI: pci_scan_bus returning with max=002 +do_pci_scan_bridge returns max 2 +do_pci_scan_bridge for PCI: 00:1c.2 +PCI: pci_scan_bus for bus 03 +PCI: pci_scan_bus returning with max=003 +do_pci_scan_bridge returns max 3 +do_pci_scan_bridge for PCI: 00:1c.3 +PCI: pci_scan_bus for bus 04 +PCI: pci_scan_bus returning with max=004 +do_pci_scan_bridge returns max 4 +do_pci_scan_bridge for PCI: 00:1e.0 +PCI: pci_scan_bus for bus 05 +PCI: pci_scan_bus returning with max=005 +do_pci_scan_bridge returns max 5 +scan_static_bus for PCI: 00:1f.0 +WARNING: No CMOS option 'touchpad'. +PNP: 00ff.1 enabled +recv_ec_data: 0x37 +recv_ec_data: 0x58 +recv_ec_data: 0x48 +recv_ec_data: 0x54 +recv_ec_data: 0x32 +recv_ec_data: 0x32 +recv_ec_data: 0x57 +recv_ec_data: 0x57 +recv_ec_data: 0x06 +recv_ec_data: 0x03 +recv_ec_data: 0x40 +recv_ec_data: 0x10 +EC Firmware ID 7XHT22WW-3.6, Version 4.01A +recv_ec_data: 0x00 +recv_ec_data: 0x10 +recv_ec_data: 0x20 +recv_ec_data: 0x30 +recv_ec_data: 0x00 +recv_ec_data: 0x00 +recv_ec_data: 0xa6 +recv_ec_data: 0x01 +recv_ec_data: 0x70 +dock is not connected +PNP: 00ff.2 enabled +scan_static_bus for PCI: 00:1f.0 done +scan_static_bus for PCI: 00:1f.3 +smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled +scan_static_bus for PCI: 00:1f.3 done +PCI: pci_scan_bus returning with max=005 +scan_static_bus for Root Device done +done +BS: Exiting BS_DEV_ENUMERATE state. +BS: Entering BS_DEV_RESOURCES state. +found VGA at PCI: 00:02.0 +Setting up VGA for PCI: 00:02.0 +Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 +Setting PCI_BRIDGE_CTL_VGA for bridge Root Device +Allocating resources... +Reading resources... +Root Device read_resources bus 0 link: 0 +CPU_CLUSTER: 0 read_resources bus 0 link: 0 +APIC: 00 missing read_resources +CPU_CLUSTER: 0 read_resources bus 0 link: 0 done +TOUUD 0x240000000 TOLUD 0xc0000000 TOM 0x200000000 +IGD decoded, subtracting 32M UMA and 4M GTT +Available memory below 4GB: 3036M +Available memory above 4GB: 5120M +Adding UMA memory area base=0xbdc00000 size=0x2400000 +Adding PCIe config bar base=0xf0000000 size=0x4000000 +DOMAIN: 0000 read_resources bus 0 link: 0 +More than one caller of pci_ehci_read_resources from PCI: 00:1a.7 +PCI: 00:1c.0 read_resources bus 1 link: 0 +PCI: 00:1c.0 read_resources bus 1 link: 0 done +PCI: 00:1c.1 read_resources bus 2 link: 0 +PCI: 00:1c.1 read_resources bus 2 link: 0 done +PCI: 00:1c.2 read_resources bus 3 link: 0 +PCI: 00:1c.2 read_resources bus 3 link: 0 done +PCI: 00:1c.3 read_resources bus 4 link: 0 +PCI: 00:1c.3 read_resources bus 4 link: 0 done +PCI: 00:1d.7 EHCI BAR hook registered +PCI: 00:1e.0 read_resources bus 5 link: 0 +PCI: 00:1e.0 read_resources bus 5 link: 0 done +PCI: 00:1f.0 read_resources bus 0 link: 0 +PNP: 00ff.1 missing read_resources +PNP: 00ff.2 missing read_resources +PCI: 00:1f.0 read_resources bus 0 link: 0 done +PCI: 00:1f.3 read_resources bus 1 link: 0 +PCI: 00:1f.3 read_resources bus 1 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 done +Root Device read_resources bus 0 link: 0 done +Done reading resources. +Show resources in subtree (Root Device)...After reading. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: acac + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 + DOMAIN: 0000 resource base c0000 size bdb40000 align 0 gran 0 limit 0 flags e0004200 index 4 + DOMAIN: 0000 resource base 100000000 size 140000000 align 0 gran 0 limit 0 flags e0004200 index 5 + DOMAIN: 0000 resource base bdc00000 size 2400000 align 0 gran 0 limit 0 flags f0000200 index 6 + DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7 + PCI: 00:00.0 + PCI: 00:02.0 + PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 + PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 + PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 20 + PCI: 00:02.1 + PCI: 00:02.1 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10 + PCI: 00:03.0 + PCI: 00:03.1 + PCI: 00:03.2 + PCI: 00:03.3 + PCI: 00:19.0 + PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 + PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 + PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 + PCI: 00:1a.0 + PCI: 00:1a.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1a.1 + PCI: 00:1a.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1a.2 + PCI: 00:1a.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1a.7 + PCI: 00:1a.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 + PCI: 00:1c.0 + PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1c.1 + PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1c.3Unknown device path type: 0 + child on link 0 + PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 +Unknown device path type: 0 + +Unknown device path type: 0 + resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 +Unknown device path type: 0 + resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 +Unknown device path type: 0 + resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 + PCI: 00:1c.4 + PCI: 00:1c.5 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10 + PCI: 00:1e.0 + PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:54 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f + PCI: 00:1f.5 + PCI: 00:1f.6 +DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff +PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +Unknown device path type: 0 + 18 * [0x0 - 0xfff] io +PCI: 00:1c.3 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done +PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.3 1c * [0x0 - 0xfff] io +PCI: 00:19.0 18 * [0x1000 - 0x101f] io +PCI: 00:1a.0 20 * [0x1020 - 0x103f] io +PCI: 00:1a.1 20 * [0x1040 - 0x105f] io +PCI: 00:1a.2 20 * [0x1060 - 0x107f] io +PCI: 00:1d.0 20 * [0x1080 - 0x109f] io +PCI: 00:1d.1 20 * [0x10a0 - 0x10bf] io +PCI: 00:1d.2 20 * [0x10c0 - 0x10df] io +PCI: 00:1f.2 20 * [0x10e0 - 0x10ff] io +PCI: 00:02.0 20 * [0x1400 - 0x1407] io +PCI: 00:1f.2 10 * [0x1408 - 0x140f] io +PCI: 00:1f.2 18 * [0x1410 - 0x1417] io +PCI: 00:1f.2 14 * [0x1418 - 0x141b] io +PCI: 00:1f.2 1c * [0x141c - 0x141f] io +DOMAIN: 0000 compute_resources_io: base: 1420 size: 1420 align: 12 gran: 0 limit: ffff done +DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +Unknown device path type: 0 + 14 * [0x0 - 0x7fffff] prefmem +PCI: 00:1c.3 compute_resources_prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done +PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +Unknown device path type: 0 + 10 * [0x0 - 0x7fffff] mem +PCI: 00:1c.3 compute_resources_mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done +PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem +PCI: 00:1c.3 24 * [0x10000000 - 0x107fffff] prefmem +PCI: 00:1c.3 20 * [0x10800000 - 0x10ffffff] mem +PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem +PCI: 00:02.1 10 * [0x11400000 - 0x114fffff] mem +PCI: 00:19.0 10 * [0x11500000 - 0x1151ffff] mem +PCI: 00:1b.0 10 * [0x11520000 - 0x11523fff] mem +PCI: 00:19.0 14 * [0x11524000 - 0x11524fff] mem +PCI: 00:1f.2 24 * [0x11525000 - 0x115257ff] mem +PCI: 00:1a.7 10 * [0x11525800 - 0x11525bff] mem +PCI: 00:1d.7 10 * [0x11525c00 - 0x11525fff] mem +PCI: 00:1f.3 10 * [0x11526000 - 0x115260ff] mem +DOMAIN: 0000 compute_resources_mem: base: 11526100 size: 11526100 align: 28 gran: 0 limit: ffffffff done +avoid_fixed_resources: DOMAIN: 0000 +avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff +constrain_resources: DOMAIN: 0000 +constrain_resources: PCI: 00:00.0 +constrain_resources: PCI: 00:02.0 +constrain_resources: PCI: 00:02.1 +constrain_resources: PCI: 00:19.0 +constrain_resources: PCI: 00:1a.0 +constrain_resources: PCI: 00:1a.1 +constrain_resources: PCI: 00:1a.2 +constrain_resources: PCI: 00:1a.7 +constrain_resources: PCI: 00:1b.0 +constrain_resources: PCI: 00:1c.0 +constrain_resources: PCI: 00:1c.1 +constrain_resources: PCI: 00:1c.2 +constrain_resources: PCI: 00:1c.3 +Unknown device path type: 0 +constrain_resources: +constrain_resources: PCI: 00:1d.0 +constrain_resources: PCI: 00:1d.1 +constrain_resources: PCI: 00:1d.2 +constrain_resources: PCI: 00:1d.7 +constrain_resources: PCI: 00:1e.0 +constrain_resources: PCI: 00:1f.0 +constrain_resources: PNP: 00ff.1 +constrain_resources: PNP: 00ff.2 +skipping PNP: 00ff.2@60 fixed resource, size=0! +skipping PNP: 00ff.2@62 fixed resource, size=0! +skipping PNP: 00ff.2@64 fixed resource, size=0! +skipping PNP: 00ff.2@66 fixed resource, size=0! +constrain_resources: PCI: 00:1f.2 +constrain_resources: PCI: 00:1f.3 +constrain_resources: I2C: 01:54 +constrain_resources: I2C: 01:55 +constrain_resources: I2C: 01:56 +constrain_resources: I2C: 01:57 +constrain_resources: I2C: 01:5c +constrain_resources: I2C: 01:5d +constrain_resources: I2C: 01:5e +constrain_resources: I2C: 01:5f +avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff + lim->base 000015f0 lim->limit 0000ffff +avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff + lim->base c0000000 lim->limit efffffff +Setting resources... +DOMAIN: 0000 allocate_resources_io: base:15f0 size:1420 align:12 gran:0 limit:ffff +Assigned: PCI: 00:1c.3 1c * [0x2000 - 0x2fff] io +Assigned: PCI: 00:19.0 18 * [0x3000 - 0x301f] io +Assigned: PCI: 00:1a.0 20 * [0x3020 - 0x303f] io +Assigned: PCI: 00:1a.1 20 * [0x3040 - 0x305f] io +Assigned: PCI: 00:1a.2 20 * [0x3060 - 0x307f] io +Assigned: PCI: 00:1d.0 20 * [0x3080 - 0x309f] io +Assigned: PCI: 00:1d.1 20 * [0x30a0 - 0x30bf] io +Assigned: PCI: 00:1d.2 20 * [0x30c0 - 0x30df] io +Assigned: PCI: 00:1f.2 20 * [0x30e0 - 0x30ff] io +Assigned: PCI: 00:02.0 20 * [0x3400 - 0x3407] io +Assigned: PCI: 00:1f.2 10 * [0x3408 - 0x340f] io +Assigned: PCI: 00:1f.2 18 * [0x3410 - 0x3417] io +Assigned: PCI: 00:1f.2 14 * [0x3418 - 0x341b] io +Assigned: PCI: 00:1f.2 1c * [0x341c - 0x341f] io +DOMAIN: 0000 allocate_resources_io: next_base: 3420 size: 1420 align: 12 gran: 0 done +PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.3 allocate_resources_io: base:2000 size:1000 align:12 gran:12 limit:ffff +Unknown device path type: 0 +Assigned: 18 * [0x2000 - 0x2fff] io +PCI: 00:1c.3 allocate_resources_io: next_base: 3000 size: 1000 align: 12 gran: 12 done +PCI: 00:1e.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1e.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:11526100 align:28 gran:0 limit:efffffff +Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem +Assigned: PCI: 00:1c.3 24 * [0xe0000000 - 0xe07fffff] prefmem +Assigned: PCI: 00:1c.3 20 * [0xe0800000 - 0xe0ffffff] mem +Assigned: PCI: 00:02.0 10 * [0xe1000000 - 0xe13fffff] mem +Assigned: PCI: 00:02.1 10 * [0xe1400000 - 0xe14fffff] mem +Assigned: PCI: 00:19.0 10 * [0xe1500000 - 0xe151ffff] mem +Assigned: PCI: 00:1b.0 10 * [0xe1520000 - 0xe1523fff] mem +Assigned: PCI: 00:19.0 14 * [0xe1524000 - 0xe1524fff] mem +Assigned: PCI: 00:1f.2 24 * [0xe1525000 - 0xe15257ff] mem +Assigned: PCI: 00:1a.7 10 * [0xe1525800 - 0xe1525bff] mem +Assigned: PCI: 00:1d.7 10 * [0xe1525c00 - 0xe1525fff] mem +Assigned: PCI: 00:1f.3 10 * [0xe1526000 - 0xe15260ff] mem +DOMAIN: 0000 allocate_resources_mem: next_base: e1526100 size: 11526100 align: 28 gran: 0 done +PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.0 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.0 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.1 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.3 allocate_resources_prefmem: base:e0000000 size:800000 align:22 gran:20 limit:efffffff +Unknown device path type: 0 +Assigned: 14 * [0xe0000000 - 0xe07fffff] prefmem +PCI: 00:1c.3 allocate_resources_prefmem: next_base: e0800000 size: 800000 align: 22 gran: 20 done +PCI: 00:1c.3 allocate_resources_mem: base:e0800000 size:800000 align:22 gran:20 limit:efffffff +Unknown device path type: 0 +Assigned: 10 * [0xe0800000 - 0xe0ffffff] mem +PCI: 00:1c.3 allocate_resources_mem: next_base: e1000000 size: 800000 align: 22 gran: 20 done +PCI: 00:1e.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1e.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1e.0 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1e.0 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +Root Device assign_resources, bus 0 link: 0 +DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem +DOMAIN: 0000 04 <- [0x00000c0000 - 0x00bdbfffff] size 0xbdb40000 gran 0x00 mem +DOMAIN: 0000 05 <- [0x0100000000 - 0x023fffffff] size 0x140000000 gran 0x00 mem +DOMAIN: 0000 06 <- [0x00bdc00000 - 0x00bfffffff] size 0x02400000 gran 0x00 mem +DOMAIN: 0000 07 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem +DOMAIN: 0000 assign_resources, bus 0 link: 0 +PCI: 00:02.0 10 <- [0x00e1000000 - 0x00e13fffff] size 0x00400000 gran 0x16 mem64 +PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 +PCI: 00:02.0 20 <- [0x0000003400 - 0x0000003407] size 0x00000008 gran 0x03 io +PCI: 00:02.1 10 <- [0x00e1400000 - 0x00e14fffff] size 0x00100000 gran 0x14 mem64 +PCI: 00:19.0 10 <- [0x00e1500000 - 0x00e151ffff] size 0x00020000 gran 0x11 mem +PCI: 00:19.0 14 <- [0x00e1524000 - 0x00e1524fff] size 0x00001000 gran 0x0c mem +PCI: 00:19.0 18 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io +PCI: 00:1a.0 20 <- [0x0000003020 - 0x000000303f] size 0x00000020 gran 0x05 io +PCI: 00:1a.1 20 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io +PCI: 00:1a.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io +PCI: 00:1a.7 10 <- [0x00e1525800 - 0x00e1525bff] size 0x00000400 gran 0x0a mem +PCI: 00:1b.0 10 <- [0x00e1520000 - 0x00e1523fff] size 0x00004000 gran 0x0e mem64 +PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io +PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem +PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem +PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io +PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem +PCI: 00:1c.1 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 mem +PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io +PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem +PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem +PCI: 00:1c.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io +PCI: 00:1c.3 24 <- [0x00e0000000 - 0x00e07fffff] size 0x00800000 gran 0x14 bus 04 prefmem +PCI: 00:1c.3 20 <- [0x00e0800000 - 0x00e0ffffff] size 0x00800000 gran 0x14 bus 04 mem +PCI: 00:1c.3 assign_resources, bus 4 link: 0 +Unknown device path type: 0 + missing set_resources +PCI: 00:1c.3 assign_resources, bus 4 link: 0 +PCI: 00:1d.0 20 <- [0x0000003080 - 0x000000309f] size 0x00000020 gran 0x05 io +PCI: 00:1d.1 20 <- [0x00000030a0 - 0x00000030bf] size 0x00000020 gran 0x05 io +PCI: 00:1d.2 20 <- [0x00000030c0 - 0x00000030df] size 0x00000020 gran 0x05 io +PCI: 00:1d.7 EHCI Debug Port hook triggered +PCI: 00:1d.7 10 <- [0x00e1525c00 - 0x00e1525fff] size 0x00000400 gran 0x0a mem +PCI: 00:1d.7 EHCI Debug Port relocated +PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io +PCI: 00:1e.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 05 prefmem +PCI: 00:1e.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 05 mem +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PNP: 00ff.1 missing set_resources +PNP: 00ff.2 missing set_resources +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PCI: 00:1f.2 10 <- [0x0000003408 - 0x000000340f] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 14 <- [0x0000003418 - 0x000000341b] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 18 <- [0x0000003410 - 0x0000003417] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 1c <- [0x000000341c - 0x000000341f] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 20 <- [0x00000030e0 - 0x00000030ff] size 0x00000020 gran 0x05 io +PCI: 00:1f.2 24 <- [0x00e1525000 - 0x00e15257ff] size 0x00000800 gran 0x0b mem +PCI: 00:1f.3 10 <- [0x00e1526000 - 0x00e15260ff] size 0x00000100 gran 0x08 mem64 +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +Root Device assign_resources, bus 0 link: 0 +Done setting resources. +Show resources in subtree (Root Device)...After assigning values. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: acac + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 15f0 size 1420 align 12 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base d0000000 size 11526100 align 28 gran 0 limit efffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 + DOMAIN: 0000 resource base c0000 size bdb40000 align 0 gran 0 limit 0 flags e0004200 index 4 + DOMAIN: 0000 resource base 100000000 size 140000000 align 0 gran 0 limit 0 flags e0004200 index 5 + DOMAIN: 0000 resource base bdc00000 size 2400000 align 0 gran 0 limit 0 flags f0000200 index 6 + DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7 + PCI: 00:00.0 + PCI: 00:02.0 + PCI: 00:02.0 resource base e1000000 size 400000 align 22 gran 22 limit efffffff flags 60000201 index 10 + PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 + PCI: 00:02.0 resource base 3400 size 8 align 3 gran 3 limit ffff flags 60000100 index 20 + PCI: 00:02.1 + PCI: 00:02.1 resource base e1400000 size 100000 align 20 gran 20 limit efffffff flags 60000201 index 10 + PCI: 00:03.0 + PCI: 00:03.1 + PCI: 00:03.2 + PCI: 00:03.3 + PCI: 00:19.0 + PCI: 00:19.0 resource base e1500000 size 20000 align 17 gran 17 limit efffffff flags 60000200 index 10 + PCI: 00:19.0 resource base e1524000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 + PCI: 00:19.0 resource base 3000 size 20 align 5 gran 5 limit ffff flags 60000100 index 18 + PCI: 00:1a.0 + PCI: 00:1a.0 resource base 3020 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1a.1 + PCI: 00:1a.1 resource base 3040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1a.2 + PCI: 00:1a.2 resource base 3060 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1a.7 + PCI: 00:1a.7 resource base e1525800 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base e1520000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10 + PCI: 00:1c.0 + PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1c.1 + PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1c.3Unknown device path type: 0 + child on link 0 + PCI: 00:1c.3 resource base 2000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.3 resource base e0000000 size 800000 align 22 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.3 resource base e0800000 size 800000 align 22 gran 20 limit efffffff flags 60080202 index 20 +Unknown device path type: 0 + +Unknown device path type: 0 + resource base e0800000 size 800000 align 22 gran 22 limit efffffff flags 40000200 index 10 +Unknown device path type: 0 + resource base e0000000 size 800000 align 22 gran 22 limit efffffff flags 40001200 index 14 +Unknown device path type: 0 + resource base 2000 size 1000 align 12 gran 12 limit ffff flags 40000100 index 18 + PCI: 00:1c.4 + PCI: 00:1c.5 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 3080 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 30a0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 30c0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base e1525c00 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10 + PCI: 00:1e.0 + PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1e.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1e.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 3408 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 + PCI: 00:1f.2 resource base 3418 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 + PCI: 00:1f.2 resource base 3410 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 + PCI: 00:1f.2 resource base 341c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c + PCI: 00:1f.2 resource base 30e0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1f.2 resource base e1525000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:54 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + PCI: 00:1f.3 resource base e1526000 size 100 align 8 gran 8 limit efffffff flags 60000201 index 10 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f + PCI: 00:1f.5 + PCI: 00:1f.6 +Done allocating resources. +BS: Exiting BS_DEV_RESOURCES state. +BS: Entering BS_DEV_ENABLE state. +Enabling resources... +PCI: 00:00.0 subsystem <- 17aa/20e0 +PCI: 00:00.0 cmd <- 06 +PCI: 00:02.0 subsystem <- 17aa/20e4 +PCI: 00:02.0 cmd <- 03 +PCI: 00:02.1 subsystem <- 17aa/20e4 +PCI: 00:02.1 cmd <- 02 +PCI: 00:19.0 subsystem <- 0000/0000 +PCI: 00:19.0 cmd <- 103 +PCI: 00:1a.0 subsystem <- 17aa/20f0 +PCI: 00:1a.0 cmd <- 01 +PCI: 00:1a.1 subsystem <- 17aa/20f0 +PCI: 00:1a.1 cmd <- 01 +PCI: 00:1a.2 subsystem <- 17aa/20f0 +PCI: 00:1a.2 cmd <- 01 +PCI: 00:1a.7 subsystem <- 17aa/20f1 +PCI: 00:1a.7 cmd <- 102 +PCI: 00:1b.0 subsystem <- 17aa/20f2 +PCI: 00:1b.0 cmd <- 102 +PCI: 00:1c.0 bridge ctrl <- 0003 +PCI: 00:1c.0 subsystem <- 17aa/20f3 +PCI: 00:1c.0 cmd <- 100 +PCI: 00:1c.1 bridge ctrl <- 0003 +PCI: 00:1c.1 subsystem <- 17aa/20f3 +PCI: 00:1c.1 cmd <- 100 +PCI: 00:1c.2 bridge ctrl <- 0003 +PCI: 00:1c.2 subsystem <- 17aa/20f3 +PCI: 00:1c.2 cmd <- 100 +PCI: 00:1c.3 bridge ctrl <- 0003 +PCI: 00:1c.3 subsystem <- 17aa/20f3 +PCI: 00:1c.3 cmd <- 107 +PCI: 00:1d.0 subsystem <- 17aa/20f0 +PCI: 00:1d.0 cmd <- 01 +PCI: 00:1d.1 subsystem <- 17aa/20f0 +PCI: 00:1d.1 cmd <- 01 +PCI: 00:1d.2 subsystem <- 17aa/20f0 +PCI: 00:1d.2 cmd <- 01 +PCI: 00:1d.7 subsystem <- 17aa/20f1 +PCI: 00:1d.7 cmd <- 102 +PCI: 00:1e.0 bridge ctrl <- 0003 +PCI: 00:1e.0 subsystem <- 17aa/20f4 +PCI: 00:1e.0 cmd <- 100 +PCI: 00:1f.0 subsystem <- 17aa/20f5 +PCI: 00:1f.0 cmd <- 107 +PCI: 00:1f.2 subsystem <- 17aa/20f8 +PCI: 00:1f.2 cmd <- 03 +PCI: 00:1f.3 subsystem <- 17aa/20f9 +PCI: 00:1f.3 cmd <- 103 +done. +BS: Exiting BS_DEV_ENABLE state. +BS: Entering BS_DEV_INIT state. +Initializing devices... +Root Device init +Keyboard init... +No PS/2 keyboard detected. +CPU_CLUSTER: 0 init +start_eip=0x00001000, code_size=0x00000031 +Initializing SMM handler... ... pmbase = 0x0600 + +SMI_STS: MCSMI +PM1_STS: +GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 +ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 +TCO_STS: + ... raise SMI# +Initializing CPU #0 +CPU: vendor Intel device 1067a +CPU: family 06, model 17, stepping 0a +Enabling cache +microcode: sig=0x1067a pf=0x80 revision=0x0 +microcode: updated to revision 0xa0b date=2010-09-28 +CPU: Intel(R) Core(TM)2 Duo CPU L9400 @ 1.86GHz. +MTRR: Physical address space: +0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 +0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 +0x00000000000c0000 - 0x00000000bdc00000 size 0xbdb40000 type 6 +0x00000000bdc00000 - 0x00000000d0000000 size 0x12400000 type 0 +0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 +0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 +0x0000000100000000 - 0x0000000240000000 size 0x140000000 type 6 +MTRR addr 0x0-0x10 set to 6 type @ 0 +MTRR addr 0x10-0x20 set to 6 type @ 1 +MTRR addr 0x20-0x30 set to 6 type @ 2 +MTRR addr 0x30-0x40 set to 6 type @ 3 +MTRR addr 0x40-0x50 set to 6 type @ 4 +MTRR addr 0x50-0x60 set to 6 type @ 5 +MTRR addr 0x60-0x70 set to 6 type @ 6 +MTRR addr 0x70-0x80 set to 6 type @ 7 +MTRR addr 0x80-0x84 set to 6 type @ 8 +MTRR addr 0x84-0x88 set to 6 type @ 9 +MTRR addr 0x88-0x8c set to 6 type @ 10 +MTRR addr 0x8c-0x90 set to 6 type @ 11 +MTRR addr 0x90-0x94 set to 6 type @ 12 +MTRR addr 0x94-0x98 set to 6 type @ 13 +MTRR addr 0x98-0x9c set to 6 type @ 14 +MTRR addr 0x9c-0xa0 set to 6 type @ 15 +MTRR addr 0xa0-0xa4 set to 0 type @ 16 +MTRR addr 0xa4-0xa8 set to 0 type @ 17 +MTRR addr 0xa8-0xac set to 0 type @ 18 +MTRR addr 0xac-0xb0 set to 0 type @ 19 +MTRR addr 0xb0-0xb4 set to 0 type @ 20 +MTRR addr 0xb4-0xb8 set to 0 type @ 21 +MTRR addr 0xb8-0xbc set to 0 type @ 22 +MTRR addr 0xbc-0xc0 set to 0 type @ 23 +MTRR addr 0xc0-0xc1 set to 6 type @ 24 +MTRR addr 0xc1-0xc2 set to 6 type @ 25 +MTRR addr 0xc2-0xc3 set to 6 type @ 26 +MTRR addr 0xc3-0xc4 set to 6 type @ 27 +MTRR addr 0xc4-0xc5 set to 6 type @ 28 +MTRR addr 0xc5-0xc6 set to 6 type @ 29 +MTRR addr 0xc6-0xc7 set to 6 type @ 30 +MTRR addr 0xc7-0xc8 set to 6 type @ 31 +MTRR addr 0xc8-0xc9 set to 6 type @ 32 +MTRR addr 0xc9-0xca set to 6 type @ 33 +MTRR addr 0xca-0xcb set to 6 type @ 34 +MTRR addr 0xcb-0xcc set to 6 type @ 35 +MTRR addr 0xcc-0xcd set to 6 type @ 36 +MTRR addr 0xcd-0xce set to 6 type @ 37 +MTRR addr 0xce-0xcf set to 6 type @ 38 +MTRR addr 0xcf-0xd0 set to 6 type @ 39 +MTRR addr 0xd0-0xd1 set to 6 type @ 40 +MTRR addr 0xd1-0xd2 set to 6 type @ 41 +MTRR addr 0xd2-0xd3 set to 6 type @ 42 +MTRR addr 0xd3-0xd4 set to 6 type @ 43 +MTRR addr 0xd4-0xd5 set to 6 type @ 44 +MTRR addr 0xd5-0xd6 set to 6 type @ 45 +MTRR addr 0xd6-0xd7 set to 6 type @ 46 +MTRR addr 0xd7-0xd8 set to 6 type @ 47 +MTRR addr 0xd8-0xd9 set to 6 type @ 48 +MTRR addr 0xd9-0xda set to 6 type @ 49 +MTRR addr 0xda-0xdb set to 6 type @ 50 +MTRR addr 0xdb-0xdc set to 6 type @ 51 +MTRR addr 0xdc-0xdd set to 6 type @ 52 +MTRR addr 0xdd-0xde set to 6 type @ 53 +MTRR addr 0xde-0xdf set to 6 type @ 54 +MTRR addr 0xdf-0xe0 set to 6 type @ 55 +MTRR addr 0xe0-0xe1 set to 6 type @ 56 +MTRR addr 0xe1-0xe2 set to 6 type @ 57 +MTRR addr 0xe2-0xe3 set to 6 type @ 58 +MTRR addr 0xe3-0xe4 set to 6 type @ 59 +MTRR addr 0xe4-0xe5 set to 6 type @ 60 +MTRR addr 0xe5-0xe6 set to 6 type @ 61 +MTRR addr 0xe6-0xe7 set to 6 type @ 62 +MTRR addr 0xe7-0xe8 set to 6 type @ 63 +MTRR addr 0xe8-0xe9 set to 6 type @ 64 +MTRR addr 0xe9-0xea set to 6 type @ 65 +MTRR addr 0xea-0xeb set to 6 type @ 66 +MTRR addr 0xeb-0xec set to 6 type @ 67 +MTRR addr 0xec-0xed set to 6 type @ 68 +MTRR addr 0xed-0xee set to 6 type @ 69 +MTRR addr 0xee-0xef set to 6 type @ 70 +MTRR addr 0xef-0xf0 set to 6 type @ 71 +MTRR addr 0xf0-0xf1 set to 6 type @ 72 +MTRR addr 0xf1-0xf2 set to 6 type @ 73 +MTRR addr 0xf2-0xf3 set to 6 type @ 74 +MTRR addr 0xf3-0xf4 set to 6 type @ 75 +MTRR addr 0xf4-0xf5 set to 6 type @ 76 +MTRR addr 0xf5-0xf6 set to 6 type @ 77 +MTRR addr 0xf6-0xf7 set to 6 type @ 78 +MTRR addr 0xf7-0xf8 set to 6 type @ 79 +MTRR addr 0xf8-0xf9 set to 6 type @ 80 +MTRR addr 0xf9-0xfa set to 6 type @ 81 +MTRR addr 0xfa-0xfb set to 6 type @ 82 +MTRR addr 0xfb-0xfc set to 6 type @ 83 +MTRR addr 0xfc-0xfd set to 6 type @ 84 +MTRR addr 0xfd-0xfe set to 6 type @ 85 +MTRR addr 0xfe-0xff set to 6 type @ 86 +MTRR addr 0xff-0x100 set to 6 type @ 87 +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 36 bits +MTRR: default type WB/UC MTRR counts: 5/7. +MTRR: WB selected as default type. +MTRR: 0 base 0x00000000bdc00000 mask 0x0000000fffc00000 type 0 +MTRR: 1 base 0x00000000be000000 mask 0x0000000ffe000000 type 0 +MTRR: 2 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0 +MTRR: 3 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 +MTRR: 4 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x00 done. +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 0: 0, 0, 7, 0x21, 35000; encoded: 0x0721 +WARNING: No CMOS option 'hyper_threading'. +CPU: 0 2 siblings +CPU: 0 has sibling 1 +CPU #0 initialized +CPU1: stack_base 00141000, stack_end 00141ff8 +Asserting INIT. +Waiting for send to finish... ++Deasserting INIT. +Waiting for send to finish... ++#startup loops: 2. +Sending STARTUP #1 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++Sending STARTUP #2 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++After Startup. +Initializing CPU #1 +Waiting for 1 CPUS to stop +CPU: vendor Intel device 1067a +CPU: family 06, model 17, stepping 0a +Enabling cache +microcode: sig=0x1067a pf=0x80 revision=0x0 +microcode: updated to revision 0xa0b date=2010-09-28 +CPU: Intel(R) Core(TM)2 Duo CPU L9400 @ 1.86GHz. +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 36 bits + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x01 done. +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 7, 0x21, 35000; encoded: 0x0721 +CPU: 1 2 siblings +CPU #1 initialized +All AP CPUs stopped (4540 loops) +CPU1: stack: 00141000 - 00142000, lowest used address 00141b6c, stack used: 1172 bytes +DOMAIN: 0000 init +PCI: 00:00.0 init +PCI: 00:02.0 init +Initializing VGA without OPROM. MMIO 0xe1000000 +EDID: +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +Extracted contents: +header: 00 00 00 00 00 00 00 00 +serial number: 00 00 00 00 00 00 00 00 00 00 +version: 00 00 +basic params: 00 00 00 00 00 +chroma info: 00 00 00 00 00 00 00 00 00 00 +established: 00 00 00 +standard: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +descriptor 1: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +descriptor 3: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +descriptor 4: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +extensions: 00 +checksum: 00 + +No header found +Couldn't find GFX clock divisors +PCI: 00:02.1 init +PCI: 00:19.0 init +PCI: 00:1a.0 init +PCI: 00:1a.1 init +PCI: 00:1a.2 init +PCI: 00:1a.7 init +EHCI: Setting up controller.. done. +PCI: 00:1b.0 init +Azalia: base = e1520000 +Azalia: No codec! +PCI: 00:1c.0 init +Initializing ICH9 PCIe root port. +PCI: 00:1c.1 init +Initializing ICH9 PCIe root port. +PCI: 00:1c.2 init +Initializing ICH9 PCIe root port. +PCI: 00:1c.3 init +Initializing ICH9 PCIe root port. +PCI: 00:1d.0 init +PCI: 00:1d.1 init +PCI: 00:1d.2 init +PCI: 00:1d.7 init +EHCI: Setting up controller.. done. +PCI: 00:1e.0 init +PCI: 00:1f.0 init +i82801ix: lpc_init +IOAPIC: Initializing IOAPIC at 0xfec00000 +IOAPIC: Bootstrap Processor Local APIC = 0x00 +IOAPIC: ID = 0x02 +IOAPIC: Dumping registers + reg 0x0000: 0x02000000 + reg 0x0001: 0x00170020 + reg 0x0002: 0x00170020 +IOAPIC: 24 interrupts +IOAPIC: Enabling interrupts on FSB +IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 +IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 +IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 +WARNING: No CMOS option 'power_on_after_fail'. +Set power on after power failure. +WARNING: No CMOS option 'nmi'. +NMI sources disabled. +rtc_failed = 0x4 +RTC Init +RTC: Clear requested +Disabling ACPI via APMC: +done. +Locking SMM. +PCI: 00:1f.2 init +i82801ix_sata: initializing... +SATA controller in AHCI mode. +ABAR: E1525000 +PCI: 00:1f.3 init +smbus: PCI: 00:1f.3[0]->I2C: 01:54 init +smbus: PCI: 00:1f.3[0]->I2C: 01:55 init +smbus: PCI: 00:1f.3[0]->I2C: 01:56 init +smbus: PCI: 00:1f.3[0]->I2C: 01:57 init +smbus: PCI: 00:1f.3[0]->I2C: 01:5c init +Locking EEPROM RFID +init EEPROM done +smbus: PCI: 00:1f.3[0]->I2C: 01:5d init +smbus: PCI: 00:1f.3[0]->I2C: 01:5e init +smbus: PCI: 00:1f.3[0]->I2C: 01:5f init +Devices initialized +Show all devs...After init. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +APIC: acac: enabled 0 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:03.0: enabled 0 +PCI: 00:03.1: enabled 0 +PCI: 00:03.2: enabled 0 +PCI: 00:03.3: enabled 0 +IOAPIC: 02: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:1a.0: enabled 1 +PCI: 00:1a.1: enabled 1 +PCI: 00:1a.2: enabled 1 +PCI: 00:1a.7: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1c.2: enabled 1 +PCI: 00:1c.3: enabled 1 +PCI: 00:1c.4: enabled 0 +PCI: 00:1c.5: enabled 0 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1e.0: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 01:54: enabled 1 +I2C: 01:55: enabled 1 +I2C: 01:56: enabled 1 +I2C: 01:57: enabled 1 +I2C: 01:5c: enabled 1 +I2C: 01:5d: enabled 1 +I2C: 01:5e: enabled 1 +I2C: 01:5f: enabled 1 +PCI: 00:1f.5: enabled 0 +PCI: 00:1f.6: enabled 0 +Unknown device path type: 0 +: enabled 1 +APIC: 01: enabled 1 +BS: Exiting BS_DEV_INIT state. +BS: Entering BS_POST_DEVICE state. +Finalize devices... +Devices finalized +BS: Exiting BS_POST_DEVICE state. +BS: Entering BS_OS_RESUME_CHECK state. +BS: Exiting BS_OS_RESUME_CHECK state. +BS: Entering BS_WRITE_TABLES state. +Writing ISA IRQs +no IRQ found for PCI: 00:00.0 +fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:02.1 +no IRQ found for PCI: 00:19.0 +fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1a.1: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1a.2: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1a.7: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1c.0: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:1c.1 +no IRQ found for PCI: 00:1c.2 +no IRQ found for PCI: 00:1c.3 +fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:1e.0 +no IRQ found for PCI: 00:1f.0 +fixed IRQ entry for: PCI: 00:1f.2: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 2 PIN 18 +Wrote the mp table end at: 000f0010 - 000f0194 +MPTABLE len: 404 +Writing ISA IRQs +no IRQ found for PCI: 00:00.0 +fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:02.1 +no IRQ found for PCI: 00:19.0 +fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1a.1: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1a.2: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1a.7: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1c.0: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:1c.1 +no IRQ found for PCI: 00:1c.2 +no IRQ found for PCI: 00:1c.3 +fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:1e.0 +no IRQ found for PCI: 00:1f.0 +fixed IRQ entry for: PCI: 00:1f.2: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 2 PIN 18 +Wrote the mp table end at: bdad9010 - bdad9194 +MPTABLE len: 404 +MP table: 404 bytes. +ACPI: Writing ACPI tables at bdab5000. +ACPI: * FACS +ACPI: * DSDT +ACPI: * FADT +ACPI: added table 1/32, length now 40 +ACPI: * SSDT +Found 1 CPU(s) with 2 core(s) each. +clocks between 800 and 2133 MHz. +adding 4 P-States between busratio 6 and 8, incl. P0 +PSS: 1867MHz power 35000 control 0x829 status 0x829 +PSS: 1866MHz power 35000 control 0x721 status 0x721 +PSS: 1600MHz power 15000 control 0x617 status 0x617 +PSS: 800MHz power 12000 control 0x8611 status 0x8611 +clocks between 800 and 2133 MHz. +adding 4 P-States between busratio 6 and 8, incl. P0 +PSS: 1867MHz power 35000 control 0x829 status 0x829 +PSS: 1866MHz power 35000 control 0x721 status 0x721 +PSS: 1600MHz power 15000 control 0x617 status 0x617 +PSS: 800MHz power 12000 control 0x8611 status 0x8611 +ACPI: added table 2/32, length now 44 +ACPI: * MCFG +ACPI: added table 3/32, length now 48 +ACPI: * MADT +ACPI: added table 4/32, length now 52 +current = bdab8e40 +ACPI: * DMAR +ACPI: added table 5/32, length now 56 +current = bdab8ef0 +ACPI: * HPET +ACPI: added table 6/32, length now 60 +ACPI: done. +ACPI tables: 16176 bytes. +smbios_write_tables: bdab3000 +recv_ec_data: 0x37 +recv_ec_data: 0x58 +recv_ec_data: 0x48 +recv_ec_data: 0x54 +recv_ec_data: 0x32 +recv_ec_data: 0x32 +recv_ec_data: 0x57 +recv_ec_data: 0x57 +recv_ec_data: 0x06 +recv_ec_data: 0x03 +Root Device (LENOVO ThinkPad X200) +CPU_CLUSTER: 0 (Intel GM45 Northbridge) +APIC: 00 (Socket BGA956 CPU) +APIC: acac (Intel Penryn CPU) +DOMAIN: 0000 (Intel GM45 Northbridge) +PCI: 00:00.0 (Intel GM45 Northbridge) +PCI: 00:02.0 (Intel GM45 Northbridge) +PCI: 00:02.1 (Intel GM45 Northbridge) +PCI: 00:03.0 (Intel GM45 Northbridge) +PCI: 00:03.1 (Intel GM45 Northbridge) +PCI: 00:03.2 (Intel GM45 Northbridge) +PCI: 00:03.3 (Intel GM45 Northbridge) +IOAPIC: 02 (IOAPIC) +PCI: 00:19.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1a.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1a.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1a.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1a.7 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1b.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.3 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.4 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.5 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1d.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1d.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1d.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1d.7 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1e.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1f.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) +PNP: 00ff.2 (Lenovo H8 EC) +PCI: 00:1f.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1f.3 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +I2C: 01:54 (AT24RF08C) +I2C: 01:55 (AT24RF08C) +I2C: 01:56 (AT24RF08C) +I2C: 01:57 (AT24RF08C) +I2C: 01:5c (AT24RF08C) +I2C: 01:5d (AT24RF08C) +I2C: 01:5e (AT24RF08C) +I2C: 01:5f (AT24RF08C) +PCI: 00:1f.5 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1f.6 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +Unknown device path type: 0 + (unknown) +APIC: 01 (unknown) +SMBIOS tables: 436 bytes. +Writing table forward entry at 0x00000500 +Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9233 +Table forward entry ends at 0x00000528. +... aligned to 0x00001000 +Writing coreboot table at 0xbdaab000 +rom_table_end = 0xbdaab000 +... aligned to 0xbdab0000 + 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES + 1. 0000000000001000-000000000009ffff: RAM + 2. 00000000000c0000-00000000bdaaafff: RAM + 3. 00000000bdaab000-00000000bdbfffff: CONFIGURATION TABLES + 4. 00000000bdc00000-00000000bfffffff: RESERVED + 5. 00000000f0000000-00000000f3ffffff: RESERVED + 6. 0000000100000000-000000023fffffff: RAM +Wrote coreboot table at: bdaab000, 0x8c8 bytes, checksum f79a +coreboot table: 2272 bytes. +CBMEM ROOT 0. bdbff000 00001000 +CAR GLOBALS 1. bdbfe000 00001000 +USBDEBUG 2. bdbfd000 00001000 +CONSOLE 3. bdbdd000 00020000 +TIME STAMP 4. bdbdc000 00001000 +ROMSTAGE 5. bdbdb000 00001000 +GDT 6. bdbda000 00001000 +ACPI RESUME 7. bdada000 00100000 +SMP TABLE 8. bdad9000 00001000 +ACPI 9. bdab5000 00024000 +ACPI GNVS 10. bdab4000 00001000 +SMBIOS 11. bdab3000 00001000 +COREBOOT 12. bdaab000 00008000 +BS: Exiting BS_WRITE_TABLES state. +BS: Entering BS_PAYLOAD_LOAD state. +CBFS: located payload @ ff8341b8, 542448 bytes. +Loading segment from rom address 0xff8341b8 + code (compression=1) + New segment dstaddr 0x8200 memsize 0x17e48 srcaddr 0xff83420c filesize 0x83fc + (cleaned up) New segment addr 0x8200 size 0x17e48 offset 0xff83420c filesize 0x83fc +Loading segment from rom address 0xff8341d4 + code (compression=1) + New segment dstaddr 0x100000 memsize 0x201538 srcaddr 0xff83c608 filesize 0x7c2a0 + (cleaned up) New segment addr 0x100000 size 0x201538 offset 0xff83c608 filesize 0x7c2a0 +Loading segment from rom address 0xff8341f0 + Entry Point 0x00008200 +Bounce Buffer at bd862000, 2393460 bytes +Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017e48 filesz: 0x00000000000083fc +lb: [0x0000000000100000, 0x000000000014703c) +Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017e48 filesz: 0x00000000000083fc +using LZMA +[ 0x00008200, 00018717, 0x00020048) <- ff83420c +Clearing Segment: addr: 0x0000000000018717 memsz: 0x0000000000007931 +dest 00008200, end 00020048, bouncebuffer bd862000 +Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000201538 filesz: 0x000000000007c2a0 +lb: [0x0000000000100000, 0x000000000014703c) +segment: [0x0000000000100000, 0x000000000017c2a0, 0x0000000000301538) + bounce: [0x00000000bd862000, 0x00000000bd8de2a0, 0x00000000bda63538) +Post relocation: addr: 0x00000000bd862000 memsz: 0x0000000000201538 filesz: 0x000000000007c2a0 +using LZMA +[ 0xbd862000, bda63538, 0xbda63538) <- ff83c608 +dest bd862000, end bda63538, bouncebuffer bd862000 +move suffix around: from bd8a903c, to 14703c, amount: 1ba4fc +Loaded segments +BS: Exiting BS_PAYLOAD_LOAD state. +BS: Entering BS_PAYLOAD_BOOT state. +ICH7 watchdog disabled +Jumping to boot code at 00008200 +CPU0: stack: 00142000 - 00143000, lowest used address 00142a28, stack used: 1496 bytes +entry = 0x00008200 +lb_start = 0x00100000 +lb_size = 0x0004703c +buffer = 0xbd862000 diff --git a/docs/hardware/text/x200s/cblog02.txt b/docs/hardware/text/x200s/cblog02.txt new file mode 100644 index 00000000..3a590dc2 --- /dev/null +++ b/docs/hardware/text/x200s/cblog02.txt @@ -0,0 +1,77 @@ +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +WARNING: Ignoring S4-assertion-width violation. +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using high performance mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 14 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 15 + Max clock: 533 MHz + CAS: 0x01c0 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +Memory configured in dual-channel assymetric mode. +Memory map: +TOM = 384MB +TOLUD = 384MB +TOUUD = 384MB +REMAP: base = 65535MB + limit = 0MB +usedMEsize: 0MB +Performing Jedec initialization at address 0x00000000. +Performing Jedec initialization at address 0x08000000. +Performing Jedec initialization at address 0x10000000. +Final timings for group 0 on channel 0: 6.1.0.3.2 +Final timings for group 1 on channel 0: 6.0.2.6.3 +Final timings for group 2 on channel 0: 6.1.2.0.1 +Final timings for group 3 on channel 0: 6.1.0.7.3 +Timing under-/overflow during receive-enable calibration. diff --git a/docs/hardware/text/x200s/cblog03.txt b/docs/hardware/text/x200s/cblog03.txt new file mode 100644 index 00000000..d078a48a --- /dev/null +++ b/docs/hardware/text/x200s/cblog03.txt @@ -0,0 +1,158 @@ +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +WARNING: Ignoring S4-assertion-width violation. +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using high performance mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:ff +2:51:b +DDR mask 4, DDR 3 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +DIMMs support 666 MHz, but chipset only runs at up to 533. Limiting... +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +Memory configured in single-channel mode. +Memory map: +TOM = 128MB +TOLUD = 128MB +TOUUD = 128MB +REMAP: base = 65535MB + limit = 0MB +usedMEsize: 0MB +Performing Jedec initialization at address 0x00000000. +Final timings for group 0 on channel 1: 6.0.2.6.4 +Final timings for group 1 on channel 1: 6.0.2.6.4 +Final timings for group 2 on channel 1: 6.0.2.8.3 +Final timings for group 3 on channel 1: 6.0.2.8.6 +Lower bound for byte lane 0 on channel 1: 0.0 +Upper bound for byte lane 0 on channel 1: 10.4 +Final timings for byte lane 0 on channel 1: 5.2 +Lower bound for byte lane 1 on channel 1: 0.0 +Upper bound for byte lane 1 on channel 1: 11.2 +Final timings for byte lane 1 on channel 1: 5.5 +Lower bound for byte lane 2 on channel 1: 0.0 +Upper bound for byte lane 2 on channel 1: 10.5 +Final timings for byte lane 2 on channel 1: 5.2 +Lower bound for byte lane 3 on channel 1: 0.0 +Upper bound for byte lane 3 on channel 1: 9.7 +Final timings for byte lane 3 on channel 1: 4.7 +Timing overflow during read training. +Read training failure: lower bound. +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +Interrupted RAM init, reset required. +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using high performance mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:ff +2:51:b +DDR mask 4, DDR 3 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +DIMMs support 666 MHz, but chipset only runs at up to 533. Limiting... +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Setting IGD memory frequencies for VCO #1. +Memory configured in single-channel mode. +Memory map: +TOM = 128MB +TOLUD = 128MB +TOUUD = 128MB +REMAP: base = 65535MB + limit = 0MB +usedMEsize: 0MB +Performing Jedec initialization at address 0x00000000. +Final timings for group 0 on channel 1: 6.0.2.7.6 +Final timings for group 1 on channel 1: 6.0.2.6.6 +Final timings for group 2 on channel 1: 6.0.2.8.7 +Final timings for group 3 on channel 1: 6.1.0.2.5 +Lower bound for byte lane 0 on channel 1: 0.0 +Upper bound for byte lane 0 on channel 1: 10.3 +Final timings for byte lane 0 on channel 1: 5.1 +Lower bound for byte lane 1 on channel 1: 0.0 +Upper bound for byte lane 1 on channel 1: 11.3 +Final timings for byte lane 1 on channel 1: 5.5 +Lower bound for byte lane 2 on channel 1: 0.0 +Upper bound for byte lane 2 on channel 1: 10.5 +Final timings for byte lane 2 on channel 1: 5.2 +Lower bound for byte lane 3 on channel 1: 0.0 +Upper bound for byte lane 3 on channel 1: 9.6 +Final timings for byte lane 3 on channel 1: 4.7 +Timing overflow during read training. +Read training failure: lower bound. diff --git a/docs/hardware/x200.md b/docs/hardware/x200.md new file mode 100644 index 00000000..9e476cf1 --- /dev/null +++ b/docs/hardware/x200.md @@ -0,0 +1,266 @@ +--- +title: ThinkPad X200 +... + +It is believed that all X200 laptops are compatible. X200S and X200 +Tablet will also work, [depending on the configuration](#x200s). + +It \*might\* be possible to put an X200 motherboard in an X201 chassis, +though this is currently untested by the libreboot project. The same may +also apply between X200S and X201S; again, this is untested. **It's +most likely true.** + +There are two possible flash chip sizes for the X200: 4MiB (32Mbit) or +8MiB (64Mbit). This can be identified by the type of flash chip below +the palmrest: 4MiB is SOIC-8, 8MiB is SOIC-16. + +**The X200 laptops come with the ME (and sometimes AMT in addition) +before flashing libreboot. Libreboot disables and removes it by using a +modified descriptor: see [gm45\_remove\_me.html](gm45_remove_me.html)** +(contains notes, plus instructions) + +Flashing instructions can be found at +[../install/\#flashrom](../install/#flashrom) + +EC update {#ecupdate} +========= + +It is recommended that you update to the latest EC firmware version. The +[EC firmware](../../faq/#firmware-ec) is separate from +libreboot, so we don't actually provide that, but if you still have +Lenovo BIOS then you can just run the Lenovo BIOS update utility, which +will update both the BIOS and EC version. See: + +- [../install/index.html#flashrom](../install/index.html#flashrom) +- <http://www.thinkwiki.org/wiki/BIOS_update_without_optical_disk> + +NOTE: this can only be done when you are using Lenovo BIOS. How to +update the EC firmware while running libreboot is unknown. Libreboot +only replaces the BIOS firmware, not EC. + +Updated EC firmware has several advantages e.g. bettery battery +handling. + +Compatibility (without blobs) {#compatibility_noblobs} +----------------------------- + +### Hardware virtualization (vt-x) {#hwvirt} + +The X200, when run without CPU microcode updates in coreboot, currently +kernel panics if running QEMU with vt-x enabled on 2 cores for the +guest. With a single core enabled for the guest, the guest panics (but +the host is fine). Working around this in QEMU might be possible; if +not, software virtualization should work fine (it's just slower). + +On GM45 hardware (with libreboot), make sure that the *kvm* and +*kvm\_intel* kernel modules are not loaded, when using QEMU. + +The following errata datasheet from Intel might help with investigation: +<http://download.intel.com/design/mobile/specupdt/320121.pdf> + +Anecdotal reports from at least 1 user suggests that some models with +CPU microcode 1067a (on the CPU itself) might work with vt-x in +libreboot. + +X200S and X200 Tablet. {#x200s} +---------------------- + +X200S and X200 Tablet have raminit issues at the time of writing (GS45 +chipset. X200 uses GM45). + +X200S and X200 Tablet are known to work, but only with certain CPU+RAM +configurations. The current stumbling block is RCOMP and SFF, mentioned +in <https://www.cs.cmu.edu/~410/doc/minimal_boot.pdf>. + +The issues mostly relate to raminit (memory initialization). With an +unpatched coreboot, you get the following: +[text/x200s/cblog00.txt](text/x200s/cblog00.txt). No SODIMM combination +that was tested would work. At first glance, it looks like GS45 (chipset +that X200S uses. X200 uses GM45) is unsupported, but there is a +workaround that can be used to make certain models of the X200S work, +depending on the RAM. + +The datasheet for GS45 describes two modes: low-performance and +high-performance. Low performance uses the SU range of ultra-low voltage +procesors (SU9400, for example), and high-performance uses the SL range +of processors (SL9400, for example). According to datasheets, GS45 +behaves very similarly to GM45 when operating in high-performance mode. + +The theory then was that you could simply remove the checks in coreboot +and make it pass GS45 off as GM45; the idea is that, with a +high-performance mode CPU (SL9400, for example) it would just boot up +and work. + +This suspicion was confirmed with the following log: +[text/x200s/cblog01.txt](text/x200s/cblog01.txt). The memory modules in +this case are 2x4GB. ~~**However, not all configurations work: +[text/x200s/cblog02.txt](text/x200s/cblog02.txt) (2x2GB) and +[text/x200s/cblog03.txt](text/x200s/cblog03.txt) (1x2GB) show a failed +bootup.**~~ *False alarm. The modules were mixed (non-matching). X200S +with high-performance mode CPU will work so long as you use matching +memory modules (doesn't matter what size).* + +This was then pushed as a patch for coreboot, which can be found at +<http://review.coreboot.org/#/c/7786/> (libreboot merges this patch in +coreboot-libre now. Check the 'getcb' script in src or git). + +### Proper GS45 raminit {#x200s_raminit} + +A new northbridge gs45 should be added to coreboot, based on gm45, and a +new port x200st (X200S and X200T) should be added based on the x200 +port. + +This port would have proper raminit. Alternatively, gs45 (if raminit is +taken to be the only issue with it) can be part of gm45 northbridge +support (and X200S/Tablet being part of the X200 port) with conditional +checks in the raminit that make raminit work differently (as required) +for GS45. nico\_h and pgeorgi/patrickg in the coreboot IRC channel +should know more about raminit on gm45 and likely gs45. + +pgeorgi recommends to run SerialICE on the factory BIOS (for X200S), +comparing it with X200 (factory BIOS) and X200 (gm45 raminit code in +coreboot), to see what the differences are. Then tweak raminit code +based on that. + +Trouble undocking (button doesn't work) +---------------------------------------- + +This person seems to have a workaround: +<https://github.com/the-unconventional/libreboot-undock> + +LCD compatibility list {#lcd_supported_list} +---------------------- + +LCD panel list (X200 panels listed there): +<http://www.thinkwiki.org/wiki/TFT_display> + +All LCD panels for the X200, X200S and X200 Tablet are known to work. + +### AFFS/IPS panels {#ips} + +#### X200 + +Adapted from +<https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X200> + +Look at wikipedia for difference between TN and IPS panels. IPS have +much better colour/contrast than a regular TN, and will typically have +good viewing angles. + +These seem to be from the X200 tablet. You need to find one without the +glass touchscreen protection on it (might be able to remove it, though). +It also must not have a digitizer on it (again, might be possible to +just simply remove the digitizer). + +- BOE-Hydis HV121WX4-120, HV121WX4-110 or HV121WX4-100 - cheap-ish, + might be hard to find + +- Samsung LTN121AP02-001 - common to find, cheap + +**If your X200 has an LED backlit panel in it, then you also need to get +an inverter and harness cable that is compatible with the CCFL panels. +To see which panel type you have, see +[\#led\_howtotell](#led_howtotell). If you need the inverter/cable, here +are part numbers: 44C9909 for CCFL LVDS cable with bluetooth and camera +connections, and 42W8009 or 42W8010 for the inverter.** + +There are glossy and matte versions of these. Matte means anti-glare, +which is what you want (in this authors opinion). + +Refer to the HMM (hardware maintenance manual) for how to replace the +screen. + +Sources: + +- [ThinkPad Forums - Matte AFFS Panel on + X200](http://forum.thinkpads.com/viewtopic.php?f=2&t=84941) +- [ThinkPad Forums - Parts for X200 AFFS + Mod](http://forum.thinkpads.com/viewtopic.php?p=660662#p660662) +- [ThinkWiki.de - X200 + Displayumbau](http://thinkwiki.de/X200_Displayumbau) + +### X200S + +<http://forum.thinkpads.com/viewtopic.php?p=618928#p618928> explains +that the X200S screens/assemblies are thinner. You need to replace the +whole lid with one from a normal X200/X201. + +How to tell if it has an LED or CCFL? {#led_howtotell} +------------------------------------- + +Some X200s have a CCFL backlight and some have an LED backlight, in +their LCD panel. This also means that the inverters will vary, so you +must be careful if ever replacing either the panel and/or inverter. (a +CCFL inverter is high-voltage and will destroy an LED backlit panel). + +CCFLs contain mercury. An X200 with a CCFL backlight will (****unless it +has been changed to an LED, with the correct inverter. Check with your +supplier!) the following: *"This product contains Lithium Ion Battery, +Lithium Battery and a lamp which contains mercury; dispose according to +local, state or federal laws"* (one with an LED backlit panel will say +something different). + +Hardware register dumps {#regdumps} +----------------------- + +The coreboot wiki +[shows](http://www.coreboot.org/Motherboard_Porting_Guide) how to +collect various logs useful in porting to new boards. Following are +outputs from the X200: + +- BIOS 3.15, EC 1.06 + - [hwdumps/x200/](hwdumps/x200/) + +RAM, S3 and microcode updates {#ram_s3_microcode} +============================= + +Not all memory modules work. Most of the default ones do, but you have +to be careful when upgrading to 8GiB; some modules work, some don't. + +Someone on reddit also did their own research on RAM compatibility: [on +this +post](https://www.reddit.com/r/libreboot/comments/5ax17e/liberated_x200_is_really_picky_with_memory/) + +[This page](http://www.forum.thinkpads.com/viewtopic.php?p=760721) might +be useful for RAM compatibility info (note: coreboot raminit is +different, so this page might be BS) + +pehjota started collecting some steppings for different CPUs on several +X200 laptops. You can get the CPUID by running:\ +\$ **dmesg | sed -n 's/\^.\* microcode: CPU0 +sig=0x\\(\[\^,\]\*\\),.\*\$/\\1/p'** + +What pehjota wrote: The laptops that have issues resuming from suspend, +as well as a laptop that (as I mentioned earlier in \#libreboot) won't +boot with any Samsung DIMMs, all have CPUID 0x10676 (stepping M0). + +What pehjota wrote: Laptops with CPUID 0x167A (stepping R0) resume +properly every time and work with Samsung DIMMs. I'll need to do more +testing on more units to better confirm these trends, but it looks like +the M0 microcode is very buggy. That would also explain why I didn't +have issues with Samsung DIMMs with the Lenovo BIOS (which would have +microcode updates). I wonder if VT-x works on R0. + +What pehjota wrote: As I said, 10676 is M0 and 1067A is R0; those are +the two CPUIDs and steppings for Intel Core 2 Duo P8xxx CPUs with +factory microcode. (1067 is the family and model, and 6 or A is the +stepping ID.) + +**TODO: check the CPUIDs and test S3 resume and/or KVM on any C2D +systems (including non-P8xxx ones, which I don't have here) you have +available. I'd be curious if you could confirm these results.** It +might not be coreboot that's buggy with raminit/S3; it might just be +down to the microcode updates. + +Unsorted notes {#unsorted} +-------------- + + <sgsit> do you know if it's possible to flash thinkpads over the LPC debug connector at the front edge? + <sgsit> that would make life much easier for systems like this + <sgsit> all the Wistron manufactured systems have this thing called a "golden finger", normally at the front edge of the board + <sgsit> you can plug a board in which gives diagnostic codes but i'm wondering whether it is capable of more + <sgsit> http://www.endeer.cz/bios.tools/bios.html + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ +Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>\ +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) |
