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author | Francis Rowe <info@gluglug.org.uk> | 2015-10-13 00:14:44 +0100 |
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committer | Francis Rowe <info@gluglug.org.uk> | 2015-10-13 00:14:44 +0100 |
commit | f44162ed052f6377040ad5cbd3bfc4e164a48b0e (patch) | |
tree | dfb519f095d33b9334438d4709efc02d63e3504e /docs/hcl/c201.html | |
parent | 9b0a8f155e2aac5dce148585e7e590ed444e05ee (diff) | |
download | librebootfr-f44162ed052f6377040ad5cbd3bfc4e164a48b0e.tar.gz librebootfr-f44162ed052f6377040ad5cbd3bfc4e164a48b0e.zip |
docs/hcl/c201.html: clarify that microcode on x86 is read-only
Diffstat (limited to 'docs/hcl/c201.html')
-rw-r--r-- | docs/hcl/c201.html | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/docs/hcl/c201.html b/docs/hcl/c201.html index 2f6947c5..b3b6c4fc 100644 --- a/docs/hcl/c201.html +++ b/docs/hcl/c201.html @@ -163,8 +163,9 @@ <p> Unlike x86 (e.g. Intel/AMD) CPUs, ARM CPUs do not use microcode, not even built in. On the Intel/AMD based libreboot systems, there is still microcode in the CPU - (not considered problematic by the FSF, since it's part of the hardware), but we - exclude microcode updates, which are proprietary software. + (not considered problematic by the FSF, since it's part of the hardware and read-only), but we + exclude microcode updates (volatile updates which are uploaded at boot time by the boot firmware, + if present), which are proprietary software. </p> <p> On ARM CPUs, the instruction set is implemented in circuitry, without microcode. |