diff options
| author | Alyssa Rosenzweig <alyssa@rosenzweig.io> | 2017-03-20 20:26:48 -0700 |
|---|---|---|
| committer | Alyssa Rosenzweig <alyssa@rosenzweig.io> | 2017-03-20 20:26:48 -0700 |
| commit | a62fe03d3e84150e6186f57f53029d5a9abe3d7b (patch) | |
| tree | 1a1276b32fcc5388165bd42b685c0d9e83380a7b /docs/hcl | |
| parent | 07da8fb0c7d513bc73470b69be99f1add0cb95e5 (diff) | |
| download | librebootfr-a62fe03d3e84150e6186f57f53029d5a9abe3d7b.tar.gz librebootfr-a62fe03d3e84150e6186f57f53029d5a9abe3d7b.zip | |
undo breakages
Diffstat (limited to 'docs/hcl')
| -rw-r--r-- | docs/hcl/c201.md | 37 | ||||
| -rw-r--r-- | docs/hcl/d510mo.md | 7 | ||||
| -rw-r--r-- | docs/hcl/d945gclf.md | 64 | ||||
| -rw-r--r-- | docs/hcl/ga-g41m-es2l.md | 12 | ||||
| -rw-r--r-- | docs/hcl/gm45_remove_me.md | 105 | ||||
| -rw-r--r-- | docs/hcl/imac52.md | 7 | ||||
| -rw-r--r-- | docs/hcl/index.md | 112 | ||||
| -rw-r--r-- | docs/hcl/kcma-d8.md | 27 | ||||
| -rw-r--r-- | docs/hcl/kfsn4-dre.md | 23 | ||||
| -rw-r--r-- | docs/hcl/kgpe-d16.md | 35 | ||||
| -rw-r--r-- | docs/hcl/r400.md | 17 | ||||
| -rw-r--r-- | docs/hcl/t400.md | 19 | ||||
| -rw-r--r-- | docs/hcl/t500.md | 26 | ||||
| -rw-r--r-- | docs/hcl/x200.md | 49 |
14 files changed, 368 insertions, 172 deletions
diff --git a/docs/hcl/c201.md b/docs/hcl/c201.md index 24332b14..afc97bf0 100644 --- a/docs/hcl/c201.md +++ b/docs/hcl/c201.md @@ -1,4 +1,6 @@ -% ASUS Chromebook C201 + +ASUS Chromebook C201 +==================== This is a Chromebook, using the Rockchip RK3288 SoC. It uses an ARM CPU, and has free EC firmware (unlike some other laptops). More RK3288-based @@ -12,10 +14,12 @@ instructions. The board is supported in libreboot, however, and has been confirmed to work.** Flashing instructions can be found at -[../install/#flashrom](../install/#flashrom) +[../install/\#flashrom](../install/#flashrom) [Back to previous index](./). + + - [Google's intent with CrOS devices](#googlesintent) - [Considerations about ChromeOS and free operating systems](#os) - [Caution: Video acceleration requires a non-free blob, software @@ -27,6 +31,8 @@ Flashing instructions can be found at - [Depthcharge payload](#depthcharge) - [Flash chip write protection: the screw](#thescrew) + + Google's intent with CrOS devices {#googlesintent} ================================== @@ -56,6 +62,10 @@ are supported in libreboot. Those laptops are supported, in spite of Apple and Lenovo, companies which are actually *hostile* to the free software movement. +[Back to top of page](#pagetop). + + + Considerations about ChromeOS and free operating systems {#os} ======================================================== @@ -76,6 +86,10 @@ install Debian. TODO: instructions for Devuan +[Back to top of page](#pagetop). + + + Caution: Video acceleration requires a non-free blob, software rendering can be used instead. {#videoblobs} ============================================================================================= @@ -95,6 +109,10 @@ The Tamil developer wrote this blog post, which sheds light on the story: [http://libv.livejournal.com/27461.html,http://libv.livejournal.com/27461.html](http://libv.livejournal.com/27461.html). +[Back to top of page](#pagetop). + + + Caution: WiFi requires a non-free blob, a USB dongle can be used instead. {#wifiblobs} ========================================================================= @@ -103,7 +121,7 @@ require non-free firmware in the Linux kernel in order to work. The libreboot project recommends using an external USB wifi dongle that works with free software. See -[#recommended\_wifi](./#recommended_wifi). +[\#recommended\_wifi](./#recommended_wifi). There are 2 companies (endorsed by Creative Commons, under their *Respects your Freedom* guidelines), that sell USB WiFi dongles @@ -120,6 +138,8 @@ These wifi dongles use the AR9271 (atheros) chipset, supported by the free *ath9k\_htc* driver in the Linux kernel. They work in *linux-libre* too. + + EC firmware is free software! {#ec} ============================= @@ -135,6 +155,8 @@ when using one of these laptops. The libreboot FAQ briefly describes what an *EC* is: <http://libreboot.org/faq/#firmware-ec> + + No microcode! {#microcode} ============= @@ -149,6 +171,10 @@ present), which are proprietary software. On ARM CPUs, the instruction set is implemented in circuitry, without microcode. +[Back to top of page](#pagetop). + + + Depthcharge payload {#depthcharge} =================== @@ -156,6 +182,8 @@ These systems do not use the GRUB payload. Instead, they use a payload called depthcharge, which is common on CrOS devices. This is free software, maintained by Google. + + Flash chip write protection: the screw {#thescrew} ====================================== @@ -179,8 +207,9 @@ firmware-level *evil maid* attack. It's possible to write protect on all current libreboot systems, but CrOS devices make it easy. The screw is such a stupidly simple idea, which all designs should implement. -Copyright © 2015 Leah Rowe <info@minifree.org> + +Copyright © 2015 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/d510mo.md b/docs/hcl/d510mo.md index 7b155c39..f8d950d7 100644 --- a/docs/hcl/d510mo.md +++ b/docs/hcl/d510mo.md @@ -1,4 +1,6 @@ -% Intel D510MO desktop board + +Intel D510MO desktop board +========================== This is a desktop board using intel hardware (circa \~2009, ICH7 southbridge, similar performance-wise to the Libreboot X200. It can make @@ -11,8 +13,9 @@ This board can however be used for building a headless server. Flashing instructions can be found at [../install/d510mo.html](../install/d510mo.html) -Copyright © 2016 Leah Rowe <info@minifree.org> + +Copyright © 2016 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/d945gclf.md b/docs/hcl/d945gclf.md index ebb22e0a..a537996c 100644 --- a/docs/hcl/d945gclf.md +++ b/docs/hcl/d945gclf.md @@ -1,4 +1,6 @@ -% Intel D945GCLF desktop board + +Intel D945GCLF desktop board +============================ [Back to previous index](https://libreboot.org/docs/hcl/) @@ -37,63 +39,47 @@ Remarks about vendor bios: flashing to install libreboot on this device. Once libreboot is flashed there is no problem to update the firmware internally -Here is an image of the board: - - - -Here is an image of the D945GCLF2 board: - -{width="80%" height="80%"} +Here is an image of the board:\ +\ +Here is an image of the D945GCLF2 board:\ +{width="80%" height="80%"}\ +And SPI SOIC8 flash chip\ +{width="50%" height="50%"} -And SPI SOIC8 flash chip -{width="50%" height="50%"} How to replace thermal paste and fan ------------------------------------ This board comes with very crappy disposable loud fan, that one has no bearings, which can not be repaired or oiled properly, do not waste your -time trying to fix it, just buy one chinese same size fan - +time trying to fix it, just buy one chinese same size fan\ {width="50%" height="50%"} -{width="50%" height="50%"} - -Make sure that new one has same wiring - -{width="50%" height="50%"} - -This is a new one, with bearing and maintenable - +{width="50%" height="50%"}\ +Make sure that new one has same wiring\ +{width="50%" height="50%"}\ +This is a new one, with bearing and maintenable\ {width="50%" height="50%"} -{width="50%" height="50%"} - +{width="50%" height="50%"}\ Now remove the both coolers rotating them a bit, slowly, then clean both -silicons and both coolers (removing cmos battery first is recommended) - -{width="50%" height="50%"} - +silicons and both coolers (removing cmos battery first is recommended)\ +{width="50%" height="50%"}\ Put a little bit of non conductive thermal paste on both silicons (only -cpu silicon iis shown on that image) - -{width="50%" height="50%"} +cpu silicon iis shown on that image)\ +{width="50%" height="50%"}\ Before assembling new fan, some need new longer screws, make sure having -these (on the left is original one, too short for new fan) - -{width="50%" height="50%"} - -After that, assemble your new fan into CPU cooler - -{width="50%" height="50%"} - +these (on the left is original one, too short for new fan)\ +{width="50%" height="50%"}\ +After that, assemble your new fan into CPU cooler\ +{width="50%" height="50%"}\ Finally assemle both coolers on both chips, do not forget put in the CPU fan connector back, and you are done. -Copyright © 2016 Arthur Heymans <arthur@aheymans.xyz> -Copyright © 2016 Vitaly Castaño Solana <vita\_cell@hotmail.com> +Copyright © 2016 Arthur Heymans <arthur@aheymans.xyz>\ +Copyright © 2016 Vitaly Castaño Solana <vita\_cell@hotmail.com>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/ga-g41m-es2l.md b/docs/hcl/ga-g41m-es2l.md index b7291245..ef3b7bd3 100644 --- a/docs/hcl/ga-g41m-es2l.md +++ b/docs/hcl/ga-g41m-es2l.md @@ -1,4 +1,6 @@ -% Gigabyte GA-G41M-ES2L desktop board + +Gigabyte GA-G41M-ES2L desktop board +=================================== This is a desktop board using intel hardware (circa \~2009, ICH7 southbridge, similar performance-wise to the Libreboot X200. It can make @@ -9,15 +11,15 @@ using an IDE SATA adapter. The SATA ports do work. You need to set a custom MAC address in GNU+Linux for the NIC to work. In /etc/network/interfaces on debian-based systems like Debian or -Devuan, this would be in the entry for your NIC: - +Devuan, this would be in the entry for your NIC:\ hwaddress ether macaddressgoeshere Flashing instructions can be found at -[../install/#flashrom](../install/#flashrom) +[../install/\#flashrom](../install/#flashrom) + -Copyright © 2016 Leah Rowe <info@minifree.org> +Copyright © 2016 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/gm45_remove_me.md b/docs/hcl/gm45_remove_me.md index 5fc8371b..58a4638e 100644 --- a/docs/hcl/gm45_remove_me.md +++ b/docs/hcl/gm45_remove_me.md @@ -1,4 +1,6 @@ -% GM45 chipsets: remove the ME (manageability engine) + +GM45 chipsets: remove the ME (manageability engine) +=================================================== This sections relates to disabling and removing the ME (Intel **M**anagement **E**ngine) on GM45. This was originally done on the @@ -26,6 +28,8 @@ Another project recently found: <http://io.smashthestack.org/me/> [Back to previous index](./). + + ICH9 gen utility {#ich9gen} ================ @@ -36,13 +40,11 @@ factory.bin dump. ich9gen executables can be found under ./ich9deblob/ statically compiled in libreboot\_util. If you are using src or git, build ich9gen from -source with: - - $ ./oldbuild module ich9deblob +source with:\ +\$ **./oldbuild module ich9deblob**\ The executable will appear under resources/utilities/ich9deblob/ -Run: - +Run:\ \$ **./ich9gen** Running ich9gen this way (without any arguments) generates a default @@ -68,9 +70,8 @@ the little sticker on the bottom/base of the laptop. On GM45 laptops that use flash descriptors, the MAC address or the onboard ethernet chipset is flashed (inside the ROM image). You should generate a descriptor+gbe image with your own MAC address inside (with -the Gbe checksum updated to match). Run: - - $ ./ich9gen \--macaddress XX:XX:XX:XX:XX:XX +the Gbe checksum updated to match). Run:\ +\$ **./ich9gen \--macaddress XX:XX:XX:XX:XX:XX**\ (replace the XX chars with the hexadecimal chars in the MAC address that you want) @@ -85,25 +86,19 @@ Two new files will be created: Assuming that your libreboot image is named **libreboot.rom**, copy the file to where **libreboot.rom** is located and then insert the -descriptor+gbe file into the ROM image. - -For 16MiB flash chips: - +descriptor+gbe file into the ROM image.\ +For 16MiB flash chips:\ \$ **dd if=ich9fdgbe\_16m.bin of=libreboot.rom bs=1 count=12k -conv=notrunc** - -For 8MiB flash chips: - +conv=notrunc**\ +For 8MiB flash chips:\ \$ **dd if=ich9fdgbe\_8m.bin of=libreboot.rom bs=1 count=12k -conv=notrunc** - -For 4MiB flash chips: - +conv=notrunc**\ +For 4MiB flash chips:\ \$ **dd if=ich9fdgbe\_4m.bin of=libreboot.rom bs=1 count=12k -conv=notrunc** +conv=notrunc**\ Your libreboot.rom image is now ready to be flashed on the system. Refer -back to [../install/#flashrom](../install/#flashrom) for how to flash +back to [../install/\#flashrom](../install/#flashrom) for how to flash it. Write-protecting the flash chip @@ -130,13 +125,13 @@ for the following lines: NOTE: When you write-protect the flash chip, re-flashing is no longer possible unless you use dedicated external equipment, which also means disassembling the laptop. The same equipment can also be used to remove -the write-protection later on, if you choose to do so. *Only* +the write-protection later on, if you choose to do so. \*Only\* write-protect the chip if you have the right equipment for external flashing later on; for example, see [../install/bbb\_setup.html](../install/bbb_setup.html). Change them all to 0x0, then re-compile ich9gen. After you have done -that, follow the notes in [#ich9gen](#ich9gen) to generate a new +that, follow the notes in [\#ich9gen](#ich9gen) to generate a new descriptor+gbe image and insert that into your ROM image, then flash it. The next time you boot, the flash chip will be read-only in software (hardware re-flashing will still work, which you will need for @@ -150,6 +145,8 @@ brick your laptop. For external flashing guides, refer to [../install/](../install/). + + ICH9 deblob utility {#ich9deblob} =================== @@ -168,9 +165,8 @@ regions for your libreboot ROM image. If you are working with libreboot\_src (or git), you can find the source under resources/utilities/ich9deblob/ and will already be compiled if you ran **./oldbuild module all** or **./oldbuild module ich9deblob** -from the main directory (./), otherwise you can build it like so: - - $ ./oldbuild module ich9deblob +from the main directory (./), otherwise you can build it like so:\ +\$ **./oldbuild module ich9deblob**\ An executable file named **ich9deblob** will now appear under resources/utilities/ich9deblob/ @@ -181,8 +177,7 @@ GNU+Linux) under ./ich9deblob/. Place the factory.rom from your system (can be obtained using the external flashing guides for GM45 targets linked [../install/](../install/)) in the directory where you have your -ich9deblob executable, then run the tool: - +ich9deblob executable, then run the tool:\ \$ **./ich9deblob** A 12kiB file named **deblobbed\_descriptor.bin** will now appear. **Keep @@ -199,8 +194,7 @@ Intel. Only the Intel NICs need a GbE region in the flash chip. Assuming that your libreboot image is named **libreboot.rom**, copy the **deblobbed\_descriptor.bin** file to where **libreboot.rom** is located -and then run: - +and then run:\ \$ **dd if=deblobbed\_descriptor.bin of=libreboot.rom bs=1 count=12k conv=notrunc** @@ -224,9 +218,11 @@ need for a factory.rom dump! You should now have a **libreboot.rom** image containing the correct 4K descriptor and 8K gbe regions, which will then be safe to flash. Refer -back to [../install/#flashrom](../install/#flashrom) for how to flash +back to [../install/\#flashrom](../install/#flashrom) for how to flash it. + + demefactory utility {#demefactory} =================== @@ -237,24 +233,21 @@ The ME interferes with flash read/write in flashrom, and the default descriptor locks some regions. The idea is that doing this will remove all of those restrictions. -Simply run (with factory.rom in the same directory): - +Simply run (with factory.rom in the same directory):\ \$ **./demefactory** It will generate a 4KiB descriptor file (only the descriptor, no GbE). Insert that into a factory.rom image (NOTE: do this on a copy of it. -Keep the original factory.rom stored safely somewhere): - +Keep the original factory.rom stored safely somewhere):\ \$ **dd if=demefactory\_4kdescriptor.bin of=factory\_nome.rom bs=1 count=4k conv=notrunc** -TODO: test this. - +TODO: test this.\ TODO: lenovobios (GM45 thinkpads) still write-protects parts of the flash. Modify the assembly code inside. Note: the factory.rom (BIOS region) from lenovobios is in a compressed format, which you have to extract. bios\_extract upstream won't work, but the following was said -in #coreboot on freenode IRC: +in \#coreboot on freenode IRC: <roxfan> vimuser: try bios_extract with ffv patch http://patchwork.coreboot.org/patch/3444/ <roxfan> or https://github.com/coreboot/bios_extract/blob/master/phoenix_extract.py @@ -271,11 +264,14 @@ disassemble and re-flash externally unless you brick the device. demefactory is part of the ich9deblob src, found at *resources/utilities/ich9deblob/* + + The sections below are adapted from (mostly) IRC logs related to early development getting the ME removed on GM45. They are useful for background information. This could not have been done without sgsit's help. + Early notes {#early_notes} ----------- @@ -298,6 +294,10 @@ Early notes {#early_notes} what the X201 uses: <http://www.intel.co.uk/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf> + + + + Flash chips {#flashchips} ----------- @@ -305,8 +305,7 @@ Flash chips {#flashchips} <http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006075.pdf> **~~- Page 20 and page 9 refer to SDA\_HDO or SDA\_HDOUT~~** only on series 6 or higher chipsets. ICH9-M (X200) does it with a strap - connected to GPIO33 pin (see IRC notes below) - + connected to GPIO33 pin (see IRC notes below)\ - According to page 29, the X200 can have any of the following flash chips: - ATMEL AT26DF321-SU 72.26321.A01 - this is a 32Mb (4MiB) chip @@ -322,9 +321,13 @@ Flash chips {#flashchips} - Schematics for X200s laptop: <http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006104.pdf>. + + + Early development notes {#early_development_notes} ----------------------- + Start (hex) End (hex) Length (hex) Area Name ----------- --------- ------------ --------- 00000000 003FFFFF 00400000 Flash Image @@ -392,6 +395,8 @@ X200. End justified means, and the utility is no longer needed since the ich9deblob utility (documented on this page) can now be used to create deblobbed descriptors. + + GBE (gigabit ethernet) region in SPI flash {#gbe_region} ------------------------------------------ @@ -401,6 +406,7 @@ documented in this public datasheet: The only actual content found was: + 00 1F 1F 1F 1F 1F 00 08 FF FF 83 10 FF FF FF FF 08 10 FF FF C3 10 EE 20 AA 17 F5 10 86 80 00 00 01 0D 00 00 00 00 05 06 20 30 00 0A 00 00 8B 8D @@ -417,12 +423,13 @@ The first part is the MAC address set to all 0x1F. It's repeated haly way through the 8K area, and the rest is all 0xFF. This is all documented in the datasheet. -The GBe region starts at 0x20A000 bytes from the *end* of a factory +The GBe region starts at 0x20A000 bytes from the \*end\* of a factory image and is 0x2000 bytes long. In libreboot (deblobbed) the descriptor is set to put gbe directly after the initial 4K flash descriptor. So the first 4K of the ROM is the descriptor, and then the next 8K is the gbe region. + ### GBE region: change MAC address {#gbe_region_changemacaddress} According to the datasheet, it's supposed to add up to 0xBABA but can @@ -433,7 +440,7 @@ actually be others on the X200. 0xBABA"* In honour of the song *Baba O'Reilly* by *The Who* apparently. We're -not making this stuff up... +not making this stuff up\... 0x3ABA, 0x34BA, 0x40BA and more have been observed in the main Gbe regions on the X200 factory.rom dumps. The checksums of the backup @@ -442,7 +449,7 @@ regions match BABA, however. By default, the X200 (as shipped by Lenovo) actually has an invalid main gbe checksum. The backup gbe region is correct, and is what these systems default to. Basically, you should do what you need on the -*backup* gbe region, and then correct the main one by copying from the +\*backup\* gbe region, and then correct the main one by copying from the backup. Look at resources/utilities/ich9deblob/ich9deblob.c. @@ -452,6 +459,9 @@ Look at resources/utilities/ich9deblob/ich9deblob.c. to 0xBABA. In other words, the checksum is 0xBABA minus the total of the first 0x3E 16bit numbers (unsigned), ignoring any overflow. + + + Flash descriptor region {#flash_descriptor_region} ----------------------- @@ -515,6 +525,8 @@ So, *x << 12 = address* If it's in descriptor mode, then the first 4 bytes will be 5A A5 F0 0F. + + platform data partition in boot flash (factory.rom / lenovo bios) {#platform_data_region} ----------------------------------------------------------------- @@ -526,8 +538,9 @@ This is a 32K region from the factory image. It could be data It has only a 448 byte fragment different from 0x00 or 0xFF. -Copyright © 2014, 2015 Leah Rowe <info@minifree.org> + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/imac52.md b/docs/hcl/imac52.md index f9266c6c..5ce29929 100644 --- a/docs/hcl/imac52.md +++ b/docs/hcl/imac52.md @@ -1,9 +1,12 @@ -% Apple iMac 5,2 + +Apple iMac 5,2 +============== Information to be written soon, but this board is merged in libreboot. -Copyright © 2016 Leah Rowe <info@minifree.org> + +Copyright © 2016 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/index.md b/docs/hcl/index.md index ec85fdbb..57ad4238 100644 --- a/docs/hcl/index.md +++ b/docs/hcl/index.md @@ -1,4 +1,6 @@ -% Hardware compatibility list + +Hardware compatibility list +=========================== This sections relates to known hardware compatibility in libreboot. @@ -15,6 +17,8 @@ This sections relates to known hardware compatibility in libreboot. [Back to previous index](../). + + List of supported hardware {#supported_list} -------------------------- @@ -58,6 +62,10 @@ working). There may be exceptions; in other words, this is a list of It is also possible to build ROM images (from source) for other systems (and virtual systems, e.g. QEMU). +[Back to top of page](#pagetop) + + + EC update on i945 (X60, T60) and GM45 (X200, T400, T500, R400) {#ecupdate} ============================================================== @@ -77,20 +85,26 @@ only replaces the BIOS firmware, not EC. Updated EC firmware has several advantages e.g. bettery battery handling. +[Back to top of page](#pagetop) + + + How to find what EC version you have (i945/GM45) {#ecversion} ================================================ -In GNU+Linux, you can try this: - +In GNU+Linux, you can try this:\ **grep 'at EC' /proc/asound/cards** -Sample output: - +Sample output:\ **ThinkPad Console Audio Control at EC reg 0x30, fw 7WHT19WW-3.6** 7WHT19WW is the version in different notation, use search engine to find out regular version - in this case it's a 1.06 for x200 tablet +[Back to top of page](#pagetop) + + + Recommended wifi chipsets {#recommended_wifi} ------------------------- @@ -109,6 +123,10 @@ project if these work with linux-libre kernel (TODO: test): - \[0200\]: Qualcomm Atheros AR242x / AR542x Wireless Network Adapter (PCI-Express) \[168c:001c\] +[Back to top of page](#pagetop) + + + List of supported ThinkPad X60s {#supported_x60_list} ------------------------------- @@ -118,12 +136,12 @@ BIOS](https://en.wikipedia.org/wiki/Video_BIOS)' or 'VBIOS'), all known LCD panels are currently compatible: To find what LCD panel you have, see: -[../misc/#get\_edid\_panelname](../misc/#get_edid_panelname). +[../misc/\#get\_edid\_panelname](../misc/#get_edid_panelname). -- TMD-Toshiba LTD121ECHB: # -- CMO N121X5-L06: # -- Samsung LTN121XJ-L07: # -- BOE-Hydis HT121X01-101: # +- TMD-Toshiba LTD121ECHB: \# +- CMO N121X5-L06: \# +- Samsung LTN121XJ-L07: \# +- BOE-Hydis HT121X01-101: \# You can remove an X61/X61s motherboard from the chassis and install an X60/X60s motherboard in it's place (for flashing libreboot). The @@ -135,10 +153,12 @@ at all without proprietary firmware, and while Lenovo BIOS is running the system will refuse to boot if you replace the card. Fortunately it is very easily replaced; just remove the card and install another one **after** libreboot is installed. See -[#recommended\_wifi](#recommended_wifi) for replacements. +[\#recommended\_wifi](#recommended_wifi) for replacements. [Back to top of page.](#pagetop) + + List of supported ThinkPad X60 Tablets {#supported_x60t_list} -------------------------------------- @@ -147,7 +167,7 @@ proprietary VGA Option ROM ('[Video BIOS](https://en.wikipedia.org/wiki/Video_BIOS)' or 'VBIOS'). To find what LCD panel you have, see: -[../misc/#get\_edid\_panelname](../misc/#get_edid_panelname). +[../misc/\#get\_edid\_panelname](../misc/#get_edid_panelname). There are 5 known LCD panels for the X60 Tablet: @@ -174,7 +194,7 @@ work at all without proprietary firmware, and while Lenovo BIOS is running the system will refuse to boot if you replace the card. Fortunately it is very easily replaced; just remove the card and install another one **after** libreboot is installed. See -[#recommended\_wifi](#recommended_wifi) for replacements. +[\#recommended\_wifi](#recommended_wifi) for replacements. A user with a X60T that has digitizer+finger support, reported that they could get finger input working. They used linuxwacom at git tag @@ -183,7 +203,7 @@ could get finger input working. They used linuxwacom at git tag # Now, for some reason (probably a bug in linuxwacom), # the 'Touch=on' directive gets reset to 'off'. # So you'll need to do - # \$ xsetwacom --set WTouch Touch on + # $ xsetwacom --set WTouch Touch on # # tested with linuxwacom git 42a42b2a8636abc9e105559e5dea467163499de7 @@ -201,16 +221,16 @@ could get finger input working. They used linuxwacom at git tag Identifier "WTouch" Driver "wacom" Option "Device" "/dev/ttyS0" - #Option "DebugLevel" "12" + # Option "DebugLevel" "12" Option "BaudRate" "38400" Option "Type" "touch" Option "Touch" "on" Option "Gesture" "on" Option "ForceDevice" "ISDV4" - #Option "KeepShape" "on" + # Option "KeepShape" "on" Option "Mode" "Absolute" Option "RawSample" "2" - #Option "TPCButton" "off" + # Option "TPCButton" "off" Option "TopX" "17" Option "TopY" "53" Option "BottomX" "961" @@ -225,6 +245,8 @@ could get finger input working. They used linuxwacom at git tag [Back to top of page.](#pagetop) + + Supported T60 list {#supported_t60_list} ------------------ @@ -233,10 +255,10 @@ proprietary VGA Option ROM ('[Video BIOS](https://en.wikipedia.org/wiki/Video_BIOS)' or 'VBIOS'). To find what LCD panel you have, see: -[../misc/#get\_edid\_panelname](../misc/#get_edid_panelname). +[../misc/\#get\_edid\_panelname](../misc/#get_edid_panelname). **Some T60s have ATI GPUs, and all T60P laptops have ATI GPUs These are -incompatible! See [#t60\_ati\_intel](#t60_ati_intel) for how to remedy +incompatible! See [\#t60\_ati\_intel](#t60_ati_intel) for how to remedy this.** Tested LCD panels: **working(compatible)** @@ -253,8 +275,9 @@ Tested LCD panels: **working(compatible)** - BOE-Hydis HV150UX1-100 (15.1" 1600x1200) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) + Tested LCD panels: **not working yet (incompatible; see -[../future/#lcd\_i945\_incompatibility](../future/#lcd_i945_incompatibility))** +[../future/\#lcd\_i945\_incompatibility](../future/#lcd_i945_incompatibility))** - Samsung LTN141XA-L01 (14.1" 1024x768) - LG-Philips LP150X09 (15.1" 1024x768) @@ -269,6 +292,8 @@ Tested LCD panels: **not working yet (incompatible; see GNU+Linux works) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) + + *The following LCD panels are **UNTESTED**. If you have one of these panels then please submit a report!*: @@ -300,10 +325,13 @@ at all without proprietary firmware, and while Lenovo BIOS is running the system will refuse to boot if you replace the card. Fortunately it is very easily replaced; just remove the card and install another one **after** libreboot is installed. See -[#recommended\_wifi](#recommended_wifi) for replacements. +[\#recommended\_wifi](#recommended_wifi) for replacements. + [Back to top of page.](#pagetop) + + ThinkPad T60 (ATI GPU) and ThinkPad T60 (Intel GPU) differences. {#t60_ati_intel} ---------------------------------------------------------------- @@ -324,8 +352,8 @@ cannot be used with libreboot under any circumstances. The following T60 motherboard (see area highlighted in white) shows an empty space where the ATI GPU would be (this particular motherboard has -an Intel GPU): - +an Intel GPU):\ +\  The reason that the ATI GPU on T60 is unsupported is due to the VBIOS @@ -335,8 +363,7 @@ work in libreboot. The 'Video BIOS' is what initializes graphics. -See: <https://en.wikipedia.org/wiki/Video_BIOS>. - +See: <https://en.wikipedia.org/wiki/Video_BIOS>.\ In fact, lack of free VBIOS in general is a big problem in coreboot, and is one reason (among others) why many ports for coreboot are unsuitable for libreboot's purpose. @@ -349,6 +376,8 @@ server setup (with serial and/or ssh console as the display). [Back to top of page.](#pagetop) + + Information about the macbook1,1 {#macbook11} -------------------------------- @@ -357,7 +386,7 @@ same i945 chipset as the ThinkPad X60/T60. A developer ported the [MacBook2,1](#macbook21) to coreboot, the ROM images also work on the macbook1,1. -You can refer to [#macbook21](#macbook21) for most of this. Macbook2,1 +You can refer to [\#macbook21](#macbook21) for most of this. Macbook2,1 laptops come with Core 2 Duo processors which support 64-bit operating systems (and 32-bit). The MacBook1,1 uses Core Duo processors (supports 32-bit OS but not 64-bit), and it is believed that this is the only @@ -367,6 +396,7 @@ It is believed that all models are compatible, listed here: - <http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook1,1> + ### Compatible models Specifically (Order No. / Model No. / CPU): @@ -375,12 +405,13 @@ Specifically (Order No. / Model No. / CPU): - MA254LL/A / A1181 (EMC 2092) / Core Duo T2400 **(tested - working)** - MA472LL/A / A1181 (EMC 2092) / Core Duo T2500 (untested) + Also of interest: -[../git/#config\_macbook21](../git/#config_macbook21). +[../git/\#config\_macbook21](../git/#config_macbook21). Unbricking: [this page shows disassembly guides](https://www.ifixit.com/Device/MacBook_Core_2_Duo) and mono's -page (see [#macbook21](#macbook21)) shows the location of the SPI flash +page (see [\#macbook21](#macbook21)) shows the location of the SPI flash chip on the motherboard. [How to remove the motherboard](https://www.ifixit.com/Guide/MacBook+Core+2+Duo+PRAM+Battery+Replacement/529). @@ -391,6 +422,8 @@ refer to [../install/bbb\_setup.html](../install/bbb_setup.html). [Back to top of page.](#pagetop) + + Information about the macbook2,1 {#macbook21} -------------------------------- @@ -405,12 +438,10 @@ Referenced below are copies (up to date at the time of writing, the macbook2,1. They are included here in case the main site goes down for whatever reason, since they include a lot of useful information. -Backups created using wget: - - $ wget -m -p -E -k -K -np http://macbook.donderklumpen.de/ +Backups created using wget:\ +**\$ wget -m -p -E -k -K -np http://macbook.donderklumpen.de/**\ **\$ wget -m -p -E -k -K -np -http://macbook.donderklumpen.de/coreboot/** - +http://macbook.donderklumpen.de/coreboot/**\ Use **-e robots=off** if using this trick for other sites and the site restricts using robots.txt @@ -420,6 +451,7 @@ distribute them, but I need to ask this person to tell me what license these works fall under first. Otherwise, the above URLs should be fine. NOTE TO SELF: REMOVE THIS WHEN DONE** + ### Installing GNU+Linux distributions (on Apple EFI firmware) - [Parabola GNU+Linux installation on a macbook2,1 with Apple EFI @@ -433,17 +465,23 @@ hold Alt/Control once more. The installation (on the HDD) will once again be seen as 'Windows'. (it's not actually Windows, but Apple likes to think that Apple and Microsoft are all that exist.) Now to install libreboot, follow -[../install/#flashrom\_macbook21](../install/#flashrom_macbook21). +[../install/\#flashrom\_macbook21](../install/#flashrom_macbook21). + + ### Information about coreboot - [Coreboot on the macbook2,1](#) (this is a copy of Mono's page, see above) + + ### coreboot wiki page - <https://www.coreboot.org/Board:apple/macbook21> + + ### Compatible models It is believed that all models are compatible, listed here: @@ -463,8 +501,9 @@ Specifically (Order No. / Model No. / CPU): - MB062LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7400 **(tested - working)** + Also of interest: -[../git/#config\_macbook21](../git/#config_macbook21). +[../git/\#config\_macbook21](../git/#config_macbook21). Unbricking: [this page shows disassembly guides](https://www.ifixit.com/Device/MacBook_Core_2_Duo) and mono's @@ -551,8 +590,9 @@ libreboot git repository. [Back to top of page.](#pagetop) -Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org> + +Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/kcma-d8.md b/docs/hcl/kcma-d8.md index fd91724b..a3283f20 100644 --- a/docs/hcl/kcma-d8.md +++ b/docs/hcl/kcma-d8.md @@ -1,4 +1,6 @@ -% ASUS KCMA-D8 desktop/workstation board + +ASUS KCMA-D8 desktop/workstation board +====================================== This is a desktop board using AMD hardware (Fam10h **and Fam15h** CPUs available). It can also be used for building a high-powered workstation. @@ -9,7 +11,7 @@ Raptor Engineering Inc. and, working with them, merged into libreboot. recommend avoiding Kingston modules.** Flashing instructions can be found at -[../install/#flashrom](../install/#flashrom) - note that external +[../install/\#flashrom](../install/#flashrom) - note that external flashing is required (e.g. BBB), if the proprietary (ASUS) firmware is currently installed. If you already have libreboot, by default it is possible to re-flash using software running in GNU+Linux on the kcma-d8, @@ -17,6 +19,8 @@ without using external hardware. [Back to previous index](./). + + CPU compatibility ================= @@ -24,11 +28,15 @@ CPU compatibility virt).** 4300 series needs microcode updates, so avoid those CPUs. 4100 series is too old, and mostly untested. + + Board status (compatibility) {#boardstatus} ============================ See <https://raptorengineeringinc.com/coreboot/kcma-d8-status.php>. + + Form factor {#formfactor} =========== @@ -36,6 +44,8 @@ These boards use the SSI EEB 3.61 form factor; make sure that your case supports this. This form factor is similar to E-ATX in that the size is identical, but the position of the screws are different. + + IPMI iKVM module add-on {#ipmi} ======================= @@ -46,6 +56,8 @@ unsigned (possibly to replace) and physically separate from the mainboard since it's on the add-on module, which you don't have to install. + + Flash chips {#flashchips} =========== @@ -62,12 +74,16 @@ flash chip is 2MiB). extractor. These can be found online. See <http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>** + + Native graphics initialization {#graphics} ============================== Only text-mode is known to work, but linux(kernel) can initialize the framebuffer display (if it has KMS - kernel mode setting). + + Current issues {#issues} ============== @@ -87,15 +103,18 @@ Current issues {#issues} to derive from, for those who want to work on a free replacement. In practise, out-of-band management isn't very useful anyway (or at the very least, it's not a major inconvenience to not have it). -- Graphics: only text-mode works. See [#graphics](#graphics) +- Graphics: only text-mode works. See [\#graphics](#graphics) + + Hardware specifications {#specifications} ----------------------- Check the ASUS website. -Copyright © 2016 Leah Rowe <info@minifree.org> + +Copyright © 2016 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/kfsn4-dre.md b/docs/hcl/kfsn4-dre.md index 2e0f13eb..70d5a789 100644 --- a/docs/hcl/kfsn4-dre.md +++ b/docs/hcl/kfsn4-dre.md @@ -1,13 +1,17 @@ -% ASUS KFSN4-DRE server/workstation board + +ASUS KFSN4-DRE server/workstation board +======================================= This is a server board using AMD hardware (Fam10h). It can also be used for building a high-powered workstation. Powered by libreboot. Flashing instructions can be found at -[../install/#flashrom](../install/#flashrom) +[../install/\#flashrom](../install/#flashrom) [Back to previous index](./). + + Form factor {#formfactor} =========== @@ -15,6 +19,8 @@ These boards use the SSI EEB 3.61 form factor; make sure that your case supports this. This form factor is similar to E-ATX in that the size is identical, but the position of the screws are different. + + Flash chips {#flashchips} =========== @@ -28,17 +34,23 @@ example of a 2MiB (16Mbits) chip, which might work. It is believed that extractor. These can be found online. See <http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>** + + Native graphics initialization {#graphics} ============================== Native graphics initialization exists (XGI Z9s) for this board. Framebuffer- and text-mode both work. A serial port is also available. + + Memory ====== DDR2 533/667 Registered ECC. 16 slots. Total capacity up to 64GiB. + + Hex-core CPUs {#hexcore} ============= @@ -47,6 +59,8 @@ number will be printed on the board), because it can use dual hex-core CPUs (Opteron 2400/8400 series). Other revisions are believed to only support dual quad-core CPUs. + + Current issues {#issues} ============== @@ -62,13 +76,16 @@ Current issues {#issues} disappears if using KMS, once the kernel starts. The jitter will remain, if booting the kernel in text-mode). + + Other information ================= [specifications](ftp://ftp.sgi.com/public/Technical%20Support/Pdf%20files/Asus/kfsn4-dre.pdf) -Copyright © 2015 Leah Rowe <info@minifree.org> + +Copyright © 2015 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/kgpe-d16.md b/docs/hcl/kgpe-d16.md index 51935da6..5caf8976 100644 --- a/docs/hcl/kgpe-d16.md +++ b/docs/hcl/kgpe-d16.md @@ -1,4 +1,6 @@ -% ASUS KGPE-D16 server/workstation board + +ASUS KGPE-D16 server/workstation board +====================================== This is a server board using AMD hardware (Fam10h **and Fam15h** CPUs available). It can also be used for building a high-powered workstation. @@ -10,7 +12,7 @@ work), merged into libreboot. recommend avoiding Kingston modules.** Flashing instructions can be found at -[../install/#flashrom](../install/#flashrom) - note that external +[../install/\#flashrom](../install/#flashrom) - note that external flashing is required (e.g. BBB), if the proprietary (ASUS) firmware is currently installed. If you already have libreboot, by default it is possible to re-flash using software running in GNU+Linux on the @@ -18,6 +20,8 @@ KGPE-D16, without using external hardware. [Back to previous index](./). + + CPU compatibility ================= @@ -25,11 +29,15 @@ CPU compatibility virt).** 6300 series needs microcode updates, so avoid those CPUs. 6100 series is too old, and mostly untested. + + Board status (compatibility) {#boardstatus} ============================ See <https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php>. + + Form factor {#formfactor} =========== @@ -37,6 +45,8 @@ These boards use the SSI EEB 3.61 form factor; make sure that your case supports this. This form factor is similar to E-ATX in that the size is identical, but the position of the screws are different. + + IPMI iKVM module add-on {#ipmi} ======================= @@ -47,6 +57,8 @@ unsigned (possibly to replace) and physically separate from the mainboard since it's on the add-on module, which you don't have to install. + + Flash chips {#flashchips} =========== @@ -63,12 +75,16 @@ flash chip is 2MiB). extractor. These can be found online. See <http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>** + + Native graphics initialization {#graphics} ============================== Only text-mode is known to work, but linux(kernel) can initialize the framebuffer display (if it has KMS - kernel mode setting). + + Current issues {#issues} ============== @@ -88,7 +104,9 @@ Current issues {#issues} to derive from, for those who want to work on a free replacement. In practise, out-of-band management isn't very useful anyway (or at the very least, it's not a major inconvenience to not have it). -- Graphics: only text-mode works. See [#graphics](#graphics) +- Graphics: only text-mode works. See [\#graphics](#graphics) + + Hardware specifications {#specifications} ----------------------- @@ -126,8 +144,8 @@ The information here is adapted, from the ASUS website. - **Total Slots:** 16 (4-channel per CPU, 8 DIMM per CPU), ECC - **Capacity:** Maximum up to 256GB RDIMM - **Memory Type that is compatible:** - - DDR3 1600/1333/1066/800 UDIMM* - - DDR3 1600/1333/1066/800 RDIMM* + - DDR3 1600/1333/1066/800 UDIMM\* + - DDR3 1600/1333/1066/800 RDIMM\* - **Compatible sizes per memory module:** - 16GB, 8GB, 4GB, 3GB, 2GB, 1GB RDIMM - 8GB, 4GB, 2GB, 1GB UDIMM @@ -144,7 +162,7 @@ The information here is adapted, from the ASUS website. - **Slot Location 6:** PCI-E x16 (Gen2 X16 Link), Auto turn off if slot 5 is occupied, For 1U FH/FL Card, MIO supported - **Additional Slot 1:** PIKE slot (for SAS drives. See notes above) -- Follow SSI Location# +- Follow SSI Location\# ### Form factor {#form-factor} @@ -205,11 +223,12 @@ The information here is adapted, from the ASUS website. ### Note: -- * DDR3 1600 can only be supported with AMD Opteron 6300/6200 series +- \* DDR3 1600 can only be supported with AMD Opteron 6300/6200 series processor -Copyright © 2015 Leah Rowe <info@minifree.org> + +Copyright © 2015 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/r400.md b/docs/hcl/r400.md index c9482cd3..d3fc8b10 100644 --- a/docs/hcl/r400.md +++ b/docs/hcl/r400.md @@ -1,4 +1,6 @@ -% ThinkPad R400 + +ThinkPad R400 +============= It is believed that all or most R400 laptops are compatible. See notes about [CPU @@ -15,10 +17,12 @@ modified descriptor: see [gm45\_remove\_me.html](gm45_remove_me.html)** (contains notes, plus instructions) Flashing instructions can be found at -[../install/#flashrom](../install/#flashrom) +[../install/\#flashrom](../install/#flashrom) [Back to previous index](./). + + EC update {#ecupdate} ========= @@ -38,9 +42,12 @@ only replaces the BIOS firmware, not EC. Updated EC firmware has several advantages e.g. bettery battery handling. + + Compatibility (without blobs) {#compatibility_noblobs} ----------------------------- + ### Hardware virtualization (vt-x) {#hwvirt} The R400, when run without CPU microcode updates in coreboot, currently @@ -55,14 +62,18 @@ On GM45 hardware (with libreboot), make sure that the *kvm* and The following errata datasheet from Intel might help with investigation: <http://download.intel.com/design/mobile/specupdt/320121.pdf> + + + The R400 is almost identical to the X200, code-wise. See [x200.html](x200.html). TODO: put hardware register logs here like on the [X200](x200.html) and [T400](t400.html) page. -Copyright © 2014, 2015 Leah Rowe <info@minifree.org> + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/t400.md b/docs/hcl/t400.md index f9bf9584..9b5f3395 100644 --- a/docs/hcl/t400.md +++ b/docs/hcl/t400.md @@ -1,4 +1,6 @@ -% ThinkPad T400 + +ThinkPad T400 +============= It is believed that all or most T400 laptops are compatible. See notes about [CPU @@ -15,10 +17,12 @@ modified descriptor: see [gm45\_remove\_me.html](gm45_remove_me.html)** (contains notes, plus instructions) Flashing instructions can be found at -[../install/#flashrom](../install/#flashrom) +[../install/\#flashrom](../install/#flashrom) [Back to previous index](./). + + EC update {#ecupdate} ========= @@ -38,9 +42,12 @@ only replaces the BIOS firmware, not EC. Updated EC firmware has several advantages e.g. bettery battery handling. + + Compatibility (without blobs) {#compatibility_noblobs} ----------------------------- + ### Hardware virtualization (vt-x) {#hwvirt} The T400, when run without CPU microcode updates in coreboot, currently @@ -55,9 +62,14 @@ On GM45 hardware (with libreboot), make sure that the *kvm* and The following errata datasheet from Intel might help with investigation: <http://download.intel.com/design/mobile/specupdt/320121.pdf> + + + The T400 is almost identical to the X200, code-wise. See [x200.html](x200.html). + + Hardware register dumps {#regdumps} ----------------------- @@ -72,8 +84,9 @@ outputs from the T400: - Version of flashrom used for the external flashing/reading logs is the one that libreboot git revision c164960 uses. -Copyright © 2015 Leah Rowe <info@minifree.org> + +Copyright © 2015 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/t500.md b/docs/hcl/t500.md index 0d0c3f54..1005abfe 100644 --- a/docs/hcl/t500.md +++ b/docs/hcl/t500.md @@ -1,4 +1,6 @@ -% ThinkPad T500 + +ThinkPad T500 +============= It is believed that all or most T500 laptops are compatible. See notes about [CPU @@ -15,10 +17,12 @@ modified descriptor: see [gm45\_remove\_me.html](gm45_remove_me.html)** (contains notes, plus instructions) Flashing instructions can be found at -[../install/#flashrom](../install/#flashrom) +[../install/\#flashrom](../install/#flashrom) [Back to previous index](./). + + EC update {#ecupdate} ========= @@ -38,9 +42,12 @@ only replaces the BIOS firmware, not EC. Updated EC firmware has several advantages e.g. bettery battery handling. + + Compatibility (without blobs) {#compatibility_noblobs} ----------------------------- + ### Hardware virtualization (vt-x) {#hwvirt} The T500, when run without CPU microcode updates in coreboot, currently @@ -55,9 +62,14 @@ On GM45 hardware (with libreboot), make sure that the *kvm* and The following errata datasheet from Intel might help with investigation: <http://download.intel.com/design/mobile/specupdt/320121.pdf> + + + The T500 is almost identical to the X200, code-wise. See [x200.html](x200.html). + + Descriptor and Gbe differences {#descriptor_difference} ------------------------------ @@ -69,9 +81,8 @@ and The patches above are based on the output from ich9deblob on a factory.rom image dumped from the T500 with a SOIC-8 4MiB flash chip. The patch re-creates the X200 descriptor/gbe source, so the commands -were something like: - - $ diff -u t500gbe x200gbe +were something like:\ +\$ **diff -u t500gbe x200gbe**\ \$ **diff -u t500descriptor x200descriptor** ME VSCC table is in a different place and a different size on the T500. @@ -81,6 +92,8 @@ The very same descriptor/gbe used on the X200 (generated by [ich9gen](gm45_remove_me.html#ich9gen)) was re-used on the T500, and it still worked. + + Hardware register dumps {#regdumps} ----------------------- @@ -93,8 +106,9 @@ outputs from the T500: Lenovo BIOS 3.13 7VET83WW (EC firmware 1.06): - [../future/dumps/t500log/](../future/dumps/t500log/) -Copyright © 2015 Leah Rowe <info@minifree.org> + +Copyright © 2015 Leah Rowe <info@minifree.org>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative diff --git a/docs/hcl/x200.md b/docs/hcl/x200.md index fafe5f0b..d16081ec 100644 --- a/docs/hcl/x200.md +++ b/docs/hcl/x200.md @@ -1,9 +1,11 @@ -% ThinkPad X200 + +ThinkPad X200 +============= It is believed that all X200 laptops are compatible. X200S and X200 Tablet will also work, [depending on the configuration](#x200s). -It *might* be possible to put an X200 motherboard in an X201 chassis, +It \*might\* be possible to put an X200 motherboard in an X201 chassis, though this is currently untested by the libreboot project. The same may also apply between X200S and X201S; again, this is untested. **It's most likely true.** @@ -18,10 +20,12 @@ modified descriptor: see [gm45\_remove\_me.html](gm45_remove_me.html)** (contains notes, plus instructions) Flashing instructions can be found at -[../install/#flashrom](../install/#flashrom) +[../install/\#flashrom](../install/#flashrom) [Back to previous index](./). + + EC update {#ecupdate} ========= @@ -41,9 +45,12 @@ only replaces the BIOS firmware, not EC. Updated EC firmware has several advantages e.g. bettery battery handling. + + Compatibility (without blobs) {#compatibility_noblobs} ----------------------------- + ### Hardware virtualization (vt-x) {#hwvirt} The X200, when run without CPU microcode updates in coreboot, currently @@ -62,6 +69,9 @@ Anecdotal reports from at least 1 user suggests that some models with CPU microcode 1067a (on the CPU itself) might work with vt-x in libreboot. + + + X200S and X200 Tablet. {#x200s} ---------------------- @@ -104,6 +114,7 @@ This was then pushed as a patch for coreboot, which can be found at <http://review.coreboot.org/#/c/7786/> (libreboot merges this patch in coreboot-libre now. Check the 'getcb' script in src or git). + ### Proper GS45 raminit {#x200s_raminit} A new northbridge gs45 should be added to coreboot, based on gm45, and a @@ -122,12 +133,17 @@ comparing it with X200 (factory BIOS) and X200 (gm45 raminit code in coreboot), to see what the differences are. Then tweak raminit code based on that. + + + Trouble undocking (button doesn't work) ---------------------------------------- This person seems to have a workaround: <https://github.com/the-unconventional/libreboot-undock> + + LCD compatibility list {#lcd_supported_list} ---------------------- @@ -138,6 +154,7 @@ All LCD panels for the X200, X200S and X200 Tablet are known to work. [Back to top of page.](#pagetop) + ### AFFS/IPS panels {#ips} #### X200 @@ -161,7 +178,7 @@ just simply remove the digitizer). **If your X200 has an LED backlit panel in it, then you also need to get an inverter and harness cable that is compatible with the CCFL panels. To see which panel type you have, see -[#led\_howtotell](#led_howtotell). If you need the inverter/cable, here +[\#led\_howtotell](#led_howtotell). If you need the inverter/cable, here are part numbers: 44C9909 for CCFL LVDS cable with bluetooth and camera connections, and 42W8009 or 42W8010 for the inverter.** @@ -180,14 +197,19 @@ Sources: - [ThinkWiki.de - X200 Displayumbau](http://thinkwiki.de/X200_Displayumbau) + + ### X200S <http://forum.thinkpads.com/viewtopic.php?p=618928#p618928> explains that the X200S screens/assemblies are thinner. You need to replace the whole lid with one from a normal X200/X201. + [Back to top of page.](#pagetop) + + How to tell if it has an LED or CCFL? {#led_howtotell} ------------------------------------- @@ -205,6 +227,8 @@ something different). [Back to top of page.](#pagetop) + + Hardware register dumps {#regdumps} ----------------------- @@ -216,6 +240,8 @@ outputs from the X200: - BIOS 3.15, EC 1.06 - [hwdumps/x200/](hwdumps/x200/) + + RAM, S3 and microcode updates {#ram_s3_microcode} ============================= @@ -231,13 +257,12 @@ be useful for RAM compatibility info (note: coreboot raminit is different, so this page might be BS) pehjota started collecting some steppings for different CPUs on several -X200 laptops. You can get the CPUID by running: - -\$ **dmesg | sed -n 's/\^.* microcode: CPU0 -sig=0x\\(\[\^,\]*\\),.*\$/\\1/p'** +X200 laptops. You can get the CPUID by running:\ +\$ **dmesg | sed -n 's/\^.\* microcode: CPU0 +sig=0x\\(\[\^,\]\*\\),.\*\$/\\1/p'** What pehjota wrote: The laptops that have issues resuming from suspend, -as well as a laptop that (as I mentioned earlier in #libreboot) won't +as well as a laptop that (as I mentioned earlier in \#libreboot) won't boot with any Samsung DIMMs, all have CPUID 0x10676 (stepping M0). What pehjota wrote: Laptops with CPUID 0x167A (stepping R0) resume @@ -258,6 +283,8 @@ available. I'd be curious if you could confirm these results.** It might not be coreboot that's buggy with raminit/S3; it might just be down to the microcode updates. + + Unsorted notes {#unsorted} -------------- @@ -267,10 +294,10 @@ Unsorted notes {#unsorted} <sgsit> you can plug a board in which gives diagnostic codes but i'm wondering whether it is capable of more <sgsit> http://www.endeer.cz/bios.tools/bios.html -Copyright © 2014, 2015 Leah Rowe <info@minifree.org> -Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net> +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ +Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>\ Permission is granted to copy, distribute and/or modify this document under the terms of the Creative Commons Attribution-ShareAlike 4.0 International license or any later version published by Creative |