aboutsummaryrefslogtreecommitdiff
path: root/docs/install/images/t500
diff options
context:
space:
mode:
authorAndrew Robbins <contact@andrewrobbins.info>2018-10-30 00:57:48 -0400
committerAndrew Robbins <contact@andrewrobbins.info>2018-10-30 01:00:25 -0400
commit2ba70b22e494a67f9bc8e53c4a9803582e9668e6 (patch)
tree404be419c914eff11d739832f423388a5f3a9792 /docs/install/images/t500
parentdb19cee793a882dc1ee6a7be8dc787bf7be93049 (diff)
downloadlibrebootfr-2ba70b22e494a67f9bc8e53c4a9803582e9668e6.tar.gz
librebootfr-2ba70b22e494a67f9bc8e53c4a9803582e9668e6.zip
Create 4,16MiB Coreboot configs/targets for Veyron Speedy
4MiB flash is the default for this board. A 16MiB config is included for those looking to modify their board with a larger flash chip. Also, corebootfb is the only display mode available for this board; as such, inclusion of the corebootfb subtarget serves only to explicitly indicate the display mode when packaging ROMs upon release. Veyron Speedy Coreboot ROMs can be built with, e.g.: './libreboot build coreboot veyron speedy corebootfb 4mb'
Diffstat (limited to 'docs/install/images/t500')
0 files changed, 0 insertions, 0 deletions