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| author | Leah Rowe <info@minifree.org> | 2016-08-22 10:22:04 +0100 |
|---|---|---|
| committer | Leah Rowe <info@minifree.org> | 2016-08-22 10:22:04 +0100 |
| commit | c679b19f0b0d95f587b3836c7bf867a932d3df28 (patch) | |
| tree | a0529135e5901b3aff16987a2cf94c10752cb8ab /docs | |
| parent | 3ca295f25340344f5d42164bd134dbb9f5b0ff4c (diff) | |
| download | librebootfr-c679b19f0b0d95f587b3836c7bf867a932d3df28.tar.gz librebootfr-c679b19f0b0d95f587b3836c7bf867a932d3df28.zip | |
actually add the documentation directory. (I forgot git add in last commit)
Diffstat (limited to 'docs')
568 files changed, 71319 insertions, 0 deletions
diff --git a/docs/archive_old.html b/docs/archive_old.html new file mode 100644 index 00000000..d796a4b1 --- /dev/null +++ b/docs/archive_old.html @@ -0,0 +1,1531 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('css/main.css'); + </style> + + <title>Libreboot release information (old)</title> +</head> +<body> + + <div class="section"> + + <h1 id="pagetop">Libreboot release information (old)</h1> + <p> + Information for this release can be found at <a href="release.html">release.html</a>. + Updated versions of libreboot can be found at <a href="http://libreboot.org/">libreboot.org</a>. + </p> + + <div class="important"> + <p> + <b>This page is *obsolete*, provided for historical purposes.</b> + </p> + </div> + + </div> + + <div class="section"> + + <h2>Releases</h2> + <ul> + <li><a href="#release20150518">r20150518 (18th May 2015)</a></li> + <li><a href="#release20150124">r20150124 (24th January 2015), r20150126 (26th January 2015), r20150208 (8th February 2015)</a></li> + <li><a href="#release20141015">r20141015 (15th October 2014)</a></li> + <li><a href="#release20140911">r20140911 (6th release)</a> (11th September 2014 <b>pre-release, 7th beta</b>)</li> + <li><a href="#release20140622">r20140622 (5th release)</a> (7th March 2014, revised 22nd June 2014)</li> + <li><a href="#release20140221">r20140221 (4th release)</a> (21st February 2014)</li> + <li><a href="#release20131214">r20131214 (3rd release)</a> (14th December 2013)</li> + <li><a href="#release20131213">r20131213 (2nd release)</a> (13th December 2013)</li> + <li><a href="#release20131212">r20131212 (1st release)</a> (12th December 2013)</li> + </ul> + + </div> + + <div class="section"> + + <h1 id="release20150518">Release 20150518</h1> + + <p> + Release date: 18th May 2015. + </p> + + <p> + Installation instructions can be found at <b><i>docs/install/index.html</i></b>. + Building instructions (for source code) can be found at <b><i>docs/git/index.html#build</i></b>. + </p> + + <h2>Machines supported in this release:</h2> + <ul> + <li> + <b>ThinkPad X60/X60s</b> + <ul> + <li> + You can also remove the motherboard from an X61/X61s and replace it with an X60/X60s motherboard. + An X60 Tablet motherboard will also fit inside an X60/X60s. + </li> + </ul> + </li> + <li> + <b>ThinkPad X60 Tablet</b> (1024x768 and 1400x1050) with digitizer support + <ul> + <li>See <b><i>docs/hcl/index.html#supported_x60t_list</i></b> for list of supported LCD panels</li> + <li>It is unknown whether an X61 Tablet can have it's mainboard replaced with an X60 Tablet motherboard.</li> + </ul> + </li> + <li> + <b>ThinkPad T60</b> (Intel GPU) (there are issues; see below): + <ul> + <li>See notes below for exceptions, and <b><i>docs/hcl/index.html#supported_t60_list</i></b> for known working LCD panels.</li> + <li>It is unknown whether a T61 can have it's mainboard replaced with a T60 motherboard.</li> + <li>See <b><i>docs/future/index.html#t60_cpu_microcode</i></b>.</li> + <li>T60P (and T60 laptops with ATI GPU) will likely never be supported: <b><i>docs/hcl/index.html#t60_ati_intel</i></b></li> + </ul> + </li> + <li> + <b>ThinkPad X200</b> + <ul> + <li>X200S and X200 Tablet are also supported, conditionally; see <b><i>docs/hcl/x200.html#x200s</i></b></li> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b><i>docs/hcl/gm45_remove_me.html</i></b></li> + </ul> + </li> + <li> + <b>ThinkPad R400</b> + <ul> + <li>See <b><i>docs/hcl/r400.html</i></b></li> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b><i>docs/hcl/gm45_remove_me.html</i></b></li> + </ul> + </li> + <li> + <b>ThinkPad T400</b> + <ul> + <li>See <b><i>docs/hcl/t400.html</i></b></li> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b><i>docs/hcl/gm45_remove_me.html</i></b></li> + </ul> + </li> + <li> + <b>ThinkPad T500</b> + <ul> + <li>See <b><i>docs/hcl/t500.html</i></b></li> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b><i>docs/hcl/gm45_remove_me.html</i></b></li> + </ul> + </li> + <li> + <b>Apple MacBook1,1</b> (MA255LL/A, MA254LL/A, MA472LL/A) + <ul> + <li>See <b><i>docs/hcl/index.html#macbook11</i></b>.</li> + </ul> + </li> + <li> + <b>Apple MacBook2,1</b> (MA699LL/A, MA701LL/A, MB061LL/A, MA700LL/A, MB063LL/A, MB062LL/A) + <ul> + <li>See <b><i>docs/hcl/index.html#macbook21</i></b>.</li> + </ul> + </li> + </ul> + + <h2> + Changes for this release, relative to r20150208 (earliest changes last, recent changes first) + </h2> + <ul> + <li>Add a whitelist entry to board_enable.c in flashrom, for the ThinkPad R400, T400 and T500</li> + <li> + Updated flashrom (to SVN revision 1889) + <ul> + <li>X200 whitelist patch removed (merged upstream)</li> + <li>X200 whitelist modified to include X200S and X200 Tablet</li> + </ul> + </li> + <li>libreboot_util: don't include cmos layout files (not needed anymore)</li> + <li><b>coreboot-libre: backport patches for X200 Tablet digitizer support</b></li> + <li>build/release/archives: create SHA512 sum manifest file of the release archives</li> + <li>build/release/archives: separate crossgcc into a new archive</li> + <li>disabled generation of txtmode ROM images for now (they will be back again in the next release)</li> + <li>coreboot-libre: delete unused code (reduce size of src archive)</li> + <li>Flashing guides: make them more friendly to colourblind people</li> + <li> + docs/gnulinux/encrypted_*.html: Remove mention of password length + - it was arbitrary and pointless. + </li> + <li>docs/maintain/index.html: Finish the guide</li> + <li> + scripts/download/coreboot: use diffs included in libreboot, not external gerrit cherry-picks + - review.coreboot.org (gerrit) being down no longer kills + libreboot (backup mirrors of the master repository exist) + </li> + <li>docs/install/bbb_setup.html: Add info about wp/hold and pinouts</li> + <li>docs/index.html: improve the description of libreboot</li> + <li>docs/hcl/gm45_remove_me.html: notes about the demefactory utility</li> + <li>docs/install/bbb_setup.html: EHCI debug: recommend linux-libre</li> + <li>docs/install/bbb_setup.html: EHCI Debug logging setup guide</li> + <li>docs/hcl/t500.html: Add screen compatibility report (TODO: fix incompatible screens)</li> + <li> + Update coreboot(again) + merge GM45 hybrid GPU patches + - means that T400/T500 with the ATI+Intel hybrid GPU setup + will work (ATI disabled, Intel permanently enabled). + power_on_after_fail nvram option added to all GM45 boards, + defaulting to No, so that plugging it AC doesn't boot up + the system against the users will. Net20DC is now the default + debug dongle on all boards (compatible with BBB). + </li> + <li>demefactory (new utility): create GM45 factory.rom without the ME</li> + <li>ich9deblob: re-factor descriptor.c functions</li> + <li>docs/hcl/t500.html: add hardware logs</li> + <li>docs/gnulinux/encrypted_*.html: No password for default entry</li> + <li>docs/git/index.html: Add more details about BUC.TS</li> + <li>grub.cfg: Also scan for grub2/grub.cfg, not just grub/grub.cfg</li> + <li>docs/maintain/ (new section. WIP!): Maintaining libreboot</li> + <li>docs/gnulinux/grub_boot_installer.html: Fix hazardous instruction</li> + <li>docs/tasks.html: Better categorization between intel/amd/arm</li> + <li>docs/install/bbb_setup.html: notes about SPI flashing stability</li> + <li>docs/install/bbb_setup.html: more names for the 0.1" cables</li> + <li>docs/install/*_external.html: add disclaimer about thermal paste</li> + <li>docs/install/bbb_setup.html: Fix broken links</li> + <li>docs/install/bbb_setup.html: preliminary notes about EHCI debug</li> + <li>docs/hcl/gm45_remove_me.html: Link to websites talking about the ME</li> + <li>docs/install/{t400,t500,r400}_external.html: Notes about CPU compatibility</li> + <li>Delete the ich9macchange script. It's useless, and confuses people</li> + <li>docs/hcl/gm45_remove_me.html: prioritize ich9gen executable path</li> + <li>docs/hcl/gm45_remove_me.html: prioritize changing mac address</li> + <li>docs/hcl/gm45_remove_me.html: less confusing notes about ich9gen</li> + <li>build/dependencies/parabola: Add dependencies for x86_64</li> + <li>Move parabola/trisquel dependency scripts to scripts/helpers/build</li> + <li>scripts/dependencies/paraboladependencies: build dependencies (32-bit Parabola)</li> + <li><b>New board</b>: ThinkPad T500</li> + <li>Add diffs for descriptor/gbe differences between T500 and X200</li> + <li>coreboot-libre: provide better blob categorization</li> + <li>docs/hcl/gm45_remove_me.html: add notes about flash write protect</li> + <li><b>New board</b>: ThinkPad T400</li> + <li>GRUB: add partial vesamenu.c32 support (fixes tails ISOLINUX menu)</li> + <li>Update GRUB (to revision fa07d919d1ff868b18d8a42276d094b63a58e299)</li> + <li> + Update coreboot (to revision 83b05eb0a85d7b7ac0837cece67afabbdb46ea65) + <ul> + <li> + Intel CPU microcode (most of it) no longer deleted, + because it was deleted upstream (moved to a 3rd + party repository). + </li> + <li>MacBook2,1 cstate patch is no longer cherry picked (merged upstream)</li> + <li>Patch to disable use of timestamps in coreboot no longer included (merged upstream)</li> + </ul> + </li> + <li>coreboot-libre: don't list vortex86ex kbd firmware as microcode (list it separately)</li> + <li>coreboot-libre: don't rm */early_setup_ss.h (these are not blobs)</li> + <li>coreboot-libre: add GPLv3 license to the findblobs script</li> + <li>coreboot-libreboot: don't rm raminit_tables (nahelem/sandybridge) (they are not blobs)</li> + <li>coreboot-libre: don't delete the .spd.hex files (they are not blobs)</li> + <li>build/release/archives: don't put rmodtool in libreboot_util</li> + <li>docs/install/x200_external.html: recommend installing GNU/Linux at the end</li> + <li>docs/install/x200_external.html: add more photos, improve instructions</li> + <li>build/clean/grub: use distclean instead of clean</li> + <li>grub-assemble: Add the <i>bsd</i> and <i>part_bsd</i> modules</li> + <li>build/roms/withgrub: Only run ich9gen if gm45/gs45 images exist</li> + <li>docs/git/index.html: Add notes about building for specific boards</li> + <li>build/roms/withgrub: Allow building for a custom range of boards</li> + <li>grub-assemble: Disable verbose output</li> + <li>Add documentation on how to unlock root encrypted fs with key in initramfs in Parabola Linux</li> + <li>docs/gnulinux/grub_cbfs.html: Improve structure (easier to use)</li> + <li>grub.cfg: Disable the beep on startup</li> + <li>docs/install/bbb_setup.html: Make the guide easier to use</li> + <li>docs/gnulinux/grub_cbfs.html: Remove redundant instructions</li> + <li>docs/install/x200_external.html: Mark pins in the images</li> + <li>docs/install/bbb_setup.html: Replace 3.3V PSU photo with ATX PSU</li> + <li>docs/hcl/x200.html: Add dumps from 4-MiB X200 with Lenovo BIOS 3.22</li> + <li>docs/hcl/x200.html: Add dumps from 4-MiB X200 with Lenovo BIOS 3.18</li> + <li>grub.cfg: add syslinux_configfile menuentry for ahci0</li> + <li>grub.cfg: Add more paths for syslinux_configfile</li> + <li>docs/future.html: T60: Add EDID dump from LG-Philips LP150E05-A2K1</li> + <li>docs/install/bbb_setup.html: Further clarify which clip is needed</li> + <li>bash scripts: Make script output more user-friendly in general</li> + <li>bash scripts: Only enable verbose output if DEBUG= is used</li> + <li> + build: Support multiple extra options + - now possible to build multiple images for arbitrary + boards (configs), but without building the entire + collection. + </li> + <li> + Deleted the signing archive key + - the finger print and ID is given instead, so that + the user can download it from a key server + </li> + <li> + scripts/helpers/build/release: Move docs to separate archive + - reduces the size of the other archives considerably + </li> + <li>Move DEBLOB to resources/utilities/coreboot-libre/deblob</li> + <li> + scripts/helpers/build/release: Delete DEBLOB from libreboot_src/ + - not needed in libreboot_src (release archive) because it + contains a coreboot revision that has already been deblobbed. + </li> + <li>flash (script): Use <i>build</i> instead of <i>DEBLOB</i> to know if in src</li> + <li>docs/install/r400_external.html: Show images, don't link.</li> + <li>docs/install/x200_external.html: Show images, don't link.</li> + <li>docs/install/bbb_setup.html: Show images, instead of linking</li> + <li>Documentation: optimize all images (reduce file sizes)</li> + <li> + Remove download links from the release page (and the archive page) + - release archives are hosted differently following this release, + which means that the old methods are no longer viable. + </li> + <li>Moved ich9macchange to resources/scripts/misc/ich9macchange</li> + <li> + ich9macchange: assume that the script is being run from _util + (act only on one ROM image, defined by a user-provided path) + </li> + <li>Move grub-background to resources/scripts/misc/grub-background</li> + <li>grub-background: assume that it is being run from libreboot_util</li> + <li>grub-background: change only one ROM image, specified by path</li> + <li>build (release archives): Add the commitid file to release/</li> + <li>build-release: Move the release archives to release/</li> + <li> + Merge all build scripts into a single generic script, + with helpers in resources/scripts/helpers/build/ + </li> + <li> + Replace <i>getall</i> with <i>download</i>, which takes as input an argument + specifying which program the user wants to download. + </li> + <li>Moved the get scripts to resources/scripts/helpers/download/</li> + <li>build-release: Remove the powertop entries</li> + <li>Moved powertop.trisquel7 to resources/scripts/misc/</li> + <li>Deleted the powertop.trisquel6 script (Trisquel 6 is obsolete)</li> + <li>Documentation: general improvements to the flashing instructions</li> + <li>Merged all flashing scripts into a single script</li> + <li>Updated GRUB</li> + <li>bucts: Make it build without git</li> + <li>Moved dejavu-fonts-ttf-2.34/AUTHORS to resources/grub/font/</li> + <li>Deleted GRUB Invaders from libreboot</li> + <li>Deleted SeaBIOS from libreboot</li> + <li>build-release: optimize use of tar (reduced file sizes)</li> + <li>grub.cfg: add another SYSLINUX config location (/syslinux/syslinux.cfg)</li> + <li>build-release: remove the bin/ directory from libreboot_util</li> + <li>cleandeps: delete the bin/ directory</li> + <li>buildrom-withgrub: create the bin directory if it does not exist</li> + <li>coreboot-libre: don't use git for version timestamp</li> + <li>i945-pwm: add clean command to Makefile</li> + <li>i945-pwm: add -lz to Makefile</li> + <li>docs/install/x200_external: Mention GPIO33 non-descriptor mode</li> + <li>docs/hcl/index.html: Remove redundant links</li> + <li>ich9macchange: Add R400</li> + <li>build-release: Separate ROM images into individual archives</li> + <li>build-release: rename libreboot_bin to libreboot_util</li> + <li><b>New board:</b> ThinkPad R400 support added to libreboot.</li> + <li>bbb_setup.html: tell user to use libreboot's own flashrom</li> + </ul> + + </div> + + <div class="section"> + + <h1 id="release20150124">Release 20150124, 20150126 and 20150208</h1> + + <p> + Release date: 24th January 2015. + </p> + + <h2>Machines supported in this release:</h2> + <ul> + <li> + <b>Lenovo ThinkPad X60/X60s</b> + <ul> + <li> + You can also remove the motherboard from an X61/X61s and replace it with an X60/X60s motherboard. + An X60 Tablet motherboard will also fit inside an X60/X60s. + </li> + </ul> + </li> + <li> + <b>Lenovo ThinkPad X60 Tablet</b> (1024x768 and 1400x1050) with digitizer support + <ul> + <li>See <b>hcl/index.html#supported_x60t_list</b> for list of supported LCD panels</li> + <li>It is unknown whether an X61 Tablet can have it's mainboard replaced with an X60 Tablet motherboard.</li> + </ul> + </li> + <li> + <b>Lenovo ThinkPad T60</b> (Intel GPU) (there are issuesinstall/x200_external.html; see below): + <ul> + <li>See notes below for exceptions, and <b>hcl/index.html#supported_t60_list</b> for known working LCD panels.</li> + <li>It is unknown whether a T61 can have it's mainboard replaced with a T60 motherboard.</li> + <li>See <b>future/index.html#t60_cpu_microcode</b>.</li> + <li>T60P (and T60 laptops with ATI GPU) will likely never be supported: <b>hcl/index.html#t60_ati_intel</b></li> + </ul> + </li> + <li> + <b>Lenovo ThinkPad X200</b> + <ul> + <li>X200S and X200 Tablet are also supported, conditionally; see <b>hcl/x200.html#x200s</b></li> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b>hcl/gm45_remove_me.html</b></li> + </ul> + </li> + <li> + <b>Lenovo ThinkPad R400</b> (r20150208 and later, only) + <ul> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b>hcl/gm45_remove_me.html</b></li> + </ul> + </li> + <li> + <b>Apple MacBook1,1</b> (MA255LL/A, MA254LL/A, MA472LL/A) + <ul> + <li>See <b>hcl/index.html#macbook11</b>.</li> + </ul> + </li> + <li> + <b>Apple MacBook2,1</b> (MA699LL/A, MA701LL/A, MB061LL/A, MA700LL/A, MB063LL/A, MB062LL/A) + <ul> + <li>See <b>hcl/index.html#macbook21</b>.</li> + </ul> + </li> + </ul> + + <h2> + Revisions for r20150208 (relative to r20150126) + </h2> + <p> + This is a maintenance release (polishing) based on r20150126. Users who installed r20150126 + don't really need to update to this release. + </p> + <ul> + <li>buildrom-withgrub: use gnulove.jpg background on 16:10 laptops (MacBook2,1 and X200)</li> + <li>build-release: include grub-background script in libreboot_bin</li> + <li>grub-background (new): lets user change GRUB background image</li> + <li>grub-assemble: Add link to original utility.</li> + <li>buildrom-withgrub: Put background.jpg in CBFS, not GRUB memdisk</li> + <li>grub-assemble: merge scripts into a single script gen.sh</li> + <li>Documentation: implement theme, drastically improve readability</li> + <li>docs/hcl/index.html: update list of compatible T60 LCD panels</li> + <li>docs/index.html: more clarification of libreboot's stated purpose.</li> + <li>build-release: include the commitid file in the release archives</li> + <li>docs/index.html: Further emphasize the GNU/Linux requirement.</li> + <li>lenovobios_firstflash: fix BASH errors</li> + <li>lenovobios_secondflash: fix BASH errors</li> + <li>docs/install/x200_external.html: Tell user to switch MAC address.</li> + <li>docs/git/index.html: Add to the list of x86_64 compatible hosts.</li> + <li>docs/install/index.html: Remove old (obsolete) information.</li> + <li>docs/git/index.html: Say that the build dependencies are for src (and not nedeed for libreboot_bin)</li> + <li>build: re-factor the descriptor/gbe generating loop for GM45/ICH9M</li> + <li>X60, X60S and X60 Tablet now the same ROM images.</li> + <li>Add QEMU (q35/ich9) support to libreboot.</li> + <li>Add QEMU (i440fx/piix4) support to libreboot</li> + <li>docs/index.html: Re-write the description of what libreboot is.</li> + <li>docs/release.html: Add notes about how to use GPG.</li> + <li>build-release: delete the commitid file from release archives</li> + <li>build-release: create file named commitid after build-release</li> + </ul> + <h2> + Revisions for r20150126 (relative to r20150124) + </h2> + <p> + This is a bug fix release based on r20150124. It contains a few small changes: + </p> + <ul> + <li>grub.cfg: hardcode the list of partitions to search (speeds up booting considerably. GRUB regexp isn't very well optimized)</li> + <li>Docs (x200.html hcl): Remove incorrect information</li> + <li>Documentation (bbb_setup.html): Fix typos</li> + <li> + build-release: delete ich9fdgbe_{4m,8m}.bin files from ich9gen + <ul> + <li> + These were accidentically included in the r20150124 release. They + are generated from ich9gen so it's ok, but they don't need to be + in the archive. + </li> + </ul> + </li> + <li>Documentation (grub_cbfs.html): Looping in libreboot_grub.cfg (Add notes about it if the user copied from grub.cfg in CBFS.)</li> + <li>Documentation: refer to Guix as GNU Guix System Distribution or GNU GSD per advice from the Guix project.</li> + </ul> + <h2> + Changes for this release (latest changes first, earliest changes last) + </h2> + <ul> + <li>Documentation: added information about how to boot Guix GNU/Linux.</li> + <li>grub.cfg: Added (usb0) and (usb0,*) to the list of devices in the <i>Search for GRUB</i> menuentry (this is needed for Guix GNU/Linux)</li> + <li>grub.cfg: Added (ahci1) to list of devices for ISOLINUX parser (CD/DVD) (this is needed for the X200 docking station).</li> + <li>grub.cfg: ISOLINUX parsing is now done on all USB partitions.</li> + <li>grub.cfg: Automatically switched to /boot/grub/libreboot_grub.cfg on a partition, if it exists.</li> + <li>libreboot_bin: added static ARM binaries for flashrom, cbfstool, ich9gen and + ich9deblob (tested on beaglebone black).</li> + <li>Flashrom: removed redundant Macronix flashchip definitions (for X200 owners).</li> + <li>Flashrom: added whitelist for ThinkPad X200.</li> + <li>X200: fixed uneven backlight (at low levels)</li> + <li>ich9macchange (new script, uses ich9gen): for changing the default MAC address on X200 ROM images.</li> + <li>ich9gen: added capability to change the default MAC address (and update the checksum)</li> + <li>ich9deblob: added new utility ich9gen: this can generate a descriptor+gbe image without a factory.rom dump present.</li> + <li>Modified ich9deblob to use a struct for Gbe, documenting everything.</li> + <li>Massively updated the ich9deblob utility: re-factored everything completely.</li> + <li>Enabled cstates 1 and 2 on macbook21. This reduces idle heat / power consumption.</li> + <li>buildrom-withgrub: disabled creation of *txtmode*.rom for X200 (only framebuffer graphics work)</li> + <li>Updated SeaBIOS (again)</li> + <li>docs/install/index.html#flashrom_x200: improve instructions</li> + <li>Updated flashrom (again) - patches updated</li> + <li>Updated GRUB (again)</li> + <li>Updated coreboot (again)</li> + <li>build-release: not all files were copied to libreboot_src. fix that.</li> + <li>build-release: include cbmem (statically compiled) in libreboot_bin</li> + <li>Documentation (X200): added software-based flashing instructions</li> + <li>Documentation: remove all references to the bus pirate (replaced with BBB flashing tutorials)</li> + <li><b>New board:</b> ThinkPad X200S and X200 Tablet support added to libreboot</li> + <li>build: automatically find board names (configs) to build for</li> + <li><b>New board:</b> ThinkPad X200 support added to libreboot</li> + <li>coreboot-libre config (all boards): enable USB dongle log output (for BeagleBone Black)</li> + <li>cleandeps: actually clean grubinvaders</li> + <li>.gitignore: add powertop directory</li> + <li>cleandeps: clean i945-pwm utility</li> + <li>scripts (all): fix typos</li> + <li>Documentation: general cleanup.</li> + <li>builddeps-flashrom: reduce build commands to a single for loop</li> + <li>scripts (all): replace unnecessary rm -Rf with rm -f</li> + <li>powertop.trisquel7: remove sudo (script already checks if the user is root)</li> + <li>docs/release.html: add lenovo g505s to the list of candidates</li> + <li>.gitignore: add libreboot_bin.tar.xz and libreboot_src.tar.xz</li> + <li> + libreboot_bin.tar.xz: Include utils as statically linked binaries + <ul> + <li>This means that the user does not have to install build dependency + or build from source anymore.</li> + </ul> + </li> + <li>deps-trisquel: Add binutils-source</li> + <li>powertop.trisquel7 (new): Setup powertop on trisquel 7</li> + <li>deps-trisquel,flash,lenovobios_firstflash,lenovobios_secondflash,macbook21_firstflash + x60flashfrom5,powertop.trisquel6: check if user is root</li> + <li>deps-trisquel: Make GRUB build on in Trisquel 7 x86_64. (cross compile dependencies. fixes build error in GRUB)</li> + <li>deps-parabola (removed) Remove Parabola dependencies script. Will re-add later (properly tested)</li> + <li>grub.cfg: Add more path checks to isolinux parser (more ISOs should work now)</li> + <li>Update SeaBIOS</li> + <li>x60flashfrom5 (new), for X60 users upgrading from 5th/early release</li> + <li>Update flashrom</li> + <li>Update GRUB</li> + <li> + Updated coreboot-libre + <ul> + <li>i945: permanently set tft_brightness to 0xff (fixes bug on X60 where + turning up brightness at max would make it loop back to low brightness)</li> + </ul> + </li> + <li> + getcb: Revert X60/T60 to legacy backlight controls + <ul> + <li>The ACPI brightness patches were abandoned and obsolete.</li> + </ul> + </li> + <li>grub.cfg: Only load initrd.img if it exists. Add rw to linux line (for ProteanOS)</li> + <li>build: Only generate the GRUB configurations once (re-use on all images)</li> + <li>Only build 2 GRUB payload executables, re-use on all boards.</li> + <li> + resources/utilities/grub-assemble/gen.txtmode.sh: Use GNU BASH<br/> + resources/utilities/grub-assemble/gen.vesafb.sh: Use GNU BASH + </li> + <li>scripts (error handling): Replace exit with exit 1 (make debugging easier)</li> + <li> + Move most files in CBFS to GRUB memdisk, except grub.cfg and grubtest.cfg + <ul> + This reduces the space used in CBFS because coreboot compresses + its payloads with LZMA by default. grub.cfg is all that most users + will want to modify, which remains in CBFS. + </ul> + </li> + <li>docs/release.html Add DMP vortex86ex to list of candidates.</li> + <li>docs/release.html Add ThinkPad X201 to list of candidates.</li> + <li>New links added to docs/security/x60_security and docs/security/t60_security</li> + <li>lenovobios_secondflash: Warn if BUCTS is not present. (not a dealbreaker. Can just pull out nvram battery/coin).</li> + <li>lenovobios_firstflash: Fail if BUCTS fails. (anti-bricking precaution)</li> + <li>Removed obnoxious warnings from flashing scripts, improved documentation instead.</li> + <li>scripts (all): add proper error checking (fail fast, fail early. Do not continue if there are errors)</li> + <li>buildrom-withgrub: rename image to boardname_layout_romtype.rom</li> + <li>buildrom-withgrub: don't move cbfstool, execute directly</li> + <li>resources/utilities/grub-assemble: add French Dvorak (BEPO) keyboard layout.</li> + <li>Documentation: add docs/hardware/x60_keyboard.html (show how to replace keyboard on X60/X60T)</li> + <li>Documentation: major cleanup (better structure, easier to find things)</li> + <li> + docs/release.html: Remove Acer CB5 from list of future candidates. + <ul> + <li> + Too many issues. Chromebooks are crippled (soldered RAM/storage/wifi) + and have too many usability issues for the libreboot project. + </li> + </ul> + </li> + <li>docs/gnulinux/grub_cbfs.html Major cleanup. Usability improvements.</li> + <li>hocs/gnulinux/encrypted_trisquel.html: Fixed mistakes/typos. General improvements</li> + <li> + flash (flashrom script): remove boardmismatch=force + <ul> + <li> + This was put there before for users upgrading from libreboot r5 + to r6, but also allows the user to flash the wrong image. For + example, the user could flash a T60 image on an X60, thus + bricking the system. It's almost certain that most people + have upgraded by now, so remove this potentially dangerous + option. + </li> + </ul> + </li> + <li>Documentation: update compatibility list for X60T LCD panels.</li> + <li>docs/release.html: add note about X60 Tablet board in X60/X60s</li> + <li>docs/howtos/grub_boot_installer.html: small corrections</li> + <li>docs/howtos/grub_boot_installer.html: improved readability, fixed html errors</li> + <li>Documentation (macbook21 related): clean up</li> + </ul> + + </div> + + <div class="section"> + + <h1 id="release20141015">Release 20141015</h1> + + <h2>Machines supported in this release:</h2> + <ul> + <li> + <b>Lenovo ThinkPad X60/X60s</b> + <ul> + <li> + You can also remove the motherboard from an X61/X61s and replace it with an X60/X60s motherboard. + An X60 Tablet motherboard will also fit inside an X60/X60s. + </li> + </ul> + </li> + <li> + <b>Lenovo ThinkPad X60 Tablet</b> (1024x768 and 1400x1050) with digitizer support + <ul> + <li>See <b>hcl/index.html#supported_x60t_list</b> for list of supported LCD panels</li> + <li>It is unknown whether an X61 Tablet can have its mainboard replaced with an X60 Tablet motherboard.</li> + </ul> + </li> + <li> + <b>Lenovo ThinkPad T60</b> (Intel GPU) (there are issues; see below): + <ul> + <li>See notes below for exceptions, and <b>hcl/index.html#supported_t60_list</b> for known working LCD panels.</li> + <li>It is unknown whether a T61 can have its mainboard replaced with a T60 motherboard.</li> + <li>See <b>future/index.html#t60_cpu_microcode</b>.</li> + <li>T60P (and T60s with ATI GPU) will likely never be supported: <b>hcl/index.html#t60_ati_intel</b></li> + </ul> + </li> + <li> + <b>Apple MacBook1,1</b> (MA255LL/A, MA254LL/A, MA472LL/A) + <ul> + <li>See <b>hcl/index.html#macbook11</b>.</li> + </ul> + </li> + <li> + <b>Apple MacBook2,1</b> (MA699LL/A, MA701LL/A, MB061LL/A, MA700LL/A, MB063LL/A, MB062LL/A) + <ul> + <li>See <b>hcl/index.html#macbook21</b>.</li> + </ul> + </li> + </ul> + + <h2> + Changes for this release (latest changes first, earliest changes last) + </h2> + <ul> + <li>Updated coreboot (git commit 8ffc085e1affaabbe3dca8ac6a89346b71dfc02e), the latest at the time of writing.</li> + <li>Updated SeaBIOS (git commit 67d1fbef0f630e1e823f137d1bae7fa5790bcf4e), the latest at the time of writing.</li> + <li>Updated Flashrom (svn revision 1850), the latest at the time of writing.</li> + <li>Updated GRUB (git commit 9a67e1ac8e92cd0b7521c75a734fcaf2e58523ad), the latest at the time of writing.</li> + <li>Cleaned up the documentation, removed unneeded files.</li> + <li>ec/lenovo/h8 (x60/x60s/x60t/t60): Enable wifi/bluetooth/wwan/touchpad/trackpoint by default.</li> + <li>Documentation: Updated list of T60 LCDs (Samsung LTN150XG 15" XGA listed as non-working).</li> + <li>builddeps-coreboot: Don't build libpayload (not needed. This was leftover by mistake, when trying out the TINT payload).</li> + <li>Replaced most diff files (patches) for coreboot with gerrit checkouts (cherry-pick).</li> + <li>Documentation: x60_security.html and t60_security.html: added links to info about the ethernet controller (Intel 82573).</li> + <li>Documentation: x60_security.html and t60_security.html: added notes about DMA and the docking station.</li> + <li> + Documentation: configuring_parabola.html: basic post-install steps for Parabola GNU/Linux + (helpful, since libreboot development is being moved to Parabola at the time of writing). + </li> + <li>builddeps-coreboot: use 'make crossgcc-i386' instead of 'make crossgcc'. Libreboot only targets x86 at the time of writing.</li> + <li>ROM images no longer include SeaBIOS. Instead, the user adds it afterwards. Documentation and scripts updated.</li> + <li>docs/images/encrypted_parabola.html: Notes about linux-libre-grsec</li> + <li>Documentation: encrypted_parabola.html: add tutorial for encrypted Parabola GNU/Linux installation.</li> + <li>Documentation: added more info about wifi chipsets</li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="release20140911">6th release (pre-release, 7th beta)</h1> + + <ul> + <li>Released 11th July 2014 (pre-release) 1st beta</li> + <li>Revised (pre-release, 2nd beta) 16th July 2014</li> + <li>Revised (pre-release, 3rd beta) 20th July 2014</li> + <li>Revised (pre-release, 4th beta) 29th July 2014</li> + <li>Revised (pre-release, 5th beta) 11th August 2014 (corrected 11th August 2014)</li> + <li>Revised (pre-release, 6th beta) 3rd September 2014</li> + <li>Revised (pre-release, 7th beta) 11th September 2014</li> + </ul> + + <h2>Machines still supported (compared to previous release):</h2> + <ul> + <li> + <b>Lenovo ThinkPad X60/X60s</b> + <ul> + <li> + You can also remove the motherboard from an X61/X61s and replace it with an X60/X60s motherboard. + </li> + </ul> + </li> + </ul> + <h2>New systems supported in this release:</h2> + <ul> + <li> + <b>Lenovo ThinkPad X60 Tablet</b> (1024x768 and 1400x1050) with digitizer support + <ul> + <li>See <b>hcl/index.html#supported_x60t_list</b> for list of supported LCD panels</li> + <li>It is unknown whether an X61 Tablet can have its mainboard replaced with an X60 Tablet motherboard.</li> + </ul> + </li> + <li> + <b>Lenovo ThinkPad T60</b> (Intel GPU) (there are issues; see below) + <ul> + <li>See notes below for exceptions, and <b>hcl/index.html#supported_t60_list</b> for known working LCD panels.</li> + <li>It is unknown whether a T61 can have its mainboard replaced with a T60 motherboard.</li> + <li>T60P (and T60s with ATI GPU) will likely never be supported: <b>hcl/index.html#t60_ati_intel</b></li> + </ul> + </li> + <li> + <b>Apple MacBook1,1</b> (MA255LL/A, MA254LL/A, MA472LL/A) + <ul> + <li>See <b>hcl/index.html#macbook11</b>.</li> + </ul> + </li> + <li> + <b>Apple MacBook2,1</b> (MA699LL/A, MA701LL/A, MB061LL/A, MA700LL/A, MB063LL/A, MB062LL/A) + <ul> + <li>See <b>hcl/index.html#macbook21</b>.</li> + </ul> + </li> + </ul> + <h2>Machines no longer supported (compared to previous release):</h2> + <ul> + <li><b>All previous systems still supported!</b></li> + </ul> + + <h2> + Revisions for r20140911 (7th beta) (11th September 2014) + </h2> + <ul> + <li>The changes below were made in a git repository, unlike in previous releases. Descriptions below are copied from 'git log'.</li> + <li>Update .gitignore for new dependencies.</li> + <li>Use a submodule for i945-pwm.</li> + <li>Don't clean packages that fail or don't need cleaning.</li> + <li>Don't clean i945-pwm, it's not needed.</li> + <li>Regression fix: Parabola live ISO boot issues</li> + <li>Re-enable background images in ISOLINUX/SYSLINUX GRUB parser menus</li> + <li>Regression fix: Re-add CD-ROM (ata0) in GRUB</li> + <li>Documentation: add notes about performance penalty when using ecryptfs.</li> + <li>Documentation: Fixed spelling and grammatical errors.</li> + <li>Documentation: macbook21: add new system as tested</li> + <li>Documentation: macbook21: add info about improving touchpad sensitivity</li> + <li>Documentation: X60 Tablet: add more information about finger input</li> + <li>Documentation: release.html: Add information about recently merged commit in coreboot</li> + </ul> + + <h2> + Revisions for r20140903 (6th beta) (3rd September 2014) + </h2> + <ul> + <li>Added modified builddeb* scripts for Parabola GNU/Linux-libre: buildpac, buildpac-flashrom, buildpac-bucts (courtesy of Noah Vesely)</li> + <li>Documentation: updated all relevant areas to mention use of buildpac* scripts for Parabola users.</li> + <li>Documentation: added information showing how to enable or disable bluetooth on the X60</li> + <li>MacBook1,1 tested! See <b>hcl/index.html#macbook11</b></li> + <li>Documentation: fixed typo in index.html#get_edid_panelname (get-edit changed to get-edid)</li> + <li>Documentation: added images/x60_lcd_change/ (pics only for now)</li> + <li>Added gcry_serpent and gcry_whirlpool to the GRUB module list in the 'build' script (for luks users)</li> + <li> + <b>Libreboot is now based on a new coreboot version from August 23rd, 2014:<br/> + Merged commits (relates to boards that were already supported in libreboot):</b> + <ul> + <li><a href="http://review.coreboot.org/#/c/6697/">http://review.coreboot.org/#/c/6697/</a></li> + <li><a href="http://review.coreboot.org/#/c/6698/">http://review.coreboot.org/#/c/6698/</a> (merged already)</li> + <li><a href="http://review.coreboot.org/#/c/6699/">http://review.coreboot.org/#/c/6699/</a> (merged already)</li> + <li><a href="http://review.coreboot.org/#/c/6696/">http://review.coreboot.org/#/c/6696/</a> (merged already)</li> + <li><a href="http://review.coreboot.org/#/c/6695/">http://review.coreboot.org/#/c/6695/</a> (merged already)</li> + <li><b><a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a> (merged already)</b></li> + <li><a href="http://review.coreboot.org/#/c/6717/">http://review.coreboot.org/#/c/6717/</a> (merged already)</li> + <li><a href="http://review.coreboot.org/#/c/6718/">http://review.coreboot.org/#/c/6718/</a> (merged already)</li> + <li> + <a href="http://review.coreboot.org/#/c/6723/">http://review.coreboot.org/#/c/6723/</a> (merged already) + (text-mode patch, might enable memtest. macbook21) + </li> + <li> + <a href="http://review.coreboot.org/#/c/6732/">http://review.coreboot.org/#/c/6732/</a> (MERGED) + (remove useless ps/2 keyboard delay from macbook21. already merged) + </li> + </ul> + </li> + <li> + These were also merged in coreboot (relates to boards that libreboot already supported): + <ul> + <li><a href="http://review.coreboot.org/#/c/5320/">http://review.coreboot.org/#/c/5320/</a> (merged)</li> + <li><a href="http://review.coreboot.org/#/c/5321/">http://review.coreboot.org/#/c/5321/</a> (merged)</li> + <li><a href="http://review.coreboot.org/#/c/5323/">http://review.coreboot.org/#/c/5323/</a> (merged)</li> + <li><a href="http://review.coreboot.org/#/c/6693/">http://review.coreboot.org/#/c/6693/</a> (merged)</li> + <li><a href="http://review.coreboot.org/#/c/6694/">http://review.coreboot.org/#/c/6694/</a> (merged)</li> + <li><a href="http://review.coreboot.org/#/c/5324/">http://review.coreboot.org/#/c/5324/</a> (merged)</li> + </ul> + </li> + <li>Documentation: removed the section about tft_brightness on X60 (new code makes it obsolete)</li> + <li>Removed all patches from resources/libreboot/patch/ and added new patch: 0000_t60_textmode.git.diff</li> + <li>Updated getcb script and DEBLOB script.</li> + <li>Updated configuration files under resources/libreboot/config/ to accomodate new coreboot version.</li> + <li> + Removed grub_serial*.cfg and libreboot_serial*.rom, all configs/rom files are now unified (containing same configuration as serial rom files from before). + <ul> + <li>Documentation: updated index.html#rom to reflect the above.</li> + </ul> + </li> + <li>Updated GRUB to new version from August 14th, 2014.</li> + <li>Unified all grub configurations for all systems to a single grub.cfg under resources/grub/config/</li> + <li>Updated flashrom to new version from August 20th, 2014</li> + <li> + Added getseabios and builddeps-seabios (builddeps and getall were also updated) + <ul> + <li> + Added instructions to 'buildrom-withgrub' to include bios.bin.elf and vgaroms/vgabios.bin from SeaBIOS inside the ROM. + </li> + </ul> + </li> + <li>Added seabios (and sgavgabios) to grub as payload option in menu</li> + <li> + Disabled serial output in Memtest86+ (no longer needed) to speed up tests. + <ul> + <li>MemTest86+ now works properly, it can output on the laptop screen (no serial port needed anymore).</li> + </ul> + </li> + <li> + Added getgrubinvaders, builddeps-grubinvaders scripts. Added these to getall and builddeps. + <ul> + <li> + Added <a href="http://www.coreboot.org/GRUB_invaders">GRUB Invaders</a> menu entry in resources/grub/config/grub.cfg + </li> + </ul> + </li> + <li>Added rules to builddeps-coreboot to build libpayload with TinyCurses. (added appropriate instructions to cleandeps script).</li> + <li>Commented out lines in resources/grub/config/grub.cfg for loading font/background (not useful anymore, now that GRUB is in text-mode).</li> + <li>Commented out lines in buildrom-withgrub that included backgrounds/fonts (not useful anymore, now that GRUB is in text-mode).</li> + <li> + Added resources/utilities/i945-pwm/ (from git://git.mtjm.eu/i945-pwm), for debugging acpi brightness on i945 systems. + <ul> + <li>Added instructions for it in builddeps, builddeps-i945pwm, builddeb and cleandeps</li> + </ul> + </li> + <li>'build' script: removed the parts that generated sha512sum manifests (not needed, since release tarballs are GPG-signed)</li> + <li> + 'build' script: removed the parts that generated libreboot_meta directory (not needed anymore, since _meta will be hosted in git) + <ul> + <li>Updated index.html#build_meta (and other parts of documentation) to accomodate this change.</li> + </ul> + </li> + <li>Documentation: simplified (refactored) the notes in index.html#rom</li> + <li> + 'build' script: removed the parts that generated libreboot_bin and added them to a new script: 'build-release' + <ul> + <li>Documentation: index.html#build updated to reflect the above.</li> + </ul> + </li> + <li>Removed 'sudo' from builddeb, builddeb-flashrom, powertop.trisquel6 and builddeb-bucts scripts (assuming that the user has it is a really bad idea).</li> + <li><s>Added all gcry_* modules to grub (luks/cryptomount): gcry_arcfour gcry_camellia gcry_crc gcry_dsa gcry_md4 gcry_rfc2268 gcry_rmd160 gcry_seed gcry_sha1 gcry_sha512 gcry_twofish gcry_blowfish gcry_cast5 gcry_des gcry_idea gcry_md5 gcry_rijndael gcry_rsa gcry_serpent gcry_sha256 gcry_tiger gcry_whirlpool</s></li> + <li>Added GNUtoo's list of GRUB modules (includes all of the gcry_* modules above), cryptomount should be working now.</li> + <li>Removed builddeb-bucts and builddeb-flashrom, merged them with builddeb (index.html updated accordingly)</li> + <li>Removed buildpac-bucts and buildpac-flashrom, merged them with buildpac (index.html updated accordingly)</li> + <li>Renamed builddeb to deps-trisquel (index.html updated accordingly)</li> + <li>Renamed buildpac to deps-parabola (index.html updated accordingly)</li> + <li>Documentation: removed all parts talking about build dependencies, replaced them with links to index.html#build_dependencies</li> + <li>Documentation: emphasized more strongly on the documentation, the need to re-build bucts and/or flashrom before flashing a ROM image.</li> + <li>build-release: flashrom, nvramtool, cbfstool and bucts are no longer provided pre-compiled in binary archives, and are now in source form only. (to maximize distro compatibility).</li> + <li>Documentation: added gnulinux/encrypted_trisquel.html showing how to setup a fully encrypted Trisquel installation (including /boot) and boot it from the GRUB payload.</li> + <li>'build' script: replaced grub.elf assembly instructons, it is now handled by a utility added under resources/utilities/grub-assemble</li> + <li>Moved resources/grub/keymap to resources/utilities/grub-assemble/keymap, and updated that utility to use it</li> + <li>Documentation: removed useless links to pictures of keyboard layouts and unmodified layouts.</li> + <li>Removed all unused fonts from dejavu-fonts-ttf-2.34/ directory</li> + <li>'buildrom-withgrub' script: updated it to create 2 sets of ROMs for each system: one with text-mode, one with coreboot framebuffer.</li> + <li>Documentation: updated index.html#rom to reflect the above</li> + <li>Deleted unused README and COPYING file from main directory</li> + <li>Removed some rm -Rf .git* instructions from the get* scripts and moved them to build-release script</li> + <li> + Split up default grub.cfg into 6 parts: extra/{common.cfg,txtmode.cfg,vesafb.cfg} and menuentries/{common.cfg,txtmode.cfg,vesafb.cfg} + <ul> + <li>buildrom-withgrub script uses these to generate the correct grub.cfg for each type of configuration.</li> + </ul> + </li> + <li>grub_memdisk.cfg (used inside grub.elf) now only loads grub.cfg from cbfs. It no longer enables serial output or sets prefix. (menuentries/common.cfg does instead)</li> + <li> + resources/grub/config/extra/common.cfg, added: + <ul> + <li>insmod instructions to load those modules: nativedisk, ehci, ohci, uhci, usb, usbserial_pl2303, usbserial_ftdi, usbserial_usbdebug</li> + <li>set prefix=(memdisk)/boot/grub</li> + <li> + For native graphics (recommended by coreboot wiki):<br/> + gfxpayload=keep<br/> + terminal_output --append gfxterm + </li> + <li> + Play a beep on startup:<br/> + play 480 440 1 + </li> + </ul> + </li> + <li> + Documentation: added note about 'fb=false' workaround for text-mode debian-installer (Trisquel net install) to + gnulinux/grub_boot_installer.html + </li> + <li> + Documentation: updated gnulinux/grub_cbfs.html to make it safer (and easier) to follow. + </li> + </ul> + + <h2> + Corrections to r20140811 (5th beta) (11th August 2014) + </h2> + <ul> + <li>Fixed typo where revision list for 5th beta was listed as March 11th 2014, when in fact it was August 11th 2014</li> + <li>Fixed incorrect grub.cfg that was actually placed in resources/grub/config/x60/grub_usqwerty.cfg which broke the default GRUB menu entry on X60</li> + </ul> + + <h2> + Revisions for r20140811 (5th beta) (11th August 2014) + </h2> + <ul> + <li>build: added 'luks', 'lvm', 'cmosdump' and 'cmostest' to the list of modules for grub.elf</li> + <li>Documentation: added pics showing T60 unbricking (still need to write a tutorial)</li> + <li>build: include cmos.layout (coreboot/src/mainboard/manufacturer/model/cmos.layout) files in libreboot_bin</li> + <li>Documentation: added <b>install/x60tablet_unbrick.html</b></li> + <li>Documentation: added <b>install/t60_unbrick.html</b></li> + <li>Documentation: added <b>install/t60_lcd_15.html</b></li> + <li>Documentation: added <b>install/t60_security.html</b></li> + <li>Documentation: added <b>install/t60_heatsink.html</b></li> + <li>Documentation: Renamed RELEASE.html to release.html</li> + <li>Documentation: removed pcmcia reference in x60_security.html (it's cardbus)</li> + <li>Documentation: added preliminary information about randomized seal (for physical intrusion detection) in x60_security.html and t60_security.html</li> + <li>Documentation: added preliminary information about preventing/mitigating cold-boot attack in x60_security.html and t60_security.html</li> + <li>Documentation: added info to index.html#macbook21 warning about issues with macbook21</li> + <li> + Documentation: X60/T60: added information about checking custom ROMs using dd to see whether or not the top 64K + region is duplicated below top or not. Advise caution about this in the tutorial that deals with flashing on top + of Lenovo BIOS, citing the correct dd commands necessary if it is confirmed that the ROM has not been applied with + dd yet. (in the case that the user compiled their own ROMs from libreboot, without using the build scripts, or if they forgot to use dd, etc). + </li> + <li> + Split resources/libreboot/patch/gitdiff into separate patch files (getcb script updated to accomodate this change). + </li> + <li>Re-added .git files to bucts</li> + <li>Fixed the oversight where macbook21_firstflash wasn't included in binary archives</li> + <li>Release archives are now compressed using .tar.xz for better compression</li> + </ul> + + <h2> + Revisions for r20140729 (4th beta) (29th July 2014) + </h2> + <ul> + <li>Documentation: improved (more explanations, background info) in docs/security/x60_security.html (courtesy of Denis Carikli)</li> + <li>MacBook2,1 tested (confirmed)</li> + <li>macbook21: Added script 'macbook21_firstflash' for flashing libreboot while Apple EFI firmware is running.</li> + <li>Documentation: macbook21: added software-based flashing instructions for flashing libreboot while Apple EFI firmware is running.</li> + <li> + Reduced size of libreboot_src.tar.gz: + <ul> + <li> + Removed .git and .gitignore from grub directory (libreboot_src); not needed. + Removing them reduces the size of the archive (by a lot). GRUB development should be upstream. + </li> + <li> + Removed .git and .gitignore from bucts directory (libreboot_src); not needed. + Removing them reduces the size of the archive. bucts development should be upstream. + </li> + <li> + Removed .svn from flashrom directory (libreboot_src); not needed. + Removing it reduces the size of the archive. flashrom development should be upstream. + </li> + </ul> + </li> + <li> + Added ROMs with Qwerty (Italian) layout in GRUB (libreboot*itqwerty.rom) + </li> + <li> + Added resources/utilities/i945gpu/intel-regs.py for debugging issues related to LCD panel compatibility on X60 Tablet and T60. (courtesy of <a href="http://mtjm.eu">Michał Masłowski</a>) + </li> + </ul> + + <h2> + Revisions for r20140720 (3rd beta) (20th July 2014) + </h2> + <ul> + <li> + Fixed typo that existed in 2nd beta where the release date of the 2nd beta was listed as being in year 2016, when in actual fact it was 2014. + </li> + <li> + Documentation: added (preliminary) details about (rare) buggy CPUs on the ThinkPad T60 that were found to fail (instability, kernel panics, etc) + without the microcode updates. + </li> + <li>Documentation: added docs/hardware/x60_heatsink.html for showing how to change the heatsink on the Thinkpad X60</li> + <li>Added ROM images for Azerty (French) keyboard layout in GRUB (courtesy of Olivier Mondoloni)</li> + <li> + Tidied up some scripts: + <ul> + <li><s>Re-factored those scripts (made easier to read/maintain): build-x60, build-x60t, build-t60, build-macbook21</s></li> + <li><s>Reduced the number of grub configs to 2 (or 1, for macbook21), the build scripts now generate the other configs at build time.</s></li> + <li>Deleted build-x60, build-x60t, build-t60, build-macbook21 and replaced with intelligent (generic) buildrom-withgrub script</li> + <li>Updated build to use buildrom-withgrub script for building the ROM images.</li> + <li>coreboot.rom and coreboot_serial.rom renamed to coreboot_usqwerty.rom and coreboot_serial_usqwerty.rom</li> + <li>coreboot_dvorak and coreboot_serial_dvorak.rom renamed to coreboot_usdvorak.rom and coreboot_serial_usdvorak.rom</li> + <li>Renamed coreboot*rom to libreboot*rom</li> + <li>Made flash, lenovobios_firstflash and lenovobios_secondflash scripts fail if the specified file does not exist.</li> + <li>Updated all relevant parts of the documentation to reflect the above.</li> + </ul> + </li> + <li>Replaced background.png with background.jpg. added gnulove.jpg. (resources/grub/background/)</li> + <li>Updated buildrom-withgrub to use background.jpg instead of background.png</li> + <li>Updated buildrom-withgrub to use gnulove.jpg aswell</li> + <li>Updated resources/grub/config/macbook21/grub*cfg to use gnulove.jpg background.</li> + <li>Updated resources/grub/config/{x60,t60,x60t}/grub*cfg to use background.jpg background.</li> + <li>Documentation: updated docs/index.html#grub_custom_keyboard to be more generally useful.</li> + <li> + nvramtool: + <ul> + <li>Updated builddeps-coreboot script to build it</li> + <li>Updated build script to include it in libreboot_bin</li> + </ul> + </li> + <li> + Documentation: added docs/security/x60_security.html (security hardening for X60) + </li> + </ul> + + <h2> + Revisions for r20140716 (2nd beta) (16th July 2014) + </h2> + <ul> + <li> + Deleted all git-related files from the coreboot directory. This was necessary because + with those it is possible to run 'git diff' which shows the changes made in the form + of a patch (diff format); this includes the blobs that were deleted during deblobbing. + </li> + </ul> + + <h2> + Revisions for r20140711 (1st beta) (11th July 2014) + </h2> + <ul> + <li>Initial release (new coreboot base, dated 1st June 2014. See 'getcb' script for reference)</li> + <li>DEBLOBBED coreboot</li> + <li>Removed the part from memtest86+ 'make' where it tried to connect to some scp server while compiling. (commented out line 24 in the Makefile)</li> + <li>X60 now uses a single .config (for coreboot)</li> + <li>X60 now uses a single grub.cfg (for grub memdisk)</li> + <li>X60 now uses a single grub.elf (payload)</li> + <li>Added new native graphics code for X60 (replaces the old 'replay' code) from Vladimir Serbinenko: 5320/9 from review.coreboot.org</li> + <li>T60 is now supported, with native graphics. (5345/4 from review.coreboot.org, cherry-picked on top of 5320/9 checkout)</li> + <li> + Added macbook2,1 support (from Mono Moosbart and Vladimir Serbinenko) from review.coreboot.org (see 'getcb' script to know how that was done) + <ul> + <li>Documentation: added information linking to correct page and talking about which models are supported.</li> + <li>Added resources/libreboot/config/macbook21config</li> + <li>macbook21: Added 'build-macbook21' script and linked to it in 'build' (ROMs included under bin/macbook21/)</li> + <li>macbook21: Removed dd instructions from build-macbook21 script (macbook21 does not need bucts when flashing libreboot while Apple EFI firmware is running)</li> + <li>Documentation: Added macbook21 ROMs to the list of ROMs in docs/index.html#rom</li> + <li>Documentation: Write documentation linking to Mono Moosbart's macbook21 and parabola page (and include a copy)</li> + </ul> + </li> + <li>Documentation: added a copy of Mono's Parabola install guide (for macbook21 with Apple EFI firmware) and linked in in main index.</li> + <li>Documentation: added a copy of Mono's Coreboot page (for macbook21) and linked it in main index.</li> + <li>T60: Copy CD option from the grub.cfg files for T60 *serial*.rom images into the grub configs for non-serial images. (T60s have CD/DVD drive on main laptop)</li> + <li>macbook21: remove options in build-macbook21 for *serial*.rom (there is no dock or serial port available for macbook21)</li> + <li> + Added patches for backlight controls on X60 and T60 with help from Denis Carikli (see ./resources/libreboot/patch/gitdiff and ./getcb and docs/i945_backlight.html) + <ul> + <li>Documentation: added docs/i945_backlight.html showing how backlight controls were made to work on X60/T60</li> + </ul> + </li> + <li> + Documentation: Added info about getting LCD panel name based on EDID data. + <ul> + <li>Documentation: Added a link to this from the list of supported T60s and LCD panels for T60 (so that the user can check what LCD panel they have).</li> + </ul> + </li> + <li> + X60/T60: Merged patches for 3D fix (from Paul Menzel) when using kernel 3.12 or higher (see ./resources/libreboot/patch/gitdiff and ./getcb) + <ul> + <li>based on 5927/11 and 5932/5 from review.coreboot.org</li> + </ul> + </li> + <li> + Improved thinkpad_acpi support (from coreboot ): xsensors shows more information. + <ul> + <li>From 4650/29 in review.coreboot.org (merged in coreboot 'master' on June 1st 2014)</li> + </ul> + </li> + <li> + Merged changes for digitizer (X60 Tablet) and IR (X60 and T60) based on 5243/17, 5242/17 and 5239/19 from review.coreboot.org + <ul> + <li>(see ./resources/libreboot/patch/gitdiff and ./getcb)</li> + </ul> + </li> + <li>Documentation: added information about building flashrom using 'builddeps-flashrom' script.</li> + <li>Re-created resources/libreboot/config/x60config</li> + <li>Re-created resources/libreboot/config/t60config</li> + <li> + Added 'x60tconfig' in resources/libreboot/config (because X60 Tablet has different information about serial/model/version in 'dmidecode') + <ul> + <li>Added 'build-x60t' script</li> + <li>Updated 'build' script to use 'build-x60t'</li> + <li>Documentation: added to #config section the section #config_x60t (libreboot configuration and dmidecode info)</li> + <li>Documentation: added x60t ROMs to the list of ROMs</li> + </ul> + </li> + <li>Tidied up the 'builddeps' script (easier to read)</li> + <li>Tidied up the 'cleandeps' script (easier to read)</li> + <li>Annotated the 'buildall' script</li> + <li>Added 'getcb' script for getting coreboot revision used from git, and patching it.</li> + <li>Added 'getgrub' script for getting the GRUB revision used from git, and patching it.</li> + <li>Added 'getmt86' script for getting the memtest86+ version used, and patching it.</li> + <li>Added 'getbucts' script for getting the bucts version used.</li> + <li>Added 'getflashrom' script for getting the flashrom version used, and patching it</li> + <li>Added 'getall' script which runs all of the other 'get' scripts.</li> + <li> + Add instructions to the 'build' script to prepare libreboot_meta.tar.gz + <ul> + <li>New archive: libreboot_meta.tar.gz - minimal archive, using the 'get' scripts to download all the dependencies (coreboot, memtest, grub and so on).</li> + </ul> + </li> + <li>Documentation: added information about where 'build' script prepares the libreboot_meta.tar.gz archive.</li> + <li> + Documentation: added information about how to use the 'get' scripts in libreboot_meta.tar.gz (to generate libreboot_src.tar.gz) + <ul> + <li>Documentation: mention that meta doesn't create libreboot_src/ directory, but that libreboot_meta itself becomes the same.</li> + <li>Documentation: advise to rename libreboot_meta to libreboot_src after running 'getall'.</li> + </ul> + </li> + <li>Annotated the 'builddeb' script, to say what each set of dependencies are for.</li> + <li>Separated bucts/flashrom builddeb sections into separate scripts: builddeb-flashrom, builddeb-bucts.</li> + <li>Documentation: Updated relevant parts based on the above.</li> + <li>Added instructions to 'build' script for including builddeb-bucts and builddeb-flashrom in libreboot_bin</li> + <li> + Updated flashrom checkout (r1822 2014-06-16) from SVN (http://flashrom.org/Downloads). + <ul> + <li>Updated flashing instructions in docs/index.html for new commands needed (Macronix chip on X60/T60)</li> + <li>For X60/T60 (flashrom): Patched flashchips.c_lenovobios_macronix and flashchips.c_lenovobios_sst executables for SST/macronix (included in resources/flashrom/patch)</li> + <li>Updated builddeps to build flashrom_lenovobios_sst and flashrom_lenovobios_macronix, for X60/T60 users with Lenovo BIOS</li> + <li>moved the flashrom build instructions from 'builddeps' and put them in 'builddeps-flashrom', excecuting that from 'builddeps'.</li> + <li>Added builddeps-flashrom to libreboot_bin.tar.gz</li> + </ul> + </li> + <li> + flashrom: added patched flashchips.c to resources/flashrom/patch (automatically use correct macronix chip on libreboot, without using '-c' switch) + <ul> + <li>removed 'MX25L1605' and 'MX25L1605A/MX25L1606E' entries in flashchips.c for the patched version of flashchips.c</li> + <li>added instructions to 'builddeps-flashrom' to automatically use this modified flashchips.c in the default build</li> + </ul> + </li> + <li>Added builddeb to libreboot_bin.tar.gz</li> + <li> + Moved 'bucts' build instructions from builddeps to builddeps-bucts + <ul> + <li>builddeps now runs 'builddeps-bucts' instead</li> + <li>Added 'builddeps-bucts' to libreboot_bin.tar.gz</li> + <li>Documentation: Added information about using 'builddep-bucts' to build the BUC.TS utility.</li> + </ul> + </li> + <li> + Added 'lenovobios_firstflash' and 'lenovobios_secondflash' scripts + <ul> + <li>Added instructions to 'build' script for including those files in libreboot_bin</li> + <li>Documentation: Add tutorial for flashing while Lenovo BIOS is running (on X60/T60)</li> + </ul> + </li> + <li> + Added 'flash' script (make sure to run builddeps-flashrom first) which (while libreboot is already running) can use flashrom to flash a ROM + <ul> + <li>eg: "sudo ./flash bin/x60/coreboot_serial_ukdvorak.rom" equivalent to "sudo ./flashrom/flashrom -p internal -w bin/x60/coreboot_uk_dvorak.rom"</li> + <li>updated 'build' script to include the 'flash' script in libreboot_bin.tar.gz</li> + </ul> + </li> + <li>Documentation: replaced default flashrom tutorial to recommend the 'flash' script instead.</li> + <li> + Re-add cbfstool source code back into libreboot_bin.tar.gz, as cbfstool_standalone + <ul> + <li>Patched that version to work (able to be built and used) without requiring the entire coreboot source code.</li> + <li> + Created patched version of the relevant source files and added it into resources/cbfstool/patch + <ul> + <li>see coreboot/util/cbfstool/rmodule.c and then the patched version in resources/cbfstool/patch/rmodule.c</li> + <li>see coreboot/src/include/rmodule-defs.h and the rule in 'build' for including this in ../libreboot_bin/cbfstool_standalone</li> + </ul> + </li> + <li>Added instructions to 'build' script for applying this patch to the cbfstool_standalone source in libreboot_bin</li> + <li>Added instructions to 'build' script for then re-compiling cbfstool_standalone in libreboot_bin after applying the patch</li> + <li>Added a 'builddeps-cbfstool' script (in src, but only used in bin and put in bin by 'build') that compiles cbfstool_standalone in libreboot_bin (make), moves the cbfstool and rmodtool binaries into libreboot_bin/ and then does 'make clean' in libreboot_bin/cbfstool_standalone</li> + <li>Updated the 'build' script to put 'builddeps-cbfstool' in libreboot_bin</li> + <li>Updated the 'build' script in the cbfstool (standalone) part to accomodate the above.</li> + <li>Documentation: added notes about cbfstool (standalone) in libreboot_bin</li> + </ul> + </li> + <li>Documentation: made docs/gnulinux/grub_cbfs.html slightly easier to follow.</li> + <li>Annotate the 'build*' scripts with 'echo' commands, to help the user understand what it actually happening during the build process.</li> + <li> + Documentation: added information about how 'dmidecode' data was put in the coreboot configs + <ul> + <li>Documentation: In fact, document how the 'config' files in resources/libreboot/config/ were created</li> + </ul> + </li> + <li>Documentation: Added information about which ThinkPad T60s are supported, and which are not.</li> + <li> + Documentation: added information about LCD inverters (for upgrading the LCD panel on a T60 14.1' XGA or 15.1' XGA) + <ul> + <li>it's FRU P/N 41W1478 (on T60 14.1") so this was added to the docs.</li> + <li>it's P/N 42T0078 FRU 42T0079 or P/N 41W1338 (on T60 15.1") so this was added to the docs.</li> + </ul> + </li> + <li>Documentation: added information about names of LCD panels for T60 to the relevant parts of the documentation.</li> + <li>Documentation: added information (with pictures) about the differences between T60 with Intel GPU and T60 with ATI GPU.</li> + <li>Documentation: added pictures of keyboard layouts (US/UK Qwerty/Dvorak) to the ROM list, to let the user compare with their own keyboard.</li> + <li> + Move the coreboot build instructions in 'builddeps' into 'builddeps-coreboot' and link it in 'builddeps' + <ul> + <li>Link to 'builddeps-coreboot' in final stage of 'getcb'</li> + </ul> + </li> + <li> + Move GRUB build instructions from 'builddeps' into 'builddeps-grub', link from 'builddeps' + <ul> + <li>Link to 'builddeps-grub' in final stage of 'getgrub'</li> + </ul> + </li> + <li> + Move MemTest86+ build instructions from 'builddeps' into 'builddeps-memtest86', link from 'builddeps' + <ul> + <li>Link to 'builddeps-memtest86' in final stage of 'getmt86'</li> + </ul> + </li> + <li>made 'build' script put resources/ directory in libreboot_bin, to make builddeps-flashrom work in libreboot_bin</li> + <li>Removed instructions for building source code in the 'get' script (they don't really belong there)</li> + <li>Added libfuse-dev and liblzma-dev to the list of GRUB dependencies in 'builddeb' script.</li> + <li>Converted the 'RELEASE' file to 'docs/RELEASE.html'</li> + <li>Added those dependencies to builddeb script (for GRUB part): gawk libdevmapper-dev libtool libfreetype6-dev</li> + <li>Added to build script the instruction at the end to create a sha512sum.txt with a file manifest plus checksums.</li> + <li>Deleted the RELEASE and BACKPORT files (no longer needed)</li> + <li> + Documentation: added information about X60/T60 dock (ultrabase x6 and advanced mini dock) to relevant sections. + <ul> + <li>Added to docs/index.html#serial</li> + </ul> + </li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="release20140622">Release 20140622 (5th release)</h1> + + <ul> + <li>7th March 2014</li> + <li>revised 22nd June 2014</li> + </ul> + + <h2>Officially supported</h2> + <ul> + <li>ThinkPad X60</li> + <li>ThinkPad X60s</li> + </ul> + + <h2>Revision (22nd June 2014 - extra)</h2> + <ul> + <li>Documentation: added X60 Unbricking tutorial</li> + <li>Documentation: added info about enabling or disabling wifi</li> + <li>Documentation: added info about enabling or disabling trackpoint</li> + </ul> + + <h2>Revision (22nd June 2014 - extra)</h2> + <ul> + <li>Documentation: Improved the instructions for using flashrom</li> + <li>Documentation: Improved the instructions for using cbfstool (to change the default GRUB menu)</li> + <li>Documentation: Numerous small fixes.</li> + </ul> + + <h2>Revision notes (22nd June 2014)</h2> + <ul> + <li>updated GRUB (git 4b8b9135f1676924a8458da528d264bbc7bbb301, 20th April 2014)</li> + <li>Made "DeJavu Sans Mono" the default font in GRUB (fixes border corruption).</li> + <li>re-added background image in GRUB (meditating GNU)</li> + <li> + added 6 more images: + <ul> + <li>coreboot_ukqwerty.rom (UK Qwerty keyboard layout in GRUB)</li> + <li>coreboot_serial_ukqwerty.rom (UK Qwerty keyboard layout in GRUB)</li> + <li>coreboot_dvorak.rom (US Dvorak keyboard layout in GRUB)</li> + <li>coreboot_serial_dvorak.rom (US Dvorak keyboard layout in GRUB)</li> + <li>coreboot_ukdvorak.rom (UK Dvorak keyboard layout in GRUB)</li> + <li>coreboot_serial_ukdvorak.rom (UK Dvorak keyboard layout in GRUB)</li> + <li>(coreboot.rom and coreboot_serial.rom have US Qwerty keyboard layout in GRUB, as usual)</li> + </ul> + </li> + <li> + improved the documentation: + <ul> + <li>removed FLASH_INSTRUCTION and README.powertop and merged them with README</li> + <li>removed obsolete info from README and tidied it up</li> + <li>deleted README (replaced with docs/index.html)</li> + </ul> + </li> + <li>tidied up the menu entries in GRUB</li> + <li>tidied up the root directory of X60_source/, sorted more files into subdirectories</li> + <li>added 'pkg-config' to the list of dependencies for building powertop on Trisquel</li> + <li>wrote a script (powertop.trisquel6) to automatically setup Powertop to run at boot time (for Trisquel 6 users)</li> + <li>improved the commenting inside the 'build' script (should make modifying it easier)</li> + <li>Renamed X60_binary.tar.gz and X60_source.tar.gz to libreboot_bin.tar.gz and libreboot_src.tar.gz, respectively.</li> + <li>Replaced "GNU GRUB version" with "FREE AS IN FREEDOM" on GNU GRUB start screen.</li> + <li>Added sha512.txt files in libreboot_src and libreboot_bin. (inside the archives)</li> + <li>Added libreboot_bin.tar.gz.sha512.txt and libreboot_src.tar.gz.sha512.txt files (outside of the archives)</li> + </ul> + + <h2>Revision notes (11th June 2014):</h2> + <ul> + <li>removed 'CD' boot option from coreboot.rom (not needed)</li> + <li>removed 'processor.max_cstate=2' and 'idle=halt' options (see README.powertop file)</li> + </ul> + + <h2>Revision notes (5th June 2014):</h2> + <ul> + <li>added backlight support (Fn+Home and Fn+End) on X60</li> + <li>fixed broken/unstable 3D when using kernel 3.12 or higher</li> + <li>(see 'BACKPORT' file)</li> + </ul> + + <h2>Revision notes (9th March 2015):</h2> + <ul> + <li>recreated coreboot config from scratch</li> + <li>GRUB loads even faster now (less than 2 seconds).</li> + <li>Total boot time reduced by further ~5 seconds.</li> + <li>Added crypto and cryptodisk modules to GRUB</li> + <li>cbfstool now included in the binary archives</li> + </ul> + + <h2>Development notes</h2> + <ul> + <li> + Binary archive now have 2 images: + <ul> + <li>With serial output enabled and memtest86+ included (debug level 8 in coreboot)</li> + <li>With serial output disabled and memtest86+ excluded (faster boot speeds) (debugging disabled)</li> + </ul> + </li> + <li> + Reduced impact on battery life: + <ul> + <li>'processor.max_cstate=2' instead of 'idle=halt' for booting default kernel</li> + </ul> + </li> + <li> + coreboot.rom (faster boot speeds, debugging disabled): + <ul> + <li>Disabled coreboot serial output (Console-> in "make menuconfig")</li> + <li>Set coreboot debug level to 0 instead of 8 (Console-> in "make menuconfig")</li> + <li>Changed GRUB timeout to 1 second instead of 2 (in grub.cfg</li> + <li>Removed background image in GRUB.</li> + <li>Removed memtest86+ payload (since it relies on serial output) + </ul> + </li> + <li> + coreboot_serial.rom (slower boot speeds, debugging enabled): + <ul> + <li>Boot time still reduced, but only by ~2 seconds</li> + <li>has the memtest86+ payload included in the ROM</li> + <li>has serial port enabled. How this is achieved (from X60_source): Turn on debugging level to 8, and enable serial output</li> + </ul> + </li> + <li>(in Console-> in coreboot "make menuconfig")</li> + <li>(and build with grub_serial.cfg and grub_memdisk_serial.cfg)</li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="release20140221">Release 20140221 (4th release)</h1> + + <ul> + <li>21st February 2014</li> + </ul> + + <h2>Officially supported</h2> + <ul> + <li>ThinkPad X60</li> + <li>ThinkPad X60s</li> + </ul> + + <h2>Development notes</h2> + <ul> + <li>Removed SeaBIOS (redundant)</li> + <li> + New GRUB version (2.02~beta2) + <ul> + <li>Fixes some USB issues</li> + <li>Includes ISOLINUX/SYSLINUX parser</li> + </ul> + </li> + <li>New grub.cfg</li> + <li> + Removed useless options: + <ul> + <li>options for booting sda 2/3/4</li> + <li>seabios boot option</li> + </ul> + </li> + <li> + Added new menu entries: + <ul> + <li>Parse ISOLINUX config (USB)</li> + <li>Parse ISOLINUX config (CD)</li> + <li>Added 'cat' module for use on GRUB command line.</li> + </ul> + </li> + <li>"set pager=1" is set in grub.cfg, for less-like functionality</li> + </ul> + <p> + The "Parse" options read ./isolinux/isolinux.cfg on a CD or USB, + and automatically converts it to a grub config and switches to the boot menu of that distro. + This makes booting ISOs *much* easier than before. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="release20131214">r20131214 (3rd release)</h1> + + <ul> + <li>14th December 2013</li> + </ul> + + <h2>Supported:</h2> + <ul> + <li>ThinkPad X60</li> + <li>ThinkPad X60s</li> + </ul> + + <h2>Development notes</h2> + <ul> + <li>Added SeaBIOS payload to GRUB2 (for booting USB drives)</li> + <li>new grub.cfg</li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="release20131213">r20131213 (2nd release)</h1> + + <ul> + <li>13th December 2013</li> + </ul> + + <h2>Supported:</h2> + <ul> + <li>ThinkPad X60</li> + <li>ThinkPad X60s</li> + </ul> + + <h2>Development notes</h2> + <ul> + <li>added background image to GRUB2</li> + <li>added memtest86+ payload to grub2</li> + <li>improvements to the documentation</li> + <li>new grub.cfg</li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="release20131212">r20131212 (1st release)</h1> + + <ul> + <li>12th December 2013</li> + </ul> + + <h2>Supported:</h2> + <ul> + <li>ThinkPad X60</li> + <li>ThinkPad X60s</li> + </ul> + + <h2>Development notes</h2> + <ul> + <li>initial release</li> + <li>source code deblobbed</li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="gfdl-1.3.txt">gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/constants.texi b/docs/constants.texi new file mode 100644 index 00000000..57da65ad --- /dev/null +++ b/docs/constants.texi @@ -0,0 +1,2 @@ +@set docsdir ../resources/ +@set useinstall diff --git a/docs/css/main.css b/docs/css/main.css new file mode 100644 index 00000000..f20432a3 --- /dev/null +++ b/docs/css/main.css @@ -0,0 +1,80 @@ +/* + + Main CSS stylesheet for libreboot.org (documentation section) + + Copyright (C) 2014, 2015 Leah Rowe <info@minifree.org> + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +body { + background:#dfdfdf; + color:#2B2B2B; + font-family:Lato,sans-serif; + font-size:0.92em; + font-weight:400; + padding:0px; + margin:0px; +} +div.section { + background:#FFF; + border-radius:0.5em; + box-shadow: 0px 0px 5px 0px rgba(50, 50, 50, 0.75); + padding:1em; + margin:1em; +} +p, aside, li { + margin: 0.33em 0px 0.6em; + text-align:justify; +} +a { + color:#2B2BAA; + font-size:1.1em; +} +a:hover { + text-decoration:none; +} +h1,h2,h3 { + margin-bottom:0.2em; + margin-top:0.2em; +} +img { + max-width:100%; + height:auto; + border:solid 0.5em #fff; + border-radius:0.25em; + box-shadow: 0px 0px 5px 0px rgba(50, 50, 50, 0.75); + margin:0px; + padding:0px; + margin-right:1em; + margin-bottom:1em; +} + +p.lenovobios { + font-weight:bold; color:#f00; font-style:italic; font-size:1.2em; +} +p.lenovobios:hover { + color: #000; +} +div.important, pre, div.subsection { + padding:1em; + margin-bottom:1em; + background-color:#ece0e2; + border-radius:0.25em; + box-shadow: 0px 0px 5px 0px rgba(50, 50, 50, 0.75); +} + +.photos p { + text-align:left; +} diff --git a/docs/depthcharge/index.html b/docs/depthcharge/index.html new file mode 100644 index 00000000..210cde55 --- /dev/null +++ b/docs/depthcharge/index.html @@ -0,0 +1,362 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Depthcharge payload</title> +</head> + +<body> + + <div class="section"> + + <h1 id="pagetop">Depthcharge payload</h1> + + <p> + This section relates to the depthcharge payload used in libreboot. + </p> + + <p> + Or <a href="../index.html">Back to main index</a>. + </p> + + <ul> + <li><a href="#cros_security_model">CrOS security model</a></li> + <li><a href="#developer_mode_screen">Developer mode screen</a> + <ul> + <li><a href="#holding_developer_mode_screen">Holding the developer mode screen</li> + <li><a href="#booting_normally">Booting normally</li> + <li><a href="#booting_different_mediums">Booting from different mediums</li> + <li><a href="#showing_device_information">Showing device information</li> + <li><a href="#warnings">Warnings</li> + </ul> + </li> + <li><a href="#recovery_mode_screen">Recovery mode screen</a> + <ul> + <li><a href="#recovering_bad_state">Recovering from a bad state</a></li> + <li><a href="#enabling_developer_mode">Enabling developer mode</a></li> + </ul> + </li> + <li><a href="#configuring_verified_boot_parameters">Configuring verified boot parameters</a></li> + </ul> + + </div> + + <div class="section"> + + <h1 id="cros_security_model">CrOS security model</h1> + + <p> + CrOS (Chromium OS/Chrome OS) devices such as Chromebooks implement a strict security model to ensure that these devices do not become compromised, + that is implemented as the verified boot (vboot) reference, most of which is executed within depthcharge. + A detailed overview of the CrOS security model is available on the dedicated page. + </p> + + <div class="subsection"> + + <p> + In spite of the CrOS security model, depthcharge won't allow booting kernels without verifying their signature and booting from external media or legacy payload unless explicitly allowed: see <a href="#configuring_verified_boot_parameters">configuring verified boot parameters</a>. + </p> + + </div> + + </div> + + <div class="section"> + + <h1 id="developer_mode_screen">Developer mode screen</h1> + + <p> + The developer mode screen can be accessed in depthcharge when developer mode is enabled.<br /> + Developer mode can be enabled from the <a href="#recovery_mode_screen">recovery mode screen</a>. + </p> + + <p> + It allows booting normally, booting from internal storage, booting from external media (when enabled), booting from legacy payload (when enabled), showing information about the device and disabling developer mode. + </p> + + <div class="subsection"> + + <h2 id="holding_developer_mode_screen">Holding the developer mode screen</h2> + + <p> + As instructed on the developer mode screen, the screen can be held by pressing <b>Ctrl + H</b> in the first 3 seconds after the screen is shown. + After that delay, depthcharge will resume booting normally. + </p> + + </div> + + <div class="subsection"> + + <h2 id="booting_normally">Booting normally</h2> + + <p> + As instructed on the developer mode screen, a regular boot will happen after <b>3 seconds</b> (if developer mode screen is not held).<br /> + The default boot medium (internal storage, external media, legacy payload) is shown on screen. + </p> + + </div> + + <div class="subsection"> + + <h2 id="booting_different_mediums">Booting from different mediums</h2> + + <p> + Depthcharge allows booting from different mediums, when they are allowed (see <a href="#configuring_verified_boot_parameters">configuring verified boot parameters</a> to enable or disable boot mediums).<br /> + As instructed on the developer mode screen, booting from various mediums can be triggered by pressing various key combinations: + </p> + + <ul> + <li>Internal storage: <b>Ctrl + D</b></li> + <li>External media: <b>Ctrl + U</b> (when enabled)</li> + <li>Legacy payload: <b>Ctrl + L</b> (when enabled)</li> + </ul> + + </div> + + <div class="subsection"> + + <h2 id="showing_device_information">Showing device information</h2> + + <p> + As instructed on the developer mode screen, showing device information can be triggered by pressing <b>Ctrl + I</b> or <b>Tab</b>.<br /> + Various information is shown, including vboot non-volatile data, TPM status, GBB flags and key hashes.<br /> + </p> + + </div> + + <div class="subsection"> + + <h2 id="warnings">Warnings</h2> + + <p> + The developer mode screen will show warnings when: + + <ul> + <li>Booting kernels without verifying their signature is enabled</li> + <li>Booting from external media is enabled</li> + <li>Booting legacy payloads is enabled</li> + </ul> + + </p> + + </div> + + </div> + + <div class="section"> + + <h1 id="recovery_mode_screen">Recovery mode screen</h1> + + <p> + The recovery mode screen can be accessed in depthcharge, by pressing <b>Escape + Refresh + Power</b> when the device is off. + </p> + + <p> + It allows recovering the device from a bad state by booting from a trusted recovery media. + When accessed with the device in a good state, it also allows enabling developer mode. + </p> + + <div class="subsection"> + + <h2 id="recovering_bad_state">Recovering from a bad state</h2> + + <p> + When the device fails to verify the signature of a piece of the boot software or when an error occurs, + it is considered to be in a bad state and will instruct the user to reboot to recovery mode.<br /> + Recovery mode boots using only software located in write-protected memory, that is considered to be trusted and safe. + </p> + + <p> + Recovery mode then allows recovering the device by booting from a trusted recovery media, that is automatically detected when recovery mode starts. + When no external media is found or when the recovery media is invalid, instructions are shown on screen. <br /> + Trusted recovery media are external media (USB drives, SD cards, etc) that hold a kernel signed with the recovery key. + </p> + + <p> + Google provides images of such recovery media for Chrome OS (which are not advised to users as they contain proprietary software). <br /> + They are signed with Google's recovery keys, that are pre-installed on the device when it ships. + </p> + + <p> + When replacing the full flash of the device, the pre-installed keys are replaced. + When the recovery private key is available (e.g. when using self-generated keys), it can be used to sign a kernel for recovery purposes. + </p> + + </div> + + <div class="subsection"> + + <h2 id="enabling_developer_mode">Enabling developer mode</h2> + + <p> + As instructed on the recovery mode screen, developer mode can be enabled by pressing <b>Ctrl + D</b>.<br /> + Instructions to confirm enabling developer mode are then shown on screen. + </p> + + </div> + + </div> + + <div class="section"> + + <h1 id="configuring_verified_boot_parameters">Configuring verified boot parameters</h1> + + <p> + Depthcharge's behavior relies on the verified boot (vboot) reference implementation, + that can be configured with parameters stored in the verified boot non-volatile storage.<br /> + These parameters can be modified with the <b>crossystem</b> tool, that requires sufficient privileges to access the verified boot non-volatile storage. + </p> + + <p> + <b>crossystem</b> relies on <b>mosys</b>, that is used to access the verified boot non-volatile storage on some devices. + <b>crossystem</b> and <b>mosys</b> are both free software and their source code is made available by Google: <a href="https://chromium.googlesource.com/chromiumos/platform/vboot_reference/">crossystem</a>. <a href="https://chromium.googlesource.com/chromiumos/platform/mosys/">mosys</a>.<br /> + These tools are not distributed along with Libreboot yet. However, they are preinstalled on the device, with ChromeOS. + </p> + + <p> + Some of these parameters have the potential of <b>weakening the security of the device</b>. + In particular, disabling kernels signature verification, external media boot and legacy payload boot can weaken the security of the device. + </p> + + <div class="subsection"> + + <p> + The following parameters can be configured: + </p> + + <ul> + + <li> + Kernels signature verification: + <ul> + + <li> + Enabled with:<br /> + # <b>crossystem dev_boot_signed_only=1</b> + </li> + + <li> + Disabled with:<br /> + # <b>crossystem dev_boot_signed_only=0</b> + </li> + + </ul> + </li> + + <li> + External media boot: + <ul> + + <li> + Enabled with:<br /> + # <b>crossystem dev_boot_usb=1</b> + </li> + + <li> + Disabled with:<br /> + # <b>crossystem dev_boot_usb=0</b> + </li> + + </ul> + </li> + + <li> + Legacy payload boot: + <ul> + + <li> + Enabled with:<br /> + # <b>crossystem dev_boot_legacy=1</b> + </li> + + <li> + Disabled with:<br /> + # <b>crossystem dev_boot_legacy=0</b> + </li> + + </ul> + </li> + + <li> + Default boot medium: + <ul> + + <li> + Internal storage:<br /> + # <b>crossystem dev_default_boot=disk</b> + </li> + + <li> + External media:<br /> + # <b>crossystem dev_default_boot=usb</b> + </li> + + <li> + Legacy payload:<br /> + # <b>crossystem dev_default_boot=legacy</b> + </li> + + </ul> + + </ul> + + </div> + + </div> + + <div class="section"> + + <p> + Copyright © 2015 Paul Kocialkowski <contact@paulk.fr><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/future/coreboot_native_3.12_bug.tar.gz b/docs/future/coreboot_native_3.12_bug.tar.gz Binary files differnew file mode 100644 index 00000000..3564198a --- /dev/null +++ b/docs/future/coreboot_native_3.12_bug.tar.gz diff --git a/docs/future/donotusethis_macbook_acpi.diff b/docs/future/donotusethis_macbook_acpi.diff new file mode 100644 index 00000000..61a55c64 --- /dev/null +++ b/docs/future/donotusethis_macbook_acpi.diff @@ -0,0 +1,28 @@ +diff --git a/src/mainboard/apple/macbook21/mainboard.c b/src/mainboard/apple/macbook21/mainboard.c +index 9a025dd..a2adb76 100644 +--- a/src/mainboard/apple/macbook21/mainboard.c ++++ b/src/mainboard/apple/macbook21/mainboard.c +@@ -40,6 +40,12 @@ + extern const u32 *cim_verb_data; + extern u32 cim_verb_data_size; + ++static acpi_cstate_t cst_entries[] = { ++ { 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } }, ++ { 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } }, ++ { 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } }, ++}; ++ + #if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE + static int int15_handler(void) + { +@@ -73,7 +79,8 @@ static int int15_handler(void) + + int get_cst_entries(acpi_cstate_t **entries) + { +- return 0; ++ *entries = cst_entries; ++ return ARRAY_SIZE(cst_entries); + } + + static void mainboard_init(device_t dev) + diff --git a/docs/future/dumps/5320_7c0000_gma.c b/docs/future/dumps/5320_7c0000_gma.c new file mode 100644 index 00000000..04a70dca --- /dev/null +++ b/docs/future/dumps/5320_7c0000_gma.c @@ -0,0 +1,519 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <bootmode.h> +#include <delay.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <pc80/mc146818rtc.h> +#include "i945.h" +#include "chip.h" +#include <edid.h> +#include <drivers/intel/gma/edid.h> +#include <drivers/intel/gma/i915.h> +#include <string.h> + +#define GDRST 0xc0 + +#define LVDS_CLOCK_A_POWERUP_ALL (3 << 8) +#define LVDS_CLOCK_B_POWERUP_ALL (3 << 4) +#define LVDS_CLOCK_BOTH_POWERUP_ALL (3 << 2) +#define DISPPLANE_BGRX888 (0x6<<26) +#define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ + +#define DPLL_INTEGRATED_CRI_CLK_VLV (1<<14) + +#define PGETBL_CTL 0x2020 +#define PGETBL_ENABLED 0x00000001 + +#define BASE_FREQUENCY 120000 + +#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT + +static int gtt_setup(unsigned int mmiobase) +{ + unsigned long PGETBL_save; + + PGETBL_save = read32(mmiobase + PGETBL_CTL) & ~PGETBL_ENABLED; + PGETBL_save |= PGETBL_ENABLED; + + PGETBL_save |= pci_read_config32(dev_find_slot(0, PCI_DEVFN(2,0)), 0x5c) & 0xfffff000; + PGETBL_save |= 2; /* set GTT to 256kb */ + + // hack!!! + PGETBL_save += 0x7c0000; // ugly hack. from 5927/3. Must calculate it properly! + /// hack!!! + + write32(mmiobase + GFX_FLSH_CNTL, 0); + + write32(mmiobase + PGETBL_CTL, PGETBL_save); + + /* verify */ +/* // old + if (read32(mmiobase + PGETBL_CTL) & PGETBL_ENABLED) { + printk(BIOS_DEBUG, "gtt_setup is enabled.\n"); +*/ + // Hack. Must do properly later: + PGETBL_save = read32(mmiobase + PGETBL_CTL); + if (PGETBL_save & PGETBL_ENABLED) { + printk(BIOS_DEBUG, "gtt_setup is enabled: GTT PGETLB_CTL register: 0x%lx\n", PGETBL_save); + // end hack + } else { + printk(BIOS_DEBUG, "gtt_setup failed!!!\n"); + return 1; + } + write32(mmiobase + GFX_FLSH_CNTL, 0); + + return 0; +} + +static int intel_gma_init(struct northbridge_intel_i945_config *conf, + unsigned int pphysbase, unsigned int piobase, + unsigned int pmmio, unsigned int pgfx) +{ + struct edid edid; + u8 edid_data[128]; + unsigned long temp; + int hpolarity, vpolarity; + u32 candp1, candn; + u32 best_delta = 0xffffffff; + u32 target_frequency; + u32 pixel_p1 = 1; + u32 pixel_n = 1; + u32 pixel_m1 = 1; + u32 pixel_m2 = 1; + u32 hactive, vactive, right_border, bottom_border; + u32 vsync, hsync, vblank, hblank, hfront_porch, vfront_porch; + u32 i, j; + + pphysbase += 0x20000; + + printk(BIOS_SPEW, + "i915lightup: graphics %p mmio %08x addrport %04x physbase %08x\n", + (void *)pgfx, pmmio, piobase, pphysbase); + + intel_gmbus_read_edid(pmmio + GMBUS0, 3, 0x50, edid_data, 128); + decode_edid(edid_data, sizeof(edid_data), &edid); + + hpolarity = (edid.phsync == '-'); + vpolarity = (edid.pvsync == '-'); + hactive = edid.x_resolution; + vactive = edid.y_resolution; + right_border = edid.hborder; + bottom_border = edid.vborder; + vblank = edid.vbl; + hblank = edid.hbl; + vsync = edid.vspw; + hsync = edid.hspw; + hfront_porch = edid.hso; + vfront_porch = edid.vso; + + for (i = 0; i < 2; i++) + for (j = 0; j < 0x100; j++) + /* R=j, G=j, B=j. */ + write32(pmmio + PALETTE(i) + 4 * j, 0x10101 * j); + + write32(pmmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS + | (read32(pmmio + PCH_PP_CONTROL) & ~PANEL_UNLOCK_MASK)); + + write32(pmmio + MI_ARB_STATE, MI_ARB_C3_LP_WRITE_ENABLE | (1 << 27)); + /* Clean registers. */ + for (i = 0; i < 0x20; i += 4) + write32(pmmio + RENDER_RING_BASE + i, 0); + for (i = 0; i < 0x20; i += 4) + write32(pmmio + FENCE_REG_965_0 + i, 0); + write32(pmmio + PP_ON_DELAYS, 0); + write32(pmmio + PP_OFF_DELAYS, 0); + + /* Disable VGA. */ + write32(pmmio + VGACNTRL, VGA_DISP_DISABLE); + + /* Disable pipes. */ + write32(pmmio + PIPECONF(0), 0); + write32(pmmio + PIPECONF(1), 0); + + /* Init PRB0. */ + write32(pmmio + HWS_PGA, 0x352d2000); + write32(pmmio + PRB0_CTL, 0); + write32(pmmio + PRB0_HEAD, 0); + write32(pmmio + PRB0_TAIL, 0); + write32(pmmio + PRB0_START, 0); + write32(pmmio + PRB0_CTL, 0x0001f001); + + write32(pmmio + D_STATE, DSTATE_PLL_D3_OFF + | DSTATE_GFX_CLOCK_GATING | DSTATE_DOT_CLOCK_GATING); + write32(pmmio + ECOSKPD, 0x00010000); + write32(pmmio + HWSTAM, 0xeffe); + write32(pmmio + PORT_HOTPLUG_EN, conf->gpu_hotplug); + write32(pmmio + INSTPM, 0x08000000 | INSTPM_AGPBUSY_DIS); + + target_frequency = conf->gpu_lvds_is_dual_channel ? edid.pixel_clock + : (2 * edid.pixel_clock); + + /* Find suitable divisors. */ + for (candp1 = 1; candp1 <= 8; candp1++) { + for (candn = 5; candn <= 10; candn++) { + u32 cur_frequency; + u32 m; /* 77 - 131. */ + u32 denom; /* 35 - 560. */ + u32 current_delta; + + denom = candn * candp1 * 7; + /* Doesnt overflow for up to + 5000000 kHz = 5 GHz. */ + m = (target_frequency * denom + + BASE_FREQUENCY / 2) / BASE_FREQUENCY; + + if (m < 77 || m > 131) + continue; + + cur_frequency = (BASE_FREQUENCY * m) / denom; + if (target_frequency > cur_frequency) + current_delta = target_frequency - cur_frequency; + else + current_delta = cur_frequency - target_frequency; + + if (best_delta > current_delta) { + best_delta = current_delta; + pixel_n = candn; + pixel_p1 = candp1; + pixel_m2 = ((m + 3) % 5) + 7; + pixel_m1 = (m - pixel_m2) / 5; + } + } + } + + if (best_delta == 0xffffffff) { + printk (BIOS_ERR, "Couldn't find GFX clock divisors\n"); + return -1; + } + + printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n", + hactive, vactive); + printk(BIOS_DEBUG, "Borders %d x %d\n", right_border, bottom_border); + printk(BIOS_DEBUG, "Blank %d x %d\n", hblank, vblank); + printk(BIOS_DEBUG, "Sync %d x %d\n", hsync, vsync); + printk(BIOS_DEBUG, "Front porch %d x %d\n", hfront_porch, vfront_porch); + printk(BIOS_DEBUG, (conf->gpu_lvds_use_spread_spectrum_clock + ? "Spread spectrum clock\n" + : "DREF clock\n")); + printk(BIOS_DEBUG, (conf->gpu_lvds_is_dual_channel + ? "Dual channel\n" + : "Single channel\n")); + printk(BIOS_DEBUG, "Polarities %d, %d\n", + hpolarity, vpolarity); + printk(BIOS_DEBUG, "Pixel N=%d, M1=%d, M2=%d, P1=%d\n", + pixel_n, pixel_m1, pixel_m2, pixel_p1); + printk(BIOS_DEBUG, "Pixel clock %d kHz\n", + BASE_FREQUENCY * (5 * pixel_m1 + pixel_m2) / pixel_n + / (pixel_p1 * 7)); + + write32(pmmio + DSPCNTR(0), DISPPLANE_BGRX888 + | DISPPLANE_SEL_PIPE_B | DISPPLANE_GAMMA_ENABLE); + + mdelay(1); + write32(pmmio + PP_CONTROL, PANEL_UNLOCK_REGS + | (read32(pmmio + PP_CONTROL) & ~PANEL_UNLOCK_MASK)); + write32(pmmio + FP0(1), + ((pixel_n - 2) << 16) + | ((pixel_m1 - 2) << 8) | pixel_m2); + write32(pmmio + DPLL(1), + DPLL_VGA_MODE_DIS | + DPLL_VCO_ENABLE | DPLLB_MODE_LVDS + | (conf->gpu_lvds_is_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 + : DPLLB_LVDS_P2_CLOCK_DIV_14) + | (conf->gpu_lvds_use_spread_spectrum_clock + ? DPLL_INTEGRATED_CLOCK_VLV | DPLL_INTEGRATED_CRI_CLK_VLV + : 0) + | (pixel_p1 << 16) + | (pixel_p1)); + mdelay(1); + write32(pmmio + DPLL(1), + DPLL_VGA_MODE_DIS | + DPLL_VCO_ENABLE | DPLLB_MODE_LVDS + | (conf->gpu_lvds_is_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 + : DPLLB_LVDS_P2_CLOCK_DIV_14) + | ((conf->gpu_lvds_use_spread_spectrum_clock ? 3 : 0) << 13) + | (pixel_p1 << 16) + | (pixel_p1)); + mdelay(1); + write32(pmmio + HTOTAL(1), + ((hactive + right_border + hblank - 1) << 16) + | (hactive - 1)); + write32(pmmio + HBLANK(1), + ((hactive + right_border + hblank - 1) << 16) + | (hactive + right_border - 1)); + write32(pmmio + HSYNC(1), + ((hactive + right_border + hfront_porch + hsync - 1) << 16) + | (hactive + right_border + hfront_porch - 1)); + + write32(pmmio + VTOTAL(1), ((vactive + bottom_border + vblank - 1) << 16) + | (vactive - 1)); + write32(pmmio + VBLANK(1), ((vactive + bottom_border + vblank - 1) << 16) + | (vactive + bottom_border - 1)); + write32(pmmio + VSYNC(1), + (vactive + bottom_border + vfront_porch + vsync - 1) + | (vactive + bottom_border + vfront_porch - 1)); + + write32(pmmio + PIPESRC(1), ((hactive - 1) << 16) | (vactive - 1)); + + /* Disable panel fitter (we're in native resolution). */ + write32(pmmio + PF_CTL(0), 0); + write32(pmmio + PF_WIN_SZ(0), 0); + write32(pmmio + PF_WIN_POS(0), 0); + write32(pmmio + PFIT_PGM_RATIOS, 0); + write32(pmmio + PFIT_CONTROL, 0); + + mdelay(1); + + write32(pmmio + DSPSIZE(0), (hactive - 1) | ((vactive - 1) << 16)); + write32(pmmio + DSPPOS(0), 0); + + /* Backlight init. */ + write32(pmmio + FW_BLC_SELF, FW_BLC_SELF_EN_MASK); + write32(pmmio + FW_BLC, 0x011d011a); + write32(pmmio + FW_BLC2, 0x00000102); + write32(pmmio + FW_BLC_SELF, FW_BLC_SELF_EN_MASK); + write32(pmmio + FW_BLC_SELF, 0x0001003f); + write32(pmmio + FW_BLC, 0x011d0109); + write32(pmmio + FW_BLC2, 0x00000102); + write32(pmmio + FW_BLC_SELF, FW_BLC_SELF_EN_MASK); + write32(pmmio + BLC_PWM_CTL, conf->gpu_backlight); + + edid.bytes_per_line = (edid.bytes_per_line + 63) & ~63; + write32(pmmio + DSPADDR(0), 0); + write32(pmmio + DSPSURF(0), 0); + write32(pmmio + DSPSTRIDE(0), edid.bytes_per_line); + write32(pmmio + DSPCNTR(0), DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888 + | DISPPLANE_SEL_PIPE_B | DISPPLANE_GAMMA_ENABLE); + mdelay(1); + + write32(pmmio + PIPECONF(1), PIPECONF_ENABLE); + write32(pmmio + LVDS, LVDS_ON + | (hpolarity << 20) | (vpolarity << 21) + | (conf->gpu_lvds_is_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) + | LVDS_CLOCK_A_POWERUP_ALL + | LVDS_PIPE(1)); + + write32(pmmio + PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_OFF); + write32(pmmio + PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_RESET); + mdelay(1); + write32(pmmio + PP_CONTROL, PANEL_UNLOCK_REGS + | PANEL_POWER_ON | PANEL_POWER_RESET); + + printk (BIOS_DEBUG, "waiting for panel powerup\n"); + while (1) { + u32 reg32; + reg32 = read32(pmmio + PP_STATUS); + if ((reg32 & PP_SEQUENCE_MASK) == PP_SEQUENCE_NONE) + break; + } + printk (BIOS_DEBUG, "panel powered up\n"); + + write32(pmmio + PP_CONTROL, PANEL_POWER_ON | PANEL_POWER_RESET); + + /* Clear interrupts. */ + write32(pmmio + DEIIR, 0xffffffff); + write32(pmmio + SDEIIR, 0xffffffff); + write32(pmmio + IIR, 0xffffffff); + write32(pmmio + IMR, 0xffffffff); + write32(pmmio + EIR, 0xffffffff); + + /* GTT is the Global Translation Table for the graphics pipeline. + * It is used to translate graphics addresses to physical + * memory addresses. As in the CPU, GTTs map 4K pages. + * There are 32 bits per pixel, or 4 bytes, + * which means 1024 pixels per page. + * There are 4250 GTTs on Link: + * 2650 (X) * 1700 (Y) pixels / 1024 pixels per page. + * The setgtt function adds a further bit of flexibility: + * it allows you to set a range (the first two parameters) to point + * to a physical address (third parameter);the physical address is + * incremented by a count (fourth parameter) for each GTT in the + * range. + * Why do it this way? For ultrafast startup, + * we can point all the GTT entries to point to one page, + * and set that page to 0s: + * memset(physbase, 0, 4096); + * setgtt(0, 4250, physbase, 0); + * this takes about 2 ms, and is a win because zeroing + * the page takes a up to 200 ms. We will be exploiting this + * trick in a later rev of this code. + * This call sets the GTT to point to a linear range of pages + * starting at physbase. + */ + + if (gtt_setup(pmmio)) { + printk(BIOS_ERR, "ERROR: GTT Setup Failed!!!\n"); + return 0; + } + + /* Setup GTT. */ + for (i = 0; i < 0x2000; i++) + { + outl((i << 2) | 1, piobase); + outl(pphysbase + (i << 12) + 1, piobase + 4); + } + + temp = read32(pmmio + PGETBL_CTL); + printk(BIOS_INFO, "GTT PGETBL_CTL register: 0x%lx\n", temp); + + if (temp & 1) + printk(BIOS_INFO, "GTT Enabled\n"); + else + printk(BIOS_ERR, "ERROR: GTT is still Disabled!!!\n"); + + printk(BIOS_SPEW, "memset %p to 0x00 for %d bytes\n", + (void *)pgfx, hactive * vactive * 4); + memset((void *)pgfx, 0x00, hactive * vactive * 4); + + set_vbe_mode_info_valid(&edid, pgfx); + + return 0; +} +#endif + +static void gma_func0_init(struct device *dev) +{ + u32 reg32; + + /* Unconditionally reset graphics */ + pci_write_config8(dev, GDRST, 1); + udelay(50); + pci_write_config8(dev, GDRST, 0); + /* wait for device to finish */ + while (pci_read_config8(dev, GDRST) & 1) { }; + + /* IGD needs to be Bus Master */ + reg32 = pci_read_config32(dev, PCI_COMMAND); + pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER + | PCI_COMMAND_IO | PCI_COMMAND_MEMORY); + +#if !CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT + /* PCI Init, will run VBIOS */ + pci_dev_init(dev); +#endif + + +#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT + /* This should probably run before post VBIOS init. */ + printk(BIOS_SPEW, "Initializing VGA without OPROM.\n"); + u32 iobase, mmiobase, graphics_base; + struct northbridge_intel_i945_config *conf = dev->chip_info; + + iobase = dev->resource_list[1].base; + mmiobase = dev->resource_list[0].base; + graphics_base = dev->resource_list[2].base; + + printk(BIOS_SPEW, "GMADR=0x%08x GTTADR=0x%08x\n", + pci_read_config32(dev, 0x18), + pci_read_config32(dev, 0x1c) + ); + + int err; + err = intel_gma_init(conf, pci_read_config32(dev, 0x5c) & ~0xf, + iobase, mmiobase, graphics_base); + if (err == 0) + gfx_set_init_done(1); +#endif +} + +/* This doesn't reclaim stolen UMA memory, but IGD could still + be reenabled later. */ +static void gma_func0_disable(struct device *dev) +{ + struct device *dev_host = dev_find_slot(0, PCI_DEVFN(0x0, 0)); + + pci_write_config16(dev, GCFC, 0xa00); + pci_write_config16(dev_host, GGC, (1 << 1)); + + unsigned int reg32 = pci_read_config32(dev_host, DEVEN); + reg32 &= ~(DEVEN_D2F0 | DEVEN_D2F1); + pci_write_config32(dev_host, DEVEN, reg32); + + dev->enabled = 0; +} + +static void gma_func1_init(struct device *dev) +{ + u32 reg32; + u8 val; + + /* IGD needs to be Bus Master, also enable IO accesss */ + reg32 = pci_read_config32(dev, PCI_COMMAND); + pci_write_config32(dev, PCI_COMMAND, reg32 | + PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO); + + if (get_option(&val, "tft_brightness") == CB_SUCCESS) + pci_write_config8(dev, 0xf4, val); + else + pci_write_config8(dev, 0xf4, 0xff); +} + +static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device) +{ + if (!vendor || !device) { + pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, + pci_read_config32(dev, PCI_VENDOR_ID)); + } else { + pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, + ((device & 0xffff) << 16) | (vendor & 0xffff)); + } +} + +static struct pci_operations gma_pci_ops = { + .set_subsystem = gma_set_subsystem, +}; + +static struct device_operations gma_func0_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = gma_func0_init, + .scan_bus = 0, + .enable = 0, + .disable = gma_func0_disable, + .ops_pci = &gma_pci_ops, +}; + + +static struct device_operations gma_func1_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = gma_func1_init, + .scan_bus = 0, + .enable = 0, + .ops_pci = &gma_pci_ops, +}; + +static const struct pci_driver i945_gma_func0_driver __pci_driver = { + .ops = &gma_func0_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .device = 0x27a2, +}; + +static const struct pci_driver i945_gma_func1_driver __pci_driver = { + .ops = &gma_func1_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .device = 0x27a6, +}; diff --git a/docs/future/dumps/5885_logs.tar.gz b/docs/future/dumps/5885_logs.tar.gz Binary files differnew file mode 100644 index 00000000..599445e7 --- /dev/null +++ b/docs/future/dumps/5885_logs.tar.gz diff --git a/docs/future/dumps/5885_logs_2.tar.gz b/docs/future/dumps/5885_logs_2.tar.gz Binary files differnew file mode 100644 index 00000000..a3381b4c --- /dev/null +++ b/docs/future/dumps/5885_logs_2.tar.gz diff --git a/docs/future/dumps/5927_2.tar.gz b/docs/future/dumps/5927_2.tar.gz Binary files differnew file mode 100644 index 00000000..39a794b4 --- /dev/null +++ b/docs/future/dumps/5927_2.tar.gz diff --git a/docs/future/dumps/5927_3.tar.gz b/docs/future/dumps/5927_3.tar.gz Binary files differnew file mode 100644 index 00000000..484acc60 --- /dev/null +++ b/docs/future/dumps/5927_3.tar.gz diff --git a/docs/future/dumps/5927_5.tar.gz b/docs/future/dumps/5927_5.tar.gz Binary files differnew file mode 100644 index 00000000..31ba59f7 --- /dev/null +++ b/docs/future/dumps/5927_5.tar.gz diff --git a/docs/future/dumps/5927_6.tar.gz b/docs/future/dumps/5927_6.tar.gz Binary files differnew file mode 100644 index 00000000..09810f05 --- /dev/null +++ b/docs/future/dumps/5927_6.tar.gz diff --git a/docs/future/dumps/5927_7.tar.gz b/docs/future/dumps/5927_7.tar.gz Binary files differnew file mode 100644 index 00000000..85435470 --- /dev/null +++ b/docs/future/dumps/5927_7.tar.gz diff --git a/docs/future/dumps/5927_cbmemc b/docs/future/dumps/5927_cbmemc new file mode 100644 index 00000000..1ef5139c --- /dev/null +++ b/docs/future/dumps/5927_cbmemc @@ -0,0 +1,1442 @@ + + +coreboot-4.0-6196-g1aa8cbd-7BETC7WW (2.08 ) Tue Jun 3 22:16:33 BST 2014 starting... + +Mobile Intel(R) 82945GM/GME Express Chipset +(G)MCH capable of up to FSB 800 MHz +(G)MCH capable of up to DDR2-667 +Setting up static southbridge registers... GPIOS... done. +Disabling Watchdog reboot... done. +Setting up static northbridge registers... done. +Waiting for MCHBAR to come up...ok +PM1_CNT: 00001c00 +SMBus controller enabled. +Setting up RAM controller. +This mainboard supports Dual Channel Operation. +DDR II Channel 0 Socket 0: x16DS +DDR II Channel 1 Socket 0: x8DDS +Memory will be driven at 667MHz with CAS=5 clocks +tRAS = 15 cycles +tRP = 5 cycles +tRCD = 5 cycles +Refresh: 7.8us +tWR = 5 cycles +DIMM 0 side 0 = 512 MB +DIMM 0 side 1 = 512 MB +DIMM 2 side 0 = 1024 MB +DIMM 2 side 1 = 1024 MB +tRFC = 43 cycles +Setting Graphics Frequency... +FSB: 667 MHz Voltage: 1.05V Render: 250Mhz Display: 200MHz +Setting Memory Frequency... CLKCFG=0x00010023, CLKCFG=0x00010043, ok +Setting mode of operation for memory channels...Dual Channel Assymetric. +Programming Clock Crossing...MEM=667 FSB=667... ok +Setting RAM size... +C0DRB = 0x20202010 +C1DRB = 0x60606040 +TOLUD = 0x00c0 +Setting row attributes... +C0DRA = 0x0033 +C1DRA = 0x0033 +DIMM0 has 8 banks. +DIMM2 has 8 banks. +one dimm per channel config.. +Initializing System Memory IO... +Programming Dual Channel RCOMP +Table Index: 3 +Programming DLL Timings... +Enabling System Memory IO... +jedec enable sequence: bank 0 +jedec enable sequence: bank 1 +bankaddr from bank size of rank 0 +jedec enable sequence: bank 4 +bankaddr from bank size of rank 1 +jedec enable sequence: bank 5 +bankaddr from bank size of rank 4 +receive_enable_autoconfig() for channel 0 + find_strobes_low() + set_receive_enable() medium=0x3, coarse=0x5 + set_receive_enable() medium=0x1, coarse=0x5 + find_strobes_edge() + set_receive_enable() medium=0x1, coarse=0x5 + set_receive_enable() medium=0x3, coarse=0x5 + set_receive_enable() medium=0x1, coarse=0x5 + add_quarter_clock() mediumcoarse=15 fine=f3 + set_receive_enable() medium=0x3, coarse=0x5 + find_preamble() + set_receive_enable() medium=0x3, coarse=0x4 + set_receive_enable() medium=0x3, coarse=0x3 + add_quarter_clock() mediumcoarse=0f fine=73 + normalize() + set_receive_enable() medium=0x0, coarse=0x4 +receive_enable_autoconfig() for channel 1 + find_strobes_low() + set_receive_enable() medium=0x3, coarse=0x5 + set_receive_enable() medium=0x1, coarse=0x5 + find_strobes_edge() + set_receive_enable() medium=0x1, coarse=0x5 + add_quarter_clock() mediumcoarse=15 fine=c5 + set_receive_enable() medium=0x3, coarse=0x5 + find_preamble() + set_receive_enable() medium=0x3, coarse=0x4 + set_receive_enable() medium=0x3, coarse=0x3 + add_quarter_clock() mediumcoarse=0f fine=45 + normalize() + set_receive_enable() medium=0x0, coarse=0x4 +RAM initialization finished. +Setting up Egress Port RCRB +Loading p + +*** Log truncated, 497 characters dropped. *** + +Adding CBMEM entry as no. 3 +Trying CBFS ramstage loader. +CBFS: loading stage fallback/ramstage @ 0x100000 (417848 bytes), entry @ 0x100000 +coreboot-4.0-6196-g1aa8cbd-7BETC7WW (2.08 ) Tue Jun 3 22:16:33 BST 2014 booting... +BS: Entering BS_PRE_DEVICE state. +BS: Exiting BS_PRE_DEVICE state. +BS: BS_PRE_DEVICE times (us): entry 0 run 2975 exit 0 +BS: Entering BS_DEV_INIT_CHIPS state. +BS: Exiting BS_DEV_INIT_CHIPS state. +BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3324 exit 0 +BS: Entering BS_DEV_ENUMERATE state. +Enumerating buses... +Show all devs...Before device enumeration. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.3: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PNP: 164e.2: enabled 1 +PNP: 164e.3: enabled 0 +PNP: 164e.7: enabled 1 +PNP: 164e.19: enabled 1 +PNP: 002e.0: enabled 0 +PNP: 002e.1: enabled 1 +PNP: 002e.2: enabled 0 +PNP: 002e.3: enabled 1 +PNP: 002e.7: enabled 1 +PNP: 002e.a: enabled 0 +PCI: 00:1f.1: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 00:69: enabled 1 +I2C: 00:54: enabled 1 +I2C: 00:55: enabled 1 +I2C: 00:56: enabled 1 +I2C: 00:57: enabled 1 +I2C: 00:5c: enabled 1 +I2C: 00:5d: enabled 1 +I2C: 00:5e: enabled 1 +I2C: 00:5f: enabled 1 +Compare with tree... +Root Device: enabled 1 + CPU_CLUSTER: 0: enabled 1 + APIC: 00: enabled 1 + DOMAIN: 0000: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:02.0: enabled 1 + PCI: 00:02.1: enabled 1 + PCI: 00:1b.0: enabled 1 + PCI: 00:1c.0: enabled 1 + PCI: 00:1c.1: enabled 1 + PCI: 00:1d.0: enabled 1 + PCI: 00:1d.1: enabled 1 + PCI: 00:1d.2: enabled 1 + PCI: 00:1d.3: enabled 1 + PCI: 00:1d.7: enabled 1 + PCI: 00:1f.0: enabled 1 + PNP: 00ff.1: enabled 1 + PNP: 00ff.2: enabled 1 + PNP: 164e.2: enabled 1 + PNP: 164e.3: enabled 0 + PNP: 164e.7: enabled 1 + PNP: 164e.19: enabled 1 + PNP: 002e.0: enabled 0 + PNP: 002e.1: enabled 1 + PNP: 002e.2: enabled 0 + PNP: 002e.3: enabled 1 + PNP: 002e.7: enabled 1 + PNP: 002e.a: enabled 0 + PCI: 00:1f.1: enabled 1 + PCI: 00:1f.2: enabled 1 + PCI: 00:1f.3: enabled 1 + I2C: 00:69: enabled 1 + I2C: 00:54: enabled 1 + I2C: 00:55: enabled 1 + I2C: 00:56: enabled 1 + I2C: 00:57: enabled 1 + I2C: 00:5c: enabled 1 + I2C: 00:5d: enabled 1 + I2C: 00:5e: enabled 1 + I2C: 00:5f: enabled 1 +scan_static_bus for Root Device +CPU_CLUSTER: 0 enabled +DOMAIN: 0000 enabled +DOMAIN: 0000 scanning... +PCI: pci_scan_bus for bus 00 +PCI: 00:00.0 [8086/27a0] ops +PCI: 00:00.0 [8086/27a0] enabled +PCI: 00:02.0 [8086/27a2] ops +PCI: 00:02.0 [8086/27a2] enabled +PCI: 00:02.1 [8086/27a6] ops +PCI: 00:02.1 [8086/27a6] enabled +PCI: 00:1b.0 [8086/27d8] ops +PCI: 00:1b.0 [8086/27d8] enabled +PCI: 00:1c.0 [8086/0000] bus ops +PCI: 00:1c.0 [8086/27d0] enabled +PCI: 00:1c.1 [8086/0000] bus ops +PCI: 00:1c.1 [8086/27d2] enabled +PCI: 00:1c.2 [8086/0000] bus ops +PCI: 00:1c.2 [8086/27d4] enabled +PCI: 00:1c.3 [8086/0000] bus ops +PCI: 00:1c.3 [8086/27d6] enabled +PCI: 00:1d.0 [8086/27c8] ops +PCI: 00:1d.0 [8086/27c8] enabled +PCI: 00:1d.1 [8086/27c9] ops +PCI: 00:1d.1 [8086/27c9] enabled +PCI: 00:1d.2 [8086/27ca] ops +PCI: 00:1d.2 [8086/27ca] enabled +PCI: 00:1d.3 [8086/27cb] ops +PCI: 00:1d.3 [8086/27cb] enabled +PCI: 00:1d.7 [8086/27cc] ops +PCI: 00:1d.7 [8086/27cc] enabled +PCI: 00:1e.0 [8086/2448] bus ops +PCI: 00:1e.0 [8086/2448] enabled +PCI: 00:1f.0 [8086/27b9] bus ops +PCI: 00:1f.0 [8086/27b9] enabled +PCI: 00:1f.1 [8086/27df] ops +PCI: 00:1f.1 [8086/27df] enabled +PCI: 00:1f.2 [8086/0000] ops +PCI: 00:1f.2 [8086/27c4] enabled +PCI: 00:1f.3 [8086/27da] bus ops +PCI: 00:1f.3 [8086/27da] enabled +do_pci_scan_bridge for PCI: 00:1c.0 +PCI: pci_scan_bus for bus 01 +PCI: 01:00.0 [8086/109a] enabled +PCI: pci_scan_bus returning with max=001 +do_pci_scan_bridge returns max 1 +do_pci_scan_bridge for PCI: 00:1c.1 +PCI: pci_scan_bus for bus 02 +PCI: 02:00.0 [168c/002b] enabled +PCI: pci_scan_bus returning with max=002 +do_pci_scan_bridge returns max 2 +do_pci_scan_bridge for PCI: 00:1c.2 +PCI: pci_scan_bus for bus 03 +PCI: pci_scan_bus returning with max=003 +do_pci_scan_bridge returns max 3 +do_pci_scan_bridge for PCI: 00:1c.3 +PCI: pci_scan_bus for bus 04 +PCI: pci_scan_bus returning with max=004 +do_pci_scan_bridge returns max 4 +do_pci_scan_bridge for PCI: 00:1e.0 +PCI: pci_scan_bus for bus 05 +PCI: 05:00.0 [1180/0476] bus ops +PCI: 05:00.0 [1180/0476] enabled +PCI: 05:00.1 [1180/0552] enabled +PCI: 05:00.2 [1180/0822] enabled +PCI: 05:00.3 [1180/0843] enabled +do_pci_scan_bridge for PCI: 05:00.0 +PCI: pci_scan_bus for bus 06 +PCI: pci_scan_bus returning with max=006 +do_pci_scan_bridge returns max 6 +PCI: pci_scan_bus returning with max=006 +do_pci_scan_bridge returns max 6 +scan_static_bus for PCI: 00:1f.0 +WARNING: No CMOS option 'touchpad'. +PNP: 00ff.1 enabled +recv_ec_data: 0x37 +recv_ec_data: 0x42 +recv_ec_data: 0x48 +recv_ec_data: 0x54 +recv_ec_data: 0x33 +recv_ec_data: 0x37 +recv_ec_data: 0x57 +recv_ec_data: 0x57 +recv_ec_data: 0x04 +recv_ec_data: 0x03 +recv_ec_data: 0x00 +recv_ec_data: 0x11 +EC Firmware ID 7BHT37WW-3.4, Version 0.01B +recv_ec_data: 0x00 +recv_ec_data: 0x10 +recv_ec_data: 0x20 +recv_ec_data: 0x30 +recv_ec_data: 0x00 +recv_ec_data: 0xa6 +recv_ec_data: 0x01 +recv_ec_data: 0x30 +PNP: 00ff.2 enabled +PNP: 164e.2 enabled +PNP: 164e.3 disabled +PNP: 164e.7 enabled +PNP: 164e.19 enabled +PNP: 002e.0 disabled +PNP: 002e.1 enabled +PNP: 002e.2 disabled +PNP: 002e.3 enabled +PNP: 002e.7 enabled +PNP: 002e.a disabled +scan_static_bus for PCI: 00:1f.0 done +scan_static_bus for PCI: 00:1f.3 +smbus: PCI: 00:1f.3[0]->I2C: 01:69 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled +scan_static_bus for PCI: 00:1f.3 done +PCI: pci_scan_bus returning with max=006 +scan_static_bus for Root Device done +done +BS: Exiting BS_DEV_ENUMERATE state. +BS: BS_DEV_ENUMERATE times (us): entry 0 run 529332 exit 0 +BS: Entering BS_DEV_RESOURCES state. +found VGA at PCI: 00:02.0 +Setting up VGA for PCI: 00:02.0 +Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 +Setting PCI_BRIDGE_CTL_VGA for bridge Root Device +Allocating resources... +Reading resources... +Root Device read_resources bus 0 link: 0 +CPU_CLUSTER: 0 read_resources bus 0 link: 0 +APIC: 00 missing read_resources +CPU_CLUSTER: 0 read_resources bus 0 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 +Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. +PCI: 00:1c.0 read_resources bus 1 link: 0 +PCI: 00:1c.0 read_resources bus 1 link: 0 done +PCI: 00:1c.1 read_resources bus 2 link: 0 +PCI: 00:1c.1 read_resources bus 2 link: 0 done +PCI: 00:1c.2 read_resources bus 3 link: 0 +PCI: 00:1c.2 read_resources bus 3 link: 0 done +PCI: 00:1c.3 read_resources bus 4 link: 0 +PCI: 00:1c.3 read_resources bus 4 link: 0 done +PCI: 00:1e.0 read_resources bus 5 link: 0 +PCI: 05:00.0 read_resources bus 6 link: 0 +PCI: 05:00.0 read_resources bus 6 link: 0 done +PCI: 00:1e.0 read_resources bus 5 link: 0 done +PCI: 00:1f.0 read_resources bus 0 link: 0 +PNP: 00ff.1 missing read_resources +PNP: 00ff.2 missing read_resources +PCI: 00:1f.0 read_resources bus 0 link: 0 done +PCI: 00:1f.3 read_resources bus 1 link: 0 +PCI: 00:1f.3 read_resources bus 1 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 done +Root Device read_resources bus 0 link: 0 done +Done reading resources. +Show resources in subtree (Root Device)...After reading. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 + PCI: 00:00.0 + PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf + PCI: 00:02.0 + PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10 + PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14 + PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18 + PCI: 00:02.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 1c + PCI: 00:02.1 + PCI: 00:02.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 + PCI: 00:1c.0 child on link 0 PCI: 01:00.0 + PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 01:00.0 + PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 + PCI: 01:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 + PCI: 00:1c.1 child on link 0 PCI: 02:00.0 + PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1c.3 + PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.3 + PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10 + PCI: 00:1e.0 child on link 0 PCI: 05:00.0 + PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 05:00.0 + PCI: 05:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 + PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffffffff flags 100 index 2c + PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffffffff flags 100 index 34 + PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 1200 index 1c + PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 05:00.1 + PCI: 05:00.1 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 10 + PCI: 05:00.2 + PCI: 05:00.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 05:00.3 + PCI: 05:00.3 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PNP: 164e.2 + PNP: 164e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 164e.3 + PNP: 164e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 164e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.7 + PNP: 164e.7 resource base 1680 size 10 align 4 gran 4 limit ffff flags c0000100 index 60 + PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.19 + PNP: 164e.19 resource base 164c size 2 align 1 gran 1 limit ffff flags c0000100 index 60 + PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 + PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 3bc size 400 align 10 gran 10 limit 7ff flags c0000100 index 60 + PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 002e.3 + PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.7 + PNP: 002e.7 resource base 1620 size 8 align 3 gran 3 limit ffff flags c0000100 index 60 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.a + PNP: 002e.a resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 60 + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PCI: 00:1f.1 + PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:1f.2 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:69 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + I2C: 01:69 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f +DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff +PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 01:00.0 18 * [0x0 - 0x1f] io +PCI: 00:1c.0 compute_resources_io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 05:00.0 2c * [0x0 - 0xfff] io +PCI: 05:00.0 34 * [0x1000 - 0x1fff] io +PCI: 00:1e.0 compute_resources_io: base: 2000 size: 2000 align: 12 gran: 12 limit: ffff done +PCI: 00:1e.0 1c * [0x0 - 0x1fff] io +PCI: 00:1c.0 1c * [0x2000 - 0x2fff] io +PCI: 00:1d.0 20 * [0x3000 - 0x301f] io +PCI: 00:1d.1 20 * [0x3020 - 0x303f] io +PCI: 00:1d.2 20 * [0x3040 - 0x305f] io +PCI: 00:1d.3 20 * [0x3060 - 0x307f] io +PCI: 00:1f.1 20 * [0x3080 - 0x308f] io +PCI: 00:1f.2 20 * [0x3090 - 0x309f] io +PCI: 00:02.0 14 * [0x30a0 - 0x30a7] io +PCI: 00:1f.1 10 * [0x30a8 - 0x30af] io +PCI: 00:1f.1 18 * [0x30b0 - 0x30b7] io +PCI: 00:1f.2 10 * [0x30b8 - 0x30bf] io +PCI: 00:1f.2 18 * [0x30c0 - 0x30c7] io +PCI: 00:1f.1 14 * [0x30c8 - 0x30cb] io +PCI: 00:1f.1 1c * [0x30cc - 0x30cf] io +PCI: 00:1f.2 14 * [0x30d0 - 0x30d3] io +PCI: 00:1f.2 1c * [0x30d4 - 0x30d7] io +DOMAIN: 0000 compute_resources_io: base: 30d8 size: 30d8 align: 12 gran: 0 limit: ffff done +DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:00.0 10 * [0x0 - 0x1ffff] mem +PCI: 00:1c.0 compute_resources_mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 02:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:1c.1 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 05:00.0 1c * [0x0 - 0x1ffffff] prefmem +PCI: 00:1e.0 compute_resources_prefmem: base: 2000000 size: 2000000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 05:00.0 24 * [0x0 - 0x1ffffff] mem +PCI: 05:00.0 10 * [0x2000000 - 0x2000fff] mem +PCI: 05:00.1 10 * [0x2001000 - 0x20017ff] mem +PCI: 05:00.2 10 * [0x2001800 - 0x20018ff] mem +PCI: 05:00.3 10 * [0x2001900 - 0x20019ff] mem +PCI: 00:1e.0 compute_resources_mem: base: 2001a00 size: 2100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem +PCI: 00:1e.0 20 * [0x10000000 - 0x120fffff] mem +PCI: 00:1e.0 24 * [0x12100000 - 0x140fffff] prefmem +PCI: 00:1c.0 20 * [0x14100000 - 0x141fffff] mem +PCI: 00:1c.1 20 * [0x14200000 - 0x142fffff] mem +PCI: 00:02.0 10 * [0x14300000 - 0x1437ffff] mem +PCI: 00:02.1 10 * [0x14380000 - 0x143fffff] mem +PCI: 00:02.0 1c * [0x14400000 - 0x1443ffff] mem +PCI: 00:1b.0 10 * [0x14440000 - 0x14443fff] mem +PCI: 00:1d.7 10 * [0x14444000 - 0x144443ff] mem +PCI: 00:1f.2 24 * [0x14444400 - 0x144447ff] mem +DOMAIN: 0000 compute_resources_mem: base: 14444800 size: 14444800 align: 28 gran: 0 limit: ffffffff done +avoid_fixed_resources: DOMAIN: 0000 +avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff +constrain_resources: DOMAIN: 0000 +constrain_resources: PCI: 00:00.0 +constrain_resources: PCI: 00:02.0 +constrain_resources: PCI: 00:02.1 +constrain_resources: PCI: 00:1b.0 +constrain_resources: PCI: 00:1c.0 +constrain_resources: PCI: 01:00.0 +constrain_resources: PCI: 00:1c.1 +constrain_resources: PCI: 02:00.0 +constrain_resources: PCI: 00:1c.2 +constrain_resources: PCI: 00:1c.3 +constrain_resources: PCI: 00:1d.0 +constrain_resources: PCI: 00:1d.1 +constrain_resources: PCI: 00:1d.2 +constrain_resources: PCI: 00:1d.3 +constrain_resources: PCI: 00:1d.7 +constrain_resources: PCI: 00:1e.0 +constrain_resources: PCI: 05:00.0 +constrain_resources: PCI: 05:00.1 +constrain_resources: PCI: 05:00.2 +constrain_resources: PCI: 05:00.3 +constrain_resources: PCI: 00:1f.0 +constrain_resources: PNP: 00ff.1 +constrain_resources: PNP: 00ff.2 +skipping PNP: 00ff.2@60 fixed resource, size=0! +skipping PNP: 00ff.2@62 fixed resource, size=0! +skipping PNP: 00ff.2@64 fixed resource, size=0! +skipping PNP: 00ff.2@66 fixed resource, size=0! +constrain_resources: PNP: 164e.2 +constrain_resources: PNP: 164e.7 +constrain_resources: PNP: 164e.19 +constrain_resources: PNP: 002e.1 +constrain_resources: PNP: 002e.3 +constrain_resources: PNP: 002e.7 +constrain_resources: PCI: 00:1f.1 +constrain_resources: PCI: 00:1f.2 +constrain_resources: PCI: 00:1f.3 +constrain_resources: I2C: 01:69 +constrain_resources: I2C: 01:54 +constrain_resources: I2C: 01:55 +constrain_resources: I2C: 01:56 +constrain_resources: I2C: 01:57 +constrain_resources: I2C: 01:5c +constrain_resources: I2C: 01:5d +constrain_resources: I2C: 01:5e +constrain_resources: I2C: 01:5f +avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff + lim->base 00001690 lim->limit 0000ffff +avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff + lim->base 00000000 lim->limit efffffff +Setting resources... +DOMAIN: 0000 allocate_resources_io: base:1690 size:30d8 align:12 gran:0 limit:ffff +Assigned: PCI: 00:1e.0 1c * [0x2000 - 0x3fff] io +Assigned: PCI: 00:1c.0 1c * [0x4000 - 0x4fff] io +Assigned: PCI: 00:1d.0 20 * [0x5000 - 0x501f] io +Assigned: PCI: 00:1d.1 20 * [0x5020 - 0x503f] io +Assigned: PCI: 00:1d.2 20 * [0x5040 - 0x505f] io +Assigned: PCI: 00:1d.3 20 * [0x5060 - 0x507f] io +Assigned: PCI: 00:1f.1 20 * [0x5080 - 0x508f] io +Assigned: PCI: 00:1f.2 20 * [0x5090 - 0x509f] io +Assigned: PCI: 00:02.0 14 * [0x50a0 - 0x50a7] io +Assigned: PCI: 00:1f.1 10 * [0x50a8 - 0x50af] io +Assigned: PCI: 00:1f.1 18 * [0x50b0 - 0x50b7] io +Assigned: PCI: 00:1f.2 10 * [0x50b8 - 0x50bf] io +Assigned: PCI: 00:1f.2 18 * [0x50c0 - 0x50c7] io +Assigned: PCI: 00:1f.1 14 * [0x50c8 - 0x50cb] io +Assigned: PCI: 00:1f.1 1c * [0x50cc - 0x50cf] io +Assigned: PCI: 00:1f.2 14 * [0x50d0 - 0x50d3] io +Assigned: PCI: 00:1f.2 1c * [0x50d4 - 0x50d7] io +DOMAIN: 0000 allocate_resources_io: next_base: 50d8 size: 30d8 align: 12 gran: 0 done +PCI: 00:1c.0 allocate_resources_io: base:4000 size:1000 align:12 gran:12 limit:ffff +Assigned: PCI: 01:00.0 18 * [0x4000 - 0x401f] io +PCI: 00:1c.0 allocate_resources_io: next_base: 4020 size: 1000 align: 12 gran: 12 done +PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.3 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.3 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1e.0 allocate_resources_io: base:2000 size:2000 align:12 gran:12 limit:ffff +Assigned: PCI: 05:00.0 2c * [0x2000 - 0x2fff] io +Assigned: PCI: 05:00.0 34 * [0x3000 - 0x3fff] io +PCI: 00:1e.0 allocate_resources_io: next_base: 4000 size: 2000 align: 12 gran: 12 done +DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:14444800 align:28 gran:0 limit:efffffff +Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem +Assigned: PCI: 00:1e.0 20 * [0xe0000000 - 0xe20fffff] mem +Assigned: PCI: 00:1e.0 24 * [0xe2100000 - 0xe40fffff] prefmem +Assigned: PCI: 00:1c.0 20 * [0xe4100000 - 0xe41fffff] mem +Assigned: PCI: 00:1c.1 20 * [0xe4200000 - 0xe42fffff] mem +Assigned: PCI: 00:02.0 10 * [0xe4300000 - 0xe437ffff] mem +Assigned: PCI: 00:02.1 10 * [0xe4380000 - 0xe43fffff] mem +Assigned: PCI: 00:02.0 1c * [0xe4400000 - 0xe443ffff] mem +Assigned: PCI: 00:1b.0 10 * [0xe4440000 - 0xe4443fff] mem +Assigned: PCI: 00:1d.7 10 * [0xe4444000 - 0xe44443ff] mem +Assigned: PCI: 00:1f.2 24 * [0xe4444400 - 0xe44447ff] mem +DOMAIN: 0000 allocate_resources_mem: next_base: e4444800 size: 14444800 align: 28 gran: 0 done +PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.0 allocate_resources_mem: base:e4100000 size:100000 align:20 gran:20 limit:efffffff +Assigned: PCI: 01:00.0 10 * [0xe4100000 - 0xe411ffff] mem +PCI: 00:1c.0 allocate_resources_mem: next_base: e4120000 size: 100000 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_mem: base:e4200000 size:100000 align:20 gran:20 limit:efffffff +Assigned: PCI: 02:00.0 10 * [0xe4200000 - 0xe420ffff] mem +PCI: 00:1c.1 allocate_resources_mem: next_base: e4210000 size: 100000 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.3 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.3 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.3 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.3 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1e.0 allocate_resources_prefmem: base:e2100000 size:2000000 align:20 gran:20 limit:efffffff +Assigned: PCI: 05:00.0 1c * [0xe2100000 - 0xe40fffff] prefmem +PCI: 00:1e.0 allocate_resources_prefmem: next_base: e4100000 size: 2000000 align: 20 gran: 20 done +PCI: 00:1e.0 allocate_resources_mem: base:e0000000 size:2100000 align:20 gran:20 limit:efffffff +Assigned: PCI: 05:00.0 24 * [0xe0000000 - 0xe1ffffff] mem +Assigned: PCI: 05:00.0 10 * [0xe2000000 - 0xe2000fff] mem +Assigned: PCI: 05:00.1 10 * [0xe2001000 - 0xe20017ff] mem +Assigned: PCI: 05:00.2 10 * [0xe2001800 - 0xe20018ff] mem +Assigned: PCI: 05:00.3 10 * [0xe2001900 - 0xe20019ff] mem +PCI: 00:1e.0 allocate_resources_mem: next_base: e2001a00 size: 2100000 align: 20 gran: 20 done +Root Device assign_resources, bus 0 link: 0 +pci_tolm: 0xd0000000 +Base of stolen memory: 0xbf800000 +Top of Low Used DRAM: 0xc0000000 +IGD decoded, subtracting 8M UMA +Available memory: 3137536K (3064M) +Adding PCIe config bar +DOMAIN: 0000 assign_resources, bus 0 link: 0 +PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig> +PCI: 00:02.0 10 <- [0x00e4300000 - 0x00e437ffff] size 0x00080000 gran 0x13 mem +PCI: 00:02.0 14 <- [0x00000050a0 - 0x00000050a7] size 0x00000008 gran 0x03 io +PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem +PCI: 00:02.0 1c <- [0x00e4400000 - 0x00e443ffff] size 0x00040000 gran 0x12 mem +PCI: 00:02.1 10 <- [0x00e4380000 - 0x00e43fffff] size 0x00080000 gran 0x13 mem +PCI: 00:1b.0 10 <- [0x00e4440000 - 0x00e4443fff] size 0x00004000 gran 0x0e mem64 +PCI: 00:1c.0 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus 01 io +PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem +PCI: 00:1c.0 20 <- [0x00e4100000 - 0x00e41fffff] size 0x00100000 gran 0x14 bus 01 mem +PCI: 00:1c.0 assign_resources, bus 1 link: 0 +PCI: 01:00.0 10 <- [0x00e4100000 - 0x00e411ffff] size 0x00020000 gran 0x11 mem +PCI: 01:00.0 18 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io +PCI: 00:1c.0 assign_resources, bus 1 link: 0 +PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io +PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem +PCI: 00:1c.1 20 <- [0x00e4200000 - 0x00e42fffff] size 0x00100000 gran 0x14 bus 02 mem +PCI: 00:1c.1 assign_resources, bus 2 link: 0 +PCI: 02:00.0 10 <- [0x00e4200000 - 0x00e420ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:1c.1 assign_resources, bus 2 link: 0 +PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io +PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem +PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem +PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io +PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 prefmem +PCI: 00:1c.3 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 mem +PCI: 00:1d.0 20 <- [0x0000005000 - 0x000000501f] size 0x00000020 gran 0x05 io +PCI: 00:1d.1 20 <- [0x0000005020 - 0x000000503f] size 0x00000020 gran 0x05 io +PCI: 00:1d.2 20 <- [0x0000005040 - 0x000000505f] size 0x00000020 gran 0x05 io +PCI: 00:1d.3 20 <- [0x0000005060 - 0x000000507f] size 0x00000020 gran 0x05 io +PCI: 00:1d.7 10 <- [0x00e4444000 - 0x00e44443ff] size 0x00000400 gran 0x0a mem +PCI: 00:1e.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 05 io +PCI: 00:1e.0 24 <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x14 bus 05 prefmem +PCI: 00:1e.0 20 <- [0x00e0000000 - 0x00e20fffff] size 0x02100000 gran 0x14 bus 05 mem +PCI: 00:1e.0 assign_resources, bus 5 link: 0 +PCI: 05:00.0 In set resources +PCI: 05:00.0 10 <- [0x00e2000000 - 0x00e2000fff] size 0x00001000 gran 0x0c mem +PCI: 05:00.0 2c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x02 io +PCI: 05:00.0 34 <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x02 io +PCI: 05:00.0 1c <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x0c prefmem +PCI: 05:00.0 24 <- [0x00e0000000 - 0x00e1ffffff] size 0x02000000 gran 0x0c mem +PCI: 05:00.1 10 <- [0x00e2001000 - 0x00e20017ff] size 0x00000800 gran 0x0b mem +PCI: 05:00.2 10 <- [0x00e2001800 - 0x00e20018ff] size 0x00000100 gran 0x08 mem +PCI: 05:00.3 10 <- [0x00e2001900 - 0x00e20019ff] size 0x00000100 gran 0x08 mem +PCI: 00:1e.0 assign_resources, bus 5 link: 0 +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PNP: 00ff.1 missing set_resources +PNP: 00ff.2 missing set_resources +PNP: 164e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io +ERROR: PNP: 164e.2 70 irq size: 0x0000000001 not assigned +ERROR: PNP: 164e.2 74 drq size: 0x0000000001 not assigned +ERROR: PNP: 164e.2 75 drq size: 0x0000000001 not assigned +PNP: 164e.7 60 <- [0x0000001680 - 0x000000168f] size 0x00000010 gran 0x04 io +ERROR: PNP: 164e.7 70 irq size: 0x0000000001 not assigned +PNP: 164e.19 60 <- [0x000000164c - 0x000000164d] size 0x00000002 gran 0x01 io +ERROR: PNP: 164e.19 70 irq size: 0x0000000001 not assigned +PNP: 002e.1 60 <- [0x00000003bc - 0x00000007bb] size 0x00000400 gran 0x0a io +PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq +ERROR: PNP: 002e.1 74 drq size: 0x0000000001 not assigned +PNP: 002e.3 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io +PNP: 002e.3 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq +PNP: 002e.7 60 <- [0x0000001620 - 0x0000001627] size 0x00000008 gran 0x03 io +ERROR: PNP: 002e.7 70 irq size: 0x0000000001 not assigned +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PCI: 00:1f.1 10 <- [0x00000050a8 - 0x00000050af] size 0x00000008 gran 0x03 io +PCI: 00:1f.1 14 <- [0x00000050c8 - 0x00000050cb] size 0x00000004 gran 0x02 io +PCI: 00:1f.1 18 <- [0x00000050b0 - 0x00000050b7] size 0x00000008 gran 0x03 io +PCI: 00:1f.1 1c <- [0x00000050cc - 0x00000050cf] size 0x00000004 gran 0x02 io +PCI: 00:1f.1 20 <- [0x0000005080 - 0x000000508f] size 0x00000010 gran 0x04 io +PCI: 00:1f.2 10 <- [0x00000050b8 - 0x00000050bf] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 14 <- [0x00000050d0 - 0x00000050d3] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 18 <- [0x00000050c0 - 0x00000050c7] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 1c <- [0x00000050d4 - 0x00000050d7] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 20 <- [0x0000005090 - 0x000000509f] size 0x00000010 gran 0x04 io +PCI: 00:1f.2 24 <- [0x00e4444400 - 0x00e44447ff] size 0x00000400 gran 0x0a mem +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +CBMEM region bf6d0000-bf7fffff (cbmem_late_set_table) +Root Device assign_resources, bus 0 link: 0 +Done setting resources. +Show resources in subtree (Root Device)...After assigning values. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 1690 size 30d8 align 12 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base d0000000 size 14444800 align 28 gran 0 limit efffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 + DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 4 + DOMAIN: 0000 resource base bf800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5 + DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7 + PCI: 00:00.0 + PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf + PCI: 00:02.0 + PCI: 00:02.0 resource base e4300000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10 + PCI: 00:02.0 resource base 50a0 size 8 align 3 gran 3 limit ffff flags 60000100 index 14 + PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 18 + PCI: 00:02.0 resource base e4400000 size 40000 align 18 gran 18 limit efffffff flags 60000200 index 1c + PCI: 00:02.1 + PCI: 00:02.1 resource base e4380000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base e4440000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10 + PCI: 00:1c.0 child on link 0 PCI: 01:00.0 + PCI: 00:1c.0 resource base 4000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.0 resource base e4100000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 01:00.0 + PCI: 01:00.0 resource base e4100000 size 20000 align 17 gran 17 limit efffffff flags 60000200 index 10 + PCI: 01:00.0 resource base 4000 size 20 align 5 gran 5 limit ffff flags 60000100 index 18 + PCI: 00:1c.1 child on link 0 PCI: 02:00.0 + PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.1 resource base e4200000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base e4200000 size 10000 align 16 gran 16 limit efffffff flags 60000201 index 10 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1c.3 + PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 5000 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 5020 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 5040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.3 + PCI: 00:1d.3 resource base 5060 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base e4444000 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10 + PCI: 00:1e.0 child on link 0 PCI: 05:00.0 + PCI: 00:1e.0 resource base 2000 size 2000 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1e.0 resource base e2100000 size 2000000 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1e.0 resource base e0000000 size 2100000 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 05:00.0 + PCI: 05:00.0 resource base e2000000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 + PCI: 05:00.0 resource base 2000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 2c + PCI: 05:00.0 resource base 3000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 34 + PCI: 05:00.0 resource base e2100000 size 2000000 align 12 gran 12 limit efffffff flags 60001200 index 1c + PCI: 05:00.0 resource base e0000000 size 2000000 align 12 gran 12 limit efffffff flags 60000200 index 24 + PCI: 05:00.1 + PCI: 05:00.1 resource base e2001000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 10 + PCI: 05:00.2 + PCI: 05:00.2 resource base e2001800 size 100 align 8 gran 8 limit efffffff flags 60000200 index 10 + PCI: 05:00.3 + PCI: 05:00.3 resource base e2001900 size 100 align 8 gran 8 limit efffffff flags 60000200 index 10 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PNP: 164e.2 + PNP: 164e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 164e.3 + PNP: 164e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 164e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.7 + PNP: 164e.7 resource base 1680 size 10 align 4 gran 4 limit ffff flags e0000100 index 60 + PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.19 + PNP: 164e.19 resource base 164c size 2 align 1 gran 1 limit ffff flags e0000100 index 60 + PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 + PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 3bc size 400 align 10 gran 10 limit 7ff flags e0000100 index 60 + PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 002e.3 + PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.7 + PNP: 002e.7 resource base 1620 size 8 align 3 gran 3 limit ffff flags e0000100 index 60 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.a + PNP: 002e.a resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 60 + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PCI: 00:1f.1 + PCI: 00:1f.1 resource base 50a8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 + PCI: 00:1f.1 resource base 50c8 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 + PCI: 00:1f.1 resource base 50b0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 + PCI: 00:1f.1 resource base 50cc size 4 align 2 gran 2 limit ffff flags 60000100 index 1c + PCI: 00:1f.1 resource base 5080 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 50b8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 + PCI: 00:1f.2 resource base 50d0 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 + PCI: 00:1f.2 resource base 50c0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 + PCI: 00:1f.2 resource base 50d4 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c + PCI: 00:1f.2 resource base 5090 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 + PCI: 00:1f.2 resource base e4444400 size 400 align 10 gran 10 limit efffffff flags 60000200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:69 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + I2C: 01:69 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f +Done allocating resources. +BS: Exiting BS_DEV_RESOURCES state. +BS: BS_DEV_RESOURCES times (us): entry 0 run 3353806 exit 0 +BS: Entering BS_DEV_ENABLE state. +Enabling resources... +PCI: 00:00.0 subsystem <- 17aa/2017 +PCI: 00:00.0 cmd <- 06 +PCI: 00:02.0 subsystem <- 17aa/201a +PCI: 00:02.0 cmd <- 03 +PCI: 00:02.1 subsystem <- 17aa/201a +PCI: 00:02.1 cmd <- 02 +PCI: 00:1b.0 subsystem <- 17aa/2010 +PCI: 00:1b.0 cmd <- 102 +PCI: 00:1c.0 bridge ctrl <- 0003 +PCI: 00:1c.0 subsystem <- 0000/0000 +PCI: 00:1c.0 cmd <- 107 +PCI: 00:1c.1 bridge ctrl <- 0003 +PCI: 00:1c.1 subsystem <- 0000/0000 +PCI: 00:1c.1 cmd <- 106 +PCI: 00:1c.2 bridge ctrl <- 0003 +PCI: 00:1c.2 cmd <- 00 +PCI: 00:1c.3 bridge ctrl <- 0003 +PCI: 00:1c.3 cmd <- 00 +PCI: 00:1d.0 subsystem <- 17aa/200a +PCI: 00:1d.0 cmd <- 01 +PCI: 00:1d.1 subsystem <- 17aa/200a +PCI: 00:1d.1 cmd <- 01 +PCI: 00:1d.2 subsystem <- 17aa/200a +PCI: 00:1d.2 cmd <- 01 +PCI: 00:1d.3 subsystem <- 17aa/200a +PCI: 00:1d.3 cmd <- 01 +PCI: 00:1d.7 subsystem <- 17aa/200b +PCI: 00:1d.7 cmd <- 102 +PCI: 00:1e.0 bridge ctrl <- 0003 +PCI: 00:1e.0 cmd <- 07 (NOT WRITTEN!) +PCI: 00:1f.0 subsystem <- 17aa/2009 +PCI: 00:1f.0 cmd <- 107 +PCI: 00:1f.1 subsystem <- 17aa/200c +PCI: 00:1f.1 cmd <- 01 +PCI: 00:1f.2 subsystem <- 17aa/200d +PCI: 00:1f.2 cmd <- 03 +PCI: 00:1f.3 subsystem <- 17aa/200f +PCI: 00:1f.3 cmd <- 101 +PCI: 01:00.0 cmd <- 03 +PCI: 02:00.0 cmd <- 02 +PCI: 05:00.0 bridge ctrl <- 0503 +PCI: 05:00.0 cmd <- 03 +PCI: 05:00.1 cmd <- 02 +PCI: 05:00.2 cmd <- 06 +PCI: 05:00.3 cmd <- 06 +done. +BS: Exiting BS_DEV_ENABLE state. +BS: BS_DEV_ENABLE times (us): entry 0 run 124473 exit 0 +BS: Entering BS_DEV_INIT state. +Initializing devices... +Root Device init +recv_ec_data: 0x11 +recv_ec_data: 0x11 +Root Device init 5804 usecs +CPU_CLUSTER: 0 init +start_eip=0x00001000, code_size=0x00000031 +Initializing SMM handler... ... pmbase = 0x0500 + +SMI_STS: MCSMI PM1 +PM1_STS: WAK PWRBTN TMROF +GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 +ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 +TCO_STS: INTRD_DET + ... raise SMI# +Initializing CPU #0 +CPU: vendor Intel device 6ec +CPU: family 06, model 0e, stepping 0c +Enabling cache +microcode: sig=0x6ec pf=0x20 revision=0x0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +microcode: updated to revision 0x54 date=2006-05-01 +CPU: Intel(R) Core(TM) Duo CPU L2400 @ 1.66GHz. +MTRR: Physical address space: +0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 +0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 +0x00000000000c0000 - 0x00000000bf800000 size 0xbf740000 type 6 +0x00000000bf800000 - 0x00000000d0000000 size 0x10800000 type 0 +0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 +0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 +MTRR addr 0x0-0x10 set to 6 type @ 0 +MTRR addr 0x10-0x20 set to 6 type @ 1 +MTRR addr 0x20-0x30 set to 6 type @ 2 +MTRR addr 0x30-0x40 set to 6 type @ 3 +MTRR addr 0x40-0x50 set to 6 type @ 4 +MTRR addr 0x50-0x60 set to 6 type @ 5 +MTRR addr 0x60-0x70 set to 6 type @ 6 +MTRR addr 0x70-0x80 set to 6 type @ 7 +MTRR addr 0x80-0x84 set to 6 type @ 8 +MTRR addr 0x84-0x88 set to 6 type @ 9 +MTRR addr 0x88-0x8c set to 6 type @ 10 +MTRR addr 0x8c-0x90 set to 6 type @ 11 +MTRR addr 0x90-0x94 set to 6 type @ 12 +MTRR addr 0x94-0x98 set to 6 type @ 13 +MTRR addr 0x98-0x9c set to 6 type @ 14 +MTRR addr 0x9c-0xa0 set to 6 type @ 15 +MTRR addr 0xa0-0xa4 set to 0 type @ 16 +MTRR addr 0xa4-0xa8 set to 0 type @ 17 +MTRR addr 0xa8-0xac set to 0 type @ 18 +MTRR addr 0xac-0xb0 set to 0 type @ 19 +MTRR addr 0xb0-0xb4 set to 0 type @ 20 +MTRR addr 0xb4-0xb8 set to 0 type @ 21 +MTRR addr 0xb8-0xbc set to 0 type @ 22 +MTRR addr 0xbc-0xc0 set to 0 type @ 23 +MTRR addr 0xc0-0xc1 set to 6 type @ 24 +MTRR addr 0xc1-0xc2 set to 6 type @ 25 +MTRR addr 0xc2-0xc3 set to 6 type @ 26 +MTRR addr 0xc3-0xc4 set to 6 type @ 27 +MTRR addr 0xc4-0xc5 set to 6 type @ 28 +MTRR addr 0xc5-0xc6 set to 6 type @ 29 +MTRR addr 0xc6-0xc7 set to 6 type @ 30 +MTRR addr 0xc7-0xc8 set to 6 type @ 31 +MTRR addr 0xc8-0xc9 set to 6 type @ 32 +MTRR addr 0xc9-0xca set to 6 type @ 33 +MTRR addr 0xca-0xcb set to 6 type @ 34 +MTRR addr 0xcb-0xcc set to 6 type @ 35 +MTRR addr 0xcc-0xcd set to 6 type @ 36 +MTRR addr 0xcd-0xce set to 6 type @ 37 +MTRR addr 0xce-0xcf set to 6 type @ 38 +MTRR addr 0xcf-0xd0 set to 6 type @ 39 +MTRR addr 0xd0-0xd1 set to 6 type @ 40 +MTRR addr 0xd1-0xd2 set to 6 type @ 41 +MTRR addr 0xd2-0xd3 set to 6 type @ 42 +MTRR addr 0xd3-0xd4 set to 6 type @ 43 +MTRR addr 0xd4-0xd5 set to 6 type @ 44 +MTRR addr 0xd5-0xd6 set to 6 type @ 45 +MTRR addr 0xd6-0xd7 set to 6 type @ 46 +MTRR addr 0xd7-0xd8 set to 6 type @ 47 +MTRR addr 0xd8-0xd9 set to 6 type @ 48 +MTRR addr 0xd9-0xda set to 6 type @ 49 +MTRR addr 0xda-0xdb set to 6 type @ 50 +MTRR addr 0xdb-0xdc set to 6 type @ 51 +MTRR addr 0xdc-0xdd set to 6 type @ 52 +MTRR addr 0xdd-0xde set to 6 type @ 53 +MTRR addr 0xde-0xdf set to 6 type @ 54 +MTRR addr 0xdf-0xe0 set to 6 type @ 55 +MTRR addr 0xe0-0xe1 set to 6 type @ 56 +MTRR addr 0xe1-0xe2 set to 6 type @ 57 +MTRR addr 0xe2-0xe3 set to 6 type @ 58 +MTRR addr 0xe3-0xe4 set to 6 type @ 59 +MTRR addr 0xe4-0xe5 set to 6 type @ 60 +MTRR addr 0xe5-0xe6 set to 6 type @ 61 +MTRR addr 0xe6-0xe7 set to 6 type @ 62 +MTRR addr 0xe7-0xe8 set to 6 type @ 63 +MTRR addr 0xe8-0xe9 set to 6 type @ 64 +MTRR addr 0xe9-0xea set to 6 type @ 65 +MTRR addr 0xea-0xeb set to 6 type @ 66 +MTRR addr 0xeb-0xec set to 6 type @ 67 +MTRR addr 0xec-0xed set to 6 type @ 68 +MTRR addr 0xed-0xee set to 6 type @ 69 +MTRR addr 0xee-0xef set to 6 type @ 70 +MTRR addr 0xef-0xf0 set to 6 type @ 71 +MTRR addr 0xf0-0xf1 set to 6 type @ 72 +MTRR addr 0xf1-0xf2 set to 6 type @ 73 +MTRR addr 0xf2-0xf3 set to 6 type @ 74 +MTRR addr 0xf3-0xf4 set to 6 type @ 75 +MTRR addr 0xf4-0xf5 set to 6 type @ 76 +MTRR addr 0xf5-0xf6 set to 6 type @ 77 +MTRR addr 0xf6-0xf7 set to 6 type @ 78 +MTRR addr 0xf7-0xf8 set to 6 type @ 79 +MTRR addr 0xf8-0xf9 set to 6 type @ 80 +MTRR addr 0xf9-0xfa set to 6 type @ 81 +MTRR addr 0xfa-0xfb set to 6 type @ 82 +MTRR addr 0xfb-0xfc set to 6 type @ 83 +MTRR addr 0xfc-0xfd set to 6 type @ 84 +MTRR addr 0xfd-0xfe set to 6 type @ 85 +MTRR addr 0xfe-0xff set to 6 type @ 86 +MTRR addr 0xff-0x100 set to 6 type @ 87 +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 32 bits +MTRR: default type WB/UC MTRR counts: 4/4. +MTRR: UC selected as default type. +MTRR: 0 base 0x0000000000000000 mask 0x0000000080000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x00000000c0000000 type 6 +MTRR: 2 base 0x00000000bf800000 mask 0x00000000ff800000 type 0 +MTRR: 3 base 0x00000000d0000000 mask 0x00000000f0000000 type 1 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x00 done. +CPU: 0 2 siblings +CPU: 0 has sibling 1 +CPU #0 initialized +CPU1: stack_base 00160000, stack_end 00160ff8 +Asserting INIT. +Waiting for send to finish... ++Deasserting INIT. +Waiting for send to finish... ++#startup loops: 2. +Sending STARTUP #1 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++Sending STARTUP #2 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++After Startup. +Initializing CPU #1 +Waiting for 1 CPUS to stop +CPU: vendor Intel device 6ec +CPU: family 06, model 0e, stepping 0c +Enabling cache +microcode: sig=0x6ec pf=0x20 revision=0x0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +microcode: updated to revision 0x54 date=2006-05-01 +CPU: Intel(R) Core(TM) Duo CPU L2400 @ 1.66GHz. +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 32 bits +MTRR: 0 base 0x0000000000000000 mask 0x0000000080000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x00000000c0000000 type 6 +MTRR: 2 base 0x00000000bf800000 mask 0x00000000ff800000 type 0 +MTRR: 3 base 0x00000000d0000000 mask 0x00000000f0000000 type 1 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x01 done. +CPU: 1 2 siblings +CPU #1 initialized +CPU 1 going down... +All AP CPUs stopped (11641 loops) +CPU1: stack: 00160000 - 00161000, lowest used address 00160c68, stack used: 920 bytes +CPU_CLUSTER: 0 init 687708 usecs +PCI: 00:00.0 init +Normal boot. +PCI: 00:00.0 init 2905 usecs +PCI: 00:02.0 init +Initializing VGA without OPROM. +GMADR=0xd0000008 GTTADR=0xe4400000 +i915lightup: graphics d0020000 mmio e4300000 addrport 50a0 physbase bf800000 +Extracted contents: +header: 00 ff ff ff ff ff ff 00 +serial number: 30 ae 00 40 00 00 00 00 00 0f +version: 01 03 +basic params: 80 19 12 78 ea +chroma info: ed 75 91 57 4f 8b 26 21 50 54 +established: 21 08 00 +standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 +descriptor 1: 28 15 00 40 41 00 26 30 18 88 36 00 f6 b9 00 00 00 18 +descriptor 2: ed 10 00 40 41 00 26 30 18 88 36 00 f6 b9 00 00 00 18 +descriptor 3: 00 00 00 0f 00 61 43 32 61 43 28 0f 01 00 4c a3 58 4a +descriptor 4: 00 00 00 fe 00 4c 54 4e 31 32 31 58 4a 2d 4c 30 37 0a +extensions: 00 +checksum: 00 + +Manufacturer: LEN Model 4000 Serial Number 0 +EDID version: 1.3 +Digital display +Maximum image size: 25 cm x 18 cm +Gamma: 220% +Check DPMS levels +DPMS levels: Standby Suspend Off +Supported color formats: RGB 4:4:4, YCrCb 4:2:2 +First detailed timing is preferred timing +Established timings supported: + 640x480@60Hz + 800x600@60Hz + 1024x768@60Hz +Standard timings supported: +Detailed timings +Hex of detail: 281500404100263018883600f6b900000018 +Did detailed timing +Detailed mode (IN HEX): Clock 54160 KHz, f6 mm x b9 mm + 0400 0418 04a0 0540 hborder 0 + 0300 0303 0309 0326 vborder 0 + -hsync -vsync +Hex of detail: ed1000404100263018883600f6b900000018 +Detailed mode (IN HEX): Clock 54160 KHz, f6 mm x b9 mm + 0400 0418 04a0 0540 hborder 0 + 0300 0303 0309 0326 vborder 0 + -hsync -vsync +Hex of detail: 0000000f006143326143280f01004ca3584a +Manufacturer-specified data, tag 15 +Hex of detail: 000000fe004c544e313231584a2d4c30370a +ASCII string: LTN121XJ +Checksum +Checksum: 0x0 (valid) + +Unknown extension block + +EDID block does NOT conform to EDID 1.3! + Missing name descriptor + Missing monitor ranges + Detailed block string not properly terminated +EDID block does not conform at all! + Bad year of manufacture + Detailed blocks filled with garbage +I915_WRITE(HTOTAL(pipe), 053f03ff) +I915_WRITE(HBLANK(pipe),0x053f03ff) +I915_WRITE(HSYNC(pipe),0x049f0417) +I915_WRITE(VTOTAL(pipe), 032502ff) +I915_WRITE(VBLANK(pipe),0x032502ff) +I915_WRITE(VSYNC(pipe),0x03080302) +Table has 2247 elements +Change verbosity to 0 +run: return 2246 +Run returns 2247 +gtt_setup: GTT PGETLB_CTL register: 0x0 +gtt_setup: GTT PGETLB_CTL register: 0x1 +gtt_setup: GTT PGETLB_CTL register: 0xbf800001 +gtt_setup: GTT PGETLB_CTL register: 0xbf800003 +gtt_setup is enabled: GTT PGETLB_CTL register: 0x1 +setgtt(0,1600,0xbf800000,4096); +GTT PGETLB_CTL register: 0xbf800001 +GTT Enabled +memset d0020000 to 0x00 for 3145728 bytes +229929 microseconds +PCI: 00:02.0 init 265041 usecs +PCI: 00:02.1 init +PCI: 00:02.1 init 2382 usecs +PCI: 00:1b.0 init +Azalia: codec type: Azalia +Azalia: base = e4440000 +Azalia: codec_mask = 03 +Azalia: Initializing codec #1 +Azalia: codec viddid: 14f12bfa +Azalia: No verb! +Azalia: Initializing codec #0 +Azalia: codec viddid: 11d41981 +Azalia: No verb! +PCI: 00:1b.0 init 25808 usecs +PCI: 00:1c.0 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.0 init 4490 usecs +PCI: 00:1c.1 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.1 init 4490 usecs +PCI: 00:1c.2 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.2 init 4491 usecs +PCI: 00:1c.3 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.3 init 4489 usecs +PCI: 00:1d.0 init +UHCI: Setting up controller.. done. +PCI: 00:1d.0 init 4925 usecs +PCI: 00:1d.1 init +UHCI: Setting up controller.. done. +PCI: 00:1d.1 init 4926 usecs +PCI: 00:1d.2 init +UHCI: Setting up controller.. done. +PCI: 00:1d.2 init 4924 usecs +PCI: 00:1d.3 init +UHCI: Setting up controller.. done. +PCI: 00:1d.3 init 4925 usecs +PCI: 00:1d.7 init +EHCI: Setting up controller.. done. +PCI: 00:1d.7 init 4933 usecs +PCI: 00:1e.0 init +PCI: 00:1e.0 init 1683 usecs +PCI: 00:1f.0 init +i82801gx: lpc_init +IOAPIC: Initializing IOAPIC at 0xfec00000 +IOAPIC: Bootstrap Processor Local APIC = 0x00 +IOAPIC: ID = 0x02 +IOAPIC: Dumping registers + reg 0x0000: 0x02000000 + reg 0x0001: 0x00170020 + reg 0x0002: 0x00170020 +WARNING: No CMOS option 'power_on_after_fail'. +Set power on after power failure. +NMI sources enabled. +rtc_failed = 0x0 +RTC Init +i8259_configure_irq_trigger: current interrupts are 0x0 +i8259_configure_irq_trigger: try to set interrupts 0x200 +Disabling ACPI via APMC: +done. +Locking SMM. +PCI: 00:1f.0 init 50455 usecs +PCI: 00:1f.1 init +i82801gx_ide: initializing... IDE0 +PCI: 00:1f.1 init 4942 usecs +PCI: 00:1f.2 init +i82801gx_sata: initializing... +SATA controller in AHCI mode. +PCI: 00:1f.2 init 7210 usecs +PCI: 01:00.0 init +PCI: 01:00.0 init 1669 usecs +PCI: 02:00.0 init +PCI: 02:00.0 init 1668 usecs +PCI: 05:00.0 init +Ricoh RL5c476: Initializing. +CF Base = 0 +CF boot not enabled. +PCI: 05:00.0 init 7377 usecs +PCI: 05:00.1 init +PCI: 05:00.1 init 1670 usecs +PCI: 05:00.2 init +PCI: 05:00.2 init 1670 usecs +PCI: 05:00.3 init +PCI: 05:00.3 init 1670 usecs +PNP: 164e.2 init +PNP: 164e.2 init 1582 usecs +PNP: 164e.7 init +PNP: 164e.7 init 1584 usecs +PNP: 164e.19 init +PNP: 164e.19 init 1670 usecs +PNP: 002e.1 init +PNP: 002e.1 init 1582 usecs +PNP: 002e.3 init +PNP: 002e.3 init 1584 usecs +PNP: 002e.7 init +PNP: 002e.7 init 1582 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:69 init +I2C: 01:69 init 16205 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:54 init +I2C: 01:54 init 3593 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:55 init +I2C: 01:55 init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:56 init +I2C: 01:56 init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:57 init +I2C: 01:57 init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5c init +Locking EEPROM RFID +init EEPROM done +I2C: 01:5c init 28615 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5d init +I2C: 01:5d init 3593 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5e init +I2C: 01:5e init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5f init +I2C: 01:5f init 3593 usecs +Devices initialized +Show all devs...After init. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.3: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PNP: 164e.2: enabled 1 +PNP: 164e.3: enabled 0 +PNP: 164e.7: enabled 1 +PNP: 164e.19: enabled 1 +PNP: 002e.0: enabled 0 +PNP: 002e.1: enabled 1 +PNP: 002e.2: enabled 0 +PNP: 002e.3: enabled 1 +PNP: 002e.7: enabled 1 +PNP: 002e.a: enabled 0 +PCI: 00:1f.1: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 01:69: enabled 1 +I2C: 01:54: enabled 1 +I2C: 01:55: enabled 1 +I2C: 01:56: enabled 1 +I2C: 01:57: enabled 1 +I2C: 01:5c: enabled 1 +I2C: 01:5d: enabled 1 +I2C: 01:5e: enabled 1 +I2C: 01:5f: enabled 1 +PCI: 00:1c.2: enabled 1 +PCI: 00:1c.3: enabled 1 +PCI: 00:1e.0: enabled 1 +PCI: 01:00.0: enabled 1 +PCI: 02:00.0: enabled 1 +PCI: 05:00.0: enabled 1 +PCI: 05:00.1: enabled 1 +PCI: 05:00.2: enabled 1 +PCI: 05:00.3: enabled 1 +APIC: 01: enabled 1 +BS: Exiting BS_DEV_INIT state. +BS: BS_DEV_INIT times (us): entry 0 run 1411225 exit 0 +BS: Entering BS_POST_DEVICE state. +CBMEM region bf6d0000-bf7fffff (cbmem_check_toc) +Adding CBMEM entry as no. 4 +Moving GDT to bf6e0600...ok +Finalize devices... +Devices finalized +BS: Exiting BS_POST_DEVICE state. +BS: BS_POST_DEVICE times (us): entry 9470 run 6558 exit 0 +BS: Entering BS_OS_RESUME_CHECK state. +BS: Exiting BS_OS_RESUME_CHECK state. +BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3401 exit 0 +BS: Entering BS_WRITE_TABLES state. +Copying Interrupt Routing Table to 0x000f0000... done. +Adding CBMEM entry as no. 5 +Copying Interrupt Routing Table to 0xbf6e0800... done. +PIRQ table: 272 bytes. +Wrote the mp table end at: 000f0410 - 000f05cc +Adding CBMEM entry as no. 6 +Wrote the mp tabl +6653 bytes lost diff --git a/docs/future/dumps/5927_config b/docs/future/dumps/5927_config new file mode 100644 index 00000000..045ca300 --- /dev/null +++ b/docs/future/dumps/5927_config @@ -0,0 +1,441 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_EXPERT=y +CONFIG_LOCALVERSION="7BETC7WW (2.08 )" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_SCONFIG_GENPARSER is not set +CONFIG_USE_OPTION_TABLE=y +CONFIG_COMPRESS_RAMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_EARLY_CBMEM_INIT=y +# CONFIG_BROKEN_CAR_MIGRATE is not set +# CONFIG_DYNAMIC_CBMEM is not set +# CONFIG_COLLECT_TIMESTAMPS is not set +# CONFIG_USE_BLOBS is not set +# CONFIG_COVERAGE is not set + +# +# Mainboard +# +# CONFIG_VENDOR_AAEON is not set +# CONFIG_VENDOR_ABIT is not set +# CONFIG_VENDOR_ADLINK is not set +# CONFIG_VENDOR_ADVANSUS is not set +# CONFIG_VENDOR_ADVANTECH is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_ARIMA is not set +# CONFIG_VENDOR_ARTECGROUP is not set +# CONFIG_VENDOR_ASI is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_A_TREND is not set +# CONFIG_VENDOR_AVALUE is not set +# CONFIG_VENDOR_AXUS is not set +# CONFIG_VENDOR_AZZA is not set +# CONFIG_VENDOR_BACHMANN is not set +# CONFIG_VENDOR_BCOM is not set +# CONFIG_VENDOR_BIFFEROS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BROADCOM is not set +# CONFIG_VENDOR_COMPAQ is not set +# CONFIG_VENDOR_CUBIETECH is not set +# CONFIG_VENDOR_DIGITALLOGIC is not set +# CONFIG_VENDOR_DMP is not set +# CONFIG_VENDOR_EAGLELION is not set +# CONFIG_VENDOR_ECS is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GIZMOSPHERE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_IEI is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_IWAVE is not set +# CONFIG_VENDOR_IWILL is not set +# CONFIG_VENDOR_JETWAY is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LANNER is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LINUTOP is not set +# CONFIG_VENDOR_LIPPERT is not set +# CONFIG_VENDOR_MITAC is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NEC is not set +# CONFIG_VENDOR_NEWISYS is not set +# CONFIG_VENDOR_NOKIA is not set +# CONFIG_VENDOR_NVIDIA is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_RCA is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SOYO is not set +# CONFIG_VENDOR_SUNW is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_TECHNEXION is not set +# CONFIG_VENDOR_TECHNOLOGIC is not set +# CONFIG_VENDOR_TELEVIDEO is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_THOMSON is not set +# CONFIG_VENDOR_TRAVERSE is not set +# CONFIG_VENDOR_TYAN is not set +# CONFIG_VENDOR_VIA is not set +# CONFIG_VENDOR_WINENT is not set +# CONFIG_VENDOR_WYSE is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_DIR="lenovo/x60" +CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60 / X60s" +CONFIG_IRQ_SLOT_COUNT=18 +CONFIG_MAINBOARD_VENDOR="Lenovo" +CONFIG_MAX_CPUS=2 +CONFIG_RAMTOP=0x200000 +CONFIG_HEAP_SIZE=0x4000 +CONFIG_RAMBASE=0x100000 +CONFIG_VGA_BIOS_ID="8086,27a2" +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +# CONFIG_VGA_BIOS is not set +# CONFIG_UDELAY_IO is not set +CONFIG_DCACHE_RAM_BASE=0xffdf8000 +CONFIG_DCACHE_RAM_SIZE=0x8000 +CONFIG_ACPI_SSDTX_NUM=0 +# CONFIG_PCI_64BIT_PREF_MEM is not set +CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_ID_SECTION_OFFSET=0x80 +CONFIG_STACK_SIZE=0x1000 +CONFIG_CACHE_ROM_SIZE_OVERRIDE=0 +CONFIG_CBFS_SIZE=0x200000 +CONFIG_BOARD_LENOVO_X60=y +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_SEABIOS_PS2_TIMEOUT=3000 +CONFIG_MAINBOARD_VERSION="ThinkPad X60" +CONFIG_CPU_ADDR_BITS=32 +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 +# CONFIG_USBDEBUG is not set +CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0 +CONFIG_BOARD_ROMSIZE_KB_2048=y +# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +CONFIG_COREBOOT_ROMSIZE_KB_2048=y +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +CONFIG_COREBOOT_ROMSIZE_KB=2048 +CONFIG_ROM_SIZE=0x200000 +CONFIG_MAINBOARD_SERIAL_NUMBER="L3AZ921" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="1703WMF" +CONFIG_ARCH_X86=y +# CONFIG_ARCH_ARMV7 is not set +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_AP_IN_SIPI_WAIT=y +# CONFIG_SIPI_VECTOR_IN_ROM is not set +CONFIG_NUM_IPI_STARTS=2 +# CONFIG_ROMCC is not set +CONFIG_PC80_SYSTEM=y +CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/i945/bootblock.c" +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801gx/bootblock.c" +CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y +# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set +CONFIG_HPET_ADDRESS=0xfed00000 +# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set +# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set +# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set +# CONFIG_MAINBOARD_HAS_CHROMEOS is not set +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" +# CONFIG_UPDATE_IMAGE is not set + +# +# Chipset +# + +# +# CPU +# +# CONFIG_CPU_ALLWINNER_A10 is not set +# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set +# CONFIG_CPU_TI_AM335X is not set +CONFIG_SOCKET_SPECIFIC_OPTIONS=y +CONFIG_XIP_ROM_SIZE=0x10000 +# CONFIG_CPU_AMD_AGESA is not set +CONFIG_HIGH_SCRATCH_MEMORY_SIZE=0x0 +CONFIG_CPU_INTEL_MODEL_6EX=y +CONFIG_CPU_INTEL_MODEL_6FX=y +CONFIG_SMM_TSEG_SIZE=0 +CONFIG_CPU_INTEL_SOCKET_MFCPGA478=y +CONFIG_SSE2=y +# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set +# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set +# CONFIG_PARALLEL_CPU_INIT is not set +CONFIG_UDELAY_LAPIC=y +CONFIG_LAPIC_MONOTONIC_TIMER=y +# CONFIG_UDELAY_TSC is not set +# CONFIG_UDELAY_TIMER2 is not set +# CONFIG_TSC_CALIBRATE_WITH_IO is not set +# CONFIG_TSC_SYNC_LFENCE is not set +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_LOGICAL_CPUS=y +# CONFIG_SMM_TSEG is not set +# CONFIG_SMM_MODULES is not set +# CONFIG_X86_AMD_FIXED_MTRRS is not set +# CONFIG_PLATFORM_USES_FSP is not set +# CONFIG_PARALLEL_MP is not set +# CONFIG_BACKUP_DEFAULT_SMM_REGION is not set +# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set +CONFIG_CACHE_AS_RAM=y +CONFIG_SMP=y +CONFIG_AP_SIPI_VECTOR=0xfffff000 +CONFIG_MMX=y +CONFIG_SSE=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_CPU_MICROCODE_ADDED_DURING_BUILD=y +CONFIG_CPU_MICROCODE_CBFS_GENERATE=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +CONFIG_VIDEO_MB=0 +# CONFIG_NORTHBRIDGE_AMD_AGESA is not set +# CONFIG_AMD_NB_CIMX is not set +# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set +CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y +CONFIG_NORTHBRIDGE_INTEL_I945=y +# CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC is not set +CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y +CONFIG_CHANNEL_XOR_RANDOMIZATION=y +# CONFIG_OVERRIDE_CLOCK_DISABLE is not set +# CONFIG_CHECK_SLFRCS_ON_RESUME is not set +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_MAX_PIRQ_LINKS=4 + +# +# Southbridge +# +CONFIG_EHCI_BAR=0xfef00000 +# CONFIG_AMD_SB_CIMX is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set +CONFIG_SOUTHBRIDGE_INTEL_COMMON=y +CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y +CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y + +# +# Super I/O +# +CONFIG_SUPERIO_NSC_PC87382=y +CONFIG_SUPERIO_NSC_PC87392=y + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_DOCK_EARLY_INIT=y +CONFIG_EC_LENOVO_PMH7=y + +# +# SoC +# + +# +# Devices +# +CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y +# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is not set +CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_ON_DEVICE_ROM_RUN is not set +# CONFIG_MULTIPLE_VGA_ADAPTERS is not set +CONFIG_PCI=y +# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_AGP_PLUGIN_SUPPORT=y +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +# CONFIG_AZALIA_PLUGIN_SUPPORT is not set +# CONFIG_PCIEXP_COMMON_CLOCK is not set +# CONFIG_PCIEXP_ASPM is not set +CONFIG_PCI_BUS_SEGN_BITS=0 +# CONFIG_EARLY_PCI_BRIDGE is not set + +# +# VGA BIOS +# + +# +# Display +# + +# +# PXE ROM +# +# CONFIG_PXE_ROM is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 + +# +# Generic Drivers +# +# CONFIG_DRIVERS_I2C_RTD2132 is not set +CONFIG_DRIVERS_ICS_954309=y +# CONFIG_INTEL_DP is not set +# CONFIG_INTEL_DDI is not set +# CONFIG_INTEL_EDID is not set +# CONFIG_IPMI_KCS is not set +# CONFIG_DRIVER_MAXIM_MAX77686 is not set +# CONFIG_DRIVER_PARADE_PS8625 is not set +# CONFIG_TPM is not set +# CONFIG_DRIVERS_SIL_3114 is not set +# CONFIG_SPI_FLASH is not set +# CONFIG_DRIVER_TI_TPS65090 is not set +CONFIG_DRIVERS_UART=y +CONFIG_DRIVERS_UART_8250IO=y +# CONFIG_NO_UART_ON_SUPERIO is not set +# CONFIG_DRIVERS_UART_8250MEM is not set +# CONFIG_HAVE_UART_SPECIAL is not set +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_DRIVERS_UART_PL011 is not set +CONFIG_HAVE_USBDEBUG=y +# CONFIG_HAVE_USBDEBUG_OPTIONS is not set +# CONFIG_DRIVER_XPOWERS_AXP209 is not set +CONFIG_MMCONF_SUPPORT_DEFAULT=y +CONFIG_MMCONF_SUPPORT=y +# CONFIG_BOOTMODE_STRAPS is not set + +# +# Console +# +CONFIG_SQUELCH_EARLY_SMP=y +CONFIG_CONSOLE_SERIAL=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_BAUD=115200 +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x10000 +CONFIG_CONSOLE_CAR_BUFFER_SIZE=0xc00 +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +# CONFIG_NO_POST is not set +# CONFIG_CMOS_POST is not set +# CONFIG_POST_IO is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_HAVE_ACPI_RESUME=y +# CONFIG_HAVE_ACPI_SLIC is not set +CONFIG_HAVE_HARD_RESET=y +CONFIG_HAVE_MONOTONIC_TIMER=y +# CONFIG_TIMER_QUEUE is not set +CONFIG_HAVE_OPTION_TABLE=y +# CONFIG_PIRQ_ROUTE is not set +CONFIG_HAVE_SMI_HANDLER=y +# CONFIG_PCI_IO_CFG_EXT is not set +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y +# CONFIG_VGA is not set +# CONFIG_GFXUMA is not set +# CONFIG_RELOCATABLE_MODULES is not set +# CONFIG_HAVE_REFCODE_BLOB is not set +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_HAVE_MP_TABLE=y +CONFIG_HAVE_PIRQ_TABLE=y + +# +# System tables +# +CONFIG_GENERATE_ACPI_TABLES=y +CONFIG_GENERATE_MP_TABLE=y +CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_GENERATE_SMBIOS_TABLES=y + +# +# Payload +# +# CONFIG_PAYLOAD_NONE is not set +CONFIG_PAYLOAD_ELF=y +# CONFIG_PAYLOAD_LINUX is not set +# CONFIG_PAYLOAD_SEABIOS is not set +# CONFIG_PAYLOAD_FILO is not set +# CONFIG_PAYLOAD_GRUB2 is not set +# CONFIG_PAYLOAD_TIANOCORE is not set +# CONFIG_SEABIOS_THREAD_OPTIONROMS is not set +CONFIG_PAYLOAD_FILE="grub.elf" +CONFIG_COMPRESSED_PAYLOAD_LZMA=y + +# +# Debugging +# +# CONFIG_GDB_STUB is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set +# CONFIG_HAVE_DEBUG_CAR is not set +# CONFIG_DEBUG_PIRQ is not set +# CONFIG_HAVE_DEBUG_SMBUS is not set +# CONFIG_DEBUG_SMI is not set +# CONFIG_DEBUG_SMM_RELOCATION is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_ACPI is not set +# CONFIG_TRACE is not set +# CONFIG_ENABLE_APIC_EXT_ID is not set +CONFIG_WARNINGS_ARE_ERRORS=y +# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set +# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set +# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set +# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set +# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set +CONFIG_REG_SCRIPT=y +CONFIG_MAX_REBOOT_CNT=3 diff --git a/docs/future/dumps/5927_crashdump b/docs/future/dumps/5927_crashdump new file mode 100644 index 00000000..3e09cd59 --- /dev/null +++ b/docs/future/dumps/5927_crashdump @@ -0,0 +1,77 @@ +Time: 1401830541 s 274954 us +Kernel: 3.14.4-gnuowen +PCI ID: 0x27a2 +EIR: 0x00000010 +IER: 0x00028053 +PGTBL_ER: 0x00000013 +FORCEWAKE: 0x00000000 +DERRMR: 0x00000000 +CCID: 0x00000000 +Missed interrupts: 0x00000000 + fence[0] = 00000000 + fence[1] = 00000000 + fence[2] = 00000000 + fence[3] = 00000000 + fence[4] = 00000000 + fence[5] = 00000000 + fence[6] = 00000000 + fence[7] = 00000000 + fence[8] = 00000000 + fence[9] = 00000000 + fence[10] = 00000000 + fence[11] = 00000000 + fence[12] = 00000000 + fence[13] = 00000000 + fence[14] = 00000000 + fence[15] = 00000000 + INSTDONE_0: 0x7fffffc0 + INSTDONE_1: 0x00000000 + INSTDONE_2: 0x00000000 + INSTDONE_3: 0x00000000 +Active [0]: +Pinned [0]: +Num Pipes: 2 +Pipe [0]: + Power: off + SRC: 00000000 +Plane [0]: + CNTR: 00000000 + STRIDE: 00000000 + SIZE: 00000000 + POS: 00000000 + ADDR: 00000000 +Cursor [0]: + CNTR: 00000000 + POS: 00000000 + BASE: 00000000 +Pipe [1]: + Power: off + SRC: 00000000 +Plane [1]: + CNTR: 00000000 + STRIDE: 00000000 + SIZE: 00000000 + POS: 00000000 + ADDR: 00000000 +Cursor [1]: + CNTR: 00000000 + POS: 00000000 + BASE: 00000000 +CPU transcoder: A + Power: off + CONF: 00000000 + HTOTAL: 00000000 + HBLANK: 00000000 + HSYNC: 00000000 + VTOTAL: 00000000 + VBLANK: 00000000 + VSYNC: 00000000 +CPU transcoder: A + Power: off + CONF: 00000000 + HTOTAL: 00000000 + HBLANK: 00000000 + HSYNC: 00000000 + VTOTAL: 00000000 + VBLANK: 00000000 + VSYNC: 00000000 diff --git a/docs/future/dumps/coreboot_5296_oprom_grub_cbmemc b/docs/future/dumps/coreboot_5296_oprom_grub_cbmemc new file mode 100644 index 00000000..c769d1a0 --- /dev/null +++ b/docs/future/dumps/coreboot_5296_oprom_grub_cbmemc @@ -0,0 +1,1436 @@ + + +coreboot-4.0-6195-g3b7c130-7BETC7WW (2.08 ) Tue Jun 3 16:36:44 BST 2014 starting... + +Mobile Intel(R) 82945GM/GME Express Chipset +(G)MCH capable of up to FSB 800 MHz +(G)MCH capable of up to DDR2-667 +Setting up static southbridge registers... GPIOS... done. +Disabling Watchdog reboot... done. +Setting up static northbridge registers... done. +Waiting for MCHBAR to come up...ok +PM1_CNT: 00001c00 +SMBus controller enabled. +Setting up RAM controller. +This mainboard supports Dual Channel Operation. +DDR II Channel 0 Socket 0: x16DS +DDR II Channel 1 Socket 0: x8DDS +Memory will be driven at 667MHz with CAS=5 clocks +tRAS = 15 cycles +tRP = 5 cycles +tRCD = 5 cycles +Refresh: 7.8us +tWR = 5 cycles +DIMM 0 side 0 = 512 MB +DIMM 0 side 1 = 512 MB +DIMM 2 side 0 = 1024 MB +DIMM 2 side 1 = 1024 MB +tRFC = 43 cycles +Setting Graphics Frequency... +FSB: 667 MHz Voltage: 1.05V Render: 250Mhz Display: 200MHz +Setting Memory Frequency... CLKCFG=0x00010023, CLKCFG=0x00010043, ok +Setting mode of operation for memory channels...Dual Channel Assymetric. +Programming Clock Crossing...MEM=667 FSB=667... ok +Setting RAM size... +C0DRB = 0x20202010 +C1DRB = 0x60606040 +TOLUD = 0x00c0 +Setting row attributes... +C0DRA = 0x0033 +C1DRA = 0x0033 +DIMM0 has 8 banks. +DIMM2 has 8 banks. +one dimm per channel config.. +Initializing System Memory IO... +Programming Dual Channel RCOMP +Table Index: 3 +Programming DLL Timings... +Enabling System Memory IO... +jedec enable sequence: bank 0 +jedec enable sequence: bank 1 +bankaddr from bank size of rank 0 +jedec enable sequence: bank 4 +bankaddr from bank size of rank 1 +jedec enable sequence: bank 5 +bankaddr from bank size of rank 4 +receive_enable_autoconfig() for channel 0 + find_strobes_low() + set_receive_enable() medium=0x3, coarse=0x5 + set_receive_enable() medium=0x1, coarse=0x5 + find_strobes_edge() + set_receive_enable() medium=0x1, coarse=0x5 + set_receive_enable() medium=0x3, coarse=0x5 + set_receive_enable() medium=0x1, coarse=0x5 + add_quarter_clock() mediumcoarse=15 fine=f3 + set_receive_enable() medium=0x3, coarse=0x5 + find_preamble() + set_receive_enable() medium=0x3, coarse=0x4 + set_receive_enable() medium=0x3, coarse=0x3 + add_quarter_clock() mediumcoarse=0f fine=73 + normalize() + set_receive_enable() medium=0x0, coarse=0x4 +receive_enable_autoconfig() for channel 1 + find_strobes_low() + set_receive_enable() medium=0x3, coarse=0x5 + set_receive_enable() medium=0x1, coarse=0x5 + find_strobes_edge() + set_receive_enable() medium=0x1, coarse=0x5 + add_quarter_clock() mediumcoarse=15 fine=c5 + set_receive_enable() medium=0x3, coarse=0x5 + find_preamble() + set_receive_enable() medium=0x3, coarse=0x4 + set_receive_enable() medium=0x3, coarse=0x3 + add_quarter_clock() mediumcoarse=0f fine=45 + normalize() + set_receive_enable() medium=0x0, coarse=0x4 +RAM initialization finished. +Setting up Egress Port RCRB +Loading p + +*** Log truncated, 497 characters dropped. *** + +Adding CBMEM entry as no. 3 +Trying CBFS ramstage loader. +CBFS: loading stage fallback/ramstage @ 0x100000 (327736 bytes), entry @ 0x100000 +coreboot-4.0-6195-g3b7c130-7BETC7WW (2.08 ) Tue Jun 3 16:36:44 BST 2014 booting... +BS: Entering BS_PRE_DEVICE state. +BS: Exiting BS_PRE_DEVICE state. +BS: BS_PRE_DEVICE times (us): entry 0 run 2976 exit 0 +BS: Entering BS_DEV_INIT_CHIPS state. +BS: Exiting BS_DEV_INIT_CHIPS state. +BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3323 exit 0 +BS: Entering BS_DEV_ENUMERATE state. +Enumerating buses... +Show all devs...Before device enumeration. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.3: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PNP: 164e.2: enabled 1 +PNP: 164e.3: enabled 0 +PNP: 164e.7: enabled 1 +PNP: 164e.19: enabled 1 +PNP: 002e.0: enabled 0 +PNP: 002e.1: enabled 1 +PNP: 002e.2: enabled 0 +PNP: 002e.3: enabled 1 +PNP: 002e.7: enabled 1 +PNP: 002e.a: enabled 0 +PCI: 00:1f.1: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 00:69: enabled 1 +I2C: 00:54: enabled 1 +I2C: 00:55: enabled 1 +I2C: 00:56: enabled 1 +I2C: 00:57: enabled 1 +I2C: 00:5c: enabled 1 +I2C: 00:5d: enabled 1 +I2C: 00:5e: enabled 1 +I2C: 00:5f: enabled 1 +Compare with tree... +Root Device: enabled 1 + CPU_CLUSTER: 0: enabled 1 + APIC: 00: enabled 1 + DOMAIN: 0000: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:02.0: enabled 1 + PCI: 00:02.1: enabled 1 + PCI: 00:1b.0: enabled 1 + PCI: 00:1c.0: enabled 1 + PCI: 00:1c.1: enabled 1 + PCI: 00:1d.0: enabled 1 + PCI: 00:1d.1: enabled 1 + PCI: 00:1d.2: enabled 1 + PCI: 00:1d.3: enabled 1 + PCI: 00:1d.7: enabled 1 + PCI: 00:1f.0: enabled 1 + PNP: 00ff.1: enabled 1 + PNP: 00ff.2: enabled 1 + PNP: 164e.2: enabled 1 + PNP: 164e.3: enabled 0 + PNP: 164e.7: enabled 1 + PNP: 164e.19: enabled 1 + PNP: 002e.0: enabled 0 + PNP: 002e.1: enabled 1 + PNP: 002e.2: enabled 0 + PNP: 002e.3: enabled 1 + PNP: 002e.7: enabled 1 + PNP: 002e.a: enabled 0 + PCI: 00:1f.1: enabled 1 + PCI: 00:1f.2: enabled 1 + PCI: 00:1f.3: enabled 1 + I2C: 00:69: enabled 1 + I2C: 00:54: enabled 1 + I2C: 00:55: enabled 1 + I2C: 00:56: enabled 1 + I2C: 00:57: enabled 1 + I2C: 00:5c: enabled 1 + I2C: 00:5d: enabled 1 + I2C: 00:5e: enabled 1 + I2C: 00:5f: enabled 1 +scan_static_bus for Root Device +CPU_CLUSTER: 0 enabled +DOMAIN: 0000 enabled +DOMAIN: 0000 scanning... +PCI: pci_scan_bus for bus 00 +PCI: 00:00.0 [8086/27a0] ops +PCI: 00:00.0 [8086/27a0] enabled +PCI: 00:02.0 [8086/27a2] ops +PCI: 00:02.0 [8086/27a2] enabled +PCI: 00:02.1 [8086/27a6] ops +PCI: 00:02.1 [8086/27a6] enabled +PCI: 00:1b.0 [8086/27d8] ops +PCI: 00:1b.0 [8086/27d8] enabled +PCI: 00:1c.0 [8086/0000] bus ops +PCI: 00:1c.0 [8086/27d0] enabled +PCI: 00:1c.1 [8086/0000] bus ops +PCI: 00:1c.1 [8086/27d2] enabled +PCI: 00:1c.2 [8086/0000] bus ops +PCI: 00:1c.2 [8086/27d4] enabled +PCI: 00:1c.3 [8086/0000] bus ops +PCI: 00:1c.3 [8086/27d6] enabled +PCI: 00:1d.0 [8086/27c8] ops +PCI: 00:1d.0 [8086/27c8] enabled +PCI: 00:1d.1 [8086/27c9] ops +PCI: 00:1d.1 [8086/27c9] enabled +PCI: 00:1d.2 [8086/27ca] ops +PCI: 00:1d.2 [8086/27ca] enabled +PCI: 00:1d.3 [8086/27cb] ops +PCI: 00:1d.3 [8086/27cb] enabled +PCI: 00:1d.7 [8086/27cc] ops +PCI: 00:1d.7 [8086/27cc] enabled +PCI: 00:1e.0 [8086/2448] bus ops +PCI: 00:1e.0 [8086/2448] enabled +PCI: 00:1f.0 [8086/27b9] bus ops +PCI: 00:1f.0 [8086/27b9] enabled +PCI: 00:1f.1 [8086/27df] ops +PCI: 00:1f.1 [8086/27df] enabled +PCI: 00:1f.2 [8086/0000] ops +PCI: 00:1f.2 [8086/27c4] enabled +PCI: 00:1f.3 [8086/27da] bus ops +PCI: 00:1f.3 [8086/27da] enabled +do_pci_scan_bridge for PCI: 00:1c.0 +PCI: pci_scan_bus for bus 01 +PCI: 01:00.0 [8086/109a] enabled +PCI: pci_scan_bus returning with max=001 +do_pci_scan_bridge returns max 1 +do_pci_scan_bridge for PCI: 00:1c.1 +PCI: pci_scan_bus for bus 02 +PCI: 02:00.0 [168c/002b] enabled +PCI: pci_scan_bus returning with max=002 +do_pci_scan_bridge returns max 2 +do_pci_scan_bridge for PCI: 00:1c.2 +PCI: pci_scan_bus for bus 03 +PCI: pci_scan_bus returning with max=003 +do_pci_scan_bridge returns max 3 +do_pci_scan_bridge for PCI: 00:1c.3 +PCI: pci_scan_bus for bus 04 +PCI: pci_scan_bus returning with max=004 +do_pci_scan_bridge returns max 4 +do_pci_scan_bridge for PCI: 00:1e.0 +PCI: pci_scan_bus for bus 05 +PCI: 05:00.0 [1180/0476] bus ops +PCI: 05:00.0 [1180/0476] enabled +PCI: 05:00.1 [1180/0552] enabled +PCI: 05:00.2 [1180/0822] enabled +PCI: 05:00.3 [1180/0843] enabled +do_pci_scan_bridge for PCI: 05:00.0 +PCI: pci_scan_bus for bus 06 +PCI: pci_scan_bus returning with max=006 +do_pci_scan_bridge returns max 6 +PCI: pci_scan_bus returning with max=006 +do_pci_scan_bridge returns max 6 +scan_static_bus for PCI: 00:1f.0 +WARNING: No CMOS option 'touchpad'. +PNP: 00ff.1 enabled +recv_ec_data: 0x37 +recv_ec_data: 0x42 +recv_ec_data: 0x48 +recv_ec_data: 0x54 +recv_ec_data: 0x33 +recv_ec_data: 0x37 +recv_ec_data: 0x57 +recv_ec_data: 0x57 +recv_ec_data: 0x04 +recv_ec_data: 0x03 +recv_ec_data: 0x00 +recv_ec_data: 0x11 +EC Firmware ID 7BHT37WW-3.4, Version 0.01B +recv_ec_data: 0x00 +recv_ec_data: 0x10 +recv_ec_data: 0x20 +recv_ec_data: 0x30 +recv_ec_data: 0x00 +recv_ec_data: 0xa6 +recv_ec_data: 0x01 +recv_ec_data: 0x30 +PNP: 00ff.2 enabled +PNP: 164e.2 enabled +PNP: 164e.3 disabled +PNP: 164e.7 enabled +PNP: 164e.19 enabled +PNP: 002e.0 disabled +PNP: 002e.1 enabled +PNP: 002e.2 disabled +PNP: 002e.3 enabled +PNP: 002e.7 enabled +PNP: 002e.a disabled +scan_static_bus for PCI: 00:1f.0 done +scan_static_bus for PCI: 00:1f.3 +smbus: PCI: 00:1f.3[0]->I2C: 01:69 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled +scan_static_bus for PCI: 00:1f.3 done +PCI: pci_scan_bus returning with max=006 +scan_static_bus for Root Device done +done +BS: Exiting BS_DEV_ENUMERATE state. +BS: BS_DEV_ENUMERATE times (us): entry 0 run 529959 exit 0 +BS: Entering BS_DEV_RESOURCES state. +found VGA at PCI: 00:02.0 +Setting up VGA for PCI: 00:02.0 +Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 +Setting PCI_BRIDGE_CTL_VGA for bridge Root Device +Allocating resources... +Reading resources... +Root Device read_resources bus 0 link: 0 +CPU_CLUSTER: 0 read_resources bus 0 link: 0 +APIC: 00 missing read_resources +CPU_CLUSTER: 0 read_resources bus 0 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 +Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. +PCI: 00:1c.0 read_resources bus 1 link: 0 +PCI: 00:1c.0 read_resources bus 1 link: 0 done +PCI: 00:1c.1 read_resources bus 2 link: 0 +PCI: 00:1c.1 read_resources bus 2 link: 0 done +PCI: 00:1c.2 read_resources bus 3 link: 0 +PCI: 00:1c.2 read_resources bus 3 link: 0 done +PCI: 00:1c.3 read_resources bus 4 link: 0 +PCI: 00:1c.3 read_resources bus 4 link: 0 done +PCI: 00:1e.0 read_resources bus 5 link: 0 +PCI: 05:00.0 read_resources bus 6 link: 0 +PCI: 05:00.0 read_resources bus 6 link: 0 done +PCI: 00:1e.0 read_resources bus 5 link: 0 done +PCI: 00:1f.0 read_resources bus 0 link: 0 +PNP: 00ff.1 missing read_resources +PNP: 00ff.2 missing read_resources +PCI: 00:1f.0 read_resources bus 0 link: 0 done +PCI: 00:1f.3 read_resources bus 1 link: 0 +PCI: 00:1f.3 read_resources bus 1 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 done +Root Device read_resources bus 0 link: 0 done +Done reading resources. +Show resources in subtree (Root Device)...After reading. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 + PCI: 00:00.0 + PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf + PCI: 00:02.0 + PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10 + PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14 + PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18 + PCI: 00:02.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 1c + PCI: 00:02.1 + PCI: 00:02.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 + PCI: 00:1c.0 child on link 0 PCI: 01:00.0 + PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 01:00.0 + PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 + PCI: 01:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 + PCI: 00:1c.1 child on link 0 PCI: 02:00.0 + PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1c.3 + PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.3 + PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10 + PCI: 00:1e.0 child on link 0 PCI: 05:00.0 + PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 05:00.0 + PCI: 05:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 + PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffffffff flags 100 index 2c + PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffffffff flags 100 index 34 + PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 1200 index 1c + PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 05:00.1 + PCI: 05:00.1 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 10 + PCI: 05:00.2 + PCI: 05:00.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 05:00.3 + PCI: 05:00.3 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PNP: 164e.2 + PNP: 164e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 164e.3 + PNP: 164e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 164e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.7 + PNP: 164e.7 resource base 1680 size 10 align 4 gran 4 limit ffff flags c0000100 index 60 + PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.19 + PNP: 164e.19 resource base 164c size 2 align 1 gran 1 limit ffff flags c0000100 index 60 + PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 + PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 3bc size 400 align 10 gran 10 limit 7ff flags c0000100 index 60 + PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 002e.3 + PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.7 + PNP: 002e.7 resource base 1620 size 8 align 3 gran 3 limit ffff flags c0000100 index 60 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.a + PNP: 002e.a resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 60 + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PCI: 00:1f.1 + PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:1f.2 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:69 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + I2C: 01:69 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f +DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff +PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 01:00.0 18 * [0x0 - 0x1f] io +PCI: 00:1c.0 compute_resources_io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 05:00.0 2c * [0x0 - 0xfff] io +PCI: 05:00.0 34 * [0x1000 - 0x1fff] io +PCI: 00:1e.0 compute_resources_io: base: 2000 size: 2000 align: 12 gran: 12 limit: ffff done +PCI: 00:1e.0 1c * [0x0 - 0x1fff] io +PCI: 00:1c.0 1c * [0x2000 - 0x2fff] io +PCI: 00:1d.0 20 * [0x3000 - 0x301f] io +PCI: 00:1d.1 20 * [0x3020 - 0x303f] io +PCI: 00:1d.2 20 * [0x3040 - 0x305f] io +PCI: 00:1d.3 20 * [0x3060 - 0x307f] io +PCI: 00:1f.1 20 * [0x3080 - 0x308f] io +PCI: 00:1f.2 20 * [0x3090 - 0x309f] io +PCI: 00:02.0 14 * [0x30a0 - 0x30a7] io +PCI: 00:1f.1 10 * [0x30a8 - 0x30af] io +PCI: 00:1f.1 18 * [0x30b0 - 0x30b7] io +PCI: 00:1f.2 10 * [0x30b8 - 0x30bf] io +PCI: 00:1f.2 18 * [0x30c0 - 0x30c7] io +PCI: 00:1f.1 14 * [0x30c8 - 0x30cb] io +PCI: 00:1f.1 1c * [0x30cc - 0x30cf] io +PCI: 00:1f.2 14 * [0x30d0 - 0x30d3] io +PCI: 00:1f.2 1c * [0x30d4 - 0x30d7] io +DOMAIN: 0000 compute_resources_io: base: 30d8 size: 30d8 align: 12 gran: 0 limit: ffff done +DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:00.0 10 * [0x0 - 0x1ffff] mem +PCI: 00:1c.0 compute_resources_mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 02:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:1c.1 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 05:00.0 1c * [0x0 - 0x1ffffff] prefmem +PCI: 00:1e.0 compute_resources_prefmem: base: 2000000 size: 2000000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 05:00.0 24 * [0x0 - 0x1ffffff] mem +PCI: 05:00.0 10 * [0x2000000 - 0x2000fff] mem +PCI: 05:00.1 10 * [0x2001000 - 0x20017ff] mem +PCI: 05:00.2 10 * [0x2001800 - 0x20018ff] mem +PCI: 05:00.3 10 * [0x2001900 - 0x20019ff] mem +PCI: 00:1e.0 compute_resources_mem: base: 2001a00 size: 2100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem +PCI: 00:1e.0 20 * [0x10000000 - 0x120fffff] mem +PCI: 00:1e.0 24 * [0x12100000 - 0x140fffff] prefmem +PCI: 00:1c.0 20 * [0x14100000 - 0x141fffff] mem +PCI: 00:1c.1 20 * [0x14200000 - 0x142fffff] mem +PCI: 00:02.0 10 * [0x14300000 - 0x1437ffff] mem +PCI: 00:02.1 10 * [0x14380000 - 0x143fffff] mem +PCI: 00:02.0 1c * [0x14400000 - 0x1443ffff] mem +PCI: 00:1b.0 10 * [0x14440000 - 0x14443fff] mem +PCI: 00:1d.7 10 * [0x14444000 - 0x144443ff] mem +PCI: 00:1f.2 24 * [0x14444400 - 0x144447ff] mem +DOMAIN: 0000 compute_resources_mem: base: 14444800 size: 14444800 align: 28 gran: 0 limit: ffffffff done +avoid_fixed_resources: DOMAIN: 0000 +avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff +constrain_resources: DOMAIN: 0000 +constrain_resources: PCI: 00:00.0 +constrain_resources: PCI: 00:02.0 +constrain_resources: PCI: 00:02.1 +constrain_resources: PCI: 00:1b.0 +constrain_resources: PCI: 00:1c.0 +constrain_resources: PCI: 01:00.0 +constrain_resources: PCI: 00:1c.1 +constrain_resources: PCI: 02:00.0 +constrain_resources: PCI: 00:1c.2 +constrain_resources: PCI: 00:1c.3 +constrain_resources: PCI: 00:1d.0 +constrain_resources: PCI: 00:1d.1 +constrain_resources: PCI: 00:1d.2 +constrain_resources: PCI: 00:1d.3 +constrain_resources: PCI: 00:1d.7 +constrain_resources: PCI: 00:1e.0 +constrain_resources: PCI: 05:00.0 +constrain_resources: PCI: 05:00.1 +constrain_resources: PCI: 05:00.2 +constrain_resources: PCI: 05:00.3 +constrain_resources: PCI: 00:1f.0 +constrain_resources: PNP: 00ff.1 +constrain_resources: PNP: 00ff.2 +skipping PNP: 00ff.2@60 fixed resource, size=0! +skipping PNP: 00ff.2@62 fixed resource, size=0! +skipping PNP: 00ff.2@64 fixed resource, size=0! +skipping PNP: 00ff.2@66 fixed resource, size=0! +constrain_resources: PNP: 164e.2 +constrain_resources: PNP: 164e.7 +constrain_resources: PNP: 164e.19 +constrain_resources: PNP: 002e.1 +constrain_resources: PNP: 002e.3 +constrain_resources: PNP: 002e.7 +constrain_resources: PCI: 00:1f.1 +constrain_resources: PCI: 00:1f.2 +constrain_resources: PCI: 00:1f.3 +constrain_resources: I2C: 01:69 +constrain_resources: I2C: 01:54 +constrain_resources: I2C: 01:55 +constrain_resources: I2C: 01:56 +constrain_resources: I2C: 01:57 +constrain_resources: I2C: 01:5c +constrain_resources: I2C: 01:5d +constrain_resources: I2C: 01:5e +constrain_resources: I2C: 01:5f +avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff + lim->base 00001690 lim->limit 0000ffff +avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff + lim->base 00000000 lim->limit efffffff +Setting resources... +DOMAIN: 0000 allocate_resources_io: base:1690 size:30d8 align:12 gran:0 limit:ffff +Assigned: PCI: 00:1e.0 1c * [0x2000 - 0x3fff] io +Assigned: PCI: 00:1c.0 1c * [0x4000 - 0x4fff] io +Assigned: PCI: 00:1d.0 20 * [0x5000 - 0x501f] io +Assigned: PCI: 00:1d.1 20 * [0x5020 - 0x503f] io +Assigned: PCI: 00:1d.2 20 * [0x5040 - 0x505f] io +Assigned: PCI: 00:1d.3 20 * [0x5060 - 0x507f] io +Assigned: PCI: 00:1f.1 20 * [0x5080 - 0x508f] io +Assigned: PCI: 00:1f.2 20 * [0x5090 - 0x509f] io +Assigned: PCI: 00:02.0 14 * [0x50a0 - 0x50a7] io +Assigned: PCI: 00:1f.1 10 * [0x50a8 - 0x50af] io +Assigned: PCI: 00:1f.1 18 * [0x50b0 - 0x50b7] io +Assigned: PCI: 00:1f.2 10 * [0x50b8 - 0x50bf] io +Assigned: PCI: 00:1f.2 18 * [0x50c0 - 0x50c7] io +Assigned: PCI: 00:1f.1 14 * [0x50c8 - 0x50cb] io +Assigned: PCI: 00:1f.1 1c * [0x50cc - 0x50cf] io +Assigned: PCI: 00:1f.2 14 * [0x50d0 - 0x50d3] io +Assigned: PCI: 00:1f.2 1c * [0x50d4 - 0x50d7] io +DOMAIN: 0000 allocate_resources_io: next_base: 50d8 size: 30d8 align: 12 gran: 0 done +PCI: 00:1c.0 allocate_resources_io: base:4000 size:1000 align:12 gran:12 limit:ffff +Assigned: PCI: 01:00.0 18 * [0x4000 - 0x401f] io +PCI: 00:1c.0 allocate_resources_io: next_base: 4020 size: 1000 align: 12 gran: 12 done +PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.3 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.3 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1e.0 allocate_resources_io: base:2000 size:2000 align:12 gran:12 limit:ffff +Assigned: PCI: 05:00.0 2c * [0x2000 - 0x2fff] io +Assigned: PCI: 05:00.0 34 * [0x3000 - 0x3fff] io +PCI: 00:1e.0 allocate_resources_io: next_base: 4000 size: 2000 align: 12 gran: 12 done +DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:14444800 align:28 gran:0 limit:efffffff +Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem +Assigned: PCI: 00:1e.0 20 * [0xe0000000 - 0xe20fffff] mem +Assigned: PCI: 00:1e.0 24 * [0xe2100000 - 0xe40fffff] prefmem +Assigned: PCI: 00:1c.0 20 * [0xe4100000 - 0xe41fffff] mem +Assigned: PCI: 00:1c.1 20 * [0xe4200000 - 0xe42fffff] mem +Assigned: PCI: 00:02.0 10 * [0xe4300000 - 0xe437ffff] mem +Assigned: PCI: 00:02.1 10 * [0xe4380000 - 0xe43fffff] mem +Assigned: PCI: 00:02.0 1c * [0xe4400000 - 0xe443ffff] mem +Assigned: PCI: 00:1b.0 10 * [0xe4440000 - 0xe4443fff] mem +Assigned: PCI: 00:1d.7 10 * [0xe4444000 - 0xe44443ff] mem +Assigned: PCI: 00:1f.2 24 * [0xe4444400 - 0xe44447ff] mem +DOMAIN: 0000 allocate_resources_mem: next_base: e4444800 size: 14444800 align: 28 gran: 0 done +PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.0 allocate_resources_mem: base:e4100000 size:100000 align:20 gran:20 limit:efffffff +Assigned: PCI: 01:00.0 10 * [0xe4100000 - 0xe411ffff] mem +PCI: 00:1c.0 allocate_resources_mem: next_base: e4120000 size: 100000 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_mem: base:e4200000 size:100000 align:20 gran:20 limit:efffffff +Assigned: PCI: 02:00.0 10 * [0xe4200000 - 0xe420ffff] mem +PCI: 00:1c.1 allocate_resources_mem: next_base: e4210000 size: 100000 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.3 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.3 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.3 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.3 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1e.0 allocate_resources_prefmem: base:e2100000 size:2000000 align:20 gran:20 limit:efffffff +Assigned: PCI: 05:00.0 1c * [0xe2100000 - 0xe40fffff] prefmem +PCI: 00:1e.0 allocate_resources_prefmem: next_base: e4100000 size: 2000000 align: 20 gran: 20 done +PCI: 00:1e.0 allocate_resources_mem: base:e0000000 size:2100000 align:20 gran:20 limit:efffffff +Assigned: PCI: 05:00.0 24 * [0xe0000000 - 0xe1ffffff] mem +Assigned: PCI: 05:00.0 10 * [0xe2000000 - 0xe2000fff] mem +Assigned: PCI: 05:00.1 10 * [0xe2001000 - 0xe20017ff] mem +Assigned: PCI: 05:00.2 10 * [0xe2001800 - 0xe20018ff] mem +Assigned: PCI: 05:00.3 10 * [0xe2001900 - 0xe20019ff] mem +PCI: 00:1e.0 allocate_resources_mem: next_base: e2001a00 size: 2100000 align: 20 gran: 20 done +Root Device assign_resources, bus 0 link: 0 +pci_tolm: 0xd0000000 +Base of stolen memory: 0xbf800000 +Top of Low Used DRAM: 0xc0000000 +IGD decoded, subtracting 8M UMA +Available memory: 3137536K (3064M) +Adding PCIe config bar +DOMAIN: 0000 assign_resources, bus 0 link: 0 +PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig> +PCI: 00:02.0 10 <- [0x00e4300000 - 0x00e437ffff] size 0x00080000 gran 0x13 mem +PCI: 00:02.0 14 <- [0x00000050a0 - 0x00000050a7] size 0x00000008 gran 0x03 io +PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem +PCI: 00:02.0 1c <- [0x00e4400000 - 0x00e443ffff] size 0x00040000 gran 0x12 mem +PCI: 00:02.1 10 <- [0x00e4380000 - 0x00e43fffff] size 0x00080000 gran 0x13 mem +PCI: 00:1b.0 10 <- [0x00e4440000 - 0x00e4443fff] size 0x00004000 gran 0x0e mem64 +PCI: 00:1c.0 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus 01 io +PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem +PCI: 00:1c.0 20 <- [0x00e4100000 - 0x00e41fffff] size 0x00100000 gran 0x14 bus 01 mem +PCI: 00:1c.0 assign_resources, bus 1 link: 0 +PCI: 01:00.0 10 <- [0x00e4100000 - 0x00e411ffff] size 0x00020000 gran 0x11 mem +PCI: 01:00.0 18 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io +PCI: 00:1c.0 assign_resources, bus 1 link: 0 +PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io +PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem +PCI: 00:1c.1 20 <- [0x00e4200000 - 0x00e42fffff] size 0x00100000 gran 0x14 bus 02 mem +PCI: 00:1c.1 assign_resources, bus 2 link: 0 +PCI: 02:00.0 10 <- [0x00e4200000 - 0x00e420ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:1c.1 assign_resources, bus 2 link: 0 +PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io +PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem +PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem +PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io +PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 prefmem +PCI: 00:1c.3 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 mem +PCI: 00:1d.0 20 <- [0x0000005000 - 0x000000501f] size 0x00000020 gran 0x05 io +PCI: 00:1d.1 20 <- [0x0000005020 - 0x000000503f] size 0x00000020 gran 0x05 io +PCI: 00:1d.2 20 <- [0x0000005040 - 0x000000505f] size 0x00000020 gran 0x05 io +PCI: 00:1d.3 20 <- [0x0000005060 - 0x000000507f] size 0x00000020 gran 0x05 io +PCI: 00:1d.7 10 <- [0x00e4444000 - 0x00e44443ff] size 0x00000400 gran 0x0a mem +PCI: 00:1e.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 05 io +PCI: 00:1e.0 24 <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x14 bus 05 prefmem +PCI: 00:1e.0 20 <- [0x00e0000000 - 0x00e20fffff] size 0x02100000 gran 0x14 bus 05 mem +PCI: 00:1e.0 assign_resources, bus 5 link: 0 +PCI: 05:00.0 In set resources +PCI: 05:00.0 10 <- [0x00e2000000 - 0x00e2000fff] size 0x00001000 gran 0x0c mem +PCI: 05:00.0 2c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x02 io +PCI: 05:00.0 34 <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x02 io +PCI: 05:00.0 1c <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x0c prefmem +PCI: 05:00.0 24 <- [0x00e0000000 - 0x00e1ffffff] size 0x02000000 gran 0x0c mem +PCI: 05:00.1 10 <- [0x00e2001000 - 0x00e20017ff] size 0x00000800 gran 0x0b mem +PCI: 05:00.2 10 <- [0x00e2001800 - 0x00e20018ff] size 0x00000100 gran 0x08 mem +PCI: 05:00.3 10 <- [0x00e2001900 - 0x00e20019ff] size 0x00000100 gran 0x08 mem +PCI: 00:1e.0 assign_resources, bus 5 link: 0 +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PNP: 00ff.1 missing set_resources +PNP: 00ff.2 missing set_resources +PNP: 164e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io +ERROR: PNP: 164e.2 70 irq size: 0x0000000001 not assigned +ERROR: PNP: 164e.2 74 drq size: 0x0000000001 not assigned +ERROR: PNP: 164e.2 75 drq size: 0x0000000001 not assigned +PNP: 164e.7 60 <- [0x0000001680 - 0x000000168f] size 0x00000010 gran 0x04 io +ERROR: PNP: 164e.7 70 irq size: 0x0000000001 not assigned +PNP: 164e.19 60 <- [0x000000164c - 0x000000164d] size 0x00000002 gran 0x01 io +ERROR: PNP: 164e.19 70 irq size: 0x0000000001 not assigned +PNP: 002e.1 60 <- [0x00000003bc - 0x00000007bb] size 0x00000400 gran 0x0a io +PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq +ERROR: PNP: 002e.1 74 drq size: 0x0000000001 not assigned +PNP: 002e.3 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io +PNP: 002e.3 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq +PNP: 002e.7 60 <- [0x0000001620 - 0x0000001627] size 0x00000008 gran 0x03 io +ERROR: PNP: 002e.7 70 irq size: 0x0000000001 not assigned +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PCI: 00:1f.1 10 <- [0x00000050a8 - 0x00000050af] size 0x00000008 gran 0x03 io +PCI: 00:1f.1 14 <- [0x00000050c8 - 0x00000050cb] size 0x00000004 gran 0x02 io +PCI: 00:1f.1 18 <- [0x00000050b0 - 0x00000050b7] size 0x00000008 gran 0x03 io +PCI: 00:1f.1 1c <- [0x00000050cc - 0x00000050cf] size 0x00000004 gran 0x02 io +PCI: 00:1f.1 20 <- [0x0000005080 - 0x000000508f] size 0x00000010 gran 0x04 io +PCI: 00:1f.2 10 <- [0x00000050b8 - 0x00000050bf] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 14 <- [0x00000050d0 - 0x00000050d3] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 18 <- [0x00000050c0 - 0x00000050c7] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 1c <- [0x00000050d4 - 0x00000050d7] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 20 <- [0x0000005090 - 0x000000509f] size 0x00000010 gran 0x04 io +PCI: 00:1f.2 24 <- [0x00e4444400 - 0x00e44447ff] size 0x00000400 gran 0x0a mem +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +CBMEM region bf6d0000-bf7fffff (cbmem_late_set_table) +Root Device assign_resources, bus 0 link: 0 +Done setting resources. +Show resources in subtree (Root Device)...After assigning values. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 1690 size 30d8 align 12 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base d0000000 size 14444800 align 28 gran 0 limit efffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 + DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 4 + DOMAIN: 0000 resource base bf800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5 + DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7 + PCI: 00:00.0 + PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf + PCI: 00:02.0 + PCI: 00:02.0 resource base e4300000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10 + PCI: 00:02.0 resource base 50a0 size 8 align 3 gran 3 limit ffff flags 60000100 index 14 + PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 18 + PCI: 00:02.0 resource base e4400000 size 40000 align 18 gran 18 limit efffffff flags 60000200 index 1c + PCI: 00:02.1 + PCI: 00:02.1 resource base e4380000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base e4440000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10 + PCI: 00:1c.0 child on link 0 PCI: 01:00.0 + PCI: 00:1c.0 resource base 4000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.0 resource base e4100000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 01:00.0 + PCI: 01:00.0 resource base e4100000 size 20000 align 17 gran 17 limit efffffff flags 60000200 index 10 + PCI: 01:00.0 resource base 4000 size 20 align 5 gran 5 limit ffff flags 60000100 index 18 + PCI: 00:1c.1 child on link 0 PCI: 02:00.0 + PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.1 resource base e4200000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base e4200000 size 10000 align 16 gran 16 limit efffffff flags 60000201 index 10 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1c.3 + PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 5000 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 5020 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 5040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.3 + PCI: 00:1d.3 resource base 5060 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base e4444000 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10 + PCI: 00:1e.0 child on link 0 PCI: 05:00.0 + PCI: 00:1e.0 resource base 2000 size 2000 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1e.0 resource base e2100000 size 2000000 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1e.0 resource base e0000000 size 2100000 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 05:00.0 + PCI: 05:00.0 resource base e2000000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 + PCI: 05:00.0 resource base 2000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 2c + PCI: 05:00.0 resource base 3000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 34 + PCI: 05:00.0 resource base e2100000 size 2000000 align 12 gran 12 limit efffffff flags 60001200 index 1c + PCI: 05:00.0 resource base e0000000 size 2000000 align 12 gran 12 limit efffffff flags 60000200 index 24 + PCI: 05:00.1 + PCI: 05:00.1 resource base e2001000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 10 + PCI: 05:00.2 + PCI: 05:00.2 resource base e2001800 size 100 align 8 gran 8 limit efffffff flags 60000200 index 10 + PCI: 05:00.3 + PCI: 05:00.3 resource base e2001900 size 100 align 8 gran 8 limit efffffff flags 60000200 index 10 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PNP: 164e.2 + PNP: 164e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 164e.3 + PNP: 164e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 164e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.7 + PNP: 164e.7 resource base 1680 size 10 align 4 gran 4 limit ffff flags e0000100 index 60 + PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.19 + PNP: 164e.19 resource base 164c size 2 align 1 gran 1 limit ffff flags e0000100 index 60 + PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 + PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 3bc size 400 align 10 gran 10 limit 7ff flags e0000100 index 60 + PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 002e.3 + PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.7 + PNP: 002e.7 resource base 1620 size 8 align 3 gran 3 limit ffff flags e0000100 index 60 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.a + PNP: 002e.a resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 60 + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PCI: 00:1f.1 + PCI: 00:1f.1 resource base 50a8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 + PCI: 00:1f.1 resource base 50c8 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 + PCI: 00:1f.1 resource base 50b0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 + PCI: 00:1f.1 resource base 50cc size 4 align 2 gran 2 limit ffff flags 60000100 index 1c + PCI: 00:1f.1 resource base 5080 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 50b8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 + PCI: 00:1f.2 resource base 50d0 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 + PCI: 00:1f.2 resource base 50c0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 + PCI: 00:1f.2 resource base 50d4 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c + PCI: 00:1f.2 resource base 5090 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 + PCI: 00:1f.2 resource base e4444400 size 400 align 10 gran 10 limit efffffff flags 60000200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:69 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + I2C: 01:69 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f +Done allocating resources. +BS: Exiting BS_DEV_RESOURCES state. +BS: BS_DEV_RESOURCES times (us): entry 0 run 3353777 exit 0 +BS: Entering BS_DEV_ENABLE state. +Enabling resources... +PCI: 00:00.0 subsystem <- 17aa/2017 +PCI: 00:00.0 cmd <- 06 +PCI: 00:02.0 subsystem <- 17aa/201a +PCI: 00:02.0 cmd <- 03 +PCI: 00:02.1 subsystem <- 17aa/201a +PCI: 00:02.1 cmd <- 02 +PCI: 00:1b.0 subsystem <- 17aa/2010 +PCI: 00:1b.0 cmd <- 102 +PCI: 00:1c.0 bridge ctrl <- 0003 +PCI: 00:1c.0 subsystem <- 0000/0000 +PCI: 00:1c.0 cmd <- 107 +PCI: 00:1c.1 bridge ctrl <- 0003 +PCI: 00:1c.1 subsystem <- 0000/0000 +PCI: 00:1c.1 cmd <- 106 +PCI: 00:1c.2 bridge ctrl <- 0003 +PCI: 00:1c.2 cmd <- 00 +PCI: 00:1c.3 bridge ctrl <- 0003 +PCI: 00:1c.3 cmd <- 00 +PCI: 00:1d.0 subsystem <- 17aa/200a +PCI: 00:1d.0 cmd <- 01 +PCI: 00:1d.1 subsystem <- 17aa/200a +PCI: 00:1d.1 cmd <- 01 +PCI: 00:1d.2 subsystem <- 17aa/200a +PCI: 00:1d.2 cmd <- 01 +PCI: 00:1d.3 subsystem <- 17aa/200a +PCI: 00:1d.3 cmd <- 01 +PCI: 00:1d.7 subsystem <- 17aa/200b +PCI: 00:1d.7 cmd <- 102 +PCI: 00:1e.0 bridge ctrl <- 0003 +PCI: 00:1e.0 cmd <- 07 (NOT WRITTEN!) +PCI: 00:1f.0 subsystem <- 17aa/2009 +PCI: 00:1f.0 cmd <- 107 +PCI: 00:1f.1 subsystem <- 17aa/200c +PCI: 00:1f.1 cmd <- 01 +PCI: 00:1f.2 subsystem <- 17aa/200d +PCI: 00:1f.2 cmd <- 03 +PCI: 00:1f.3 subsystem <- 17aa/200f +PCI: 00:1f.3 cmd <- 101 +PCI: 01:00.0 cmd <- 03 +PCI: 02:00.0 cmd <- 02 +PCI: 05:00.0 bridge ctrl <- 0503 +PCI: 05:00.0 cmd <- 03 +PCI: 05:00.1 cmd <- 02 +PCI: 05:00.2 cmd <- 06 +PCI: 05:00.3 cmd <- 06 +done. +BS: Exiting BS_DEV_ENABLE state. +BS: BS_DEV_ENABLE times (us): entry 0 run 124466 exit 0 +BS: Entering BS_DEV_INIT state. +Initializing devices... +Root Device init +recv_ec_data: 0x11 +recv_ec_data: 0x11 +Root Device init 5771 usecs +CPU_CLUSTER: 0 init +start_eip=0x00001000, code_size=0x00000031 +Initializing SMM handler... ... pmbase = 0x0500 + +SMI_STS: MCSMI PM1 +PM1_STS: WAK PWRBTN TMROF +GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 +ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 +TCO_STS: INTRD_DET + ... raise SMI# +Initializing CPU #0 +CPU: vendor Intel device 6ec +CPU: family 06, model 0e, stepping 0c +Enabling cache +microcode: sig=0x6ec pf=0x20 revision=0x0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +microcode: updated to revision 0x54 date=2006-05-01 +CPU: Intel(R) Core(TM) Duo CPU L2400 @ 1.66GHz. +MTRR: Physical address space: +0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 +0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 +0x00000000000c0000 - 0x00000000bf800000 size 0xbf740000 type 6 +0x00000000bf800000 - 0x00000000d0000000 size 0x10800000 type 0 +0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 +0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 +MTRR addr 0x0-0x10 set to 6 type @ 0 +MTRR addr 0x10-0x20 set to 6 type @ 1 +MTRR addr 0x20-0x30 set to 6 type @ 2 +MTRR addr 0x30-0x40 set to 6 type @ 3 +MTRR addr 0x40-0x50 set to 6 type @ 4 +MTRR addr 0x50-0x60 set to 6 type @ 5 +MTRR addr 0x60-0x70 set to 6 type @ 6 +MTRR addr 0x70-0x80 set to 6 type @ 7 +MTRR addr 0x80-0x84 set to 6 type @ 8 +MTRR addr 0x84-0x88 set to 6 type @ 9 +MTRR addr 0x88-0x8c set to 6 type @ 10 +MTRR addr 0x8c-0x90 set to 6 type @ 11 +MTRR addr 0x90-0x94 set to 6 type @ 12 +MTRR addr 0x94-0x98 set to 6 type @ 13 +MTRR addr 0x98-0x9c set to 6 type @ 14 +MTRR addr 0x9c-0xa0 set to 6 type @ 15 +MTRR addr 0xa0-0xa4 set to 0 type @ 16 +MTRR addr 0xa4-0xa8 set to 0 type @ 17 +MTRR addr 0xa8-0xac set to 0 type @ 18 +MTRR addr 0xac-0xb0 set to 0 type @ 19 +MTRR addr 0xb0-0xb4 set to 0 type @ 20 +MTRR addr 0xb4-0xb8 set to 0 type @ 21 +MTRR addr 0xb8-0xbc set to 0 type @ 22 +MTRR addr 0xbc-0xc0 set to 0 type @ 23 +MTRR addr 0xc0-0xc1 set to 6 type @ 24 +MTRR addr 0xc1-0xc2 set to 6 type @ 25 +MTRR addr 0xc2-0xc3 set to 6 type @ 26 +MTRR addr 0xc3-0xc4 set to 6 type @ 27 +MTRR addr 0xc4-0xc5 set to 6 type @ 28 +MTRR addr 0xc5-0xc6 set to 6 type @ 29 +MTRR addr 0xc6-0xc7 set to 6 type @ 30 +MTRR addr 0xc7-0xc8 set to 6 type @ 31 +MTRR addr 0xc8-0xc9 set to 6 type @ 32 +MTRR addr 0xc9-0xca set to 6 type @ 33 +MTRR addr 0xca-0xcb set to 6 type @ 34 +MTRR addr 0xcb-0xcc set to 6 type @ 35 +MTRR addr 0xcc-0xcd set to 6 type @ 36 +MTRR addr 0xcd-0xce set to 6 type @ 37 +MTRR addr 0xce-0xcf set to 6 type @ 38 +MTRR addr 0xcf-0xd0 set to 6 type @ 39 +MTRR addr 0xd0-0xd1 set to 6 type @ 40 +MTRR addr 0xd1-0xd2 set to 6 type @ 41 +MTRR addr 0xd2-0xd3 set to 6 type @ 42 +MTRR addr 0xd3-0xd4 set to 6 type @ 43 +MTRR addr 0xd4-0xd5 set to 6 type @ 44 +MTRR addr 0xd5-0xd6 set to 6 type @ 45 +MTRR addr 0xd6-0xd7 set to 6 type @ 46 +MTRR addr 0xd7-0xd8 set to 6 type @ 47 +MTRR addr 0xd8-0xd9 set to 6 type @ 48 +MTRR addr 0xd9-0xda set to 6 type @ 49 +MTRR addr 0xda-0xdb set to 6 type @ 50 +MTRR addr 0xdb-0xdc set to 6 type @ 51 +MTRR addr 0xdc-0xdd set to 6 type @ 52 +MTRR addr 0xdd-0xde set to 6 type @ 53 +MTRR addr 0xde-0xdf set to 6 type @ 54 +MTRR addr 0xdf-0xe0 set to 6 type @ 55 +MTRR addr 0xe0-0xe1 set to 6 type @ 56 +MTRR addr 0xe1-0xe2 set to 6 type @ 57 +MTRR addr 0xe2-0xe3 set to 6 type @ 58 +MTRR addr 0xe3-0xe4 set to 6 type @ 59 +MTRR addr 0xe4-0xe5 set to 6 type @ 60 +MTRR addr 0xe5-0xe6 set to 6 type @ 61 +MTRR addr 0xe6-0xe7 set to 6 type @ 62 +MTRR addr 0xe7-0xe8 set to 6 type @ 63 +MTRR addr 0xe8-0xe9 set to 6 type @ 64 +MTRR addr 0xe9-0xea set to 6 type @ 65 +MTRR addr 0xea-0xeb set to 6 type @ 66 +MTRR addr 0xeb-0xec set to 6 type @ 67 +MTRR addr 0xec-0xed set to 6 type @ 68 +MTRR addr 0xed-0xee set to 6 type @ 69 +MTRR addr 0xee-0xef set to 6 type @ 70 +MTRR addr 0xef-0xf0 set to 6 type @ 71 +MTRR addr 0xf0-0xf1 set to 6 type @ 72 +MTRR addr 0xf1-0xf2 set to 6 type @ 73 +MTRR addr 0xf2-0xf3 set to 6 type @ 74 +MTRR addr 0xf3-0xf4 set to 6 type @ 75 +MTRR addr 0xf4-0xf5 set to 6 type @ 76 +MTRR addr 0xf5-0xf6 set to 6 type @ 77 +MTRR addr 0xf6-0xf7 set to 6 type @ 78 +MTRR addr 0xf7-0xf8 set to 6 type @ 79 +MTRR addr 0xf8-0xf9 set to 6 type @ 80 +MTRR addr 0xf9-0xfa set to 6 type @ 81 +MTRR addr 0xfa-0xfb set to 6 type @ 82 +MTRR addr 0xfb-0xfc set to 6 type @ 83 +MTRR addr 0xfc-0xfd set to 6 type @ 84 +MTRR addr 0xfd-0xfe set to 6 type @ 85 +MTRR addr 0xfe-0xff set to 6 type @ 86 +MTRR addr 0xff-0x100 set to 6 type @ 87 +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 32 bits +MTRR: default type WB/UC MTRR counts: 4/4. +MTRR: UC selected as default type. +MTRR: 0 base 0x0000000000000000 mask 0x0000000080000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x00000000c0000000 type 6 +MTRR: 2 base 0x00000000bf800000 mask 0x00000000ff800000 type 0 +MTRR: 3 base 0x00000000d0000000 mask 0x00000000f0000000 type 1 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x00 done. +CPU: 0 2 siblings +CPU: 0 has sibling 1 +CPU #0 initialized +CPU1: stack_base 0014a000, stack_end 0014aff8 +Asserting INIT. +Waiting for send to finish... ++Deasserting INIT. +Waiting for send to finish... ++#startup loops: 2. +Sending STARTUP #1 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++Sending STARTUP #2 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++After Startup. +Initializing CPU #1 +Waiting for 1 CPUS to stop +CPU: vendor Intel device 6ec +CPU: family 06, model 0e, stepping 0c +Enabling cache +microcode: sig=0x6ec pf=0x20 revision=0x0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +microcode: updated to revision 0x54 date=2006-05-01 +CPU: Intel(R) Core(TM) Duo CPU L2400 @ 1.66GHz. +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 32 bits +MTRR: 0 base 0x0000000000000000 mask 0x0000000080000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x00000000c0000000 type 6 +MTRR: 2 base 0x00000000bf800000 mask 0x00000000ff800000 type 0 +MTRR: 3 base 0x00000000d0000000 mask 0x00000000f0000000 type 1 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x01 done. +CPU: 1 2 siblings +CPU #1 initialized +CPU 1 going down... +All AP CPUs stopped (11642 loops) +CPU1: stack: 0014a000 - 0014b000, lowest used address 0014ac68, stack used: 920 bytes +CPU_CLUSTER: 0 init 687602 usecs +PCI: 00:00.0 init +Normal boot. +PCI: 00:00.0 init 2905 usecs +PCI: 00:02.0 init +In CBFS, ROM address for PCI: 00:02.0 = ffe007b8 +PCI expansion ROM, signature 0xaa55, INIT size 0x10000, data ptr 0x0040 +PCI ROM image, vendor ID 8086, device ID 27a2, +PCI ROM image, Class Code 030000, Code Type 00 +Copying VGA ROM Image from ffe007b8 to 0xc0000, 0x10000 bytes +Real mode stub @00000600: 867 bytes +Calling Option ROM... +int15_handler: AX=5f40 BX=d103 CX=0055 DX=0002 +DISPLAY=3 +int15_handler: AX=5f34 BX=078f CX=0002 DX=0002 +Unknown INT15 function 5f34! +int15 call returned error. +int15_handler: AX=5f35 BX=078f CX=0002 DX=00c0 +... Option ROM returned. +VGA Option ROM was run +gma_func0_init: After VBIOS/native init: GMADR=0xd0000008 GTTADR=0xe4400000 +PCI: 00:02.0 init 175395 usecs +PCI: 00:02.1 init +PCI: 00:02.1 init 2383 usecs +PCI: 00:1b.0 init +Azalia: codec type: Azalia +Azalia: base = e4440000 +Azalia: codec_mask = 03 +Azalia: Initializing codec #1 +Azalia: codec viddid: 14f12bfa +Azalia: No verb! +Azalia: Initializing codec #0 +Azalia: codec viddid: 11d41981 +Azalia: No verb! +PCI: 00:1b.0 init 25808 usecs +PCI: 00:1c.0 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.0 init 4491 usecs +PCI: 00:1c.1 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.1 init 4490 usecs +PCI: 00:1c.2 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.2 init 4491 usecs +PCI: 00:1c.3 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.3 init 4491 usecs +PCI: 00:1d.0 init +UHCI: Setting up controller.. done. +PCI: 00:1d.0 init 4923 usecs +PCI: 00:1d.1 init +UHCI: Setting up controller.. done. +PCI: 00:1d.1 init 4924 usecs +PCI: 00:1d.2 init +UHCI: Setting up controller.. done. +PCI: 00:1d.2 init 4924 usecs +PCI: 00:1d.3 init +UHCI: Setting up controller.. done. +PCI: 00:1d.3 init 4925 usecs +PCI: 00:1d.7 init +EHCI: Setting up controller.. done. +PCI: 00:1d.7 init 4933 usecs +PCI: 00:1e.0 init +PCI: 00:1e.0 init 1681 usecs +PCI: 00:1f.0 init +i82801gx: lpc_init +IOAPIC: Initializing IOAPIC at 0xfec00000 +IOAPIC: Bootstrap Processor Local APIC = 0x00 +IOAPIC: ID = 0x02 +IOAPIC: Dumping registers + reg 0x0000: 0x02000000 + reg 0x0001: 0x00170020 + reg 0x0002: 0x00170020 +WARNING: No CMOS option 'power_on_after_fail'. +Set power on after power failure. +NMI sources enabled. +rtc_failed = 0x0 +RTC Init +i8259_configure_irq_trigger: current interrupts are 0x0 +i8259_configure_irq_trigger: try to set interrupts 0x200 +Disabling ACPI via APMC: +done. +Locking SMM. +PCI: 00:1f.0 init 50464 usecs +PCI: 00:1f.1 init +i82801gx_ide: initializing... IDE0 +PCI: 00:1f.1 init 4941 usecs +PCI: 00:1f.2 init +i82801gx_sata: initializing... +SATA controller in AHCI mode. +PCI: 00:1f.2 init 7211 usecs +PCI: 01:00.0 init +PCI: 01:00.0 init 1668 usecs +PCI: 02:00.0 init +PCI: 02:00.0 init 1670 usecs +PCI: 05:00.0 init +Ricoh RL5c476: Initializing. +CF Base = 0 +CF boot not enabled. +PCI: 05:00.0 init 7378 usecs +PCI: 05:00.1 init +PCI: 05:00.1 init 1669 usecs +PCI: 05:00.2 init +PCI: 05:00.2 init 1671 usecs +PCI: 05:00.3 init +PCI: 05:00.3 init 1671 usecs +PNP: 164e.2 init +PNP: 164e.2 init 1584 usecs +PNP: 164e.7 init +PNP: 164e.7 init 1583 usecs +PNP: 164e.19 init +PNP: 164e.19 init 1670 usecs +PNP: 002e.1 init +PNP: 002e.1 init 1582 usecs +PNP: 002e.3 init +PNP: 002e.3 init 1583 usecs +PNP: 002e.7 init +PNP: 002e.7 init 1582 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:69 init +I2C: 01:69 init 16211 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:54 init +I2C: 01:54 init 3591 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:55 init +I2C: 01:55 init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:56 init +I2C: 01:56 init 3593 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:57 init +I2C: 01:57 init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5c init +Locking EEPROM RFID +init EEPROM done +I2C: 01:5c init 28615 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5d init +I2C: 01:5d init 3593 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5e init +I2C: 01:5e init 3593 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5f init +I2C: 01:5f init 3592 usecs +Devices initialized +Show all devs...After init. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.3: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PNP: 164e.2: enabled 1 +PNP: 164e.3: enabled 0 +PNP: 164e.7: enabled 1 +PNP: 164e.19: enabled 1 +PNP: 002e.0: enabled 0 +PNP: 002e.1: enabled 1 +PNP: 002e.2: enabled 0 +PNP: 002e.3: enabled 1 +PNP: 002e.7: enabled 1 +PNP: 002e.a: enabled 0 +PCI: 00:1f.1: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 01:69: enabled 1 +I2C: 01:54: enabled 1 +I2C: 01:55: enabled 1 +I2C: 01:56: enabled 1 +I2C: 01:57: enabled 1 +I2C: 01:5c: enabled 1 +I2C: 01:5d: enabled 1 +I2C: 01:5e: enabled 1 +I2C: 01:5f: enabled 1 +PCI: 00:1c.2: enabled 1 +PCI: 00:1c.3: enabled 1 +PCI: 00:1e.0: enabled 1 +PCI: 01:00.0: enabled 1 +PCI: 02:00.0: enabled 1 +PCI: 05:00.0: enabled 1 +PCI: 05:00.1: enabled 1 +PCI: 05:00.2: enabled 1 +PCI: 05:00.3: enabled 1 +APIC: 01: enabled 1 +BS: Exiting BS_DEV_INIT state. +BS: BS_DEV_INIT times (us): entry 0 run 1321463 exit 0 +BS: Entering BS_POST_DEVICE state. +CBMEM region bf6d0000-bf7fffff (cbmem_check_toc) +Adding CBMEM entry as no. 4 +Moving GDT to bf6e0600...ok +Finalize devices... +Devices finalized +BS: Exiting BS_POST_DEVICE state. +BS: BS_POST_DEVICE times (us): entry 9470 run 6558 exit 0 +BS: Entering BS_OS_RESUME_CHECK state. +BS: Exiting BS_OS_RESUME_CHECK state. +BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3401 exit 0 +BS: Entering BS_WRITE_TABLES state. +Copying Interrupt Routing Table to 0x000f0000... done. +Adding CBMEM entry as no. 5 +Copying Interrupt Routing Table to 0xbf6e0800... done. +PIRQ table: 272 bytes. +Wrote the mp table end at: 000f0410 - 000f05cc +Adding CBMEM entry as no. 6 +Wrote the mp table end at: bf6e1810 - bf6e19cc +MP table: 460 bytes. +Adding CBMEM entry as no. 7 +ACPI: Writing ACPI tables at bf6e2800. +ACPI: * HPET +ACPI: added table 1/32, length now 40 +ACPI: * MADT +ACPI: added table 2/32, length now 44 +ACPI: * MCFG +ACPI: added table 3/32, length now 48 +ACPI: * FACS +ACPI: Patching up global NVS in DSDT at offset 0x0263 -> 0xbf6e5c10 +ACPI: * DSDT @ bf6e2b40 Length 30ca +ACPI: * FADT +ACPI: added table 4/32, length now 52 +ACPI: * SSDT +Found 1 CPU(s) with 2 core(s) each. +clocks between 1000 and 1666 MHz. +adding 3 P-States between busratio 6 and a, incl. P0 +PSS: 1666MHz power 31000 control 0xa1e status 0xa1e +PSS: 1333MHz power 22050 control 0x818 status 0x818 +PSS: 1000MHz power 13100 control 0x613 status 0x613 +clocks between 1000 and 1666 MHz. +adding 3 P-States between busratio 6 and a, incl. P0 +PSS: 1666MHz power 31000 control 0xa1e status 0xa1e +PSS: 1333MHz power 22050 control 0x818 status 0x818 +PSS: 1000MHz power 13100 control 0x613 status 0x613 +ACPI: added table 5/32, length now 56 +current = bf6e6110 +ACPI: done. +Laptop handling... +ACPI tables: 14608 bytes. +Adding CBMEM entry as no. 8 +smbios_write_tables: bf6edc00 +Root Device (Lenovo ThinkPad X60 / X60s) +recv_ec_data: 0x37 +recv_ec_data: 0x42 +recv_ec_data: 0x48 +recv_ec_data: 0x54 +recv_ec_data: 0x33 +recv_ec_data: 0x37 +recv_ec_data: 0x57 +recv_ec_data: 0x57 +recv_ec_data: 0x04 +recv_ec_data: 0x03 +CPU_CLUSTER: 0 (Intel i945 Northbridge) +APIC: 00 (Socket mFCPGA478 CPU) +DOMAIN: 0000 (Intel i945 Northbridge) +PCI: 00:00.0 (Intel i945 Northbridge) +PCI: 00:02.0 (Intel i945 Northbridge) +PCI: 00:02.1 (Intel i945 Northbridge) +PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) +PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) +PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) +PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) +PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) +PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) +PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge) +PCI: 00:1d.7 (Intel ICH7/I +4509 bytes lost diff --git a/docs/future/dumps/coreboot_5926_oprom_grub_config b/docs/future/dumps/coreboot_5926_oprom_grub_config new file mode 100644 index 00000000..dedf3ae6 --- /dev/null +++ b/docs/future/dumps/coreboot_5926_oprom_grub_config @@ -0,0 +1,449 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_EXPERT=y +CONFIG_LOCALVERSION="7BETC7WW (2.08 )" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_SCONFIG_GENPARSER is not set +CONFIG_USE_OPTION_TABLE=y +CONFIG_COMPRESS_RAMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_EARLY_CBMEM_INIT=y +# CONFIG_BROKEN_CAR_MIGRATE is not set +# CONFIG_DYNAMIC_CBMEM is not set +# CONFIG_COLLECT_TIMESTAMPS is not set +# CONFIG_USE_BLOBS is not set +# CONFIG_COVERAGE is not set + +# +# Mainboard +# +# CONFIG_VENDOR_AAEON is not set +# CONFIG_VENDOR_ABIT is not set +# CONFIG_VENDOR_ADLINK is not set +# CONFIG_VENDOR_ADVANSUS is not set +# CONFIG_VENDOR_ADVANTECH is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_ARIMA is not set +# CONFIG_VENDOR_ARTECGROUP is not set +# CONFIG_VENDOR_ASI is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_A_TREND is not set +# CONFIG_VENDOR_AVALUE is not set +# CONFIG_VENDOR_AXUS is not set +# CONFIG_VENDOR_AZZA is not set +# CONFIG_VENDOR_BACHMANN is not set +# CONFIG_VENDOR_BCOM is not set +# CONFIG_VENDOR_BIFFEROS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BROADCOM is not set +# CONFIG_VENDOR_COMPAQ is not set +# CONFIG_VENDOR_CUBIETECH is not set +# CONFIG_VENDOR_DIGITALLOGIC is not set +# CONFIG_VENDOR_DMP is not set +# CONFIG_VENDOR_EAGLELION is not set +# CONFIG_VENDOR_ECS is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GIZMOSPHERE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_IEI is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_IWAVE is not set +# CONFIG_VENDOR_IWILL is not set +# CONFIG_VENDOR_JETWAY is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LANNER is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LINUTOP is not set +# CONFIG_VENDOR_LIPPERT is not set +# CONFIG_VENDOR_MITAC is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NEC is not set +# CONFIG_VENDOR_NEWISYS is not set +# CONFIG_VENDOR_NOKIA is not set +# CONFIG_VENDOR_NVIDIA is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_RCA is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SOYO is not set +# CONFIG_VENDOR_SUNW is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_TECHNEXION is not set +# CONFIG_VENDOR_TECHNOLOGIC is not set +# CONFIG_VENDOR_TELEVIDEO is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_THOMSON is not set +# CONFIG_VENDOR_TRAVERSE is not set +# CONFIG_VENDOR_TYAN is not set +# CONFIG_VENDOR_VIA is not set +# CONFIG_VENDOR_WINENT is not set +# CONFIG_VENDOR_WYSE is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_DIR="lenovo/x60" +CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60 / X60s" +CONFIG_IRQ_SLOT_COUNT=18 +CONFIG_MAINBOARD_VENDOR="Lenovo" +CONFIG_MAX_CPUS=2 +CONFIG_RAMTOP=0x200000 +CONFIG_HEAP_SIZE=0x4000 +CONFIG_RAMBASE=0x100000 +CONFIG_VGA_BIOS_ID="8086,27a2" +CONFIG_DRIVERS_PS2_KEYBOARD=y +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_VGA_BIOS=y +# CONFIG_UDELAY_IO is not set +CONFIG_DCACHE_RAM_BASE=0xffdf8000 +CONFIG_DCACHE_RAM_SIZE=0x8000 +CONFIG_ACPI_SSDTX_NUM=0 +CONFIG_VGA_BIOS_FILE="vgabios.bin" +# CONFIG_PCI_64BIT_PREF_MEM is not set +CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_ID_SECTION_OFFSET=0x80 +CONFIG_STACK_SIZE=0x1000 +CONFIG_CACHE_ROM_SIZE_OVERRIDE=0 +CONFIG_CBFS_SIZE=0x200000 +CONFIG_BOARD_LENOVO_X60=y +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_SEABIOS_PS2_TIMEOUT=3000 +CONFIG_MAINBOARD_VERSION="ThinkPad X60" +CONFIG_CPU_ADDR_BITS=32 +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 +# CONFIG_USBDEBUG is not set +CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0 +CONFIG_BOARD_ROMSIZE_KB_2048=y +# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +CONFIG_COREBOOT_ROMSIZE_KB_2048=y +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +CONFIG_COREBOOT_ROMSIZE_KB=2048 +CONFIG_ROM_SIZE=0x200000 +CONFIG_MAINBOARD_SERIAL_NUMBER="L3AZ921" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="1703WMF" +CONFIG_ARCH_X86=y +# CONFIG_ARCH_ARMV7 is not set +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_AP_IN_SIPI_WAIT=y +# CONFIG_SIPI_VECTOR_IN_ROM is not set +CONFIG_NUM_IPI_STARTS=2 +# CONFIG_ROMCC is not set +CONFIG_PC80_SYSTEM=y +CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/i945/bootblock.c" +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801gx/bootblock.c" +CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y +# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set +CONFIG_HPET_ADDRESS=0xfed00000 +# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set +# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set +# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set +# CONFIG_MAINBOARD_HAS_CHROMEOS is not set +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" +# CONFIG_UPDATE_IMAGE is not set + +# +# Chipset +# + +# +# CPU +# +# CONFIG_CPU_ALLWINNER_A10 is not set +# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set +# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set +# CONFIG_CPU_TI_AM335X is not set +CONFIG_SOCKET_SPECIFIC_OPTIONS=y +CONFIG_XIP_ROM_SIZE=0x10000 +# CONFIG_CPU_AMD_AGESA is not set +CONFIG_HIGH_SCRATCH_MEMORY_SIZE=0x0 +CONFIG_CPU_INTEL_MODEL_6EX=y +CONFIG_CPU_INTEL_MODEL_6FX=y +CONFIG_SMM_TSEG_SIZE=0 +CONFIG_CPU_INTEL_SOCKET_MFCPGA478=y +CONFIG_SSE2=y +# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set +# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set +# CONFIG_PARALLEL_CPU_INIT is not set +CONFIG_UDELAY_LAPIC=y +CONFIG_LAPIC_MONOTONIC_TIMER=y +# CONFIG_UDELAY_TSC is not set +# CONFIG_UDELAY_TIMER2 is not set +# CONFIG_TSC_CALIBRATE_WITH_IO is not set +# CONFIG_TSC_SYNC_LFENCE is not set +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_LOGICAL_CPUS=y +# CONFIG_SMM_TSEG is not set +# CONFIG_SMM_MODULES is not set +# CONFIG_X86_AMD_FIXED_MTRRS is not set +# CONFIG_PLATFORM_USES_FSP is not set +# CONFIG_PARALLEL_MP is not set +# CONFIG_BACKUP_DEFAULT_SMM_REGION is not set +# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set +CONFIG_CACHE_AS_RAM=y +CONFIG_SMP=y +CONFIG_AP_SIPI_VECTOR=0xfffff000 +CONFIG_MMX=y +CONFIG_SSE=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_CPU_MICROCODE_ADDED_DURING_BUILD=y +CONFIG_CPU_MICROCODE_CBFS_GENERATE=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +CONFIG_VIDEO_MB=0 +# CONFIG_NORTHBRIDGE_AMD_AGESA is not set +CONFIG_S3_VGA_ROM_RUN=y +# CONFIG_AMD_NB_CIMX is not set +# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set +CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y +CONFIG_NORTHBRIDGE_INTEL_I945=y +# CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC is not set +CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y +CONFIG_CHANNEL_XOR_RANDOMIZATION=y +# CONFIG_OVERRIDE_CLOCK_DISABLE is not set +# CONFIG_CHECK_SLFRCS_ON_RESUME is not set +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_MAX_PIRQ_LINKS=4 + +# +# Southbridge +# +CONFIG_EHCI_BAR=0xfef00000 +# CONFIG_AMD_SB_CIMX is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set +CONFIG_SOUTHBRIDGE_INTEL_COMMON=y +CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y +CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y + +# +# Super I/O +# +CONFIG_SUPERIO_NSC_PC87382=y +CONFIG_SUPERIO_NSC_PC87392=y + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_DOCK_EARLY_INIT=y +CONFIG_EC_LENOVO_PMH7=y + +# +# SoC +# + +# +# Devices +# +CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y +# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is not set +# CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT is not set +CONFIG_VGA_ROM_RUN=y +# CONFIG_ALWAYS_LOAD_OPROM is not set +CONFIG_ON_DEVICE_ROM_RUN=y +CONFIG_PCI_OPTION_ROM_RUN_REALMODE=y +# CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set +# CONFIG_MULTIPLE_VGA_ADAPTERS is not set +CONFIG_PCI=y +# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_AGP_PLUGIN_SUPPORT=y +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +# CONFIG_AZALIA_PLUGIN_SUPPORT is not set +# CONFIG_PCIEXP_COMMON_CLOCK is not set +# CONFIG_PCIEXP_ASPM is not set +CONFIG_PCI_BUS_SEGN_BITS=0 +# CONFIG_EARLY_PCI_BRIDGE is not set + +# +# VGA BIOS +# + +# +# Display +# +# CONFIG_FRAMEBUFFER_SET_VESA_MODE is not set +# CONFIG_FRAMEBUFFER_KEEP_VESA_MODE is not set + +# +# PXE ROM +# +# CONFIG_PXE_ROM is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 + +# +# Generic Drivers +# +# CONFIG_DRIVERS_I2C_RTD2132 is not set +CONFIG_DRIVERS_ICS_954309=y +# CONFIG_INTEL_DP is not set +# CONFIG_INTEL_DDI is not set +# CONFIG_INTEL_EDID is not set +# CONFIG_IPMI_KCS is not set +# CONFIG_DRIVER_MAXIM_MAX77686 is not set +# CONFIG_DRIVER_PARADE_PS8625 is not set +# CONFIG_TPM is not set +# CONFIG_DRIVERS_SIL_3114 is not set +# CONFIG_SPI_FLASH is not set +# CONFIG_DRIVER_TI_TPS65090 is not set +CONFIG_DRIVERS_UART=y +CONFIG_DRIVERS_UART_8250IO=y +# CONFIG_NO_UART_ON_SUPERIO is not set +# CONFIG_DRIVERS_UART_8250MEM is not set +# CONFIG_HAVE_UART_SPECIAL is not set +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_DRIVERS_UART_PL011 is not set +CONFIG_HAVE_USBDEBUG=y +# CONFIG_HAVE_USBDEBUG_OPTIONS is not set +# CONFIG_DRIVER_XPOWERS_AXP209 is not set +CONFIG_MMCONF_SUPPORT_DEFAULT=y +CONFIG_MMCONF_SUPPORT=y +# CONFIG_BOOTMODE_STRAPS is not set + +# +# Console +# +CONFIG_SQUELCH_EARLY_SMP=y +CONFIG_CONSOLE_SERIAL=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_BAUD=115200 +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x10000 +CONFIG_CONSOLE_CAR_BUFFER_SIZE=0xc00 +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +# CONFIG_NO_POST is not set +# CONFIG_CMOS_POST is not set +# CONFIG_POST_IO is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_HAVE_ACPI_RESUME=y +# CONFIG_HAVE_ACPI_SLIC is not set +CONFIG_HAVE_HARD_RESET=y +CONFIG_HAVE_MONOTONIC_TIMER=y +# CONFIG_TIMER_QUEUE is not set +CONFIG_HAVE_OPTION_TABLE=y +# CONFIG_PIRQ_ROUTE is not set +CONFIG_HAVE_SMI_HANDLER=y +# CONFIG_PCI_IO_CFG_EXT is not set +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y +# CONFIG_VGA is not set +# CONFIG_GFXUMA is not set +# CONFIG_RELOCATABLE_MODULES is not set +# CONFIG_HAVE_REFCODE_BLOB is not set +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_HAVE_MP_TABLE=y +CONFIG_HAVE_PIRQ_TABLE=y + +# +# System tables +# +CONFIG_GENERATE_ACPI_TABLES=y +CONFIG_GENERATE_MP_TABLE=y +CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_GENERATE_SMBIOS_TABLES=y + +# +# Payload +# +# CONFIG_PAYLOAD_NONE is not set +CONFIG_PAYLOAD_ELF=y +# CONFIG_PAYLOAD_LINUX is not set +# CONFIG_PAYLOAD_SEABIOS is not set +# CONFIG_PAYLOAD_FILO is not set +# CONFIG_PAYLOAD_GRUB2 is not set +# CONFIG_PAYLOAD_TIANOCORE is not set +# CONFIG_SEABIOS_THREAD_OPTIONROMS is not set +CONFIG_PAYLOAD_FILE="grub.elf" +CONFIG_COMPRESSED_PAYLOAD_LZMA=y + +# +# Debugging +# +# CONFIG_GDB_STUB is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set +# CONFIG_HAVE_DEBUG_CAR is not set +# CONFIG_DEBUG_PIRQ is not set +# CONFIG_HAVE_DEBUG_SMBUS is not set +# CONFIG_DEBUG_SMI is not set +# CONFIG_DEBUG_SMM_RELOCATION is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_ACPI is not set +# CONFIG_REALMODE_DEBUG is not set +# CONFIG_TRACE is not set +# CONFIG_ENABLE_APIC_EXT_ID is not set +CONFIG_WARNINGS_ARE_ERRORS=y +# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set +# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set +# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set +# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set +# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set +CONFIG_REG_SCRIPT=y +CONFIG_MAX_REBOOT_CNT=3 diff --git a/docs/future/dumps/grub.cfg b/docs/future/dumps/grub.cfg new file mode 100644 index 00000000..ddc56069 --- /dev/null +++ b/docs/future/dumps/grub.cfg @@ -0,0 +1,38 @@ +set default="0" +set timeout=1 +set pager=1 + +menuentry 'Trisquel GNU/Linux with linux-libre 3.14.4' { + linux (ahci0,1)/boot/vmlinuz-3.14.4-gnuowen root=/dev/sda1 processor.max_cstate=2 drm.debug=0x06 console=tty0 console=ttyS0,115200n8 + initrd (ahci0,1)/boot/initrd.img-3.14.4-gnuowen +} +menuentry 'Parse ISOLINUX menu (USB)' { + set root='usb0' + syslinux_configfile -i (usb0)/isolinux/isolinux.cfg +} +menuentry 'Parse ISOLINUX menu (CD)' { + set root='ata0' + syslinux_configfile -i (ata0)/isolinux/isolinux.cfg +} +menuentry 'Scan for GRUB configurations on the internal HDD (Permits to load other OS or distributions)' { + insmod regexp + insmod ahci + insmod part_msdos + for x in (ahci0,*) ; do + if [ -f "$x/grub/grub.cfg" ] ; then + submenu "Load Config from $x" $x { + root=$2 + source /grub/grub.cfg + unset superusers + } + fi + if [ -f "$x/boot/grub/grub.cfg" ] ; then + submenu "Load Config from $x" $x { + root=$2 + source /boot/grub/grub.cfg + unset superusers + } + fi + done +} + diff --git a/docs/future/dumps/grub_memdisk_serial.cfg b/docs/future/dumps/grub_memdisk_serial.cfg new file mode 100644 index 00000000..92009107 --- /dev/null +++ b/docs/future/dumps/grub_memdisk_serial.cfg @@ -0,0 +1,10 @@ +#Serial and keyboard configuration, very important. +serial --speed=115200 --unit=0 --word=8 --parity=no --stop=1 +terminal_input --append serial +terminal_output --append serial +terminal_input --append at_keyboard #add keyboard support. + +set prefix=(memdisk)/boot/grub + +set root='cbfsdisk' +source (cbfsdisk)/grub.cfg diff --git a/docs/future/dumps/kernel312_irc b/docs/future/dumps/kernel312_irc new file mode 100644 index 00000000..c5d7af32 --- /dev/null +++ b/docs/future/dumps/kernel312_irc @@ -0,0 +1,1590 @@ +<hr/> + + <h1 id="todo_cb5926_paulmenzel">Coreboot 5926 test for Paul Menzel</h1> + <p> + Coreboot log when running Video BIOS (grub payload) and <a href="http://review.coreboot.org/5926">http://review.coreboot.org/5926</a>. + </p> + <p> + Result (ThinkPad X60): <a href="dumps/coreboot_5296_oprom_grub_cbmemc">cbmem -c output</a><br/> + Config used on the X60 (grub payload and vbios): <a href="dumps/coreboot_5926_oprom_grub_config">.config</a> + </p> + + + + + + + + + + + + <h1 id="todo_cb5893_paulmenzel">Coreboot 5893 test for Paul Menzel</h1> + <p> + <a href="dumps/x60_5893_vbios.tar.gz">With VBIOS</a><br/> + <a href="dumps/x60_5893_native.tar.gz">With native graphics</a> (replay code). + </p> + <p> + Here is a crash dump from running native graphics (): <a href="dumps/x60_5893_native_crashdump">/sys/class/drm/card0/error</a>. + </p> + +<hr/> + +<h1 id="i945_stolenmem_fix">early attempt: i945 stolen memory fix (for kernel 3.12/later) (this attempt failed)</h1> +<p> +Back then we had no idea that GTT address was incorrect, and we had no idea what was causing the issue. + +<pre> +Note: see <a href="#i945_312fix">this fix</a> for the initial fix that was found. + +<b><font color="red">not working yet</font></b> +<a href="http://review.coreboot.org/#/c/5885/" >http://review.coreboot.org/#/c/5885/</a> + +untested. will test this. +checkout 5320. cherry pick 5345 on top. +mannually apply changes from 5884/1 and 5885/3 +make backlight changes as in #x60_native_notes and #t60_native_notes +test this on X60 and T60. + +If it works, manually apply 5885 to 5320 alone and then push with 5320 as dependency. +Rebase that new change ID, and rebase 5345 (pushing it as new change ID). +Manually merge the rebased 5345 into the new patch, and then push that. + +Boot with grub (obviosly!) and kernel 3.14.4 as before (with 17fec8a left untouched!). + +Note: tidy these notes! (so others can follow) + +get those logs: +Make a copy of these files: + * /var/log/dmesg + * /var/log/kern.log + * /var/log/Xorg.0.log + * /var/log/Xorg.0.log.old (If you have to restart gdm) + * /proc/ioports + * /proc/iomem +Record these outputs: + * sudo intel_reg_dumper + * uname -r + * lspci -vvnn +Do this first: <b>$ sudo modprobe msr</b> (then do as below): + * sudo inteltool -a --> in coreboot/src/util/inteltool +Make a copy of: + * coreboot serial output log. + --> Get it from serial port, or get it like that: + --> <b>./cbmem -c</b> (under coreboot/util/cbmem) +Output from source tree: +$ git log -p | head -150 (localhost/x60gitlog) +$ git diff (localhost/x60gitdiff) +Make a copy of the .config from coreboot source tree + ^ (localhost/x60config) +3D acceleration test (test if 3.12+/stolenmem issue is fixed): + - Run openarena (1024x768 res), say if it works. (note: Press tilde, do <b>/cg_drawfps 1</b>) + - Run tuxcart (1024x768 res), say if it works. + - Run neverball (1024x768 res), say if it works. + - Run glxgears, report what you see. + +Some results on the X60 (3D still doesn't work, openarena and tuxkart were slow): +<a href="dumps/5885_logs.tar.gz">5885_logs.tar.gz</a> +git diff: http://paste.debian.net/102618/ + +In src/northbridge/intel/i945/raminit.c +PaulePanter: vimuser: In your next step could you please add +PaulePanter: printk(BIOS_DEBUG, "BSM = 0x%08x\n", pci_read_config32(PCI_DEV(0,2,0), BSM)); +PaulePanter: before +PaulePanter: pci_write_config32(PCI_DEV(0,2,0), BSM, (tolud * MiB - 64 * MiB) & 0xfff00000); +done +Also removing the #if statement around those 2 lines above. +Also adding it after that line aswell, per advice from PaulePanter + +Some new results on the X60 after doing the above (3D still doesn't work, openarena and tuxkart were slow): +<a href="dumps/5885_logs_2.tar.gz">5885_logs_2.tar.gz</a> + +PaulePanter: vimuser: No idea if you can write with `devmem2`. Never used it. +PaulePanter: vimuser: It would indeed be interesting to know what value the BSM has with the vendor BIOS. +Note to self: do that. + +PaulePanter said: I have `& 0xfff00000` and phcoder uses `& 0xfffff000`, so it looks like I have the ordering incorrect. + + +Look at that discussion: +http://lists.freedesktop.org/archives/intel-gfx/2014-May/046309.html +http://lists.freedesktop.org/archives/intel-gfx/2014-May/046310.html +--> if BSM register is read-only, then is there something els ethat we might have missed? + +</pre> +</p> + + + + + + + + + + + <h2><a name="kernel312bugs">kernel 3.12+ bugs (X60/T60 native init)</a><a href="#pagetop">Back to top of page</a></h2> + <p> + Some further notes to refer to later (WARNING: long! These are collected IRC logs for later reference. Most of the + logs are not useful or relevant, and will be deleted later): + +<pre> +Note: see <a href="#i945_312fix">this fix</a> for the initial fix that was found. + +see: <a href="http://www.coreboot.org/Board:lenovo/x60#Problems_in_native_graphics_code_exposed_by_recent_kernels" >http://www.coreboot.org/Board:lenovo/x60#Problems_in_native_graphics_code_exposed_by_recent_kernels</a> +see: <a href="http://www.coreboot.org/Lenovo_x60x_vgainit_todos" >http://www.coreboot.org/Lenovo_x60x_vgainit_todos</a> + +Non-coreboot (not even i945) platforms also have issues with 3.12+ +see: <a href="https://bugs.freedesktop.org/show_bug.cgi?id=76520" >https://bugs.freedesktop.org/show_bug.cgi?id=76520</a> + +Is this relevant?: <a href="http://lists.freedesktop.org/archives/intel-gfx/2014-February/040771.html" >http://lists.freedesktop.org/archives/intel-gfx/2014-February/040771.html</a> + + + +note: read below. +and note: on later kernels they also can't seem to init the GPU properly without vbios or native gfx, whereas older kernels could. + +PaulePanter: damo22: There is also a Linux and coreboot native graphics incompatibility documented in the Wiki (by samnob). +PaulePanter: http://www.coreboot.org/Board:lenovo/x60#Problems_in_native_graphics_code_exposed_by_recent_kernels +vimuser: PaulePanter, that only exists with kernel 3.12 and above. +PaulePanter: vimuser: Do you have time to report it to the Freedesktop Bugzilla? +funfunctor: patrickg: I think its related to recent changes we had done to toolchain.in +vimuser: Yes. What info do you need ? +PaulePanter: vimuser: It’s a regressions and these are normally not allowed with Linux’ no regression policy. +vimuser: What do you think would happen then, after I made that report? +PaulePanter: vimuser: https://01.org/linuxgraphics/documentation/how-report-bugs +vimuser: You can look at it 2 ways: kernel broke, or kernel fixed a bug which broke coreboot. +PaulePanter: vimuser: Hopefully they’ll fix it. +vimuser: so: either coreboot is broken, or kernel is broken. +vimuser: PaulePanter, kernel 3.12+ should work just fine on lenovo bios, so my opinion is that the native gfx in coreboot is what's buggy. +PaulePanter: vimuser: You can also check with the developers in #intel-gfx. But first report the bug so you can reference it. +vimuser: Do you think I should just copy what's in the coreboot wiki already? +PaulePanter: vimuser: Does not matter. If it worked before 3.12, it should work afterward. +vimuser: It seems pretty complete (as far as reporting it is concerned). +vimuser: PaulePanter, my basic point is that I'm on the fence as to whether this is linux's problem, coreboot's problem, or both. +PaulePanter: vimuser: That would probably help. If they need other information, the Intel folks will ask you for it. Daniel Vetter and the other Intel folks are very responsive in my experience. +vimuser: So you think then that there would be a patch specifically for i915 + coreboot_native_init +PaulePanter: vimuser: I do not know. They hopefully figure it out. +vimuser: PaulePanter, I will do it. +PaulePanter: vimuser: And as I wrote, it is a regression. As far as I understood it, even if the firmware/hardware is broken, Linux should not introduce regressions. +vimuser: PaulePanter: at the very least, it might offer a new perspective. this whole issue has been very one-sided so far: it has only been coreboot community that talks about it. It has probably gone unobserved in kernel/intel community. +vimuser: The intel/kernel people might even be able to (easily) spot a fix for coreboot. +vimuser: I hadn't even considered this possibility before, I thought it was only a coreboot problem. Talking to those other people definitely makes sense. + +PaulePanter of #coreboot made the initial report to Freedesktop tracker: + +PaulePanter: vimuser: Hi. Did you report the Linux regression to the Freedesktop bug tracker? +PaulePanter: vimuser: Understood. Do you have an account for the Freedesktop bug tracker? +vimuser: PaulePanter: I do not have an account for Freedesktop bug tracker, but I think I could get one? +PaulePanter: vimuser: Yes, it is easy to register. +vimuser: PaulePanter, there's reporting and there's reporting properly; I want to compile my report first, before I make it. +PaulePanter: vimuser: As you do not know what they need, I think it is the wrong approach. +vimuser: Since the people that I am reporting to will be unfamiliar with the issue, and might not even know about coreboot, or only vaguely know. +PaulePanter: vimuser: I’ll report the issue and give you the URL. You can then add to it. +vimuser: PaulePanter: Good point. I can make it brief describing it as best I can, and then I can answer any specific questions. +vimuser: PaulePanter, you can use my notes at http://libreboot.org/howto.html#kernel312bugs if you like, it's a collection of insights plus links to those pages on the coreboot wiki that talk about the issue. +vimuser: (in case there is anything in the notes that might be helpful) +vimuser: PaulePanter, are the intel i915 devs of freedesktop also the ones working on the i915 code in kernel.org? (I'm slightly confused about this) + +THE REPORT: + +PaulePanter: vimuser: The Wiki talks about crashes. +PaulePanter: vimuser: https://bugs.freedesktop.org/show_bug.cgi?id=79038 + +PaulePanter: vimuser: The Wiki talks about crashes. +PaulePanter: vimuser: https://bugs.freedesktop.org/show_bug.cgi?id=79038 +vimuser: PaulePanter, thanks. I'll add to it and help any way I can. +PaulePanter: vimuser: Add `drm.debug=0x06` to the Linux command line (probably configuring in GRUB) and please add `/var/log/dmesg` to the bug report. (Or the output of `dmesg`.) +PaulePanter: vimuser: They also need `/var/log/Xorg.0.log` and your distribution and exact Linux kernel version `uname -r`. +vimuser: PaulePanter: there are basically 2 versions of native init: 3998 (based on replay, only works on X60 with XGA screen - also what libreboot currently uses) and 5320 (much better, works on more screens, 5345 can use it to enable T60 - not yet in libreboot) +vimuser: PaulePanter: should I do this test on both versions? (libreboot and coreboot+5320+5345) + +vimuser: PaulePanter: should I do this test on both versions? (libreboot and coreboot+5320+5345) +vimuser: PaulePanter: nonetheless, I will do both, and make that report for you now. +vimuser: Do I do this on pre-3.12 kernel or 3.12+ ? +PaulePanter: vimuser: I’d say Linux 3.12+. +PaulePanter: vimuser: Do you know which coreboot patches samnob used? + +vimuser: PaulePanter: very well. http://jxself.org/linux-libre has latest kernels +vimuser: I will install that. +vimuser: I do not know what coreboot patches samnob used. Probably 3998 (this was a long time ago). +vimuser: Definitely change ID 3998 (review.coreboot.org gerrit): http://review.coreboot.org/#/c/3998/ + + +vimuser: PaulePanter: here is the information that you requested: http://libreboot.org/logs/3998_Xorg.0.log http://libreboot.org/logs/3998_dmesg http://libreboot.org/logs/3998_uname +vimuser: PaulePanter: that bug in the report doesn't happen with the above -- it's an older kernel. +vimuser: Do they want me to try 3.12+ instead? +vimuser: PaulePanter: you should also give them these links to the lastest code for native graphics: +vimuser: http://review.coreboot.org/#/c/5320/ + +PaulePanter: vimuser: Thank you for getting the logs. Please register and upload the files yourself. +vimuser: Yes, ok. I will also get the same logs again for a kernel that is broken (3.12+) +vimuser: I will repeat both processes again for coreboot+5320+5345, as currently I am getting these on libreboot. +vimuser: More logs can't hurt, the worst that can happen is they will ignore the ones they don't need. I want to make sure they have everything they need. + +samnob: vimuser: samnoble.org/thinkpad/kernel/linux-image-3.14.4-gnuowen_1_i386.deb and http://samnoble.org/thinkpad/kernel/linux-image-3.14.4-gnu-stolenmem-owen_1_i386.deb latest linux-libre without and with 17fec8a reverted. +PaulePanter: vimuser: Thanks. + +vimuser: samnob, thanks. +vimuser: but we are trying to get kernel 3.12+ to work without users having to patch it +vimuser: either by fixing coreboot, or patching around coreboot in the kernel +vimuser: eventually both +samnob: Yes, just providing you kernels for the bug. +vimuser: ah right. +vimuser: with and without. that is useful. i was going to use jxself kernels. that is useful. +vimuser: I'll use yours then ;) +vimuser: dpkg -i ? + +samnob: Though based on the devs comment in the bug I think you're hope of the driver working around it is unlikely. +vimuser: can't hurt to try +samnob: dpkg -i will work fine. +samnob: (though gdebi is more fun.) +samnob: there's a version symlink_hook in that same folder that is handy for grub2 payload users too. +vimuser: samnob we think it might be classed under linux "no regression" policy +vimuser: PaulePanter's idea +samnob: can't hurt to try :) + +Here is the debugging results then: <a href="coreboot_native_3.12_bug.tar.gz" >coreboot_native_3.12_bug.tar.gz</a> + +--- + +http://undeadly.org/cgi?action=article&sid=20131120060004 was suggested +(also refer back te the datasheet) + +---- + +I have since been alerted to this bug report, which is unrelated to us +but shows that 3.12 also breaks later systems on Lenovo BIOS (as far as I can tell): + +https://bugzilla.kernel.org/show_bug.cgi?id=71391 + +-- + +PaulePanter: vimuser: If you run the Lenovo X60 right now, could you just paste it now. It should not change between all your tests. +PaulePanter: vimuser: It would really be helpful to have it now. +vimuser: My workstation X60 is running coreboot+5320 (and modification for backlight control support) +vimuser: Shall I take iomem output from that? +vimuser: kernel 3.2 is in use +PaulePanter: vimuser: Yes. Please. +vimuser: For you record: +vimuser: $ uname -r +vimuser: 3.2.0-56-generic-pae +vimuser: distro: trisquel 6 +vimuser: PaulePanter: http://paste.debian.net/101404/ + +PaulePanter linked to this: +http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/3rd-gen-core-desktop-vol-2-datasheet.pdf +--------------- + +PaulePanter: patrickg: As the resident i945 export, do you know where the register GBSM (Graphics Base of Stolen Memory) should be set? +PaulePanter: patrickg: Is the VGA Option ROM responsible for that? +PaulePanter: damo22: You do not see any problems with the VGA Option ROM, right? +damo22: PaulePanter: i am running vga rom with updated kernel (after the patch) and experience no problems with video +PaulePanter: damo22: Thank you for the confirmation. +PaulePanter: src/northbridge/intel/i945/northbridge.c: printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n", +patrickg: PaulePanter: what's that, 0x5c? +patrickg: h, no +PaulePanter: + /* Almost universally we can find the Graphics Base of Stolen Memory +PaulePanter: + * at offset 0x5c in the igfx configuration space. On a few (desktop)patrickg: PaulePanter: I think we never configured that but left it to vgabios +patrickg: PaulePanter: we only configured the RAM side +PaulePanter: patrickg: Thanks. So with native VGA init, coreboot needs to do that too. +<b><font color="red">damo22: we just need to write the gfxstolen base to gma config space at 0x5c</font></b> +damo22: that should fix it +damo22: because then the kernel will try to read that +damo22: hmm but if the generation of the gma is not >=3 it will assume it is above top of memory +patrickg: well, it is +damo22: patrickg: do you happen to know if the x60 gma is generation 2 or 3? how do i find out +PaulePanter: damo22: lspci ? +damo22: (rev 0x)? +PaulePanter: lspci -nn +damo22: never mind i will ctags the kernel tree +patrickg: but bbl +patrickg: damo22: code.metager.de applies openGrok on tons of open source projects. probably to linux, too +damo22: thanks patrickg +damo22: okay, i945g/gm is generation 3 +damo22: its nothing to do with the lscpi revision +PaulePanter: damo22: How did you check that? +PaulePanter: … it is 3rd gen? +damo22: PaulePanter: its in the i915_drv.c in the kernel +damo22: eg, i965g/gm is generation 4 +PaulePanter: Ok. +damo22: its also NOT valleyview +* pl4nkton is now known as pl4nkton`away +PaulePanter: damo22: ? +PaulePanter: Who said that? +damo22: im trying to figure out which path the kernel takes before and after the patch +damo22: it must be different +PaulePanter: damo22: https://bugs.freedesktop.org/show_bug.cgi?id=79038#c12 +PaulePanter: damo22: Before they calculate it manually and afterward they read out that register, which the firmware should program, right? +PaulePanter: src/northbridge/intel/i945/i945.h:#define TOLUD 0x9c /* Top of Low Used Memory */ +PaulePanter: Off topic, how do I make Vim and Ctags jump to the correct header definition. If I Ctrl + click on `TOLUD` in `src/northbridge/intel/i945/raminit.c` it jumps into the header of `intel/fsp_sandybridge/northbridge.h` instead of `src/northbridge/intel/i945/i945.h`. +PaulePanter: ? +damo22: i have the same problem, there is a way to configure it to pop up a list of matches so you can select the right one but i dont know how +PaulePanter: damo22: Ok. Good to know I am not the only one. +<b><font color="red"> +damo22: okay, so for gen 3 i915, (i945/m) we can do what i said above and it should work +PaulePanter: Is “graphics datastolen memory size (PCI Device 0 offset 52 bits 7:4)” configurable and programmed by the firmware or is it fixed if the IGP is enabled and can just be read? +PaulePanter: damo22: Yes. +damo22: its just a matter of setting the base address in the register +damo22: i think the only difference is that in the kernel it is assumed that it is aligned to 0x100000 +damo22: kernel does this: base &= ~((1<<20) - 1); +damo22: but coreboot does this: pci_read_config32(dev, 0x5c) & ~0xf, +damo22: possibly a one liner +damo22: change ~0xf to ~0xfffff lol +samnob: vimuser: samnoble.org/thinkpad/kernel/linux-image-3.14.4-gnu-stolenmem-owen_2_i386.deb and linux-image-3.14.4-gnuowen_2_i386.deb with CONFIG_STRICT_DEVMEM unset. No PAE as always. +samnob: damo22: thanks for looking into this. +</font></b> +vimuser: damo22: you are the most awesome person ever. I'm stilll preparing my dev/debugging environment and you speculate this already. I will try it soon. +vimuser: samnob: thank you for confirming. +vimuser: samnob: ok, /dev/mem support and non-PAE. excellent! +samnob: vimuser: don't overlook that revision 2 those, are new debs with STRICT_DEVMEM unset +damo22: vimuser: its much quicker to read and compare code than to compile kernels and flash firmware +PaulePanter: vimuser: I think your testing is not needed until you get a patch. +PaulePanter: damo22: TOLUD (PCI Device 0 offset BCh bits 31:20) +vimuser: PaulePanter ? +vimuser: Yes I understand that. I was about to debug, but now we will test damo22's advice first. +damo22: PaulePanter: i think intel_gma_init is being called with unaligned physical address for graphics mem + +PaulePanter: vimuser: BDSM—Base Data of Stolen Memory Register +PaulePanter: http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/3rd-gen-core-desktop-vol-2-datasheet.pdf + +PaulePanter: vimuser: The methods you try just read it out and never set it. +PaulePanter: This register contains the base address of graphics data stolen DRAM memory. BIOS determines the base of graphics data stolen memory by subtracting the graphics data stolen memory size (PCI Device 0 offset 52 bits 7:4) from TOLUD (PCI Device 0 offset BCh bits 31:20). +damo22: PaulePanter: im pretty sure BDSM is only present in core iX cpus +vimuser: PaulePanter, yes my method was to go about to be sure where it is set, and then try to set it properly in 5320. +PaulePanter: vimuser: The problem is already present with native graphics in coreboot master, isn’t it? +vimuser: damo22 took a shorter method to get the same result (hopefully. like you, i wait for him to confirm or deny success) +vimuser: PaulePanter, yes the 3.12+ glitches exist in 5320 changeset aswell as 3998 (the old replay version, which 5320 is a re-write of) +PaulePanter: vimuser: Sorry, I claim your tests would have never gotten any solution for the problem. +* martinr (~martin@8.36.227.227) has joined #coreboot +vimuser: PaulePanter, that is quite possible, but it was a test anyway. +PaulePanter: damo22: Chris Wilson and the Linux commit say that the BDSM is present, don’t they? +PaulePanter: + if (INTEL_INFO(dev)->gen >= 3) { +PaulePanter: + /* Read Graphics Base of Stolen Memory directly */ +vimuser: I actually did find where the stolen memory address was set, in /var/log/kern.log after using drm.debug=0x06 in those previous results i uploaded to freedesktop.org, but that was on coreboot/5320 with the address set incorrectly. +vimuser: just search for the word "stolen" in the log and you'll find it on one of the lines. + +PaulePanter: vimuser: It’s not *set* it is *read* in there. +vimuser: Oh right. +vimuser: But I thought when reading it, it has to know the address. So the address I saw must have been what was set? +vimuser: What am I missing? +damo22: okay so there is something to clarify, i915 driver is the same for all intel gpus even some that are physically located in cpu + +PaulePanter: vimuser: As it is not explicitely set beforehand it contains some incorrect value, which is then read. +PaulePanter: vimuser: That is the whole problem. +vimuser: I see. +vimuser: So, +vimuser: my tests would have been useless, then. + +<b><font color="red">damo22: it didnt work</font></b> +(note: can still try to make other changes: see testing notes below) + +damo22: oh wait, X just didnt detect the LVDS +damo22: in fact nothing did +damo22: but there were no errors +damo22: ok so when i plug external monitor X freezes and gives errors +damo22: and internal display isnt active +damo22: wierd, when i rebooted i got vga fine +damo22: i think linux kernel i915 is trying to do something with vgarom because it says "invalid rom contents" as first boot line +damo22: no i need to find out if the kernel is doing something bad without rom present +damo22: and then figure out how to enable lvds, because vga is working +vimuser: drivers/pci/rom.c: dev_err(&pdev->dev, "Invalid ROM contents\n"); +vimuser: in that: size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size) +vimuser: /* Standard PCI ROMs start out with these bytes 55 AA */ +vimuser: if (readb(image) != 0x55) { +vimuser: dev_err(&pdev->dev, "Invalid ROM contents\n"); +vimuser: break; +vimuser: } +damo22: i guess i should focus on the fact that coreboot did not initialise the gfx at grub screen +damo22: i mean seabios +damo22: its difficult because linux does some reinitialisation of gfx +damo22: i thought i had this one in the bag +CareBear\: damo22 : it does complete reinit +damo22: i flicked throught the kernel i915 driver and it looks like it reads VBT tables from romheaders or something +damo22: if we are using native gfx init, those are not present right? +samnob: damo22: I think you need to be using grub2 to test native gfx init, seabios needs at least a stub of a vgarom. +CareBear\: damo22 : correct +CareBear\: samnob damo22 : if you want to use SeaBIOS you can use the SeaVGABIOS which will pick up a native framebuffer initialized by coreboot +damo22: does SeaVGABIOS install VBT stuff in the vgarom area? +CareBear\: damo22 : probably not the kind the framebuffer driver looks for +damo22: then it will fail with linux +CareBear\: damo22 : yes +damo22: CareBear\: can we write a vgabios stub that passes the signature tests and also has native VBT tables, but executes nothing? +damo22: otherwise we need to patch the linux kernel to ignore certain models that have no vgabios +CareBear\: damo22 : let's first find out what information is used in those tables +damo22: i have the code in front of me +damo22: drivers/gpu/drm/i915/intel_bios.c (kernel) +damo22: vimuser: no, i am trawling through linux driver code +vimuser: damo22: are you aware that certain kernels can initialize the GPU on X60 without the native gfx or oprom? (you don't see payloads, but kernel/X11 shows display +damo22: i have a feeling the linux kernel currently tries to load the vgarom regardless of PCH existance + +damo22: i think there are two problems with native gfx init, one problem is that the lvds isnt coming up (coreboot issue), the other is is with the linux kernel i915 driver that tries to read the vgarom that isnt there + +vimuser: damo22, what hardware are you testing your changes on? +vimuser: Did you try 5320 without your changes? +vimuser: (hardware: X60 or T60) + +Peter on 5320 talks about vga pipe not being enabled: this means that payload doesn't appear +on vga (only on lvds). OS can output on vga or lvds. so we need to get 5320 to output (during payload) on vga + +damo22: i just slept on it, and i think i know what the problem is + + * LVDS discovery: + * 1) check for EDID on DDC + * 2) check for VBT data + * 3) check to see if LVDS is already on + * if none of the above, no panel + + +1) it cant find the EDID because the i2c is failing to read with NAK +2) there is no VBT data because there is no vga option rom +3) coreboot is still not doing native init properly so the panel is still off + +Therefore linux assumes there is no LVDS. + +damo22: how do i enable cbmem console? i enabled it in menuconfig, do i need cbmem dynamically growing? +damo22: [*] Send console output to a CBMEM buffer\ +damo22: but i got nothing + +Guest-FR: Hi +Guest-FR: would you please check +Guest-FR: src/northbridge/intel/i945/gma.c +Guest-FR: function gma_func0_disable +Guest-FR: pci_write_config16(dev, GCFC, 0xa00) , sound wrong isn't it? + +damo22: Guest-FR: what do you think is wrong about it? +Guest-FR: per the datasheet (intel, so probably it is also wrong!) , the value should be "0x1b" +Guest-FR: page 74 +damo22: Guest-FR: can you link me to the datasheet +Guest-FR: damo22: congig16 is expecting 0x && 4 digits isn't it? +Guest-FR: damo22: e.i.: 0x1234 +damo22: Guest-FR: 0xa00 === 0x0a00 +damo22: same thing +Guest-FR: ok + +Guest-FR: here is the link for tha datasheet http://www.intel.com/Assets/PDF/datasheet/307502.pdf + +damo22: ty +damo22: Guest-FR: i am also working on this gma +damo22: Guest-FR: i am trying to figure out why native gfx init is not working on my X60 tablet + +Guest-FR: per gma.h, GCFC is 0xf0 /* Graphics Clock Frequency & Gating Control */ +damo22: Guest-FR: GCFC is missing from the datasheet +damo22: so how do you know its wrong +Guest-FR: it is my mistake.... I'm expecting to see 4 digits for conf16 +damo22: Guest-FR: ok, i would have expected GCFC to be on page 62 at the bottom but its missing +Guest-FR: probably we should make a dump to see the value we have with an original bios. what you think ? is it possible? +damo22: Guest-FR: however, GGC is mismatching between that datasheet and in coreboot gma +Guest-FR: intel is a fu*** company +damo22: ahh no, i looked up the wrong file +damo22: it matches +damo22: Guest-FR: i am assuming you are using patched gma to test? +Guest-FR: damo22: no, I use the original one +damo22: Guest-FR: http://review.coreboot.org/#/c/5320/ +Guest-FR: I try to port my board to coorboot https://github.com/coreboot-for-945g-m4/945g-m4 +Guest-FR: thx damo22 +damo22: Guest-FR: you need extra config in devicetree.cb with that +Guest-FR: damo22: http://review.coreboot.org/#/c/5762/ +damo22: Guest-FR: i cant view it +Guest-FR: oops, it is draft +Guest-FR: may I add you as a reviewer ? +damo22: Guest-FR: sure +Guest-FR: damo at zamodio? +damo22: correct +Guest-FR: done +Guest-FR: please feel free put comments (and be verbos, I'm not a developper :p ) +Guest-FR: probably my devicetree is not good, +damo22: it still wont load +Guest-FR: damien at zamaudio.com ? +damo22: yes +damo22: ok better +Guest-FR: probably you got an email ? +Guest-FR: for a review +damo22: Guest-FR: i dont see native gfx init +damo22: are you using vgarom? +Guest-FR: I'm using a PCIE card (Radeon X300) +damo22: dont you want to try to initialise the onboard gfx? +Guest-FR: why not, I'll give it a go :) +damo22: you showed me a whole bunch of code, but what is the problem? +Guest-FR: the serial is working, but it hang on "setting up static southbridge register ..." +Guest-FR: and some times, it went to "setting up Root Complex Topology" +damo22: Guest-FR: well, look for that message in the code and find the next message that should be displayed and you know the problem is between the two messaged +Guest-FR: there is some thing unstable +damo22: messages* +Guest-FR: ok +damo22: Guest-FR: if its too hard to find, add some printk's +damo22: i could really use a tip on how to enable cbmem console +damo22: im running blind + +Guest-FR: the msg ih at " src/northbridge/intel/i945/early_init.c " i945_setup_bars function +Guest-FR: so my problem is between "Setting up static southbridge registers..." and "Done" :) + +damo22: cat .config|grep CBMEM ===> http://paste.debian.net/101541/ why do i still not have any cbmem console? "No console found in coreboot table." +content of debian paste: +CONFIG_EARLY_CBMEM_INIT=y +# CONFIG_DYNAMIC_CBMEM is not set +CONFIG_CONSOLE_CBMEM=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +damo22: No coreboot CBMEM area found! +* Guest-FR (d5f5ab0b@gateway/web/freenode/ip.213.245.171.11) has joined #coreboot +Guest-FR: I'd like to understand: is there any difference betweent: pci_write_config16(LPC_DEV, 0x84, 0x0a01); + pci_write_config16(LPC_DEV, 0x86, 0x00fc); vs pci_write_config32(LPC_DEV, 0x84, 0x00fc0a01); +Guest-FR: for exemple: lenovo/x60/romstage.c we have: pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x84, 0x1601); however in the ich7 datasheet page 364 it is a conf32 + +phcoder-screen: damo22: for C segment. boot with oprom, then dd if=/dev/mem bs=64k of=seg_cdef.bin skip=12 count=4 +damo22: ok +damo22: is that the VBT table? +phcoder-screen: part of it is +damo22: phcoder-screen: http://www.zamaudio.com/mbox2/seg_cdef.bin +damo22: it looks correct because it mentions calistoga +damo22: phcoder-screen: as a general solution, would it be possible to write a script that takes a vgarom as input and outputs a vgarom stub that will have no executable code but still have the VBT stuff and signatures to fool the OS that real vgarom is there, and will detect panels etc +damo22: or is there a better way? + +phcoder-screen: damo22: there is a better way: generate it in coreboot. I have a tool to partially parse the roms. Trying it with yours. +damo22: cool + +phcoder-screen: damo22: http://pastebin.com/GsYhSaNB +Content of that paste: +signature: <$VBT CALISTOGA > +version: 1.00 +VBT size: 0xea0 +VBT checksum: 0x0 +BDB version: 1.29 +section type 254, size 0xea + type: 0 + relstage: 64 + chipset: 1 + LVDS + No TV + rsvd3[0]: 0x8 + rsvd3[1]: 0x3 + rsvd3[2]: 0x31 + rsvd3[3]: 0x33 + Signon: 13Intel(r)Calistoga PCI Accelerated SVGA BIOS +Build Number: 1313d.dal PC 14.20 Dev 10/17/2006 0:22:30 +DECOMPILATION OR DISASSEMBLY PROHIBITED + + Copyright: + Code segment: a + DOS Boot mode: 0 + Bandwidth percent: c0 + rsvd4: 0x3 + Bandwidth percent: 8 + rsvd5: 0x4 +section type 1, size 0x5 +General features: + panel_fitting = 0x3 + flexaim = 0x1 + download_ext_vbt = 0x1 + *enable_ssc = 0x1 + *ssc_freq = 0x1 + *display_clock_mode = 0x0 + disable_smooth_vision = 0x0 + *fdi_rx_polarity_inverted = 0x0 + legacy_monitor_detect = 0x1 + *int_crt_support = 0x1 + *int_tv_support = 0x0 +section type 254, size 0x20 +section type 2, size 0xcb + *CRT DDC GMBUS pin: 2 + DPMS ACPI: 0 + Skip boot CRT detect: 0 + DPMS aim: 1 + boot_display: { 0, 0 } + 6 devices + *device type: 1009 (TV) + *dvo_port: 5 + *i2c_pin: 0 + *slave_addr: 0 + *ddc_pin: 0 + *dvo_wiring: 0 + edid_ptr: 0 + *device type: 1022 (flat panel) + *dvo_port: 4 + *i2c_pin: 0 + *slave_addr: 0 + *ddc_pin: 3 + *dvo_wiring: 0 + edid_ptr: 0 + *device type: 0 (Empty) + *device type: 0 (Empty) + *device type: 0 (Empty) + *device type: 0 (Empty) +section type 3, size 0x1 +section type 4, size 0x1c +section type 254, size 0x69 +section type 6, size 0x16d +section type 7, size 0x7 +section type 8, size 0x3d +section type 10, size 0xcb +section type 11, size 0xc7 +section type 12, size 0xf + *LVDS config: 1 + *Dual frequency: 1 +section type 13, size 0x3 +section type 14, size 0x9 +section type 15, size 0x8b +section type 16, size 0x84 +section type 17, size 0x8 +section type 18, size 0xc +section type 19, size 0x20 +section type 20, size 0x9e +section type 22, size 0x15 + *Panel type: 3 +section type 23, size 0x48 +section type 24, size 0x28 +section type 25, size 0x28 +section type 26, size 0x2 +section type 40, size 0x8 +section type 41, size 0x91 +section type 42, size 0x4a0 +section type 43, size 0x61 +section type 44, size 0x15 +damo22: phcoder-screen: does that mean for every supported board, an extra step will be needed to parse the roms so that the port can be done +damo22: *CRT DDC GMBUS pin: 2 +damo22: i think it is trying pin 3 +phcoder-screen: damo22: CRT is VGA +phcoder-screen: ddc_pin is 3 under lvds section +damo22: oh yeah +phcoder-screen: damo22: we already need some info in device tree to init. I think we can reuse it +phcoder-screen: I can upload my parser if you want +damo22: sure, i can parse my T60 and X60t +damo22: and eventually T61 +phcoder-screen: CL 5842 +damo22: thanks + +damo22: phcoder-screen: do you think the EDID is failing to read in linux because the VBT is missing? + +phcoder-screen: damo22: it's a likely explanation. I'd reput first 64k of your dump back to place +damo22: where does it belong in the flash? +damo22: c0000? +phcoder-screen: damo22: nowhere. c0000 is in RAM +damo22: so how do i ensure it gets loaded into ram at c0000 +phcoder-screen: damo22: memcpy +damo22: im convinced it will work if i do that +damo22: thats like loading the vgarom +damo22: but without executing it +phcoder-screen: damo22: yes +damo22: couldnt i just select it in menuconfig, but comment out the code that runs it? +phcoder-screen: yes +phcoder-screen: and keep in mind that oprom is self-modifying +damo22: yes so i need the final dump to load not the original +phcoder-screen: yes + + + +-- + +Side discussion (in #libreboot, not #coreboot as above): + +vimuser: damo22: what was the problem? +damo22: EDID is not being read in linux +damo22: well it is, but it fails +damo22: probably because the VBT signature is missing from the oprom +vimuser: oprom? +vimuser: You mean native init code? +vimuser: that it doesn't put the proper data in vbt +damo22: there is some special metadata in the oprom that native init doesnt put in +damo22: linux looks for it +damo22: thats how it knows where to read the EDID from +damo22: otherwise it uses a default address that could be wrong +damo22: in some cases it works +damo22: other cases like my X60t it fails +vimuser: that would explain why "read-edid" utility deosn't work on natisev gfx at the mament +vimuser: moment +vimuser: Basstard` ^ + +damo22: vimuser: phcoder wrote an experimental utility to parse some of the VBT tables from a vgarom +vimuser: Did he share it with you? +damo22: yes +vimuser: Did he upload it publicly? +damo22: http://review.coreboot.org/#/c/5842/ +vimuser: Ok cool. +vimuser: Do you think I should try it? + +damo22: you could use it to get more info from all your known boards, collect the parsed tables in a folder correctly named with the type of panel and the type of laptop +vimuser: So as per #coreboot, my understanding is: move to new stolen memory address, find that metadata and how it's calculated and write that (memcpy/write32) in native init, get VBT tables parsed from ROM, replicate that in native gfx (stub code, just the addresses and pointers to the native init code) +vimuser: Should this be run an a vgabios.bin, or on a system where vga bios is running (parse it in memory) ? +vimuser: or both? +damo22: we havent got a solution for native init yet, but we do need to collect info from different models +damo22: to see how they compare +vimuser: yes so, vgabios.bin (file) or running vga bios? +damo22: and also we can add it to devicetree.cb somehow later +damo22: preferably the running vgabios +vimuser: ok +damo22: you can dump it with this command: +damo22: sudo dd if=/dev/mem bs=64k of=runningvga.bin skip=12 count=1 + +damo22: coreboot/util/intelvbttool + +damo22: gcc intelvbttool.c -o intelvbttool + +vimuser: it would be good for you to run intelvbttool on vgabios.bin and runningvgabios.bin. (where vgabios.bin is extracted from lenovo rom, and runningvgabios.bin is dd'd from memory after it executed) +vimuser: right? +vimuser: (I will do the same) +vimuser: just runningvgabios.bin ? +damo22: its useless in the factory bios +damo22: for the purposes of this test +vimuser: ok +vimuser: Can't hurt though (might be useful later). +damo22: not really, it might be modified at runtime and we wont know anything about it +damo22: we need final values +damo22: the rest is irrelevant +vimuser: Yes. I was saying to run it on final dump, and factory dump. +vimuser: but ok, i will only do it for final dump + +-- + +further discussion, continued in #coreboot: + +damo22:we could generate fake_vbt arrays for each model +damo22:vimuser: whats the link to the vbt stuff again +vimuser: http://review.coreboot.org/#/c/5396 for X230 +damo22:vimuser: no on libreboot +vimuser: I also added this to the notes at http://libreboot.org/howto.html#i945_vbt and http://libreboot.org/howto.html#intelvbttool_results for future reference. +vimuser: on libreboot? I don't understand. +damo22:its possible that the VBT is modified by the vgarom depending on the panel it detects, assuming it can do that +damo22:only problem is, you need info from the VBT to know where to read the EDID, so how does the vgarom do it? +damo22:maybe its safe to assume that the EDID i2c will be the same for all panels +vimuser: Might be hardcoded (what CareBear calls "stupid magic numbers") +damo22:so we should check all VBTs of the same laptop model and verify that the EDID i2c or ddc pin is the same for all panel types +vimuser: Sorry, when you say VBT do you mean the runningvga.bin dump taken with dd when vgarom is running? +damo22:then we can hardcode that value into the coreboot devicetree.cb + +vimuser: I see. it's an i2c bus that connects lvds/vga/vga out +kmalkki:damo22: in your opinion, where is this EDID eeprom physically located? +damo22:kmalkki: on the panel, or the transformer for the panel +kmalkki:damo22: what do you think is a transformer for the panel? +damo22:some circuitry that interfaces between the lvds connector and the panel itself +damo22:on the T60 there is a separate module afaik +damo22:on other models it might be incorporated into the panel idk +damo22:kmalkki: i believe that the VBT has information regarding which pin of the i2c to read for the EDID eeprom/storage +damo22:and it varies panel to panel +kmalkki:would it surprise you DDC signals are often not on the panel connector +damo22:hmm + +kmalkki:like, x60 schematics is easily available, do check on some alternative ways how these are done +damo22:ok + +kmalkki:damo22: for t60 however... LCD connector does have EDID lines +damo22:kmalkki: well it would be nice to have a general solution to EDID reading +damo22:i need to understand the wiring more and the VBT +kmalkki:DDC signals originate from the graphics device +kmalkki:that will be Intel for some, ATI for some T60 ? + +damo22:kmalkki: linux expects the VBT to be in the vgarom memory area, because it uses it to identify when a panel exists, so coreboot should provide VBT like a vendor bios ? + +damo22:when vgarom is used with coreboot there is no problem , but for native gfx init it doesnt always work +kmalkki:ok.. so we can ignore ATI case for now +damo22:kmalkki: is that because no native init will be done for that case? +damo22:so the vgarom will always work +kmalkki:ok.. so do you know VBT format? +damo22:kmalkki: phcoder has done lots of work on it already +kmalkki:and.. is there a problem in reading the EDID? +damo22:kmalkki: idk yet, i need to test +damo22:im having trouble building a coreboot rom that uses coreboots native framebuffer so i can see if it worked +damo22:linux reinits the gfx so its not a good test +damo22:but in any case, without the VBT, linux cant reinit my gfx +damo22:it fails to read the EDID +damo22:and without a dock, and cbmem console isnt working, i cant get the coreboot log to check what actually happened +kmalkki:what do you mean cbmem console not working? +damo22:kmalkki: i enabled it in menuconfig and built a rom, but when i run it on my X60t cbmem -c reports No console found +kmalkki:we should get it fixed then +kmalkki:paste your .config +damo22:http://paste.debian.net/101644/ + +kmalkki:git hash is from local tree.. it does work on master, right? +damo22:idk +damo22:i just cherry picked some native gfx patches +damo22:why would it affect cbmem console +kmalkki:mess up MTRRs or memory space mapping or UMA region... +damo22:ok +kmalkki:are those patches on gerrit you picked? +damo22:well i need these patches because that is why i need the console +damo22:yes +damo22:actually i did minor changes too +damo22::S +kmalkki:yep.. which patches exactly +damo22:5320 +damo22:then i changed 2 lines +damo22:a minor devicetree.cb line and this: +damo22:- intel_gma_init(conf, pci_read_config32(dev, 0x5c) & ~0xf, +damo22:+ intel_gma_init(conf, pci_read_config32(dev, 0x5c) & ~0xfffff, +kmalkki:ok.. also paste 'git log' so I find common hash from master +damo22:http://paste.debian.net/101645/ + +damo22:does anyone have better google xen than me, i cant seem to find a pdf of x60 schematics +Basstard' damo22: Do you mean this? http://www.computerservice.es/wp-content/uploads/2013/05/IBM-X60.pdf + +damo22:yep thanks +kmalkki:and now that I am awake, I see DDC signals on x60 LCD too +kmalkki:just.. no DDC or I2C in the signal name but EDID +damo22:yeah +damo22:what bus does the lvds connector use +damo22:is that i2c? +damo22:or should i say, how standard is that lcd connector they are using on the X60 +kmalkki:mainboard side is completely non-standard AFAIK +damo22:ohhh +kmalkki:panel side has a few variants on the LVDS input +damo22:ok +damo22:this is not easy to generalise then +damo22:SPWG_EDID_CLK and SPWG_EDID_DATA are the signals i found on the connector + +kmalkki:yes. and it looks like phcoder-screen has done all the work to read the EDID +damo22:yes but the address and pins required are stored in the VBT i think +kmalkki:solve your CBMEM console, please +damo22:yea +Basstard' damo22: Here's a cleaner one: http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006054.pdf +kmalkki:just verify 1315730 works +damo22:1315730? + +GNUtoo-irssi: vimuser: hi, 0x58BF58BE works fine --- cool. (not related to these discussions, but GNUtoo is happy). + +<a name="gnutoo_gtt"></a> +GNUtoo-irssi: phcoder-screen: if you're still working on native GPU init for i945(it seems so), I've an observation: +GNUtoo-irssi: gtt is not setup correctly anymore with your versions, the kenrel complains +GNUtoo-irssi: it was with a replay version, so if you're still working on it it may be an usefull hint +GNUtoo-irssi: I've added the code that works inside git, so if you want/need it, ping me +phcoder-screen:damo22: yes +GNUtoo-irssi: beside the kernel warning, the effect is slow 3D with a 3.10 lts kernel +damo22:GNUtoo-irssi: can you push it as a notformerge? +GNUtoo-irssi: ok, good idea +GNUtoo-irssi: ah sigh, again... +GNUtoo-irssi: ! [remote rejected] HEAD -> refs/for/master/NOTFORMERGE-reference-i915_gpu_init-x60 (change 3992 closed) +GNUtoo-irssi: I'll change the IDs +damo22:GNUtoo-irssi: have you seen 5230? +damo22:5320* +phcoder-screen:damo22: rank 0 of either channel is configured but not rank 1 +GNUtoo-irssi: let me look +GNUtoo-irssi: I've tried some recent branch for the t60 +GNUtoo-irssi: it works well, beside the gtt init issue I just described +damo22:GNUtoo-irssi: given that you were working on 3992 which is closed are you able to rebase your changes on top of 5320? +damo22:hmm 3992 was merged +damo22:phcoder-screen: my dimms are dual rank +<stefanct> GNUtoo-irssi: i am not too familiar with gerrit, but that error message seems to indicate that you should not try to push 3992 again because it is already merged... rebasing the remains of your changes on top of that (or origin/master) should fix that *i guess* + +URL to topic: http://review.coreboot.org/#/q/status:open+project:coreboot+branch:master+topic:NOTFORMERGE-reference-i915_gpu_init-x60,n,z +(note: this is old code, not *directly* useful but might be useful later. put this somewhere else in howto.html later) + +GNUtoo-irssi: done, NOTFORMERGE-reference-i915_gpu_init-x60 +GNUtoo-irssi: yes, I've removed the Ids +GNUtoo-irssi: so they were regenerated +GNUtoo-irssi: the goal is not to rebase at all here +GNUtoo-irssi: that's a reference code +GNUtoo-irssi: it's not for merge either +GNUtoo-irssi: If I start modifying it, I'll need to spend time testing it again +GNUtoo-irssi: I've no time right now +GNUtoo-irssi: maybe I'll have later in theses two weeks +GNUtoo-irssi: but not right now +damo22:GNUtoo-irssi: mainboard/lenovo/x60/i915* has been removed in favour of northbridge/intel/i945/gma.c in 5320 +damo22:i thought you had changes for that +GNUtoo-irssi: yes, I know +GNUtoo-irssi: what I just pushed is a *reference code* where the GTT setup works +GNUtoo-irssi: it's old +GNUtoo-irssi: it's not meant to be merged +GNUtoo-irssi: it's not rebased +GNUtoo-irssi: it's just frozen code where it's known to work +GNUtoo-irssi: that's all + +damo22:ok +GNUtoo-irssi: it doesn't even handle backlight +GNUtoo-irssi: even with devmem2... +damo22:i'll see if i can find the gtt stuff and compare to 5320 +damo22:could be a one liner +damo22:physbase -> uma_memory_base+256*KiB +phcoder-screen:damo22: yes and rank 1 config failed +damo22:phcoder-screen: ok, so i'll get you that mchbar dump +phcoder-screen:damo22: no need yet. I found out that in another ram config my X230 fails as well. I'll investigate this first + +kmalkki:GNUtoo-irssi: please abandon the duplicates in your gerrit space +kmalkki:also any microcode files will not be removed until working copies are in 3rdparty/ + +kmalkki:we probably want to keep the old version in gerrit, with all the comments made previously + +damo22:kmalkki: all those patches are noformerge +damo22:not* +kmalkki:damo22: still they are duplicates of already reviewed patches +kmalkki:why the heck the new change-ids +damo22:maybe a git diff to a pastebin would have been better + +GNUtoo-irssi: ls +GNUtoo-irssi: oops +<uberushaximus> hunter2 +kmalkki:GNUtoo-irssi: please explain your motivation to push that stuff on gerrit +kmalkki:it is not even rebased to current but 6 months old HEAD +GNUtoo-irssi: GTT is setup badly on x60 +GNUtoo-irssi: with the recent changes from phcoder +GNUtoo-irssi: what I pushed is a version that is known to have the GTT setup correctly +GNUtoo-irssi: it's for reference +GNUtoo-irssi: so people working on i945 native GPU init would use it to fix that issue faster +GNUtoo-irssi: like diff both +GNUtoo-irssi: or something like that +GNUtoo-irssi: kmalkki: do you have a better description for the topic branch name that describe what I just said? +kmalkki:well gerrit is not for the purpose of storing references +kmalkki:most of those patches already had Change-IDs +kmalkki:now we have duplicates.. and comments can end up in either place +kmalkki:it was already a havoc with native init before +GNUtoo-irssi: ok, so instead I should remove that branch, and push on gitorious? +kmalkki:all of You working on it, try to work a setup that suits you all well +GNUtoo-irssi: briefly: it's for tracking a regression + +kmalkki:well I do not do i915 gfx stuff.. but clearly you have a lot of problems trying to keep and follow each others work +kmalkki:and what works and where the regressions have happened +PaulePanter: GNUtoo-irssi: Hi. Do you know if the amount memory reserved for i945 IGD is always constant or if that is configurable? +PaulePanter: GNUtoo-irssi: I did not see a table in the 3rd Gen datasheet. +PaulePanter: http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/3rd-gen-core-family-mobile-vol-2-datasheet.pdf +GNUtoo-irssi: PaulePanter: you mean the GSM? +GNUtoo-irssi: (Graphics stolen memory) +PaulePanter: GNUtoo-irssi: Yes. + +PaulePanter: Section 2.5.33 BDSM—Base Data of Stolen Memory Register +GNUtoo-irssi: If I remmeber well it's configurable, but we use the values advised by the datasheet +GNUtoo-irssi: which are derived from the ammount of RAM +PaulePanter: This register contains the base address of graphics data stolen DRAM memory. BIOS determines the base of graphics data stolen memory by subtracting the graphics data stolen memory size (PCI Device 0 offset 52 bits 7:4) from TOLUD (PCI Device 0 offset BCh bits 31:20). +PaulePanter: GNUtoo-irssi: Yes, I am unable to find the advised values. +damo22:PaulePanter: are you sure thats the right datasheet for the cpu inside the X60? + +GNUtoo-irssi: ok +GNUtoo-irssi: I can look +PaulePanter: damo22: Not 100 %. +damo22:afaik, BSDM is something kinky in the core iX processors +GNUtoo-irssi: uma_size = 1024; +PaulePanter: Chris Wilson from the Intel graphics Linux driver team said that BDSM ist incorrectly set up. +PaulePanter: … on the i945. +PaulePanter: … by coreboot. +PaulePanter: This is Volume 2 of the Datasheet for the following products: +PaulePanter: Mobile 3rd Generation Intel ® CoreTM processor family +GNUtoo-irssi: in pci_domain_set_resources in northbridge.c +PaulePanter: Mobile Intel ® Pentium ® processor family +GNUtoo-irssi: ok +PaulePanter: Mobile Intel ® Celeron ® processor family +PaulePanter: GNUtoo-irssi: Thanks. So it is constant for now. +PaulePanter: GNUtoo-irssi: So just 1 MB graphics memory? + +damo22:i dont remember him mentioning BDSM in the bug report, but he did say the GTT was incorrectly set up? +damo22:graphics stolen stuff +GNUtoo-irssi: no it's not +GNUtoo-irssi: read the function +PaulePanter: “Stolen memory has been set up incorrectly by coreboot.” +PaulePanter: GNUtoo-irssi: Ok. +PaulePanter: GNUtoo-irssi: No idea, if you are aware of https://bugs.freedesktop.org/show_bug.cgi?id=79038 . +GNUtoo-irssi: http://paste.debian.net/101662/ +[ 0.764084] input: Video Bus as /devices/LNXSYSTM:00/device:00/PNP0A08:00/LNXVIDEO:00/input/input3 +[ 0.771023] pci 0000:00:00.0: Intel 945GM Chipset +[ 0.771075] pci 0000:00:00.0: detected gtt size: 262144K total, 262144K mappable +[ 0.771669] pci 0000:00:00.0: detected 8192K stolen memory +[ 0.771738] [drm] Memory usable by graphics device = 256M +[ 0.772124] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 0.772126] [drm] Driver supports precise vblank timestamp query. +[ 0.772133] i915 0000:00:02.0: Invalid ROM contents +[ 0.772141] [drm] failed to find VBIOS tables +[ 0.772192] [drm] GPU crash dump saved to /sys/class/drm/card0/error +[ 0.772196] [drm] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace. +[ 0.772198] [drm] Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel +[ 0.772200] [drm] drm/i915 developers can then reassign to the right component if it's not a kernel issue. +[ 0.772202] [drm] The gpu crash dump is required to analyze gpu hangs, so please always attach it. +[ 0.772207] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem +[ 0.772217] i915: render error detected, EIR: 0x00000010 +[ 0.772224] i915: page table error +[ 0.772227] i915: PGTBL_ER: 0x00000012 +[ 0.772233] [drm:i915_report_and_clear_eir] *ERROR* EIR stuck: 0x00000010, masking +[ 0.772247] i915: render error detected, EIR: 0x00000010 +[ 0.772252] i915: page table error +[ 0.772255] i915: PGTBL_ER: 0x00000012 +[ 0.924707] [drm] initialized overlay support +[ 1.126501] fbcon: inteldrmfb (fb0) is primary device +[ 1.360027] tsc: Refined TSC clocksource calibration: 1828.749 MHz +[ 1.482148] Console: switching to colour frame buffer device 175x65 +[ 1.490507] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device +[ 1.490510] i915 0000:00:02.0: registered panic notifier +[ 1.490522] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0 +[ 1.491931] console [netcon0] enabled +[ 1.491933] netconsole: network logging started +[ 1.494021] ACPI: bus type USB registered +GNUtoo-irssi: that is the regression ^^^^ +GNUtoo-irssi: See PGTBL_ER +GNUtoo-irssi: The bits are documented +damo22:i have compared GNUtoo-irssi's patchset with the 5320 stuff that phcoder did, and i found that 1 line needs to be changed +GNUtoo-irssi: (I don't remember where, probably in the datasheet that applies to the more recent GPUs (sic)) + +damo22:its the base address of the gma init call + +PaulePanter: damo22: Are you going to push a patch for testing? + +damo22:but in order for it to work you need vgarom with native init, it doesnt run the rom just uses it for VBT +PaulePanter: damo22: I still not see how that should fix the error, but we’ll see. +damo22:how do i squash my commits into one patch that can be applied to 5320? +PaulePanter: damo22: Is that patch really dependent on 5320? I thought it is also needed for the current native graphics init in the tree? + +PaulePanter: damo22: `git rebase -i +PaulePanter: ` +PaulePanter: damo22: git rebase -i commit-hash-of-5320 +damo22:thanks +PaulePanter: damo22: To squash you will need to change `pick` to `f` or `s` for `fixup` or `squash`. + +damo22:i have a patch that could be tested on X60: http://review.coreboot.org/#/c/5868/ +PaulePanter: damo22: On Nehalem: +PaulePanter: src/northbridge/intel/nehalem/gma.c: intel_gma_init(conf, gtt_res->base, physbase, pio_res->base, +PaulePanter: src/northbridge/intel/nehalem/gma.c- lfb_res->base); +damo22:PaulePanter: i fail to see relevance of nehalem in i945 +PaulePanter: damo22: Hopefully the code can be written in a way that common paths are written the same. +PaulePanter: damo22: Let’s first see if the patch fixes it. + +PaulePanter: damo22: By the way, which datasheet do you think is correct for the Intel 945 IGD in the Lenovo T60 and X60? + +damo22:whichever datasheet includes 945PM (Calistoga) Graphics +damo22:is it PM or GM? +PaulePanter: damo22: I thought GM. +damo22:PM has no integrated graphics so it must be GM +PaulePanter: damo22: Document Number: 309219-006 +damo22:PaulePanter: this must be the datasheet: http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/mobile-945-express-chipset-datasheet.pdf + +PaulePanter: Mobile Intel® 945 Express Chipset Family +PaulePanter: damo22: ;-) + +damo22:309219-006 is correct +PaulePanter: Graphics Stolen Memory and TSEG are within DRAM space defined under TOLUD. From +kmalkki:PaulePanter: did you go through the list of patches in your gerrit space that I suggested needed rebase? +PaulePanter: the top of low used DRAM, (G)MCH claims 1 to 64 MBs of DRAM for internal graphics if +PaulePanter: enabled. +PaulePanter: kmalkki: I thought I did go through most of them. +kmalkki:do you have the list +kmalkki:I did not keep copy :/ +kmalkki:5388 +kmalkki:that is AMR +PaulePanter: kmalkki: Don’t waste you time with it. I have a copy of your list somewhere and will go through it in the next days. +kmalkki:PaulePanter: +1 5388 +damo22:PaulePanter: its an integrated GMA 950 afaik +idwer: oh... 5388 has no priority whatsover to me +idwer: not anymore ;) + +damo22:does GM45 support in coreboot have ddr2 AND ddr3 support? + +damo22:well that means X200 could be ported with ME disabled +phcoder-screen:damo22: that's my next fun project after raminit for ivy. +* thomasg_ is now known as thomasg + +damo22:vimuser: LTN150XG-L08 is my T60 EDID string (for his T60 15" -- this is already noted below in intelvbttool results) + +vimuser: damo22: ok, i should test 5868? I understand it puts the vgarom inside but without running it (just for getting VBT tables) but latre we could replace it with something like what the X230 "Deploy VBT" does +damo22:yeah +vimuser: Let me read backlog... +damo22:vimuser: you dont need backlog, everything you need is in the 5868 commit +vimuser: how did your X60t unbricking go, damo22? +damo22:havent bothered finding my screwdrivers yet +vimuser: I need to.... tidy myself up. Back in an hour or so. +vimuser: damo22: upload a ROM for me, with 5868 and grub payload +vimuser: I'll test it for you +damo22:im not good with grub payloads +damo22:i can give you one with seabios +vimuser: ok give me that, +vimuser: also hm ok, give me your .config. I'll add grub myself +damo22:ok +damo22:vimuser: http://paste.debian.net/plain/101692 +# +# Automatically generated make config: don't edit +# coreboot version: 4.0-5614-gdb77532 +# Mon May 26 00:11:44 2014 +# + +# +# General setup +# +CONFIG_EXPERT=y +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_SCANBUILD_ENABLE is not set +# CONFIG_CCACHE is not set +# CONFIG_SCONFIG_GENPARSER is not set +CONFIG_USE_OPTION_TABLE=y +CONFIG_COMPRESS_RAMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_EARLY_CBMEM_INIT=y +# CONFIG_DYNAMIC_CBMEM is not set +# CONFIG_COLLECT_TIMESTAMPS is not set +# CONFIG_USE_BLOBS is not set +# CONFIG_COVERAGE is not set + +# +# Mainboard +# +# CONFIG_VENDOR_AAEON is not set +# CONFIG_VENDOR_ABIT is not set +# CONFIG_VENDOR_ADLINK is not set +# CONFIG_VENDOR_ADVANSUS is not set +# CONFIG_VENDOR_ADVANTECH is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_ARIMA is not set +# CONFIG_VENDOR_ARTECGROUP is not set +# CONFIG_VENDOR_ASI is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_A_TREND is not set +# CONFIG_VENDOR_AVALUE is not set +# CONFIG_VENDOR_AXUS is not set +# CONFIG_VENDOR_AZZA is not set +# CONFIG_VENDOR_BACHMANN is not set +# CONFIG_VENDOR_BCOM is not set +# CONFIG_VENDOR_BIFFEROS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BROADCOM is not set +# CONFIG_VENDOR_COMPAQ is not set +# CONFIG_VENDOR_CUBIETECH is not set +# CONFIG_VENDOR_DIGITALLOGIC is not set +# CONFIG_VENDOR_DMP is not set +# CONFIG_VENDOR_EAGLELION is not set +# CONFIG_VENDOR_ECS is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GIZMOSPHERE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_IEI is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_IWAVE is not set +# CONFIG_VENDOR_IWILL is not set +# CONFIG_VENDOR_JETWAY is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LANNER is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LINUTOP is not set +# CONFIG_VENDOR_LIPPERT is not set +# CONFIG_VENDOR_MITAC is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NEC is not set +# CONFIG_VENDOR_NEWISYS is not set +# CONFIG_VENDOR_NOKIA is not set +# CONFIG_VENDOR_NVIDIA is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_RCA is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SOYO is not set +# CONFIG_VENDOR_SUNW is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_TECHNEXION is not set +# CONFIG_VENDOR_TECHNOLOGIC is not set +# CONFIG_VENDOR_TELEVIDEO is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_THOMSON is not set +# CONFIG_VENDOR_TRAVERSE is not set +# CONFIG_VENDOR_TYAN is not set +# CONFIG_VENDOR_VIA is not set +# CONFIG_VENDOR_WINENT is not set +# CONFIG_VENDOR_WYSE is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_DIR="lenovo/x60" +CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60 / X60s" +CONFIG_IRQ_SLOT_COUNT=18 +CONFIG_MAINBOARD_VENDOR="Lenovo" +CONFIG_MAX_CPUS=2 +CONFIG_RAMTOP=0x200000 +CONFIG_HEAP_SIZE=0x4000 +CONFIG_RAMBASE=0x100000 +CONFIG_VGA_BIOS_ID="8086,27a2" +CONFIG_DRIVERS_PS2_KEYBOARD=y +CONFIG_ONBOARD_VGA_IS_PRIMARY=y +CONFIG_VGA_BIOS=y +# CONFIG_CONSOLE_POST is not set +# CONFIG_UDELAY_IO is not set +CONFIG_DCACHE_RAM_BASE=0xffdf8000 +CONFIG_DCACHE_RAM_SIZE=0x8000 +CONFIG_SERIAL_CPU_INIT=y +CONFIG_ACPI_SSDTX_NUM=0 +CONFIG_VGA_BIOS_FILE="vgabios.bin" +# CONFIG_PCI_64BIT_PREF_MEM is not set +CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ID_SECTION_OFFSET=0x80 +# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set +# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set +# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set +CONFIG_STACK_SIZE=0x1000 +CONFIG_XIP_ROM_SIZE=0x10000 +CONFIG_MMCONF_SUPPORT_DEFAULT=y +# CONFIG_VGA is not set +CONFIG_BOARD_LENOVO_X60=y +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_SEABIOS_PS2_TIMEOUT=3000 +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_CPU_ADDR_BITS=32 +CONFIG_CACHE_ROM_SIZE_OVERRIDE=0 +# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set +CONFIG_LOGICAL_CPUS=y +CONFIG_IOAPIC=y +CONFIG_SMP=y +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 +# CONFIG_USBDEBUG is not set +CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0 +CONFIG_BOARD_ROMSIZE_KB_2048=y +# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +CONFIG_COREBOOT_ROMSIZE_KB_2048=y +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +CONFIG_COREBOOT_ROMSIZE_KB=2048 +CONFIG_ROM_SIZE=0x200000 +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60 / X60s" +CONFIG_ARCH_X86=y +# CONFIG_ARCH_ARMV7 is not set + +# +# Architecture (x86) +# +CONFIG_X86_ARCH_OPTIONS=y +CONFIG_AP_IN_SIPI_WAIT=y +# CONFIG_SIPI_VECTOR_IN_ROM is not set +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_NUM_IPI_STARTS=2 +CONFIG_X86_BOOTBLOCK_SIMPLE=y +# CONFIG_X86_BOOTBLOCK_NORMAL is not set +CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_ROMCC is not set +CONFIG_PC80_SYSTEM=y +CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/i945/bootblock.c" +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801gx/bootblock.c" +CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y +# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set +CONFIG_HPET_ADDRESS=0xfed00000 +CONFIG_HAVE_ARCH_MEMSET=y +CONFIG_HAVE_ARCH_MEMCPY=y +CONFIG_HAVE_ARCH_MEMMOVE=y +# CONFIG_MAINBOARD_HAS_CHROMEOS is not set + +# +# Chipset +# + +# +# CPU +# +CONFIG_SOCKET_SPECIFIC_OPTIONS=y +# CONFIG_CPU_AMD_AGESA is not set +CONFIG_HAVE_INIT_TIMER=y +CONFIG_HIGH_SCRATCH_MEMORY_SIZE=0x0 +CONFIG_CPU_INTEL_MODEL_6EX=y +CONFIG_CPU_INTEL_MODEL_6FX=y +CONFIG_SMM_TSEG_SIZE=0 +CONFIG_CPU_INTEL_SOCKET_MFCPGA478=y +CONFIG_SSE2=y +# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set +# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set +CONFIG_UDELAY_LAPIC=y +CONFIG_LAPIC_MONOTONIC_TIMER=y +# CONFIG_UDELAY_TSC is not set +# CONFIG_UDELAY_TIMER2 is not set +# CONFIG_TSC_CALIBRATE_WITH_IO is not set +# CONFIG_TSC_SYNC_LFENCE is not set +CONFIG_TSC_SYNC_MFENCE=y +# CONFIG_SMM_TSEG is not set +# CONFIG_SMM_MODULES is not set +# CONFIG_X86_AMD_FIXED_MTRRS is not set +# CONFIG_PARALLEL_MP is not set +# CONFIG_BACKUP_DEFAULT_SMM_REGION is not set +CONFIG_CACHE_AS_RAM=y +CONFIG_AP_SIPI_VECTOR=0xfffff000 +CONFIG_MMX=y +CONFIG_SSE=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_CPU_MICROCODE_ADDED_DURING_BUILD=y +CONFIG_CPU_MICROCODE_CBFS_GENERATE=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +CONFIG_VIDEO_MB=0 +# CONFIG_NORTHBRIDGE_AMD_AGESA is not set +# CONFIG_AMD_NB_CIMX is not set +# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set +CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y +CONFIG_NORTHBRIDGE_INTEL_I945=y +# CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC is not set +CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y +CONFIG_CHANNEL_XOR_RANDOMIZATION=y +# CONFIG_OVERRIDE_CLOCK_DISABLE is not set +# CONFIG_CHECK_SLFRCS_ON_RESUME is not set +CONFIG_CBFS_SIZE=0x200000 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_MAX_PIRQ_LINKS=4 + +# +# Southbridge +# +CONFIG_EHCI_BAR=0xfef00000 +# CONFIG_AMD_SB_CIMX is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set +# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set +CONFIG_AMD_SB_SPI_TX_LEN=4 +# CONFIG_SPI_FLASH is not set +CONFIG_SOUTHBRIDGE_INTEL_COMMON=y +CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y +CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y + +# +# Super I/O +# +CONFIG_SUPERIO_NSC_PC87382=y +CONFIG_SUPERIO_NSC_PC87392=y + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_DOCK_EARLY_INIT=y +CONFIG_EC_LENOVO_PMH7=y + +# +# SoC +# + +# +# Devices +# +CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y +# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is not set +CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_ON_DEVICE_ROM_RUN is not set +# CONFIG_MULTIPLE_VGA_ADAPTERS is not set +CONFIG_PCI=y +# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_AGP_PLUGIN_SUPPORT=y +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +# CONFIG_AZALIA_PLUGIN_SUPPORT is not set +# CONFIG_PCIEXP_COMMON_CLOCK is not set +# CONFIG_PCIEXP_ASPM is not set +CONFIG_PCI_BUS_SEGN_BITS=0 + +# +# VGA BIOS +# + +# +# Display +# + +# +# PXE ROM +# +# CONFIG_PXE_ROM is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 + +# +# Generic Drivers +# +# CONFIG_DRIVERS_I2C_RTD2132 is not set +CONFIG_DRIVERS_ICS_954309=y +# CONFIG_INTEL_DP is not set +# CONFIG_INTEL_DDI is not set +CONFIG_INTEL_EDID=y +# CONFIG_IPMI_KCS is not set +# CONFIG_DRIVER_MAXIM_MAX77686 is not set +# CONFIG_DRIVERS_OXFORD_OXPCIE is not set +# CONFIG_DRIVER_PARADE_PS8625 is not set +# CONFIG_TPM is not set +# CONFIG_RTL8168_ROM_DISABLE is not set +# CONFIG_DRIVERS_SIL_3114 is not set +# CONFIG_DRIVER_TI_TPS65090 is not set +CONFIG_HAVE_UART_IO_MAPPED=y +# CONFIG_HAVE_UART_MEMORY_MAPPED is not set +# CONFIG_HAVE_UART_SPECIAL is not set +# CONFIG_DRIVER_XPOWERS_AXP209 is not set +CONFIG_MMCONF_SUPPORT=y + +# +# Console +# +CONFIG_EARLY_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y +CONFIG_CONSOLE_SERIAL=y +CONFIG_CONSOLE_SERIAL8250=y +CONFIG_CONSOLE_SERIAL_COM1=y +# CONFIG_CONSOLE_SERIAL_COM2 is not set +# CONFIG_CONSOLE_SERIAL_COM3 is not set +# CONFIG_CONSOLE_SERIAL_COM4 is not set +CONFIG_TTYS0_BASE=0x3f8 +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_BAUD=115200 +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +CONFIG_HAVE_USBDEBUG=y +# CONFIG_HAVE_USBDEBUG_OPTIONS is not set +# CONFIG_CONSOLE_NE2K is not set +# CONFIG_CONSOLE_CBMEM is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +# CONFIG_NO_POST is not set +# CONFIG_CMOS_POST is not set +CONFIG_IO_POST=y +CONFIG_IO_POST_PORT=0x80 +CONFIG_HAVE_ACPI_RESUME=y +# CONFIG_HAVE_ACPI_SLIC is not set +CONFIG_HAVE_HARD_RESET=y +CONFIG_HAVE_MONOTONIC_TIMER=y +# CONFIG_TIMER_QUEUE is not set +CONFIG_HAVE_OPTION_TABLE=y +# CONFIG_PIRQ_ROUTE is not set +CONFIG_HAVE_SMI_HANDLER=y +# CONFIG_PCI_IO_CFG_EXT is not set +CONFIG_USE_WATCHDOG_ON_BOOT=y +CONFIG_GFXUMA=y +# CONFIG_RELOCATABLE_MODULES is not set +# CONFIG_HAVE_REFCODE_BLOB is not set +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_HAVE_MP_TABLE=y +CONFIG_HAVE_PIRQ_TABLE=y + +# +# System tables +# +CONFIG_GENERATE_ACPI_TABLES=y +CONFIG_GENERATE_MP_TABLE=y +CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_GENERATE_SMBIOS_TABLES=y + +# +# Payload +# +# CONFIG_PAYLOAD_NONE is not set +# CONFIG_PAYLOAD_ELF is not set +# CONFIG_PAYLOAD_LINUX is not set +CONFIG_PAYLOAD_SEABIOS=y +# CONFIG_PAYLOAD_FILO is not set +# CONFIG_PAYLOAD_GRUB2 is not set +# CONFIG_PAYLOAD_TIANOCORE is not set +CONFIG_SEABIOS_STABLE=y +# CONFIG_SEABIOS_MASTER is not set +CONFIG_PAYLOAD_FILE="$(obj)/seabios/out/bios.bin.elf" +CONFIG_COMPRESSED_PAYLOAD_LZMA=y + +# +# Debugging +# +# CONFIG_GDB_STUB is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set +# CONFIG_HAVE_DEBUG_CAR is not set +# CONFIG_DEBUG_PIRQ is not set +# CONFIG_HAVE_DEBUG_SMBUS is not set +# CONFIG_DEBUG_SMI is not set +# CONFIG_DEBUG_SMM_RELOCATION is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_ACPI is not set +# CONFIG_TRACE is not set +# CONFIG_ENABLE_APIC_EXT_ID is not set +CONFIG_WARNINGS_ARE_ERRORS=y +# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set +# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set +# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set +# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set + +damo22:you need to still add the vgabios filename +damo22:CONFIG_VGA_BIOS_FILE="vgabios.bin" is the current setting +damo22:# CONFIG_CONSOLE_CBMEM is not set woops + +vimuser: damo22 » register "gpu_lvds_is_dual_channel" = "1" +vimuser: on x60/devicetree.cb +damo22:vimuser: well check your VBT i think its correct though +vimuser: so 0 was wrong? +damo22:it might depend on panel + +vimuser: Oh +vimuser: I get it now. +vimuser: I didn't see any code in 5868 that executes anything from the vgarom but, +vimuser: you set coreboot to load it into memory, but not execute it. +vimuser: I thought "load" only meant put it in cbfs +vimuser: is this a correct assessment? +vimuser: To let kernel find vbt tables. +vimuser: And then we "fake" it later (withotu vga rom loaded). +vimuser: damo22: are you testing 5868 on your X60t? +damo22:vimuser: its to make linux kernel detect lvds after native init, but if you can also test coreboot native framebuffer with grub too, that would be handy + +vimuser: So, vgarom has nothing to do with that patch. +vimuser: ? +vimuser: All I see is a change of stolen memory address, and the backlight values added +damo22:vimuser: its tricky because the final vgabios in memory changes depending on the panel, because vgarom is self modifying + +vimuser: So should I include the vgarunning.bin instead of vgabios.bin ? +damo22:yes + +damo22:vimuser: if you can load grub as payload and you see something, its a success +vimuser: damo22: the problem is, without that patch I just use 5320 as-is, and I see grub as payload already. +vimuser: Hence my question above. +damo22:vimuser: also, if you can boot into linux after that and dont get any error messages from drm module, its a double success +vimuser: Which error messages (besides "Invalid ROM contents") am I looking for? +damo22:vimuser: stuff like, page fault +vimuser: And should I enable any specific debugging options (such as drm.debug=0x06) +damo22:yes that would help +vimuser: Ok: which logs do you want? +vimuser: I'll upload it for your reference +damo22:vimuser: kernel boot log and Xorg.0.log, coreboot log if possible +vimuser: probably kern.log and Xorg.0.log +vimuser: coreboot log is possible, i have dock. +vimuser: anything else? +damo22:that is all, thanks +vimuser: ok. will do. + +vimuser: damo22: I could test this on T60 aswell by cherry picking 5345, right? +damo22:vimuser: idk +vimuser: (and addinf backlight value to deivcetree) +vimuser: We should devise a way to test this on T60 aswell. +damo22:vimuser: lets just see if the x60 fix works + +damo22:it still needs work if the test passes +vimuser: Ok but, you just have that one line changed in gma.c, and backlight value changed it x60/devicetree.cb +damo22:yes +damo22:phcoder did most of the work +vimuser: So, I could run this same test on T60 by cherry picking 5345 on top of 5868, changing t60/devicetree.cb's backlight value and including T60 runningvga.bin and having that load (but not execute) +damo22:its a small bug i think +vimuser: I will do that above, after X60 is tested. +damo22:vimuser: youre always talking about more and more combinations of tests, lets just get one right +vimuser: Yes. Just a thought. We'll test X60 exclusively. T60 can easily be tested later. +vimuser: Ok..... back soon. I'll get you the results you wanted. I'll be using 3.14.4 (the one samnob made). +damo22:thanks + +vimuser: We should do this with the latest runningvga.bin (from extracting with dd on the latest vgabios.bin) +vimuser: My one is older +damo22:vimuser: version number of vgabios is irrelevant if it was taken from a lenovo bios that used to run on your machine, and since pulled from ram +damo22:ie, it should have the correct VBT values +damo22:for your machine + + + +</pre> +</p> + diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/biosdecode.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/biosdecode.log new file mode 100644 index 00000000..70617532 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/biosdecode.log @@ -0,0 +1,24 @@ +# biosdecode 2.12 +VPD present. + BIOS Build ID: 7UET56WW + Box Serial Number: L3BLN3R + Motherboard Serial Number: VF26F91C27K + Machine Type/Model: 6475GE2 +SMBIOS 2.4 present. + Structure Table Length: 2469 bytes + Structure Table Address: 0x000E0010 + Number Of Structures: 74 + Maximum Structure Size: 120 bytes +BIOS32 Service Directory present. + Revision: 0 + Calling Interface Address: 0x000FDC80 +ACPI 2.0 present. + OEM Identifier: LENOVO + RSD Table 32-bit Address: 0xBCB6A54A + XSD Table 64-bit Address: 0x00000000BCB6A5B6 +PNP BIOS 1.0 present. + Event Notification: Not Supported + Real Mode 16-bit Code Address: E19B:1934 + Real Mode 16-bit Data Address: 0040:0000 + 16-bit Protected Mode Code Address: 0x000F8AD1 + 16-bit Protected Mode Data Address: 0x00000400 diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/codec#0 b/docs/future/dumps/logs-t400-bios2.02-ec1.01/codec#0 new file mode 100644 index 00000000..66ad8121 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/codec#0 @@ -0,0 +1,208 @@ +Codec: Conexant CX20561 (Hermosa) +Address: 0 +AFG Function Id: 0x1 (unsol 1) +MFG Function Id: 0x2 (unsol 1) +Vendor Id: 0x14f15051 +Subsystem Id: 0x17aa211c +Revision Id: 0x100000 +Modem Function Group: 0x2 +Default PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM +Default Amp-In caps: N/A +Default Amp-Out caps: N/A +State of AFG node 0x01: + Power states: D0 D1 D2 D3 CLKSTOP + Power: setting=D0, actual=D0 +GPIO: io=4, o=0, i=0, unsolicited=1, wake=0 + IO[0]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[1]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[2]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[3]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 +Node 0x10 [Audio Output] wcaps 0xc1d: Stereo Amp-Out R/L + Control: name="Speaker Playback Volume", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Control: name="Speaker Playback Switch", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Device: name="CX20561 Analog", type="Audio", device=0 + Amp-Out caps: ofs=0x4a, nsteps=0x4a, stepsize=0x03, mute=0 + Amp-Out vals: [0x00 0x00] + Converter: stream=8, channel=0 + PCM: + rates [0x560]: 44100 48000 96000 192000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x11 [Audio Output] wcaps 0xc1d: Stereo Amp-Out R/L + Control: name="Headphone Playback Volume", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Control: name="Headphone Playback Switch", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Amp-Out caps: ofs=0x4a, nsteps=0x4a, stepsize=0x03, mute=0 + Amp-Out vals: [0x00 0x00] + Converter: stream=8, channel=0 + PCM: + rates [0x560]: 44100 48000 96000 192000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x12 [Audio Output] wcaps 0x211: Stereo Digital + Control: name="IEC958 Playback Con Mask", index=0, device=0 + Control: name="IEC958 Playback Pro Mask", index=0, device=0 + Control: name="IEC958 Playback Default", index=0, device=0 + Control: name="IEC958 Playback Switch", index=0, device=0 + Control: name="IEC958 Default PCM Playback Switch", index=0, device=0 + Device: name="CX20561 Digital", type="SPDIF", device=1 + Converter: stream=8, channel=0 + Digital: + Digital category: 0x0 + IEC Coding Type: 0x0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x5]: PCM AC3 +Node 0x13 [Beep Generator Widget] wcaps 0x70000c: Mono Amp-Out + Control: name="Beep Playback Volume", index=0, device=0 + ControlAmp: chs=1, dir=Out, idx=0, ofs=0 + Control: name="Beep Playback Switch", index=0, device=0 + ControlAmp: chs=1, dir=Out, idx=0, ofs=0 + Amp-Out caps: ofs=0x03, nsteps=0x03, stepsize=0x17, mute=0 + Amp-Out vals: [0x00] +Node 0x14 [Audio Input] wcaps 0x100d1b: Stereo Amp-In R/L + Device: name="CX20561 Analog", type="Audio", device=0 + Amp-In caps: ofs=0x4a, nsteps=0x50, stepsize=0x03, mute=0 + Amp-In vals: [0x50 0x50] [0x50 0x50] + Converter: stream=4, channel=0 + SDI-Select: 0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x1d* 0x17 +Node 0x15 [Audio Input] wcaps 0x100d1b: Stereo Amp-In R/L + Control: name="Capture Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=1, ofs=0 + Amp-In caps: ofs=0x4a, nsteps=0x50, stepsize=0x03, mute=0 + Amp-In vals: [0x50 0x50] + Converter: stream=0, channel=0 + SDI-Select: 0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 1 + 0x18 +Node 0x16 [Pin Complex] wcaps 0x400581: Stereo + Control: name="Headphone Jack", index=0, device=0 + Pincap 0x0000001c: OUT HP Detect + Pin Default 0x022140f0: [Jack] HP Out at Ext Front + Conn = 1/8, Color = Green + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0xc0: OUT HP + Unsolicited: tag=02, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10 0x11* +Node 0x17 [Pin Complex] wcaps 0x40048b: Stereo Amp-In + Control: name="Dock Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Dock Mic Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x27, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00001224: IN Detect + Vref caps: 50 80 + Pin Default 0x61a190f0: [N/A] Mic at Sep Rear + Conn = 1/8, Color = Pink + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x24: IN VREF_80 + Unsolicited: tag=03, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x18 [Pin Complex] wcaps 0x40048b: Stereo Amp-In + Control: name="Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Mic Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x27, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00001224: IN Detect + Vref caps: 50 80 + Pin Default 0x02a190f0: [Jack] Mic at Ext Front + Conn = 1/8, Color = Pink + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x24: IN VREF_80 + Unsolicited: tag=04, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x19 [Pin Complex] wcaps 0x400581: Stereo + Control: name="Dock Headphone Jack", index=0, device=0 + Pincap 0x00000014: OUT Detect + Pin Default 0x40f000f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x40: OUT + Unsolicited: tag=01, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10 0x11* +Node 0x1a [Pin Complex] wcaps 0x400501: Stereo + Control: name="Speaker Phantom Jack", index=0, device=0 + Pincap 0x00010010: OUT EAPD + EAPD 0x2: EAPD + Pin Default 0x901701f0: [Fixed] Speaker at Int N/A + Conn = Analog, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10* 0x11 +Node 0x1b [Pin Complex] wcaps 0x400500: Mono + Pincap 0x00010010: OUT EAPD + EAPD 0x2: EAPD + Pin Default 0x40f001f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10* 0x11 +Node 0x1c [Pin Complex] wcaps 0x400701: Stereo Digital + Control: name="SPDIF Phantom Jack", index=0, device=0 + Pincap 0x00000010: OUT + Pin Default 0x40f001f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 1 + 0x12 +Node 0x1d [Pin Complex] wcaps 0x40040b: Stereo Amp-In + Control: name="Internal Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Internal Mic Phantom Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x2f, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00000020: IN + Pin Default 0x90a601f0: [Fixed] Mic at Int N/A + Conn = Digital, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x20: IN + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x1e [Vendor Defined Widget] wcaps 0xf00000: Mono diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/cpuinfo.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/cpuinfo.log new file mode 100644 index 00000000..36ee864f --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/cpuinfo.log @@ -0,0 +1,52 @@ +processor : 0 +vendor_id : GenuineIntel +cpu family : 6 +model : 23 +model name : Intel(R) Core(TM)2 Duo CPU P8400 @ 2.26GHz +stepping : 6 +microcode : 0x60c +cpu MHz : 1600.000 +cache size : 3072 KB +physical id : 0 +siblings : 2 +core id : 0 +cpu cores : 2 +apicid : 0 +initial apicid : 0 +fpu : yes +fpu_exception : yes +cpuid level : 10 +wp : yes +flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts nopl aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 lahf_lm dtherm tpr_shadow vnmi flexpriority +bogomips : 4521.76 +clflush size : 64 +cache_alignment : 64 +address sizes : 36 bits physical, 48 bits virtual +power management: + +processor : 1 +vendor_id : GenuineIntel +cpu family : 6 +model : 23 +model name : Intel(R) Core(TM)2 Duo CPU P8400 @ 2.26GHz +stepping : 6 +microcode : 0x60c +cpu MHz : 1600.000 +cache size : 3072 KB +physical id : 0 +siblings : 2 +core id : 1 +cpu cores : 2 +apicid : 1 +initial apicid : 1 +fpu : yes +fpu_exception : yes +cpuid level : 10 +wp : yes +flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts nopl aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 lahf_lm dtherm tpr_shadow vnmi flexpriority +bogomips : 4521.76 +clflush size : 64 +cache_alignment : 64 +address sizes : 36 bits physical, 48 bits virtual +power management: + diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/dmesg.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/dmesg.log new file mode 100644 index 00000000..e3f54c49 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/dmesg.log @@ -0,0 +1,1042 @@ +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 3.13.0-39-lowlatency (root@devel.trisquel.info) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #66+7.0trisquel2 SMP PREEMPT Wed Oct 29 17:10:10 UTC 2014 (Ubuntu 3.13.0-39.66+7.0trisquel2-lowlatency 3.13.11.8-gnu) +[ 0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-3.13.0-39-lowlatency root=UUID=35246665-9714-42dc-8ff4-580d4cf85131 ro nomdmonddf nomdmonisw nomdmonddf nomdmonisw +[ 0.000000] KERNEL supported cpus: +[ 0.000000] Intel GenuineIntel +[ 0.000000] AMD AuthenticAMD +[ 0.000000] Centaur CentaurHauls +[ 0.000000] Disabled fast string operations +[ 0.000000] e820: BIOS-provided physical RAM map: +[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009ebff] usable +[ 0.000000] BIOS-e820: [mem 0x000000000009ec00-0x000000000009ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000000dc000-0x00000000000fffff] reserved +[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000bc6a0fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000bc6a1000-0x00000000bc6a6fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bc6a7000-0x00000000bc7b6fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000bc7b7000-0x00000000bc80efff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bc80f000-0x00000000bc8c6fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000bc8c7000-0x00000000bc8d1fff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000bc8d2000-0x00000000bc8d4fff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x00000000bc8d5000-0x00000000bc8d8fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bc8d9000-0x00000000bc8dcfff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000bc8dd000-0x00000000bc8dffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bc8e0000-0x00000000bc906fff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000bc907000-0x00000000bc907fff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x00000000bc908000-0x00000000bcb0efff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bcb0f000-0x00000000bcb9efff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000bcb9f000-0x00000000bcbfefff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x00000000bcbff000-0x00000000bcbfffff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000bcc00000-0x00000000beffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec0ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed003ff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed10000-0x00000000fed13fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed18000-0x00000000fed19fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed8ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000ff800000-0x00000000ffffffff] reserved +[ 0.000000] NX (Execute Disable) protection: active +[ 0.000000] SMBIOS 2.4 present. +[ 0.000000] DMI: LENOVO 6475GE2/6475GE2, BIOS 7UET56WW (2.02 ) 01/09/2009 +[ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved +[ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable +[ 0.000000] No AGP bridge found +[ 0.000000] e820: last_pfn = 0xbcc00 max_arch_pfn = 0x400000000 +[ 0.000000] MTRR default type: uncachable +[ 0.000000] MTRR fixed ranges enabled: +[ 0.000000] 00000-9FFFF write-back +[ 0.000000] A0000-BFFFF uncachable +[ 0.000000] C0000-D3FFF write-protect +[ 0.000000] D4000-DBFFF uncachable +[ 0.000000] DC000-FFFFF write-protect +[ 0.000000] MTRR variable ranges enabled: +[ 0.000000] 0 base 0BD000000 mask FFF000000 uncachable +[ 0.000000] 1 base 0BE000000 mask FFE000000 uncachable +[ 0.000000] 2 base 000000000 mask F80000000 write-back +[ 0.000000] 3 base 080000000 mask FC0000000 write-back +[ 0.000000] 4 base 0BCE00000 mask FFFE00000 uncachable +[ 0.000000] 5 disabled +[ 0.000000] 6 disabled +[ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 +[ 0.000000] original variable MTRRs +[ 0.000000] reg 0, base: 3024MB, range: 16MB, type UC +[ 0.000000] reg 1, base: 3040MB, range: 32MB, type UC +[ 0.000000] reg 2, base: 0GB, range: 2GB, type WB +[ 0.000000] reg 3, base: 2GB, range: 1GB, type WB +[ 0.000000] reg 4, base: 3022MB, range: 2MB, type UC +[ 0.000000] total RAM covered: 3022M +[ 0.000000] Found optimal setting for mtrr clean up +[ 0.000000] gran_size: 64K chunk_size: 64M num_reg: 5 lose cover RAM: 0G +[ 0.000000] New variable MTRRs +[ 0.000000] reg 0, base: 0GB, range: 2GB, type WB +[ 0.000000] reg 1, base: 2GB, range: 1GB, type WB +[ 0.000000] reg 2, base: 3022MB, range: 2MB, type UC +[ 0.000000] reg 3, base: 3024MB, range: 16MB, type UC +[ 0.000000] reg 4, base: 3040MB, range: 32MB, type UC +[ 0.000000] found SMP MP-table at [mem 0x000f6570-0x000f657f] mapped at [ffff8800000f6570] +[ 0.000000] Scanning 1 areas for low memory corruption +[ 0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576 +[ 0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff] +[ 0.000000] [mem 0x00000000-0x000fffff] page 4k +[ 0.000000] BRK [0x01fd9000, 0x01fd9fff] PGTABLE +[ 0.000000] BRK [0x01fda000, 0x01fdafff] PGTABLE +[ 0.000000] BRK [0x01fdb000, 0x01fdbfff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0xbc400000-0xbc5fffff] +[ 0.000000] [mem 0xbc400000-0xbc5fffff] page 2M +[ 0.000000] BRK [0x01fdc000, 0x01fdcfff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0xbc000000-0xbc3fffff] +[ 0.000000] [mem 0xbc000000-0xbc3fffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x80000000-0xbbffffff] +[ 0.000000] [mem 0x80000000-0xbbffffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x00100000-0x7fffffff] +[ 0.000000] [mem 0x00100000-0x001fffff] page 4k +[ 0.000000] [mem 0x00200000-0x7fffffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0xbc600000-0xbc6a0fff] +[ 0.000000] [mem 0xbc600000-0xbc6a0fff] page 4k +[ 0.000000] BRK [0x01fdd000, 0x01fddfff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0xbc6a7000-0xbc7b6fff] +[ 0.000000] [mem 0xbc6a7000-0xbc7b6fff] page 4k +[ 0.000000] init_memory_mapping: [mem 0xbc80f000-0xbc8c6fff] +[ 0.000000] [mem 0xbc80f000-0xbc8c6fff] page 4k +[ 0.000000] BRK [0x01fde000, 0x01fdefff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0xbcbff000-0xbcbfffff] +[ 0.000000] [mem 0xbcbff000-0xbcbfffff] page 4k +[ 0.000000] RAMDISK: [mem 0x3530e000-0x3697efff] +[ 0.000000] ACPI: RSDP 00000000000f6530 000024 (v02 LENOVO) +[ 0.000000] ACPI: XSDT 00000000bcb6a5b6 000094 (v01 LENOVO TP-7U 00002020 LTP 00000000) +[ 0.000000] ACPI: FACP 00000000bcb6a700 0000F4 (v03 LENOVO TP-7U 00002020 LNVO 00000001) +[ 0.000000] ACPI: DSDT 00000000bcb6aadb 00F0B8 (v01 LENOVO TP-7U 00002020 MSFT 03000000) +[ 0.000000] ACPI: FACS 00000000bcb8e000 000040 +[ 0.000000] ACPI: SSDT 00000000bcb6a8b4 000227 (v01 LENOVO TP-7U 00002020 MSFT 03000000) +[ 0.000000] ACPI: ECDT 00000000bcb79b93 000052 (v01 LENOVO TP-7U 00002020 LNVO 00000001) +[ 0.000000] ACPI: APIC 00000000bcb79be5 000078 (v01 LENOVO TP-7U 00002020 LNVO 00000001) +[ 0.000000] ACPI: MCFG 00000000bcb79c5d 00003C (v01 LENOVO TP-7U 00002020 LNVO 00000001) +[ 0.000000] ACPI: HPET 00000000bcb79c99 000038 (v01 LENOVO TP-7U 00002020 LNVO 00000001) +[ 0.000000] ACPI: SLIC 00000000bcb79dc2 000176 (v01 LENOVO TP-7U 00002020 LTP 00000000) +[ 0.000000] ACPI: BOOT 00000000bcb79f38 000028 (v01 LENOVO TP-7U 00002020 LTP 00000001) +[ 0.000000] ACPI: ASF! 00000000bcb79f60 0000A0 (v16 LENOVO TP-7U 00002020 PTL 00000001) +[ 0.000000] ACPI: SSDT 00000000bcb8d213 00054F (v01 LENOVO TP-7U 00002020 INTL 20050513) +[ 0.000000] ACPI: TCPA 00000000bc907000 000032 (v00 00000000 00000000) +[ 0.000000] ACPI: SSDT 00000000bc8d4000 000655 (v01 PmRef CpuPm 00003000 INTL 20050624) +[ 0.000000] ACPI: SSDT 00000000bc8d3000 000274 (v01 PmRef Cpu0Tst 00003000 INTL 20050624) +[ 0.000000] ACPI: SSDT 00000000bc8d2000 000242 (v01 PmRef ApTst 00003000 INTL 20050624) +[ 0.000000] ACPI: DMI detected: Lenovo ThinkPad T400 +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] No NUMA configuration found +[ 0.000000] Faking a node at [mem 0x0000000000000000-0x00000000bcbfffff] +[ 0.000000] Initmem setup node 0 [mem 0x00000000-0xbcbfffff] +[ 0.000000] NODE_DATA [mem 0xbc8c1000-0xbc8c5fff] +[ 0.000000] [ffffea0000000000-ffffea0002ffffff] PMD -> [ffff8800b8c00000-ffff8800bbbfffff] on node 0 +[ 0.000000] Zone ranges: +[ 0.000000] DMA [mem 0x00001000-0x00ffffff] +[ 0.000000] DMA32 [mem 0x01000000-0xffffffff] +[ 0.000000] Normal empty +[ 0.000000] Movable zone start for each node +[ 0.000000] Early memory node ranges +[ 0.000000] node 0: [mem 0x00001000-0x0009dfff] +[ 0.000000] node 0: [mem 0x00100000-0xbc6a0fff] +[ 0.000000] node 0: [mem 0xbc6a7000-0xbc7b6fff] +[ 0.000000] node 0: [mem 0xbc80f000-0xbc8c6fff] +[ 0.000000] node 0: [mem 0xbcbff000-0xbcbfffff] +[ 0.000000] On node 0 totalpages: 772103 +[ 0.000000] DMA zone: 64 pages used for memmap +[ 0.000000] DMA zone: 21 pages reserved +[ 0.000000] DMA zone: 3997 pages, LIFO batch:0 +[ 0.000000] DMA32 zone: 12016 pages used for memmap +[ 0.000000] DMA32 zone: 768106 pages, LIFO batch:31 +[ 0.000000] ACPI: PM-Timer IO Port: 0x1008 +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] disabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x03] disabled) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) +[ 0.000000] ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0]) +[ 0.000000] IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-23 +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) +[ 0.000000] ACPI: IRQ0 used by override. +[ 0.000000] ACPI: IRQ2 used by override. +[ 0.000000] ACPI: IRQ9 used by override. +[ 0.000000] Using ACPI (MADT) for SMP configuration information +[ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000 +[ 0.000000] smpboot: Allowing 4 CPUs, 2 hotplug CPUs +[ 0.000000] nr_irqs_gsi: 40 +[ 0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x0009f000-0x0009ffff] +[ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000dbfff] +[ 0.000000] PM: Registered nosave memory: [mem 0x000dc000-0x000fffff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc6a1000-0xbc6a6fff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc7b7000-0xbc80efff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc8c7000-0xbc8d1fff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc8d2000-0xbc8d4fff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc8d5000-0xbc8d8fff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc8d9000-0xbc8dcfff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc8dd000-0xbc8dffff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc8e0000-0xbc906fff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc907000-0xbc907fff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbc908000-0xbcb0efff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbcb0f000-0xbcb9efff] +[ 0.000000] PM: Registered nosave memory: [mem 0xbcb9f000-0xbcbfefff] +[ 0.000000] e820: [mem 0xbf000000-0xdfffffff] available for PCI devices +[ 0.000000] Booting paravirtualized kernel on bare hardware +[ 0.000000] setup_percpu: NR_CPUS:256 nr_cpumask_bits:256 nr_cpu_ids:4 nr_node_ids:1 +[ 0.000000] PERCPU: Embedded 29 pages/cpu @ffff8800bc200000 s86848 r8192 d23744 u524288 +[ 0.000000] pcpu-alloc: s86848 r8192 d23744 u524288 alloc=1*2097152 +[ 0.000000] pcpu-alloc: [0] 0 1 2 3 +[ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 760002 +[ 0.000000] Policy zone: DMA32 +[ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-3.13.0-39-lowlatency root=UUID=35246665-9714-42dc-8ff4-580d4cf85131 ro nomdmonddf nomdmonisw nomdmonddf nomdmonisw +[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.000000] Checking aperture... +[ 0.000000] No AGP bridge found +[ 0.000000] Calgary: detecting Calgary via BIOS EBDA area +[ 0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing! +[ 0.000000] Memory: 2999200K/3088412K available (7418K kernel code, 1135K rwdata, 3420K rodata, 1324K init, 1444K bss, 89212K reserved) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] RCU dyntick-idle grace-period acceleration is enabled. +[ 0.000000] Dump stacks of tasks blocking RCU-preempt GP. +[ 0.000000] RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=4. +[ 0.000000] Offload RCU callbacks from all CPUs +[ 0.000000] Offload RCU callbacks from CPUs: 0-3. +[ 0.000000] NR_IRQS:16640 nr_irqs:712 16 +[ 0.000000] Console: colour VGA+ 80x25 +[ 0.000000] console [tty0] enabled +[ 0.000000] allocated 12582912 bytes of page_cgroup +[ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups +[ 0.000000] hpet clockevent registered +[ 0.000000] tsc: Fast TSC calibration using PIT +[ 0.000000] tsc: Detected 2260.884 MHz processor +[ 0.001004] Calibrating delay loop (skipped), value calculated using timer frequency.. 4521.76 BogoMIPS (lpj=2260884) +[ 0.001101] pid_max: default: 32768 minimum: 301 +[ 0.001183] Security Framework initialized +[ 0.002014] AppArmor: AppArmor initialized +[ 0.002061] Yama: becoming mindful. +[ 0.002519] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes) +[ 0.005045] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes) +[ 0.006304] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.006363] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.006750] Initializing cgroup subsys memory +[ 0.006805] Initializing cgroup subsys devices +[ 0.006852] Initializing cgroup subsys freezer +[ 0.006900] Initializing cgroup subsys blkio +[ 0.006946] Initializing cgroup subsys bfqio +[ 0.007006] Initializing cgroup subsys perf_event +[ 0.007056] Initializing cgroup subsys hugetlb +[ 0.007125] Disabled fast string operations +[ 0.007177] CPU: Physical Processor ID: 0 +[ 0.007222] CPU: Processor Core ID: 0 +[ 0.007269] mce: CPU supports 6 MCE banks +[ 0.007321] CPU0: Thermal monitoring enabled (TM2) +[ 0.007375] Last level iTLB entries: 4KB 128, 2MB 4, 4MB 4 +[ 0.007375] Last level dTLB entries: 4KB 256, 2MB 0, 4MB 32 +[ 0.007375] tlb_flushall_shift: -1 +[ 0.007532] Freeing SMP alternatives memory: 24K (ffffffff81e68000 - ffffffff81e6e000) +[ 0.009050] ACPI: Core revision 20131115 +[ 0.016028] ACPI: All ACPI Tables successfully acquired +[ 0.017012] ftrace: allocating 28647 entries in 112 pages +[ 0.026529] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 +[ 0.036750] smpboot: CPU0: Intel(R) Core(TM)2 Duo CPU P8400 @ 2.26GHz (fam: 06, model: 17, stepping: 06) +[ 0.037000] Performance Events: PEBS fmt0+, 4-deep LBR, Core2 events, Intel PMU driver. +[ 0.037000] ... version: 2 +[ 0.037000] ... bit width: 40 +[ 0.037000] ... generic registers: 2 +[ 0.037000] ... value mask: 000000ffffffffff +[ 0.037000] ... max period: 000000007fffffff +[ 0.037000] ... fixed-purpose events: 3 +[ 0.037000] ... event mask: 0000000700000003 +[ 0.045070] x86: Booting SMP configuration: +[ 0.043030] Disabled fast string operations +[ 0.057121] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter. +[ 0.045118] .... node #0, CPUs: #1 +[ 0.057282] x86: Booted up 1 node, 2 CPUs +[ 0.057369] smpboot: Total of 2 processors activated (9043.53 BogoMIPS) +[ 0.058135] devtmpfs: initialized +[ 0.066825] EVM: security.selinux +[ 0.066871] EVM: security.SMACK64 +[ 0.066916] EVM: security.ima +[ 0.066960] EVM: security.capability +[ 0.067031] PM: Registering ACPI NVS region [mem 0xbc8c7000-0xbc8d1fff] (45056 bytes) +[ 0.067093] PM: Registering ACPI NVS region [mem 0xbc8d9000-0xbc8dcfff] (16384 bytes) +[ 0.067154] PM: Registering ACPI NVS region [mem 0xbc8e0000-0xbc906fff] (159744 bytes) +[ 0.067216] PM: Registering ACPI NVS region [mem 0xbcb0f000-0xbcb9efff] (589824 bytes) +[ 0.068312] pinctrl core: initialized pinctrl subsystem +[ 0.068442] regulator-dummy: no parameters +[ 0.068524] RTC time: 18:49:50, date: 03/17/15 +[ 0.068613] NET: Registered protocol family 16 +[ 0.068793] cpuidle: using governor ladder +[ 0.068840] cpuidle: using governor menu +[ 0.068936] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it +[ 0.068997] ACPI: bus type PCI registered +[ 0.069006] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 +[ 0.069120] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xe0000000-0xe3ffffff] (base 0xe0000000) +[ 0.069184] PCI: MMCONFIG at [mem 0xe0000000-0xe3ffffff] reserved in E820 +[ 0.077236] PCI: Using configuration type 1 for base access +[ 0.078230] bio: create slab <bio-0> at 0 +[ 0.078230] ACPI: Added _OSI(Module Device) +[ 0.078230] ACPI: Added _OSI(Processor Device) +[ 0.078230] ACPI: Added _OSI(3.0 _SCP Extensions) +[ 0.078230] ACPI: Added _OSI(Processor Aggregator Device) +[ 0.078275] ACPI: Added _OSI(Linux) +[ 0.080439] ACPI : EC: EC description table is found, configuring boot EC +[ 0.085553] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query honored via DMI +[ 0.094201] ACPI: SSDT 00000000bc8d7c20 0002C8 (v01 PmRef Cpu0Ist 00003000 INTL 20050624) +[ 0.094729] ACPI: Dynamic OEM Table Load: +[ 0.094837] ACPI: SSDT (null) 0002C8 (v01 PmRef Cpu0Ist 00003000 INTL 20050624) +[ 0.095093] ACPI: SSDT 00000000bc8d5020 00087A (v01 PmRef Cpu0Cst 00003001 INTL 20050624) +[ 0.095644] ACPI: Dynamic OEM Table Load: +[ 0.095752] ACPI: SSDT (null) 00087A (v01 PmRef Cpu0Cst 00003001 INTL 20050624) +[ 0.099211] ACPI: SSDT 00000000bc8d6ca0 0001CF (v01 PmRef ApIst 00003000 INTL 20050624) +[ 0.100105] ACPI: Dynamic OEM Table Load: +[ 0.100213] ACPI: SSDT (null) 0001CF (v01 PmRef ApIst 00003000 INTL 20050624) +[ 0.102068] ACPI: SSDT 00000000bc8d6f20 00008D (v01 PmRef ApCst 00003000 INTL 20050624) +[ 0.102595] ACPI: Dynamic OEM Table Load: +[ 0.103046] ACPI: SSDT (null) 00008D (v01 PmRef ApCst 00003000 INTL 20050624) +[ 0.105134] ACPI: Interpreter enabled +[ 0.105185] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20131115/hwxface-580) +[ 0.105311] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20131115/hwxface-580) +[ 0.105447] ACPI: (supports S0 S3 S4 S5) +[ 0.105493] ACPI: Using IOAPIC for interrupt routing +[ 0.105564] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug +[ 0.106533] ACPI: ACPI Dock Station Driver: 3 docks/bays found +[ 0.116113] ACPI: Power Resource [PUBS] (on) +[ 0.121139] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.121590] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.122046] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.122494] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.122941] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.123386] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.123832] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.124293] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.124700] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff]) +[ 0.124754] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] +[ 0.125219] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability] +[ 0.125311] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge +[ 0.125558] PCI host bridge to bus 0000:00 +[ 0.125606] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.125655] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7] +[ 0.125705] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff] +[ 0.125754] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff] +[ 0.125804] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff] +[ 0.125855] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff] +[ 0.125905] pci_bus 0000:00: root bus resource [mem 0xbf000000-0xfebfffff] +[ 0.125962] pci 0000:00:00.0: [8086:2a40] type 00 class 0x060000 +[ 0.125982] DMAR: Forcing write-buffer flush capability +[ 0.126005] DMAR: Disabling IOMMU for graphics on this chipset +[ 0.126128] pci 0000:00:02.0: [8086:2a42] type 00 class 0x030000 +[ 0.126141] pci 0000:00:02.0: reg 0x10: [mem 0xf4400000-0xf47fffff 64bit] +[ 0.126148] pci 0000:00:02.0: reg 0x18: [mem 0xd0000000-0xdfffffff 64bit pref] +[ 0.126154] pci 0000:00:02.0: reg 0x20: [io 0x1800-0x1807] +[ 0.126239] pci 0000:00:02.1: [8086:2a43] type 00 class 0x038000 +[ 0.126250] pci 0000:00:02.1: reg 0x10: [mem 0xf4200000-0xf42fffff 64bit] +[ 0.126347] pci 0000:00:03.0: [8086:2a44] type 00 class 0x078000 +[ 0.126363] pci 0000:00:03.0: reg 0x10: [mem 0xfc226800-0xfc22680f 64bit] +[ 0.126414] pci 0000:00:03.0: PME# supported from D0 D3hot D3cold +[ 0.126483] pci 0000:00:03.2: [8086:2a46] type 00 class 0x010185 +[ 0.126497] pci 0000:00:03.2: reg 0x10: [io 0x1828-0x182f] +[ 0.126504] pci 0000:00:03.2: reg 0x14: [io 0x180c-0x180f] +[ 0.126511] pci 0000:00:03.2: reg 0x18: [io 0x1820-0x1827] +[ 0.126518] pci 0000:00:03.2: reg 0x1c: [io 0x1808-0x180b] +[ 0.126524] pci 0000:00:03.2: reg 0x20: [io 0x1810-0x181f] +[ 0.126622] pci 0000:00:03.3: [8086:2a47] type 00 class 0x070002 +[ 0.126636] pci 0000:00:03.3: reg 0x10: [io 0x1830-0x1837] +[ 0.126643] pci 0000:00:03.3: reg 0x14: [mem 0xfc024000-0xfc024fff] +[ 0.126800] pci 0000:00:19.0: [8086:10f5] type 00 class 0x020000 +[ 0.126825] pci 0000:00:19.0: reg 0x10: [mem 0xfc000000-0xfc01ffff] +[ 0.126837] pci 0000:00:19.0: reg 0x14: [mem 0xfc025000-0xfc025fff] +[ 0.126848] pci 0000:00:19.0: reg 0x18: [io 0x1840-0x185f] +[ 0.126939] pci 0000:00:19.0: PME# supported from D0 D3hot D3cold +[ 0.127029] pci 0000:00:19.0: System wakeup disabled by ACPI +[ 0.127114] pci 0000:00:1a.0: [8086:2937] type 00 class 0x0c0300 +[ 0.127171] pci 0000:00:1a.0: reg 0x20: [io 0x1860-0x187f] +[ 0.127276] pci 0000:00:1a.0: System wakeup disabled by ACPI +[ 0.127361] pci 0000:00:1a.1: [8086:2938] type 00 class 0x0c0300 +[ 0.127418] pci 0000:00:1a.1: reg 0x20: [io 0x1880-0x189f] +[ 0.127537] pci 0000:00:1a.2: [8086:2939] type 00 class 0x0c0300 +[ 0.127594] pci 0000:00:1a.2: reg 0x20: [io 0x18a0-0x18bf] +[ 0.127696] pci 0000:00:1a.2: System wakeup disabled by ACPI +[ 0.127792] pci 0000:00:1a.7: [8086:293c] type 00 class 0x0c0320 +[ 0.127818] pci 0000:00:1a.7: reg 0x10: [mem 0xfc226c00-0xfc226fff] +[ 0.127930] pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold +[ 0.127981] pci 0000:00:1a.7: System wakeup disabled by ACPI +[ 0.128048] pci 0000:00:1b.0: [8086:293e] type 00 class 0x040300 +[ 0.128069] pci 0000:00:1b.0: reg 0x10: [mem 0xfc020000-0xfc023fff 64bit] +[ 0.128169] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold +[ 0.128224] pci 0000:00:1b.0: System wakeup disabled by ACPI +[ 0.128310] pci 0000:00:1c.0: [8086:2940] type 01 class 0x060400 +[ 0.128414] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold +[ 0.128466] pci 0000:00:1c.0: System wakeup disabled by ACPI +[ 0.128551] pci 0000:00:1c.1: [8086:2942] type 01 class 0x060400 +[ 0.128655] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold +[ 0.128706] pci 0000:00:1c.1: System wakeup disabled by ACPI +[ 0.128794] pci 0000:00:1c.3: [8086:2946] type 01 class 0x060400 +[ 0.128898] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold +[ 0.128950] pci 0000:00:1c.3: System wakeup disabled by ACPI +[ 0.129044] pci 0000:00:1c.4: [8086:2948] type 01 class 0x060400 +[ 0.129148] pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold +[ 0.129202] pci 0000:00:1c.4: System wakeup disabled by ACPI +[ 0.129292] pci 0000:00:1d.0: [8086:2934] type 00 class 0x0c0300 +[ 0.129350] pci 0000:00:1d.0: reg 0x20: [io 0x18c0-0x18df] +[ 0.129453] pci 0000:00:1d.0: System wakeup disabled by ACPI +[ 0.129538] pci 0000:00:1d.1: [8086:2935] type 00 class 0x0c0300 +[ 0.129596] pci 0000:00:1d.1: reg 0x20: [io 0x18e0-0x18ff] +[ 0.129715] pci 0000:00:1d.2: [8086:2936] type 00 class 0x0c0300 +[ 0.129772] pci 0000:00:1d.2: reg 0x20: [io 0x1c00-0x1c1f] +[ 0.129902] pci 0000:00:1d.7: [8086:293a] type 00 class 0x0c0320 +[ 0.129928] pci 0000:00:1d.7: reg 0x10: [mem 0xfc227000-0xfc2273ff] +[ 0.130077] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold +[ 0.130126] pci 0000:00:1d.7: System wakeup disabled by ACPI +[ 0.130211] pci 0000:00:1e.0: [8086:2448] type 01 class 0x060401 +[ 0.130321] pci 0000:00:1e.0: System wakeup disabled by ACPI +[ 0.130413] pci 0000:00:1f.0: [8086:2917] type 00 class 0x060100 +[ 0.130633] pci 0000:00:1f.2: [8086:2929] type 00 class 0x010601 +[ 0.130660] pci 0000:00:1f.2: reg 0x10: [io 0x1c48-0x1c4f] +[ 0.130672] pci 0000:00:1f.2: reg 0x14: [io 0x183c-0x183f] +[ 0.130683] pci 0000:00:1f.2: reg 0x18: [io 0x1c40-0x1c47] +[ 0.130694] pci 0000:00:1f.2: reg 0x1c: [io 0x1838-0x183b] +[ 0.130705] pci 0000:00:1f.2: reg 0x20: [io 0x1c20-0x1c3f] +[ 0.130717] pci 0000:00:1f.2: reg 0x24: [mem 0xfc226000-0xfc2267ff] +[ 0.130788] pci 0000:00:1f.2: PME# supported from D3hot +[ 0.130868] pci 0000:00:1f.3: [8086:2930] type 00 class 0x0c0500 +[ 0.130889] pci 0000:00:1f.3: reg 0x10: [mem 0xfc227400-0xfc2274ff 64bit] +[ 0.130919] pci 0000:00:1f.3: reg 0x20: [io 0x1c60-0x1c7f] +[ 0.131080] pci 0000:00:1c.0: PCI bridge to [bus 02] +[ 0.131240] pci 0000:03:00.0: [8086:4237] type 00 class 0x028000 +[ 0.131281] pci 0000:03:00.0: reg 0x10: [mem 0xf4300000-0xf4301fff 64bit] +[ 0.131478] pci 0000:03:00.0: PME# supported from D0 D3hot D3cold +[ 0.133022] pci 0000:00:1c.1: PCI bridge to [bus 03] +[ 0.133077] pci 0000:00:1c.1: bridge window [mem 0xf4300000-0xf43fffff] +[ 0.133160] pci 0000:00:1c.3: PCI bridge to [bus 05-0c] +[ 0.133212] pci 0000:00:1c.3: bridge window [io 0x2000-0x2fff] +[ 0.133217] pci 0000:00:1c.3: bridge window [mem 0xf8000000-0xf9ffffff] +[ 0.133224] pci 0000:00:1c.3: bridge window [mem 0xf4000000-0xf40fffff 64bit pref] +[ 0.133300] pci 0000:00:1c.4: PCI bridge to [bus 0d-14] +[ 0.133300] pci 0000:00:1c.4: bridge window [io 0x3000-0x3fff] +[ 0.133300] pci 0000:00:1c.4: bridge window [mem 0xfa000000-0xfbffffff] +[ 0.133300] pci 0000:00:1c.4: bridge window [mem 0xf4100000-0xf41fffff 64bit pref] +[ 0.133300] pci 0000:15:00.0: [1180:0476] type 02 class 0x060700 +[ 0.133300] pci 0000:15:00.0: reg 0x10: [mem 0xf4800000-0xf4800fff] +[ 0.133300] pci 0000:15:00.0: supports D1 D2 +[ 0.133300] pci 0000:15:00.0: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.133300] pci 0000:15:00.1: [1180:0832] type 00 class 0x0c0010 +[ 0.133300] pci 0000:15:00.1: reg 0x10: [mem 0xf4801000-0xf48017ff] +[ 0.133370] pci 0000:15:00.1: supports D1 D2 +[ 0.133372] pci 0000:15:00.1: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.133486] pci 0000:00:1e.0: PCI bridge to [bus 15-18] (subtractive decode) +[ 0.133540] pci 0000:00:1e.0: bridge window [io 0x4000-0x7fff] +[ 0.133544] pci 0000:00:1e.0: bridge window [mem 0xf4800000-0xf7ffffff] +[ 0.133552] pci 0000:00:1e.0: bridge window [mem 0xf0000000-0xf3ffffff 64bit pref] +[ 0.133554] pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode) +[ 0.133556] pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode) +[ 0.133558] pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode) +[ 0.133560] pci 0000:00:1e.0: bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode) +[ 0.133562] pci 0000:00:1e.0: bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode) +[ 0.133564] pci 0000:00:1e.0: bridge window [mem 0xbf000000-0xfebfffff] (subtractive decode) +[ 0.133617] pci_bus 0000:16: busn_res: can not insert [bus 16-ff] under [bus 15-18] (conflicts with (null) [bus 15-18]) +[ 0.133622] pci_bus 0000:16: busn_res: [bus 16-ff] end is updated to 17 +[ 0.133662] acpi PNP0A08:00: Disabling ASPM (FADT indicates it is unsupported) +[ 0.135513] ACPI: Enabled 3 GPEs in block 00 to 3F +[ 0.136014] ACPI: \_SB_.PCI0: notify handler is installed +[ 0.136055] Found 1 acpi root devices +[ 0.136128] ACPI : EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62 +[ 0.136258] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none +[ 0.136258] vgaarb: loaded +[ 0.136258] vgaarb: bridge control possible 0000:00:02.0 +[ 0.136373] SCSI subsystem initialized +[ 0.136451] libata version 3.00 loaded. +[ 0.136451] ACPI: bus type USB registered +[ 0.136451] usbcore: registered new interface driver usbfs +[ 0.136451] usbcore: registered new interface driver hub +[ 0.136451] usbcore: registered new device driver usb +[ 0.137057] PCI: Using ACPI for IRQ routing +[ 0.139507] PCI: pci_cache_line_size set to 64 bytes +[ 0.139595] e820: reserve RAM buffer [mem 0x0009ec00-0x0009ffff] +[ 0.139597] e820: reserve RAM buffer [mem 0xbc6a1000-0xbfffffff] +[ 0.139599] e820: reserve RAM buffer [mem 0xbc7b7000-0xbfffffff] +[ 0.139602] e820: reserve RAM buffer [mem 0xbc8c7000-0xbfffffff] +[ 0.139604] e820: reserve RAM buffer [mem 0xbcc00000-0xbfffffff] +[ 0.139695] NetLabel: Initializing +[ 0.139741] NetLabel: domain hash size = 128 +[ 0.139787] NetLabel: protocols = UNLABELED CIPSOv4 +[ 0.139845] NetLabel: unlabeled traffic allowed by default +[ 0.139909] HPET: 4 timers in total, 0 timers will be used for per-cpu timer +[ 0.140009] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0 +[ 0.140210] hpet0: 4 comparators, 64-bit 14.318180 MHz counter +[ 0.142035] Switched to clocksource hpet +[ 0.148707] AppArmor: AppArmor Filesystem Enabled +[ 0.148799] pnp: PnP ACPI init +[ 0.148860] ACPI: bus type PNP registered +[ 0.169274] system 00:00: [mem 0x00000000-0x0009ffff] could not be reserved +[ 0.169326] system 00:00: [mem 0x000c0000-0x000c3fff] could not be reserved +[ 0.169377] system 00:00: [mem 0x000c4000-0x000c7fff] could not be reserved +[ 0.169428] system 00:00: [mem 0x000c8000-0x000cbfff] has been reserved +[ 0.169478] system 00:00: [mem 0x000cc000-0x000cffff] has been reserved +[ 0.169529] system 00:00: [mem 0x000d0000-0x000d3fff] could not be reserved +[ 0.169580] system 00:00: [mem 0x000dc000-0x000dffff] could not be reserved +[ 0.169630] system 00:00: [mem 0x000e0000-0x000e3fff] could not be reserved +[ 0.169681] system 00:00: [mem 0x000e4000-0x000e7fff] could not be reserved +[ 0.169732] system 00:00: [mem 0x000e8000-0x000ebfff] could not be reserved +[ 0.169782] system 00:00: [mem 0x000ec000-0x000effff] could not be reserved +[ 0.169833] system 00:00: [mem 0x000f0000-0x000fffff] could not be reserved +[ 0.169884] system 00:00: [mem 0x00100000-0xbeffffff] could not be reserved +[ 0.169935] system 00:00: [mem 0xfec00000-0xfed3ffff] could not be reserved +[ 0.169986] system 00:00: [mem 0xfed4c000-0xffffffff] could not be reserved +[ 0.170051] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active) +[ 0.190033] system 00:01: [io 0x164e-0x164f] has been reserved +[ 0.190084] system 00:01: [io 0x1000-0x107f] could not be reserved +[ 0.190134] system 00:01: [io 0x1180-0x11ff] has been reserved +[ 0.190184] system 00:01: [io 0x0800-0x080f] has been reserved +[ 0.190234] system 00:01: [io 0x15e0-0x15ef] has been reserved +[ 0.190283] system 00:01: [io 0x1600-0x1641] has been reserved +[ 0.190332] system 00:01: [io 0x1600-0x161b] has been reserved +[ 0.190382] system 00:01: [mem 0xe0000000-0xefffffff] has been reserved +[ 0.190433] system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved +[ 0.191031] system 00:01: [mem 0xfed10000-0xfed13fff] has been reserved +[ 0.191082] system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved +[ 0.191132] system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved +[ 0.191183] system 00:01: [mem 0xfed45000-0xfed4bfff] has been reserved +[ 0.191234] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active) +[ 0.191289] pnp 00:02: Plug and Play ACPI device, IDs PNP0103 (active) +[ 0.191299] pnp 00:03: [dma 4] +[ 0.191320] pnp 00:03: Plug and Play ACPI device, IDs PNP0200 (active) +[ 0.191345] pnp 00:04: Plug and Play ACPI device, IDs PNP0800 (active) +[ 0.191385] pnp 00:05: Plug and Play ACPI device, IDs PNP0c04 (active) +[ 0.191415] pnp 00:06: Plug and Play ACPI device, IDs PNP0b00 (active) +[ 0.191447] pnp 00:07: Plug and Play ACPI device, IDs PNP0303 (active) +[ 0.191477] pnp 00:08: Plug and Play ACPI device, IDs IBM0057 PNP0f13 (active) +[ 0.211407] pnp 00:09: Plug and Play ACPI device, IDs PNP0c31 (active) +[ 0.211859] pnp: PnP ACPI: found 10 devices +[ 0.211906] ACPI: bus type PNP unregistered +[ 0.218816] pci 0000:00:1c.0: bridge window [io 0x1000-0x0fff] to [bus 02] add_size 1000 +[ 0.218820] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 02] add_size 200000 +[ 0.218823] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 02] add_size 200000 +[ 0.218834] pci 0000:00:1c.1: bridge window [io 0x1000-0x0fff] to [bus 03] add_size 1000 +[ 0.218839] pci 0000:00:1c.1: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 03] add_size 200000 +[ 0.218880] pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x000fffff] get_res_add_size add_size 200000 +[ 0.218882] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 +[ 0.218884] pci 0000:00:1c.1: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 +[ 0.218887] pci 0000:00:1c.0: res[13]=[io 0x1000-0x0fff] get_res_add_size add_size 1000 +[ 0.218889] pci 0000:00:1c.1: res[13]=[io 0x1000-0x0fff] get_res_add_size add_size 1000 +[ 0.218894] pci 0000:00:1c.0: BAR 14: assigned [mem 0xbf000000-0xbf1fffff] +[ 0.218946] pci 0000:00:1c.0: BAR 15: assigned [mem 0xbf200000-0xbf3fffff 64bit pref] +[ 0.219019] pci 0000:00:1c.1: BAR 15: assigned [mem 0xbf400000-0xbf5fffff 64bit pref] +[ 0.219082] pci 0000:00:1c.0: BAR 13: assigned [io 0x8000-0x8fff] +[ 0.219133] pci 0000:00:1c.1: BAR 13: assigned [io 0x9000-0x9fff] +[ 0.219184] pci 0000:00:1c.0: PCI bridge to [bus 02] +[ 0.219234] pci 0000:00:1c.0: bridge window [io 0x8000-0x8fff] +[ 0.219287] pci 0000:00:1c.0: bridge window [mem 0xbf000000-0xbf1fffff] +[ 0.219340] pci 0000:00:1c.0: bridge window [mem 0xbf200000-0xbf3fffff 64bit pref] +[ 0.219407] pci 0000:00:1c.1: PCI bridge to [bus 03] +[ 0.219456] pci 0000:00:1c.1: bridge window [io 0x9000-0x9fff] +[ 0.219509] pci 0000:00:1c.1: bridge window [mem 0xf4300000-0xf43fffff] +[ 0.219562] pci 0000:00:1c.1: bridge window [mem 0xbf400000-0xbf5fffff 64bit pref] +[ 0.219629] pci 0000:00:1c.3: PCI bridge to [bus 05-0c] +[ 0.219678] pci 0000:00:1c.3: bridge window [io 0x2000-0x2fff] +[ 0.219731] pci 0000:00:1c.3: bridge window [mem 0xf8000000-0xf9ffffff] +[ 0.219784] pci 0000:00:1c.3: bridge window [mem 0xf4000000-0xf40fffff 64bit pref] +[ 0.219850] pci 0000:00:1c.4: PCI bridge to [bus 0d-14] +[ 0.219900] pci 0000:00:1c.4: bridge window [io 0x3000-0x3fff] +[ 0.219953] pci 0000:00:1c.4: bridge window [mem 0xfa000000-0xfbffffff] +[ 0.220016] pci 0000:00:1c.4: bridge window [mem 0xf4100000-0xf41fffff 64bit pref] +[ 0.220084] pci 0000:15:00.0: res[15]=[mem 0x04000000-0x03ffffff pref] get_res_add_size add_size 4000000 +[ 0.220087] pci 0000:15:00.0: res[16]=[mem 0x04000000-0x03ffffff] get_res_add_size add_size 4000000 +[ 0.220089] pci 0000:15:00.0: res[13]=[io 0x0100-0x00ff] get_res_add_size add_size 100 +[ 0.220091] pci 0000:15:00.0: res[14]=[io 0x0100-0x00ff] get_res_add_size add_size 100 +[ 0.220094] pci 0000:15:00.0: BAR 15: assigned [mem 0xf0000000-0xf3ffffff pref] +[ 0.220156] pci 0000:15:00.0: BAR 16: assigned [mem 0xc0000000-0xc3ffffff] +[ 0.220206] pci 0000:15:00.0: BAR 13: assigned [io 0x4000-0x40ff] +[ 0.220256] pci 0000:15:00.0: BAR 14: assigned [io 0x4400-0x44ff] +[ 0.220306] pci 0000:15:00.0: CardBus bridge to [bus 16-17] +[ 0.220354] pci 0000:15:00.0: bridge window [io 0x4000-0x40ff] +[ 0.220407] pci 0000:15:00.0: bridge window [io 0x4400-0x44ff] +[ 0.220460] pci 0000:15:00.0: bridge window [mem 0xf0000000-0xf3ffffff pref] +[ 0.220524] pci 0000:15:00.0: bridge window [mem 0xc0000000-0xc3ffffff] +[ 0.220577] pci 0000:00:1e.0: PCI bridge to [bus 15-18] +[ 0.220627] pci 0000:00:1e.0: bridge window [io 0x4000-0x7fff] +[ 0.220680] pci 0000:00:1e.0: bridge window [mem 0xf4800000-0xf7ffffff] +[ 0.220733] pci 0000:00:1e.0: bridge window [mem 0xf0000000-0xf3ffffff 64bit pref] +[ 0.220800] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7] +[ 0.220802] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff] +[ 0.220804] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.220806] pci_bus 0000:00: resource 7 [mem 0x000d4000-0x000d7fff] +[ 0.220808] pci_bus 0000:00: resource 8 [mem 0x000d8000-0x000dbfff] +[ 0.220810] pci_bus 0000:00: resource 9 [mem 0xbf000000-0xfebfffff] +[ 0.220812] pci_bus 0000:02: resource 0 [io 0x8000-0x8fff] +[ 0.220814] pci_bus 0000:02: resource 1 [mem 0xbf000000-0xbf1fffff] +[ 0.220816] pci_bus 0000:02: resource 2 [mem 0xbf200000-0xbf3fffff 64bit pref] +[ 0.220819] pci_bus 0000:03: resource 0 [io 0x9000-0x9fff] +[ 0.220821] pci_bus 0000:03: resource 1 [mem 0xf4300000-0xf43fffff] +[ 0.220823] pci_bus 0000:03: resource 2 [mem 0xbf400000-0xbf5fffff 64bit pref] +[ 0.220825] pci_bus 0000:05: resource 0 [io 0x2000-0x2fff] +[ 0.220827] pci_bus 0000:05: resource 1 [mem 0xf8000000-0xf9ffffff] +[ 0.220829] pci_bus 0000:05: resource 2 [mem 0xf4000000-0xf40fffff 64bit pref] +[ 0.220831] pci_bus 0000:0d: resource 0 [io 0x3000-0x3fff] +[ 0.220833] pci_bus 0000:0d: resource 1 [mem 0xfa000000-0xfbffffff] +[ 0.220835] pci_bus 0000:0d: resource 2 [mem 0xf4100000-0xf41fffff 64bit pref] +[ 0.220837] pci_bus 0000:15: resource 0 [io 0x4000-0x7fff] +[ 0.220839] pci_bus 0000:15: resource 1 [mem 0xf4800000-0xf7ffffff] +[ 0.220841] pci_bus 0000:15: resource 2 [mem 0xf0000000-0xf3ffffff 64bit pref] +[ 0.220843] pci_bus 0000:15: resource 4 [io 0x0000-0x0cf7] +[ 0.220845] pci_bus 0000:15: resource 5 [io 0x0d00-0xffff] +[ 0.220847] pci_bus 0000:15: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.220849] pci_bus 0000:15: resource 7 [mem 0x000d4000-0x000d7fff] +[ 0.220851] pci_bus 0000:15: resource 8 [mem 0x000d8000-0x000dbfff] +[ 0.220853] pci_bus 0000:15: resource 9 [mem 0xbf000000-0xfebfffff] +[ 0.220855] pci_bus 0000:16: resource 0 [io 0x4000-0x40ff] +[ 0.220857] pci_bus 0000:16: resource 1 [io 0x4400-0x44ff] +[ 0.220859] pci_bus 0000:16: resource 2 [mem 0xf0000000-0xf3ffffff pref] +[ 0.220861] pci_bus 0000:16: resource 3 [mem 0xc0000000-0xc3ffffff] +[ 0.220895] NET: Registered protocol family 2 +[ 0.221177] TCP established hash table entries: 32768 (order: 6, 262144 bytes) +[ 0.221389] TCP bind hash table entries: 32768 (order: 7, 524288 bytes) +[ 0.221653] TCP: Hash tables configured (established 32768 bind 32768) +[ 0.221760] TCP: reno registered +[ 0.221813] UDP hash table entries: 2048 (order: 4, 65536 bytes) +[ 0.221896] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes) +[ 0.222044] NET: Registered protocol family 1 +[ 0.222105] pci 0000:00:02.0: Boot video device +[ 0.223124] PCI: CLS 64 bytes, default 64 +[ 0.223191] Trying to unpack rootfs image as initramfs... +[ 0.697471] Freeing initrd memory: 22980K (ffff88003530e000 - ffff88003697f000) +[ 0.697602] Simple Boot Flag at 0x35 set to 0x1 +[ 0.697804] microcode: CPU0 sig=0x10676, pf=0x80, revision=0x60c +[ 0.697859] microcode: CPU1 sig=0x10676, pf=0x80, revision=0x60c +[ 0.698022] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba +[ 0.698085] Scanning for low memory corruption every 60 seconds +[ 0.698408] Initialise system trusted keyring +[ 0.698509] audit: initializing netlink socket (disabled) +[ 0.698572] type=2000 audit(1426618190.697:1): initialized +[ 0.722387] HugeTLB registered 2 MB page size, pre-allocated 0 pages +[ 0.723752] zbud: loaded +[ 0.723943] VFS: Disk quotas dquot_6.5.2 +[ 0.724046] Dquot-cache hash table entries: 512 (order 0, 4096 bytes) +[ 0.724601] fuse init (API version 7.22) +[ 0.724734] msgmni has been set to 5902 +[ 0.724842] Key type big_key registered +[ 0.725412] Key type asymmetric registered +[ 0.725461] Asymmetric key parser 'x509' registered +[ 0.725541] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) +[ 0.725640] io scheduler noop registered +[ 0.725689] io scheduler deadline registered +[ 0.725763] io scheduler cfq registered +[ 0.725812] io scheduler bfq registered (default) +[ 0.725859] BFQ I/O-scheduler version: v7r5 +[ 0.726126] pcieport 0000:00:1c.0: irq 40 for MSI/MSI-X +[ 0.726343] pcieport 0000:00:1c.1: irq 41 for MSI/MSI-X +[ 0.726516] pcieport 0000:00:1c.3: irq 42 for MSI/MSI-X +[ 0.726692] pcieport 0000:00:1c.4: irq 43 for MSI/MSI-X +[ 0.726843] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt +[ 0.726898] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded +[ 0.726954] pcieport 0000:00:1c.1: Signaling PME through PCIe PME interrupt +[ 0.727017] pci 0000:03:00.0: Signaling PME through PCIe PME interrupt +[ 0.727071] pcie_pme 0000:00:1c.1:pcie01: service driver pcie_pme loaded +[ 0.727130] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt +[ 0.727186] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded +[ 0.727249] pcieport 0000:00:1c.4: Signaling PME through PCIe PME interrupt +[ 0.727303] pcie_pme 0000:00:1c.4:pcie01: service driver pcie_pme loaded +[ 0.727318] pci_hotplug: PCI Hot Plug PCI Core version: 0.5 +[ 0.727424] pciehp 0000:00:1c.0:pcie04: HPC vendor_id 8086 device_id 2940 ss_vid 17aa ss_did 20f3 +[ 0.727553] pciehp 0000:00:1c.0:pcie04: service driver pciehp loaded +[ 0.727568] pciehp 0000:00:1c.1:pcie04: HPC vendor_id 8086 device_id 2942 ss_vid 17aa ss_did 20f3 +[ 0.727697] pciehp 0000:00:1c.1:pcie04: service driver pciehp loaded +[ 0.727712] pciehp 0000:00:1c.3:pcie04: HPC vendor_id 8086 device_id 2946 ss_vid 17aa ss_did 20f3 +[ 0.727840] pciehp 0000:00:1c.3:pcie04: service driver pciehp loaded +[ 0.727857] pciehp 0000:00:1c.4:pcie04: HPC vendor_id 8086 device_id 2948 ss_vid 17aa ss_did 20f3 +[ 0.727983] pciehp 0000:00:1c.4:pcie04: service driver pciehp loaded +[ 0.727992] pciehp: PCI Express Hot Plug Controller Driver version: 0.4 +[ 0.728102] intel_idle: does not run on family 6 model 23 +[ 0.728108] ipmi message handler version 39.2 +[ 0.728317] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.728552] ACPI: AC Adapter [AC] (on-line) +[ 0.728689] input: Lid Switch as /devices/LNXSYSTM:00/device:00/PNP0C0D:00/input/input0 +[ 0.729044] ACPI: Lid Switch [LID] +[ 0.729128] input: Sleep Button as /devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1 +[ 0.729192] ACPI: Sleep Button [SLPB] +[ 0.729278] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 +[ 0.729340] ACPI: Power Button [PWRF] +[ 0.730844] Monitor-Mwait will be used to enter C-1 state +[ 0.730850] Monitor-Mwait will be used to enter C-2 state +[ 0.730854] Monitor-Mwait will be used to enter C-3 state +[ 0.730857] tsc: Marking TSC unstable due to TSC halts in idle +[ 0.730914] ACPI: acpi_idle registered with cpuidle +[ 0.733365] thermal LNXTHERM:00: registered as thermal_zone0 +[ 0.733418] ACPI: Thermal Zone [THM0] (41 C) +[ 0.734886] thermal LNXTHERM:01: registered as thermal_zone1 +[ 0.734941] ACPI: Thermal Zone [THM1] (43 C) +[ 0.735032] GHES: HEST is not enabled! +[ 0.735212] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.735285] ACPI: Battery Slot [BAT0] (battery absent) +[ 0.735365] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled +[ 0.757657] 0000:00:03.3: ttyS4 at I/O 0x1830 (irq = 17, base_baud = 115200) is a 16550A +[ 0.758028] Linux agpgart interface v0.103 +[ 0.758161] agpgart-intel 0000:00:00.0: Intel GM45 Chipset +[ 0.758296] agpgart-intel 0000:00:00.0: detected gtt size: 2097152K total, 262144K mappable +[ 0.759478] agpgart-intel 0000:00:00.0: detected 32768K stolen memory +[ 0.759697] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000 +[ 0.765051] tpm_tis 00:09: 1.2 TPM (device-id 0x1020, rev-id 6) +[ 0.765104] tpm_tis 00:09: Intel iTPM workaround enabled +[ 0.837123] tpm_tis 00:09: TPM is disabled/deactivated (0x6) +[ 0.838867] brd: module loaded +[ 0.839781] loop: module loaded +[ 0.840412] scsi0 : ata_generic +[ 0.840576] scsi1 : ata_generic +[ 0.840672] ata1: PATA max UDMA/100 cmd 0x1828 ctl 0x180c bmdma 0x1810 irq 18 +[ 0.840722] ata2: PATA max UDMA/100 cmd 0x1820 ctl 0x1808 bmdma 0x1818 irq 18 +[ 0.841130] libphy: Fixed MDIO Bus: probed +[ 0.841267] tun: Universal TUN/TAP device driver, 1.6 +[ 0.841315] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> +[ 0.841432] PPP generic driver version 2.4.2 +[ 0.841561] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver +[ 0.841614] ehci-pci: EHCI PCI platform driver +[ 0.841763] ehci-pci 0000:00:1a.7: EHCI Host Controller +[ 0.841816] ehci-pci 0000:00:1a.7: new USB bus registered, assigned bus number 1 +[ 0.841890] ehci-pci 0000:00:1a.7: debug port 1 +[ 0.845829] ehci-pci 0000:00:1a.7: cache line size of 64 is not supported +[ 0.845911] ehci-pci 0000:00:1a.7: irq 23, io mem 0xfc226c00 +[ 0.852066] ehci-pci 0000:00:1a.7: USB 2.0 started, EHCI 1.00 +[ 0.852201] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.852252] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.852312] usb usb1: Product: EHCI Host Controller +[ 0.852360] usb usb1: Manufacturer: Linux 3.13.0-39-lowlatency ehci_hcd +[ 0.852410] usb usb1: SerialNumber: 0000:00:1a.7 +[ 0.852583] hub 1-0:1.0: USB hub found +[ 0.852641] hub 1-0:1.0: 6 ports detected +[ 0.852924] ehci-pci 0000:00:1d.7: EHCI Host Controller +[ 0.852976] ehci-pci 0000:00:1d.7: new USB bus registered, assigned bus number 2 +[ 0.853060] ehci-pci 0000:00:1d.7: debug port 1 +[ 0.857027] ehci-pci 0000:00:1d.7: cache line size of 64 is not supported +[ 0.857110] ehci-pci 0000:00:1d.7: irq 19, io mem 0xfc227000 +[ 0.863125] ehci-pci 0000:00:1d.7: USB 2.0 started, EHCI 1.00 +[ 0.863229] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.863286] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.863347] usb usb2: Product: EHCI Host Controller +[ 0.863394] usb usb2: Manufacturer: Linux 3.13.0-39-lowlatency ehci_hcd +[ 0.863444] usb usb2: SerialNumber: 0000:00:1d.7 +[ 0.863605] hub 2-0:1.0: USB hub found +[ 0.863663] hub 2-0:1.0: 6 ports detected +[ 0.863833] ehci-platform: EHCI generic platform driver +[ 0.863889] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver +[ 0.863938] ohci-pci: OHCI PCI platform driver +[ 0.863993] ohci-platform: OHCI generic platform driver +[ 0.864059] uhci_hcd: USB Universal Host Controller Interface driver +[ 0.864716] uhci_hcd 0000:00:1a.0: UHCI Host Controller +[ 0.864767] uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 3 +[ 0.864931] uhci_hcd 0000:00:1a.0: irq 20, io base 0x00001860 +[ 0.865045] usb usb3: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.865096] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.865156] usb usb3: Product: UHCI Host Controller +[ 0.865204] usb usb3: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.865254] usb usb3: SerialNumber: 0000:00:1a.0 +[ 0.865419] hub 3-0:1.0: USB hub found +[ 0.865473] hub 3-0:1.0: 2 ports detected +[ 0.865668] uhci_hcd 0000:00:1a.1: UHCI Host Controller +[ 0.865720] uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4 +[ 0.865881] uhci_hcd 0000:00:1a.1: irq 21, io base 0x00001880 +[ 0.865991] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.866063] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.866139] usb usb4: Product: UHCI Host Controller +[ 0.866187] usb usb4: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.866243] usb usb4: SerialNumber: 0000:00:1a.1 +[ 0.866408] hub 4-0:1.0: USB hub found +[ 0.866465] hub 4-0:1.0: 2 ports detected +[ 0.866647] uhci_hcd 0000:00:1a.2: UHCI Host Controller +[ 0.866699] uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5 +[ 0.866858] uhci_hcd 0000:00:1a.2: irq 22, io base 0x000018a0 +[ 0.866957] usb usb5: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.867019] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.867080] usb usb5: Product: UHCI Host Controller +[ 0.867128] usb usb5: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.867178] usb usb5: SerialNumber: 0000:00:1a.2 +[ 0.867353] hub 5-0:1.0: USB hub found +[ 0.867407] hub 5-0:1.0: 2 ports detected +[ 0.867607] uhci_hcd 0000:00:1d.0: UHCI Host Controller +[ 0.867660] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6 +[ 0.867817] uhci_hcd 0000:00:1d.0: irq 16, io base 0x000018c0 +[ 0.867932] usb usb6: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.867983] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.868061] usb usb6: Product: UHCI Host Controller +[ 0.868109] usb usb6: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.868158] usb usb6: SerialNumber: 0000:00:1d.0 +[ 0.868326] hub 6-0:1.0: USB hub found +[ 0.868383] hub 6-0:1.0: 2 ports detected +[ 0.868573] uhci_hcd 0000:00:1d.1: UHCI Host Controller +[ 0.868625] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7 +[ 0.868782] uhci_hcd 0000:00:1d.1: irq 17, io base 0x000018e0 +[ 0.868877] usb usb7: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.868927] usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.868988] usb usb7: Product: UHCI Host Controller +[ 0.869050] usb usb7: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.869108] usb usb7: SerialNumber: 0000:00:1d.1 +[ 0.869282] hub 7-0:1.0: USB hub found +[ 0.869339] hub 7-0:1.0: 2 ports detected +[ 0.869523] uhci_hcd 0000:00:1d.2: UHCI Host Controller +[ 0.869575] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8 +[ 0.869725] uhci_hcd 0000:00:1d.2: irq 18, io base 0x00001c00 +[ 0.869827] usb usb8: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.869878] usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.869938] usb usb8: Product: UHCI Host Controller +[ 0.869986] usb usb8: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.870048] usb usb8: SerialNumber: 0000:00:1d.2 +[ 0.870207] hub 8-0:1.0: USB hub found +[ 0.870259] hub 8-0:1.0: 2 ports detected +[ 0.870429] i8042: PNP: PS/2 Controller [PNP0303:KBD,PNP0f13:MOU] at 0x60,0x64 irq 1,12 +[ 0.878171] serio: i8042 KBD port at 0x60,0x64 irq 1 +[ 0.878246] serio: i8042 AUX port at 0x60,0x64 irq 12 +[ 0.878429] mousedev: PS/2 mouse device common for all mice +[ 0.878688] rtc_cmos 00:06: RTC can wake from S4 +[ 0.878876] rtc_cmos 00:06: rtc core: registered rtc_cmos as rtc0 +[ 0.878999] rtc_cmos 00:06: alarms up to one month, y3k, 114 bytes nvram, hpet irqs +[ 0.879154] device-mapper: uevent: version 1.0.3 +[ 0.879274] device-mapper: ioctl: 4.27.0-ioctl (2013-10-30) initialised: dm-devel@redhat.com +[ 0.879342] ledtrig-cpu: registered to indicate activity on CPUs +[ 0.879495] TCP: cubic registered +[ 0.879638] NET: Registered protocol family 10 +[ 0.879887] NET: Registered protocol family 17 +[ 0.879946] Key type dns_resolver registered +[ 0.880318] Loading compiled-in X.509 certificates +[ 0.881536] Loaded X.509 cert 'Magrathea: Glacier signing key: a7171335f18ca6131c1947ca87d46fb662317fa6' +[ 0.881611] registered taskstats version 1 +[ 0.883655] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3 +[ 0.884186] Key type trusted registered +[ 0.886362] Key type encrypted registered +[ 0.888541] AppArmor: AppArmor sha1 policy hashing enabled +[ 0.906069] tpm_tis 00:09: A TPM error (6) occurred attempting to read a pcr value +[ 0.906134] IMA: No TPM chip found, activating TPM-bypass! +[ 0.906542] regulator-dummy: disabling +[ 0.906622] Magic number: 7:954:847 +[ 0.906816] rtc_cmos 00:06: setting system clock to 2015-03-17 18:49:51 UTC (1426618191) +[ 0.909146] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found +[ 0.909198] EDD information not available. +[ 0.909325] PM: Hibernation image not present or could not be loaded. +[ 1.164738] Freeing unused kernel memory: 1324K (ffffffff81d1d000 - ffffffff81e68000) +[ 1.164804] Write protecting the kernel read-only data: 12288k +[ 1.168375] Freeing unused kernel memory: 764K (ffff880001741000 - ffff880001800000) +[ 1.171458] Freeing unused kernel memory: 676K (ffff880001b57000 - ffff880001c00000) +[ 1.191531] systemd-udevd[133]: starting version 204 +[ 1.220543] pps_core: LinuxPPS API ver. 1 registered +[ 1.220600] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> +[ 1.225352] PTP clock support registered +[ 1.236203] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k +[ 1.236368] e1000e: Copyright(c) 1999 - 2013 Intel Corporation. +[ 1.236654] e1000e 0000:00:19.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode +[ 1.236749] e1000e 0000:00:19.0: irq 44 for MSI/MSI-X +[ 1.245390] wmi: Mapper loaded +[ 1.246806] [drm] Initialized drm 1.1.0 20060810 +[ 1.353201] firewire_ohci 0000:15:00.1: added OHCI v1.10 device as card 0, 4 IR + 4 IT contexts, quirks 0x11 +[ 1.446329] e1000e 0000:00:19.0 eth0: (PCI Express:2.5GT/s:Width x1) 00:1c:25:9f:c6:0e +[ 1.446396] e1000e 0000:00:19.0 eth0: Intel(R) PRO/1000 Network Connection +[ 1.446475] e1000e 0000:00:19.0 eth0: MAC: 7, PHY: 8, PBA No: 1008FF-0FF +[ 1.446570] ahci 0000:00:1f.2: version 3.0 +[ 1.446766] ahci 0000:00:1f.2: irq 45 for MSI/MSI-X +[ 1.446816] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled +[ 1.446896] ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 4 ports 3 Gbps 0x3 impl SATA mode +[ 1.446962] ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pio slum part ccc sxs +[ 1.448104] scsi2 : ahci +[ 1.448255] scsi3 : ahci +[ 1.448399] scsi4 : ahci +[ 1.448552] scsi5 : ahci +[ 1.448664] ata3: SATA max UDMA/133 abar m2048@0xfc226000 port 0xfc226100 irq 45 +[ 1.448734] ata4: SATA max UDMA/133 abar m2048@0xfc226000 port 0xfc226180 irq 45 +[ 1.448797] ata5: DUMMY +[ 1.448843] ata6: DUMMY +[ 1.449570] [drm] Memory usable by graphics device = 2048M +[ 1.510078] usb 4-2: new full-speed USB device number 2 using uhci_hcd +[ 1.514075] i915 0000:00:02.0: irq 46 for MSI/MSI-X +[ 1.514086] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.514139] [drm] Driver supports precise vblank timestamp query. +[ 1.514341] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem +[ 1.630078] [drm] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5 +[ 1.665898] fbcon: inteldrmfb (fb0) is primary device +[ 1.667027] usb 4-2: New USB device found, idVendor=0a5c, idProduct=2145 +[ 1.667030] usb 4-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0 +[ 1.667032] usb 4-2: Product: ThinkPad Bluetooth with Enhanced Data Rate II +[ 1.667033] usb 4-2: Manufacturer: Lenovo Computer Corp +[ 1.755095] ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300) +[ 1.756251] ata3.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.756253] ata3.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out +[ 1.756362] ata3.00: ACPI cmd ef/5f:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.756364] ata3.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.809909] ata3.00: ATA-8: WDC WD1600BEVS-08VAT1, 13.01A13, max UDMA/133 +[ 1.809911] ata3.00: 312581808 sectors, multi 16: LBA48 NCQ (depth 31/32), AA +[ 1.811456] ata3.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.811459] ata3.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out +[ 1.811639] ata3.00: ACPI cmd ef/5f:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.811642] ata3.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.813118] ata3.00: configured for UDMA/133 +[ 1.813311] scsi 2:0:0:0: Direct-Access ATA WDC WD1600BEVS-0 13.0 PQ: 0 ANSI: 5 +[ 1.813543] sd 2:0:0:0: Attached scsi generic sg0 type 0 +[ 1.813561] sd 2:0:0:0: [sda] 312581808 512-byte logical blocks: (160 GB/149 GiB) +[ 1.813724] sd 2:0:0:0: [sda] Write Protect is off +[ 1.813726] sd 2:0:0:0: [sda] Mode Sense: 00 3a 00 00 +[ 1.813787] sd 2:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA +[ 1.848656] sda: sda1 sda2 < sda5 sda6 > +[ 1.849262] sd 2:0:0:0: [sda] Attached SCSI disk +[ 1.854171] firewire_core 0000:15:00.1: created device fw0: GUID 00016c2000a28887, S400 +[ 2.051419] psmouse serio1: synaptics: Touchpad model: 1, fw: 7.0, id: 0x1c0b1, caps: 0xd04791/0xb00000/0x20000, board id: 71, fw id: 434116 +[ 2.051428] psmouse serio1: synaptics: serio: Synaptics pass-through port at isa0060/serio1/input0 +[ 2.091571] input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio1/input/input5 +[ 2.118180] ata4: SATA link up 1.5 Gbps (SStatus 113 SControl 300) +[ 2.121457] ata4.00: ACPI cmd e3/00:1f:00:00:00:a0 (IDLE) succeeded +[ 2.122567] ata4.00: ACPI cmd e3/00:02:00:00:00:a0 (IDLE) succeeded +[ 2.124134] ata4.00: ATAPI: HL-DT-STCD-RW/DVD DRIVE MU10N, 1.05, max UDMA/33 +[ 2.128528] ata4.00: ACPI cmd e3/00:1f:00:00:00:a0 (IDLE) succeeded +[ 2.129580] ata4.00: ACPI cmd e3/00:02:00:00:00:a0 (IDLE) succeeded +[ 2.131137] ata4.00: configured for UDMA/33 +[ 2.140042] scsi 3:0:0:0: CD-ROM HL-DT-ST RW/DVD MU10N 1.05 PQ: 0 ANSI: 5 +[ 2.145419] sr0: scsi3-mmc drive: 24x/24x writer cd/rw xa/form2 cdda tray +[ 2.145420] cdrom: Uniform CD-ROM driver Revision: 3.20 +[ 2.145549] sr 3:0:0:0: Attached scsi CD-ROM sr0 +[ 2.145741] sr 3:0:0:0: Attached scsi generic sg1 type 5 +[ 2.208787] Console: switching to colour frame buffer device 160x50 +[ 2.227499] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device +[ 2.229383] i915 0000:00:02.0: registered panic notifier +[ 2.234366] ACPI: Video Device [VID] (multi-head: yes rom: no post: no) +[ 2.243759] acpi device:02: registered as cooling_device2 +[ 2.245794] input: Video Bus as /devices/LNXSYSTM:00/device:00/PNP0A08:00/LNXVIDEO:00/input/input7 +[ 2.247868] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0 +[ 2.578407] random: nonblocking pool is initialized +[ 2.822478] md: linear personality registered for level -1 +[ 2.826736] md: multipath personality registered for level -4 +[ 2.831280] md: raid0 personality registered for level 0 +[ 2.836263] md: raid1 personality registered for level 1 +[ 2.858032] raid6: sse2x1 2871 MB/s +[ 2.875030] raid6: sse2x2 3324 MB/s +[ 2.892030] raid6: sse2x4 4656 MB/s +[ 2.892057] raid6: using algorithm sse2x4 (4656 MB/s) +[ 2.892090] raid6: using ssse3x2 recovery algorithm +[ 2.894557] xor: measuring software checksum speed +[ 2.904030] prefetch64-sse: 6452.000 MB/sec +[ 2.914030] generic_sse: 5740.000 MB/sec +[ 2.914061] xor: using function: prefetch64-sse (6452.000 MB/sec) +[ 2.916259] async_tx: api initialized (async) +[ 2.928184] md: raid6 personality registered for level 6 +[ 2.928222] md: raid5 personality registered for level 5 +[ 2.928257] md: raid4 personality registered for level 4 +[ 2.937068] md: raid10 personality registered for level 10 +[ 3.093997] bio: create slab <bio-1> at 1 +[ 3.094936] Btrfs loaded +[ 3.390369] EXT4-fs (sda1): mounted filesystem with ordered data mode. Opts: (null) +[ 5.358449] psmouse serio2: alps: Unknown ALPS touchpad: E7=10 00 64, EC=10 00 64 +[ 5.988517] Adding 4230140k swap on /dev/sda5. Priority:-1 extents:1 across:4230140k FS +[ 6.808061] psmouse serio2: trackpoint: IBM TrackPoint firmware: 0x0e, buttons: 3/3 +[ 7.040928] input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio1/serio2/input/input6 +[ 7.402514] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 7.640430] EXT4-fs (sda1): re-mounted. Opts: errors=remount-ro +[ 7.641692] systemd-udevd[425]: starting version 204 +[ 8.377312] lp: driver loaded but no devices found +[ 8.451574] ppdev: user-space parallel port driver +[ 8.663285] SGI XFS with ACLs, security attributes, realtime, large block/inode numbers, no debug enabled +[ 8.763636] XFS (sda6): Mounting Filesystem +[ 8.987137] XFS (sda6): Ending clean mount +[ 9.764969] cfg80211: Calling CRDA to update world regulatory domain +[ 9.815431] Intel(R) Wireless WiFi driver for Linux, in-tree: +[ 9.815435] Copyright(c) 2003-2013 Intel Corporation +[ 9.815585] iwlwifi 0000:03:00.0: can't disable ASPM; OS doesn't have ASPM control +[ 9.815653] iwlwifi 0000:03:00.0: irq 47 for MSI/MSI-X +[ 9.815784] 0000:03:00.0: Missing Free firmware +[ 9.817262] iwlwifi 0000:03:00.0: Couldn't request the fw +[ 9.818920] iwlwifi: probe of 0000:03:00.0 failed with error -22 +[ 10.041861] pci 0000:03:00.0: Direct firmware load failed with error -2 +[ 10.041867] pci 0000:03:00.0: Falling back to user helper +[ 10.115482] ACPI Warning: 0x0000000000001028-0x000000000000102f SystemIO conflicts with Region \_SB_.PCI0.LPC_.PMIO 1 (20131115/utaddress-251) +[ 10.115492] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 10.115497] ACPI Warning: 0x00000000000011b0-0x00000000000011bf SystemIO conflicts with Region \_SB_.PCI0.LPC_.LPIO 1 (20131115/utaddress-251) +[ 10.115501] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 10.115503] ACPI Warning: 0x0000000000001180-0x00000000000011af SystemIO conflicts with Region \_SB_.PCI0.LPC_.LPIO 1 (20131115/utaddress-251) +[ 10.115508] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 10.115510] lpc_ich: Resource conflict(s) found affecting gpio_ich +[ 10.261508] yenta_cardbus 0000:15:00.0: CardBus bridge found [17aa:20c6] +[ 10.383852] yenta_cardbus 0000:15:00.0: ISA IRQ mask 0x04b8, PCI irq 16 +[ 10.383859] yenta_cardbus 0000:15:00.0: Socket status: 30000006 +[ 10.383867] yenta_cardbus 0000:15:00.0: pcmcia: parent PCI bridge window: [io 0x4000-0x7fff] +[ 10.383870] yenta_cardbus 0000:15:00.0: pcmcia: parent PCI bridge window: [mem 0xf4800000-0xf7ffffff] +[ 10.383874] pcmcia_socket pcmcia_socket0: cs: memory probe 0xf4800000-0xf7ffffff: +[ 10.383879] excluding 0xf4800000-0xf4b7ffff +[ 10.383891] yenta_cardbus 0000:15:00.0: pcmcia: parent PCI bridge window: [mem 0xf0000000-0xf3ffffff 64bit pref] +[ 10.383894] pcmcia_socket pcmcia_socket0: cs: memory probe 0xf0000000-0xf3ffffff: +[ 10.383906] excluding 0xf0000000-0xf3ffffff +[ 10.625496] device-mapper: multipath: version 1.6.0 loaded +[ 10.870142] mei_me 0000:00:03.0: irq 47 for MSI/MSI-X +[ 10.907864] Non-volatile memory driver v1.3 +[ 10.975070] thinkpad_acpi: ThinkPad ACPI Extras v0.25 +[ 10.975074] thinkpad_acpi: http://ibm-acpi.sf.net/ +[ 10.975076] thinkpad_acpi: ThinkPad BIOS 7UET56WW (2.02 ), EC 7VHT12WW-1.01 +[ 10.975078] thinkpad_acpi: Lenovo ThinkPad T400, model 6475GE2 +[ 11.003621] thinkpad_acpi: detected a 16-level brightness capable ThinkPad +[ 11.003835] thinkpad_acpi: radio switch found; radios are enabled +[ 11.003857] thinkpad_acpi: This ThinkPad has standard ACPI backlight brightness control, supported by the ACPI video driver +[ 11.003859] thinkpad_acpi: Disabling thinkpad-acpi brightness events by default... +[ 11.008052] thinkpad_acpi: rfkill switch tpacpi_bluetooth_sw: radio is unblocked +[ 11.014406] thinkpad_acpi: Standard ACPI backlight interface available, not loading native one +[ 11.014610] thinkpad_acpi: Console audio control enabled, mode: monitor (read only) +[ 11.018306] input: ThinkPad Extra Buttons as /devices/platform/thinkpad_acpi/input/input8 +[ 11.199291] kvm: disabled by bios +[ 11.205924] kvm: disabled by bios +[ 12.346341] init: avahi-cups-reload main process (668) terminated with status 1 +[ 12.979286] type=1400 audit(1426618203.572:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/sbin/dhclient" pid=602 comm="apparmor_parser" +[ 12.979296] type=1400 audit(1426618203.572:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=602 comm="apparmor_parser" +[ 12.979303] type=1400 audit(1426618203.572:4): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=602 comm="apparmor_parser" +[ 12.979315] type=1400 audit(1426618203.572:5): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/sbin/dhclient" pid=532 comm="apparmor_parser" +[ 12.979324] type=1400 audit(1426618203.572:6): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=532 comm="apparmor_parser" +[ 12.979331] type=1400 audit(1426618203.572:7): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=532 comm="apparmor_parser" +[ 12.979954] type=1400 audit(1426618203.572:8): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=602 comm="apparmor_parser" +[ 12.979961] type=1400 audit(1426618203.572:9): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=602 comm="apparmor_parser" +[ 12.979981] type=1400 audit(1426618203.572:10): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=532 comm="apparmor_parser" +[ 12.979988] type=1400 audit(1426618203.572:11): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=532 comm="apparmor_parser" +[ 12.996307] pcmcia_socket pcmcia_socket0: cs: memory probe 0x0c0000-0x0fffff: +[ 12.996318] excluding 0xc0000-0xd3fff 0xdc000-0xfffff +[ 12.996348] pcmcia_socket pcmcia_socket0: cs: memory probe 0xa0000000-0xa0ffffff: +[ 12.996358] excluding 0xa0000000-0xa0ffffff +[ 12.996381] pcmcia_socket pcmcia_socket0: cs: memory probe 0x60000000-0x60ffffff: +[ 12.996390] excluding 0x60000000-0x60ffffff +[ 14.072556] Bluetooth: Core ver 2.17 +[ 14.072608] NET: Registered protocol family 31 +[ 14.072611] Bluetooth: HCI device and connection manager initialized +[ 14.072623] Bluetooth: HCI socket layer initialized +[ 14.072627] Bluetooth: L2CAP socket layer initialized +[ 14.072633] Bluetooth: SCO socket layer initialized +[ 14.168500] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 +[ 14.168506] Bluetooth: BNEP filters: protocol multicast +[ 14.168518] Bluetooth: BNEP socket layer initialized +[ 14.169341] Bluetooth: RFCOMM TTY layer initialized +[ 14.169352] Bluetooth: RFCOMM socket layer initialized +[ 14.169361] Bluetooth: RFCOMM ver 1.11 +[ 14.178064] snd_hda_intel 0000:00:1b.0: irq 48 for MSI/MSI-X +[ 14.229289] hda_codec: CX20561 (Hermosa): BIOS auto-probing. +[ 14.229771] autoconfig: line_outs=1 (0x1a/0x0/0x0/0x0/0x0) type:speaker +[ 14.229774] speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) +[ 14.229776] hp_outs=2 (0x19/0x16/0x0/0x0/0x0) +[ 14.229778] mono: mono_out=0x0 +[ 14.229779] dig-out=0x1c/0x0 +[ 14.229781] inputs: +[ 14.229783] Mic=0x18 +[ 14.229785] Internal Mic=0x1d +[ 14.229787] Dock Mic=0x17 +[ 14.230909] hda_codec: Enable sync_write for stable communication +[ 14.234697] input: HDA Intel Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input12 +[ 14.234908] input: HDA Intel Dock Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input11 +[ 14.235118] input: HDA Intel Dock Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input10 +[ 14.235298] input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input9 +[ 14.294724] init: failsafe main process (699) killed by TERM signal +[ 14.300364] usbcore: registered new interface driver btusb +[ 15.826334] e1000e 0000:00:19.0: irq 44 for MSI/MSI-X +[ 15.927162] e1000e 0000:00:19.0: irq 44 for MSI/MSI-X +[ 15.927347] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 15.927754] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 16.972911] init: alsa-restore main process (987) terminated with status 99 +[ 19.430838] init: plymouth-upstart-bridge main process ended, respawning +[ 19.613929] e1000e: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx +[ 19.614080] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ 97.723392] init: upstart-udev-bridge main process (418) terminated with status 1 +[ 97.723413] init: upstart-udev-bridge main process ended, respawning +[ 97.723636] init: upstart-file-bridge main process (528) terminated with status 1 +[ 97.723652] init: upstart-file-bridge main process ended, respawning +[ 97.723833] init: upstart-socket-bridge main process (712) terminated with status 1 +[ 97.723849] init: upstart-socket-bridge main process ended, respawning +[ 477.962196] perf samples too long (2508 > 2500), lowering kernel.perf_event_max_sample_rate to 50000 +[ 681.763788] show_signal_msg: 114 callbacks suppressed +[ 681.763795] msrtool[12415]: segfault at 0 ip (null) sp 00007fff82509228 error 14 in msrtool[400000+26be000] diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/dmidecode.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/dmidecode.log new file mode 100644 index 00000000..901f7a48 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/dmidecode.log @@ -0,0 +1,611 @@ +# dmidecode 2.12 +SMBIOS 2.4 present. +74 structures occupying 2469 bytes. +Table at 0x000E0010. + +Handle 0x0000, DMI type 0, 24 bytes +BIOS Information + Vendor: LENOVO + Version: 7UET56WW (2.02 ) + Release Date: 01/09/2009 + Address: 0xE0000 + Runtime Size: 128 kB + ROM Size: 8192 kB + Characteristics: + PCI is supported + PC Card (PCMCIA) is supported + PNP is supported + BIOS is upgradeable + BIOS shadowing is allowed + ESCD support is available + Boot from CD is supported + Selectable boot is supported + BIOS ROM is socketed + EDD is supported + ACPI is supported + USB legacy is supported + BIOS boot specification is supported + Targeted content distribution is supported + BIOS Revision: 2.2 + Firmware Revision: 1.1 + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: LENOVO + Product Name: 6475GE2 + Version: ThinkPad T400 + Serial Number: L3BLN3R + UUID: 044E2A01-4A58-11CB-B7F3-A659D406AA70 + Wake-up Type: Power Switch + SKU Number: Not Specified + Family: ThinkPad T400 + +Handle 0x0002, DMI type 2, 8 bytes +Base Board Information + Manufacturer: LENOVO + Product Name: 6475GE2 + Version: Not Available + Serial Number: VF26F91C27K + +Handle 0x0003, DMI type 3, 13 bytes +Chassis Information + Manufacturer: LENOVO + Type: Notebook + Lock: Not Present + Version: Not Available + Serial Number: Not Available + Asset Tag: 9662148 + Boot-up State: Unknown + Power Supply State: Unknown + Thermal State: Unknown + Security Status: Unknown + +Handle 0x0004, DMI type 126, 13 bytes +Inactive + +Handle 0x0005, DMI type 126, 13 bytes +Inactive + +Handle 0x0006, DMI type 4, 35 bytes +Processor Information + Socket Designation: None + Type: Central Processor + Family: Other + Manufacturer: GenuineIntel + ID: 76 06 01 00 FF FB EB BF + Signature: Type 0, Family 6, Model 23, Stepping 6 + Flags: + FPU (Floating-point unit on-chip) + VME (Virtual mode extension) + DE (Debugging extension) + PSE (Page size extension) + TSC (Time stamp counter) + MSR (Model specific registers) + PAE (Physical address extension) + MCE (Machine check exception) + CX8 (CMPXCHG8 instruction supported) + APIC (On-chip APIC hardware supported) + SEP (Fast system call) + MTRR (Memory type range registers) + PGE (Page global enable) + MCA (Machine check architecture) + CMOV (Conditional move instruction supported) + PAT (Page attribute table) + PSE-36 (36-bit page size extension) + CLFSH (CLFLUSH instruction supported) + DS (Debug store) + ACPI (ACPI supported) + MMX (MMX technology supported) + FXSR (FXSAVE and FXSTOR instructions supported) + SSE (Streaming SIMD extensions) + SSE2 (Streaming SIMD extensions 2) + SS (Self-snoop) + HTT (Multi-threading) + TM (Thermal monitor supported) + PBE (Pending break enabled) + Version: Intel(R) Core(TM)2 Duo CPU P8400 @ 2.26GHz + Voltage: 1.2 V + External Clock: 266 MHz + Max Speed: 2260 MHz + Current Speed: 2260 MHz + Status: Populated, Enabled + Upgrade: None + L1 Cache Handle: 0x000A + L2 Cache Handle: 0x000C + L3 Cache Handle: Not Provided + Serial Number: Not Specified + Asset Tag: Not Specified + Part Number: Not Specified + +Handle 0x0007, DMI type 5, 20 bytes +Memory Controller Information + Error Detecting Method: None + Error Correcting Capabilities: + None + Supported Interleave: One-way Interleave + Current Interleave: One-way Interleave + Maximum Memory Module Size: 4096 MB + Maximum Total Memory Size: 8192 MB + Supported Speeds: + Other + Supported Memory Types: + DIMM + SDRAM + Memory Module Voltage: 2.9 V + Associated Memory Slots: 2 + 0x0008 + 0x0009 + Enabled Error Correcting Capabilities: + Unknown + +Handle 0x0008, DMI type 6, 12 bytes +Memory Module Information + Socket Designation: DIMM Slot 1 + Bank Connections: 0 1 + Current Speed: 155 ns + Type: DIMM SDRAM + Installed Size: 1024 MB (Double-bank Connection) + Enabled Size: 1024 MB (Double-bank Connection) + Error Status: OK + +Handle 0x0009, DMI type 6, 12 bytes +Memory Module Information + Socket Designation: DIMM Slot 2 + Bank Connections: 2 3 + Current Speed: 155 ns + Type: DIMM SDRAM + Installed Size: 2048 MB (Single-bank Connection) + Enabled Size: 2048 MB (Single-bank Connection) + Error Status: OK + +Handle 0x000A, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L1 Cache + Configuration: Enabled, Socketed, Level 1 + Operational Mode: Write Back + Location: Internal + Installed Size: 64 kB + Maximum Size: 64 kB + Supported SRAM Types: + Synchronous + Installed SRAM Type: Synchronous + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Instruction + Associativity: 8-way Set-associative + +Handle 0x000B, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L1 Cache + Configuration: Enabled, Socketed, Level 1 + Operational Mode: Write Back + Location: Internal + Installed Size: 64 kB + Maximum Size: 64 kB + Supported SRAM Types: + Synchronous + Installed SRAM Type: Synchronous + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Data + Associativity: 8-way Set-associative + +Handle 0x000C, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L2 Cache + Configuration: Enabled, Socketed, Level 2 + Operational Mode: Write Back + Location: Internal + Installed Size: 3072 kB + Maximum Size: 3072 kB + Supported SRAM Types: + Burst + Installed SRAM Type: Burst + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Unified + Associativity: 8-way Set-associative + +Handle 0x000D, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: External Monitor + External Connector Type: DB-15 female + Port Type: Video Port + +Handle 0x000E, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Microphone Jack + External Connector Type: Mini Jack (headphones) + Port Type: Audio Port + +Handle 0x000F, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Headphone Jack + External Connector Type: Mini Jack (headphones) + Port Type: Audio Port + +Handle 0x0010, DMI type 126, 9 bytes +Inactive + +Handle 0x0011, DMI type 126, 9 bytes +Inactive + +Handle 0x0012, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Modem + External Connector Type: RJ-11 + Port Type: Modem Port + +Handle 0x0013, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Ethernet + External Connector Type: RJ-45 + Port Type: Network Port + +Handle 0x0014, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 1 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0015, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 2 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0016, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 3 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0017, DMI type 126, 9 bytes +Inactive + +Handle 0x0018, DMI type 126, 9 bytes +Inactive + +Handle 0x0019, DMI type 126, 9 bytes +Inactive + +Handle 0x001A, DMI type 126, 9 bytes +Inactive + +Handle 0x001B, DMI type 126, 9 bytes +Inactive + +Handle 0x001C, DMI type 126, 9 bytes +Inactive + +Handle 0x001D, DMI type 126, 9 bytes +Inactive + +Handle 0x001E, DMI type 126, 9 bytes +Inactive + +Handle 0x001F, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: IEEE1394 + External Connector Type: IEEE 1394 + Port Type: Firewire (IEEE P1394) + +Handle 0x0020, DMI type 9, 13 bytes +System Slot Information + Designation: ExpressCard Slot 1 + Type: x1 PCI Express + Current Usage: Available + Length: Other + ID: 0 + Characteristics: + Hot-plug devices are supported + +Handle 0x0021, DMI type 9, 13 bytes +System Slot Information + Designation: CardBus Slot 1 + Type: 32-bit PC Card (PCMCIA) + Current Usage: Available + Length: Other + ID: Adapter 1, Socket 0 + Characteristics: + 5.0 V is provided + 3.3 V is provided + PC Card-16 is supported + Cardbus is supported + Zoom Video is supported + Modem ring resume is supported + PME signal is supported + Hot-plug devices are supported + +Handle 0x0022, DMI type 126, 13 bytes +Inactive + +Handle 0x0023, DMI type 126, 13 bytes +Inactive + +Handle 0x0024, DMI type 126, 13 bytes +Inactive + +Handle 0x0025, DMI type 126, 13 bytes +Inactive + +Handle 0x0026, DMI type 126, 13 bytes +Inactive + +Handle 0x0027, DMI type 10, 6 bytes +On Board Device Information + Type: Other + Status: Disabled + Description: IBM Embedded Security hardware + +Handle 0x0028, DMI type 11, 5 bytes +OEM Strings + String 1: IBM ThinkPad Embedded Controller -[7VHT12WW-1.01 ]- + +Handle 0x0029, DMI type 13, 22 bytes +BIOS Language Information + Language Description Format: Abbreviated + Installable Languages: 1 + enUS + Currently Installed Language: enUS + +Handle 0x002A, DMI type 15, 25 bytes +System Event Log + Area Length: 0 bytes + Header Start Offset: 0x0000 + Header Length: 16 bytes + Data Start Offset: 0x0010 + Access Method: General-purpose non-volatile data functions + Access Address: 0x0000 + Status: Valid, Not Full + Change Token: 0x00000070 + Header Format: Type 1 + Supported Log Type Descriptors: 1 + Descriptor 1: POST error + Data Format 1: POST results bitmap + +Handle 0x002B, DMI type 16, 15 bytes +Physical Memory Array + Location: System Board Or Motherboard + Use: System Memory + Error Correction Type: None + Maximum Capacity: 4 GB + Error Information Handle: Not Provided + Number Of Devices: 2 + +Handle 0x002C, DMI type 17, 27 bytes +Memory Device + Array Handle: 0x002B + Error Information Handle: No Error + Total Width: 64 bits + Data Width: 64 bits + Size: 1024 MB + Form Factor: SODIMM + Set: None + Locator: DIMM 1 + Bank Locator: Bank 0/1 + Type: DDR2 + Type Detail: Synchronous + Speed: 667 MHz + Manufacturer: Not Specified + Serial Number: Not Specified + Asset Tag: Not Specified + Part Number: Not Specified + +Handle 0x002D, DMI type 17, 27 bytes +Memory Device + Array Handle: 0x002B + Error Information Handle: No Error + Total Width: 64 bits + Data Width: 64 bits + Size: 2048 MB + Form Factor: SODIMM + Set: None + Locator: DIMM 2 + Bank Locator: Bank 2/3 + Type: DDR2 + Type Detail: Synchronous + Speed: 667 MHz + Manufacturer: Not Specified + Serial Number: Not Specified + Asset Tag: Not Specified + Part Number: Not Specified + +Handle 0x002E, DMI type 18, 23 bytes +32-bit Memory Error Information + Type: OK + Granularity: Unknown + Operation: Unknown + Vendor Syndrome: Unknown + Memory Array Address: Unknown + Device Address: Unknown + Resolution: Unknown + +Handle 0x002F, DMI type 19, 15 bytes +Memory Array Mapped Address + Starting Address: 0x00000000000 + Ending Address: 0x000BFFFFFFF + Range Size: 3 GB + Physical Array Handle: 0x002B + Partition Width: 2 + +Handle 0x0030, DMI type 20, 19 bytes +Memory Device Mapped Address + Starting Address: 0x00000000000 + Ending Address: 0x0003FFFFFFF + Range Size: 1 GB + Physical Device Handle: 0x002C + Memory Array Mapped Address Handle: 0x002F + Partition Row Position: 1 + +Handle 0x0031, DMI type 20, 19 bytes +Memory Device Mapped Address + Starting Address: 0x00040000000 + Ending Address: 0x000BFFFFFFF + Range Size: 2 GB + Physical Device Handle: 0x002D + Memory Array Mapped Address Handle: 0x002F + Partition Row Position: 1 + +Handle 0x0032, DMI type 21, 7 bytes +Built-in Pointing Device + Type: Track Point + Interface: PS/2 + Buttons: 3 + +Handle 0x0033, DMI type 21, 7 bytes +Built-in Pointing Device + Type: Touch Pad + Interface: PS/2 + Buttons: 0 + +Handle 0x0034, DMI type 126, 26 bytes +Inactive + +Handle 0x0035, DMI type 126, 26 bytes +Inactive + +Handle 0x0036, DMI type 24, 5 bytes +Hardware Security + Power-On Password Status: Disabled + Keyboard Password Status: Disabled + Administrator Password Status: Disabled + Front Panel Reset Status: Unknown + +Handle 0x0037, DMI type 32, 11 bytes +System Boot Information + Status: No errors detected + +Handle 0x0038, DMI type 131, 17 bytes +OEM-specific Type + Header and Data: + 83 11 38 00 01 02 03 FF FF 1F 00 00 00 00 00 02 + 00 + Strings: + BOOTINF 20h + BOOTDEV 21h + KEYPTRS 23h + +Handle 0x0039, DMI type 131, 22 bytes +OEM-specific Type + Header and Data: + 83 16 39 00 01 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 01 + Strings: + TVT-Enablement + +Handle 0x003A, DMI type 132, 7 bytes +OEM-specific Type + Header and Data: + 84 07 3A 00 02 D8 36 + +Handle 0x003B, DMI type 133, 5 bytes +OEM-specific Type + Header and Data: + 85 05 3B 00 01 + Strings: + KHOIHGIUCCHHII + +Handle 0x003C, DMI type 134, 13 bytes +OEM-specific Type + Header and Data: + 86 0D 3C 00 05 02 09 20 00 00 00 00 00 + +Handle 0x003D, DMI type 134, 16 bytes +OEM-specific Type + Header and Data: + 86 10 3D 00 00 49 4E 54 43 01 01 00 00 02 01 02 + Strings: + TPM INFO + System Reserved + +Handle 0x003E, DMI type 135, 13 bytes +OEM-specific Type + Header and Data: + 87 0D 3E 00 54 50 07 00 01 00 00 00 00 + +Handle 0x003F, DMI type 135, 18 bytes +OEM-specific Type + Header and Data: + 87 12 3F 00 54 50 07 01 01 B8 00 00 00 00 00 00 + 00 00 + +Handle 0x0040, DMI type 135, 35 bytes +OEM-specific Type + Header and Data: + 87 23 40 00 54 50 07 02 42 41 59 20 49 2F 4F 20 + 01 00 02 00 00 0B 00 48 1C 3E 18 02 00 0B 00 40 + 1C 3A 18 + +Handle 0x0041, DMI type 135, 34 bytes +OEM-specific Type + Header and Data: + 87 22 41 00 54 50 07 04 01 06 01 01 02 00 02 01 + 02 00 03 01 02 00 04 01 02 00 05 01 02 00 06 01 + 02 00 + +Handle 0x0042, DMI type 136, 6 bytes +OEM-specific Type + Header and Data: + 88 06 42 00 5A 5A + +Handle 0x0043, DMI type 126, 28 bytes +Inactive + +Handle 0x0044, DMI type 138, 40 bytes +OEM-specific Type + Header and Data: + 8A 28 44 00 14 01 02 01 40 02 01 40 02 01 40 02 + 01 40 01 40 42 49 4F 53 20 50 61 73 73 77 6F 72 + 64 20 46 6F 72 6D 61 74 + +Handle 0x0045, DMI type 139, 37 bytes +OEM-specific Type + Header and Data: + 8B 25 45 00 11 01 0A 00 00 00 00 00 00 00 00 00 + 00 50 57 4D 53 20 4B 65 79 20 49 6E 66 6F 72 6D + 61 74 69 6F 6E + +Handle 0x0046, DMI type 129, 8 bytes +OEM-specific Type + Header and Data: + 81 08 46 00 01 01 02 01 + Strings: + Intel_ASF + Intel_ASF_001 + +Handle 0x0047, DMI type 130, 20 bytes +OEM-specific Type + Header and Data: + 82 14 47 00 24 41 4D 54 01 01 01 01 01 A5 0B 04 + 00 00 00 00 + +Handle 0x0048, DMI type 131, 64 bytes +OEM-specific Type + Header and Data: + 83 40 48 00 14 00 00 00 00 00 40 2A 00 00 00 00 + F8 00 17 29 00 00 00 00 0F 00 00 00 00 00 04 00 + 73 04 08 00 01 00 01 15 C8 00 F5 10 00 00 00 00 + 00 00 00 00 07 00 00 00 76 50 72 6F 00 00 00 00 + +Handle 0x0049, DMI type 127, 4 bytes +End Of Table + diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/ectool.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/ectool.log new file mode 100644 index 00000000..11e5f963 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/ectool.log @@ -0,0 +1,19 @@ +EC RAM: + +00: a6 05 a0 40 fe 96 00 00 1f 02 47 00 00 00 80 00 +10: 00 00 ff ff f4 3c 87 09 5b ff 83 00 ff ff 2d 00 +20: 00 00 00 00 00 00 00 9f 00 00 00 00 00 00 00 80 +30: 07 00 02 00 30 04 00 00 00 00 30 10 00 50 00 00 +40: 00 00 00 00 00 00 14 00 42 01 00 00 00 00 00 00 +50: 00 c0 02 19 df 07 03 11 12 31 28 04 04 d0 07 f6 +60: 09 86 0b 7a 0d 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 12 30 80 24 23 20 80 80 80 80 80 +80: 00 00 00 06 79 07 03 00 00 00 00 00 00 00 6c 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 23 2a 27 80 80 80 80 80 11 41 00 06 00 00 00 00 +d0: 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 10 10 52 07 24 6e 55 03 +f0: 37 56 48 54 31 32 57 57 10 c2 48 fd 10 67 73 e5 + diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/flashrom_info.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/flashrom_info.log new file mode 100644 index 00000000..8b137891 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/flashrom_info.log @@ -0,0 +1 @@ + diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/flashrom_read.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/flashrom_read.log new file mode 100644 index 00000000..8b137891 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/flashrom_read.log @@ -0,0 +1 @@ + diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/inteltool.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/inteltool.log new file mode 100644 index 00000000..c2c5a28a --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/inteltool.log @@ -0,0 +1,4406 @@ +CPU: ID 0x10676, Processor Type 0x0, Family 0x6, Model 0x17, Stepping 0x6 +Northbridge: 8086:2a40 (GL40/GS40/GM45/GS45/PM45) +Southbridge: 8086:2917 (ICH9M-E) + +============= GPIOS ============= + +GPIOBASE = 0x1180 (IO) + +gpiobase+0x0000: 0x197e23fe (GPIO_USE_SEL) +gpiobase+0x0004: 0xe0a26dfe (GP_IO_SEL) +gpiobase+0x0008: 0x00000000 (RESERVED) +gpiobase+0x000c: 0xe3feef3b (GP_LVL) +gpiobase+0x0010: 0x00000000 (RESERVED) +gpiobase+0x0014: 0x00000000 (RESERVED) +gpiobase+0x0018: 0x00000000 (GPO_BLINK) +gpiobase+0x001c: 0x00000000 (GP_SER_BLINK) +gpiobase+0x0020: 0x00080000 (GP_SB_CMDSTS) +gpiobase+0x0024: 0x00000000 (GP_SB_DATA) +gpiobase+0x0028: 0x00000000 (RESERVED) +gpiobase+0x002c: 0x00000102 (GPI_INV) +gpiobase+0x0030: 0x030306f6 (GPIO_USE_SEL2) +gpiobase+0x0034: 0x1f55f9f1 (GP_IO_SEL2) +gpiobase+0x0038: 0x1dfefb73 (GP_LVL2) +gpiobase+0x003c: 0x00000000 (RESERVED) + + + +============= RCBA ============== + +RCBA = 0xfed1c000 (MEM) + +0x0000: 0x10010002 +0x0004: 0x00000801 +0x0008: 0x00000001 +0x0010: 0x00000001 +0x0014: 0x80000001 +0x001c: 0x03128011 +0x0020: 0x81080080 +0x0030: 0x0000000f +0x0034: 0x000f0000 +0x003c: 0x000000f0 +0x0040: 0x0f000000 +0x0048: 0x0000f000 +0x0050: 0x0000000f +0x0054: 0x000f0000 +0x005c: 0x000000f0 +0x0060: 0x0f000000 +0x0068: 0x0000f000 +0x0088: 0x00109000 +0x0090: 0x00002000 +0x0094: 0x00002000 +0x0100: 0x1a010005 +0x0104: 0x00020802 +0x0110: 0x01010001 +0x0118: 0xfed18000 +0x0120: 0x01020003 +0x0128: 0x000e0000 +0x0130: 0x02020003 +0x0138: 0x000e1000 +0x0140: 0x03020002 +0x0148: 0x000e2000 +0x0150: 0x04020003 +0x0158: 0x000e3000 +0x0160: 0x0f020003 +0x0168: 0x000d8000 +0x0170: 0x05020003 +0x0178: 0x000e4000 +0x0180: 0x06020002 +0x0188: 0x000e5000 +0x01a0: 0x00010006 +0x01a4: 0x00012c41 +0x01a8: 0x00410003 +0x01f0: 0x00000001 +0x01f4: 0x86000040 +0x01fc: 0x0000060b +0x0200: 0x01102008 +0x0208: 0x04210044 +0x0210: 0x0000f710 +0x0220: 0x00000045 +0x0228: 0x04124aaa +0x0230: 0x00010000 +0x0234: 0x00000003 +0x0238: 0x00543210 +0x023c: 0x00000800 +0x0240: 0x00fa06a5 +0x0244: 0x000006bd +0x0248: 0x001f03e1 +0x024c: 0x000e0000 +0x0250: 0x00140000 +0x0254: 0x00150346 +0x0258: 0x00150543 +0x0260: 0x00210a4f +0x0268: 0x00030018 +0x0270: 0x00030000 +0x0274: 0x00040010 +0x0278: 0x00a20db6 +0x027c: 0x00a60dc6 +0x0280: 0x00e70000 +0x0284: 0x00ed0000 +0x0288: 0x00eb0092 +0x0f20: 0xb2b577cc +0x0f24: 0x000000c3 +0x0f28: 0x001fe000 +0x0f2c: 0x00101fff +0x0f30: 0x00000387 +0x1d3c: 0x0000007f +0x1d48: 0x00030000 +0x1e10: 0x00020800 +0x1e18: 0x814000bb +0x1e80: 0x000c0801 +0x1e84: 0x000200f0 +0x2010: 0x00080401 +0x2014: 0x14000016 +0x2018: 0xbc4abcb5 +0x2020: 0x00c9605b +0x2024: 0x0b203040 +0x2028: 0x04c8f5b2 +0x202c: 0x0af305b2 +0x2030: 0x00004454 +0x2034: 0xb2b577cc +0x2044: 0x000000c3 +0x204c: 0x001fe000 +0x2050: 0x00101fff +0x2054: 0x00000380 +0x2060: 0x81000000 +0x2080: 0x18206006 +0x2088: 0x00000260 +0x208c: 0x0006000c +0x2090: 0x32000000 +0x20a0: 0x18206006 +0x20a8: 0x00000260 +0x20ac: 0x0006000c +0x20b0: 0x09000000 +0x20c0: 0x18206006 +0x20c8: 0x00000260 +0x20cc: 0x0006000c +0x20d0: 0x09000000 +0x20e0: 0x18206006 +0x20e8: 0x00000260 +0x20ec: 0x0006000c +0x20f0: 0x06000000 +0x3100: 0x04341200 +0x3108: 0x40004321 +0x310c: 0x00014321 +0x3110: 0x00000002 +0x3114: 0x40000321 +0x3118: 0x00000001 +0x3140: 0x00003107 +0x3144: 0x76543210 +0x3148: 0x00000010 +0x314c: 0x00007654 +0x3150: 0x00000004 +0x31fc: 0x03000000 +0x3400: 0x0000001c +0x3404: 0x00000080 +0x3410: 0x00000461 +0x3418: 0x03240001 +0x341c: 0xbf4f001f +0x3430: 0x00000001 +0x3500: 0x0fff0fff +0x3504: 0x1b6db6db +0x3508: 0x0000001b +0x350c: 0x08000020 +0x3510: 0x09008fb8 +0x3528: 0x17001f9f +0x352c: 0x000bc008 +0x3530: 0x1800ff4f +0x3800: 0x07ff0600 +0x3804: 0x3f04e008 +0x3808: 0x0060efc0 +0x384c: 0xb5000000 +0x3850: 0x00001a1b +0x3858: 0x07ff0600 +0x385c: 0x05f50001 +0x3860: 0x05f705f6 +0x3864: 0x05ff05f8 +0x3874: 0x9fff07e0 +0x3884: 0x85ff85f8 +0x3890: 0x00400000 +0x3894: 0x143b5006 +0x3898: 0x05200302 +0x389c: 0x0601209f +0x38b0: 0x00000004 +0x38b4: 0x04040001 +0x38c0: 0x00000007 +0x38c4: 0x00002005 +0x38c8: 0x00002005 +0x3e00: 0xffffffff +0x3e04: 0xffffffff +0x3e08: 0xffffffff +0x3e0c: 0xffffffff +0x3e10: 0xffffffff +0x3e14: 0xffffffff +0x3e18: 0xffffffff +0x3e1c: 0xffffffff +0x3e20: 0xffffffff +0x3e24: 0xffffffff +0x3e28: 0xffffffff +0x3e2c: 0xffffffff +0x3e30: 0xffffffff +0x3e34: 0xffffffff +0x3e38: 0xffffffff +0x3e3c: 0xffffffff +0x3e40: 0xffffffff +0x3e44: 0xffffffff +0x3e48: 0xffffffff +0x3e4c: 0xffffffff +0x3e50: 0xffffffff +0x3e54: 0xffffffff +0x3e58: 0xffffffff +0x3e5c: 0xffffffff +0x3e60: 0xffffffff +0x3e64: 0xffffffff +0x3e68: 0xffffffff +0x3e6c: 0xffffffff +0x3e70: 0xffffffff +0x3e74: 0xffffffff +0x3e78: 0xffffffff +0x3e7c: 0xffffffff +0x3f00: 0x0000000b + + + +============= PMBASE ============ + +PMBASE = 0x1000 (IO) + +pmbase+0x0000: 0x0001 (PM1_STS) +pmbase+0x0002: 0x0120 (PM1_EN) +pmbase+0x0004: 0x00001c03 (PM1_CNT) +pmbase+0x0008: 0x005bb14c (PM1_TMR) +pmbase+0x000c: 0x00000000 (RESERVED) +pmbase+0x0010: 0x00000080 (PROC_CNT) +pmbase+0x0019: 0x00 (RESERVED) +pmbase+0x001a: 0x0000 (RESERVED) +pmbase+0x001c: 0x20000000 (RESERVED) +pmbase+0x0020: 0x6c380000 (GPE0_STS) + 0x00000000 +pmbase+0x0028: 0x01020046 (GPE0_EN) + 0x00000000 +pmbase+0x0030: 0x00062033 (SMI_EN) +pmbase+0x0034: 0x00004900 (SMI_STS) +pmbase+0x0038: 0x0000 (ALT_GP_SMI_EN) +pmbase+0x003a: 0x6c3a (ALT_GP_SMI_STS) +pmbase+0x003c: 0x00 (UPRWC) +pmbase+0x003d: 0x0000 (RESERVED) +pmbase+0x003f: 0x00 (RESERVED) +pmbase+0x0040: 0x0000 (RESERVED) +pmbase+0x0042: 0x00 (GPE_CNTL) +pmbase+0x0043: 0x00 (RESERVED) +pmbase+0x0044: 0x12a0 (DEVACT_STS) +pmbase+0x0046: 0x0000 (RESERVED) +pmbase+0x0048: 0x00000000 (RESERVED) +pmbase+0x004c: 0x00000000 (RESERVED) +pmbase+0x0050: 0x00 (PM2_CNT (Mobile)) +pmbase+0x0051: 0x00 (RESERVED) +pmbase+0x0052: 0x0000 (RESERVED) +pmbase+0x0054: 0x0099c5b8 (C3_RES (Mobile)) +pmbase+0x0058: 0x00000000 (C5_RES (Mobile)) +pmbase+0x005c: 0x00000000 (RESERVED) +pmbase+0x0060: 0x0004 (TCO_RLD) +pmbase+0x0062: 0x00 (TCO_DAT_IN) +pmbase+0x0063: 0x00 (TCO_DAT_OUT) +pmbase+0x0064: 0x0000 (TCO1_STS) +pmbase+0x0066: 0x0000 (TCO2_STS) +pmbase+0x0068: 0x0800 (TCO1_CNT) +pmbase+0x006a: 0x0008 (TCO2_CNT) +pmbase+0x006c: 0x0000 (TCO_MESSAGE) +pmbase+0x006e: 0x00 (TCO_WDCNT) +pmbase+0x006f: 0x00 (RESERVED) +pmbase+0x0070: 0x03 (SW_IRQ_GEN) +pmbase+0x0071: 0x00 (RESERVED) +pmbase+0x0072: 0x03ff (TCO_TMR) +pmbase+0x0074: 0x00000000 (RESERVED) +pmbase+0x0078: 0x00000000 (RESERVED) +pmbase+0x007c: 0x00000000 (RESERVED) + + + +============= MCHBAR ============ + +MCHBAR = 0xfed10000 (MEM) + +0x0034: 0x00000002 +0x0040: 0x00202200 +0x0044: 0xc6200032 +0x0048: 0x808002a8 +0x004c: 0x00100000 +0x0050: 0x00800001 +0x0054: 0x00800102 +0x0070: 0x12200009 +0x0074: 0x17000200 +0x0090: 0x00005054 +0x0094: 0x20210880 +0x00a4: 0x00d00000 +0x00b0: 0x00d00000 +0x00bc: 0x00d00000 +0x00d0: 0x00000002 +0x00f4: 0x01804000 +0x0200: 0x000f0002 +0x0204: 0x00000010 +0x0208: 0x00810060 +0x020c: 0x00180006 +0x0218: 0x86008400 +0x0220: 0x00210264 +0x0224: 0x00000300 +0x0228: 0x30000000 +0x0230: 0x34028000 +0x0234: 0x00000009 +0x0238: 0x04bdb600 +0x023c: 0x003db600 +0x0240: 0xa8000000 +0x0400: 0x000e0022 +0x0404: 0x00002202 +0x040c: 0x0f800100 +0x0410: 0x2186a000 +0x041c: 0x22222099 +0x0420: 0x0000002d +0x0424: 0x0000002d +0x0428: 0x00000050 +0x042c: 0x00000050 +0x04d0: 0x28a00012 +0x0518: 0x21250a0a +0x0530: 0x0a080005 +0x0680: 0x08080f0e +0x0684: 0x08080808 +0x0688: 0x09090808 +0x068c: 0x0d0c0b0a +0x0698: 0x100e0d0c +0x069c: 0x08080812 +0x06a0: 0x09090808 +0x06a4: 0x0b0b0a0a +0x06b0: 0x1c000055 +0x06b4: 0x00000019 +0x06c0: 0x03030303 +0x06c4: 0x04040404 +0x06c8: 0x03030505 +0x06cc: 0x03030303 +0x06d8: 0x03030303 +0x06dc: 0x04040403 +0x06e0: 0x05050504 +0x06e4: 0x03030305 +0x06f0: 0x24000066 +0x06f4: 0x00000021 +0x0700: 0x08080808 +0x0704: 0x09090909 +0x0708: 0x08080a0a +0x070c: 0x08080808 +0x0718: 0x08080808 +0x071c: 0x09090909 +0x0720: 0x0a0a0a0a +0x0724: 0x0808080a +0x0730: 0x24000066 +0x0734: 0x00000021 +0x073c: 0x80000000 +0x0740: 0x08080808 +0x0744: 0x09090909 +0x0748: 0x08080a0a +0x074c: 0x08080808 +0x0758: 0x08080808 +0x075c: 0x09090909 +0x0760: 0x0a0a0a0a +0x0764: 0x0808080a +0x0770: 0x24000066 +0x0774: 0x00000021 +0x077c: 0x80000000 +0x0780: 0x0a090909 +0x0784: 0x0c0b0b0a +0x0788: 0x06060d0c +0x078c: 0x09080707 +0x0798: 0x0a090808 +0x079c: 0x0c0b0b0a +0x07a0: 0x0e0d0d0c +0x07a4: 0x0707060e +0x07b0: 0x24000066 +0x07b4: 0x00000021 +0x07c0: 0x0a090909 +0x07c4: 0x0c0b0b0a +0x07c8: 0x06060d0c +0x07cc: 0x09080707 +0x07d8: 0x0a090808 +0x07dc: 0x0c0b0b0a +0x07e0: 0x0e0d0d0c +0x07e4: 0x0707060e +0x07f0: 0x24000066 +0x07f4: 0x00000021 +0x0840: 0x08080f0e +0x0844: 0x08080808 +0x0848: 0x09090808 +0x084c: 0x0d0c0b0a +0x0858: 0x100e0d0c +0x085c: 0x08080812 +0x0860: 0x09090808 +0x0864: 0x0b0b0a0a +0x0870: 0x1c000055 +0x0874: 0x00000019 +0x0880: 0x03030303 +0x0884: 0x04040404 +0x0888: 0x03030505 +0x088c: 0x03030303 +0x0898: 0x03030303 +0x089c: 0x04040403 +0x08a0: 0x05050504 +0x08a4: 0x03030305 +0x08b0: 0x24000066 +0x08b4: 0x00000021 +0x08c0: 0x00003731 +0x08c4: 0x00000807 +0x08c8: 0x00001f1f +0x0a00: 0x00100008 +0x0a04: 0x00100010 +0x0a08: 0x00008787 +0x0a28: 0xe0000000 +0x0a2c: 0x03100000 +0x0a34: 0x00200020 +0x0a38: 0x00200020 +0x0a3c: 0x00000088 +0x0a5c: 0x00000190 +0x0ac0: 0x0000010f +0x0ae4: 0x00001111 +0x0aec: 0x00000201 +0x0b00: 0x01400182 +0x0b28: 0x0186a000 +0x0b2c: 0x192d172b +0x0b30: 0x0e0c0e0c +0x0b34: 0x0e0c192d +0x0b38: 0x0e0c1901 +0x0b3c: 0x0c020807 +0x0b40: 0x04030201 +0x0b44: 0x08070605 +0x0b48: 0x110f0c09 +0x0b4c: 0x1a171513 +0x0b50: 0x2723201d +0x0b54: 0x312f2d2a +0x0b58: 0x3a383633 +0x0b5c: 0x3f3f3e3c +0x0b60: 0x04040302 +0x0b64: 0x08070605 +0x0b68: 0x120e0b09 +0x0b6c: 0x211d1815 +0x0b70: 0x2b292724 +0x0b74: 0x31302f2d +0x0b78: 0x39373533 +0x0b7c: 0x3f3d3b3a +0x0b84: 0x000acbab +0x0b88: 0x0045030e +0x0b8c: 0x00222222 +0x0b90: 0x00800080 +0x0b94: 0x0e1f272b +0x0b9c: 0x00000008 +0x0ba0: 0x00000008 +0x0ba4: 0x00000008 +0x0ba8: 0x00000008 +0x0bac: 0x0e1f0e1f +0x0bb0: 0x14000000 +0x0bbc: 0x0f000000 +0x0bc8: 0x00200000 +0x0bcc: 0x59470000 +0x0bd0: 0x5a222200 +0x0bd4: 0x0024005a +0x0bd8: 0x0000000c +0x0be0: 0x1b6decf3 +0x0be4: 0x367b6db6 +0x0c00: 0x00644066 +0x0c04: 0x01010101 +0x0c08: 0x00008000 +0x0c14: 0x30950002 +0x0c1c: 0x00000006 +0x0c34: 0x00008000 +0x0c38: 0x17771777 +0x0c48: 0x3f000000 +0x0c50: 0x01010101 +0x0c60: 0x80000000 +0x0c64: 0x00004080 +0x0e10: 0x003d0098 +0x0e14: 0x00000004 +0x0e50: 0x00f003c0 +0x0e54: 0x000f03c0 +0x0e58: 0x00ff03c0 +0x0e5c: 0x3c0f03c0 +0x0e60: 0x3c0003c0 +0x0e70: 0x000000b9 +0x0e74: 0xd0000000 +0x0e78: 0x0218a0a8 +0x0e7c: 0x00470a04 +0x0e80: 0x16002b90 +0x0e84: 0x80774f8f +0x0e88: 0x810000da +0x0e8c: 0x00002080 +0x0ea8: 0x00c80000 +0x0eac: 0x00002000 +0x0eb0: 0x00010000 +0x0ee8: 0x00390000 +0x0f00: 0x00000900 +0x0f04: 0x00002e80 +0x0f08: 0x0000730f +0x0f0c: 0x000010a4 +0x0f10: 0x000000a2 +0x0f14: 0x00000002 +0x0f20: 0x20000000 +0x0f60: 0x01030419 +0x0f80: 0x80000000 +0x0fb0: 0x00000003 +0x0fb8: 0x00000003 +0x0fc0: 0x061f08fd +0x0ffc: 0x0000c7c0 +0x1000: 0x0093007f +0x1004: 0x00ff0000 +0x1008: 0x000000ff +0x1010: 0x80000009 +0x1018: 0x00000085 +0x101c: 0x00008598 +0x1040: 0x0001007f +0x1044: 0x00ff0000 +0x1048: 0x000000ff +0x1050: 0x80000000 +0x1058: 0x00000080 +0x105c: 0x00008099 +0x1070: 0x00000001 +0x1080: 0x00000006 +0x10e0: 0x01010101 +0x1100: 0x00000300 +0x1110: 0x17cd17ac +0x1114: 0x179b178a +0x1118: 0x17891778 +0x111c: 0x17671756 +0x1120: 0x10111213 +0x1124: 0x14151617 +0x1128: 0x18191a1b +0x112c: 0x1c1d1e1f +0x1130: 0x00010203 +0x1134: 0x04050607 +0x1138: 0x08090a0b +0x113c: 0x0c0d0e0f +0x1190: 0x00000007 +0x119c: 0xa8000000 +0x11b8: 0x4000333c +0x11c0: 0x03030100 +0x11c4: 0x0a030a03 +0x11c8: 0x00000020 +0x11cc: 0x00000017 +0x1200: 0x00200010 +0x1204: 0x00200020 +0x1208: 0x00090033 +0x120c: 0x00000003 +0x1210: 0x48e18c61 +0x1214: 0x128090a5 +0x1218: 0x22363313 +0x121c: 0x320d0384 +0x1220: 0x68ba6035 +0x1224: 0x83435a64 +0x1228: 0x066a6804 +0x122c: 0x00000002 +0x1230: 0x43000208 +0x1234: 0x910c1800 +0x1238: 0x0c001001 +0x1248: 0x20802025 +0x124c: 0x60a47687 +0x1250: 0x000006c4 +0x1254: 0x871a066d +0x1258: 0x40100401 +0x1260: 0x0000000b +0x1264: 0x00982022 +0x1268: 0x00000006 +0x1274: 0x80000000 +0x12a0: 0x0000000a +0x12a4: 0x00000020 +0x1300: 0x00400040 +0x1304: 0x00400040 +0x1308: 0x00090003 +0x130c: 0x00000003 +0x1310: 0x48e18c61 +0x1314: 0x128090a5 +0x1318: 0x22363313 +0x131c: 0x320d0384 +0x1320: 0x68ba6035 +0x1324: 0x83435a64 +0x1328: 0x066a6804 +0x132c: 0x00000002 +0x1330: 0x41000208 +0x1334: 0xb10e1800 +0x1338: 0x0e001001 +0x1348: 0x20802025 +0x134c: 0x60a47687 +0x1350: 0x000006c4 +0x1354: 0x871a066d +0x1358: 0x40100401 +0x1360: 0x0000000b +0x1364: 0x00982022 +0x1368: 0x00000006 +0x1374: 0x80000000 +0x13a0: 0x0000000a +0x13a4: 0x00000020 +0x1400: 0x00113300 +0x1408: 0x3ffffeff +0x140c: 0x80010880 +0x1410: 0x40002040 +0x1414: 0x24049800 +0x1420: 0x2222aa22 +0x1428: 0x00555801 +0x142c: 0x05330407 +0x1430: 0x00000300 +0x1434: 0x80000243 +0x1440: 0x00000044 +0x1444: 0x02000000 +0x1450: 0x0000000a +0x1470: 0x7528060f +0x1474: 0x252b8008 +0x1478: 0x142b7408 +0x147c: 0xa7254708 +0x1490: 0x00e70067 +0x1494: 0x000d8000 +0x14a0: 0x66030003 +0x14a4: 0x50020002 +0x14a8: 0x24010001 +0x14ac: 0x23000000 +0x14b0: 0x0e361800 +0x14b4: 0x0e421800 +0x14b8: 0x0e451000 +0x14bc: 0x0e511000 +0x14c0: 0x0e560800 +0x14c4: 0x0e440800 +0x14c8: 0x0e450000 +0x14cc: 0x0e530000 +0x14e0: 0x55500000 +0x14f0: 0x00000600 +0x1570: 0x00840008 +0x1574: 0x00840008 +0x1578: 0x00840008 +0x157c: 0x008b0008 +0x1590: 0x00e70067 +0x1594: 0x000d8000 +0x15a0: 0x57030003 +0x15a4: 0x44020002 +0x15a8: 0x22010001 +0x15ac: 0x07000000 +0x15b0: 0x8e431800 +0x15b4: 0x8e401800 +0x15b8: 0x8e431000 +0x15bc: 0x8e511000 +0x15c0: 0x8e400800 +0x15c4: 0x8e340800 +0x15c8: 0x8e440000 +0x15cc: 0x0e500000 +0x15e0: 0x55500000 +0x15f0: 0x00000600 +0x16cc: 0x000000ff +0x16d4: 0x00000400 + + + +============= EPBAR ============= + +EPBAR = 0xfed19000 (MEM) + +0x0000: 0x04010002 +0x0004: 0x00000401 +0x0008: 0x00000001 +0x0010: 0x00000001 +0x0014: 0x80000001 +0x001c: 0x100a8010 +0x0020: 0x81080080 +0x0028: 0x0a0a0a0a +0x002c: 0x0000001a +0x0038: 0x01380138 +0x003c: 0x01380138 +0x0040: 0x00010005 +0x0044: 0x00010201 +0x0050: 0x01010001 +0x0058: 0xfed18000 +0x0060: 0x02000002 +0x0068: 0x00008000 +0x0100: 0x55555555 +0x0104: 0x55555555 +0x0108: 0x55555555 +0x010c: 0x55555555 +0x0110: 0x55555555 +0x0114: 0x55555555 +0x0118: 0x55555555 +0x011c: 0x00005555 + + + +============= DMIBAR ============ + +DMIBAR = 0xfed18000 (MEM) + +0x0000: 0x04010002 +0x0004: 0x00000001 +0x0008: 0x00000001 +0x0010: 0x00000001 +0x0014: 0x80000001 +0x001c: 0x00008001 +0x0020: 0x81000080 +0x0028: 0x00000001 +0x002c: 0x86000040 +0x0040: 0x08010005 +0x0044: 0x01010202 +0x0050: 0x00020001 +0x0058: 0xfed1c000 +0x0060: 0x00010001 +0x0068: 0xfed19000 +0x0080: 0x00010006 +0x0084: 0x00012c41 +0x0088: 0x00410003 +0x00f0: 0x03010000 +0x00f4: 0x00000005 +0x00fc: 0x00000013 +0x01cc: 0x00060010 +0x01d4: 0x00002000 +0x0200: 0x08006f24 +0x0204: 0x0000b13f +0x0208: 0x00007cb0 +0x0210: 0x00000100 +0x0214: 0x0008000f +0x0218: 0x0f960426 +0x021c: 0x04270427 +0x0224: 0x00030007 +0x0230: 0x1400000c +0x0234: 0xbc4abcb5 +0x0300: 0x001e03da +0x0304: 0x002003e2 +0x0308: 0x00060018 +0x030c: 0x00c50345 +0x0310: 0x00c60346 +0x0314: 0x00060000 +0x0318: 0x00190a2f +0x031c: 0x00210a4f +0x0324: 0x00030018 +0x0328: 0x00030000 +0x0334: 0x00040010 +0x0338: 0x00060000 +0x0e00: 0x000001fe +0x0e08: 0x000000c5 +0x0e0c: 0x000000c1 +0x0e10: 0x00000010 +0x0e18: 0x0000000f +0x0e1c: 0x00000001 +0x0e20: 0x0000000f +0x0e24: 0x0000000d +0x0e28: 0x3a588887 +0x0e2c: 0x88d07333 +0x0e30: 0x00009000 +0x0f00: 0x0000033c +0x0f04: 0x07050880 +0x0f08: 0x00100052 +0x0f10: 0x00010012 +0x0f14: 0x30400000 +0x0f20: 0x3c000757 +0x0f24: 0x00000100 +0x0f30: 0x0e350c08 +0x0f34: 0x000a0000 +0x0f44: 0x07050880 +0x0f48: 0x00100052 +0x0f50: 0x00010012 +0x0f54: 0x30400000 +0x0f60: 0x3c000757 +0x0f64: 0x00000100 +0x0f70: 0x0e3c0808 +0x0f74: 0x000a0000 +0x0f80: 0x0000033c +0x0f84: 0x07050880 +0x0f88: 0x00100052 +0x0f90: 0x00010012 +0x0f94: 0x30400000 +0x0fa0: 0x3c000757 +0x0fa4: 0x00000100 +0x0fb0: 0x0e3a0808 +0x0fb4: 0x000a0000 +0x0fc4: 0x07050880 +0x0fc8: 0x00100052 +0x0fd0: 0x00010012 +0x0fd4: 0x30400000 +0x0fe0: 0x3c000757 +0x0fe4: 0x00000100 +0x0ff0: 0x0e340008 +0x0ff4: 0x000a0000 + + +========= PCIEXBAR ======== + +PCIEXBAR: 0xe0000000 + +PCIe 00:00.0 extended config space: +0000: 86 80 40 2a 06 01 90 20 07 00 00 06 00 00 00 00 +0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0020: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e0 20 +0030: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +0040: 01 90 d1 fe 00 00 00 00 01 00 d1 fe 00 00 00 00 +0050: 00 00 50 03 59 03 00 00 00 00 00 00 00 00 00 00 +0060: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00 +0070: 01 00 60 bf 00 00 00 00 01 10 00 00 00 00 00 00 +0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0090: 10 11 11 01 30 11 11 00 ff 03 00 00 00 1a 3b 00 +00a0: 18 00 f0 0b 00 00 00 00 00 00 00 00 00 00 00 00 +00b0: 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00 +0fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + + +Error: Dumping MSRs on this CPU (0x010670) is not (yet) supported. + + + +============= AMBs ============ + + +============= SPI / BIOS CNTL ============= + +Error: Dumping SPI on this southbridge is not (yet) supported. diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/lspci.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/lspci.log new file mode 100644 index 00000000..3c5fecfc --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/lspci.log @@ -0,0 +1,2696 @@ +00:00.0 Host bridge [0600]: Intel Corporation Mobile 4 Series Chipset Memory Controller Hub [8086:2a40] (rev 07) + Subsystem: Lenovo Device [17aa:20e0] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0a <?> + Kernel driver in use: agpgart-intel +00: 86 80 40 2a 06 01 90 20 07 00 00 06 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e0 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 90 d1 fe 00 00 00 00 01 00 d1 fe 00 00 00 00 +50: 00 00 50 03 59 03 00 00 00 00 00 00 00 00 00 00 +60: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00 +70: 01 00 60 bf 00 00 00 00 01 10 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 10 11 11 01 30 11 11 00 ff 03 00 00 00 1a 3b 00 +a0: 18 00 f0 0b 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 bf 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 30 02 00 00 +e0: 09 00 0a 11 88 64 00 1c 01 00 00 00 00 00 00 00 +f0: 01 00 00 00 00 00 00 00 a0 0f 07 00 00 00 00 00 +100: 00 00 00 00 00 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00 00 +dc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +dd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +de0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +df0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ea0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +eb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ec0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ed0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ee0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ef0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller [8086:2a42] (rev 07) (prog-if 00 [VGA controller]) + Subsystem: Lenovo Device [17aa:20e4] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 46 + Region 0: Memory at f4400000 (64-bit, non-prefetchable) [size=4M] + Region 2: Memory at d0000000 (64-bit, prefetchable) [size=256M] + Region 4: I/O ports at 1800 [size=8] + Expansion ROM at <unassigned> [disabled] + Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4162 + Capabilities: [d0] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: i915 +00: 86 80 42 2a 07 04 90 00 07 00 00 03 00 00 80 00 +10: 04 00 40 f4 00 00 00 00 0c 00 00 d0 00 00 00 00 +20: 01 18 00 00 00 00 00 00 00 00 00 00 aa 17 e4 20 +30: 00 00 00 00 90 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 48 00 00 00 09 00 0a 11 88 64 00 1c +50: 01 00 50 03 19 00 00 00 00 00 00 00 00 00 00 bd +60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 05 d0 01 00 0c 30 e0 fe 62 41 00 00 00 00 00 00 +a0: 00 00 00 00 09 00 06 20 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 40 01 00 00 +d0: 01 00 23 00 00 00 00 00 00 00 00 00 34 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 80 00 1a 41 20 00 00 +f0: 0d 1c 34 07 ff 00 00 00 a0 0f 07 00 13 b2 b8 bc + +00:02.1 Display controller [0380]: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller [8086:2a43] (rev 07) + Subsystem: Lenovo Device [17aa:20e4] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Region 0: Memory at f4200000 (64-bit, non-prefetchable) [size=1M] + Capabilities: [d0] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- +00: 86 80 43 2a 07 00 90 00 07 00 80 03 00 00 80 00 +10: 04 00 20 f4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e4 20 +30: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 +40: 00 00 00 00 48 00 00 00 09 00 0a 11 88 64 00 1c +50: 01 00 50 03 19 00 00 00 00 00 00 00 00 00 00 bd +60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 40 01 00 00 +d0: 01 00 23 00 00 00 00 00 00 00 00 00 34 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 0d 1c 34 07 ff 00 00 00 a0 0f 07 00 00 00 00 00 + +00:03.0 Communication controller [0780]: Intel Corporation Mobile 4 Series Chipset MEI Controller [8086:2a44] (rev 07) + Subsystem: Lenovo Device [17aa:20e6] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 47 + Region 0: Memory at fc226800 (64-bit, non-prefetchable) [size=16] + Capabilities: [50] Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4182 + Kernel driver in use: mei_me +00: 86 80 44 2a 06 04 10 00 07 00 80 07 00 00 80 00 +10: 04 68 22 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e6 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 4a 06 09 30 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 8c 03 c8 08 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 05 00 81 00 +90: 0c 30 e0 fe 00 00 00 00 82 41 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:03.2 IDE interface [0101]: Intel Corporation Mobile 4 Series Chipset PT IDER Controller [8086:2a46] (rev 07) (prog-if 85 [Master SecO PriO]) + Subsystem: Lenovo Device [17aa:20ea] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin C routed to IRQ 18 + Region 0: I/O ports at 1828 [size=8] + Region 1: I/O ports at 180c [size=4] + Region 2: I/O ports at 1820 [size=8] + Region 3: I/O ports at 1808 [size=4] + Region 4: I/O ports at 1810 [size=16] + Capabilities: [c8] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [d0] MSI: Enable- Count=1/1 Maskable- 64bit+ + Address: 0000000000000000 Data: 0000 + Kernel driver in use: ata_generic +00: 86 80 46 2a 05 00 b0 00 07 85 01 01 00 00 00 00 +10: 29 18 00 00 0d 18 00 00 21 18 00 00 09 18 00 00 +20: 11 18 00 00 00 00 00 00 00 00 00 00 aa 17 ea 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 23 00 08 00 00 00 +d0: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:03.3 Serial controller [0700]: Intel Corporation Mobile 4 Series Chipset AMT SOL Redirection [8086:2a47] (rev 07) (prog-if 02 [16550]) + Subsystem: Lenovo Device [17aa:20ec] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 17 + Region 0: I/O ports at 1830 [size=8] + Region 1: Memory at fc024000 (32-bit, non-prefetchable) [size=4K] + Capabilities: [c8] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [d0] MSI: Enable- Count=1/1 Maskable- 64bit+ + Address: 0000000000000000 Data: 0000 + Kernel driver in use: serial +00: 86 80 47 2a 07 00 b0 00 07 02 00 07 00 00 00 00 +10: 31 18 00 00 00 40 02 fc 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 ec 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 23 00 08 00 00 00 +d0: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:19.0 Ethernet controller [0200]: Intel Corporation 82567LM Gigabit Network Connection [8086:10f5] (rev 03) + Subsystem: Lenovo Device [17aa:20ee] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 44 + Region 0: Memory at fc000000 (32-bit, non-prefetchable) [size=128K] + Region 1: Memory at fc025000 (32-bit, non-prefetchable) [size=4K] + Region 2: I/O ports at 1840 [size=32] + Capabilities: [c8] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- + Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 41b2 + Capabilities: [e0] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: e1000e +00: 86 80 f5 10 07 05 10 00 03 00 00 02 00 00 00 00 +10: 00 00 00 fc 00 50 02 fc 41 18 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 ee 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 22 c8 00 20 00 0d +d0: 05 e0 81 00 0c 30 e0 fe 00 00 00 00 b2 41 00 00 +e0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1a.0 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #4 [8086:2937] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 20 + Region 4: I/O ports at 1860 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 37 29 05 00 90 02 03 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1a.1 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #5 [8086:2938] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 21 + Region 4: I/O ports at 1880 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 38 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 81 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1a.2 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #6 [8086:2939] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin C routed to IRQ 22 + Region 4: I/O ports at 18a0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 39 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: a1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1a.7 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #2 [8086:293c] (rev 03) (prog-if 20 [EHCI]) + Subsystem: Lenovo Device [17aa:20f1] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 23 + Region 0: Memory at fc226c00 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Capabilities: [98] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ehci-pci +00: 86 80 3c 29 06 01 90 02 03 20 03 0c 00 00 00 00 +10: 00 6c 22 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f1 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 +60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 00 00 c0 +70: 40 00 9f 0f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 88 85 40 00 86 0f 03 00 06 17 02 20 + +00:1b.0 Audio device [0403]: Intel Corporation 82801I (ICH9 Family) HD Audio Controller [8086:293e] (rev 03) + Subsystem: Lenovo Device [17aa:20f2] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Interrupt: pin B routed to IRQ 48 + Region 0: Memory at fc020000 (64-bit, non-prefetchable) [size=16K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4192 + Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed- WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [130 v1] Root Complex Link + Desc: PortNumber=0f ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: snd_hda_intel +00: 86 80 3e 29 06 05 10 00 03 00 03 04 10 00 00 00 +10: 04 00 02 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f2 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 01 00 00 07 00 00 00 00 00 00 00 00 00 80 00 00 +50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 +60: 05 70 81 00 0c 30 e0 fe 00 00 00 00 92 41 00 00 +70: 10 00 91 00 00 00 00 10 00 08 10 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 01 00 00 00 00 31 00 a3 02 00 00 00 00 +d0: 61 00 a3 02 00 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00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.0 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 1 [8086:2940] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 + I/O behind bridge: 00008000-00008fff + Memory behind bridge: bf000000-bf1fffff + Prefetchable memory behind bridge: 00000000bf200000-00000000bf3fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #0, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41c1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=01 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 40 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 02 02 00 80 80 00 20 +20: 00 bf 10 bf 21 bf 31 bf 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 04 00 +40: 10 80 41 01 00 80 00 00 00 00 10 00 11 4c 11 01 +50: 00 00 01 10 e0 a0 00 00 38 00 00 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe c1 41 00 00 00 00 00 00 +90: 0d a0 00 00 aa 17 f3 20 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00 +e0: 00 0f c7 00 06 07 08 00 31 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 +100: 02 00 01 18 00 00 00 00 01 00 00 00 00 00 00 00 +110: 01 00 00 00 ff 00 00 80 00 00 00 00 00 00 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00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.1 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 2 [8086:2942] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 + I/O behind bridge: 00009000-00009fff + Memory behind bridge: f4300000-f43fffff + Prefetchable memory behind bridge: 00000000bf400000-00000000bf5fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #1, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- + Changed: MRL- PresDet- LinkState+ + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41d1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=02 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 42 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 03 03 00 90 90 00 20 +20: 30 f4 30 f4 41 bf 51 bf 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 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00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.3 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 4 [8086:2946] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=05, subordinate=0c, sec-latency=0 + I/O behind bridge: 00002000-00002fff + Memory behind bridge: f8000000-f9ffffff + Prefetchable memory behind bridge: 00000000f4000000-00000000f40fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #3, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41e1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=04 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 46 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 05 0c 00 20 20 00 20 +20: 00 f8 f0 f9 01 f4 01 f4 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 04 04 00 +40: 10 80 41 01 00 80 00 00 00 00 10 00 11 4c 11 04 +50: 03 00 01 10 e0 a0 18 00 38 00 00 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 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+f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.4 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 5 [8086:2948] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=0d, subordinate=14, sec-latency=0 + I/O behind bridge: 00003000-00003fff + Memory behind bridge: fa000000-fbffffff + Prefetchable memory behind bridge: 00000000f4100000-00000000f41fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #4, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4122 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=05 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 48 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 0d 14 00 30 30 00 20 +20: 00 fa f0 fb 11 f4 11 f4 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 04 00 +40: 10 80 41 01 00 80 00 00 00 00 10 00 11 4c 11 05 +50: 03 00 01 10 e0 a0 20 00 38 00 00 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +90: 0d a0 00 00 aa 17 f3 20 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 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00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1d.0 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 [8086:2934] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 16 + Region 4: I/O ports at 18c0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 34 29 05 00 90 02 03 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: c1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1d.1 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 [8086:2935] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 17 + Region 4: I/O ports at 18e0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 35 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: e1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1d.2 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 [8086:2936] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin C routed to IRQ 18 + Region 4: I/O ports at 1c00 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 36 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 01 1c 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1d.7 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 [8086:293a] (rev 03) (prog-if 20 [EHCI]) + Subsystem: Lenovo Device [17aa:20f1] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 19 + Region 0: Memory at fc227000 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Capabilities: [98] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ehci-pci +00: 86 80 3a 29 06 01 90 02 03 20 03 0c 00 00 00 00 +10: 00 70 22 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f1 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 +60: 20 20 9f 01 00 00 00 00 01 00 00 01 00 00 00 c0 +70: c0 00 1f 0f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 88 85 40 00 86 0f 03 00 06 17 02 20 + +00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev 93) (prog-if 01 [Subtractive decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Bus: primary=00, secondary=15, subordinate=18, sec-latency=32 + I/O behind bridge: 00004000-00007fff + Memory behind bridge: f4800000-f7ffffff + Prefetchable memory behind bridge: 00000000f0000000-00000000f3ffffff + Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [50] Subsystem: Lenovo Device [17aa:20f4] +00: 86 80 48 24 07 01 10 00 93 01 04 06 00 00 01 00 +10: 00 00 00 00 00 00 00 00 00 15 18 20 40 70 80 22 +20: 80 f4 f0 f7 01 f0 f1 f3 00 00 00 00 00 00 00 00 +30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 04 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 +50: 0d 00 00 00 aa 17 f4 20 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1f.0 ISA bridge [0601]: Intel Corporation ICH9M-E LPC Interface Controller [8086:2917] (rev 03) + Subsystem: Lenovo Device [17aa:20f5] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0c <?> + Kernel driver in use: lpc_ich +00: 86 80 17 29 07 00 10 02 03 00 01 06 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f5 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 10 00 00 80 00 00 00 81 11 00 00 10 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 8b 8b 8b 8b 90 00 00 00 8b 8b 8b 8b f8 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 10 02 0e 3f 01 16 7c 00 e1 15 0c 00 81 16 1c 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 24 0a 00 00 39 00 80 00 2b 1c 0a 00 00 03 00 c0 +b0: 00 00 f0 00 00 00 00 00 08 00 02 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 67 45 00 00 00 ff 00 00 00 00 00 00 +e0: 09 00 0c 10 00 02 c4 03 04 00 00 00 00 00 00 00 +f0: 01 c0 d1 fe 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1f.2 SATA controller [0106]: Intel Corporation 82801IBM/IEM (ICH9M/ICH9M-E) 4 port SATA Controller [AHCI mode] [8086:2929] (rev 03) (prog-if 01 [AHCI 1.0]) + Subsystem: Lenovo Device [17aa:20f8] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 45 + Region 0: I/O ports at 1c48 [size=8] + Region 1: I/O ports at 183c [size=4] + Region 2: I/O ports at 1c40 [size=8] + Region 3: I/O ports at 1838 [size=4] + Region 4: I/O ports at 1c20 [size=32] + Region 5: Memory at fc226000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit- + Address: fee0300c Data: 4152 + Capabilities: [70] Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004 + Capabilities: [b0] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ahci +00: 86 80 29 29 07 04 b0 02 03 01 06 01 00 00 00 00 +10: 49 1c 00 00 3d 18 00 00 41 1c 00 00 39 18 00 00 +20: 21 1c 00 00 00 60 22 fc 00 00 00 00 aa 17 f8 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 +80: 05 70 09 00 0c 30 e0 fe 52 41 00 00 00 00 00 00 +90: 60 0c 03 83 93 01 00 4c 00 00 00 00 0c 00 00 00 +a0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00 +b0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1f.3 SMBus [0c05]: Intel Corporation 82801I (ICH9 Family) SMBus Controller [8086:2930] (rev 03) + Subsystem: Lenovo Device [17aa:20f9] + Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 11 + Region 0: Memory at fc227400 (64-bit, non-prefetchable) [size=256] + Region 4: I/O ports at 1c60 [size=32] +00: 86 80 30 29 03 01 80 02 03 00 05 0c 00 00 00 00 +10: 04 74 22 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 1c 00 00 00 00 00 00 00 00 00 00 aa 17 f9 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 02 04 04 00 f0 00 08 08 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +03:00.0 Network controller [0280]: Intel Corporation PRO/Wireless 5100 AGN [Shiloh] Network Connection [8086:4237] + Subsystem: Intel Corporation WiFi Link 5100 AGN [8086:1211] + Physical Slot: 1-1 + Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 17 + Region 0: Memory at f4300000 (64-bit, non-prefetchable) [size=8K] + Capabilities: [c8] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [d0] MSI: Enable- Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4172 + Capabilities: [e0] Express (v1) Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 unlimited + ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- + LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <128ns, L1 <32us + ClockPM+ Surprise- LLActRep- BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + Capabilities: [100 v1] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn- + Capabilities: [140 v1] Device Serial Number 00-21-6b-ff-ff-c9-d0-b4 +00: 86 80 37 42 02 01 10 00 00 00 80 02 10 00 00 00 +10: 04 00 30 f4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 11 12 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 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00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +15:00.0 CardBus bridge [0607]: Ricoh Co Ltd RL5c476 II [1180:0476] (rev ba) + Subsystem: Lenovo ThinkPad R61 [17aa:20c6] + Physical Slot: 1 + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 168 + Interrupt: pin A routed to IRQ 16 + Region 0: Memory at f4800000 (32-bit, non-prefetchable) [size=4K] + Bus: primary=15, secondary=16, subordinate=17, sec-latency=176 + Memory window 0: f0000000-f3ffffff (prefetchable) + Memory window 1: c0000000-c3ffffff + I/O window 0: 00004000-000040ff + I/O window 1: 00004400-000044ff + BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset- 16bInt+ PostWrite+ + 16-bit legacy interface ports at 0001 + Capabilities: [dc] Power Management version 2 + Flags: PMEClk+ DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- + Bridge: PM- B3+ + Kernel driver in use: yenta_cardbus +00: 80 11 76 04 07 00 10 02 ba 00 07 06 00 a8 82 00 +10: 00 00 80 f4 dc 00 00 02 15 16 17 b0 00 00 00 f0 +20: 00 f0 ff f3 00 00 00 c0 00 f0 ff c3 00 40 00 00 +30: fc 40 00 00 00 44 00 00 fc 44 00 00 0b 01 80 05 +40: aa 17 c6 20 01 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 a0 04 00 03 00 00 63 04 63 04 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 01 00 00 f0 00 05 00 00 00 +b0: 00 00 00 00 00 00 00 fa 00 30 00 00 00 00 00 00 +c0: aa 17 c6 20 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 0a fe +e0: 00 40 c0 24 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +15:00.1 FireWire (IEEE 1394) [0c00]: Ricoh Co Ltd R5C832 IEEE 1394 Controller [1180:0832] (rev 04) (prog-if 10 [OHCI]) + Subsystem: Lenovo ThinkPad R61 [17aa:20c7] + Physical Slot: 1 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 32 (500ns min, 1000ns max), Cache Line Size: 64 bytes + Interrupt: pin B routed to IRQ 17 + Region 0: Memory at f4801000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [dc] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME+ + Kernel driver in use: firewire_ohci +00: 80 11 32 08 06 01 10 02 04 10 00 0c 10 20 80 00 +10: 00 10 80 f4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 c7 20 +30: 00 00 00 00 dc 00 00 00 00 00 00 00 0b 02 02 04 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 80 16 00 00 00 00 00 20 00 00 66 66 32 12 +90: 48 60 66 10 00 00 02 00 50 80 00 00 01 01 18 00 +a0: 00 00 00 00 00 00 00 00 20 00 00 00 aa 17 c7 20 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 02 fe +e0: 00 c0 00 48 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/lspnp.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/lspnp.log new file mode 100644 index 00000000..8b137891 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/lspnp.log @@ -0,0 +1 @@ + diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/lsusb.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/lsusb.log new file mode 100644 index 00000000..30af5f4f --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/lsusb.log @@ -0,0 +1,820 @@ + +Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0002 2.0 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency ehci_hcd + iProduct 2 EHCI Host Controller + iSerial 1 0000:00:1d.7 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0004 1x 4 bytes + bInterval 12 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 6 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 10 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power + Port 3: 0000.0100 power + Port 4: 0000.0100 power + Port 5: 0000.0100 power + Port 6: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 008 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.2 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 007 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.1 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 006 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0002 2.0 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency ehci_hcd + iProduct 2 EHCI Host Controller + iSerial 1 0000:00:1a.7 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0004 1x 4 bytes + bInterval 12 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 6 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 10 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power + Port 3: 0000.0100 power + Port 4: 0000.0100 power + Port 5: 0000.0100 power + Port 6: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 005 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.2 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 004 Device 002: ID 0a5c:2145 Broadcom Corp. BCM2045B (BDC-2.1) [Bluetooth Controller] +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 224 Wireless + bDeviceSubClass 1 Radio Frequency + bDeviceProtocol 1 Bluetooth + bMaxPacketSize0 64 + idVendor 0x0a5c Broadcom Corp. + idProduct 0x2145 BCM2045B (BDC-2.1) [Bluetooth Controller] + bcdDevice 3.99 + iManufacturer 1 Lenovo Computer Corp + iProduct 2 ThinkPad Bluetooth with Enhanced Data Rate II + iSerial 0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 216 + bNumInterfaces 4 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 100mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 3 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0010 1x 16 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x82 EP 2 IN + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x02 EP 2 OUT + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 0 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0000 1x 0 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0000 1x 0 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 1 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0009 1x 9 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0009 1x 9 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 2 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0011 1x 17 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0011 1x 17 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 3 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 4 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 5 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 2 + bAlternateSetting 0 + bNumEndpoints 2 + bInterfaceClass 255 Vendor Specific Class + bInterfaceSubClass 255 Vendor Specific Subclass + bInterfaceProtocol 255 Vendor Specific Protocol + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x84 EP 4 IN + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x04 EP 4 OUT + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 3 + bAlternateSetting 0 + bNumEndpoints 0 + bInterfaceClass 254 Application Specific Interface + bInterfaceSubClass 1 Device Firmware Update + bInterfaceProtocol 0 + iInterface 0 + Device Firmware Upgrade Interface Descriptor: + bLength 7 + bDescriptorType 33 + bmAttributes 7 + Will Not Detach + Manifestation Tolerant + Upload Supported + Download Supported + wDetachTimeout 5000 milliseconds + wTransferSize 64 bytes +Device Status: 0x0001 + Self Powered + +Bus 004 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.1 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0103 power enable connect +Device Status: 0x0001 + Self Powered + +Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/msrtool.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/msrtool.log new file mode 100644 index 00000000..a6d485c7 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/msrtool.log @@ -0,0 +1,25 @@ +syntax: msrtool [-hvqrkl] [-c cpu] [-m system] [-t target ...] + [-i addr=hi[:]lo] | [-s file] | [-d [:]file] | addr... + -h show this help text + -v be verbose + -q be quiet (overrides -v) + -r include [Reserved] values + -k list all known systems and targets + -l list MSRs and bit fields for current target(s) (-kl for ALL targets!) + -c access MSRs on the specified CPU, default=0 + -m force a system, e.g: -m linux + -t force a target, can be used multiple times, e.g: -t geodelx -t cs5536 + -i immediate mode + decode hex addr=hi:lo for the target without reading hw value + e.g: -i 4c00000f=f2f100ff56960004 + -s stream mode + read one MSR address per line and append current hw value to the line + use the filename - for stdin/stdout + using -l -s ignores input and will output all MSRs with values + -d diff mode + read one address and value per line and compare with current hw value, + printing differences to stdout. use the filename - to read from stdin + use :file or :- to reverse diff, normally hw values are considered new + addr.. direct mode, read and decode values for the given MSR address(es) + +No mode or address(es) specified! diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/nvramtool.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/nvramtool.log new file mode 100644 index 00000000..bca46968 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/nvramtool.log @@ -0,0 +1,16 @@ +0000 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ................ +0010 | 00 00 f0 00 03 80 02 00 fc 01 00 00 00 3c 0e 00 | .............<.. +0020 | 00 02 00 00 00 00 01 00 00 bb bb 01 00 00 04 36 | ...............6 +0030 | 00 fc 20 8c ff 01 e0 b8 00 00 00 00 00 00 00 00 | .. ............. +0040 | 41 04 b0 bb 00 03 bb d4 2f 87 d0 70 80 00 00 00 | A......./..p.... +0050 | 00 00 c0 05 52 f8 af 5d 04 5b 0f 02 00 00 00 44 | ....R..].[.....D +0060 | 00 00 ff fd ff a0 02 72 32 07 18 f8 2f 03 07 01 | .......r2.../... +0070 | c5 fe 00 04 70 20 43 12 fc 62 6d 0b 49 53 b2 00 | ....p C..bm.IS.. +0080 | 76 06 00 bd 70 e0 00 45 00 04 b1 d6 c0 00 00 7f | v...p..E........ +0090 | 01 a1 fd ff ff ff a7 fe ff f7 02 c0 19 03 c7 3f | ...............? +00a0 | 00 00 00 00 00 00 00 00 00 68 2d 40 39 00 00 22 | .........h-@9.." +00b0 | 00 00 00 00 88 00 00 3c 00 00 00 00 00 00 00 00 | .......<........ +00c0 | a5 09 bf 07 00 c3 41 20 40 12 fc 00 3c 00 08 00 | ......A @...<... +00d0 | 00 a9 ff 3f ff 43 00 00 00 44 00 00 00 40 00 00 | ...?.C...D...@.. +00e0 | 00 40 00 00 00 40 00 00 00 40 0c 60 00 00 00 00 | .@...@...@.`.... +00f0 | 00 00 00 00 88 c6 fa 03 83 c2 fa 02 00 00 01 bf | ................ diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/pin_hwC0D0 b/docs/future/dumps/logs-t400-bios2.02-ec1.01/pin_hwC0D0 new file mode 100644 index 00000000..61135600 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/pin_hwC0D0 @@ -0,0 +1,8 @@ +0x16 0x022140f0 +0x17 0x61a190f0 +0x18 0x02a190f0 +0x19 0x40f000f0 +0x1a 0x901701f0 +0x1b 0x40f001f0 +0x1c 0x40f001f0 +0x1d 0x90a601f0 diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/superiotool.log b/docs/future/dumps/logs-t400-bios2.02-ec1.01/superiotool.log new file mode 100644 index 00000000..7fc201d3 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/superiotool.log @@ -0,0 +1,170 @@ +superiotool r4.0-8339-g425b61e +Probing for ALi Super I/O at 0x3f0... + Failed. Returned data: id=0xffff, rev=0xff +Probing for ALi Super I/O at 0x370... + Failed. Returned data: id=0xffff, rev=0xff +Probing for Fintek Super I/O at 0x2e... + Failed. Returned data: vid=0xffff, id=0xffff +Probing for Fintek Super I/O at 0x4e... + Failed. Returned data: vid=0xffff, id=0xffff +Probing for Fintek Super I/O at 0x2e... + Failed. Returned data: vid=0xffff, id=0xffff +Probing for Fintek Super I/O at 0x4e... + Failed. Returned data: vid=0xffff, id=0xffff +Probing for ITE Super I/O (init=standard) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8502e) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8761e) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8228e) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=0x87,0x87) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=standard) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8502e) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8761e) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8228e) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=0x87,0x87) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=standard) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8502e) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8761e) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8228e) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=standard) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8502e) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8761e) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8228e) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... + Failed. Returned data: id=0xffff, rev=0xf +Probing for NSC Super I/O at 0x2e... + Failed. Returned data: port=0xff, port+1=0xff +Probing for NSC Super I/O at 0x4e... + Failed. Returned data: port=0xff, port+1=0xff +Probing for NSC Super I/O at 0x15c... + Failed. Returned data: port=0xff, port+1=0xff +Probing for NSC Super I/O at 0x164e... +Found NSC PC87382 (sid=0xf4, srid=0x04) at 0x164e +Register dump: +idx 20 21 22 26 27 29 +val f4 11 60 0e 04 b0 +def f4 11 63 00 00 00 +LDN 0x02 (IR) +idx 30 60 61 70 71 74 75 f0 +val 00 02 f8 03 03 04 04 82 +def 00 02 f8 03 03 04 04 02 +LDN 0x03 (COM1) +idx 30 60 61 70 71 74 75 f0 +val 00 03 f8 04 03 04 04 02 +def 00 03 f8 04 03 04 04 02 +LDN 0x07 (GPIO) +idx 30 60 61 70 71 74 75 f0 f1 f2 +val 01 16 80 00 03 04 04 21 04 00 +def 00 00 00 00 03 04 04 00 MM 01 +LDN 0x19 (Docking LPC switch) +idx 30 60 61 70 71 74 75 +val 01 16 4c 00 00 04 04 +def 00 00 00 00 00 04 04 +Probing for Nuvoton Super I/O at 0x164e... + Failed. Returned data: chip_id=0xf411 +Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e... + Failed. Returned data: sid=0xf4, id=0xf411, rev=0x00 +Probing for Nuvoton Super I/O at 0x2e... + Failed. Returned data: chip_id=0xffff +Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e... + Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 +Probing for Nuvoton Super I/O at 0x4e... + Failed. Returned data: chip_id=0xffff +Probing for Nuvoton Super I/O (sid=0xfc) at 0x4e... + Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... + Failed. Returned data: id=0xf4, rev=0x11 +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... + Failed. Returned data: id=0x00, rev=0x00 +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... + Failed. Returned data: id=0xff, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x2e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x2e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x4e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x4e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x3f0... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x3f0... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x370... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x370... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x250... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x250... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for VIA Super I/O at 0x3f0... + PCI device 1106:0686 not found. +Probing for AMD EC Super I/O at 0xaa... +Probing for Server Engines Super I/O at 0x2e... + Failed. Returned data: id=0xffff, rev=0xff +Probing for Infineon Super I/O at 0x2e... + Failed. Returned data: id=0xff, rev=0xff +Probing for Infineon Super I/O at 0x4e... + Failed. Returned data: id=0xff, rev=0xff diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/t400_flashrom_read_with_bbb.txt b/docs/future/dumps/logs-t400-bios2.02-ec1.01/t400_flashrom_read_with_bbb.txt new file mode 100644 index 00000000..b7f09430 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/t400_flashrom_read_with_bbb.txt @@ -0,0 +1,291 @@ +Script started on Tue Mar 17 23:20:09 2015 +root@beaglebone:~# poweroff./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r x200s.rom
root@beaglebone:~# poweroff[K[K./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r t400recipe__.rom[1@_.rom -V
+flashrom v0.9.7-unknown on Linux 3.8.13-bone69 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+
+flashrom was built with libpci 3.1.9, GCC 4.6.3, little endian
+Command line (5 args): ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r t400recipe___.rom -V
+Calibrating delay loop... OS timer resolution is 4 usecs, 330M loops per second, 10 myus = 11 us, 100 myus = 151 us, 1000 myus = 1072 us, 10000 myus = 10023 us, 16 myus = 17 us, OK.
+Initializing linux_spi programmer
+Using device /dev/spidev1.0
+Using 512 kHz clock
+The following protocols are supported: SPI.
+Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25LQ16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25LQ032/A25LQ32A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25LQ64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DL081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DL161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25F512, 64 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25F512A, 64 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25F1024(A), 128 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25F2048, 256 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25F4096, 512 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB321E, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for ESMT F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for ESMT F25L32PA, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25QH64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25QH128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q20(B), 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q40(B), 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q80(B), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q16(B), 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q32(B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q64(B), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q128B, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25T80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F160S33B8, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F160S33T8, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F320S33B8, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F320S33T8, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F640S33B8, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F640S33T8, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX23L1654, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX23L3254, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX23L6454, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX23L12854, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L512(E)/MX25V512(C), 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L1005(C)/MX25L1006E, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L2005(C), 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L4005(A/C), 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L8005/MX25V8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L1605D/MX25L1608D/MX25L1673E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L6405(D), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L12805(D), 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25U1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25U3235E/F, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25U6435E/F, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25U12835F, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P05, 64 kB: Ignoring RES in favour of RDID.
+Probing for Micron/Numonyx/ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P10, 128 kB: Ignoring RES in favour of RDID.
+Probing for Micron/Numonyx/ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P20-old, 256 kB: Ignoring RES in favour of RDID.
+Probing for Micron/Numonyx/ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
+Probing for Micron/Numonyx/ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PX80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q032..1E, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q032..3E, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q064..1E, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q064..3E, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q128..1E, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q128..3E, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD256C, 32 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD512(C), 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD010(C), 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD020(C), 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD040(C), 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV512(A), 64 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for PMC Pm25LV010, 128 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for PMC Pm25LV010A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Sanyo LE25FW106, 128 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FW406A, 512 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FU406B, 512 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FW203A, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Sanyo LE25FW403A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Sanyo LE25FW418A, 512 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FW806, 1024 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FW808, 1024 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL032A/P, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL064A/P, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL204K, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL208K, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL116K/S25FL216K, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL132K, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL164K, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL127S-64kB, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL127S-256kB, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL128P......0, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL128P......1, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL128S......0, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL128S......1, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL129P......0, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL129P......1, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25LF020A, 256 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for SST SST25LF080(A), 1024 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for SST SST25VF512(A), 64 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF010(A), 128 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF020, 256 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF020B, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q40.V, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q80.V, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q16.V, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q32.V, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q64.V, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q128.V, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q20.W, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q40.W, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q80.W, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q16.W, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q32.W, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q64.W, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Found Winbond flash chip "W25X64" (8192 kB, SPI) on linux_spi.
+Chip status register is 0x00.
+Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found.
+Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond unknown Winbond (ex Nexcom) SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x16
+Found Winbond flash chip "W25X64" (8192 kB, SPI).
+===
+This flash part has status UNTESTED for operations: READ ERASE WRITE
+The test status of this chip may have been updated in the latest development
+version of flashrom. If you are running the latest development version,
+please email a report to flashrom@flashrom.org if any of the above operations
+work correctly for you with this flash chip. Please include the flashrom log
+file for all operations you tested (see the man page for details), and mention
+which mainboard or programmer you tested in the subject line.
+Thanks for your help!
+Reading flash... done.
+root@beaglebone:~# exit
+exit
+ +Script done on Tue Mar 17 23:25:06 2015 diff --git a/docs/future/dumps/logs-t400-bios2.02-ec1.01/t400_flashrom_write_with_bbb.txt b/docs/future/dumps/logs-t400-bios2.02-ec1.01/t400_flashrom_write_with_bbb.txt new file mode 100644 index 00000000..5489e623 --- /dev/null +++ b/docs/future/dumps/logs-t400-bios2.02-ec1.01/t400_flashrom_write_with_bbb.txt @@ -0,0 +1,294 @@ +Script started on Tue Mar 17 23:37:08 2015 +root@beaglebone:~# sudo ./ ./fsh lashrom -p internal - : linux_spi:dev=/dev/spidev1.0 ,spispeed=512 -w t400_8mb_ukqwerty_vesafb.rom -V
+flashrom v0.9.7-unknown on Linux 3.8.13-bone69 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+
+flashrom was built with libpci 3.1.9, GCC 4.6.3, little endian
+Command line (5 args): ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w t400_8mb_ukqwerty_vesafb.rom -V
+Calibrating delay loop... OS timer resolution is 4 usecs, 331M loops per second, 10 myus = 11 us, 100 myus = 149 us, 1000 myus = 1043 us, 10000 myus = 10051 us, 16 myus = 17 us, OK.
+Initializing linux_spi programmer
+Using device /dev/spidev1.0
+Using 512 kHz clock
+The following protocols are supported: SPI.
+Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25LQ16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25LQ032/A25LQ32A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for AMIC A25LQ64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DL081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DL161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25F512, 64 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25F512A, 64 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25F1024(A), 128 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25F2048, 256 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25F4096, 512 kB: probe_spi_at25f: id1 0x00, id2 0x00
+Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB321E, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for ESMT F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for ESMT F25L32PA, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25QH64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25QH128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon EN25S64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q20(B), 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q40(B), 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q80(B), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q16(B), 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q32(B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q64(B), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25Q128B, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for GigaDevice GD25T80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F160S33B8, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F160S33T8, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F320S33B8, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F320S33T8, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F640S33B8, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Intel 25F640S33T8, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX23L1654, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX23L3254, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX23L6454, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX23L12854, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L512(E)/MX25V512(C), 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L1005(C)/MX25L1006E, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L2005(C), 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L4005(A/C), 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L8005/MX25V8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L1605D/MX25L1608D/MX25L1673E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L6405(D), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25L12805(D), 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25U1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25U3235E/F, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25U6435E/F, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix MX25U12835F, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P05, 64 kB: Ignoring RES in favour of RDID.
+Probing for Micron/Numonyx/ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P10, 128 kB: Ignoring RES in favour of RDID.
+Probing for Micron/Numonyx/ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P20-old, 256 kB: Ignoring RES in favour of RDID.
+Probing for Micron/Numonyx/ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
+Probing for Micron/Numonyx/ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PX80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST M45PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q032..1E, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q032..3E, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q064..1E, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q064..3E, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q128..1E, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Micron/Numonyx/ST N25Q128..3E, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Nantronics N25S16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD256C, 32 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD512(C), 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD010(C), 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD020(C), 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LD040(C), 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV512(A), 64 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for PMC Pm25LV010, 128 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for PMC Pm25LV010A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Sanyo LE25FW106, 128 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FW406A, 512 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FU406B, 512 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FW203A, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Sanyo LE25FW403A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Sanyo LE25FW418A, 512 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FW806, 1024 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Sanyo LE25FW808, 1024 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL032A/P, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL064A/P, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL204K, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL208K, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL116K/S25FL216K, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL132K, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL164K, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL127S-64kB, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL127S-256kB, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL128P......0, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL128P......1, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL128S......0, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL128S......1, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL129P......0, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Spansion S25FL129P......1, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25LF020A, 256 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for SST SST25LF080(A), 1024 kB: probe_spi_res2: id1 0x16, id2 0x16
+Probing for SST SST25VF512(A), 64 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF010(A), 128 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF020, 256 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF020B, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x16
+Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST SST25WF080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q40.V, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q80.V, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q16.V, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q32.V, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q64.V, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q128.V, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q20.W, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q40.W, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q80.W, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q16.W, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q32.W, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25Q64.W, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Found Winbond flash chip "W25X64" (8192 kB, SPI) on linux_spi.
+Chip status register is 0x00.
+Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found.
+Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Winbond unknown Winbond (ex Nexcom) SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3017
+Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x16
+Found Winbond flash chip "W25X64" (8192 kB, SPI).
+===
+This flash part has status UNTESTED for operations: READ ERASE WRITE
+The test status of this chip may have been updated in the latest development
+version of flashrom. If you are running the latest development version,
+please email a report to flashrom@flashrom.org if any of the above operations
+work correctly for you with this flash chip. Please include the flashrom log
+file for all operations you tested (see the man page for details), and mention
+which mainboard or programmer you tested in the subject line.
+Thanks for your help!
+Reading old flash chip contents... done.
+Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:EW, 0x001000-0x001fff:EW, 0x002000-0x002fff:W, 0x003000-0x003fff:EW, 0x004000-0x004fff:W, 0x005000-0x005fff:W, 0x006000-0x006fff:W, 0x007000-0x007fff:S, 0x008000-0x008fff:S, 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S, 0x00c000-0x00cfff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S, 0x00f000-0x00ffff:W, 0x010000-0x010fff:W, 0x011000-0x011fff:EW, 0x012000-0x012fff:EW, 0x013000-0x013fff:EW, 0x014000-0x014fff:EW, 0x015000-0x015fff:EW, 0x016000-0x016fff:EW, 0x017000-0x017fff:EW, 0x018000-0x018fff:EW, 0x019000-0x019fff:EW, 0x01a000-0x01afff:EW, 0x01b000-0x01bfff:EW, 0x01c000-0x01cfff:EW, 0x01d000-0x01dfff:EW, 0x01e000-0x01efff:EW, 0x01f000-0x01ffff:EW, 0x020000-0x020fff:EW, 0x021000-0x021fff:EW, 0x022000-0x022fff:EW, 0x023000-0x023fff:EW, 0x024000-0x024fff:EW, 0x025000-0x025fff:EW, 0x026000-0x026fff:EW, 0x027000-0x027fff:EW, 0x028000-0x028fff:EW, 0x029000-0x029fff:EW, 0x02a000-0x02afff:EW, 0x02b000-0x02bfff:EW, 0x02c000-0x02cfff:EW, 0x02d000-0x02dfff:EW, 0x02e000-0x02efff:EW, 0x02f000-0x02ffff:EW, 0x030000-0x030fff:EW, 0x031000-0x031fff:EW, 0x032000-0x032fff:EW, 0x033000-0x033fff:EW, 0x034000-0x034fff:W, 0x035000-0x035fff:W, 0x036000-0x036fff:W, 0x037000-0x037fff:W, 0x038000-0x038fff:W, 0x039000-0x039fff:W, 0x03a000-0x03afff:W, 0x03b000-0x03bfff:W, 0x03c000-0x03cfff:W, 0x03d000-0x03dfff:W, 0x03e000-0x03efff:W, 0x03f000-0x03ffff:W, 0x040000-0x040fff:W, 0x041000-0x041fff:EW, 0x042000-0x042fff:EW, 0x043000-0x043fff:EW, 0x044000-0x044fff:W, 0x045000-0x045fff:W, 0x046000-0x046fff:W, 0x047000-0x047fff:W, 0x048000-0x048fff:W, 0x049000-0x049fff:W, 0x04a000-0x04afff:W, 0x04b000-0x04bfff:W, 0x04c000-0x04cfff:W, 0x04d000-0x04dfff:W, 0x04e000-0x04efff:W, 0x04f000-0x04ffff:W, 0x050000-0x050fff:EW, 0x051000-0x051fff:EW, 0x052000-0x052fff:EW, 0x053000-0x053fff:EW, 0x054000-0x054fff:W, 0x055000-0x055fff:W, 0x056000-0x056fff:W, 0x057000-0x057fff:W, 0x058000-0x058fff:W, 0x059000-0x059fff:W, 0x05a000-0x05afff:W, 0x05b000-0x05bfff:W, 0x05c000-0x05cfff:W, 0x05d000-0x05dfff:W, 0x05e000-0x05efff:W, 0x05f000-0x05ffff:W, 0x060000-0x060fff:W, 0x061000-0x061fff:W, 0x062000-0x062fff:EW, 0x063000-0x063fff:EW, 0x064000-0x064fff:W, 0x065000-0x065fff:W, 0x066000-0x066fff:EW, 0x067000-0x067fff:EW, 0x068000-0x068fff:EW, 0x069000-0x069fff:EW, 0x06a000-0x06afff:EW, 0x06b000-0x06bfff:EW, 0x06c000-0x06cfff:EW, 0x06d000-0x06dfff:EW, 0x06e000-0x06efff:EW, 0x06f000-0x06ffff:EW, 0x070000-0x070fff:EW, 0x071000-0x071fff:EW, 0x072000-0x072fff:EW, 0x073000-0x073fff:EW, 0x074000-0x074fff:EW, 0x075000-0x075fff:EW, 0x076000-0x076fff:EW, 0x077000-0x077fff:EW, 0x078000-0x078fff:EW, 0x079000-0x079fff:EW, 0x07a000-0x07afff:EW, 0x07b000-0x07bfff:EW, 0x07c000-0x07cfff:EW, 0x07d000-0x07dfff:EW, 0x07e000-0x07efff:EW, 0x07f000-0x07ffff:EW, 0x080000-0x080fff:EW, 0x081000-0x081fff:EW, 0x082000-0x082fff:EW, 0x083000-0x083fff:EW, 0x084000-0x084fff:W, 0x085000-0x085fff:W, 0x086000-0x086fff:W, 0x087000-0x087fff:W, 0x088000-0x088fff:W, 0x089000-0x089fff:W, 0x08a000-0x08afff:W, 0x08b000-0x08bfff:W, 0x08c000-0x08cfff:W, 0x08d000-0x08dfff:W, 0x08e000-0x08efff:W, 0x08f000-0x08ffff:W, 0x090000-0x090fff:W, 0x091000-0x091fff:EW, 0x092000-0x092fff:EW, 0x093000-0x093fff:EW, 0x094000-0x094fff:W, 0x095000-0x095fff:W, 0x096000-0x096fff:W, 0x097000-0x097fff:W, 0x098000-0x098fff:W, 0x099000-0x099fff:W, 0x09a000-0x09afff:W, 0x09b000-0x09bfff:W, 0x09c000-0x09cfff:W, 0x09d000-0x09dfff:W, 0x09e000-0x09efff:W, 0x09f000-0x09ffff:W, 0x0a0000-0x0a0fff:W, 0x0a1000-0x0a1fff:W, 0x0a2000-0x0a2fff:EW, 0x0a3000-0x0a3fff:EW, 0x0a4000-0x0a4fff:W, 0x0a5000-0x0a5fff:W, 0x0a6000-0x0a6fff:W, 0x0a7000-0x0a7fff:W, 0x0a8000-0x0a8fff:W, 0x0a9000-0x0a9fff:W, 0x0aa000-0x0aafff:W, 0x0ab000-0x0abfff:W, 0x0ac000-0x0acfff:W, 0x0ad000-0x0adfff:W, 0x0ae000-0x0aefff:W, 0x0af000-0x0affff:W, 0x0b0000-0x0b0fff:W, 0x0b1000-0x0b1fff:W, 0x0b2000-0x0b2fff:EW, 0x0b3000-0x0b3fff:EW, 0x0b4000-0x0b4fff:EW, 0x0b5000-0x0b5fff:EW, 0x0b6000-0x0b6fff:EW, 0x0b7000-0x0b7fff:EW, 0x0b8000-0x0b8fff:EW, 0x0b9000-0x0b9fff:EW, 0x0ba000-0x0bafff:EW, 0x0bb000-0x0bbfff:EW, 0x0bc000-0x0bcfff:EW, 0x0bd000-0x0bdfff:EW, 0x0be000-0x0befff:EW, 0x0bf000-0x0bffff:EW, 0x0c0000-0x0c0fff:EW, 0x0c1000-0x0c1fff:EW, 0x0c2000-0x0c2fff:EW, 0x0c3000-0x0c3fff:W, 0x0c4000-0x0c4fff:W, 0x0c5000-0x0c5fff:W, 0x0c6000-0x0c6fff:W, 0x0c7000-0x0c7fff:W, 0x0c8000-0x0c8fff:W, 0x0c9000-0x0c9fff:W, 0x0ca000-0x0cafff:W, 0x0cb000-0x0cbfff:W, 0x0cc000-0x0ccfff:W, 0x0cd000-0x0cdfff:W, 0x0ce000-0x0cefff:W, 0x0cf000-0x0cffff:W, 0x0d0000-0x0d0fff:W, 0x0d1000-0x0d1fff:W, 0x0d2000-0x0d2fff:EW, 0x0d3000-0x0d3fff:EW, 0x0d4000-0x0d4fff:EW, 0x0d5000-0x0d5fff:EW, 0x0d6000-0x0d6fff:EW, 0x0d7000-0x0d7fff:EW, 0x0d8000-0x0d8fff:EW, 0x0d9000-0x0d9fff:EW, 0x0da000-0x0dafff:EW, 0x0db000-0x0dbfff:EW, 0x0dc000-0x0dcfff:EW, 0x0dd000-0x0ddfff:EW, 0x0de000-0x0defff:EW, 0x0df000-0x0dffff:EW, 0x0e0000-0x0e0fff:EW, 0x0e1000-0x0e1fff:EW, 0x0e2000-0x0e2fff:EW, 0x0e3000-0x0e3fff:EW, 0x0e4000-0x0e4fff:EW, 0x0e5000-0x0e5fff:EW, 0x0e6000-0x0e6fff:EW, 0x0e7000-0x0e7fff:EW, 0x0e8000-0x0e8fff:EW, 0x0e9000-0x0e9fff:EW, 0x0ea000-0x0eafff:EW, 0x0eb000-0x0ebfff:EW, 0x0ec000-0x0ecfff:EW, 0x0ed000-0x0edfff:EW, 0x0ee000-0x0eefff:EW, 0x0ef000-0x0effff:EW, 0x0f0000-0x0f0fff:EW, 0x0f1000-0x0f1fff:EW, 0x0f2000-0x0f2fff:EW, 0x0f3000-0x0f3fff:EW, 0x0f4000-0x0f4fff:EW, 0x0f5000-0x0f5fff:EW, 0x0f6000-0x0f6fff:EW, 0x0f7000-0x0f7fff:EW, 0x0f8000-0x0f8fff:EW, 0x0f9000-0x0f9fff:EW, 0x0fa000-0x0fafff:EW, 0x0fb000-0x0fbfff:EW, 0x0fc000-0x0fcfff:EW, 0x0fd000-0x0fdfff:E, 0x0fe000-0x0fefff:E, 0x0ff000-0x0fffff:E, 0x100000-0x100fff:E, 0x101000-0x101fff:E, 0x102000-0x102fff:E, 0x103000-0x103fff:E, 0x104000-0x104fff:E, 0x105000-0x105fff:E, 0x106000-0x106fff:E, 0x107000-0x107fff:E, 0x108000-0x108fff:E, 0x109000-0x109fff:E, 0x10a000-0x10afff:E, 0x10b000-0x10bfff:E, 0x10c000-0x10cfff:E, 0x10d000-0x10dfff:E, 0x10e000-0x10efff:E, 0x10f000-0x10ffff:E, 0x110000-0x110fff:E, 0x111000-0x111fff:E, 0x112000-0x112fff:E, 0x113000-0x113fff:E, 0x114000-0x114fff:E, 0x115000-0x115fff:E, 0x116000-0x116fff:E, 0x117000-0x117fff:E, 0x118000-0x118fff:E, 0x119000-0x119fff:E, 0x11a000-0x11afff:E, 0x11b000-0x11bfff:E, 0x11c000-0x11cfff:E, 0x11d000-0x11dfff:E, 0x11e000-0x11efff:E, 0x11f000-0x11ffff:E, 0x120000-0x120fff:E, 0x121000-0x121fff:E, 0x122000-0x122fff:E, 0x123000-0x123fff:E, 0x124000-0x124fff:E, 0x125000-0x125fff:E, 0x126000-0x126fff:E, 0x127000-0x127fff:E, 0x128000-0x128fff:E, 0x129000-0x129fff:E, 0x12a000-0x12afff:E, 0x12b000-0x12bfff:E, 0x12c000-0x12cfff:E, 0x12d000-0x12dfff:E, 0x12e000-0x12efff:S, 0x12f000-0x12ffff:S, 0x130000-0x130fff:S, 0x131000-0x131fff:S, 0x132000-0x132fff:S, 0x133000-0x133fff:S, 0x134000-0x134fff:S, 0x135000-0x135fff:S, 0x136000-0x136fff:S, 0x137000-0x137fff:S, 0x138000-0x138fff:S, 0x139000-0x139fff:S, 0x13a000-0x13afff:S, 0x13b000-0x13bfff:S, 0x13c000-0x13cfff:S, 0x13d000-0x13dfff:S, 0x13e000-0x13efff:S, 0x13f000-0x13ffff:S, 0x140000-0x140fff:S, 0x141000-0x141fff:S, 0x142000-0x142fff:S, 0x143000-0x143fff:E, 0x144000-0x144fff:E, 0x145000-0x145fff:E, 0x146000-0x146fff:E, 0x147000-0x147fff:E, 0x148000-0x148fff:E, 0x149000-0x149fff:E, 0x14a000-0x14afff:E, 0x14b000-0x14bfff:E, 0x14c000-0x14cfff:E, 0x14d000-0x14dfff:E, 0x14e000-0x14efff:E, 0x14f000-0x14ffff:E, 0x150000-0x150fff:E, 0x151000-0x151fff:E, 0x152000-0x152fff:E, 0x153000-0x153fff:E, 0x154000-0x154fff:E, 0x155000-0x155fff:E, 0x156000-0x156fff:E, 0x157000-0x157fff:E, 0x158000-0x158fff:E, 0x159000-0x159fff:E, 0x15a000-0x15afff:E, 0x15b000-0x15bfff:E, 0x15c000-0x15cfff:E, 0x15d000-0x15dfff:E, 0x15e000-0x15efff:E, 0x15f000-0x15ffff:E, 0x160000-0x160fff:E, 0x161000-0x161fff:E, 0x162000-0x162fff:E, 0x163000-0x163fff:E, 0x164000-0x164fff:E, 0x165000-0x165fff:E, 0x166000-0x166fff:E, 0x167000-0x167fff:E, 0x168000-0x168fff:E, 0x169000-0x169fff:E, 0x16a000-0x16afff:E, 0x16b000-0x16bfff:E, 0x16c000-0x16cfff:E, 0x16d000-0x16dfff:E, 0x16e000-0x16efff:E, 0x16f000-0x16ffff:E, 0x170000-0x170fff:E, 0x171000-0x171fff:E, 0x172000-0x172fff:E, 0x173000-0x173fff:E, 0x174000-0x174fff:E, 0x175000-0x175fff:E, 0x176000-0x176fff:E, 0x177000-0x177fff:E, 0x178000-0x178fff:E, 0x179000-0x179fff:E, 0x17a000-0x17afff:E, 0x17b000-0x17bfff:E, 0x17c000-0x17cfff:E, 0x17d000-0x17dfff:E, 0x17e000-0x17efff:E, 0x17f000-0x17ffff:E, 0x180000-0x180fff:E, 0x181000-0x181fff:E, 0x182000-0x182fff:E, 0x183000-0x183fff:E, 0x184000-0x184fff:E, 0x185000-0x185fff:E, 0x186000-0x186fff:E, 0x187000-0x187fff:E, 0x188000-0x188fff:E, 0x189000-0x189fff:E, 0x18a000-0x18afff:E, 0x18b000-0x18bfff:E, 0x18c000-0x18cfff:E, 0x18d000-0x18dfff:E, 0x18e000-0x18efff:E, 0x18f000-0x18ffff:E, 0x190000-0x190fff:E, 0x191000-0x191fff:E, 0x192000-0x192fff:E, 0x193000-0x193fff:E, 0x194000-0x194fff:E, 0x195000-0x195fff:E, 0x196000-0x196fff:E, 0x197000-0x197fff:E, 0x198000-0x198fff:E, 0x199000-0x199fff:E, 0x19a000-0x19afff:E, 0x19b000-0x19bfff:E, 0x19c000-0x19cfff:E, 0x19d000-0x19dfff:E, 0x19e000-0x19efff:E, 0x19f000-0x19ffff:E, 0x1a0000-0x1a0fff:E, 0x1a1000-0x1a1fff:E, 0x1a2000-0x1a2fff:E, 0x1a3000-0x1a3fff:E, 0x1a4000-0x1a4fff:E, 0x1a5000-0x1a5fff:E, 0x1a6000-0x1a6fff:E, 0x1a7000-0x1a7fff:E, 0x1a8000-0x1a8fff:E, 0x1a9000-0x1a9fff:E, 0x1aa000-0x1aafff:E, 0x1ab000-0x1abfff:E, 0x1ac000-0x1acfff:E, 0x1ad000-0x1adfff:E, 0x1ae000-0x1aefff:E, 0x1af000-0x1affff:E, 0x1b0000-0x1b0fff:E, 0x1b1000-0x1b1fff:E, 0x1b2000-0x1b2fff:E, 0x1b3000-0x1b3fff:E, 0x1b4000-0x1b4fff:E, 0x1b5000-0x1b5fff:E, 0x1b6000-0x1b6fff:E, 0x1b7000-0x1b7fff:E, 0x1b8000-0x1b8fff:E, 0x1b9000-0x1b9fff:E, 0x1ba000-0x1bafff:E, 0x1bb000-0x1bbfff:E, 0x1bc000-0x1bcfff:E, 0x1bd000-0x1bdfff:E, 0x1be000-0x1befff:E, 0x1bf000-0x1bffff:E, 0x1c0000-0x1c0fff:E, 0x1c1000-0x1c1fff:E, 0x1c2000-0x1c2fff:E, 0x1c3000-0x1c3fff:E, 0x1c4000-0x1c4fff:E, 0x1c5000-0x1c5fff:E, 0x1c6000-0x1c6fff:E, 0x1c7000-0x1c7fff:E, 0x1c8000-0x1c8fff:E, 0x1c9000-0x1c9fff:E, 0x1ca000-0x1cafff:E, 0x1cb000-0x1cbfff:E, 0x1cc000-0x1ccfff:E, 0x1cd000-0x1cdfff:E, 0x1ce000-0x1cefff:E, 0x1cf000-0x1cffff:E, 0x1d0000-0x1d0fff:E, 0x1d1000-0x1d1fff:E, 0x1d2000-0x1d2fff:E, 0x1d3000-0x1d3fff:E, 0x1d4000-0x1d4fff:E, 0x1d5000-0x1d5fff:E, 0x1d6000-0x1d6fff:E, 0x1d7000-0x1d7fff:E, 0x1d8000-0x1d8fff:E, 0x1d9000-0x1d9fff:E, 0x1da000-0x1dafff:E, 0x1db000-0x1dbfff:E, 0x1dc000-0x1dcfff:E, 0x1dd000-0x1ddfff:E, 0x1de000-0x1defff:E, 0x1df000-0x1dffff:E, 0x1e0000-0x1e0fff:E, 0x1e1000-0x1e1fff:E, 0x1e2000-0x1e2fff:E, 0x1e3000-0x1e3fff:E, 0x1e4000-0x1e4fff:E, 0x1e5000-0x1e5fff:E, 0x1e6000-0x1e6fff:E, 0x1e7000-0x1e7fff:E, 0x1e8000-0x1e8fff:E, 0x1e9000-0x1e9fff:E, 0x1ea000-0x1eafff:E, 0x1eb000-0x1ebfff:E, 0x1ec000-0x1ecfff:E, 0x1ed000-0x1edfff:E, 0x1ee000-0x1eefff:E, 0x1ef000-0x1effff:E, 0x1f0000-0x1f0fff:E, 0x1f1000-0x1f1fff:E, 0x1f2000-0x1f2fff:E, 0x1f3000-0x1f3fff:E, 0x1f4000-0x1f4fff:E, 0x1f5000-0x1f5fff:E, 0x1f6000-0x1f6fff:E, 0x1f7000-0x1f7fff:E, 0x1f8000-0x1f8fff:E, 0x1f9000-0x1f9fff:E, 0x1fa000-0x1fafff:E, 0x1fb000-0x1fbfff:E, 0x1fc000-0x1fcfff:E, 0x1fd000-0x1fdfff:E, 0x1fe000-0x1fefff:E, 0x1ff000-0x1fffff:E, 0x200000-0x200fff:E, 0x201000-0x201fff:E, 0x202000-0x202fff:E, 0x203000-0x203fff:E, 0x204000-0x204fff:E, 0x205000-0x205fff:E, 0x206000-0x206fff:E, 0x207000-0x207fff:E, 0x208000-0x208fff:E, 0x209000-0x209fff:E, 0x20a000-0x20afff:E, 0x20b000-0x20bfff:E, 0x20c000-0x20cfff:E, 0x20d000-0x20dfff:E, 0x20e000-0x20efff:E, 0x20f000-0x20ffff:E, 0x210000-0x210fff:E, 0x211000-0x211fff:E, 0x212000-0x212fff:E, 0x213000-0x213fff:E, 0x214000-0x214fff:E, 0x215000-0x215fff:E, 0x216000-0x216fff:E, 0x217000-0x217fff:E, 0x218000-0x218fff:E, 0x219000-0x219fff:E, 0x21a000-0x21afff:E, 0x21b000-0x21bfff:E, 0x21c000-0x21cfff:E, 0x21d000-0x21dfff:E, 0x21e000-0x21efff:E, 0x21f000-0x21ffff:E, 0x220000-0x220fff:E, 0x221000-0x221fff:E, 0x222000-0x222fff:E, 0x223000-0x223fff:E, 0x224000-0x224fff:E, 0x225000-0x225fff:E, 0x226000-0x226fff:E, 0x227000-0x227fff:E, 0x228000-0x228fff:E, 0x229000-0x229fff:E, 0x22a000-0x22afff:E, 0x22b000-0x22bfff:E, 0x22c000-0x22cfff:E, 0x22d000-0x22dfff:E, 0x22e000-0x22efff:E, 0x22f000-0x22ffff:E, 0x230000-0x230fff:E, 0x231000-0x231fff:E, 0x232000-0x232fff:E, 0x233000-0x233fff:E, 0x234000-0x234fff:E, 0x235000-0x235fff:E, 0x236000-0x236fff:E, 0x237000-0x237fff:E, 0x238000-0x238fff:E, 0x239000-0x239fff:E, 0x23a000-0x23afff:E, 0x23b000-0x23bfff:E, 0x23c000-0x23cfff:S, 0x23d000-0x23dfff:S, 0x23e000-0x23efff:S, 0x23f000-0x23ffff:S, 0x240000-0x240fff:S, 0x241000-0x241fff:S, 0x242000-0x242fff:S, 0x243000-0x243fff:S, 0x244000-0x244fff:S, 0x245000-0x245fff:S, 0x246000-0x246fff:S, 0x247000-0x247fff:S, 0x248000-0x248fff:S, 0x249000-0x249fff:S, 0x24a000-0x24afff:S, 0x24b000-0x24bfff:S, 0x24c000-0x24cfff:S, 0x24d000-0x24dfff:S, 0x24e000-0x24efff:S, 0x24f000-0x24ffff:S, 0x250000-0x250fff:S, 0x251000-0x251fff:S, 0x252000-0x252fff:S, 0x253000-0x253fff:S, 0x254000-0x254fff:S, 0x255000-0x255fff:S, 0x256000-0x256fff:S, 0x257000-0x257fff:S, 0x258000-0x258fff:S, 0x259000-0x259fff:S, 0x25a000-0x25afff:S, 0x25b000-0x25bfff:S, 0x25c000-0x25cfff:S, 0x25d000-0x25dfff:S, 0x25e000-0x25efff:S, 0x25f000-0x25ffff:S, 0x260000-0x260fff:S, 0x261000-0x261fff:S, 0x262000-0x262fff:S, 0x263000-0x263fff:S, 0x264000-0x264fff:S, 0x265000-0x265fff:S, 0x266000-0x266fff:S, 0x267000-0x267fff:S, 0x268000-0x268fff:S, 0x269000-0x269fff:S, 0x26a000-0x26afff:S, 0x26b000-0x26bfff:S, 0x26c000-0x26cfff:S, 0x26d000-0x26dfff:S, 0x26e000-0x26efff:S, 0x26f000-0x26ffff:S, 0x270000-0x270fff:S, 0x271000-0x271fff:S, 0x272000-0x272fff:S, 0x273000-0x273fff:S, 0x274000-0x274fff:S, 0x275000-0x275fff:S, 0x276000-0x276fff:S, 0x277000-0x277fff:S, 0x278000-0x278fff:S, 0x279000-0x279fff:S, 0x27a000-0x27afff:S, 0x27b000-0x27bfff:S, 0x27c000-0x27cfff:S, 0x27d000-0x27dfff:S, 0x27e000-0x27efff:S, 0x27f000-0x27ffff:S, 0x280000-0x280fff:S, 0x281000-0x281fff:S, 0x282000-0x282fff:S, 0x283000-0x283fff:S, 0x284000-0x284fff:S, 0x285000-0x285fff:S, 0x286000-0x286fff:S, 0x287000-0x287fff:S, 0x288000-0x288fff:S, 0x289000-0x289fff:S, 0x28a000-0x28afff:S, 0x28b000-0x28bfff:S, 0x28c000-0x28cfff:S, 0x28d000-0x28dfff:S, 0x28e000-0x28efff:S, 0x28f000-0x28ffff:S, 0x290000-0x290fff:S, 0x291000-0x291fff:S, 0x292000-0x292fff:S, 0x293000-0x293fff:S, 0x294000-0x294fff:S, 0x295000-0x295fff:S, 0x296000-0x296fff:S, 0x297000-0x297fff:S, 0x298000-0x298fff:S, 0x299000-0x299fff:S, 0x29a000-0x29afff:S, 0x29b000-0x29bfff:S, 0x29c000-0x29cfff:S, 0x29d000-0x29dfff:S, 0x29e000-0x29efff:S, 0x29f000-0x29ffff:S, 0x2a0000-0x2a0fff:S, 0x2a1000-0x2a1fff:S, 0x2a2000-0x2a2fff:S, 0x2a3000-0x2a3fff:S, 0x2a4000-0x2a4fff:S, 0x2a5000-0x2a5fff:S, 0x2a6000-0x2a6fff:S, 0x2a7000-0x2a7fff:S, 0x2a8000-0x2a8fff:S, 0x2a9000-0x2a9fff:S, 0x2aa000-0x2aafff:S, 0x2ab000-0x2abfff:S, 0x2ac000-0x2acfff:S, 0x2ad000-0x2adfff:S, 0x2ae000-0x2aefff:S, 0x2af000-0x2affff:S, 0x2b0000-0x2b0fff:S, 0x2b1000-0x2b1fff:S, 0x2b2000-0x2b2fff:S, 0x2b3000-0x2b3fff:S, 0x2b4000-0x2b4fff:S, 0x2b5000-0x2b5fff:S, 0x2b6000-0x2b6fff:S, 0x2b7000-0x2b7fff:S, 0x2b8000-0x2b8fff:S, 0x2b9000-0x2b9fff:S, 0x2ba000-0x2bafff:S, 0x2bb000-0x2bbfff:S, 0x2bc000-0x2bcfff:S, 0x2bd000-0x2bdfff:S, 0x2be000-0x2befff:S, 0x2bf000-0x2bffff:S, 0x2c0000-0x2c0fff:S, 0x2c1000-0x2c1fff:S, 0x2c2000-0x2c2fff:S, 0x2c3000-0x2c3fff:S, 0x2c4000-0x2c4fff:S, 0x2c5000-0x2c5fff:S, 0x2c6000-0x2c6fff:S, 0x2c7000-0x2c7fff:S, 0x2c8000-0x2c8fff:S, 0x2c9000-0x2c9fff:S, 0x2ca000-0x2cafff:S, 0x2cb000-0x2cbfff:S, 0x2cc000-0x2ccfff:S, 0x2cd000-0x2cdfff:S, 0x2ce000-0x2cefff:S, 0x2cf000-0x2cffff:S, 0x2d0000-0x2d0fff:S, 0x2d1000-0x2d1fff:S, 0x2d2000-0x2d2fff:S, 0x2d3000-0x2d3fff:S, 0x2d4000-0x2d4fff:S, 0x2d5000-0x2d5fff:S, 0x2d6000-0x2d6fff:S, 0x2d7000-0x2d7fff:S, 0x2d8000-0x2d8fff:S, 0x2d9000-0x2d9fff:S, 0x2da000-0x2dafff:S, 0x2db000-0x2dbfff:S, 0x2dc000-0x2dcfff:S, 0x2dd000-0x2ddfff:S, 0x2de000-0x2defff:S, 0x2df000-0x2dffff:S, 0x2e0000-0x2e0fff:S, 0x2e1000-0x2e1fff:S, 0x2e2000-0x2e2fff:S, 0x2e3000-0x2e3fff:S, 0x2e4000-0x2e4fff:S, 0x2e5000-0x2e5fff:S, 0x2e6000-0x2e6fff:S, 0x2e7000-0x2e7fff:S, 0x2e8000-0x2e8fff:S, 0x2e9000-0x2e9fff:S, 0x2ea000-0x2eafff:S, 0x2eb000-0x2ebfff:S, 0x2ec000-0x2ecfff:S, 0x2ed000-0x2edfff:S, 0x2ee000-0x2eefff:S, 0x2ef000-0x2effff:S, 0x2f0000-0x2f0fff:S, 0x2f1000-0x2f1fff:S, 0x2f2000-0x2f2fff:S, 0x2f3000-0x2f3fff:S, 0x2f4000-0x2f4fff:S, 0x2f5000-0x2f5fff:S, 0x2f6000-0x2f6fff:S, 0x2f7000-0x2f7fff:S, 0x2f8000-0x2f8fff:S, 0x2f9000-0x2f9fff:S, 0x2fa000-0x2fafff:S, 0x2fb000-0x2fbfff:S, 0x2fc000-0x2fcfff:S, 0x2fd000-0x2fdfff:S, 0x2fe000-0x2fefff:S, 0x2ff000-0x2fffff:S, 0x300000-0x300fff:S, 0x301000-0x301fff:S, 0x302000-0x302fff:S, 0x303000-0x303fff:S, 0x304000-0x304fff:S, 0x305000-0x305fff:S, 0x306000-0x306fff:S, 0x307000-0x307fff:S, 0x308000-0x308fff:S, 0x309000-0x309fff:S, 0x30a000-0x30afff:S, 0x30b000-0x30bfff:S, 0x30c000-0x30cfff:S, 0x30d000-0x30dfff:S, 0x30e000-0x30efff:S, 0x30f000-0x30ffff:S, 0x310000-0x310fff:S, 0x311000-0x311fff:S, 0x312000-0x312fff:S, 0x313000-0x313fff:S, 0x314000-0x314fff:S, 0x315000-0x315fff:S, 0x316000-0x316fff:S, 0x317000-0x317fff:S, 0x318000-0x318fff:S, 0x319000-0x319fff:S, 0x31a000-0x31afff:S, 0x31b000-0x31bfff:S, 0x31c000-0x31cfff:S, 0x31d000-0x31dfff:S, 0x31e000-0x31efff:S, 0x31f000-0x31ffff:S, 0x320000-0x320fff:S, 0x321000-0x321fff:S, 0x322000-0x322fff:S, 0x323000-0x323fff:S, 0x324000-0x324fff:S, 0x325000-0x325fff:S, 0x326000-0x326fff:S, 0x327000-0x327fff:S, 0x328000-0x328fff:S, 0x329000-0x329fff:S, 0x32a000-0x32afff:S, 0x32b000-0x32bfff:S, 0x32c000-0x32cfff:S, 0x32d000-0x32dfff:S, 0x32e000-0x32efff:S, 0x32f000-0x32ffff:S, 0x330000-0x330fff:S, 0x331000-0x331fff:S, 0x332000-0x332fff:S, 0x333000-0x333fff:S, 0x334000-0x334fff:S, 0x335000-0x335fff:S, 0x336000-0x336fff:S, 0x337000-0x337fff:S, 0x338000-0x338fff:S, 0x339000-0x339fff:S, 0x33a000-0x33afff:S, 0x33b000-0x33bfff:S, 0x33c000-0x33cfff:S, 0x33d000-0x33dfff:S, 0x33e000-0x33efff:S, 0x33f000-0x33ffff:S, 0x340000-0x340fff:S, 0x341000-0x341fff:S, 0x342000-0x342fff:S, 0x343000-0x343fff:S, 0x344000-0x344fff:S, 0x345000-0x345fff:S, 0x346000-0x346fff:S, 0x347000-0x347fff:S, 0x348000-0x348fff:S, 0x349000-0x349fff:S, 0x34a000-0x34afff:S, 0x34b000-0x34bfff:S, 0x34c000-0x34cfff:S, 0x34d000-0x34dfff:S, 0x34e000-0x34efff:S, 0x34f000-0x34ffff:S, 0x350000-0x350fff:S, 0x351000-0x351fff:S, 0x352000-0x352fff:S, 0x353000-0x353fff:S, 0x354000-0x354fff:S, 0x355000-0x355fff:S, 0x356000-0x356fff:S, 0x357000-0x357fff:S, 0x358000-0x358fff:S, 0x359000-0x359fff:S, 0x35a000-0x35afff:S, 0x35b000-0x35bfff:S, 0x35c000-0x35cfff:S, 0x35d000-0x35dfff:S, 0x35e000-0x35efff:S, 0x35f000-0x35ffff:S, 0x360000-0x360fff:S, 0x361000-0x361fff:S, 0x362000-0x362fff:S, 0x363000-0x363fff:S, 0x364000-0x364fff:S, 0x365000-0x365fff:S, 0x366000-0x366fff:S, 0x367000-0x367fff:S, 0x368000-0x368fff:S, 0x369000-0x369fff:S, 0x36a000-0x36afff:S, 0x36b000-0x36bfff:S, 0x36c000-0x36cfff:S, 0x36d000-0x36dfff:S, 0x36e000-0x36efff:S, 0x36f000-0x36ffff:S, 0x370000-0x370fff:S, 0x371000-0x371fff:S, 0x372000-0x372fff:S, 0x373000-0x373fff:S, 0x374000-0x374fff:S, 0x375000-0x375fff:S, 0x376000-0x376fff:S, 0x377000-0x377fff:S, 0x378000-0x378fff:S, 0x379000-0x379fff:S, 0x37a000-0x37afff:S, 0x37b000-0x37bfff:S, 0x37c000-0x37cfff:S, 0x37d000-0x37dfff:S, 0x37e000-0x37efff:S, 0x37f000-0x37ffff:S, 0x380000-0x380fff:S, 0x381000-0x381fff:S, 0x382000-0x382fff:S, 0x383000-0x383fff:S, 0x384000-0x384fff:S, 0x385000-0x385fff:S, 0x386000-0x386fff:S, 0x387000-0x387fff:S, 0x388000-0x388fff:S, 0x389000-0x389fff:S, 0x38a000-0x38afff:S, 0x38b000-0x38bfff:S, 0x38c000-0x38cfff:S, 0x38d000-0x38dfff:S, 0x38e000-0x38efff:S, 0x38f000-0x38ffff:S, 0x390000-0x390fff:S, 0x391000-0x391fff:S, 0x392000-0x392fff:S, 0x393000-0x393fff:S, 0x394000-0x394fff:S, 0x395000-0x395fff:S, 0x396000-0x396fff:S, 0x397000-0x397fff:S, 0x398000-0x398fff:S, 0x399000-0x399fff:S, 0x39a000-0x39afff:S, 0x39b000-0x39bfff:S, 0x39c000-0x39cfff:S, 0x39d000-0x39dfff:S, 0x39e000-0x39efff:S, 0x39f000-0x39ffff:S, 0x3a0000-0x3a0fff:S, 0x3a1000-0x3a1fff:S, 0x3a2000-0x3a2fff:S, 0x3a3000-0x3a3fff:S, 0x3a4000-0x3a4fff:S, 0x3a5000-0x3a5fff:S, 0x3a6000-0x3a6fff:S, 0x3a7000-0x3a7fff:S, 0x3a8000-0x3a8fff:S, 0x3a9000-0x3a9fff:S, 0x3aa000-0x3aafff:S, 0x3ab000-0x3abfff:S, 0x3ac000-0x3acfff:S, 0x3ad000-0x3adfff:S, 0x3ae000-0x3aefff:S, 0x3af000-0x3affff:S, 0x3b0000-0x3b0fff:S, 0x3b1000-0x3b1fff:S, 0x3b2000-0x3b2fff:S, 0x3b3000-0x3b3fff:S, 0x3b4000-0x3b4fff:S, 0x3b5000-0x3b5fff:S, 0x3b6000-0x3b6fff:S, 0x3b7000-0x3b7fff:S, 0x3b8000-0x3b8fff:S, 0x3b9000-0x3b9fff:S, 0x3ba000-0x3bafff:S, 0x3bb000-0x3bbfff:S, 0x3bc000-0x3bcfff:S, 0x3bd000-0x3bdfff:S, 0x3be000-0x3befff:S, 0x3bf000-0x3bffff:S, 0x3c0000-0x3c0fff:S, 0x3c1000-0x3c1fff:S, 0x3c2000-0x3c2fff:S, 0x3c3000-0x3c3fff:S, 0x3c4000-0x3c4fff:S, 0x3c5000-0x3c5fff:S, 0x3c6000-0x3c6fff:S, 0x3c7000-0x3c7fff:S, 0x3c8000-0x3c8fff:S, 0x3c9000-0x3c9fff:S, 0x3ca000-0x3cafff:S, 0x3cb000-0x3cbfff:S, 0x3cc000-0x3ccfff:S, 0x3cd000-0x3cdfff:S, 0x3ce000-0x3cefff:S, 0x3cf000-0x3cffff:S, 0x3d0000-0x3d0fff:S, 0x3d1000-0x3d1fff:S, 0x3d2000-0x3d2fff:S, 0x3d3000-0x3d3fff:S, 0x3d4000-0x3d4fff:S, 0x3d5000-0x3d5fff:S, 0x3d6000-0x3d6fff:S, 0x3d7000-0x3d7fff:S, 0x3d8000-0x3d8fff:S, 0x3d9000-0x3d9fff:S, 0x3da000-0x3dafff:S, 0x3db000-0x3dbfff:S, 0x3dc000-0x3dcfff:S, 0x3dd000-0x3ddfff:S, 0x3de000-0x3defff:S, 0x3df000-0x3dffff:S, 0x3e0000-0x3e0fff:S, 0x3e1000-0x3e1fff:S, 0x3e2000-0x3e2fff:S, 0x3e3000-0x3e3fff:S, 0x3e4000-0x3e4fff:S, 0x3e5000-0x3e5fff:S, 0x3e6000-0x3e6fff:S, 0x3e7000-0x3e7fff:S, 0x3e8000-0x3e8fff:S, 0x3e9000-0x3e9fff:S, 0x3ea000-0x3eafff:S, 0x3eb000-0x3ebfff:S, 0x3ec000-0x3ecfff:S, 0x3ed000-0x3edfff:S, 0x3ee000-0x3eefff:S, 0x3ef000-0x3effff:S, 0x3f0000-0x3f0fff:S, 0x3f1000-0x3f1fff:S, 0x3f2000-0x3f2fff:S, 0x3f3000-0x3f3fff:S, 0x3f4000-0x3f4fff:S, 0x3f5000-0x3f5fff:S, 0x3f6000-0x3f6fff:S, 0x3f7000-0x3f7fff:S, 0x3f8000-0x3f8fff:S, 0x3f9000-0x3f9fff:S, 0x3fa000-0x3fafff:S, 0x3fb000-0x3fbfff:S, 0x3fc000-0x3fcfff:S, 0x3fd000-0x3fdfff:S, 0x3fe000-0x3fefff:S, 0x3ff000-0x3fffff:S, 0x400000-0x400fff:S, 0x401000-0x401fff:S, 0x402000-0x402fff:S, 0x403000-0x403fff:S, 0x404000-0x404fff:S, 0x405000-0x405fff:S, 0x406000-0x406fff:S, 0x407000-0x407fff:S, 0x408000-0x408fff:S, 0x409000-0x409fff:S, 0x40a000-0x40afff:S, 0x40b000-0x40bfff:S, 0x40c000-0x40cfff:S, 0x40d000-0x40dfff:S, 0x40e000-0x40efff:S, 0x40f000-0x40ffff:S, 0x410000-0x410fff:S, 0x411000-0x411fff:S, 0x412000-0x412fff:S, 0x413000-0x413fff:S, 0x414000-0x414fff:S, 0x415000-0x415fff:S, 0x416000-0x416fff:S, 0x417000-0x417fff:S, 0x418000-0x418fff:S, 0x419000-0x419fff:S, 0x41a000-0x41afff:S, 0x41b000-0x41bfff:S, 0x41c000-0x41cfff:S, 0x41d000-0x41dfff:S, 0x41e000-0x41efff:S, 0x41f000-0x41ffff:S, 0x420000-0x420fff:S, 0x421000-0x421fff:S, 0x422000-0x422fff:S, 0x423000-0x423fff:S, 0x424000-0x424fff:S, 0x425000-0x425fff:S, 0x426000-0x426fff:S, 0x427000-0x427fff:S, 0x428000-0x428fff:S, 0x429000-0x429fff:S, 0x42a000-0x42afff:S, 0x42b000-0x42bfff:S, 0x42c000-0x42cfff:S, 0x42d000-0x42dfff:S, 0x42e000-0x42efff:S, 0x42f000-0x42ffff:S, 0x430000-0x430fff:S, 0x431000-0x431fff:S, 0x432000-0x432fff:S, 0x433000-0x433fff:S, 0x434000-0x434fff:S, 0x435000-0x435fff:S, 0x436000-0x436fff:S, 0x437000-0x437fff:S, 0x438000-0x438fff:S, 0x439000-0x439fff:S, 0x43a000-0x43afff:S, 0x43b000-0x43bfff:S, 0x43c000-0x43cfff:S, 0x43d000-0x43dfff:S, 0x43e000-0x43efff:S, 0x43f000-0x43ffff:S, 0x440000-0x440fff:S, 0x441000-0x441fff:S, 0x442000-0x442fff:S, 0x443000-0x443fff:S, 0x444000-0x444fff:S, 0x445000-0x445fff:S, 0x446000-0x446fff:S, 0x447000-0x447fff:S, 0x448000-0x448fff:S, 0x449000-0x449fff:S, 0x44a000-0x44afff:S, 0x44b000-0x44bfff:S, 0x44c000-0x44cfff:S, 0x44d000-0x44dfff:S, 0x44e000-0x44efff:S, 0x44f000-0x44ffff:S, 0x450000-0x450fff:S, 0x451000-0x451fff:S, 0x452000-0x452fff:S, 0x453000-0x453fff:S, 0x454000-0x454fff:S, 0x455000-0x455fff:S, 0x456000-0x456fff:S, 0x457000-0x457fff:S, 0x458000-0x458fff:S, 0x459000-0x459fff:S, 0x45a000-0x45afff:S, 0x45b000-0x45bfff:S, 0x45c000-0x45cfff:S, 0x45d000-0x45dfff:S, 0x45e000-0x45efff:S, 0x45f000-0x45ffff:S, 0x460000-0x460fff:S, 0x461000-0x461fff:S, 0x462000-0x462fff:S, 0x463000-0x463fff:S, 0x464000-0x464fff:S, 0x465000-0x465fff:S, 0x466000-0x466fff:S, 0x467000-0x467fff:S, 0x468000-0x468fff:S, 0x469000-0x469fff:S, 0x46a000-0x46afff:S, 0x46b000-0x46bfff:S, 0x46c000-0x46cfff:S, 0x46d000-0x46dfff:S, 0x46e000-0x46efff:S, 0x46f000-0x46ffff:S, 0x470000-0x470fff:S, 0x471000-0x471fff:S, 0x472000-0x472fff:S, 0x473000-0x473fff:S, 0x474000-0x474fff:S, 0x475000-0x475fff:S, 0x476000-0x476fff:S, 0x477000-0x477fff:S, 0x478000-0x478fff:S, 0x479000-0x479fff:S, 0x47a000-0x47afff:S, 0x47b000-0x47bfff:S, 0x47c000-0x47cfff:S, 0x47d000-0x47dfff:S, 0x47e000-0x47efff:S, 0x47f000-0x47ffff:S, 0x480000-0x480fff:S, 0x481000-0x481fff:S, 0x482000-0x482fff:S, 0x483000-0x483fff:S, 0x484000-0x484fff:S, 0x485000-0x485fff:S, 0x486000-0x486fff:S, 0x487000-0x487fff:S, 0x488000-0x488fff:S, 0x489000-0x489fff:S, 0x48a000-0x48afff:S, 0x48b000-0x48bfff:S, 0x48c000-0x48cfff:S, 0x48d000-0x48dfff:S, 0x48e000-0x48efff:S, 0x48f000-0x48ffff:S, 0x490000-0x490fff:S, 0x491000-0x491fff:S, 0x492000-0x492fff:S, 0x493000-0x493fff:S, 0x494000-0x494fff:S, 0x495000-0x495fff:S, 0x496000-0x496fff:S, 0x497000-0x497fff:S, 0x498000-0x498fff:S, 0x499000-0x499fff:S, 0x49a000-0x49afff:S, 0x49b000-0x49bfff:S, 0x49c000-0x49cfff:S, 0x49d000-0x49dfff:S, 0x49e000-0x49efff:S, 0x49f000-0x49ffff:S, 0x4a0000-0x4a0fff:S, 0x4a1000-0x4a1fff:S, 0x4a2000-0x4a2fff:S, 0x4a3000-0x4a3fff:S, 0x4a4000-0x4a4fff:S, 0x4a5000-0x4a5fff:S, 0x4a6000-0x4a6fff:S, 0x4a7000-0x4a7fff:S, 0x4a8000-0x4a8fff:S, 0x4a9000-0x4a9fff:S, 0x4aa000-0x4aafff:S, 0x4ab000-0x4abfff:S, 0x4ac000-0x4acfff:S, 0x4ad000-0x4adfff:S, 0x4ae000-0x4aefff:S, 0x4af000-0x4affff:S, 0x4b0000-0x4b0fff:S, 0x4b1000-0x4b1fff:S, 0x4b2000-0x4b2fff:S, 0x4b3000-0x4b3fff:S, 0x4b4000-0x4b4fff:S, 0x4b5000-0x4b5fff:S, 0x4b6000-0x4b6fff:S, 0x4b7000-0x4b7fff:S, 0x4b8000-0x4b8fff:S, 0x4b9000-0x4b9fff:S, 0x4ba000-0x4bafff:S, 0x4bb000-0x4bbfff:S, 0x4bc000-0x4bcfff:S, 0x4bd000-0x4bdfff:S, 0x4be000-0x4befff:S, 0x4bf000-0x4bffff:S, 0x4c0000-0x4c0fff:S, 0x4c1000-0x4c1fff:S, 0x4c2000-0x4c2fff:S, 0x4c3000-0x4c3fff:S, 0x4c4000-0x4c4fff:S, 0x4c5000-0x4c5fff:S, 0x4c6000-0x4c6fff:S, 0x4c7000-0x4c7fff:S, 0x4c8000-0x4c8fff:S, 0x4c9000-0x4c9fff:S, 0x4ca000-0x4cafff:S, 0x4cb000-0x4cbfff:S, 0x4cc000-0x4ccfff:S, 0x4cd000-0x4cdfff:S, 0x4ce000-0x4cefff:S, 0x4cf000-0x4cffff:S, 0x4d0000-0x4d0fff:S, 0x4d1000-0x4d1fff:S, 0x4d2000-0x4d2fff:S, 0x4d3000-0x4d3fff:S, 0x4d4000-0x4d4fff:S, 0x4d5000-0x4d5fff:S, 0x4d6000-0x4d6fff:S, 0x4d7000-0x4d7fff:S, 0x4d8000-0x4d8fff:S, 0x4d9000-0x4d9fff:S, 0x4da000-0x4dafff:S, 0x4db000-0x4dbfff:S, 0x4dc000-0x4dcfff:S, 0x4dd000-0x4ddfff:S, 0x4de000-0x4defff:S, 0x4df000-0x4dffff:S, 0x4e0000-0x4e0fff:S, 0x4e1000-0x4e1fff:S, 0x4e2000-0x4e2fff:S, 0x4e3000-0x4e3fff:S, 0x4e4000-0x4e4fff:S, 0x4e5000-0x4e5fff:S, 0x4e6000-0x4e6fff:S, 0x4e7000-0x4e7fff:S, 0x4e8000-0x4e8fff:S, 0x4e9000-0x4e9fff:S, 0x4ea000-0x4eafff:S, 0x4eb000-0x4ebfff:S, 0x4ec000-0x4ecfff:S, 0x4ed000-0x4edfff:S, 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0x51d000-0x51dfff:S, 0x51e000-0x51efff:S, 0x51f000-0x51ffff:S, 0x520000-0x520fff:S, 0x521000-0x521fff:S, 0x522000-0x522fff:S, 0x523000-0x523fff:S, 0x524000-0x524fff:S, 0x525000-0x525fff:S, 0x526000-0x526fff:S, 0x527000-0x527fff:S, 0x528000-0x528fff:S, 0x529000-0x529fff:S, 0x52a000-0x52afff:S, 0x52b000-0x52bfff:S, 0x52c000-0x52cfff:S, 0x52d000-0x52dfff:S, 0x52e000-0x52efff:S, 0x52f000-0x52ffff:S, 0x530000-0x530fff:S, 0x531000-0x531fff:S, 0x532000-0x532fff:S, 0x533000-0x533fff:S, 0x534000-0x534fff:S, 0x535000-0x535fff:S, 0x536000-0x536fff:S, 0x537000-0x537fff:S, 0x538000-0x538fff:S, 0x539000-0x539fff:S, 0x53a000-0x53afff:S, 0x53b000-0x53bfff:S, 0x53c000-0x53cfff:S, 0x53d000-0x53dfff:S, 0x53e000-0x53efff:S, 0x53f000-0x53ffff:S, 0x540000-0x540fff:S, 0x541000-0x541fff:S, 0x542000-0x542fff:S, 0x543000-0x543fff:S, 0x544000-0x544fff:S, 0x545000-0x545fff:S, 0x546000-0x546fff:S, 0x547000-0x547fff:S, 0x548000-0x548fff:S, 0x549000-0x549fff:S, 0x54a000-0x54afff:S, 0x54b000-0x54bfff:S, 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0x722000-0x722fff:E, 0x723000-0x723fff:E, 0x724000-0x724fff:E, 0x725000-0x725fff:E, 0x726000-0x726fff:E, 0x727000-0x727fff:E, 0x728000-0x728fff:E, 0x729000-0x729fff:E, 0x72a000-0x72afff:E, 0x72b000-0x72bfff:E, 0x72c000-0x72cfff:E, 0x72d000-0x72dfff:E, 0x72e000-0x72efff:E, 0x72f000-0x72ffff:E, 0x730000-0x730fff:E, 0x731000-0x731fff:E, 0x732000-0x732fff:E, 0x733000-0x733fff:E, 0x734000-0x734fff:E, 0x735000-0x735fff:E, 0x736000-0x736fff:E, 0x737000-0x737fff:E, 0x738000-0x738fff:E, 0x739000-0x739fff:E, 0x73a000-0x73afff:E, 0x73b000-0x73bfff:E, 0x73c000-0x73cfff:E, 0x73d000-0x73dfff:E, 0x73e000-0x73efff:E, 0x73f000-0x73ffff:E, 0x740000-0x740fff:E, 0x741000-0x741fff:E, 0x742000-0x742fff:E, 0x743000-0x743fff:E, 0x744000-0x744fff:E, 0x745000-0x745fff:E, 0x746000-0x746fff:E, 0x747000-0x747fff:E, 0x748000-0x748fff:E, 0x749000-0x749fff:E, 0x74a000-0x74afff:E, 0x74b000-0x74bfff:E, 0x74c000-0x74cfff:E, 0x74d000-0x74dfff:E, 0x74e000-0x74efff:E, 0x74f000-0x74ffff:E, 0x750000-0x750fff:E, 0x751000-0x751fff:E, 0x752000-0x752fff:E, 0x753000-0x753fff:E, 0x754000-0x754fff:E, 0x755000-0x755fff:E, 0x756000-0x756fff:E, 0x757000-0x757fff:E, 0x758000-0x758fff:E, 0x759000-0x759fff:E, 0x75a000-0x75afff:E, 0x75b000-0x75bfff:E, 0x75c000-0x75cfff:E, 0x75d000-0x75dfff:E, 0x75e000-0x75efff:E, 0x75f000-0x75ffff:E, 0x760000-0x760fff:E, 0x761000-0x761fff:E, 0x762000-0x762fff:E, 0x763000-0x763fff:E, 0x764000-0x764fff:E, 0x765000-0x765fff:E, 0x766000-0x766fff:E, 0x767000-0x767fff:E, 0x768000-0x768fff:E, 0x769000-0x769fff:E, 0x76a000-0x76afff:E, 0x76b000-0x76bfff:E, 0x76c000-0x76cfff:E, 0x76d000-0x76dfff:E, 0x76e000-0x76efff:E, 0x76f000-0x76ffff:E, 0x770000-0x770fff:E, 0x771000-0x771fff:E, 0x772000-0x772fff:E, 0x773000-0x773fff:E, 0x774000-0x774fff:E, 0x775000-0x775fff:E, 0x776000-0x776fff:E, 0x777000-0x777fff:E, 0x778000-0x778fff:E, 0x779000-0x779fff:E, 0x77a000-0x77afff:E, 0x77b000-0x77bfff:E, 0x77c000-0x77cfff:E, 0x77d000-0x77dfff:E, 0x77e000-0x77efff:E, 0x77f000-0x77ffff:E, 0x780000-0x780fff:E, 0x781000-0x781fff:E, 0x782000-0x782fff:E, 0x783000-0x783fff:E, 0x784000-0x784fff:E, 0x785000-0x785fff:E, 0x786000-0x786fff:E, 0x787000-0x787fff:E, 0x788000-0x788fff:E, 0x789000-0x789fff:E, 0x78a000-0x78afff:E, 0x78b000-0x78bfff:E, 0x78c000-0x78cfff:E, 0x78d000-0x78dfff:E, 0x78e000-0x78efff:E, 0x78f000-0x78ffff:E, 0x790000-0x790fff:E, 0x791000-0x791fff:E, 0x792000-0x792fff:E, 0x793000-0x793fff:E, 0x794000-0x794fff:E, 0x795000-0x795fff:E, 0x796000-0x796fff:E, 0x797000-0x797fff:E, 0x798000-0x798fff:E, 0x799000-0x799fff:E, 0x79a000-0x79afff:E, 0x79b000-0x79bfff:E, 0x79c000-0x79cfff:E, 0x79d000-0x79dfff:E, 0x79e000-0x79efff:E, 0x79f000-0x79ffff:E, 0x7a0000-0x7a0fff:E, 0x7a1000-0x7a1fff:E, 0x7a2000-0x7a2fff:E, 0x7a3000-0x7a3fff:E, 0x7a4000-0x7a4fff:E, 0x7a5000-0x7a5fff:E, 0x7a6000-0x7a6fff:E, 0x7a7000-0x7a7fff:E, 0x7a8000-0x7a8fff:E, 0x7a9000-0x7a9fff:E, 0x7aa000-0x7aafff:E, 0x7ab000-0x7abfff:E, 0x7ac000-0x7acfff:E, 0x7ad000-0x7adfff:E, 0x7ae000-0x7aefff:E, 0x7af000-0x7affff:E, 0x7b0000-0x7b0fff:E, 0x7b1000-0x7b1fff:E, 0x7b2000-0x7b2fff:E, 0x7b3000-0x7b3fff:E, 0x7b4000-0x7b4fff:E, 0x7b5000-0x7b5fff:E, 0x7b6000-0x7b6fff:E, 0x7b7000-0x7b7fff:E, 0x7b8000-0x7b8fff:E, 0x7b9000-0x7b9fff:E, 0x7ba000-0x7bafff:E, 0x7bb000-0x7bbfff:E, 0x7bc000-0x7bcfff:E, 0x7bd000-0x7bdfff:E, 0x7be000-0x7befff:S, 0x7bf000-0x7bffff:S, 0x7c0000-0x7c0fff:S, 0x7c1000-0x7c1fff:S, 0x7c2000-0x7c2fff:S, 0x7c3000-0x7c3fff:S, 0x7c4000-0x7c4fff:S, 0x7c5000-0x7c5fff:S, 0x7c6000-0x7c6fff:S, 0x7c7000-0x7c7fff:S, 0x7c8000-0x7c8fff:S, 0x7c9000-0x7c9fff:S, 0x7ca000-0x7cafff:S, 0x7cb000-0x7cbfff:S, 0x7cc000-0x7ccfff:S, 0x7cd000-0x7cdfff:S, 0x7ce000-0x7cefff:S, 0x7cf000-0x7cffff:S, 0x7d0000-0x7d0fff:S, 0x7d1000-0x7d1fff:S, 0x7d2000-0x7d2fff:S, 0x7d3000-0x7d3fff:S, 0x7d4000-0x7d4fff:S, 0x7d5000-0x7d5fff:S, 0x7d6000-0x7d6fff:S, 0x7d7000-0x7d7fff:S, 0x7d8000-0x7d8fff:S, 0x7d9000-0x7d9fff:S, 0x7da000-0x7dafff:S, 0x7db000-0x7dbfff:S, 0x7dc000-0x7dcfff:S, 0x7dd000-0x7ddfff:S, 0x7de000-0x7defff:S, 0x7df000-0x7dffff:E, 0x7e0000-0x7e0fff:E, 0x7e1000-0x7e1fff:E, 0x7e2000-0x7e2fff:E, 0x7e3000-0x7e3fff:E, 0x7e4000-0x7e4fff:E, 0x7e5000-0x7e5fff:E, 0x7e6000-0x7e6fff:E, 0x7e7000-0x7e7fff:E, 0x7e8000-0x7e8fff:E, 0x7e9000-0x7e9fff:E, 0x7ea000-0x7eafff:E, 0x7eb000-0x7ebfff:E, 0x7ec000-0x7ecfff:E, 0x7ed000-0x7edfff:E, 0x7ee000-0x7eefff:E, 0x7ef000-0x7effff:E, 0x7f0000-0x7f0fff:E, 0x7f1000-0x7f1fff:E, 0x7f2000-0x7f2fff:E, 0x7f3000-0x7f3fff:E, 0x7f4000-0x7f4fff:E, 0x7f5000-0x7f5fff:E, 0x7f6000-0x7f6fff:E, 0x7f7000-0x7f7fff:E, 0x7f8000-0x7f8fff:E, 0x7f9000-0x7f9fff:E, 0x7fa000-0x7fafff:E, 0x7fb000-0x7fbfff:E, 0x7fc000-0x7fcfff:E, 0x7fd000-0x7fdfff:E, 0x7fe000-0x7fefff:E, 0x7ff000-0x7fffff:EW
+Erase/write done.
+Verifying flash... VERIFIED.
+root@beaglebone:~# exit
+exit
+ +Script done on Tue Mar 17 23:49:48 2015 diff --git a/docs/future/dumps/pte_x60_6718/dmesg b/docs/future/dumps/pte_x60_6718/dmesg new file mode 100644 index 00000000..2e84f944 --- /dev/null +++ b/docs/future/dumps/pte_x60_6718/dmesg @@ -0,0 +1,2071 @@ +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 3.13.0-34-generic (root@devel.trisquel.info) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #0trisquel2 SMP Wed Aug 27 02:19:14 UTC 2014 (Ubuntu 3.13.0-34.60+7.0trisquel2-generic 3.13.11.4-gnu) +[ 0.000000] Command line: BOOT_IMAGE=/vmlinuz root=/dev/mapper/buzz-distro cryptdevice=/dev/mapper/buzz-distro:root quiet splash drm.debug=0x06 ro +[ 0.000000] KERNEL supported cpus: +[ 0.000000] Intel GenuineIntel +[ 0.000000] AMD AuthenticAMD +[ 0.000000] Centaur CentaurHauls +[ 0.000000] e820: BIOS-provided physical RAM map: +[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000000fff] type 16 +[ 0.000000] BIOS-e820: [mem 0x0000000000001000-0x000000000009ffff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000000c0000-0x00000000000fffff] reserved +[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000007f6d4fff] usable +[ 0.000000] BIOS-e820: [mem 0x000000007f6d5000-0x000000007f7fffff] type 16 +[ 0.000000] BIOS-e820: [mem 0x000000007f800000-0x000000007fffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000f0000000-0x00000000f3ffffff] reserved +[ 0.000000] NX (Execute Disable) protection: active +[ 0.000000] SMBIOS 2.7 present. +[ 0.000000] DMI: LENOVO 1702L8G/1702L8G, BIOS CBET4000 7BETC7WW (2.08 ) 08/30/2014 +[ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved +[ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable +[ 0.000000] No AGP bridge found +[ 0.000000] e820: last_pfn = 0x7f6d5 max_arch_pfn = 0x400000000 +[ 0.000000] MTRR default type: uncachable +[ 0.000000] MTRR fixed ranges enabled: +[ 0.000000] 00000-9FFFF write-back +[ 0.000000] A0000-BFFFF uncachable +[ 0.000000] C0000-FFFFF write-back +[ 0.000000] MTRR variable ranges enabled: +[ 0.000000] 0 base 000000000 mask F80000000 write-back +[ 0.000000] 1 base 07F800000 mask FFF800000 uncachable +[ 0.000000] 2 base 0D0000000 mask FF0000000 write-combining +[ 0.000000] 3 disabled +[ 0.000000] 4 disabled +[ 0.000000] 5 disabled +[ 0.000000] 6 disabled +[ 0.000000] 7 disabled +[ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 +[ 0.000000] found SMP MP-table at [mem 0x000f0400-0x000f040f] mapped at [ffff8800000f0400] +[ 0.000000] Scanning 1 areas for low memory corruption +[ 0.000000] Base memory trampoline at [ffff880000099000] 99000 size 24576 +[ 0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff] +[ 0.000000] [mem 0x00000000-0x000fffff] page 4k +[ 0.000000] BRK [0x01fe0000, 0x01fe0fff] PGTABLE +[ 0.000000] BRK [0x01fe1000, 0x01fe1fff] PGTABLE +[ 0.000000] BRK [0x01fe2000, 0x01fe2fff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x7f400000-0x7f5fffff] +[ 0.000000] [mem 0x7f400000-0x7f5fffff] page 2M +[ 0.000000] BRK [0x01fe3000, 0x01fe3fff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x7c000000-0x7f3fffff] +[ 0.000000] [mem 0x7c000000-0x7f3fffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x00100000-0x7bffffff] +[ 0.000000] [mem 0x00100000-0x001fffff] page 4k +[ 0.000000] [mem 0x00200000-0x7bffffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x7f600000-0x7f6d4fff] +[ 0.000000] [mem 0x7f600000-0x7f6d4fff] page 4k +[ 0.000000] BRK [0x01fe4000, 0x01fe4fff] PGTABLE +[ 0.000000] RAMDISK: [mem 0x35122000-0x36888fff] +[ 0.000000] ACPI: RSDP 00000000000f0800 000024 (v02 CORE ) +[ 0.000000] ACPI: XSDT 000000007f7de0e0 00004C (v01 CORE COREBOOT 00000000 CORE 00000000) +[ 0.000000] ACPI: HPET 000000007f7de210 000038 (v01 CORE COREBOOT 00000000 CORE 00000000) +[ 0.000000] ACPI: APIC 000000007f7de250 000068 (v01 CORE COREBOOT 00000000 CORE 00000000) +[ 0.000000] ACPI: MCFG 000000007f7de2c0 00003C (v01 CORE COREBOOT 00000000 CORE 00000000) +[ 0.000000] ACPI: FACP 000000007f7e15c0 0000F4 (v03 CORE COREBOOT 00000000 CORE 00000000) +[ 0.000000] ACPI: DSDT 000000007f7de340 003171 (v03 COREv4 COREBOOT 20090419 INTL 20140114) +[ 0.000000] ACPI: FACS 000000007f7de300 000040 +[ 0.000000] ACPI: SSDT 000000007f7e16c0 000306 (v02 CORE COREBOOT 0000002A CORE 0000002A) +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] No NUMA configuration found +[ 0.000000] Faking a node at [mem 0x0000000000000000-0x000000007f6d4fff] +[ 0.000000] Initmem setup node 0 [mem 0x00000000-0x7f6d4fff] +[ 0.000000] NODE_DATA [mem 0x7f6d0000-0x7f6d4fff] +[ 0.000000] [ffffea0000000000-ffffea0001ffffff] PMD -> [ffff88007ce00000-ffff88007edfffff] on node 0 +[ 0.000000] Zone ranges: +[ 0.000000] DMA [mem 0x00001000-0x00ffffff] +[ 0.000000] DMA32 [mem 0x01000000-0xffffffff] +[ 0.000000] Normal empty +[ 0.000000] Movable zone start for each node +[ 0.000000] Early memory node ranges +[ 0.000000] node 0: [mem 0x00001000-0x0009ffff] +[ 0.000000] node 0: [mem 0x00100000-0x7f6d4fff] +[ 0.000000] On node 0 totalpages: 521844 +[ 0.000000] DMA zone: 64 pages used for memmap +[ 0.000000] DMA zone: 22 pages reserved +[ 0.000000] DMA zone: 3999 pages, LIFO batch:0 +[ 0.000000] DMA32 zone: 8092 pages used for memmap +[ 0.000000] DMA32 zone: 517845 pages, LIFO batch:31 +[ 0.000000] ACPI: PM-Timer IO Port: 0x508 +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) +[ 0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) +[ 0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23 +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge) +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) +[ 0.000000] ACPI: IRQ0 used by override. +[ 0.000000] ACPI: IRQ2 used by override. +[ 0.000000] ACPI: IRQ9 used by override. +[ 0.000000] Using ACPI (MADT) for SMP configuration information +[ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000 +[ 0.000000] smpboot: Allowing 2 CPUs, 0 hotplug CPUs +[ 0.000000] nr_irqs_gsi: 40 +[ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000bffff] +[ 0.000000] PM: Registered nosave memory: [mem 0x000c0000-0x000fffff] +[ 0.000000] e820: [mem 0x80000000-0xefffffff] available for PCI devices +[ 0.000000] Booting paravirtualized kernel on bare hardware +[ 0.000000] setup_percpu: NR_CPUS:256 nr_cpumask_bits:256 nr_cpu_ids:2 nr_node_ids:1 +[ 0.000000] PERCPU: Embedded 29 pages/cpu @ffff88007f400000 s86336 r8192 d24256 u1048576 +[ 0.000000] pcpu-alloc: s86336 r8192 d24256 u1048576 alloc=1*2097152 +[ 0.000000] pcpu-alloc: [0] 0 1 +[ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 513666 +[ 0.000000] Policy zone: DMA32 +[ 0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz root=/dev/mapper/buzz-distro cryptdevice=/dev/mapper/buzz-distro:root quiet splash drm.debug=0x06 ro +[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.000000] Checking aperture... +[ 0.000000] No AGP bridge found +[ 0.000000] Calgary: detecting Calgary via BIOS EBDA area +[ 0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing! +[ 0.000000] Memory: 2013772K/2087376K available (7391K kernel code, 1145K rwdata, 3416K rodata, 1336K init, 1440K bss, 73604K reserved) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Hierarchical RCU implementation. +[ 0.000000] RCU dyntick-idle grace-period acceleration is enabled. +[ 0.000000] RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2. +[ 0.000000] Offload RCU callbacks from all CPUs +[ 0.000000] Offload RCU callbacks from CPUs: 0-1. +[ 0.000000] NR_IRQS:16640 nr_irqs:512 16 +[ 0.000000] Console: colour VGA+ 80x25 +[ 0.000000] console [tty0] enabled +[ 0.000000] allocated 8388608 bytes of page_cgroup +[ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups +[ 0.000000] hpet clockevent registered +[ 0.000000] tsc: Fast TSC calibration using PIT +[ 0.000000] tsc: Detected 1496.227 MHz processor +[ 0.004006] Calibrating delay loop (skipped), value calculated using timer frequency.. 2992.45 BogoMIPS (lpj=5984908) +[ 0.004013] pid_max: default: 32768 minimum: 301 +[ 0.004059] Security Framework initialized +[ 0.004095] AppArmor: AppArmor initialized +[ 0.004097] Yama: becoming mindful. +[ 0.004475] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes) +[ 0.008553] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes) +[ 0.009333] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.009340] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.009749] Initializing cgroup subsys memory +[ 0.009764] Initializing cgroup subsys devices +[ 0.009767] Initializing cgroup subsys freezer +[ 0.009771] Initializing cgroup subsys blkio +[ 0.009775] Initializing cgroup subsys bfqio +[ 0.009778] Initializing cgroup subsys perf_event +[ 0.009783] Initializing cgroup subsys hugetlb +[ 0.009821] CPU: Physical Processor ID: 0 +[ 0.009823] CPU: Processor Core ID: 0 +[ 0.009827] mce: CPU supports 6 MCE banks +[ 0.009839] CPU0: Thermal monitoring enabled (TM2) +[ 0.009850] Last level iTLB entries: 4KB 128, 2MB 4, 4MB 4 +[ 0.009850] Last level dTLB entries: 4KB 256, 2MB 0, 4MB 32 +[ 0.009850] tlb_flushall_shift: -1 +[ 0.010001] Freeing SMP alternatives memory: 32K (ffffffff81e6e000 - ffffffff81e76000) +[ 0.012383] ACPI: Core revision 20131115 +[ 0.015473] ACPI: All ACPI Tables successfully acquired +[ 0.016025] ftrace: allocating 28599 entries in 112 pages +[ 0.028599] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 +[ 0.070880] smpboot: CPU0: Intel(R) Core(TM)2 CPU L7400 @ 1.50GHz (fam: 06, model: 0f, stepping: 06) +[ 0.072000] Performance Events: PEBS fmt0-, 4-deep LBR, Core2 events, Intel PMU driver. +[ 0.072000] perf_event_intel: PEBS disabled due to CPU errata +[ 0.072000] ... version: 2 +[ 0.072000] ... bit width: 40 +[ 0.072000] ... generic registers: 2 +[ 0.072000] ... value mask: 000000ffffffffff +[ 0.072000] ... max period: 000000007fffffff +[ 0.072000] ... fixed-purpose events: 3 +[ 0.072000] ... event mask: 0000000700000003 +[ 0.072000] x86: Booting SMP configuration: +[ 0.072000] .... node #0, CPUs: #1 +[ 0.084066] x86: Booted up 1 node, 2 CPUs +[ 0.084074] smpboot: Total of 2 processors activated (5984.90 BogoMIPS) +[ 0.084177] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter. +[ 0.088071] devtmpfs: initialized +[ 0.098352] EVM: security.selinux +[ 0.098355] EVM: security.SMACK64 +[ 0.098357] EVM: security.ima +[ 0.098359] EVM: security.capability +[ 0.100096] pinctrl core: initialized pinctrl subsystem +[ 0.100211] regulator-dummy: no parameters +[ 0.100257] RTC time: 21:49:54, date: 08/31/14 +[ 0.100319] NET: Registered protocol family 16 +[ 0.100522] cpuidle: using governor ladder +[ 0.100525] cpuidle: using governor menu +[ 0.100592] ACPI: bus type PCI registered +[ 0.100595] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 +[ 0.100691] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf0000000-0xf3ffffff] (base 0xf0000000) +[ 0.100695] PCI: MMCONFIG at [mem 0xf0000000-0xf3ffffff] reserved in E820 +[ 0.105678] PCI: Using configuration type 1 for base access +[ 0.108094] bio: create slab <bio-0> at 0 +[ 0.108141] ACPI: Added _OSI(Module Device) +[ 0.108144] ACPI: Added _OSI(Processor Device) +[ 0.108147] ACPI: Added _OSI(3.0 _SCP Extensions) +[ 0.108149] ACPI: Added _OSI(Processor Aggregator Device) +[ 0.111400] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored +[ 0.111850] ACPI: Interpreter enabled +[ 0.111859] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20131115/hwxface-580) +[ 0.111867] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20131115/hwxface-580) +[ 0.111889] ACPI: (supports S0 S3 S4 S5) +[ 0.111892] ACPI: Using IOAPIC for interrupt routing +[ 0.111927] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug +[ 0.112256] ACPI: ACPI Dock Station Driver: 1 docks/bays found +[ 0.121379] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff]) +[ 0.121389] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] +[ 0.121498] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability] +[ 0.121642] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge +[ 0.121922] PCI host bridge to bus 0000:00 +[ 0.121927] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.121931] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7] +[ 0.121935] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff] +[ 0.121938] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff] +[ 0.121942] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff] +[ 0.121945] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff] +[ 0.121948] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff] +[ 0.121951] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff] +[ 0.121955] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff] +[ 0.121958] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff] +[ 0.121961] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff] +[ 0.121965] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff] +[ 0.121968] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff] +[ 0.121971] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff] +[ 0.121975] pci_bus 0000:00: root bus resource [mem 0x000e8000-0x000ebfff] +[ 0.121978] pci_bus 0000:00: root bus resource [mem 0x000ec000-0x000effff] +[ 0.121981] pci_bus 0000:00: root bus resource [mem 0x000f0000-0x000fffff] +[ 0.121985] pci_bus 0000:00: root bus resource [mem 0x80000000-0xfebfffff] +[ 0.121988] pci_bus 0000:00: root bus resource [mem 0xfed40000-0xfed44fff] +[ 0.122002] pci 0000:00:00.0: [8086:27a0] type 00 class 0x060000 +[ 0.122153] pci 0000:00:02.0: [8086:27a2] type 00 class 0x030000 +[ 0.122170] pci 0000:00:02.0: reg 0x10: [mem 0xe4200000-0xe427ffff] +[ 0.122179] pci 0000:00:02.0: reg 0x14: [io 0x50a0-0x50a7] +[ 0.122188] pci 0000:00:02.0: reg 0x18: [mem 0xd0000000-0xdfffffff pref] +[ 0.122198] pci 0000:00:02.0: reg 0x1c: [mem 0xe4300000-0xe433ffff] +[ 0.122338] pci 0000:00:02.1: [8086:27a6] type 00 class 0x038000 +[ 0.122352] pci 0000:00:02.1: reg 0x10: [mem 0xe4280000-0xe42fffff] +[ 0.122564] pci 0000:00:1b.0: [8086:27d8] type 00 class 0x040300 +[ 0.122591] pci 0000:00:1b.0: reg 0x10: [mem 0xe4340000-0xe4343fff 64bit] +[ 0.122706] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold +[ 0.122785] pci 0000:00:1b.0: System wakeup disabled by ACPI +[ 0.122842] pci 0000:00:1c.0: [8086:27d0] type 01 class 0x060400 +[ 0.122964] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold +[ 0.123100] pci 0000:00:1c.1: [8086:27d2] type 01 class 0x060400 +[ 0.123210] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold +[ 0.123337] pci 0000:00:1c.2: [8086:27d4] type 01 class 0x060400 +[ 0.123447] pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold +[ 0.123579] pci 0000:00:1c.3: [8086:27d6] type 01 class 0x060400 +[ 0.123689] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold +[ 0.123817] pci 0000:00:1d.0: [8086:27c8] type 00 class 0x0c0300 +[ 0.123881] pci 0000:00:1d.0: reg 0x20: [io 0x5000-0x501f] +[ 0.124006] pci 0000:00:1d.0: System wakeup disabled by ACPI +[ 0.124057] pci 0000:00:1d.1: [8086:27c9] type 00 class 0x0c0300 +[ 0.124120] pci 0000:00:1d.1: reg 0x20: [io 0x5020-0x503f] +[ 0.124236] pci 0000:00:1d.1: System wakeup disabled by ACPI +[ 0.124286] pci 0000:00:1d.2: [8086:27ca] type 00 class 0x0c0300 +[ 0.124349] pci 0000:00:1d.2: reg 0x20: [io 0x5040-0x505f] +[ 0.124464] pci 0000:00:1d.2: System wakeup disabled by ACPI +[ 0.124515] pci 0000:00:1d.3: [8086:27cb] type 00 class 0x0c0300 +[ 0.124578] pci 0000:00:1d.3: reg 0x20: [io 0x5060-0x507f] +[ 0.124695] pci 0000:00:1d.3: System wakeup disabled by ACPI +[ 0.124759] pci 0000:00:1d.7: [8086:27cc] type 00 class 0x0c0320 +[ 0.124787] pci 0000:00:1d.7: reg 0x10: [mem 0xe4344000-0xe43443ff] +[ 0.124905] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold +[ 0.124978] pci 0000:00:1d.7: System wakeup disabled by ACPI +[ 0.125032] pci 0000:00:1e.0: [8086:2448] type 01 class 0x060401 +[ 0.125214] pci 0000:00:1f.0: [8086:27b9] type 00 class 0x060100 +[ 0.125339] pci 0000:00:1f.0: address space collision: [io 0x0500-0x057f] conflicts with ACPI CPU throttle [??? 0x00000510-0x00000515 flags 0x80000000] +[ 0.125347] pci 0000:00:1f.0: quirk: [io 0x0480-0x04bf] claimed by ICH6 GPIO +[ 0.125353] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 1600 (mask 007f) +[ 0.125359] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 2 PIO at 15e0 (mask 000f) +[ 0.125364] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 3 PIO at 1680 (mask 001f) +[ 0.125515] pci 0000:00:1f.1: [8086:27df] type 00 class 0x01018a +[ 0.125535] pci 0000:00:1f.1: reg 0x10: [io 0x50a8-0x50af] +[ 0.125550] pci 0000:00:1f.1: reg 0x14: [io 0x50c8-0x50cb] +[ 0.125564] pci 0000:00:1f.1: reg 0x18: [io 0x50b0-0x50b7] +[ 0.125578] pci 0000:00:1f.1: reg 0x1c: [io 0x50cc-0x50cf] +[ 0.125592] pci 0000:00:1f.1: reg 0x20: [io 0x5080-0x508f] +[ 0.125736] pci 0000:00:1f.2: [8086:27c5] type 00 class 0x010601 +[ 0.125764] pci 0000:00:1f.2: reg 0x10: [io 0x50b8-0x50bf] +[ 0.125777] pci 0000:00:1f.2: reg 0x14: [io 0x50d0-0x50d3] +[ 0.125792] pci 0000:00:1f.2: reg 0x18: [io 0x50c0-0x50c7] +[ 0.125806] pci 0000:00:1f.2: reg 0x1c: [io 0x50d4-0x50d7] +[ 0.125820] pci 0000:00:1f.2: reg 0x20: [io 0x5090-0x509f] +[ 0.125835] pci 0000:00:1f.2: reg 0x24: [mem 0xe4344400-0xe43447ff] +[ 0.125899] pci 0000:00:1f.2: PME# supported from D3hot +[ 0.126016] pci 0000:00:1f.3: [8086:27da] type 00 class 0x0c0500 +[ 0.126096] pci 0000:00:1f.3: reg 0x20: [io 0x0400-0x041f] +[ 0.126355] pci 0000:01:00.0: [8086:109a] type 00 class 0x020000 +[ 0.126389] pci 0000:01:00.0: reg 0x10: [mem 0xe4100000-0xe411ffff] +[ 0.126434] pci 0000:01:00.0: reg 0x18: [io 0x4000-0x401f] +[ 0.126628] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold +[ 0.126710] pci 0000:01:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force' +[ 0.126731] pci 0000:00:1c.0: PCI bridge to [bus 01] +[ 0.126737] pci 0000:00:1c.0: bridge window [io 0x4000-0x4fff] +[ 0.126744] pci 0000:00:1c.0: bridge window [mem 0xe4100000-0xe41fffff] +[ 0.126838] pci 0000:00:1c.1: PCI bridge to [bus 02] +[ 0.126938] pci 0000:00:1c.2: PCI bridge to [bus 03] +[ 0.127032] pci 0000:00:1c.3: PCI bridge to [bus 04] +[ 0.127187] pci 0000:05:00.0: [1180:0476] type 02 class 0x060700 +[ 0.127210] pci 0000:05:00.0: proprietary Ricoh MMC controller disabled (via cardbus function) +[ 0.127213] pci 0000:05:00.0: MMC cards are now supported by standard SDHCI controller +[ 0.127233] pci 0000:05:00.0: reg 0x10: [mem 0xe2000000-0xe2000fff] +[ 0.127274] pci 0000:05:00.0: supports D1 D2 +[ 0.127278] pci 0000:05:00.0: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.127318] pci 0000:05:00.0: System wakeup disabled by ACPI +[ 0.127377] pci 0000:05:00.1: [1180:0552] type 00 class 0x0c0010 +[ 0.127403] pci 0000:05:00.1: reg 0x10: [mem 0xe2001000-0xe20017ff] +[ 0.127512] pci 0000:05:00.1: supports D1 D2 +[ 0.127516] pci 0000:05:00.1: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.127599] pci 0000:05:00.2: [1180:0822] type 00 class 0x080500 +[ 0.127626] pci 0000:05:00.2: reg 0x10: [mem 0xe2001800-0xe20018ff] +[ 0.127736] pci 0000:05:00.2: supports D1 D2 +[ 0.127740] pci 0000:05:00.2: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.127880] pci 0000:00:1e.0: PCI bridge to [bus 05-06] (subtractive decode) +[ 0.127887] pci 0000:00:1e.0: bridge window [io 0x2000-0x3fff] +[ 0.127894] pci 0000:00:1e.0: bridge window [mem 0xe0000000-0xe20fffff] +[ 0.127904] pci 0000:00:1e.0: bridge window [mem 0xe2100000-0xe40fffff 64bit pref] +[ 0.127908] pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode) +[ 0.127911] pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode) +[ 0.127915] pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode) +[ 0.127918] pci 0000:00:1e.0: bridge window [mem 0x000c0000-0x000c3fff] (subtractive decode) +[ 0.127922] pci 0000:00:1e.0: bridge window [mem 0x000c4000-0x000c7fff] (subtractive decode) +[ 0.127925] pci 0000:00:1e.0: bridge window [mem 0x000c8000-0x000cbfff] (subtractive decode) +[ 0.127928] pci 0000:00:1e.0: bridge window [mem 0x000cc000-0x000cffff] (subtractive decode) +[ 0.127932] pci 0000:00:1e.0: bridge window [mem 0x000d0000-0x000d3fff] (subtractive decode) +[ 0.127935] pci 0000:00:1e.0: bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode) +[ 0.127938] pci 0000:00:1e.0: bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode) +[ 0.127942] pci 0000:00:1e.0: bridge window [mem 0x000dc000-0x000dffff] (subtractive decode) +[ 0.127945] pci 0000:00:1e.0: bridge window [mem 0x000e0000-0x000e3fff] (subtractive decode) +[ 0.127949] pci 0000:00:1e.0: bridge window [mem 0x000e4000-0x000e7fff] (subtractive decode) +[ 0.127952] pci 0000:00:1e.0: bridge window [mem 0x000e8000-0x000ebfff] (subtractive decode) +[ 0.127955] pci 0000:00:1e.0: bridge window [mem 0x000ec000-0x000effff] (subtractive decode) +[ 0.127959] pci 0000:00:1e.0: bridge window [mem 0x000f0000-0x000fffff] (subtractive decode) +[ 0.127962] pci 0000:00:1e.0: bridge window [mem 0x80000000-0xfebfffff] (subtractive decode) +[ 0.127966] pci 0000:00:1e.0: bridge window [mem 0xfed40000-0xfed44fff] (subtractive decode) +[ 0.128041] pci_bus 0000:06: busn_res: can not insert [bus 06-ff] under [bus 05-06] (conflicts with (null) [bus 05-06]) +[ 0.128049] pci_bus 0000:06: busn_res: [bus 06-ff] end is updated to 09 +[ 0.128053] pci_bus 0000:06: busn_res: can not insert [bus 06-09] under [bus 05-06] (conflicts with (null) [bus 05-06]) +[ 0.128060] pci_bus 0000:06: [bus 06-09] partially hidden behind transparent bridge 0000:05 [bus 05-06] +[ 0.128336] ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 5 6 7 10 12 14 15) *11 +[ 0.128426] ACPI: PCI Interrupt Link [LNKB] (IRQs 1 3 4 5 6 7 *11 12 14 15) +[ 0.128512] ACPI: PCI Interrupt Link [LNKC] (IRQs 1 3 4 5 6 7 10 12 14 15) *11 +[ 0.128597] ACPI: PCI Interrupt Link [LNKD] (IRQs 1 3 4 5 6 7 *11 12 14 15) +[ 0.128682] ACPI: PCI Interrupt Link [LNKE] (IRQs 1 3 4 5 6 7 10 12 14 15) *11 +[ 0.128766] ACPI: PCI Interrupt Link [LNKF] (IRQs 1 3 4 5 6 7 *11 12 14 15) +[ 0.128850] ACPI: PCI Interrupt Link [LNKG] (IRQs 1 3 4 5 6 7 10 12 14 15) *11 +[ 0.128935] ACPI: PCI Interrupt Link [LNKH] (IRQs 1 3 4 5 6 7 *11 12 14 15) +[ 0.129051] ACPI: \_SB_.PCI0: notify handler is installed +[ 0.129051] Found 1 acpi root devices +[ 0.129051] ACPI : EC: GPE = 0x1c, I/O: command/status = 0x66, data = 0x62 +[ 0.129051] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none +[ 0.129051] vgaarb: loaded +[ 0.129051] vgaarb: bridge control possible 0000:00:02.0 +[ 0.129051] SCSI subsystem initialized +[ 0.129051] libata version 3.00 loaded. +[ 0.129051] ACPI: bus type USB registered +[ 0.129051] usbcore: registered new interface driver usbfs +[ 0.129051] usbcore: registered new interface driver hub +[ 0.129051] usbcore: registered new device driver usb +[ 0.129051] PCI: Using ACPI for IRQ routing +[ 0.133275] PCI: pci_cache_line_size set to 64 bytes +[ 0.133369] e820: reserve RAM buffer [mem 0x7f6d5000-0x7fffffff] +[ 0.133506] NetLabel: Initializing +[ 0.133509] NetLabel: domain hash size = 128 +[ 0.133510] NetLabel: protocols = UNLABELED CIPSOv4 +[ 0.133537] NetLabel: unlabeled traffic allowed by default +[ 0.133557] HPET: 3 timers in total, 0 timers will be used for per-cpu timer +[ 0.133557] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0 +[ 0.133557] hpet0: 3 comparators, 64-bit 14.318180 MHz counter +[ 0.134098] Switched to clocksource hpet +[ 0.142214] AppArmor: AppArmor Filesystem Enabled +[ 0.142264] pnp: PnP ACPI init +[ 0.142291] ACPI: bus type PNP registered +[ 0.142445] system 00:00: [mem 0xfed1c000-0xfed1ffff] has been reserved +[ 0.142450] system 00:00: [mem 0xfed14000-0xfed17fff] has been reserved +[ 0.142454] system 00:00: [mem 0xfed18000-0xfed18fff] has been reserved +[ 0.142458] system 00:00: [mem 0xfed19000-0xfed19fff] has been reserved +[ 0.142462] system 00:00: [mem 0xf0000000-0xf3ffffff] has been reserved +[ 0.142466] system 00:00: [mem 0xfed20000-0xfed3ffff] has been reserved +[ 0.142470] system 00:00: [mem 0xfed40000-0xfed44fff] has been reserved +[ 0.142474] system 00:00: [mem 0xfed45000-0xfed8ffff] has been reserved +[ 0.142481] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active) +[ 0.143002] pnp 00:01: [dma 4] +[ 0.143047] pnp 00:01: Plug and Play ACPI device, IDs PNP0200 (active) +[ 0.143092] pnp 00:02: Plug and Play ACPI device, IDs INT0800 (active) +[ 0.143244] system 00:03: [mem 0xfed00000-0xfed003ff] has been reserved +[ 0.143250] system 00:03: Plug and Play ACPI device, IDs PNP0103 PNP0c01 (active) +[ 0.143320] pnp 00:04: Plug and Play ACPI device, IDs PNP0c04 (active) +[ 0.143397] system 00:05: [io 0x0800-0x080f] has been reserved +[ 0.143402] system 00:05: [io 0x0500-0x057f] could not be reserved +[ 0.143406] system 00:05: [io 0x0480-0x04bf] has been reserved +[ 0.143411] system 00:05: Plug and Play ACPI device, IDs PNP0c02 (active) +[ 0.143463] pnp 00:06: Plug and Play ACPI device, IDs PNP0b00 (active) +[ 0.143529] pnp 00:07: Plug and Play ACPI device, IDs PNP0303 PNP030b (active) +[ 0.143593] pnp 00:08: Plug and Play ACPI device, IDs PNP0f13 (active) +[ 0.143654] pnp 00:09: Plug and Play ACPI device, IDs PNP0501 (active) +[ 0.143699] pnp: PnP ACPI: found 10 devices +[ 0.143702] ACPI: bus type PNP unregistered +[ 0.151684] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 01] add_size 200000 +[ 0.151738] pci 0000:00:1f.0: BAR 13: [io 0x0500-0x057f] has bogus alignment +[ 0.151744] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 +[ 0.151755] pci 0000:00:1c.0: BAR 15: assigned [mem 0x80000000-0x801fffff 64bit pref] +[ 0.151759] pci 0000:00:1c.0: PCI bridge to [bus 01] +[ 0.151765] pci 0000:00:1c.0: bridge window [io 0x4000-0x4fff] +[ 0.151773] pci 0000:00:1c.0: bridge window [mem 0xe4100000-0xe41fffff] +[ 0.151780] pci 0000:00:1c.0: bridge window [mem 0x80000000-0x801fffff 64bit pref] +[ 0.151790] pci 0000:00:1c.1: PCI bridge to [bus 02] +[ 0.151807] pci 0000:00:1c.2: PCI bridge to [bus 03] +[ 0.151824] pci 0000:00:1c.3: PCI bridge to [bus 04] +[ 0.151848] pci 0000:05:00.0: res[15]=[mem 0x04000000-0x03ffffff pref] get_res_add_size add_size 4000000 +[ 0.151852] pci 0000:05:00.0: res[16]=[mem 0x04000000-0x03ffffff] get_res_add_size add_size 4000000 +[ 0.151856] pci 0000:05:00.0: res[13]=[io 0x0100-0x00ff] get_res_add_size add_size 100 +[ 0.151860] pci 0000:05:00.0: res[14]=[io 0x0100-0x00ff] get_res_add_size add_size 100 +[ 0.151868] pci 0000:05:00.0: BAR 15: assigned [mem 0x84000000-0x87ffffff pref] +[ 0.151875] pci 0000:05:00.0: BAR 16: assigned [mem 0x88000000-0x8bffffff] +[ 0.151879] pci 0000:05:00.0: BAR 13: assigned [io 0x2000-0x20ff] +[ 0.151883] pci 0000:05:00.0: BAR 14: assigned [io 0x2400-0x24ff] +[ 0.151888] pci 0000:05:00.0: CardBus bridge to [bus 06-09] +[ 0.151891] pci 0000:05:00.0: bridge window [io 0x2000-0x20ff] +[ 0.151897] pci 0000:05:00.0: bridge window [io 0x2400-0x24ff] +[ 0.151904] pci 0000:05:00.0: bridge window [mem 0x84000000-0x87ffffff pref] +[ 0.151910] pci 0000:05:00.0: bridge window [mem 0x88000000-0x8bffffff] +[ 0.151917] pci 0000:00:1e.0: PCI bridge to [bus 05-06] +[ 0.151922] pci 0000:00:1e.0: bridge window [io 0x2000-0x3fff] +[ 0.151930] pci 0000:00:1e.0: bridge window [mem 0xe0000000-0xe20fffff] +[ 0.151937] pci 0000:00:1e.0: bridge window [mem 0xe2100000-0xe40fffff 64bit pref] +[ 0.151947] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7] +[ 0.151951] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff] +[ 0.151955] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.151958] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff] +[ 0.151962] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff] +[ 0.151965] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff] +[ 0.151968] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff] +[ 0.151972] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff] +[ 0.151975] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff] +[ 0.151978] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff] +[ 0.151981] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff] +[ 0.151985] pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff] +[ 0.151988] pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff] +[ 0.151991] pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff] +[ 0.151994] pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff] +[ 0.151998] pci_bus 0000:00: resource 19 [mem 0x000f0000-0x000fffff] +[ 0.152014] pci_bus 0000:00: resource 20 [mem 0x80000000-0xfebfffff] +[ 0.152018] pci_bus 0000:00: resource 21 [mem 0xfed40000-0xfed44fff] +[ 0.152022] pci_bus 0000:01: resource 0 [io 0x4000-0x4fff] +[ 0.152025] pci_bus 0000:01: resource 1 [mem 0xe4100000-0xe41fffff] +[ 0.152029] pci_bus 0000:01: resource 2 [mem 0x80000000-0x801fffff 64bit pref] +[ 0.152033] pci_bus 0000:05: resource 0 [io 0x2000-0x3fff] +[ 0.152036] pci_bus 0000:05: resource 1 [mem 0xe0000000-0xe20fffff] +[ 0.152040] pci_bus 0000:05: resource 2 [mem 0xe2100000-0xe40fffff 64bit pref] +[ 0.152043] pci_bus 0000:05: resource 4 [io 0x0000-0x0cf7] +[ 0.152047] pci_bus 0000:05: resource 5 [io 0x0d00-0xffff] +[ 0.152050] pci_bus 0000:05: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.152054] pci_bus 0000:05: resource 7 [mem 0x000c0000-0x000c3fff] +[ 0.152057] pci_bus 0000:05: resource 8 [mem 0x000c4000-0x000c7fff] +[ 0.152061] pci_bus 0000:05: resource 9 [mem 0x000c8000-0x000cbfff] +[ 0.152064] pci_bus 0000:05: resource 10 [mem 0x000cc000-0x000cffff] +[ 0.152067] pci_bus 0000:05: resource 11 [mem 0x000d0000-0x000d3fff] +[ 0.152071] pci_bus 0000:05: resource 12 [mem 0x000d4000-0x000d7fff] +[ 0.152074] pci_bus 0000:05: resource 13 [mem 0x000d8000-0x000dbfff] +[ 0.152077] pci_bus 0000:05: resource 14 [mem 0x000dc000-0x000dffff] +[ 0.152080] pci_bus 0000:05: resource 15 [mem 0x000e0000-0x000e3fff] +[ 0.152084] pci_bus 0000:05: resource 16 [mem 0x000e4000-0x000e7fff] +[ 0.152087] pci_bus 0000:05: resource 17 [mem 0x000e8000-0x000ebfff] +[ 0.152090] pci_bus 0000:05: resource 18 [mem 0x000ec000-0x000effff] +[ 0.152093] pci_bus 0000:05: resource 19 [mem 0x000f0000-0x000fffff] +[ 0.152097] pci_bus 0000:05: resource 20 [mem 0x80000000-0xfebfffff] +[ 0.152100] pci_bus 0000:05: resource 21 [mem 0xfed40000-0xfed44fff] +[ 0.152104] pci_bus 0000:06: resource 0 [io 0x2000-0x20ff] +[ 0.152107] pci_bus 0000:06: resource 1 [io 0x2400-0x24ff] +[ 0.152111] pci_bus 0000:06: resource 2 [mem 0x84000000-0x87ffffff pref] +[ 0.152114] pci_bus 0000:06: resource 3 [mem 0x88000000-0x8bffffff] +[ 0.152167] NET: Registered protocol family 2 +[ 0.152410] TCP established hash table entries: 16384 (order: 5, 131072 bytes) +[ 0.152518] TCP bind hash table entries: 16384 (order: 6, 262144 bytes) +[ 0.152669] TCP: Hash tables configured (established 16384 bind 16384) +[ 0.152731] TCP: reno registered +[ 0.152739] UDP hash table entries: 1024 (order: 3, 32768 bytes) +[ 0.152763] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes) +[ 0.152861] NET: Registered protocol family 1 +[ 0.152882] pci 0000:00:02.0: Boot video device +[ 0.154029] PCI: CLS 64 bytes, default 64 +[ 0.154130] Trying to unpack rootfs image as initramfs... +[ 0.891588] Freeing initrd memory: 23964K (ffff880035122000 - ffff880036889000) +[ 0.891983] microcode: CPU0 sig=0x6f6, pf=0x20, revision=0x0 +[ 0.891991] microcode: CPU1 sig=0x6f6, pf=0x20, revision=0x0 +[ 0.892123] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba +[ 0.892126] Scanning for low memory corruption every 60 seconds +[ 0.892509] Initialise system trusted keyring +[ 0.892592] audit: initializing netlink socket (disabled) +[ 0.892616] type=2000 audit(1409521794.892:1): initialized +[ 0.938675] HugeTLB registered 2 MB page size, pre-allocated 0 pages +[ 0.940706] zbud: loaded +[ 0.940918] VFS: Disk quotas dquot_6.5.2 +[ 0.940988] Dquot-cache hash table entries: 512 (order 0, 4096 bytes) +[ 0.941797] fuse init (API version 7.22) +[ 0.941924] msgmni has been set to 3980 +[ 0.942015] Key type big_key registered +[ 0.942641] Key type asymmetric registered +[ 0.942645] Asymmetric key parser 'x509' registered +[ 0.942697] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) +[ 0.942747] io scheduler noop registered +[ 0.942751] io scheduler deadline registered (default) +[ 0.942789] io scheduler cfq registered +[ 0.942802] io scheduler bfq registered +[ 0.942804] BFQ I/O-scheduler version: v7r5 +[ 0.943133] pcieport 0000:00:1c.0: irq 40 for MSI/MSI-X +[ 0.943399] pcieport 0000:00:1c.1: irq 41 for MSI/MSI-X +[ 0.943635] pcieport 0000:00:1c.2: irq 42 for MSI/MSI-X +[ 0.943873] pcieport 0000:00:1c.3: irq 43 for MSI/MSI-X +[ 0.944051] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt +[ 0.944061] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt +[ 0.944068] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded +[ 0.944102] pcieport 0000:00:1c.1: Signaling PME through PCIe PME interrupt +[ 0.944109] pcie_pme 0000:00:1c.1:pcie01: service driver pcie_pme loaded +[ 0.944142] pcieport 0000:00:1c.2: Signaling PME through PCIe PME interrupt +[ 0.944149] pcie_pme 0000:00:1c.2:pcie01: service driver pcie_pme loaded +[ 0.944178] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt +[ 0.944185] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded +[ 0.944207] pci_hotplug: PCI Hot Plug PCI Core version: 0.5 +[ 0.944253] pciehp 0000:00:1c.0:pcie04: HPC vendor_id 8086 device_id 27d0 ss_vid 8086 ss_did 27d0 +[ 0.944297] pciehp 0000:00:1c.0:pcie04: service driver pciehp loaded +[ 0.944307] pciehp: PCI Express Hot Plug Controller Driver version: 0.4 +[ 0.944385] intel_idle: does not run on family 6 model 15 +[ 0.944397] ipmi message handler version 39.2 +[ 0.944733] ACPI: AC Adapter [AC] (off-line) +[ 0.944807] ACPI Exception: AE_NOT_FOUND, Error reading AC Adapter state (20131115/ac-108) +[ 0.945053] input: Sleep Button as /devices/LNXSYSTM:00/device:00/PNP0A08:00/device:24/PNP0C09:00/PNP0C0E:00/input/input0 +[ 0.945061] ACPI: Sleep Button [SLPB] +[ 0.945124] input: Lid Switch as /devices/LNXSYSTM:00/device:00/PNP0A08:00/device:24/PNP0C09:00/PNP0C0D:00/input/input1 +[ 0.945243] ACPI: Lid Switch [LID] +[ 0.945307] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 +[ 0.945312] ACPI: Power Button [PWRF] +[ 0.946267] Monitor-Mwait will be used to enter C-1 state +[ 0.946279] tsc: Marking TSC unstable due to TSC halts in idle +[ 0.946288] ACPI: acpi_idle registered with cpuidle +[ 0.947899] thermal LNXTHERM:00: registered as thermal_zone0 +[ 0.947904] ACPI: Thermal Zone [THM0] (39 C) +[ 0.948530] thermal LNXTHERM:01: registered as thermal_zone1 +[ 0.948533] ACPI: Thermal Zone [THM1] (27 C) +[ 0.948573] GHES: HEST is not enabled! +[ 0.948770] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled +[ 0.952564] Linux agpgart interface v0.103 +[ 0.952903] agpgart-intel 0000:00:00.0: Intel 945GM Chipset +[ 0.952979] agpgart-intel 0000:00:00.0: detected gtt size: 262144K total, 262144K mappable +[ 0.954238] agpgart-intel 0000:00:00.0: detected 8192K stolen memory +[ 0.954581] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000 +[ 0.960749] brd: module loaded +[ 0.962506] loop: module loaded +[ 0.962983] ata_piix 0000:00:1f.1: version 2.13 +[ 0.963770] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.963780] ACPI: Battery Slot [BAT0] (battery present) +[ 0.963927] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.963935] ACPI: Battery Slot [BAT1] (battery absent) +[ 0.964039] scsi0 : ata_piix +[ 0.964177] scsi1 : ata_piix +[ 0.964231] ata1: PATA max UDMA/100 cmd 0x1f0 ctl 0x3f6 bmdma 0x5080 irq 14 +[ 0.964235] ata2: PATA max UDMA/100 cmd 0x170 ctl 0x376 bmdma 0x5088 irq 15 +[ 0.964290] ata1: port disabled--ignoring +[ 0.964327] ata2: port disabled--ignoring +[ 0.964709] libphy: Fixed MDIO Bus: probed +[ 0.964859] tun: Universal TUN/TAP device driver, 1.6 +[ 0.964861] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> +[ 0.964949] PPP generic driver version 2.4.2 +[ 0.965035] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver +[ 0.965043] ehci-pci: EHCI PCI platform driver +[ 0.965215] ehci-pci 0000:00:1d.7: EHCI Host Controller +[ 0.965228] ehci-pci 0000:00:1d.7: new USB bus registered, assigned bus number 1 +[ 0.965248] ehci-pci 0000:00:1d.7: debug port 1 +[ 0.969175] ehci-pci 0000:00:1d.7: cache line size of 64 is not supported +[ 0.969198] ehci-pci 0000:00:1d.7: irq 19, io mem 0xe4344000 +[ 0.980055] ehci-pci 0000:00:1d.7: USB 2.0 started, EHCI 1.00 +[ 0.980167] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.980171] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.980174] usb usb1: Product: EHCI Host Controller +[ 0.980178] usb usb1: Manufacturer: Linux 3.13.0-34-generic ehci_hcd +[ 0.980181] usb usb1: SerialNumber: 0000:00:1d.7 +[ 0.980361] hub 1-0:1.0: USB hub found +[ 0.980376] hub 1-0:1.0: 8 ports detected +[ 0.980772] ehci-platform: EHCI generic platform driver +[ 0.980789] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver +[ 0.980791] ohci-pci: OHCI PCI platform driver +[ 0.980807] ohci-platform: OHCI generic platform driver +[ 0.980820] uhci_hcd: USB Universal Host Controller Interface driver +[ 0.980960] uhci_hcd 0000:00:1d.0: UHCI Host Controller +[ 0.980969] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 2 +[ 0.981013] uhci_hcd 0000:00:1d.0: irq 16, io base 0x00005000 +[ 0.981094] usb usb2: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.981099] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.981102] usb usb2: Product: UHCI Host Controller +[ 0.981106] usb usb2: Manufacturer: Linux 3.13.0-34-generic uhci_hcd +[ 0.981109] usb usb2: SerialNumber: 0000:00:1d.0 +[ 0.981266] hub 2-0:1.0: USB hub found +[ 0.981279] hub 2-0:1.0: 2 ports detected +[ 0.981522] uhci_hcd 0000:00:1d.1: UHCI Host Controller +[ 0.981530] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 3 +[ 0.981575] uhci_hcd 0000:00:1d.1: irq 17, io base 0x00005020 +[ 0.981654] usb usb3: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.981658] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.981662] usb usb3: Product: UHCI Host Controller +[ 0.981665] usb usb3: Manufacturer: Linux 3.13.0-34-generic uhci_hcd +[ 0.981669] usb usb3: SerialNumber: 0000:00:1d.1 +[ 0.981825] hub 3-0:1.0: USB hub found +[ 0.981840] hub 3-0:1.0: 2 ports detected +[ 0.982079] uhci_hcd 0000:00:1d.2: UHCI Host Controller +[ 0.982090] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 4 +[ 0.982135] uhci_hcd 0000:00:1d.2: irq 18, io base 0x00005040 +[ 0.982218] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.982222] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.982225] usb usb4: Product: UHCI Host Controller +[ 0.982229] usb usb4: Manufacturer: Linux 3.13.0-34-generic uhci_hcd +[ 0.982232] usb usb4: SerialNumber: 0000:00:1d.2 +[ 0.982388] hub 4-0:1.0: USB hub found +[ 0.982401] hub 4-0:1.0: 2 ports detected +[ 0.982648] uhci_hcd 0000:00:1d.3: UHCI Host Controller +[ 0.982656] uhci_hcd 0000:00:1d.3: new USB bus registered, assigned bus number 5 +[ 0.982688] uhci_hcd 0000:00:1d.3: irq 19, io base 0x00005060 +[ 0.982769] usb usb5: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.982774] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.982777] usb usb5: Product: UHCI Host Controller +[ 0.982781] usb usb5: Manufacturer: Linux 3.13.0-34-generic uhci_hcd +[ 0.982784] usb usb5: SerialNumber: 0000:00:1d.3 +[ 0.982935] hub 5-0:1.0: USB hub found +[ 0.982947] hub 5-0:1.0: 2 ports detected +[ 0.983162] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12 +[ 0.996933] serio: i8042 KBD port at 0x60,0x64 irq 1 +[ 0.996948] serio: i8042 AUX port at 0x60,0x64 irq 12 +[ 0.997177] mousedev: PS/2 mouse device common for all mice +[ 0.997526] rtc_cmos 00:06: RTC can wake from S4 +[ 0.997724] rtc_cmos 00:06: rtc core: registered rtc_cmos as rtc0 +[ 0.997761] rtc_cmos 00:06: alarms up to one month, y3k, 242 bytes nvram, hpet irqs +[ 0.997869] device-mapper: uevent: version 1.0.3 +[ 0.997988] device-mapper: ioctl: 4.27.0-ioctl (2013-10-30) initialised: dm-devel@redhat.com +[ 0.998000] ledtrig-cpu: registered to indicate activity on CPUs +[ 0.998153] TCP: cubic registered +[ 0.998301] NET: Registered protocol family 10 +[ 0.998581] NET: Registered protocol family 17 +[ 0.998598] Key type dns_resolver registered +[ 0.999003] Loading compiled-in X.509 certificates +[ 1.000843] Loaded X.509 cert 'Magrathea: Glacier signing key: 0cadd161e4220740356b3090aabd2b3fcb83a5d0' +[ 1.000865] registered taskstats version 1 +[ 1.004840] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3 +[ 1.006130] Key type trusted registered +[ 1.010130] Key type encrypted registered +[ 1.015532] AppArmor: AppArmor sha1 policy hashing enabled +[ 1.015538] IMA: No TPM chip found, activating TPM-bypass! +[ 1.015959] regulator-dummy: disabling +[ 1.016046] Magic number: 10:359:855 +[ 1.016202] rtc_cmos 00:06: setting system clock to 2014-08-31 21:49:55 UTC (1409521795) +[ 1.017114] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found +[ 1.017120] EDD information not available. +[ 1.017162] PM: Hibernation image not present or could not be loaded. +[ 1.019541] Freeing unused kernel memory: 1336K (ffffffff81d20000 - ffffffff81e6e000) +[ 1.019544] Write protecting the kernel read-only data: 12288k +[ 1.023552] Freeing unused kernel memory: 788K (ffff88000173b000 - ffff880001800000) +[ 1.026751] Freeing unused kernel memory: 680K (ffff880001b56000 - ffff880001c00000) +[ 1.052928] systemd-udevd[101]: starting version 204 +[ 1.094875] pps_core: LinuxPPS API ver. 1 registered +[ 1.094880] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> +[ 1.098290] [drm] Initialized drm 1.1.0 20060810 +[ 1.102066] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no) +[ 1.106256] PTP clock support registered +[ 1.113596] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k +[ 1.113602] e1000e: Copyright(c) 1999 - 2013 Intel Corporation. +[ 1.124513] e1000e 0000:01:00.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode +[ 1.124561] e1000e 0000:01:00.0: irq 44 for MSI/MSI-X +[ 1.124660] acpi device:04: registered as cooling_device2 +[ 1.124749] input: Video Bus as /devices/LNXSYSTM:00/device:00/PNP0A08:00/LNXVIDEO:00/input/input5 +[ 1.147236] [drm:i915_dump_device_info], i915 device info: gen=3, pciid=0x27a2 flags=is_mobile,is_i945gm,has_hotplug,cursor_needs_physical,has_overlay,overlay_needs_physical,supports_tv, +[ 1.147327] [drm:intel_detect_pch], No PCH found. +[ 1.147333] [drm] Memory usable by graphics device = 256M +[ 1.147335] [drm:i915_gem_gtt_init], GMADR size = 256M +[ 1.147338] [drm:i915_gem_gtt_init], GTT stolen size = 8M +[ 1.149656] sdhci: Secure Digital Host Controller Interface driver +[ 1.149659] sdhci: Copyright(c) Pierre Ossman +[ 1.152120] sdhci-pci 0000:05:00.2: SDHCI controller found [1180:0822] (rev 18) +[ 1.152136] pci 0000:00:1e.0: enabling device (0004 -> 0007) +[ 1.180299] [drm:intel_opregion_setup], graphic opregion physical addr: 0x0 +[ 1.180306] [drm:intel_opregion_setup], ACPI OpRegion not supported! +[ 1.180346] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.180348] [drm] Driver supports precise vblank timestamp query. +[ 1.180351] [drm:init_vbt_defaults], Set default to SSC at 100MHz +[ 1.180358] i915 0000:00:02.0: Invalid ROM contents +[ 1.180360] [drm:intel_parse_bios], VBT signature missing +[ 1.180363] [drm] failed to find VBIOS tables +[ 1.180369] [drm:intel_dsm_pci_probe], no _DSM method for intel device +[ 1.180383] [drm:i915_gem_init_stolen], found 8388608 bytes of stolen memory at 7f800000 +[ 1.180409] [drm] GPU crash dump saved to /sys/class/drm/card0/error +[ 1.180412] [drm:intel_modeset_init], 2 display pipes available. +[ 1.180419] [drm:intel_crtc_init], swapping pipes & planes for FBC +[ 1.180421] [drm] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace. +[ 1.180423] [drm] Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel +[ 1.180425] [drm] drm/i915 developers can then reassign to the right component if it's not a kernel issue. +[ 1.180427] [drm] The gpu crash dump is required to analyze gpu hangs, so please always attach it. +[ 1.180429] [drm:intel_modeset_init], pipe A sprite A init failed: -19 +[ 1.180435] [drm:intel_crtc_init], swapping pipes & planes for FBC +[ 1.180437] [drm:intel_modeset_init], pipe B sprite B init failed: -19 +[ 1.180440] [drm:intel_shared_dpll_init], 0 shared PLLs initialized +[ 1.180448] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem +[ 1.180450] i915: render error detected, EIR: 0x00000010 +[ 1.180452] i915: page table error +[ 1.180454] i915: PGTBL_ER: 0x00000012 +[ 1.180457] [drm:i915_report_and_clear_eir] *ERROR* EIR stuck: 0x00000010, masking +[ 1.180463] [drm:i915_irq_handler], pipe B underrun +[ 1.180469] i915: render error detected, EIR: 0x00000010 +[ 1.180471] i915: page table error +[ 1.180473] i915: PGTBL_ER: 0x00000012 +[ 1.182043] sdhci-pci 0000:05:00.2: Will use DMA mode even though HW doesn't fully claim to support it. +[ 1.182056] sdhci-pci 0000:05:00.2: dummy supplies not allowed +[ 1.182059] mmc0: no vqmmc regulator found +[ 1.182062] sdhci-pci 0000:05:00.2: dummy supplies not allowed +[ 1.182064] mmc0: no vmmc regulator found +[ 1.183062] sdhci-pci 0000:05:00.2: Will use DMA mode even though HW doesn't fully claim to support it. +[ 1.183862] mmc0: SDHCI controller on PCI [0000:05:00.2] using DMA +[ 1.236462] e1000e 0000:01:00.0 eth0: (PCI Express:2.5GT/s:Width x1) 00:16:d3:b6:d0:98 +[ 1.236469] e1000e 0000:01:00.0 eth0: Intel(R) PRO/1000 Network Connection +[ 1.236549] e1000e 0000:01:00.0 eth0: MAC: 2, PHY: 2, PBA No: 005302-003 +[ 1.248155] firewire_ohci 0000:05:00.1: added OHCI v1.10 device as card 0, 4 IR + 4 IT contexts, quirks 0x11 +[ 1.264281] [drm:intel_lvds_init], using preferred mode from EDID: +[ 1.264287] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 1.264297] [drm:intel_lvds_init], detected single-link lvds configuration +[ 1.264356] [drm:intel_panel_get_backlight], get backlight PWM = 24832 +[ 1.264360] [drm:intel_panel_get_max_backlight], max backlight PWM = 24832 +[ 1.264505] [drm:i915_gem_setup_global_gtt], clearing unused GTT space: [0, ffff000] +[ 1.264889] [drm:i915_gem_object_create_stolen], creating stolen object: size=20000 +[ 1.264897] [drm:i915_pages_create_for_stolen], offset=0x0, size=131072 +[ 1.264946] [drm:i915_gem_context_init], Disabling HW Contexts; old hardware +[ 1.264996] [drm] initialized overlay support +[ 1.265002] [drm:intel_modeset_readout_hw_state], [CRTC:3] hw state readout: disabled +[ 1.265012] [drm:intel_modeset_readout_hw_state], [CRTC:4] hw state readout: enabled +[ 1.265017] [drm:intel_modeset_readout_hw_state], [ENCODER:6:LVDS-6] hw state readout: enabled, pipe B +[ 1.265022] [drm:intel_modeset_readout_hw_state], [ENCODER:16:DAC-16] hw state readout: disabled, pipe A +[ 1.265026] [drm:intel_modeset_readout_hw_state], [ENCODER:18:TV-18] hw state readout: disabled, pipe A +[ 1.265031] [drm:intel_modeset_readout_hw_state], [CONNECTOR:5:LVDS-1] hw state readout: enabled +[ 1.265035] [drm:intel_modeset_readout_hw_state], [CONNECTOR:15:VGA-1] hw state readout: disabled +[ 1.265039] [drm:intel_modeset_readout_hw_state], [CONNECTOR:17:SVIDEO-1] hw state readout: disabled +[ 1.265044] [drm:intel_dump_pipe_config], [CRTC:3][setup_hw_state] config for pipe A +[ 1.265047] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 1.265050] [drm:intel_dump_pipe_config], pipe bpp: 0, dithering: 0 +[ 1.265053] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 1.265057] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 1.265060] [drm:intel_dump_pipe_config], requested mode: +[ 1.265063] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 +[ 1.265067] [drm:intel_dump_pipe_config], adjusted mode: +[ 1.265070] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 +[ 1.265074] [drm:intel_dump_crtc_timings], crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 +[ 1.265078] [drm:intel_dump_pipe_config], port clock: 0 +[ 1.265081] [drm:intel_dump_pipe_config], pipe src size: 0x0 +[ 1.265084] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 1.265087] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 1.265090] [drm:intel_dump_pipe_config], ips: 0 +[ 1.265093] [drm:intel_dump_pipe_config], double wide: 0 +[ 1.265097] [drm:intel_dump_pipe_config], [CRTC:4][setup_hw_state] config for pipe B +[ 1.265100] [drm:intel_dump_pipe_config], cpu_transcoder: B +[ 1.265102] [drm:intel_dump_pipe_config], pipe bpp: 0, dithering: 0 +[ 1.265105] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 1.265109] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 1.265112] [drm:intel_dump_pipe_config], requested mode: +[ 1.265115] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 640 0 0 0 400 0 0 0 0x0 0x0 +[ 1.265119] [drm:intel_dump_pipe_config], adjusted mode: +[ 1.265122] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0xa +[ 1.265126] [drm:intel_dump_crtc_timings], crtc timings: 45982 1024 1048 1184 1344 768 779 1 806, type: 0x0 flags: 0xa +[ 1.265130] [drm:intel_dump_pipe_config], port clock: 45982 +[ 1.265133] [drm:intel_dump_pipe_config], pipe src size: 640x400 +[ 1.265136] [drm:intel_dump_pipe_config], gmch pfit: control: 0x80000220, ratios: 0x00000000, lvds border: 0x00000000 +[ 1.265139] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 1.265142] [drm:intel_dump_pipe_config], ips: 0 +[ 1.265145] [drm:intel_dump_pipe_config], double wide: 0 +[ 1.265149] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 1.265153] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 1.265157] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 1.265160] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 1.265163] [drm:check_crtc_state], [CRTC:3] +[ 1.265166] [drm:check_crtc_state], [CRTC:4] +[ 1.265183] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +[ 1.265187] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 1.265204] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +[ 1.265208] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 1.265213] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 1.265218] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 1.265222] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +[ 1.265227] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +[ 1.265232] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 1.265235] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 1.280167] [drm:intel_crt_detect], CRT not detected via hotplug +[ 1.284121] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 1.284128] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 1.284131] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 1.284134] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 1.284413] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 1.284416] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 1.284419] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 1.284423] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 1.284429] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 1.284432] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 1.284437] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 1.284441] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 1.284454] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 1.284460] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 1.284464] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 1.284467] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 1.284470] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 1.284473] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 1.284476] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 1.284479] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 1.284483] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 1.284486] [drm:intel_dump_pipe_config], requested mode: +[ 1.284488] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 1.284493] [drm:intel_dump_pipe_config], adjusted mode: +[ 1.284496] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 1.284501] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 1.284505] [drm:intel_dump_pipe_config], port clock: 108000 +[ 1.284508] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 1.284511] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 1.284514] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 1.284517] [drm:intel_dump_pipe_config], ips: 0 +[ 1.284520] [drm:intel_dump_pipe_config], double wide: 0 +[ 1.292029] [drm:i9xx_update_plane], Writing base 00020000 00000000 0 0 5120 +[ 1.292040] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 1.297668] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 1.297673] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 1.297676] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 1.297679] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 1.297681] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 1 +[ 1.297685] [drm:i9xx_update_wm], self-refresh entries: 80 +[ 1.297687] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 1, C: 2, SR 47 +[ 1.297691] [drm:i9xx_update_wm], memory self refresh enabled +[ 1.320114] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 1.320123] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 1.320128] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 1.320133] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 1.320138] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 1.320142] [drm:check_crtc_state], [CRTC:3] +[ 1.320155] [drm:check_crtc_state], [CRTC:4] +[ 1.360100] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 1.360106] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 1.376107] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 1.376114] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 1.421067] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 1.421071] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 1.421074] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 29 +[ 1.421077] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 29, C: 2, SR 1 +[ 1.421080] [drm:i9xx_update_wm], memory self refresh disabled +[ 1.421087] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 1.421091] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 1.421094] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 1.421098] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 1.421101] [drm:check_crtc_state], [CRTC:3] +[ 1.421104] [drm:check_crtc_state], [CRTC:4] +[ 1.421246] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 1.421251] [drm:drm_setup_crtcs], +[ 1.421254] [drm:drm_enable_connectors], connector 5 enabled? yes +[ 1.421257] [drm:drm_enable_connectors], connector 15 enabled? no +[ 1.421260] [drm:drm_enable_connectors], connector 17 enabled? no +[ 1.421263] [drm:drm_target_preferred], looking for cmdline mode on connector 5 +[ 1.421266] [drm:drm_target_preferred], looking for preferred mode on connector 5 +[ 1.421268] [drm:drm_target_preferred], found mode 1024x768 +[ 1.421271] [drm:drm_setup_crtcs], picking CRTCs for 4096x4096 config +[ 1.421275] [drm:drm_setup_crtcs], desired mode 1024x768 set on crtc 4 +[ 1.421281] [drm:i915_gem_object_create_stolen], creating stolen object: size=300000 +[ 1.421285] [drm:i915_pages_create_for_stolen], offset=0x20000, size=3145728 +[ 1.422732] [drm:intelfb_create], allocated 1024x768 fb: 0x00020000, bo ffff880035eaa300 +[ 1.422872] fbcon: inteldrmfb (fb0) is primary device +[ 1.423535] [drm:intel_crtc_set_config], [CRTC:3] [NOFB] +[ 1.423538] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0 +[ 1.423541] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 1.423544] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +[ 1.423546] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set +[ 1.423548] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set +[ 1.423552] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 +[ 1.423556] [drm:drm_mode_debug_printmodeline], Modeline 32:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 1.423558] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=1, fb_changed=0 +[ 1.423560] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 1.423563] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0 +[ 1.423566] [drm:connected_sink_compute_bpp], [CONNECTOR:5:LVDS-1] checking for sink bpp constrains +[ 1.423570] [drm:intel_lvds_compute_config], forcing display bpp (was 24) to LVDS (18) +[ 1.423573] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 18, dithering: 1 +[ 1.423576] [drm:intel_dump_pipe_config], [CRTC:4][modeset] config for pipe B +[ 1.423577] [drm:intel_dump_pipe_config], cpu_transcoder: B +[ 1.423579] [drm:intel_dump_pipe_config], pipe bpp: 18, dithering: 1 +[ 1.423582] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 1.423584] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 1.423586] [drm:intel_dump_pipe_config], requested mode: +[ 1.423589] [drm:drm_mode_debug_printmodeline], Modeline 0:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 1.423591] [drm:intel_dump_pipe_config], adjusted mode: +[ 1.423595] [drm:drm_mode_debug_printmodeline], Modeline 0:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 1.423598] [drm:intel_dump_crtc_timings], crtc timings: 54160 1024 1048 1184 1344 768 771 777 806, type: 0x48 flags: 0xa +[ 1.423600] [drm:intel_dump_pipe_config], port clock: 54160 +[ 1.423602] [drm:intel_dump_pipe_config], pipe src size: 1024x768 +[ 1.423604] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000008, ratios: 0x00000000, lvds border: 0x00000000 +[ 1.423607] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 1.423608] [drm:intel_dump_pipe_config], ips: 0 +[ 1.423610] [drm:intel_dump_pipe_config], double wide: 0 +[ 1.423613] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0 +[ 1.457065] [drm:i9xx_pfit_disable], disabling pfit, current: 0x80000220 +[ 1.457069] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 1.457071] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 1.457073] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 29 +[ 1.457076] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 29, C: 2, SR 1 +[ 1.457077] [drm:i9xx_update_wm], memory self refresh disabled +[ 1.457082] [drm:i9xx_get_refclk], using SSC reference clock of 100 MHz +[ 1.457252] [drm:i9xx_update_plane], Writing base 00020000 00000000 0 0 4096 +[ 1.457256] [drm:intel_crtc_mode_set], [ENCODER:6:LVDS-6] set [MODE:0:1024x768] +[ 1.457893] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 1.457895] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 1.457896] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 1.457898] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 1.457900] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 1.457902] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 1.457905] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 1.457906] [drm:i9xx_update_wm], memory self refresh enabled +[ 1.650555] psmouse serio1: alps: Unknown ALPS touchpad: E7=10 00 64, EC=10 00 64 +[ 1.748270] firewire_core 0000:05:00.1: created device fw0: GUID 0000000000000000, S400 +[ 1.800110] [drm:intel_panel_enable_backlight], pipe B +[ 1.800114] [drm:intel_panel_actually_set_backlight], set backlight PWM = 24832 +[ 1.800120] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 1.800125] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 1.800129] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 1.800133] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 1.800136] [drm:check_crtc_state], [CRTC:3] +[ 1.800139] [drm:check_crtc_state], [CRTC:4] +[ 1.800178] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +[ 1.800182] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +[ 1.800186] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 1.803473] Console: switching to colour frame buffer device 128x48 +[ 1.803478] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +[ 1.803481] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +[ 1.803483] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 1.806832] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device +[ 1.806835] i915 0000:00:02.0: registered panic notifier +[ 1.806859] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0 +[ 1.806909] ahci 0000:00:1f.2: version 3.0 +[ 1.807136] ahci 0000:00:1f.2: irq 45 for MSI/MSI-X +[ 1.807190] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled +[ 1.807222] ahci 0000:00:1f.2: AHCI 0001.0100 32 slots 4 ports 1.5 Gbps 0x1 impl SATA mode +[ 1.807228] ahci 0000:00:1f.2: flags: 64bit ncq ilck stag pm led clo pmp pio slum part +[ 1.808040] scsi2 : ahci +[ 1.808204] scsi3 : ahci +[ 1.808350] scsi4 : ahci +[ 1.808499] scsi5 : ahci +[ 1.808567] ata3: SATA max UDMA/133 abar m1024@0xe4344400 port 0xe4344500 irq 45 +[ 1.808570] ata4: DUMMY +[ 1.808572] ata5: DUMMY +[ 1.808574] ata6: DUMMY +[ 2.014396] psmouse serio1: trackpoint: IBM TrackPoint firmware: 0x0e, buttons: 3/3 +[ 2.033367] input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio1/input/input6 +[ 2.304119] ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300) +[ 2.305312] ata3.00: ATA-8: HITACHI HTS722010K9SA00, DC2ZC75A, max UDMA/133 +[ 2.305317] ata3.00: 195371568 sectors, multi 0: LBA48 NCQ (depth 31/32), AA +[ 2.306684] ata3.00: configured for UDMA/133 +[ 2.306893] scsi 2:0:0:0: Direct-Access ATA HITACHI HTS72201 DC2Z PQ: 0 ANSI: 5 +[ 2.307119] sd 2:0:0:0: Attached scsi generic sg0 type 0 +[ 2.307251] sd 2:0:0:0: [sda] 195371568 512-byte logical blocks: (100 GB/93.1 GiB) +[ 2.307395] sd 2:0:0:0: [sda] Write Protect is off +[ 2.307400] sd 2:0:0:0: [sda] Mode Sense: 00 3a 00 00 +[ 2.307477] sd 2:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA +[ 2.632829] sda: sda1 +[ 2.633271] sd 2:0:0:0: [sda] Attached SCSI disk +[ 2.784099] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +[ 2.784104] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +[ 2.784107] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 2.908607] [drm:i915_gem_open], +[ 2.908634] [drm:intel_crtc_cursor_set], cursor off +[ 2.908638] [drm:intel_crtc_set_config], [CRTC:3] [NOFB] +[ 2.908643] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0 +[ 2.908648] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 2.908652] [drm:intel_crtc_cursor_set], cursor off +[ 2.908655] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +[ 2.908660] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +[ 2.908663] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 2.908682] [drm:i915_gem_open], +[ 2.908697] [drm:intel_crtc_cursor_set], cursor off +[ 2.908700] [drm:intel_crtc_set_config], [CRTC:3] [NOFB] +[ 2.908703] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0 +[ 2.908706] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 2.908709] [drm:intel_crtc_cursor_set], cursor off +[ 2.908712] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +[ 2.908716] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +[ 2.908719] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 2.908735] [drm:i915_gem_open], +[ 2.908824] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +[ 2.908830] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +[ 2.908841] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 2.908846] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +[ 2.908850] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 2.908871] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +[ 2.908874] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 2.908880] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 2.908885] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 2.908889] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +[ 2.908894] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +[ 2.908901] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 2.912519] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 2.912529] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 2.912533] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 2.928108] [drm:intel_crt_detect], CRT not detected via hotplug +[ 2.932103] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 2.932110] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 2.932115] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 2.932118] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 2.932404] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 2.932407] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 2.932410] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 2.932413] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 2.932424] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 2.932427] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 2.932430] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 2.948104] [drm:intel_crt_detect], CRT not detected via hotplug +[ 2.952104] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 2.952111] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 2.952115] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 2.952118] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 2.952401] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 2.952403] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 2.952406] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 2.952409] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 2.952420] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 2.952423] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 2.952427] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 2.952431] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 2.952436] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 2.952459] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 2.952466] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 2.952471] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 2.952474] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 2.952477] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 2.952480] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 2.952483] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 2.952486] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 2.952489] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 2.952493] [drm:intel_dump_pipe_config], requested mode: +[ 2.952495] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 2.952500] [drm:intel_dump_pipe_config], adjusted mode: +[ 2.952503] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 2.952508] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 2.952512] [drm:intel_dump_pipe_config], port clock: 108000 +[ 2.952514] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 2.952517] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 2.952521] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 2.952524] [drm:intel_dump_pipe_config], ips: 0 +[ 2.952527] [drm:intel_dump_pipe_config], double wide: 0 +[ 2.959612] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120 +[ 2.959624] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 2.965254] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 2.965259] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 2.965261] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 2.965264] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 2.965267] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 2.965270] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 2.965272] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 2.965276] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 2.965279] [drm:i9xx_update_wm], memory self refresh disabled +[ 2.988110] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 2.988118] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 2.988123] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 2.988128] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 2.988133] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 2.988138] [drm:check_crtc_state], [CRTC:3] +[ 2.988151] [drm:check_crtc_state], [CRTC:4] +[ 3.028106] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 3.028114] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 3.044104] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 3.044113] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 3.089061] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 3.089065] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 3.089067] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 3.089070] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 3.089074] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 3.089077] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 3.089079] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 3.089083] [drm:i9xx_update_wm], memory self refresh enabled +[ 3.089089] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 3.089094] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 3.089097] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 3.089100] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 3.089103] [drm:check_crtc_state], [CRTC:3] +[ 3.089106] [drm:check_crtc_state], [CRTC:4] +[ 3.089258] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 3.090319] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 3.090324] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 3.090327] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 3.090331] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 3.090335] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 3.090351] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 3.090356] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 3.090359] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 3.090362] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 3.090365] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 3.090369] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 3.090371] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 3.090374] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 3.090378] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 3.090381] [drm:intel_dump_pipe_config], requested mode: +[ 3.090384] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 3.090389] [drm:intel_dump_pipe_config], adjusted mode: +[ 3.090391] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 3.090396] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 3.090400] [drm:intel_dump_pipe_config], port clock: 108000 +[ 3.090403] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 3.090406] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 3.090409] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 3.090412] [drm:intel_dump_pipe_config], ips: 0 +[ 3.090415] [drm:intel_dump_pipe_config], double wide: 0 +[ 3.096851] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120 +[ 3.096864] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 3.102491] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 3.102495] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 3.102498] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 3.102501] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 3.102504] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 3.102506] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 3.102509] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 3.102512] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 3.102515] [drm:i9xx_update_wm], memory self refresh disabled +[ 3.124103] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 3.124110] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 3.124116] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 3.124121] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 3.124126] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 3.124131] [drm:check_crtc_state], [CRTC:3] +[ 3.124143] [drm:check_crtc_state], [CRTC:4] +[ 3.164099] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 3.164104] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 3.188098] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 3.188105] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 3.229059] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 3.229063] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 3.229065] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 3.229068] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 3.229071] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 3.229075] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 3.229077] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 3.229081] [drm:i9xx_update_wm], memory self refresh enabled +[ 3.229086] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 3.229091] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 3.229094] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 3.229097] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 3.229100] [drm:check_crtc_state], [CRTC:3] +[ 3.229103] [drm:check_crtc_state], [CRTC:4] +[ 3.229256] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 3.230324] [drm:drm_mode_addfb], [FB:34] +[ 3.603108] [drm:drm_mode_addfb], [FB:34] +[ 3.603201] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +[ 3.603207] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +[ 3.603211] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 3.606628] [drm:drm_mode_setcrtc], [CRTC:4] +[ 3.606636] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1] +[ 3.606640] [drm:intel_crtc_set_config], [CRTC:4] [FB:34] #connectors=1 (x y) (0 0) +[ 3.606645] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=1 +[ 3.606648] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 3.610935] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 4096 +[ 3.627861] md: linear personality registered for level -1 +[ 3.628773] [drm:drm_mode_setcrtc], [CRTC:4] +[ 3.628782] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1] +[ 3.628787] [drm:intel_crtc_set_config], [CRTC:4] [FB:34] #connectors=1 (x y) (0 0) +[ 3.628793] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +[ 3.628797] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 3.633141] md: multipath personality registered for level -4 +[ 3.638092] md: raid0 personality registered for level 0 +[ 3.643718] md: raid1 personality registered for level 1 +[ 3.716024] raid6: sse2x1 2266 MB/s +[ 3.784028] raid6: sse2x2 4053 MB/s +[ 3.852032] raid6: sse2x4 4547 MB/s +[ 3.852036] raid6: using algorithm sse2x4 (4547 MB/s) +[ 3.852038] raid6: using ssse3x2 recovery algorithm +[ 3.854266] xor: measuring software checksum speed +[ 3.892019] prefetch64-sse: 6047.000 MB/sec +[ 3.932018] generic_sse: 5363.000 MB/sec +[ 3.932021] xor: using function: prefetch64-sse (6047.000 MB/sec) +[ 3.934078] async_tx: api initialized (async) +[ 3.946437] md: raid6 personality registered for level 6 +[ 3.946441] md: raid5 personality registered for level 5 +[ 3.946444] md: raid4 personality registered for level 4 +[ 3.957827] md: raid10 personality registered for level 10 +[ 9.243505] random: cryptsetup urandom read with 119 bits of entropy available +[ 9.246108] random: nonblocking pool is initialized +[ 9.266100] bio: create slab <bio-1> at 1 +[ 9.513079] bio: create slab <bio-1> at 1 +[ 10.331147] bio: create slab <bio-2> at 2 +[ 10.332723] Btrfs loaded +[ 11.808132] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 15.403838] EXT4-fs (dm-1): INFO: recovery required on readonly filesystem +[ 15.403844] EXT4-fs (dm-1): write access will be enabled during recovery +[ 17.127673] EXT4-fs (dm-1): orphan cleanup on readonly fs +[ 17.127796] EXT4-fs (dm-1): 1 orphan inode deleted +[ 17.127800] EXT4-fs (dm-1): recovery complete +[ 17.216730] EXT4-fs (dm-1): mounted filesystem with ordered data mode. Opts: (null) +[ 21.824056] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 28.044685] EXT4-fs (dm-1): re-mounted. Opts: errors=remount-ro +[ 29.253227] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 29.453218] systemd-udevd[569]: starting version 204 +[ 29.727869] lp: driver loaded but no devices found +[ 29.764157] ppdev: user-space parallel port driver +[ 30.065222] type=1400 audit(1409521824.544:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/cups/backend/cups-pdf" pid=647 comm="apparmor_parser" +[ 30.065234] type=1400 audit(1409521824.544:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/sbin/cupsd" pid=647 comm="apparmor_parser" +[ 30.065934] type=1400 audit(1409521824.544:4): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=647 comm="apparmor_parser" +[ 30.182531] Bluetooth: Core ver 2.17 +[ 30.184399] NET: Registered protocol family 31 +[ 30.184403] Bluetooth: HCI device and connection manager initialized +[ 30.184417] Bluetooth: HCI socket layer initialized +[ 30.184422] Bluetooth: L2CAP socket layer initialized +[ 30.184430] Bluetooth: SCO socket layer initialized +[ 30.216147] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 +[ 30.216153] Bluetooth: BNEP filters: protocol multicast +[ 30.216167] Bluetooth: BNEP socket layer initialized +[ 30.217692] Bluetooth: RFCOMM TTY layer initialized +[ 30.217701] Bluetooth: RFCOMM socket layer initialized +[ 30.217712] Bluetooth: RFCOMM ver 1.11 +[ 30.227989] intel_rng: FWH not detected +[ 30.348498] ACPI Warning: 0x0000000000000528-0x000000000000052f SystemIO conflicts with Region \PMIO 1 (20131115/utaddress-251) +[ 30.348510] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 30.348517] ACPI Warning: 0x00000000000004b0-0x00000000000004bf SystemIO conflicts with Region \GPIO 1 (20131115/utaddress-251) +[ 30.348522] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 30.348525] ACPI Warning: 0x0000000000000480-0x00000000000004af SystemIO conflicts with Region \GPIO 1 (20131115/utaddress-251) +[ 30.348530] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 30.348533] lpc_ich: Resource conflict(s) found affecting gpio_ich +[ 30.372503] leds_ss4200: no LED devices found +[ 30.372824] yenta_cardbus 0000:05:00.0: CardBus bridge found [0000:0000] +[ 30.398295] init: cups main process (656) killed by HUP signal +[ 30.398320] init: cups main process ended, respawning +[ 30.493456] type=1400 audit(1409521824.972:5): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/sbin/dhclient" pid=696 comm="apparmor_parser" +[ 30.493470] type=1400 audit(1409521824.972:6): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=696 comm="apparmor_parser" +[ 30.493478] type=1400 audit(1409521824.972:7): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=696 comm="apparmor_parser" +[ 30.496483] type=1400 audit(1409521824.976:8): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=696 comm="apparmor_parser" +[ 30.496497] type=1400 audit(1409521824.976:9): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=696 comm="apparmor_parser" +[ 30.496998] type=1400 audit(1409521824.976:10): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=696 comm="apparmor_parser" +[ 30.501113] yenta_cardbus 0000:05:00.0: ISA IRQ mask 0x0cb8, PCI irq 16 +[ 30.501120] yenta_cardbus 0000:05:00.0: Socket status: 30000006 +[ 30.501126] pci_bus 0000:05: Raising subordinate bus# of parent bus (#05) from #06 to #09 +[ 30.501295] yenta_cardbus 0000:05:00.0: pcmcia: parent PCI bridge window: [io 0x2000-0x3fff] +[ 30.501300] yenta_cardbus 0000:05:00.0: pcmcia: parent PCI bridge window: [mem 0xe0000000-0xe20fffff] +[ 30.501305] pcmcia_socket pcmcia_socket0: cs: memory probe 0xe0000000-0xe20fffff: +[ 30.501318] excluding 0xe1ef0000-0xe20fffff +[ 30.501325] yenta_cardbus 0000:05:00.0: pcmcia: parent PCI bridge window: [mem 0xe2100000-0xe40fffff 64bit pref] +[ 30.501329] pcmcia_socket pcmcia_socket0: cs: memory probe 0xe2100000-0xe40fffff: +[ 30.501411] excluding 0xe2100000-0xe40fffff +[ 30.761785] e1000e 0000:01:00.0: irq 44 for MSI/MSI-X +[ 30.772718] device-mapper: multipath: version 1.6.0 loaded +[ 30.841196] Non-volatile memory driver v1.3 +[ 30.846354] thinkpad_acpi: ThinkPad ACPI Extras v0.25 +[ 30.846360] thinkpad_acpi: http://ibm-acpi.sf.net/ +[ 30.846363] thinkpad_acpi: ThinkPad BIOS CBET4000 7BETC7WW (2.08 ), EC 7BHT37WW-3.4 +[ 30.846365] thinkpad_acpi: Lenovo ThinkPad X60s, model 1702L8G +[ 30.853545] thinkpad_acpi: detected a 8-level brightness capable ThinkPad +[ 30.853591] thinkpad_acpi: This ThinkPad has standard ACPI backlight brightness control, supported by the ACPI video driver +[ 30.853594] thinkpad_acpi: Disabling thinkpad-acpi brightness events by default... +[ 30.864133] e1000e 0000:01:00.0: irq 44 for MSI/MSI-X +[ 30.864654] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 30.904471] thinkpad_acpi: Standard ACPI backlight interface available, not loading native one +[ 30.904716] thinkpad_acpi: Console audio control enabled, mode: monitor (read only) +[ 30.917451] input: ThinkPad Extra Buttons as /devices/platform/thinkpad_acpi/input/input7 +[ 31.070696] hda_intel: probe_mask set to 0x1 for device 17aa:2010 +[ 31.070755] snd_hda_intel 0000:00:1b.0: irq 46 for MSI/MSI-X +[ 31.221006] autoconfig: line_outs=1 (0x5/0x0/0x0/0x0/0x0) type:line +[ 31.221013] speaker_outs=1 (0x7/0x0/0x0/0x0/0x0) +[ 31.221016] hp_outs=1 (0x6/0x0/0x0/0x0/0x0) +[ 31.221018] mono: mono_out=0x0 +[ 31.221020] dig-out=0xa/0x0 +[ 31.221022] inputs: +[ 31.221073] Rear Mic=0x18 +[ 31.221076] Front Mic=0x8 +[ 31.221079] Line=0x9 +[ 31.221081] CD=0x19 +[ 31.221084] Aux=0x17 +[ 31.306204] input: HDA Intel Front Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input12 +[ 31.309615] input: HDA Intel Line Out as /devices/pci0000:00/0000:00:1b.0/sound/card0/input11 +[ 31.312192] input: HDA Intel Line as /devices/pci0000:00/0000:00:1b.0/sound/card0/input10 +[ 31.316499] input: HDA Intel Front Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input9 +[ 31.316647] input: HDA Intel Rear Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input8 +[ 31.491549] pcmcia_socket pcmcia_socket0: cs: memory probe 0x0c0000-0x0fffff: +[ 31.491580] excluding 0xf0000-0xfffff +[ 31.491611] pcmcia_socket pcmcia_socket0: cs: memory probe 0xa0000000-0xa0ffffff: +[ 31.491646] clean. +[ 31.491672] pcmcia_socket pcmcia_socket0: cs: memory probe 0x60000000-0x60ffffff: +[ 31.491705] excluding 0x60000000-0x60ffffff +[ 31.840110] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 41.856122] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 51.872113] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 60.227922] type=1400 audit(1409521854.704:11): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/cups/backend/cups-pdf" pid=1132 comm="apparmor_parser" +[ 60.227937] type=1400 audit(1409521854.704:12): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=1132 comm="apparmor_parser" +[ 60.228674] type=1400 audit(1409521854.708:13): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=1132 comm="apparmor_parser" +[ 60.787283] type=1400 audit(1409521855.264:14): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/sbin/cups-browsed" pid=1143 comm="apparmor_parser" +[ 61.888127] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 70.140147] usb 1-1: new high-speed USB device number 2 using ehci-pci +[ 70.289002] usb 1-1: New USB device found, idVendor=0cf3, idProduct=9271 +[ 70.289008] usb 1-1: New USB device strings: Mfr=16, Product=32, SerialNumber=48 +[ 70.289012] usb 1-1: Product: UB93 +[ 70.289015] usb 1-1: Manufacturer: ATHEROS +[ 70.289019] usb 1-1: SerialNumber: 12345 +[ 70.441093] cfg80211: Calling CRDA to update world regulatory domain +[ 70.579584] cfg80211: World regulatory domain updated: +[ 70.579590] cfg80211: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp) +[ 70.579594] cfg80211: (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) +[ 70.579598] cfg80211: (2457000 KHz - 2482000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) +[ 70.579601] cfg80211: (2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) +[ 70.579604] cfg80211: (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) +[ 70.579607] cfg80211: (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) +[ 70.613130] usb 1-1: ath9k_htc: Firmware htc_9271.fw requested +[ 70.613246] usbcore: registered new interface driver ath9k_htc +[ 70.909647] usb 1-1: ath9k_htc: Transferred FW: htc_9271.fw, size: 50980 +[ 71.150263] ath9k_htc 1-1:1.0: ath9k_htc: HTC initialized with 33 credits +[ 71.418766] ath9k_htc 1-1:1.0: ath9k_htc: FW Version: 1.3 +[ 71.418770] ath: EEPROM regdomain: 0x65 +[ 71.418773] ath: EEPROM indicates we should expect a direct regpair map +[ 71.418777] ath: Country alpha2 being used: 00 +[ 71.418779] ath: Regpair used: 0x65 +[ 71.460149] ieee80211 phy0: Atheros AR9271 Rev:1 +[ 71.904067] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 79.945375] usb 1-1: USB disconnect, device number 2 +[ 80.151202] usb 1-1: ath9k_htc: USB layer deinitialized +[ 81.920129] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 91.936033] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 101.952108] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 111.968120] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 121.984105] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 132.000103] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 142.016108] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 149.297093] e1000e: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx +[ 149.297248] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ 151.231682] init: failsafe main process (837) killed by TERM signal +[ 151.489247] type=1400 audit(1409521945.968:15): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/sbin/dhclient" pid=1314 comm="apparmor_parser" +[ 151.489262] type=1400 audit(1409521945.968:16): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=1314 comm="apparmor_parser" +[ 151.489271] type=1400 audit(1409521945.968:17): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=1314 comm="apparmor_parser" +[ 151.490046] type=1400 audit(1409521945.968:18): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=1314 comm="apparmor_parser" +[ 151.490055] type=1400 audit(1409521945.968:19): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=1314 comm="apparmor_parser" +[ 151.490416] type=1400 audit(1409521945.968:20): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=1314 comm="apparmor_parser" +[ 151.495908] type=1400 audit(1409521945.972:21): apparmor="STATUS" operation="profile_load" profile="unconfined" name="system_tor" pid=1315 comm="apparmor_parser" +[ 151.500387] type=1400 audit(1409521945.980:22): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/lightdm/lightdm-guest-session" pid=1313 comm="apparmor_parser" +[ 151.500398] type=1400 audit(1409521945.980:23): apparmor="STATUS" operation="profile_load" profile="unconfined" name="chromium" pid=1313 comm="apparmor_parser" +[ 151.500825] type=1400 audit(1409521945.980:24): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="chromium" pid=1313 comm="apparmor_parser" +[ 152.032044] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 152.229628] init: lxdm main process (1372) killed by TERM signal +[ 153.407166] [drm:i915_gem_open], +[ 154.128716] [drm:i915_gem_open], +[ 154.128739] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +[ 154.129127] [drm:i915_gem_open], +[ 154.129142] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +[ 154.129149] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +[ 154.130884] [drm:drm_mode_addfb], [FB:35] +[ 154.131523] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +[ 154.131530] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +[ 154.131585] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 154.131595] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 154.131939] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 154.131949] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 154.131987] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 154.131996] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 154.256944] [drm:drm_mode_addfb], [FB:35] +[ 154.256966] [drm:drm_mode_setcrtc], [CRTC:4] +[ 154.256976] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1] +[ 154.256980] [drm:intel_crtc_set_config], [CRTC:4] [FB:35] #connectors=1 (x y) (0 0) +[ 154.256986] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=1 +[ 154.256991] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +[ 154.258670] [drm:i9xx_update_plane], Writing base 00800000 00000000 0 0 4096 +[ 154.543643] init: plymouth-upstart-bridge main process (377) killed by TERM signal +[ 158.275793] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 158.275804] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +[ 158.275809] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 158.275832] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +[ 158.275836] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 158.275841] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 158.275846] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 158.275851] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +[ 158.275856] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +[ 158.275865] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 158.276430] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 158.276435] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 158.276439] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 158.288160] [drm:intel_crt_detect], CRT not detected via hotplug +[ 158.292045] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 158.292055] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 158.292059] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 158.292062] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 158.292346] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 158.292349] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 158.292352] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 158.292358] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 158.292396] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 158.292401] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 158.292404] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 158.292410] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 158.292414] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 158.292433] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 158.292439] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 158.292443] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 158.292447] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 158.292450] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 158.292454] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 158.292457] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 158.292459] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 158.292463] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 158.292467] [drm:intel_dump_pipe_config], requested mode: +[ 158.292469] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 158.292475] [drm:intel_dump_pipe_config], adjusted mode: +[ 158.292477] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 158.292482] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 158.292486] [drm:intel_dump_pipe_config], port clock: 108000 +[ 158.292489] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 158.292492] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 158.292495] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 158.292499] [drm:intel_dump_pipe_config], ips: 0 +[ 158.292501] [drm:intel_dump_pipe_config], double wide: 0 +[ 158.300167] [drm:i9xx_update_plane], Writing base 00C00000 00000000 0 0 5120 +[ 158.300181] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 158.305816] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 158.305823] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 158.305825] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 158.305828] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 158.305832] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 158.305834] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 158.305837] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 158.305840] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 158.305844] [drm:i9xx_update_wm], memory self refresh disabled +[ 158.324056] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 158.324066] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 158.324071] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 158.324074] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 158.324078] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 158.324081] [drm:check_crtc_state], [CRTC:3] +[ 158.324093] [drm:check_crtc_state], [CRTC:4] +[ 158.376040] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 158.376049] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 158.392042] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 158.392052] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 158.433012] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 158.433022] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 158.433025] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 158.433028] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 158.433031] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 158.433034] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 158.433037] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 158.433041] [drm:i9xx_update_wm], memory self refresh enabled +[ 158.433052] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 158.433058] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 158.433061] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 158.433065] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 158.433068] [drm:check_crtc_state], [CRTC:3] +[ 158.433072] [drm:check_crtc_state], [CRTC:4] +[ 158.433226] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 158.887022] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 158.887071] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 158.887077] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 158.887081] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 158.887098] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 158.887104] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 158.887108] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 158.887112] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 158.887115] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 158.887118] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 158.887121] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 158.887124] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 158.887128] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 158.887131] [drm:intel_dump_pipe_config], requested mode: +[ 158.887134] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 158.887139] [drm:intel_dump_pipe_config], adjusted mode: +[ 158.887142] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 158.887147] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 158.887151] [drm:intel_dump_pipe_config], port clock: 108000 +[ 158.887154] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 158.887157] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 158.887160] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 158.887164] [drm:intel_dump_pipe_config], ips: 0 +[ 158.887167] [drm:intel_dump_pipe_config], double wide: 0 +[ 158.895657] [drm:i9xx_update_plane], Writing base 00C00000 00000000 0 0 5120 +[ 158.895671] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 158.901303] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 158.901308] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 158.901310] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 158.901313] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 158.901317] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 158.901319] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 158.901322] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 158.901325] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 158.901328] [drm:i9xx_update_wm], memory self refresh disabled +[ 158.924049] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 158.924061] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 158.924065] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 158.924069] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 158.924072] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 158.924076] [drm:check_crtc_state], [CRTC:3] +[ 158.924086] [drm:check_crtc_state], [CRTC:4] +[ 158.964043] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 158.964051] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 158.984046] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 158.984058] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 159.033005] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 159.033015] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 159.033018] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 159.033021] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 159.033025] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 159.033028] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 159.033031] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 159.033035] [drm:i9xx_update_wm], memory self refresh enabled +[ 159.033047] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 159.033053] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 159.033057] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 159.033060] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 159.033064] [drm:check_crtc_state], [CRTC:3] +[ 159.033067] [drm:check_crtc_state], [CRTC:4] +[ 159.034333] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 159.056046] [drm:intel_crt_detect], CRT not detected via hotplug +[ 159.060079] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 159.060087] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 159.060091] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 159.060094] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 159.060374] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 159.060377] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 159.060380] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 162.048052] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 168.846014] [drm:i915_gem_open], +[ 169.194795] [drm:i915_gem_open], +[ 169.249719] [drm:i915_gem_open], +[ 169.283957] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 169.283968] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +[ 169.283973] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 169.283995] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +[ 169.284035] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 169.284041] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 169.284046] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 169.284051] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +[ 169.284055] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +[ 169.284065] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 169.284300] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 169.284305] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 169.284308] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 169.300132] [drm:intel_crt_detect], CRT not detected via hotplug +[ 169.304126] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 169.304134] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 169.304138] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 169.304142] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 169.304438] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 169.304441] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 169.304445] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 169.304449] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 169.304503] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 169.304508] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 169.304512] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 169.304516] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 169.304521] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 169.304535] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 169.304541] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 169.304544] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 169.304548] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 169.304551] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 169.304554] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 169.304557] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 169.304560] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 169.304563] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 169.304567] [drm:intel_dump_pipe_config], requested mode: +[ 169.304569] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 169.304575] [drm:intel_dump_pipe_config], adjusted mode: +[ 169.304577] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 169.304582] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 169.304586] [drm:intel_dump_pipe_config], port clock: 108000 +[ 169.304589] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 169.304592] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 169.304595] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 169.304599] [drm:intel_dump_pipe_config], ips: 0 +[ 169.304601] [drm:intel_dump_pipe_config], double wide: 0 +[ 169.312528] [drm:i9xx_update_plane], Writing base 02800000 00000000 0 0 5120 +[ 169.312539] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 169.318168] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 169.318172] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 169.318175] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 169.318178] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 169.318181] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 169.318184] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 169.318187] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 169.318190] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 169.318193] [drm:i9xx_update_wm], memory self refresh disabled +[ 169.340052] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 169.340063] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 169.340070] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 169.340075] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 169.340080] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 169.340085] [drm:check_crtc_state], [CRTC:3] +[ 169.340098] [drm:check_crtc_state], [CRTC:4] +[ 169.380054] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 169.380062] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 169.424049] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 169.424058] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 169.465004] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 169.465012] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 169.465015] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 169.465018] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 169.465021] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 169.465025] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 169.465028] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 169.465031] [drm:i9xx_update_wm], memory self refresh enabled +[ 169.465043] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 169.465048] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 169.465052] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 169.465055] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 169.465059] [drm:check_crtc_state], [CRTC:3] +[ 169.465062] [drm:check_crtc_state], [CRTC:4] +[ 169.465213] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 169.535204] [drm:intel_crtc_cursor_set], cursor off +[ 169.646187] [drm:intel_crtc_cursor_set], cursor off +[ 170.257502] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 170.257514] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +[ 170.257520] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 170.257543] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +[ 170.257547] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 170.257553] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 170.257558] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 170.257563] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +[ 170.257568] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +[ 170.257576] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 170.257806] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 170.257811] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 170.257815] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 170.272041] [drm:intel_crt_detect], CRT not detected via hotplug +[ 170.276070] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 170.276077] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 170.276080] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 170.276083] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 170.276360] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 170.276363] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 170.276366] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 170.276370] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 170.276393] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 170.276397] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 170.276401] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 170.276405] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 170.276410] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 170.276424] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 170.276430] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 170.276433] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 170.276437] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 170.276440] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 170.276443] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 170.276446] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 170.276449] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 170.276453] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 170.276456] [drm:intel_dump_pipe_config], requested mode: +[ 170.276459] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 170.276464] [drm:intel_dump_pipe_config], adjusted mode: +[ 170.276467] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 170.276472] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 170.276476] [drm:intel_dump_pipe_config], port clock: 108000 +[ 170.276479] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 170.276482] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 170.276485] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 170.276488] [drm:intel_dump_pipe_config], ips: 0 +[ 170.276491] [drm:intel_dump_pipe_config], double wide: 0 +[ 170.283303] [drm:i9xx_update_plane], Writing base 02800000 00000000 0 0 5120 +[ 170.283314] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 170.288947] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 170.288952] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 170.288954] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 170.288958] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 170.288961] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 170.288963] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 170.288966] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 170.288969] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 170.288972] [drm:i9xx_update_wm], memory self refresh disabled +[ 170.328052] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 170.328061] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 170.328066] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 170.328069] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 170.328073] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 170.328076] [drm:check_crtc_state], [CRTC:3] +[ 170.328087] [drm:check_crtc_state], [CRTC:4] +[ 170.368047] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 170.368054] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 170.384041] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 170.384048] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 170.429004] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 170.429010] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 170.429013] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 170.429016] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 170.429020] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 170.429023] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 170.429026] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 170.429029] [drm:i9xx_update_wm], memory self refresh enabled +[ 170.429043] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 170.429048] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 170.429052] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 170.429055] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 170.429058] [drm:check_crtc_state], [CRTC:3] +[ 170.429062] [drm:check_crtc_state], [CRTC:4] +[ 170.429212] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 171.084188] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 171.084198] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +[ 171.084203] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 171.084225] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +[ 171.084229] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 171.084235] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 171.084240] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 171.084245] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +[ 171.084249] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +[ 171.084258] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 171.084505] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 171.084510] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 171.084514] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 171.100045] [drm:intel_crt_detect], CRT not detected via hotplug +[ 171.104195] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 171.104204] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 171.104207] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 171.104210] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 171.104487] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 171.104490] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 171.104494] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 171.104498] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 171.104532] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 171.104537] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 171.104541] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 171.104546] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 171.104550] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 171.104568] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 171.104574] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 171.104577] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 171.104581] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 171.104584] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 171.104588] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 171.104590] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 171.104593] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 171.104597] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 171.104600] [drm:intel_dump_pipe_config], requested mode: +[ 171.104603] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 171.104608] [drm:intel_dump_pipe_config], adjusted mode: +[ 171.104611] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 171.104616] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 171.104620] [drm:intel_dump_pipe_config], port clock: 108000 +[ 171.104623] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 171.104626] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 171.104629] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 171.104633] [drm:intel_dump_pipe_config], ips: 0 +[ 171.104635] [drm:intel_dump_pipe_config], double wide: 0 +[ 171.113463] [drm:i9xx_update_plane], Writing base 02800000 00000000 0 0 5120 +[ 171.113476] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 171.119107] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 171.119112] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 171.119115] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 171.119118] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 171.119122] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 171.119124] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 171.119127] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 171.119130] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 171.119133] [drm:i9xx_update_wm], memory self refresh disabled +[ 171.144051] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 171.144061] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 171.144065] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 171.144069] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 171.144073] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 171.144076] [drm:check_crtc_state], [CRTC:3] +[ 171.144087] [drm:check_crtc_state], [CRTC:4] +[ 171.212055] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 171.212063] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 171.228056] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 171.228066] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 171.269008] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 171.269017] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 171.269020] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 171.269023] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 171.269026] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 171.269029] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 171.269032] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 171.269036] [drm:i9xx_update_wm], memory self refresh enabled +[ 171.271055] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 171.271062] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 171.271065] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 171.271069] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 171.271072] [drm:check_crtc_state], [CRTC:3] +[ 171.271076] [drm:check_crtc_state], [CRTC:4] +[ 171.271234] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 171.449390] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 171.449401] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +[ 171.449406] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 171.449429] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +[ 171.449433] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 171.449439] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 171.449444] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 171.449449] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +[ 171.449453] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +[ 171.449462] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 171.449715] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 171.449720] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 171.449724] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 171.464239] [drm:intel_crt_detect], CRT not detected via hotplug +[ 171.468039] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 171.468046] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 171.468050] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 171.468053] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 171.468335] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 171.468338] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 171.468341] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 171.468346] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 171.468379] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 171.468384] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 171.468388] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 171.468393] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 171.468397] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 171.468414] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 171.468420] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 171.468424] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 171.468427] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 171.468431] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 171.468434] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 171.468437] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 171.468440] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 171.468443] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 171.468447] [drm:intel_dump_pipe_config], requested mode: +[ 171.468450] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 171.468455] [drm:intel_dump_pipe_config], adjusted mode: +[ 171.468458] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 171.468462] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 171.468467] [drm:intel_dump_pipe_config], port clock: 108000 +[ 171.468469] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 171.468472] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 171.468476] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 171.468479] [drm:intel_dump_pipe_config], ips: 0 +[ 171.468482] [drm:intel_dump_pipe_config], double wide: 0 +[ 171.475659] [drm:i9xx_update_plane], Writing base 02860000 00000000 0 0 5120 +[ 171.475670] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 171.481311] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 171.481317] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 171.481320] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 171.481323] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 171.481326] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 171.481329] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 171.481331] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 171.481335] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 171.481338] [drm:i9xx_update_wm], memory self refresh disabled +[ 171.504105] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 171.504115] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 171.504119] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 171.504123] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 171.504127] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 171.504130] [drm:check_crtc_state], [CRTC:3] +[ 171.504141] [drm:check_crtc_state], [CRTC:4] +[ 171.568041] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 171.568048] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 171.628046] [drm:intel_wait_for_vblank], vblank wait timed out +[ 171.628054] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 171.628059] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 171.673007] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 171.673014] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 171.673017] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 171.673020] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 171.673023] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 171.673027] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 171.673029] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 171.673033] [drm:i9xx_update_wm], memory self refresh enabled +[ 171.673133] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 171.673139] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 171.673143] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 171.673147] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 171.673151] [drm:check_crtc_state], [CRTC:3] +[ 171.673154] [drm:check_crtc_state], [CRTC:4] +[ 171.673361] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 171.676431] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 171.676439] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +[ 171.676444] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 171.676465] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +[ 171.676468] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 171.676474] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 171.676479] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 171.676483] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +[ 171.676488] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +[ 171.676497] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 171.676719] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 171.676724] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 171.676727] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 171.692056] [drm:intel_crt_detect], CRT not detected via hotplug +[ 171.697188] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 171.697197] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 171.697201] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 171.697203] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 171.697483] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 171.697486] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 171.697489] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 171.697494] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 171.697528] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 171.697534] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 171.697537] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 171.697542] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 171.697546] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 171.697564] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 171.697570] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 171.697574] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 171.697578] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 171.697581] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 171.697585] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 171.697588] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 171.697590] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 171.697594] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 171.697598] [drm:intel_dump_pipe_config], requested mode: +[ 171.697600] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 171.697605] [drm:intel_dump_pipe_config], adjusted mode: +[ 171.697608] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 171.697613] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 171.697617] [drm:intel_dump_pipe_config], port clock: 108000 +[ 171.697620] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 171.697623] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 171.697626] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 171.697629] [drm:intel_dump_pipe_config], ips: 0 +[ 171.697632] [drm:intel_dump_pipe_config], double wide: 0 +[ 171.705575] [drm:i9xx_update_plane], Writing base 02860000 00000000 0 0 5120 +[ 171.705587] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 171.711217] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 171.711221] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 171.711224] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 171.711227] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 171.711230] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 171.711233] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 171.711235] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 171.711239] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 171.711242] [drm:i9xx_update_wm], memory self refresh disabled +[ 171.732081] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 171.732087] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 171.732091] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 171.732095] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 171.732098] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 171.732102] [drm:check_crtc_state], [CRTC:3] +[ 171.732112] [drm:check_crtc_state], [CRTC:4] +[ 171.772048] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 171.772053] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 171.788030] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 171.788036] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 171.837008] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 171.837016] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 171.837019] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 171.837022] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 171.837026] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 171.837029] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 171.837032] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 171.837035] [drm:i9xx_update_wm], memory self refresh enabled +[ 171.837045] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 171.837050] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 171.837053] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 171.837057] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 171.837060] [drm:check_crtc_state], [CRTC:3] +[ 171.837064] [drm:check_crtc_state], [CRTC:4] +[ 171.837214] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 171.997747] [drm:drm_mode_addfb], [FB:34] +[ 172.064040] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 182.080084] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 191.573667] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 191.573678] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +[ 191.573684] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +[ 191.573706] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +[ 191.573710] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +[ 191.573715] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 191.573720] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +[ 191.573725] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +[ 191.573730] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +[ 191.573739] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +[ 191.573976] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +[ 191.573980] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +[ 191.573984] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +[ 191.596041] [drm:intel_crt_detect], CRT not detected via hotplug +[ 191.600059] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +[ 191.600066] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 191.600070] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +[ 191.600072] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +[ 191.600350] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +[ 191.600353] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +[ 191.600356] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +[ 191.600359] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +[ 191.600384] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +[ 191.600388] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +[ 191.600392] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +[ 191.600397] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 191.600401] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +[ 191.600417] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +[ 191.600423] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +[ 191.600426] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +[ 191.600429] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +[ 191.600433] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +[ 191.600436] [drm:intel_dump_pipe_config], cpu_transcoder: A +[ 191.600439] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +[ 191.600442] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 191.600445] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +[ 191.600449] [drm:intel_dump_pipe_config], requested mode: +[ 191.600452] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 191.600457] [drm:intel_dump_pipe_config], adjusted mode: +[ 191.600459] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +[ 191.600464] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +[ 191.600468] [drm:intel_dump_pipe_config], port clock: 108000 +[ 191.600471] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +[ 191.600474] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +[ 191.600477] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +[ 191.600481] [drm:intel_dump_pipe_config], ips: 0 +[ 191.600484] [drm:intel_dump_pipe_config], double wide: 0 +[ 191.607207] [drm:i9xx_update_plane], Writing base 05040000 00000000 0 0 5120 +[ 191.607218] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +[ 191.612854] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 191.612859] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 191.612862] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 191.612865] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 191.612868] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +[ 191.612870] [drm:intel_calculate_wm], FIFO watermark level: -5 +[ 191.612873] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +[ 191.612876] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +[ 191.612880] [drm:i9xx_update_wm], memory self refresh disabled +[ 191.636051] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 191.636059] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +[ 191.636063] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 191.636066] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 191.636070] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 191.636073] [drm:check_crtc_state], [CRTC:3] +[ 191.636083] [drm:check_crtc_state], [CRTC:4] +[ 191.676047] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +[ 191.676053] [drm:intel_tv_detect_type], Unrecognised TV connection +[ 191.692041] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +[ 191.692047] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +[ 191.745006] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +[ 191.745014] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +[ 191.745017] [drm:intel_calculate_wm], FIFO watermark level: 9 +[ 191.745020] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +[ 191.745024] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +[ 191.745027] [drm:i9xx_update_wm], self-refresh entries: 64 +[ 191.745030] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +[ 191.745034] [drm:i9xx_update_wm], memory self refresh enabled +[ 191.745045] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +[ 191.745050] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +[ 191.745053] [drm:check_encoder_state], [ENCODER:16:DAC-16] +[ 191.745057] [drm:check_encoder_state], [ENCODER:18:TV-18] +[ 191.745060] [drm:check_crtc_state], [CRTC:3] +[ 191.745064] [drm:check_crtc_state], [CRTC:4] +[ 191.745217] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +[ 192.096128] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 202.112100] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 212.128145] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 222.144192] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 232.160064] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 242.176124] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 251.926550] [drm:intel_crtc_cursor_set], cursor off +[ 252.192155] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 262.208177] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 272.224155] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 282.240058] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 288.627538] [drm:i915_gem_open], +[ 292.256054] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 302.272054] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 312.288157] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 322.304125] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 332.320142] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 333.456176] usb 1-5: new high-speed USB device number 3 using ehci-pci +[ 333.589307] usb 1-5: New USB device found, idVendor=8644, idProduct=8003 +[ 333.589312] usb 1-5: New USB device strings: Mfr=1, Product=2, SerialNumber=3 +[ 333.589317] usb 1-5: Product: USB Flash Disk +[ 333.589320] usb 1-5: Manufacturer: General +[ 333.589323] usb 1-5: SerialNumber: 04040310000181F6 +[ 333.679670] usb-storage 1-5:1.0: USB Mass Storage device detected +[ 333.679783] scsi6 : usb-storage 1-5:1.0 +[ 333.679899] usbcore: registered new interface driver usb-storage +[ 334.676977] scsi 6:0:0:0: Direct-Access General USB Flash Disk 1.00 PQ: 0 ANSI: 2 +[ 334.677369] sd 6:0:0:0: Attached scsi generic sg1 type 0 +[ 334.678067] sd 6:0:0:0: [sdb] 15669248 512-byte logical blocks: (8.02 GB/7.47 GiB) +[ 334.679430] sd 6:0:0:0: [sdb] Write Protect is off +[ 334.679436] sd 6:0:0:0: [sdb] Mode Sense: 03 00 00 00 +[ 334.680147] sd 6:0:0:0: [sdb] No Caching mode page found +[ 334.680153] sd 6:0:0:0: [sdb] Assuming drive cache: write through +[ 334.685053] sd 6:0:0:0: [sdb] No Caching mode page found +[ 334.685059] sd 6:0:0:0: [sdb] Assuming drive cache: write through +[ 334.687362] sdb: sdb1 +[ 334.690313] sd 6:0:0:0: [sdb] No Caching mode page found +[ 334.690318] sd 6:0:0:0: [sdb] Assuming drive cache: write through +[ 334.690323] sd 6:0:0:0: [sdb] Attached SCSI removable disk +[ 342.336060] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 343.641289] systemd-hostnamed[2780]: Warning: nss-myhostname is not installed. Changing the local hostname might make it unresolveable. Please install nss-myhostname! +[ 347.448355] FAT-fs (sdb1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 352.352127] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +[ 353.599097] [drm:intel_crtc_cursor_set], cursor off +[ 362.368145] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 diff --git a/docs/future/dumps/pte_x60_6718/kern.log b/docs/future/dumps/pte_x60_6718/kern.log new file mode 100644 index 00000000..b74142a5 --- /dev/null +++ b/docs/future/dumps/pte_x60_6718/kern.log @@ -0,0 +1,2026 @@ +Aug 31 01:30:17 minifree kernel: [ 2923.992095] perf samples too long (2511 > 2500), lowering kernel.perf_event_max_sample_rate to 50000 +Aug 31 22:50:24 minifree kernel: [ 0.000000] Initializing cgroup subsys cpuset +Aug 31 22:50:24 minifree kernel: [ 0.000000] Initializing cgroup subsys cpu +Aug 31 22:50:24 minifree kernel: [ 0.000000] Initializing cgroup subsys cpuacct +Aug 31 22:50:24 minifree kernel: [ 0.000000] Linux version 3.13.0-34-generic (root@devel.trisquel.info) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #0trisquel2 SMP Wed Aug 27 02:19:14 UTC 2014 (Ubuntu 3.13.0-34.60+7.0trisquel2-generic 3.13.11.4-gnu) +Aug 31 22:50:24 minifree kernel: [ 0.000000] Command line: BOOT_IMAGE=/vmlinuz root=/dev/mapper/buzz-distro cryptdevice=/dev/mapper/buzz-distro:root quiet splash drm.debug=0x06 ro +Aug 31 22:50:24 minifree kernel: [ 0.000000] KERNEL supported cpus: +Aug 31 22:50:24 minifree kernel: [ 0.000000] Intel GenuineIntel +Aug 31 22:50:24 minifree kernel: [ 0.000000] AMD AuthenticAMD +Aug 31 22:50:24 minifree kernel: [ 0.000000] Centaur CentaurHauls +Aug 31 22:50:24 minifree kernel: [ 0.000000] e820: BIOS-provided physical RAM map: +Aug 31 22:50:24 minifree kernel: [ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000000fff] type 16 +Aug 31 22:50:24 minifree kernel: [ 0.000000] BIOS-e820: [mem 0x0000000000001000-0x000000000009ffff] usable +Aug 31 22:50:24 minifree kernel: [ 0.000000] BIOS-e820: [mem 0x00000000000c0000-0x00000000000fffff] reserved +Aug 31 22:50:24 minifree kernel: [ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000007f6d4fff] usable +Aug 31 22:50:24 minifree kernel: [ 0.000000] BIOS-e820: [mem 0x000000007f6d5000-0x000000007f7fffff] type 16 +Aug 31 22:50:24 minifree kernel: [ 0.000000] BIOS-e820: [mem 0x000000007f800000-0x000000007fffffff] reserved +Aug 31 22:50:24 minifree kernel: [ 0.000000] BIOS-e820: [mem 0x00000000f0000000-0x00000000f3ffffff] reserved +Aug 31 22:50:24 minifree kernel: [ 0.000000] NX (Execute Disable) protection: active +Aug 31 22:50:24 minifree kernel: [ 0.000000] SMBIOS 2.7 present. +Aug 31 22:50:24 minifree kernel: [ 0.000000] DMI: LENOVO 1702L8G/1702L8G, BIOS CBET4000 7BETC7WW (2.08 ) 08/30/2014 +Aug 31 22:50:24 minifree kernel: [ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved +Aug 31 22:50:24 minifree kernel: [ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable +Aug 31 22:50:24 minifree kernel: [ 0.000000] No AGP bridge found +Aug 31 22:50:24 minifree kernel: [ 0.000000] e820: last_pfn = 0x7f6d5 max_arch_pfn = 0x400000000 +Aug 31 22:50:24 minifree kernel: [ 0.000000] MTRR default type: uncachable +Aug 31 22:50:24 minifree kernel: [ 0.000000] MTRR fixed ranges enabled: +Aug 31 22:50:24 minifree kernel: [ 0.000000] 00000-9FFFF write-back +Aug 31 22:50:24 minifree kernel: [ 0.000000] A0000-BFFFF uncachable +Aug 31 22:50:24 minifree kernel: [ 0.000000] C0000-FFFFF write-back +Aug 31 22:50:24 minifree kernel: [ 0.000000] MTRR variable ranges enabled: +Aug 31 22:50:24 minifree kernel: [ 0.000000] 0 base 000000000 mask F80000000 write-back +Aug 31 22:50:24 minifree kernel: [ 0.000000] 1 base 07F800000 mask FFF800000 uncachable +Aug 31 22:50:24 minifree kernel: [ 0.000000] 2 base 0D0000000 mask FF0000000 write-combining +Aug 31 22:50:24 minifree kernel: [ 0.000000] 3 disabled +Aug 31 22:50:24 minifree kernel: [ 0.000000] 4 disabled +Aug 31 22:50:24 minifree kernel: [ 0.000000] 5 disabled +Aug 31 22:50:24 minifree kernel: [ 0.000000] 6 disabled +Aug 31 22:50:24 minifree kernel: [ 0.000000] 7 disabled +Aug 31 22:50:24 minifree kernel: [ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 +Aug 31 22:50:24 minifree kernel: [ 0.000000] found SMP MP-table at [mem 0x000f0400-0x000f040f] mapped at [ffff8800000f0400] +Aug 31 22:50:24 minifree kernel: [ 0.000000] Scanning 1 areas for low memory corruption +Aug 31 22:50:24 minifree kernel: [ 0.000000] Base memory trampoline at [ffff880000099000] 99000 size 24576 +Aug 31 22:50:24 minifree kernel: [ 0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] [mem 0x00000000-0x000fffff] page 4k +Aug 31 22:50:24 minifree kernel: [ 0.000000] BRK [0x01fe0000, 0x01fe0fff] PGTABLE +Aug 31 22:50:24 minifree kernel: [ 0.000000] BRK [0x01fe1000, 0x01fe1fff] PGTABLE +Aug 31 22:50:24 minifree kernel: [ 0.000000] BRK [0x01fe2000, 0x01fe2fff] PGTABLE +Aug 31 22:50:24 minifree kernel: [ 0.000000] init_memory_mapping: [mem 0x7f400000-0x7f5fffff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] [mem 0x7f400000-0x7f5fffff] page 2M +Aug 31 22:50:24 minifree kernel: [ 0.000000] BRK [0x01fe3000, 0x01fe3fff] PGTABLE +Aug 31 22:50:24 minifree kernel: [ 0.000000] init_memory_mapping: [mem 0x7c000000-0x7f3fffff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] [mem 0x7c000000-0x7f3fffff] page 2M +Aug 31 22:50:24 minifree kernel: [ 0.000000] init_memory_mapping: [mem 0x00100000-0x7bffffff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] [mem 0x00100000-0x001fffff] page 4k +Aug 31 22:50:24 minifree kernel: [ 0.000000] [mem 0x00200000-0x7bffffff] page 2M +Aug 31 22:50:24 minifree kernel: [ 0.000000] init_memory_mapping: [mem 0x7f600000-0x7f6d4fff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] [mem 0x7f600000-0x7f6d4fff] page 4k +Aug 31 22:50:24 minifree kernel: [ 0.000000] BRK [0x01fe4000, 0x01fe4fff] PGTABLE +Aug 31 22:50:24 minifree kernel: [ 0.000000] RAMDISK: [mem 0x35122000-0x36888fff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: RSDP 00000000000f0800 000024 (v02 CORE ) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: XSDT 000000007f7de0e0 00004C (v01 CORE COREBOOT 00000000 CORE 00000000) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: HPET 000000007f7de210 000038 (v01 CORE COREBOOT 00000000 CORE 00000000) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: APIC 000000007f7de250 000068 (v01 CORE COREBOOT 00000000 CORE 00000000) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: MCFG 000000007f7de2c0 00003C (v01 CORE COREBOOT 00000000 CORE 00000000) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: FACP 000000007f7e15c0 0000F4 (v03 CORE COREBOOT 00000000 CORE 00000000) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: DSDT 000000007f7de340 003171 (v03 COREv4 COREBOOT 20090419 INTL 20140114) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: FACS 000000007f7de300 000040 +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: SSDT 000000007f7e16c0 000306 (v02 CORE COREBOOT 0000002A CORE 0000002A) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: Local APIC address 0xfee00000 +Aug 31 22:50:24 minifree kernel: [ 0.000000] No NUMA configuration found +Aug 31 22:50:24 minifree kernel: [ 0.000000] Faking a node at [mem 0x0000000000000000-0x000000007f6d4fff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] Initmem setup node 0 [mem 0x00000000-0x7f6d4fff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] NODE_DATA [mem 0x7f6d0000-0x7f6d4fff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] [ffffea0000000000-ffffea0001ffffff] PMD -> [ffff88007ce00000-ffff88007edfffff] on node 0 +Aug 31 22:50:24 minifree kernel: [ 0.000000] Zone ranges: +Aug 31 22:50:24 minifree kernel: [ 0.000000] DMA [mem 0x00001000-0x00ffffff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] DMA32 [mem 0x01000000-0xffffffff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] Normal empty +Aug 31 22:50:24 minifree kernel: [ 0.000000] Movable zone start for each node +Aug 31 22:50:24 minifree kernel: [ 0.000000] Early memory node ranges +Aug 31 22:50:24 minifree kernel: [ 0.000000] node 0: [mem 0x00001000-0x0009ffff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] node 0: [mem 0x00100000-0x7f6d4fff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] On node 0 totalpages: 521844 +Aug 31 22:50:24 minifree kernel: [ 0.000000] DMA zone: 64 pages used for memmap +Aug 31 22:50:24 minifree kernel: [ 0.000000] DMA zone: 22 pages reserved +Aug 31 22:50:24 minifree kernel: [ 0.000000] DMA zone: 3999 pages, LIFO batch:0 +Aug 31 22:50:24 minifree kernel: [ 0.000000] DMA32 zone: 8092 pages used for memmap +Aug 31 22:50:24 minifree kernel: [ 0.000000] DMA32 zone: 517845 pages, LIFO batch:31 +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: PM-Timer IO Port: 0x508 +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: Local APIC address 0xfee00000 +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) +Aug 31 22:50:24 minifree kernel: [ 0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23 +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: IRQ0 used by override. +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: IRQ2 used by override. +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: IRQ9 used by override. +Aug 31 22:50:24 minifree kernel: [ 0.000000] Using ACPI (MADT) for SMP configuration information +Aug 31 22:50:24 minifree kernel: [ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000 +Aug 31 22:50:24 minifree kernel: [ 0.000000] smpboot: Allowing 2 CPUs, 0 hotplug CPUs +Aug 31 22:50:24 minifree kernel: [ 0.000000] nr_irqs_gsi: 40 +Aug 31 22:50:24 minifree kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000bffff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x000c0000-0x000fffff] +Aug 31 22:50:24 minifree kernel: [ 0.000000] e820: [mem 0x80000000-0xefffffff] available for PCI devices +Aug 31 22:50:24 minifree kernel: [ 0.000000] Booting paravirtualized kernel on bare hardware +Aug 31 22:50:24 minifree kernel: [ 0.000000] setup_percpu: NR_CPUS:256 nr_cpumask_bits:256 nr_cpu_ids:2 nr_node_ids:1 +Aug 31 22:50:24 minifree kernel: [ 0.000000] PERCPU: Embedded 29 pages/cpu @ffff88007f400000 s86336 r8192 d24256 u1048576 +Aug 31 22:50:24 minifree kernel: [ 0.000000] pcpu-alloc: s86336 r8192 d24256 u1048576 alloc=1*2097152 +Aug 31 22:50:24 minifree kernel: [ 0.000000] pcpu-alloc: [0] 0 1 +Aug 31 22:50:24 minifree kernel: [ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 513666 +Aug 31 22:50:24 minifree kernel: [ 0.000000] Policy zone: DMA32 +Aug 31 22:50:24 minifree kernel: [ 0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz root=/dev/mapper/buzz-distro cryptdevice=/dev/mapper/buzz-distro:root quiet splash drm.debug=0x06 ro +Aug 31 22:50:24 minifree kernel: [ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.000000] Checking aperture... +Aug 31 22:50:24 minifree kernel: [ 0.000000] No AGP bridge found +Aug 31 22:50:24 minifree kernel: [ 0.000000] Calgary: detecting Calgary via BIOS EBDA area +Aug 31 22:50:24 minifree kernel: [ 0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing! +Aug 31 22:50:24 minifree kernel: [ 0.000000] Memory: 2013772K/2087376K available (7391K kernel code, 1145K rwdata, 3416K rodata, 1336K init, 1440K bss, 73604K reserved) +Aug 31 22:50:24 minifree kernel: [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +Aug 31 22:50:24 minifree kernel: [ 0.000000] Hierarchical RCU implementation. +Aug 31 22:50:24 minifree kernel: [ 0.000000] RCU dyntick-idle grace-period acceleration is enabled. +Aug 31 22:50:24 minifree kernel: [ 0.000000] RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2. +Aug 31 22:50:24 minifree kernel: [ 0.000000] Offload RCU callbacks from all CPUs +Aug 31 22:50:24 minifree kernel: [ 0.000000] Offload RCU callbacks from CPUs: 0-1. +Aug 31 22:50:24 minifree kernel: [ 0.000000] NR_IRQS:16640 nr_irqs:512 16 +Aug 31 22:50:24 minifree kernel: [ 0.000000] Console: colour VGA+ 80x25 +Aug 31 22:50:24 minifree kernel: [ 0.000000] console [tty0] enabled +Aug 31 22:50:24 minifree kernel: [ 0.000000] allocated 8388608 bytes of page_cgroup +Aug 31 22:50:24 minifree kernel: [ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups +Aug 31 22:50:24 minifree kernel: [ 0.000000] hpet clockevent registered +Aug 31 22:50:24 minifree kernel: [ 0.000000] tsc: Fast TSC calibration using PIT +Aug 31 22:50:24 minifree kernel: [ 0.000000] tsc: Detected 1496.227 MHz processor +Aug 31 22:50:24 minifree kernel: [ 0.004006] Calibrating delay loop (skipped), value calculated using timer frequency.. 2992.45 BogoMIPS (lpj=5984908) +Aug 31 22:50:24 minifree kernel: [ 0.004013] pid_max: default: 32768 minimum: 301 +Aug 31 22:50:24 minifree kernel: [ 0.004059] Security Framework initialized +Aug 31 22:50:24 minifree kernel: [ 0.004095] AppArmor: AppArmor initialized +Aug 31 22:50:24 minifree kernel: [ 0.004097] Yama: becoming mindful. +Aug 31 22:50:24 minifree kernel: [ 0.004475] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.008553] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.009333] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.009340] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.009749] Initializing cgroup subsys memory +Aug 31 22:50:24 minifree kernel: [ 0.009764] Initializing cgroup subsys devices +Aug 31 22:50:24 minifree kernel: [ 0.009767] Initializing cgroup subsys freezer +Aug 31 22:50:24 minifree kernel: [ 0.009771] Initializing cgroup subsys blkio +Aug 31 22:50:24 minifree kernel: [ 0.009775] Initializing cgroup subsys bfqio +Aug 31 22:50:24 minifree kernel: [ 0.009778] Initializing cgroup subsys perf_event +Aug 31 22:50:24 minifree kernel: [ 0.009783] Initializing cgroup subsys hugetlb +Aug 31 22:50:24 minifree kernel: [ 0.009821] CPU: Physical Processor ID: 0 +Aug 31 22:50:24 minifree kernel: [ 0.009823] CPU: Processor Core ID: 0 +Aug 31 22:50:24 minifree kernel: [ 0.009827] mce: CPU supports 6 MCE banks +Aug 31 22:50:24 minifree kernel: [ 0.009839] CPU0: Thermal monitoring enabled (TM2) +Aug 31 22:50:24 minifree kernel: [ 0.009850] Last level iTLB entries: 4KB 128, 2MB 4, 4MB 4 +Aug 31 22:50:24 minifree kernel: [ 0.009850] Last level dTLB entries: 4KB 256, 2MB 0, 4MB 32 +Aug 31 22:50:24 minifree kernel: [ 0.009850] tlb_flushall_shift: -1 +Aug 31 22:50:24 minifree kernel: [ 0.010001] Freeing SMP alternatives memory: 32K (ffffffff81e6e000 - ffffffff81e76000) +Aug 31 22:50:24 minifree kernel: [ 0.012383] ACPI: Core revision 20131115 +Aug 31 22:50:24 minifree kernel: [ 0.015473] ACPI: All ACPI Tables successfully acquired +Aug 31 22:50:24 minifree kernel: [ 0.016025] ftrace: allocating 28599 entries in 112 pages +Aug 31 22:50:24 minifree kernel: [ 0.028599] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 +Aug 31 22:50:24 minifree kernel: [ 0.070880] smpboot: CPU0: Intel(R) Core(TM)2 CPU L7400 @ 1.50GHz (fam: 06, model: 0f, stepping: 06) +Aug 31 22:50:24 minifree kernel: [ 0.072000] Performance Events: PEBS fmt0-, 4-deep LBR, Core2 events, Intel PMU driver. +Aug 31 22:50:24 minifree kernel: [ 0.072000] perf_event_intel: PEBS disabled due to CPU errata +Aug 31 22:50:24 minifree kernel: [ 0.072000] ... version: 2 +Aug 31 22:50:24 minifree kernel: [ 0.072000] ... bit width: 40 +Aug 31 22:50:24 minifree kernel: [ 0.072000] ... generic registers: 2 +Aug 31 22:50:24 minifree kernel: [ 0.072000] ... value mask: 000000ffffffffff +Aug 31 22:50:24 minifree kernel: [ 0.072000] ... max period: 000000007fffffff +Aug 31 22:50:24 minifree kernel: [ 0.072000] ... fixed-purpose events: 3 +Aug 31 22:50:24 minifree kernel: [ 0.072000] ... event mask: 0000000700000003 +Aug 31 22:50:24 minifree kernel: [ 0.072000] x86: Booting SMP configuration: +Aug 31 22:50:24 minifree kernel: [ 0.072000] .... node #0, CPUs: #1 +Aug 31 22:50:24 minifree kernel: [ 0.084066] x86: Booted up 1 node, 2 CPUs +Aug 31 22:50:24 minifree kernel: [ 0.084074] smpboot: Total of 2 processors activated (5984.90 BogoMIPS) +Aug 31 22:50:24 minifree kernel: [ 0.084177] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter. +Aug 31 22:50:24 minifree kernel: [ 0.088071] devtmpfs: initialized +Aug 31 22:50:24 minifree kernel: [ 0.098352] EVM: security.selinux +Aug 31 22:50:24 minifree kernel: [ 0.098355] EVM: security.SMACK64 +Aug 31 22:50:24 minifree kernel: [ 0.098357] EVM: security.ima +Aug 31 22:50:24 minifree kernel: [ 0.098359] EVM: security.capability +Aug 31 22:50:24 minifree kernel: [ 0.100096] pinctrl core: initialized pinctrl subsystem +Aug 31 22:50:24 minifree kernel: [ 0.100211] regulator-dummy: no parameters +Aug 31 22:50:24 minifree kernel: [ 0.100257] RTC time: 21:49:54, date: 08/31/14 +Aug 31 22:50:24 minifree kernel: [ 0.100319] NET: Registered protocol family 16 +Aug 31 22:50:24 minifree kernel: [ 0.100522] cpuidle: using governor ladder +Aug 31 22:50:24 minifree kernel: [ 0.100525] cpuidle: using governor menu +Aug 31 22:50:24 minifree kernel: [ 0.100592] ACPI: bus type PCI registered +Aug 31 22:50:24 minifree kernel: [ 0.100595] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 +Aug 31 22:50:24 minifree kernel: [ 0.100691] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf0000000-0xf3ffffff] (base 0xf0000000) +Aug 31 22:50:24 minifree kernel: [ 0.100695] PCI: MMCONFIG at [mem 0xf0000000-0xf3ffffff] reserved in E820 +Aug 31 22:50:24 minifree kernel: [ 0.105678] PCI: Using configuration type 1 for base access +Aug 31 22:50:24 minifree kernel: [ 0.108094] bio: create slab <bio-0> at 0 +Aug 31 22:50:24 minifree kernel: [ 0.108141] ACPI: Added _OSI(Module Device) +Aug 31 22:50:24 minifree kernel: [ 0.108144] ACPI: Added _OSI(Processor Device) +Aug 31 22:50:24 minifree kernel: [ 0.108147] ACPI: Added _OSI(3.0 _SCP Extensions) +Aug 31 22:50:24 minifree kernel: [ 0.108149] ACPI: Added _OSI(Processor Aggregator Device) +Aug 31 22:50:24 minifree kernel: [ 0.111400] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored +Aug 31 22:50:24 minifree kernel: [ 0.111850] ACPI: Interpreter enabled +Aug 31 22:50:24 minifree kernel: [ 0.111859] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20131115/hwxface-580) +Aug 31 22:50:24 minifree kernel: [ 0.111867] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20131115/hwxface-580) +Aug 31 22:50:24 minifree kernel: [ 0.111889] ACPI: (supports S0 S3 S4 S5) +Aug 31 22:50:24 minifree kernel: [ 0.111892] ACPI: Using IOAPIC for interrupt routing +Aug 31 22:50:24 minifree kernel: [ 0.111927] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug +Aug 31 22:50:24 minifree kernel: [ 0.112256] ACPI: ACPI Dock Station Driver: 1 docks/bays found +Aug 31 22:50:24 minifree kernel: [ 0.121379] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff]) +Aug 31 22:50:24 minifree kernel: [ 0.121389] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] +Aug 31 22:50:24 minifree kernel: [ 0.121498] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability] +Aug 31 22:50:24 minifree kernel: [ 0.121642] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge +Aug 31 22:50:24 minifree kernel: [ 0.121922] PCI host bridge to bus 0000:00 +Aug 31 22:50:24 minifree kernel: [ 0.121927] pci_bus 0000:00: root bus resource [bus 00-ff] +Aug 31 22:50:24 minifree kernel: [ 0.121931] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7] +Aug 31 22:50:24 minifree kernel: [ 0.121935] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff] +Aug 31 22:50:24 minifree kernel: [ 0.121938] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff] +Aug 31 22:50:24 minifree kernel: [ 0.121942] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff] +Aug 31 22:50:24 minifree kernel: [ 0.121945] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff] +Aug 31 22:50:24 minifree kernel: [ 0.121948] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff] +Aug 31 22:50:24 minifree kernel: [ 0.121951] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff] +Aug 31 22:50:24 minifree kernel: [ 0.121955] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff] +Aug 31 22:50:24 minifree kernel: [ 0.121958] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff] +Aug 31 22:50:24 minifree kernel: [ 0.121961] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff] +Aug 31 22:50:24 minifree kernel: [ 0.121965] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff] +Aug 31 22:50:24 minifree kernel: [ 0.121968] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff] +Aug 31 22:50:24 minifree kernel: [ 0.121971] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff] +Aug 31 22:50:24 minifree kernel: [ 0.121975] pci_bus 0000:00: root bus resource [mem 0x000e8000-0x000ebfff] +Aug 31 22:50:24 minifree kernel: [ 0.121978] pci_bus 0000:00: root bus resource [mem 0x000ec000-0x000effff] +Aug 31 22:50:24 minifree kernel: [ 0.121981] pci_bus 0000:00: root bus resource [mem 0x000f0000-0x000fffff] +Aug 31 22:50:24 minifree kernel: [ 0.121985] pci_bus 0000:00: root bus resource [mem 0x80000000-0xfebfffff] +Aug 31 22:50:24 minifree kernel: [ 0.121988] pci_bus 0000:00: root bus resource [mem 0xfed40000-0xfed44fff] +Aug 31 22:50:24 minifree kernel: [ 0.122002] pci 0000:00:00.0: [8086:27a0] type 00 class 0x060000 +Aug 31 22:50:24 minifree kernel: [ 0.122153] pci 0000:00:02.0: [8086:27a2] type 00 class 0x030000 +Aug 31 22:50:24 minifree kernel: [ 0.122170] pci 0000:00:02.0: reg 0x10: [mem 0xe4200000-0xe427ffff] +Aug 31 22:50:24 minifree kernel: [ 0.122179] pci 0000:00:02.0: reg 0x14: [io 0x50a0-0x50a7] +Aug 31 22:50:24 minifree kernel: [ 0.122188] pci 0000:00:02.0: reg 0x18: [mem 0xd0000000-0xdfffffff pref] +Aug 31 22:50:24 minifree kernel: [ 0.122198] pci 0000:00:02.0: reg 0x1c: [mem 0xe4300000-0xe433ffff] +Aug 31 22:50:24 minifree kernel: [ 0.122338] pci 0000:00:02.1: [8086:27a6] type 00 class 0x038000 +Aug 31 22:50:24 minifree kernel: [ 0.122352] pci 0000:00:02.1: reg 0x10: [mem 0xe4280000-0xe42fffff] +Aug 31 22:50:24 minifree kernel: [ 0.122564] pci 0000:00:1b.0: [8086:27d8] type 00 class 0x040300 +Aug 31 22:50:24 minifree kernel: [ 0.122591] pci 0000:00:1b.0: reg 0x10: [mem 0xe4340000-0xe4343fff 64bit] +Aug 31 22:50:24 minifree kernel: [ 0.122706] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.122785] pci 0000:00:1b.0: System wakeup disabled by ACPI +Aug 31 22:50:24 minifree kernel: [ 0.122842] pci 0000:00:1c.0: [8086:27d0] type 01 class 0x060400 +Aug 31 22:50:24 minifree kernel: [ 0.122964] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.123100] pci 0000:00:1c.1: [8086:27d2] type 01 class 0x060400 +Aug 31 22:50:24 minifree kernel: [ 0.123210] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.123337] pci 0000:00:1c.2: [8086:27d4] type 01 class 0x060400 +Aug 31 22:50:24 minifree kernel: [ 0.123447] pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.123579] pci 0000:00:1c.3: [8086:27d6] type 01 class 0x060400 +Aug 31 22:50:24 minifree kernel: [ 0.123689] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.123817] pci 0000:00:1d.0: [8086:27c8] type 00 class 0x0c0300 +Aug 31 22:50:24 minifree kernel: [ 0.123881] pci 0000:00:1d.0: reg 0x20: [io 0x5000-0x501f] +Aug 31 22:50:24 minifree kernel: [ 0.124006] pci 0000:00:1d.0: System wakeup disabled by ACPI +Aug 31 22:50:24 minifree kernel: [ 0.124057] pci 0000:00:1d.1: [8086:27c9] type 00 class 0x0c0300 +Aug 31 22:50:24 minifree kernel: [ 0.124120] pci 0000:00:1d.1: reg 0x20: [io 0x5020-0x503f] +Aug 31 22:50:24 minifree kernel: [ 0.124236] pci 0000:00:1d.1: System wakeup disabled by ACPI +Aug 31 22:50:24 minifree kernel: [ 0.124286] pci 0000:00:1d.2: [8086:27ca] type 00 class 0x0c0300 +Aug 31 22:50:24 minifree kernel: [ 0.124349] pci 0000:00:1d.2: reg 0x20: [io 0x5040-0x505f] +Aug 31 22:50:24 minifree kernel: [ 0.124464] pci 0000:00:1d.2: System wakeup disabled by ACPI +Aug 31 22:50:24 minifree kernel: [ 0.124515] pci 0000:00:1d.3: [8086:27cb] type 00 class 0x0c0300 +Aug 31 22:50:24 minifree kernel: [ 0.124578] pci 0000:00:1d.3: reg 0x20: [io 0x5060-0x507f] +Aug 31 22:50:24 minifree kernel: [ 0.124695] pci 0000:00:1d.3: System wakeup disabled by ACPI +Aug 31 22:50:24 minifree kernel: [ 0.124759] pci 0000:00:1d.7: [8086:27cc] type 00 class 0x0c0320 +Aug 31 22:50:24 minifree kernel: [ 0.124787] pci 0000:00:1d.7: reg 0x10: [mem 0xe4344000-0xe43443ff] +Aug 31 22:50:24 minifree kernel: [ 0.124905] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.124978] pci 0000:00:1d.7: System wakeup disabled by ACPI +Aug 31 22:50:24 minifree kernel: [ 0.125032] pci 0000:00:1e.0: [8086:2448] type 01 class 0x060401 +Aug 31 22:50:24 minifree kernel: [ 0.125214] pci 0000:00:1f.0: [8086:27b9] type 00 class 0x060100 +Aug 31 22:50:24 minifree kernel: [ 0.125339] pci 0000:00:1f.0: address space collision: [io 0x0500-0x057f] conflicts with ACPI CPU throttle [??? 0x00000510-0x00000515 flags 0x80000000] +Aug 31 22:50:24 minifree kernel: [ 0.125347] pci 0000:00:1f.0: quirk: [io 0x0480-0x04bf] claimed by ICH6 GPIO +Aug 31 22:50:24 minifree kernel: [ 0.125353] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 1600 (mask 007f) +Aug 31 22:50:24 minifree kernel: [ 0.125359] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 2 PIO at 15e0 (mask 000f) +Aug 31 22:50:24 minifree kernel: [ 0.125364] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 3 PIO at 1680 (mask 001f) +Aug 31 22:50:24 minifree kernel: [ 0.125515] pci 0000:00:1f.1: [8086:27df] type 00 class 0x01018a +Aug 31 22:50:24 minifree kernel: [ 0.125535] pci 0000:00:1f.1: reg 0x10: [io 0x50a8-0x50af] +Aug 31 22:50:24 minifree kernel: [ 0.125550] pci 0000:00:1f.1: reg 0x14: [io 0x50c8-0x50cb] +Aug 31 22:50:24 minifree kernel: [ 0.125564] pci 0000:00:1f.1: reg 0x18: [io 0x50b0-0x50b7] +Aug 31 22:50:24 minifree kernel: [ 0.125578] pci 0000:00:1f.1: reg 0x1c: [io 0x50cc-0x50cf] +Aug 31 22:50:24 minifree kernel: [ 0.125592] pci 0000:00:1f.1: reg 0x20: [io 0x5080-0x508f] +Aug 31 22:50:24 minifree kernel: [ 0.125736] pci 0000:00:1f.2: [8086:27c5] type 00 class 0x010601 +Aug 31 22:50:24 minifree kernel: [ 0.125764] pci 0000:00:1f.2: reg 0x10: [io 0x50b8-0x50bf] +Aug 31 22:50:24 minifree kernel: [ 0.125777] pci 0000:00:1f.2: reg 0x14: [io 0x50d0-0x50d3] +Aug 31 22:50:24 minifree kernel: [ 0.125792] pci 0000:00:1f.2: reg 0x18: [io 0x50c0-0x50c7] +Aug 31 22:50:24 minifree kernel: [ 0.125806] pci 0000:00:1f.2: reg 0x1c: [io 0x50d4-0x50d7] +Aug 31 22:50:24 minifree kernel: [ 0.125820] pci 0000:00:1f.2: reg 0x20: [io 0x5090-0x509f] +Aug 31 22:50:24 minifree kernel: [ 0.125835] pci 0000:00:1f.2: reg 0x24: [mem 0xe4344400-0xe43447ff] +Aug 31 22:50:24 minifree kernel: [ 0.125899] pci 0000:00:1f.2: PME# supported from D3hot +Aug 31 22:50:24 minifree kernel: [ 0.126016] pci 0000:00:1f.3: [8086:27da] type 00 class 0x0c0500 +Aug 31 22:50:24 minifree kernel: [ 0.126096] pci 0000:00:1f.3: reg 0x20: [io 0x0400-0x041f] +Aug 31 22:50:24 minifree kernel: [ 0.126355] pci 0000:01:00.0: [8086:109a] type 00 class 0x020000 +Aug 31 22:50:24 minifree kernel: [ 0.126389] pci 0000:01:00.0: reg 0x10: [mem 0xe4100000-0xe411ffff] +Aug 31 22:50:24 minifree kernel: [ 0.126434] pci 0000:01:00.0: reg 0x18: [io 0x4000-0x401f] +Aug 31 22:50:24 minifree kernel: [ 0.126628] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.126710] pci 0000:01:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force' +Aug 31 22:50:24 minifree kernel: [ 0.126731] pci 0000:00:1c.0: PCI bridge to [bus 01] +Aug 31 22:50:24 minifree kernel: [ 0.126737] pci 0000:00:1c.0: bridge window [io 0x4000-0x4fff] +Aug 31 22:50:24 minifree kernel: [ 0.126744] pci 0000:00:1c.0: bridge window [mem 0xe4100000-0xe41fffff] +Aug 31 22:50:24 minifree kernel: [ 0.126838] pci 0000:00:1c.1: PCI bridge to [bus 02] +Aug 31 22:50:24 minifree kernel: [ 0.126938] pci 0000:00:1c.2: PCI bridge to [bus 03] +Aug 31 22:50:24 minifree kernel: [ 0.127032] pci 0000:00:1c.3: PCI bridge to [bus 04] +Aug 31 22:50:24 minifree kernel: [ 0.127187] pci 0000:05:00.0: [1180:0476] type 02 class 0x060700 +Aug 31 22:50:24 minifree kernel: [ 0.127210] pci 0000:05:00.0: proprietary Ricoh MMC controller disabled (via cardbus function) +Aug 31 22:50:24 minifree kernel: [ 0.127213] pci 0000:05:00.0: MMC cards are now supported by standard SDHCI controller +Aug 31 22:50:24 minifree kernel: [ 0.127233] pci 0000:05:00.0: reg 0x10: [mem 0xe2000000-0xe2000fff] +Aug 31 22:50:24 minifree kernel: [ 0.127274] pci 0000:05:00.0: supports D1 D2 +Aug 31 22:50:24 minifree kernel: [ 0.127278] pci 0000:05:00.0: PME# supported from D0 D1 D2 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.127318] pci 0000:05:00.0: System wakeup disabled by ACPI +Aug 31 22:50:24 minifree kernel: [ 0.127377] pci 0000:05:00.1: [1180:0552] type 00 class 0x0c0010 +Aug 31 22:50:24 minifree kernel: [ 0.127403] pci 0000:05:00.1: reg 0x10: [mem 0xe2001000-0xe20017ff] +Aug 31 22:50:24 minifree kernel: [ 0.127512] pci 0000:05:00.1: supports D1 D2 +Aug 31 22:50:24 minifree kernel: [ 0.127516] pci 0000:05:00.1: PME# supported from D0 D1 D2 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.127599] pci 0000:05:00.2: [1180:0822] type 00 class 0x080500 +Aug 31 22:50:24 minifree kernel: [ 0.127626] pci 0000:05:00.2: reg 0x10: [mem 0xe2001800-0xe20018ff] +Aug 31 22:50:24 minifree kernel: [ 0.127736] pci 0000:05:00.2: supports D1 D2 +Aug 31 22:50:24 minifree kernel: [ 0.127740] pci 0000:05:00.2: PME# supported from D0 D1 D2 D3hot D3cold +Aug 31 22:50:24 minifree kernel: [ 0.127880] pci 0000:00:1e.0: PCI bridge to [bus 05-06] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127887] pci 0000:00:1e.0: bridge window [io 0x2000-0x3fff] +Aug 31 22:50:24 minifree kernel: [ 0.127894] pci 0000:00:1e.0: bridge window [mem 0xe0000000-0xe20fffff] +Aug 31 22:50:24 minifree kernel: [ 0.127904] pci 0000:00:1e.0: bridge window [mem 0xe2100000-0xe40fffff 64bit pref] +Aug 31 22:50:24 minifree kernel: [ 0.127908] pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127911] pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127915] pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127918] pci 0000:00:1e.0: bridge window [mem 0x000c0000-0x000c3fff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127922] pci 0000:00:1e.0: bridge window [mem 0x000c4000-0x000c7fff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127925] pci 0000:00:1e.0: bridge window [mem 0x000c8000-0x000cbfff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127928] pci 0000:00:1e.0: bridge window [mem 0x000cc000-0x000cffff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127932] pci 0000:00:1e.0: bridge window [mem 0x000d0000-0x000d3fff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127935] pci 0000:00:1e.0: bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127938] pci 0000:00:1e.0: bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127942] pci 0000:00:1e.0: bridge window [mem 0x000dc000-0x000dffff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127945] pci 0000:00:1e.0: bridge window [mem 0x000e0000-0x000e3fff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127949] pci 0000:00:1e.0: bridge window [mem 0x000e4000-0x000e7fff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127952] pci 0000:00:1e.0: bridge window [mem 0x000e8000-0x000ebfff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127955] pci 0000:00:1e.0: bridge window [mem 0x000ec000-0x000effff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127959] pci 0000:00:1e.0: bridge window [mem 0x000f0000-0x000fffff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127962] pci 0000:00:1e.0: bridge window [mem 0x80000000-0xfebfffff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.127966] pci 0000:00:1e.0: bridge window [mem 0xfed40000-0xfed44fff] (subtractive decode) +Aug 31 22:50:24 minifree kernel: [ 0.128041] pci_bus 0000:06: busn_res: can not insert [bus 06-ff] under [bus 05-06] (conflicts with (null) [bus 05-06]) +Aug 31 22:50:24 minifree kernel: [ 0.128049] pci_bus 0000:06: busn_res: [bus 06-ff] end is updated to 09 +Aug 31 22:50:24 minifree kernel: [ 0.128053] pci_bus 0000:06: busn_res: can not insert [bus 06-09] under [bus 05-06] (conflicts with (null) [bus 05-06]) +Aug 31 22:50:24 minifree kernel: [ 0.128060] pci_bus 0000:06: [bus 06-09] partially hidden behind transparent bridge 0000:05 [bus 05-06] +Aug 31 22:50:24 minifree kernel: [ 0.128336] ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 5 6 7 10 12 14 15) *11 +Aug 31 22:50:24 minifree kernel: [ 0.128426] ACPI: PCI Interrupt Link [LNKB] (IRQs 1 3 4 5 6 7 *11 12 14 15) +Aug 31 22:50:24 minifree kernel: [ 0.128512] ACPI: PCI Interrupt Link [LNKC] (IRQs 1 3 4 5 6 7 10 12 14 15) *11 +Aug 31 22:50:24 minifree kernel: [ 0.128597] ACPI: PCI Interrupt Link [LNKD] (IRQs 1 3 4 5 6 7 *11 12 14 15) +Aug 31 22:50:24 minifree kernel: [ 0.128682] ACPI: PCI Interrupt Link [LNKE] (IRQs 1 3 4 5 6 7 10 12 14 15) *11 +Aug 31 22:50:24 minifree kernel: [ 0.128766] ACPI: PCI Interrupt Link [LNKF] (IRQs 1 3 4 5 6 7 *11 12 14 15) +Aug 31 22:50:24 minifree kernel: [ 0.128850] ACPI: PCI Interrupt Link [LNKG] (IRQs 1 3 4 5 6 7 10 12 14 15) *11 +Aug 31 22:50:24 minifree kernel: [ 0.128935] ACPI: PCI Interrupt Link [LNKH] (IRQs 1 3 4 5 6 7 *11 12 14 15) +Aug 31 22:50:24 minifree kernel: [ 0.129051] ACPI: \_SB_.PCI0: notify handler is installed +Aug 31 22:50:24 minifree kernel: [ 0.129051] Found 1 acpi root devices +Aug 31 22:50:24 minifree kernel: [ 0.129051] ACPI : EC: GPE = 0x1c, I/O: command/status = 0x66, data = 0x62 +Aug 31 22:50:24 minifree kernel: [ 0.129051] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none +Aug 31 22:50:24 minifree kernel: [ 0.129051] vgaarb: loaded +Aug 31 22:50:24 minifree kernel: [ 0.129051] vgaarb: bridge control possible 0000:00:02.0 +Aug 31 22:50:24 minifree kernel: [ 0.129051] SCSI subsystem initialized +Aug 31 22:50:24 minifree kernel: [ 0.129051] libata version 3.00 loaded. +Aug 31 22:50:24 minifree kernel: [ 0.129051] ACPI: bus type USB registered +Aug 31 22:50:24 minifree kernel: [ 0.129051] usbcore: registered new interface driver usbfs +Aug 31 22:50:24 minifree kernel: [ 0.129051] usbcore: registered new interface driver hub +Aug 31 22:50:24 minifree kernel: [ 0.129051] usbcore: registered new device driver usb +Aug 31 22:50:24 minifree kernel: [ 0.129051] PCI: Using ACPI for IRQ routing +Aug 31 22:50:24 minifree kernel: [ 0.133275] PCI: pci_cache_line_size set to 64 bytes +Aug 31 22:50:24 minifree kernel: [ 0.133369] e820: reserve RAM buffer [mem 0x7f6d5000-0x7fffffff] +Aug 31 22:50:24 minifree kernel: [ 0.133506] NetLabel: Initializing +Aug 31 22:50:24 minifree kernel: [ 0.133509] NetLabel: domain hash size = 128 +Aug 31 22:50:24 minifree kernel: [ 0.133510] NetLabel: protocols = UNLABELED CIPSOv4 +Aug 31 22:50:24 minifree kernel: [ 0.133537] NetLabel: unlabeled traffic allowed by default +Aug 31 22:50:24 minifree kernel: [ 0.133557] HPET: 3 timers in total, 0 timers will be used for per-cpu timer +Aug 31 22:50:24 minifree kernel: [ 0.133557] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0 +Aug 31 22:50:24 minifree kernel: [ 0.133557] hpet0: 3 comparators, 64-bit 14.318180 MHz counter +Aug 31 22:50:24 minifree kernel: [ 0.134098] Switched to clocksource hpet +Aug 31 22:50:24 minifree kernel: [ 0.142214] AppArmor: AppArmor Filesystem Enabled +Aug 31 22:50:24 minifree kernel: [ 0.142264] pnp: PnP ACPI init +Aug 31 22:50:24 minifree kernel: [ 0.142291] ACPI: bus type PNP registered +Aug 31 22:50:24 minifree kernel: [ 0.142445] system 00:00: [mem 0xfed1c000-0xfed1ffff] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.142450] system 00:00: [mem 0xfed14000-0xfed17fff] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.142454] system 00:00: [mem 0xfed18000-0xfed18fff] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.142458] system 00:00: [mem 0xfed19000-0xfed19fff] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.142462] system 00:00: [mem 0xf0000000-0xf3ffffff] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.142466] system 00:00: [mem 0xfed20000-0xfed3ffff] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.142470] system 00:00: [mem 0xfed40000-0xfed44fff] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.142474] system 00:00: [mem 0xfed45000-0xfed8ffff] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.142481] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active) +Aug 31 22:50:24 minifree kernel: [ 0.143002] pnp 00:01: [dma 4] +Aug 31 22:50:24 minifree kernel: [ 0.143047] pnp 00:01: Plug and Play ACPI device, IDs PNP0200 (active) +Aug 31 22:50:24 minifree kernel: [ 0.143092] pnp 00:02: Plug and Play ACPI device, IDs INT0800 (active) +Aug 31 22:50:24 minifree kernel: [ 0.143244] system 00:03: [mem 0xfed00000-0xfed003ff] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.143250] system 00:03: Plug and Play ACPI device, IDs PNP0103 PNP0c01 (active) +Aug 31 22:50:24 minifree kernel: [ 0.143320] pnp 00:04: Plug and Play ACPI device, IDs PNP0c04 (active) +Aug 31 22:50:24 minifree kernel: [ 0.143397] system 00:05: [io 0x0800-0x080f] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.143402] system 00:05: [io 0x0500-0x057f] could not be reserved +Aug 31 22:50:24 minifree kernel: [ 0.143406] system 00:05: [io 0x0480-0x04bf] has been reserved +Aug 31 22:50:24 minifree kernel: [ 0.143411] system 00:05: Plug and Play ACPI device, IDs PNP0c02 (active) +Aug 31 22:50:24 minifree kernel: [ 0.143463] pnp 00:06: Plug and Play ACPI device, IDs PNP0b00 (active) +Aug 31 22:50:24 minifree kernel: [ 0.143529] pnp 00:07: Plug and Play ACPI device, IDs PNP0303 PNP030b (active) +Aug 31 22:50:24 minifree kernel: [ 0.143593] pnp 00:08: Plug and Play ACPI device, IDs PNP0f13 (active) +Aug 31 22:50:24 minifree kernel: [ 0.143654] pnp 00:09: Plug and Play ACPI device, IDs PNP0501 (active) +Aug 31 22:50:24 minifree kernel: [ 0.143699] pnp: PnP ACPI: found 10 devices +Aug 31 22:50:24 minifree kernel: [ 0.143702] ACPI: bus type PNP unregistered +Aug 31 22:50:24 minifree kernel: [ 0.151684] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 01] add_size 200000 +Aug 31 22:50:24 minifree kernel: [ 0.151738] pci 0000:00:1f.0: BAR 13: [io 0x0500-0x057f] has bogus alignment +Aug 31 22:50:24 minifree kernel: [ 0.151744] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 +Aug 31 22:50:24 minifree kernel: [ 0.151755] pci 0000:00:1c.0: BAR 15: assigned [mem 0x80000000-0x801fffff 64bit pref] +Aug 31 22:50:24 minifree kernel: [ 0.151759] pci 0000:00:1c.0: PCI bridge to [bus 01] +Aug 31 22:50:24 minifree kernel: [ 0.151765] pci 0000:00:1c.0: bridge window [io 0x4000-0x4fff] +Aug 31 22:50:24 minifree kernel: [ 0.151773] pci 0000:00:1c.0: bridge window [mem 0xe4100000-0xe41fffff] +Aug 31 22:50:24 minifree kernel: [ 0.151780] pci 0000:00:1c.0: bridge window [mem 0x80000000-0x801fffff 64bit pref] +Aug 31 22:50:24 minifree kernel: [ 0.151790] pci 0000:00:1c.1: PCI bridge to [bus 02] +Aug 31 22:50:24 minifree kernel: [ 0.151807] pci 0000:00:1c.2: PCI bridge to [bus 03] +Aug 31 22:50:24 minifree kernel: [ 0.151824] pci 0000:00:1c.3: PCI bridge to [bus 04] +Aug 31 22:50:24 minifree kernel: [ 0.151848] pci 0000:05:00.0: res[15]=[mem 0x04000000-0x03ffffff pref] get_res_add_size add_size 4000000 +Aug 31 22:50:24 minifree kernel: [ 0.151852] pci 0000:05:00.0: res[16]=[mem 0x04000000-0x03ffffff] get_res_add_size add_size 4000000 +Aug 31 22:50:24 minifree kernel: [ 0.151856] pci 0000:05:00.0: res[13]=[io 0x0100-0x00ff] get_res_add_size add_size 100 +Aug 31 22:50:24 minifree kernel: [ 0.151860] pci 0000:05:00.0: res[14]=[io 0x0100-0x00ff] get_res_add_size add_size 100 +Aug 31 22:50:24 minifree kernel: [ 0.151868] pci 0000:05:00.0: BAR 15: assigned [mem 0x84000000-0x87ffffff pref] +Aug 31 22:50:24 minifree kernel: [ 0.151875] pci 0000:05:00.0: BAR 16: assigned [mem 0x88000000-0x8bffffff] +Aug 31 22:50:24 minifree kernel: [ 0.151879] pci 0000:05:00.0: BAR 13: assigned [io 0x2000-0x20ff] +Aug 31 22:50:24 minifree kernel: [ 0.151883] pci 0000:05:00.0: BAR 14: assigned [io 0x2400-0x24ff] +Aug 31 22:50:24 minifree kernel: [ 0.151888] pci 0000:05:00.0: CardBus bridge to [bus 06-09] +Aug 31 22:50:24 minifree kernel: [ 0.151891] pci 0000:05:00.0: bridge window [io 0x2000-0x20ff] +Aug 31 22:50:24 minifree kernel: [ 0.151897] pci 0000:05:00.0: bridge window [io 0x2400-0x24ff] +Aug 31 22:50:24 minifree kernel: [ 0.151904] pci 0000:05:00.0: bridge window [mem 0x84000000-0x87ffffff pref] +Aug 31 22:50:24 minifree kernel: [ 0.151910] pci 0000:05:00.0: bridge window [mem 0x88000000-0x8bffffff] +Aug 31 22:50:24 minifree kernel: [ 0.151917] pci 0000:00:1e.0: PCI bridge to [bus 05-06] +Aug 31 22:50:24 minifree kernel: [ 0.151922] pci 0000:00:1e.0: bridge window [io 0x2000-0x3fff] +Aug 31 22:50:24 minifree kernel: [ 0.151930] pci 0000:00:1e.0: bridge window [mem 0xe0000000-0xe20fffff] +Aug 31 22:50:24 minifree kernel: [ 0.151937] pci 0000:00:1e.0: bridge window [mem 0xe2100000-0xe40fffff 64bit pref] +Aug 31 22:50:24 minifree kernel: [ 0.151947] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7] +Aug 31 22:50:24 minifree kernel: [ 0.151951] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff] +Aug 31 22:50:24 minifree kernel: [ 0.151955] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff] +Aug 31 22:50:24 minifree kernel: [ 0.151958] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff] +Aug 31 22:50:24 minifree kernel: [ 0.151962] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff] +Aug 31 22:50:24 minifree kernel: [ 0.151965] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff] +Aug 31 22:50:24 minifree kernel: [ 0.151968] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff] +Aug 31 22:50:24 minifree kernel: [ 0.151972] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff] +Aug 31 22:50:24 minifree kernel: [ 0.151975] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff] +Aug 31 22:50:24 minifree kernel: [ 0.151978] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff] +Aug 31 22:50:24 minifree kernel: [ 0.151981] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff] +Aug 31 22:50:24 minifree kernel: [ 0.151985] pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff] +Aug 31 22:50:24 minifree kernel: [ 0.151988] pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff] +Aug 31 22:50:24 minifree kernel: [ 0.151991] pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff] +Aug 31 22:50:24 minifree kernel: [ 0.151994] pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff] +Aug 31 22:50:24 minifree kernel: [ 0.151998] pci_bus 0000:00: resource 19 [mem 0x000f0000-0x000fffff] +Aug 31 22:50:24 minifree kernel: [ 0.152014] pci_bus 0000:00: resource 20 [mem 0x80000000-0xfebfffff] +Aug 31 22:50:24 minifree kernel: [ 0.152018] pci_bus 0000:00: resource 21 [mem 0xfed40000-0xfed44fff] +Aug 31 22:50:24 minifree kernel: [ 0.152022] pci_bus 0000:01: resource 0 [io 0x4000-0x4fff] +Aug 31 22:50:24 minifree kernel: [ 0.152025] pci_bus 0000:01: resource 1 [mem 0xe4100000-0xe41fffff] +Aug 31 22:50:24 minifree kernel: [ 0.152029] pci_bus 0000:01: resource 2 [mem 0x80000000-0x801fffff 64bit pref] +Aug 31 22:50:24 minifree kernel: [ 0.152033] pci_bus 0000:05: resource 0 [io 0x2000-0x3fff] +Aug 31 22:50:24 minifree kernel: [ 0.152036] pci_bus 0000:05: resource 1 [mem 0xe0000000-0xe20fffff] +Aug 31 22:50:24 minifree kernel: [ 0.152040] pci_bus 0000:05: resource 2 [mem 0xe2100000-0xe40fffff 64bit pref] +Aug 31 22:50:24 minifree kernel: [ 0.152043] pci_bus 0000:05: resource 4 [io 0x0000-0x0cf7] +Aug 31 22:50:24 minifree kernel: [ 0.152047] pci_bus 0000:05: resource 5 [io 0x0d00-0xffff] +Aug 31 22:50:24 minifree kernel: [ 0.152050] pci_bus 0000:05: resource 6 [mem 0x000a0000-0x000bffff] +Aug 31 22:50:24 minifree kernel: [ 0.152054] pci_bus 0000:05: resource 7 [mem 0x000c0000-0x000c3fff] +Aug 31 22:50:24 minifree kernel: [ 0.152057] pci_bus 0000:05: resource 8 [mem 0x000c4000-0x000c7fff] +Aug 31 22:50:24 minifree kernel: [ 0.152061] pci_bus 0000:05: resource 9 [mem 0x000c8000-0x000cbfff] +Aug 31 22:50:24 minifree kernel: [ 0.152064] pci_bus 0000:05: resource 10 [mem 0x000cc000-0x000cffff] +Aug 31 22:50:24 minifree kernel: [ 0.152067] pci_bus 0000:05: resource 11 [mem 0x000d0000-0x000d3fff] +Aug 31 22:50:24 minifree kernel: [ 0.152071] pci_bus 0000:05: resource 12 [mem 0x000d4000-0x000d7fff] +Aug 31 22:50:24 minifree kernel: [ 0.152074] pci_bus 0000:05: resource 13 [mem 0x000d8000-0x000dbfff] +Aug 31 22:50:24 minifree kernel: [ 0.152077] pci_bus 0000:05: resource 14 [mem 0x000dc000-0x000dffff] +Aug 31 22:50:24 minifree kernel: [ 0.152080] pci_bus 0000:05: resource 15 [mem 0x000e0000-0x000e3fff] +Aug 31 22:50:24 minifree kernel: [ 0.152084] pci_bus 0000:05: resource 16 [mem 0x000e4000-0x000e7fff] +Aug 31 22:50:24 minifree kernel: [ 0.152087] pci_bus 0000:05: resource 17 [mem 0x000e8000-0x000ebfff] +Aug 31 22:50:24 minifree kernel: [ 0.152090] pci_bus 0000:05: resource 18 [mem 0x000ec000-0x000effff] +Aug 31 22:50:24 minifree kernel: [ 0.152093] pci_bus 0000:05: resource 19 [mem 0x000f0000-0x000fffff] +Aug 31 22:50:24 minifree kernel: [ 0.152097] pci_bus 0000:05: resource 20 [mem 0x80000000-0xfebfffff] +Aug 31 22:50:24 minifree kernel: [ 0.152100] pci_bus 0000:05: resource 21 [mem 0xfed40000-0xfed44fff] +Aug 31 22:50:24 minifree kernel: [ 0.152104] pci_bus 0000:06: resource 0 [io 0x2000-0x20ff] +Aug 31 22:50:24 minifree kernel: [ 0.152107] pci_bus 0000:06: resource 1 [io 0x2400-0x24ff] +Aug 31 22:50:24 minifree kernel: [ 0.152111] pci_bus 0000:06: resource 2 [mem 0x84000000-0x87ffffff pref] +Aug 31 22:50:24 minifree kernel: [ 0.152114] pci_bus 0000:06: resource 3 [mem 0x88000000-0x8bffffff] +Aug 31 22:50:24 minifree kernel: [ 0.152167] NET: Registered protocol family 2 +Aug 31 22:50:24 minifree kernel: [ 0.152410] TCP established hash table entries: 16384 (order: 5, 131072 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.152518] TCP bind hash table entries: 16384 (order: 6, 262144 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.152669] TCP: Hash tables configured (established 16384 bind 16384) +Aug 31 22:50:24 minifree kernel: [ 0.152731] TCP: reno registered +Aug 31 22:50:24 minifree kernel: [ 0.152739] UDP hash table entries: 1024 (order: 3, 32768 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.152763] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.152861] NET: Registered protocol family 1 +Aug 31 22:50:24 minifree kernel: [ 0.152882] pci 0000:00:02.0: Boot video device +Aug 31 22:50:24 minifree kernel: [ 0.154029] PCI: CLS 64 bytes, default 64 +Aug 31 22:50:24 minifree kernel: [ 0.154130] Trying to unpack rootfs image as initramfs... +Aug 31 22:50:24 minifree kernel: [ 0.891588] Freeing initrd memory: 23964K (ffff880035122000 - ffff880036889000) +Aug 31 22:50:24 minifree kernel: [ 0.891983] microcode: CPU0 sig=0x6f6, pf=0x20, revision=0x0 +Aug 31 22:50:24 minifree kernel: [ 0.891991] microcode: CPU1 sig=0x6f6, pf=0x20, revision=0x0 +Aug 31 22:50:24 minifree kernel: [ 0.892123] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba +Aug 31 22:50:24 minifree kernel: [ 0.892126] Scanning for low memory corruption every 60 seconds +Aug 31 22:50:24 minifree kernel: [ 0.892509] Initialise system trusted keyring +Aug 31 22:50:24 minifree kernel: [ 0.892592] audit: initializing netlink socket (disabled) +Aug 31 22:50:24 minifree kernel: [ 0.892616] type=2000 audit(1409521794.892:1): initialized +Aug 31 22:50:24 minifree kernel: [ 0.938675] HugeTLB registered 2 MB page size, pre-allocated 0 pages +Aug 31 22:50:24 minifree kernel: [ 0.940706] zbud: loaded +Aug 31 22:50:24 minifree kernel: [ 0.940918] VFS: Disk quotas dquot_6.5.2 +Aug 31 22:50:24 minifree kernel: [ 0.940988] Dquot-cache hash table entries: 512 (order 0, 4096 bytes) +Aug 31 22:50:24 minifree kernel: [ 0.941797] fuse init (API version 7.22) +Aug 31 22:50:24 minifree kernel: [ 0.941924] msgmni has been set to 3980 +Aug 31 22:50:24 minifree kernel: [ 0.942015] Key type big_key registered +Aug 31 22:50:24 minifree kernel: [ 0.942641] Key type asymmetric registered +Aug 31 22:50:24 minifree kernel: [ 0.942645] Asymmetric key parser 'x509' registered +Aug 31 22:50:24 minifree kernel: [ 0.942697] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) +Aug 31 22:50:24 minifree kernel: [ 0.942747] io scheduler noop registered +Aug 31 22:50:24 minifree kernel: [ 0.942751] io scheduler deadline registered (default) +Aug 31 22:50:24 minifree kernel: [ 0.942789] io scheduler cfq registered +Aug 31 22:50:24 minifree kernel: [ 0.942802] io scheduler bfq registered +Aug 31 22:50:24 minifree kernel: [ 0.942804] BFQ I/O-scheduler version: v7r5 +Aug 31 22:50:24 minifree kernel: [ 0.943133] pcieport 0000:00:1c.0: irq 40 for MSI/MSI-X +Aug 31 22:50:24 minifree kernel: [ 0.943399] pcieport 0000:00:1c.1: irq 41 for MSI/MSI-X +Aug 31 22:50:24 minifree kernel: [ 0.943635] pcieport 0000:00:1c.2: irq 42 for MSI/MSI-X +Aug 31 22:50:24 minifree kernel: [ 0.943873] pcieport 0000:00:1c.3: irq 43 for MSI/MSI-X +Aug 31 22:50:24 minifree kernel: [ 0.944051] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt +Aug 31 22:50:24 minifree kernel: [ 0.944061] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt +Aug 31 22:50:24 minifree kernel: [ 0.944068] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded +Aug 31 22:50:24 minifree kernel: [ 0.944102] pcieport 0000:00:1c.1: Signaling PME through PCIe PME interrupt +Aug 31 22:50:24 minifree kernel: [ 0.944109] pcie_pme 0000:00:1c.1:pcie01: service driver pcie_pme loaded +Aug 31 22:50:24 minifree kernel: [ 0.944142] pcieport 0000:00:1c.2: Signaling PME through PCIe PME interrupt +Aug 31 22:50:24 minifree kernel: [ 0.944149] pcie_pme 0000:00:1c.2:pcie01: service driver pcie_pme loaded +Aug 31 22:50:24 minifree kernel: [ 0.944178] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt +Aug 31 22:50:24 minifree kernel: [ 0.944185] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded +Aug 31 22:50:24 minifree kernel: [ 0.944207] pci_hotplug: PCI Hot Plug PCI Core version: 0.5 +Aug 31 22:50:24 minifree kernel: [ 0.944253] pciehp 0000:00:1c.0:pcie04: HPC vendor_id 8086 device_id 27d0 ss_vid 8086 ss_did 27d0 +Aug 31 22:50:24 minifree kernel: [ 0.944297] pciehp 0000:00:1c.0:pcie04: service driver pciehp loaded +Aug 31 22:50:24 minifree kernel: [ 0.944307] pciehp: PCI Express Hot Plug Controller Driver version: 0.4 +Aug 31 22:50:24 minifree kernel: [ 0.944385] intel_idle: does not run on family 6 model 15 +Aug 31 22:50:24 minifree kernel: [ 0.944397] ipmi message handler version 39.2 +Aug 31 22:50:24 minifree kernel: [ 0.944733] ACPI: AC Adapter [AC] (off-line) +Aug 31 22:50:24 minifree kernel: [ 0.944807] ACPI Exception: AE_NOT_FOUND, Error reading AC Adapter state (20131115/ac-108) +Aug 31 22:50:24 minifree kernel: [ 0.945053] input: Sleep Button as /devices/LNXSYSTM:00/device:00/PNP0A08:00/device:24/PNP0C09:00/PNP0C0E:00/input/input0 +Aug 31 22:50:24 minifree kernel: [ 0.945061] ACPI: Sleep Button [SLPB] +Aug 31 22:50:24 minifree kernel: [ 0.945124] input: Lid Switch as /devices/LNXSYSTM:00/device:00/PNP0A08:00/device:24/PNP0C09:00/PNP0C0D:00/input/input1 +Aug 31 22:50:24 minifree kernel: [ 0.945243] ACPI: Lid Switch [LID] +Aug 31 22:50:24 minifree kernel: [ 0.945307] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 +Aug 31 22:50:24 minifree kernel: [ 0.945312] ACPI: Power Button [PWRF] +Aug 31 22:50:24 minifree kernel: [ 0.946267] Monitor-Mwait will be used to enter C-1 state +Aug 31 22:50:24 minifree kernel: [ 0.946279] tsc: Marking TSC unstable due to TSC halts in idle +Aug 31 22:50:24 minifree kernel: [ 0.946288] ACPI: acpi_idle registered with cpuidle +Aug 31 22:50:24 minifree kernel: [ 0.947899] thermal LNXTHERM:00: registered as thermal_zone0 +Aug 31 22:50:24 minifree kernel: [ 0.947904] ACPI: Thermal Zone [THM0] (39 C) +Aug 31 22:50:24 minifree kernel: [ 0.948530] thermal LNXTHERM:01: registered as thermal_zone1 +Aug 31 22:50:24 minifree kernel: [ 0.948533] ACPI: Thermal Zone [THM1] (27 C) +Aug 31 22:50:24 minifree kernel: [ 0.948573] GHES: HEST is not enabled! +Aug 31 22:50:24 minifree kernel: [ 0.948770] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled +Aug 31 22:50:24 minifree kernel: [ 0.952564] Linux agpgart interface v0.103 +Aug 31 22:50:24 minifree kernel: [ 0.952903] agpgart-intel 0000:00:00.0: Intel 945GM Chipset +Aug 31 22:50:24 minifree kernel: [ 0.952979] agpgart-intel 0000:00:00.0: detected gtt size: 262144K total, 262144K mappable +Aug 31 22:50:24 minifree kernel: [ 0.954238] agpgart-intel 0000:00:00.0: detected 8192K stolen memory +Aug 31 22:50:24 minifree kernel: [ 0.954581] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000 +Aug 31 22:50:24 minifree kernel: [ 0.960749] brd: module loaded +Aug 31 22:50:24 minifree kernel: [ 0.962506] loop: module loaded +Aug 31 22:50:24 minifree kernel: [ 0.962983] ata_piix 0000:00:1f.1: version 2.13 +Aug 31 22:50:24 minifree kernel: [ 0.963770] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +Aug 31 22:50:24 minifree kernel: [ 0.963780] ACPI: Battery Slot [BAT0] (battery present) +Aug 31 22:50:24 minifree kernel: [ 0.963927] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +Aug 31 22:50:24 minifree kernel: [ 0.963935] ACPI: Battery Slot [BAT1] (battery absent) +Aug 31 22:50:24 minifree kernel: [ 0.964039] scsi0 : ata_piix +Aug 31 22:50:24 minifree kernel: [ 0.964177] scsi1 : ata_piix +Aug 31 22:50:24 minifree kernel: [ 0.964231] ata1: PATA max UDMA/100 cmd 0x1f0 ctl 0x3f6 bmdma 0x5080 irq 14 +Aug 31 22:50:24 minifree kernel: [ 0.964235] ata2: PATA max UDMA/100 cmd 0x170 ctl 0x376 bmdma 0x5088 irq 15 +Aug 31 22:50:24 minifree kernel: [ 0.964290] ata1: port disabled--ignoring +Aug 31 22:50:24 minifree kernel: [ 0.964327] ata2: port disabled--ignoring +Aug 31 22:50:24 minifree kernel: [ 0.964709] libphy: Fixed MDIO Bus: probed +Aug 31 22:50:24 minifree kernel: [ 0.964859] tun: Universal TUN/TAP device driver, 1.6 +Aug 31 22:50:24 minifree kernel: [ 0.964861] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> +Aug 31 22:50:24 minifree kernel: [ 0.964949] PPP generic driver version 2.4.2 +Aug 31 22:50:24 minifree kernel: [ 0.965035] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver +Aug 31 22:50:24 minifree kernel: [ 0.965043] ehci-pci: EHCI PCI platform driver +Aug 31 22:50:24 minifree kernel: [ 0.965215] ehci-pci 0000:00:1d.7: EHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.965228] ehci-pci 0000:00:1d.7: new USB bus registered, assigned bus number 1 +Aug 31 22:50:24 minifree kernel: [ 0.965248] ehci-pci 0000:00:1d.7: debug port 1 +Aug 31 22:50:24 minifree kernel: [ 0.969175] ehci-pci 0000:00:1d.7: cache line size of 64 is not supported +Aug 31 22:50:24 minifree kernel: [ 0.969198] ehci-pci 0000:00:1d.7: irq 19, io mem 0xe4344000 +Aug 31 22:50:24 minifree kernel: [ 0.980055] ehci-pci 0000:00:1d.7: USB 2.0 started, EHCI 1.00 +Aug 31 22:50:24 minifree kernel: [ 0.980167] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 +Aug 31 22:50:24 minifree kernel: [ 0.980171] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +Aug 31 22:50:24 minifree kernel: [ 0.980174] usb usb1: Product: EHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.980178] usb usb1: Manufacturer: Linux 3.13.0-34-generic ehci_hcd +Aug 31 22:50:24 minifree kernel: [ 0.980181] usb usb1: SerialNumber: 0000:00:1d.7 +Aug 31 22:50:24 minifree kernel: [ 0.980361] hub 1-0:1.0: USB hub found +Aug 31 22:50:24 minifree kernel: [ 0.980376] hub 1-0:1.0: 8 ports detected +Aug 31 22:50:24 minifree kernel: [ 0.980772] ehci-platform: EHCI generic platform driver +Aug 31 22:50:24 minifree kernel: [ 0.980789] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver +Aug 31 22:50:24 minifree kernel: [ 0.980791] ohci-pci: OHCI PCI platform driver +Aug 31 22:50:24 minifree kernel: [ 0.980807] ohci-platform: OHCI generic platform driver +Aug 31 22:50:24 minifree kernel: [ 0.980820] uhci_hcd: USB Universal Host Controller Interface driver +Aug 31 22:50:24 minifree kernel: [ 0.980960] uhci_hcd 0000:00:1d.0: UHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.980969] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 2 +Aug 31 22:50:24 minifree kernel: [ 0.981013] uhci_hcd 0000:00:1d.0: irq 16, io base 0x00005000 +Aug 31 22:50:24 minifree kernel: [ 0.981094] usb usb2: New USB device found, idVendor=1d6b, idProduct=0001 +Aug 31 22:50:24 minifree kernel: [ 0.981099] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +Aug 31 22:50:24 minifree kernel: [ 0.981102] usb usb2: Product: UHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.981106] usb usb2: Manufacturer: Linux 3.13.0-34-generic uhci_hcd +Aug 31 22:50:24 minifree kernel: [ 0.981109] usb usb2: SerialNumber: 0000:00:1d.0 +Aug 31 22:50:24 minifree kernel: [ 0.981266] hub 2-0:1.0: USB hub found +Aug 31 22:50:24 minifree kernel: [ 0.981279] hub 2-0:1.0: 2 ports detected +Aug 31 22:50:24 minifree kernel: [ 0.981522] uhci_hcd 0000:00:1d.1: UHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.981530] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 3 +Aug 31 22:50:24 minifree kernel: [ 0.981575] uhci_hcd 0000:00:1d.1: irq 17, io base 0x00005020 +Aug 31 22:50:24 minifree kernel: [ 0.981654] usb usb3: New USB device found, idVendor=1d6b, idProduct=0001 +Aug 31 22:50:24 minifree kernel: [ 0.981658] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +Aug 31 22:50:24 minifree kernel: [ 0.981662] usb usb3: Product: UHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.981665] usb usb3: Manufacturer: Linux 3.13.0-34-generic uhci_hcd +Aug 31 22:50:24 minifree kernel: [ 0.981669] usb usb3: SerialNumber: 0000:00:1d.1 +Aug 31 22:50:24 minifree kernel: [ 0.981825] hub 3-0:1.0: USB hub found +Aug 31 22:50:24 minifree kernel: [ 0.981840] hub 3-0:1.0: 2 ports detected +Aug 31 22:50:24 minifree kernel: [ 0.982079] uhci_hcd 0000:00:1d.2: UHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.982090] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 4 +Aug 31 22:50:24 minifree kernel: [ 0.982135] uhci_hcd 0000:00:1d.2: irq 18, io base 0x00005040 +Aug 31 22:50:24 minifree kernel: [ 0.982218] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001 +Aug 31 22:50:24 minifree kernel: [ 0.982222] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +Aug 31 22:50:24 minifree kernel: [ 0.982225] usb usb4: Product: UHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.982229] usb usb4: Manufacturer: Linux 3.13.0-34-generic uhci_hcd +Aug 31 22:50:24 minifree kernel: [ 0.982232] usb usb4: SerialNumber: 0000:00:1d.2 +Aug 31 22:50:24 minifree kernel: [ 0.982388] hub 4-0:1.0: USB hub found +Aug 31 22:50:24 minifree kernel: [ 0.982401] hub 4-0:1.0: 2 ports detected +Aug 31 22:50:24 minifree kernel: [ 0.982648] uhci_hcd 0000:00:1d.3: UHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.982656] uhci_hcd 0000:00:1d.3: new USB bus registered, assigned bus number 5 +Aug 31 22:50:24 minifree kernel: [ 0.982688] uhci_hcd 0000:00:1d.3: irq 19, io base 0x00005060 +Aug 31 22:50:24 minifree kernel: [ 0.982769] usb usb5: New USB device found, idVendor=1d6b, idProduct=0001 +Aug 31 22:50:24 minifree kernel: [ 0.982774] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +Aug 31 22:50:24 minifree kernel: [ 0.982777] usb usb5: Product: UHCI Host Controller +Aug 31 22:50:24 minifree kernel: [ 0.982781] usb usb5: Manufacturer: Linux 3.13.0-34-generic uhci_hcd +Aug 31 22:50:24 minifree kernel: [ 0.982784] usb usb5: SerialNumber: 0000:00:1d.3 +Aug 31 22:50:24 minifree kernel: [ 0.982935] hub 5-0:1.0: USB hub found +Aug 31 22:50:24 minifree kernel: [ 0.982947] hub 5-0:1.0: 2 ports detected +Aug 31 22:50:24 minifree kernel: [ 0.983162] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12 +Aug 31 22:50:24 minifree kernel: [ 0.996933] serio: i8042 KBD port at 0x60,0x64 irq 1 +Aug 31 22:50:24 minifree kernel: [ 0.996948] serio: i8042 AUX port at 0x60,0x64 irq 12 +Aug 31 22:50:24 minifree kernel: [ 0.997177] mousedev: PS/2 mouse device common for all mice +Aug 31 22:50:24 minifree kernel: [ 0.997526] rtc_cmos 00:06: RTC can wake from S4 +Aug 31 22:50:24 minifree kernel: [ 0.997724] rtc_cmos 00:06: rtc core: registered rtc_cmos as rtc0 +Aug 31 22:50:24 minifree kernel: [ 0.997761] rtc_cmos 00:06: alarms up to one month, y3k, 242 bytes nvram, hpet irqs +Aug 31 22:50:24 minifree kernel: [ 0.997869] device-mapper: uevent: version 1.0.3 +Aug 31 22:50:24 minifree kernel: [ 0.997988] device-mapper: ioctl: 4.27.0-ioctl (2013-10-30) initialised: dm-devel@redhat.com +Aug 31 22:50:24 minifree kernel: [ 0.998000] ledtrig-cpu: registered to indicate activity on CPUs +Aug 31 22:50:24 minifree kernel: [ 0.998153] TCP: cubic registered +Aug 31 22:50:24 minifree kernel: [ 0.998301] NET: Registered protocol family 10 +Aug 31 22:50:24 minifree kernel: [ 0.998581] NET: Registered protocol family 17 +Aug 31 22:50:24 minifree kernel: [ 0.998598] Key type dns_resolver registered +Aug 31 22:50:24 minifree kernel: [ 0.999003] Loading compiled-in X.509 certificates +Aug 31 22:50:24 minifree kernel: [ 1.000843] Loaded X.509 cert 'Magrathea: Glacier signing key: 0cadd161e4220740356b3090aabd2b3fcb83a5d0' +Aug 31 22:50:24 minifree kernel: [ 1.000865] registered taskstats version 1 +Aug 31 22:50:24 minifree kernel: [ 1.004840] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3 +Aug 31 22:50:24 minifree kernel: [ 1.006130] Key type trusted registered +Aug 31 22:50:24 minifree kernel: [ 1.010130] Key type encrypted registered +Aug 31 22:50:24 minifree kernel: [ 1.015532] AppArmor: AppArmor sha1 policy hashing enabled +Aug 31 22:50:24 minifree kernel: [ 1.015538] IMA: No TPM chip found, activating TPM-bypass! +Aug 31 22:50:24 minifree kernel: [ 1.015959] regulator-dummy: disabling +Aug 31 22:50:24 minifree kernel: [ 1.016046] Magic number: 10:359:855 +Aug 31 22:50:24 minifree kernel: [ 1.016202] rtc_cmos 00:06: setting system clock to 2014-08-31 21:49:55 UTC (1409521795) +Aug 31 22:50:24 minifree kernel: [ 1.017114] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found +Aug 31 22:50:24 minifree kernel: [ 1.017120] EDD information not available. +Aug 31 22:50:24 minifree kernel: [ 1.017162] PM: Hibernation image not present or could not be loaded. +Aug 31 22:50:24 minifree kernel: [ 1.019541] Freeing unused kernel memory: 1336K (ffffffff81d20000 - ffffffff81e6e000) +Aug 31 22:50:24 minifree kernel: [ 1.019544] Write protecting the kernel read-only data: 12288k +Aug 31 22:50:24 minifree kernel: [ 1.023552] Freeing unused kernel memory: 788K (ffff88000173b000 - ffff880001800000) +Aug 31 22:50:24 minifree kernel: [ 1.026751] Freeing unused kernel memory: 680K (ffff880001b56000 - ffff880001c00000) +Aug 31 22:50:24 minifree kernel: [ 1.094875] pps_core: LinuxPPS API ver. 1 registered +Aug 31 22:50:24 minifree kernel: [ 1.094880] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> +Aug 31 22:50:24 minifree kernel: [ 1.098290] [drm] Initialized drm 1.1.0 20060810 +Aug 31 22:50:24 minifree kernel: [ 1.102066] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no) +Aug 31 22:50:24 minifree kernel: [ 1.106256] PTP clock support registered +Aug 31 22:50:24 minifree kernel: [ 1.113596] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k +Aug 31 22:50:24 minifree kernel: [ 1.113602] e1000e: Copyright(c) 1999 - 2013 Intel Corporation. +Aug 31 22:50:24 minifree kernel: [ 1.124513] e1000e 0000:01:00.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode +Aug 31 22:50:24 minifree kernel: [ 1.124561] e1000e 0000:01:00.0: irq 44 for MSI/MSI-X +Aug 31 22:50:24 minifree kernel: [ 1.124660] acpi device:04: registered as cooling_device2 +Aug 31 22:50:24 minifree kernel: [ 1.124749] input: Video Bus as /devices/LNXSYSTM:00/device:00/PNP0A08:00/LNXVIDEO:00/input/input5 +Aug 31 22:50:24 minifree kernel: [ 1.147236] [drm:i915_dump_device_info], i915 device info: gen=3, pciid=0x27a2 flags=is_mobile,is_i945gm,has_hotplug,cursor_needs_physical,has_overlay,overlay_needs_physical,supports_tv, +Aug 31 22:50:24 minifree kernel: [ 1.147327] [drm:intel_detect_pch], No PCH found. +Aug 31 22:50:24 minifree kernel: [ 1.147333] [drm] Memory usable by graphics device = 256M +Aug 31 22:50:24 minifree kernel: [ 1.147335] [drm:i915_gem_gtt_init], GMADR size = 256M +Aug 31 22:50:24 minifree kernel: [ 1.147338] [drm:i915_gem_gtt_init], GTT stolen size = 8M +Aug 31 22:50:24 minifree kernel: [ 1.149656] sdhci: Secure Digital Host Controller Interface driver +Aug 31 22:50:24 minifree kernel: [ 1.149659] sdhci: Copyright(c) Pierre Ossman +Aug 31 22:50:24 minifree kernel: [ 1.152120] sdhci-pci 0000:05:00.2: SDHCI controller found [1180:0822] (rev 18) +Aug 31 22:50:24 minifree kernel: [ 1.152136] pci 0000:00:1e.0: enabling device (0004 -> 0007) +Aug 31 22:50:24 minifree kernel: [ 1.180299] [drm:intel_opregion_setup], graphic opregion physical addr: 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.180306] [drm:intel_opregion_setup], ACPI OpRegion not supported! +Aug 31 22:50:24 minifree kernel: [ 1.180346] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +Aug 31 22:50:24 minifree kernel: [ 1.180348] [drm] Driver supports precise vblank timestamp query. +Aug 31 22:50:24 minifree kernel: [ 1.180351] [drm:init_vbt_defaults], Set default to SSC at 100MHz +Aug 31 22:50:24 minifree kernel: [ 1.180358] i915 0000:00:02.0: Invalid ROM contents +Aug 31 22:50:24 minifree kernel: [ 1.180360] [drm:intel_parse_bios], VBT signature missing +Aug 31 22:50:24 minifree kernel: [ 1.180363] [drm] failed to find VBIOS tables +Aug 31 22:50:24 minifree kernel: [ 1.180369] [drm:intel_dsm_pci_probe], no _DSM method for intel device +Aug 31 22:50:24 minifree kernel: [ 1.180383] [drm:i915_gem_init_stolen], found 8388608 bytes of stolen memory at 7f800000 +Aug 31 22:50:24 minifree kernel: [ 1.180409] [drm] GPU crash dump saved to /sys/class/drm/card0/error +Aug 31 22:50:24 minifree kernel: [ 1.180412] [drm:intel_modeset_init], 2 display pipes available. +Aug 31 22:50:24 minifree kernel: [ 1.180419] [drm:intel_crtc_init], swapping pipes & planes for FBC +Aug 31 22:50:24 minifree kernel: [ 1.180421] [drm] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace. +Aug 31 22:50:24 minifree kernel: [ 1.180423] [drm] Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel +Aug 31 22:50:24 minifree kernel: [ 1.180425] [drm] drm/i915 developers can then reassign to the right component if it's not a kernel issue. +Aug 31 22:50:24 minifree kernel: [ 1.180427] [drm] The gpu crash dump is required to analyze gpu hangs, so please always attach it. +Aug 31 22:50:24 minifree kernel: [ 1.180429] [drm:intel_modeset_init], pipe A sprite A init failed: -19 +Aug 31 22:50:24 minifree kernel: [ 1.180435] [drm:intel_crtc_init], swapping pipes & planes for FBC +Aug 31 22:50:24 minifree kernel: [ 1.180437] [drm:intel_modeset_init], pipe B sprite B init failed: -19 +Aug 31 22:50:24 minifree kernel: [ 1.180440] [drm:intel_shared_dpll_init], 0 shared PLLs initialized +Aug 31 22:50:24 minifree kernel: [ 1.180448] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem +Aug 31 22:50:24 minifree kernel: [ 1.180450] i915: render error detected, EIR: 0x00000010 +Aug 31 22:50:24 minifree kernel: [ 1.180452] i915: page table error +Aug 31 22:50:24 minifree kernel: [ 1.180454] i915: PGTBL_ER: 0x00000012 +Aug 31 22:50:24 minifree kernel: [ 1.180457] [drm:i915_report_and_clear_eir] *ERROR* EIR stuck: 0x00000010, masking +Aug 31 22:50:24 minifree kernel: [ 1.180463] [drm:i915_irq_handler], pipe B underrun +Aug 31 22:50:24 minifree kernel: [ 1.180469] i915: render error detected, EIR: 0x00000010 +Aug 31 22:50:24 minifree kernel: [ 1.180471] i915: page table error +Aug 31 22:50:24 minifree kernel: [ 1.180473] i915: PGTBL_ER: 0x00000012 +Aug 31 22:50:24 minifree kernel: [ 1.182043] sdhci-pci 0000:05:00.2: Will use DMA mode even though HW doesn't fully claim to support it. +Aug 31 22:50:24 minifree kernel: [ 1.182056] sdhci-pci 0000:05:00.2: dummy supplies not allowed +Aug 31 22:50:24 minifree kernel: [ 1.182059] mmc0: no vqmmc regulator found +Aug 31 22:50:24 minifree kernel: [ 1.182062] sdhci-pci 0000:05:00.2: dummy supplies not allowed +Aug 31 22:50:24 minifree kernel: [ 1.182064] mmc0: no vmmc regulator found +Aug 31 22:50:24 minifree kernel: [ 1.183062] sdhci-pci 0000:05:00.2: Will use DMA mode even though HW doesn't fully claim to support it. +Aug 31 22:50:24 minifree kernel: [ 1.183862] mmc0: SDHCI controller on PCI [0000:05:00.2] using DMA +Aug 31 22:50:24 minifree kernel: [ 1.236462] e1000e 0000:01:00.0 eth0: (PCI Express:2.5GT/s:Width x1) 00:16:d3:b6:d0:98 +Aug 31 22:50:24 minifree kernel: [ 1.236469] e1000e 0000:01:00.0 eth0: Intel(R) PRO/1000 Network Connection +Aug 31 22:50:24 minifree kernel: [ 1.236549] e1000e 0000:01:00.0 eth0: MAC: 2, PHY: 2, PBA No: 005302-003 +Aug 31 22:50:24 minifree kernel: [ 1.248155] firewire_ohci 0000:05:00.1: added OHCI v1.10 device as card 0, 4 IR + 4 IT contexts, quirks 0x11 +Aug 31 22:50:24 minifree kernel: [ 1.264281] [drm:intel_lvds_init], using preferred mode from EDID: +Aug 31 22:50:24 minifree kernel: [ 1.264287] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:50:24 minifree kernel: [ 1.264297] [drm:intel_lvds_init], detected single-link lvds configuration +Aug 31 22:50:24 minifree kernel: [ 1.264356] [drm:intel_panel_get_backlight], get backlight PWM = 24832 +Aug 31 22:50:24 minifree kernel: [ 1.264360] [drm:intel_panel_get_max_backlight], max backlight PWM = 24832 +Aug 31 22:50:24 minifree kernel: [ 1.264505] [drm:i915_gem_setup_global_gtt], clearing unused GTT space: [0, ffff000] +Aug 31 22:50:24 minifree kernel: [ 1.264889] [drm:i915_gem_object_create_stolen], creating stolen object: size=20000 +Aug 31 22:50:24 minifree kernel: [ 1.264897] [drm:i915_pages_create_for_stolen], offset=0x0, size=131072 +Aug 31 22:50:24 minifree kernel: [ 1.264946] [drm:i915_gem_context_init], Disabling HW Contexts; old hardware +Aug 31 22:50:24 minifree kernel: [ 1.264996] [drm] initialized overlay support +Aug 31 22:50:24 minifree kernel: [ 1.265002] [drm:intel_modeset_readout_hw_state], [CRTC:3] hw state readout: disabled +Aug 31 22:50:24 minifree kernel: [ 1.265012] [drm:intel_modeset_readout_hw_state], [CRTC:4] hw state readout: enabled +Aug 31 22:50:24 minifree kernel: [ 1.265017] [drm:intel_modeset_readout_hw_state], [ENCODER:6:LVDS-6] hw state readout: enabled, pipe B +Aug 31 22:50:24 minifree kernel: [ 1.265022] [drm:intel_modeset_readout_hw_state], [ENCODER:16:DAC-16] hw state readout: disabled, pipe A +Aug 31 22:50:24 minifree kernel: [ 1.265026] [drm:intel_modeset_readout_hw_state], [ENCODER:18:TV-18] hw state readout: disabled, pipe A +Aug 31 22:50:24 minifree kernel: [ 1.265031] [drm:intel_modeset_readout_hw_state], [CONNECTOR:5:LVDS-1] hw state readout: enabled +Aug 31 22:50:24 minifree kernel: [ 1.265035] [drm:intel_modeset_readout_hw_state], [CONNECTOR:15:VGA-1] hw state readout: disabled +Aug 31 22:50:24 minifree kernel: [ 1.265039] [drm:intel_modeset_readout_hw_state], [CONNECTOR:17:SVIDEO-1] hw state readout: disabled +Aug 31 22:50:24 minifree kernel: [ 1.265044] [drm:intel_dump_pipe_config], [CRTC:3][setup_hw_state] config for pipe A +Aug 31 22:50:24 minifree kernel: [ 1.265047] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:50:24 minifree kernel: [ 1.265050] [drm:intel_dump_pipe_config], pipe bpp: 0, dithering: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265053] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265057] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265060] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:50:24 minifree kernel: [ 1.265063] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.265067] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:50:24 minifree kernel: [ 1.265070] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.265074] [drm:intel_dump_crtc_timings], crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.265078] [drm:intel_dump_pipe_config], port clock: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265081] [drm:intel_dump_pipe_config], pipe src size: 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.265084] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:50:24 minifree kernel: [ 1.265087] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:50:24 minifree kernel: [ 1.265090] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265093] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265097] [drm:intel_dump_pipe_config], [CRTC:4][setup_hw_state] config for pipe B +Aug 31 22:50:24 minifree kernel: [ 1.265100] [drm:intel_dump_pipe_config], cpu_transcoder: B +Aug 31 22:50:24 minifree kernel: [ 1.265102] [drm:intel_dump_pipe_config], pipe bpp: 0, dithering: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265105] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265109] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265112] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:50:24 minifree kernel: [ 1.265115] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 640 0 0 0 400 0 0 0 0x0 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.265119] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:50:24 minifree kernel: [ 1.265122] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0xa +Aug 31 22:50:24 minifree kernel: [ 1.265126] [drm:intel_dump_crtc_timings], crtc timings: 45982 1024 1048 1184 1344 768 779 1 806, type: 0x0 flags: 0xa +Aug 31 22:50:24 minifree kernel: [ 1.265130] [drm:intel_dump_pipe_config], port clock: 45982 +Aug 31 22:50:24 minifree kernel: [ 1.265133] [drm:intel_dump_pipe_config], pipe src size: 640x400 +Aug 31 22:50:24 minifree kernel: [ 1.265136] [drm:intel_dump_pipe_config], gmch pfit: control: 0x80000220, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:50:24 minifree kernel: [ 1.265139] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:50:24 minifree kernel: [ 1.265142] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265145] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:50:24 minifree kernel: [ 1.265149] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 1.265153] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:50:24 minifree kernel: [ 1.265157] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:50:24 minifree kernel: [ 1.265160] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 1.265163] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:50:24 minifree kernel: [ 1.265166] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 1.265183] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 1.265187] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 1.265204] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +Aug 31 22:50:24 minifree kernel: [ 1.265208] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:50:24 minifree kernel: [ 1.265213] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:50:24 minifree kernel: [ 1.265218] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:50:24 minifree kernel: [ 1.265222] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +Aug 31 22:50:24 minifree kernel: [ 1.265227] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +Aug 31 22:50:24 minifree kernel: [ 1.265232] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:50:24 minifree kernel: [ 1.265235] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:50:24 minifree kernel: [ 1.280167] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:50:24 minifree kernel: [ 1.284121] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:50:24 minifree kernel: [ 1.284128] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:50:24 minifree kernel: [ 1.284131] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:50:24 minifree kernel: [ 1.284134] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:50:24 minifree kernel: [ 1.284413] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:50:24 minifree kernel: [ 1.284416] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:50:24 minifree kernel: [ 1.284419] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:50:24 minifree kernel: [ 1.284423] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:50:24 minifree kernel: [ 1.284429] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:50:24 minifree kernel: [ 1.284432] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:50:24 minifree kernel: [ 1.284437] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 1.284441] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:50:24 minifree kernel: [ 1.284454] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:50:24 minifree kernel: [ 1.284460] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:50:24 minifree kernel: [ 1.284464] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:50:24 minifree kernel: [ 1.284467] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:50:24 minifree kernel: [ 1.284470] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:50:24 minifree kernel: [ 1.284473] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:50:24 minifree kernel: [ 1.284476] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:50:24 minifree kernel: [ 1.284479] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 1.284483] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 1.284486] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:50:24 minifree kernel: [ 1.284488] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.284493] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:50:24 minifree kernel: [ 1.284496] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.284501] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.284505] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:50:24 minifree kernel: [ 1.284508] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:50:24 minifree kernel: [ 1.284511] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:50:24 minifree kernel: [ 1.284514] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:50:24 minifree kernel: [ 1.284517] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:50:24 minifree kernel: [ 1.284520] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:50:24 minifree kernel: [ 1.292029] [drm:i9xx_update_plane], Writing base 00020000 00000000 0 0 5120 +Aug 31 22:50:24 minifree kernel: [ 1.292040] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:50:24 minifree kernel: [ 1.297668] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:50:24 minifree kernel: [ 1.297673] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:50:24 minifree kernel: [ 1.297676] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:50:24 minifree kernel: [ 1.297679] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:50:24 minifree kernel: [ 1.297681] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 1 +Aug 31 22:50:24 minifree kernel: [ 1.297685] [drm:i9xx_update_wm], self-refresh entries: 80 +Aug 31 22:50:24 minifree kernel: [ 1.297687] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 1, C: 2, SR 47 +Aug 31 22:50:24 minifree kernel: [ 1.297691] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:50:24 minifree kernel: [ 1.320114] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 1.320123] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:50:24 minifree kernel: [ 1.320128] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:50:24 minifree kernel: [ 1.320133] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:50:24 minifree kernel: [ 1.320138] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 1.320142] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:50:24 minifree kernel: [ 1.320155] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 1.360100] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:50:24 minifree kernel: [ 1.360106] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:50:24 minifree kernel: [ 1.376107] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 1.376114] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:50:24 minifree kernel: [ 1.421067] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:50:24 minifree kernel: [ 1.421071] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:50:24 minifree kernel: [ 1.421074] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 29 +Aug 31 22:50:24 minifree kernel: [ 1.421077] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 29, C: 2, SR 1 +Aug 31 22:50:24 minifree kernel: [ 1.421080] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:50:24 minifree kernel: [ 1.421087] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 1.421091] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:50:24 minifree kernel: [ 1.421094] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:50:24 minifree kernel: [ 1.421098] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 1.421101] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:50:24 minifree kernel: [ 1.421104] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 1.421246] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:50:24 minifree kernel: [ 1.421251] [drm:drm_setup_crtcs], +Aug 31 22:50:24 minifree kernel: [ 1.421254] [drm:drm_enable_connectors], connector 5 enabled? yes +Aug 31 22:50:24 minifree kernel: [ 1.421257] [drm:drm_enable_connectors], connector 15 enabled? no +Aug 31 22:50:24 minifree kernel: [ 1.421260] [drm:drm_enable_connectors], connector 17 enabled? no +Aug 31 22:50:24 minifree kernel: [ 1.421263] [drm:drm_target_preferred], looking for cmdline mode on connector 5 +Aug 31 22:50:24 minifree kernel: [ 1.421266] [drm:drm_target_preferred], looking for preferred mode on connector 5 +Aug 31 22:50:24 minifree kernel: [ 1.421268] [drm:drm_target_preferred], found mode 1024x768 +Aug 31 22:50:24 minifree kernel: [ 1.421271] [drm:drm_setup_crtcs], picking CRTCs for 4096x4096 config +Aug 31 22:50:24 minifree kernel: [ 1.421275] [drm:drm_setup_crtcs], desired mode 1024x768 set on crtc 4 +Aug 31 22:50:24 minifree kernel: [ 1.421281] [drm:i915_gem_object_create_stolen], creating stolen object: size=300000 +Aug 31 22:50:24 minifree kernel: [ 1.421285] [drm:i915_pages_create_for_stolen], offset=0x20000, size=3145728 +Aug 31 22:50:24 minifree kernel: [ 1.422732] [drm:intelfb_create], allocated 1024x768 fb: 0x00020000, bo ffff880035eaa300 +Aug 31 22:50:24 minifree kernel: [ 1.422872] fbcon: inteldrmfb (fb0) is primary device +Aug 31 22:50:24 minifree kernel: [ 1.423535] [drm:intel_crtc_set_config], [CRTC:3] [NOFB] +Aug 31 22:50:24 minifree kernel: [ 1.423538] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 1.423541] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 1.423544] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +Aug 31 22:50:24 minifree kernel: [ 1.423546] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set +Aug 31 22:50:24 minifree kernel: [ 1.423548] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set +Aug 31 22:50:24 minifree kernel: [ 1.423552] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 +Aug 31 22:50:24 minifree kernel: [ 1.423556] [drm:drm_mode_debug_printmodeline], Modeline 32:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:50:24 minifree kernel: [ 1.423558] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=1, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 1.423560] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 1.423563] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0 +Aug 31 22:50:24 minifree kernel: [ 1.423566] [drm:connected_sink_compute_bpp], [CONNECTOR:5:LVDS-1] checking for sink bpp constrains +Aug 31 22:50:24 minifree kernel: [ 1.423570] [drm:intel_lvds_compute_config], forcing display bpp (was 24) to LVDS (18) +Aug 31 22:50:24 minifree kernel: [ 1.423573] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 18, dithering: 1 +Aug 31 22:50:24 minifree kernel: [ 1.423576] [drm:intel_dump_pipe_config], [CRTC:4][modeset] config for pipe B +Aug 31 22:50:24 minifree kernel: [ 1.423577] [drm:intel_dump_pipe_config], cpu_transcoder: B +Aug 31 22:50:24 minifree kernel: [ 1.423579] [drm:intel_dump_pipe_config], pipe bpp: 18, dithering: 1 +Aug 31 22:50:24 minifree kernel: [ 1.423582] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 1.423584] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 1.423586] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:50:24 minifree kernel: [ 1.423589] [drm:drm_mode_debug_printmodeline], Modeline 0:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:50:24 minifree kernel: [ 1.423591] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:50:24 minifree kernel: [ 1.423595] [drm:drm_mode_debug_printmodeline], Modeline 0:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:50:24 minifree kernel: [ 1.423598] [drm:intel_dump_crtc_timings], crtc timings: 54160 1024 1048 1184 1344 768 771 777 806, type: 0x48 flags: 0xa +Aug 31 22:50:24 minifree kernel: [ 1.423600] [drm:intel_dump_pipe_config], port clock: 54160 +Aug 31 22:50:24 minifree kernel: [ 1.423602] [drm:intel_dump_pipe_config], pipe src size: 1024x768 +Aug 31 22:50:24 minifree kernel: [ 1.423604] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000008, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:50:24 minifree kernel: [ 1.423607] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:50:24 minifree kernel: [ 1.423608] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:50:24 minifree kernel: [ 1.423610] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:50:24 minifree kernel: [ 1.423613] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0 +Aug 31 22:50:24 minifree kernel: [ 1.457065] [drm:i9xx_pfit_disable], disabling pfit, current: 0x80000220 +Aug 31 22:50:24 minifree kernel: [ 1.457069] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:50:24 minifree kernel: [ 1.457071] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:50:24 minifree kernel: [ 1.457073] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 29 +Aug 31 22:50:24 minifree kernel: [ 1.457076] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 29, C: 2, SR 1 +Aug 31 22:50:24 minifree kernel: [ 1.457077] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:50:24 minifree kernel: [ 1.457082] [drm:i9xx_get_refclk], using SSC reference clock of 100 MHz +Aug 31 22:50:24 minifree kernel: [ 1.457252] [drm:i9xx_update_plane], Writing base 00020000 00000000 0 0 4096 +Aug 31 22:50:24 minifree kernel: [ 1.457256] [drm:intel_crtc_mode_set], [ENCODER:6:LVDS-6] set [MODE:0:1024x768] +Aug 31 22:50:24 minifree kernel: [ 1.457893] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:50:24 minifree kernel: [ 1.457895] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:50:24 minifree kernel: [ 1.457896] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:50:24 minifree kernel: [ 1.457898] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:50:24 minifree kernel: [ 1.457900] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:50:24 minifree kernel: [ 1.457902] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:50:24 minifree kernel: [ 1.457905] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:50:24 minifree kernel: [ 1.457906] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:50:24 minifree kernel: [ 1.650555] psmouse serio1: alps: Unknown ALPS touchpad: E7=10 00 64, EC=10 00 64 +Aug 31 22:50:24 minifree kernel: [ 1.748270] firewire_core 0000:05:00.1: created device fw0: GUID 0000000000000000, S400 +Aug 31 22:50:24 minifree kernel: [ 1.800110] [drm:intel_panel_enable_backlight], pipe B +Aug 31 22:50:24 minifree kernel: [ 1.800114] [drm:intel_panel_actually_set_backlight], set backlight PWM = 24832 +Aug 31 22:50:24 minifree kernel: [ 1.800120] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 1.800125] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:50:24 minifree kernel: [ 1.800129] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:50:24 minifree kernel: [ 1.800133] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 1.800136] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:50:24 minifree kernel: [ 1.800139] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 1.800178] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +Aug 31 22:50:24 minifree kernel: [ 1.800182] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 1.800186] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 1.803473] Console: switching to colour frame buffer device 128x48 +Aug 31 22:50:24 minifree kernel: [ 1.803478] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +Aug 31 22:50:24 minifree kernel: [ 1.803481] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 1.803483] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 1.806832] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device +Aug 31 22:50:24 minifree kernel: [ 1.806835] i915 0000:00:02.0: registered panic notifier +Aug 31 22:50:24 minifree kernel: [ 1.806859] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0 +Aug 31 22:50:24 minifree kernel: [ 1.806909] ahci 0000:00:1f.2: version 3.0 +Aug 31 22:50:24 minifree kernel: [ 1.807136] ahci 0000:00:1f.2: irq 45 for MSI/MSI-X +Aug 31 22:50:24 minifree kernel: [ 1.807190] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled +Aug 31 22:50:24 minifree kernel: [ 1.807222] ahci 0000:00:1f.2: AHCI 0001.0100 32 slots 4 ports 1.5 Gbps 0x1 impl SATA mode +Aug 31 22:50:24 minifree kernel: [ 1.807228] ahci 0000:00:1f.2: flags: 64bit ncq ilck stag pm led clo pmp pio slum part +Aug 31 22:50:24 minifree kernel: [ 1.808040] scsi2 : ahci +Aug 31 22:50:24 minifree kernel: [ 1.808204] scsi3 : ahci +Aug 31 22:50:24 minifree kernel: [ 1.808350] scsi4 : ahci +Aug 31 22:50:24 minifree kernel: [ 1.808499] scsi5 : ahci +Aug 31 22:50:24 minifree kernel: [ 1.808567] ata3: SATA max UDMA/133 abar m1024@0xe4344400 port 0xe4344500 irq 45 +Aug 31 22:50:24 minifree kernel: [ 1.808570] ata4: DUMMY +Aug 31 22:50:24 minifree kernel: [ 1.808572] ata5: DUMMY +Aug 31 22:50:24 minifree kernel: [ 1.808574] ata6: DUMMY +Aug 31 22:50:24 minifree kernel: [ 2.014396] psmouse serio1: trackpoint: IBM TrackPoint firmware: 0x0e, buttons: 3/3 +Aug 31 22:50:24 minifree kernel: [ 2.033367] input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio1/input/input6 +Aug 31 22:50:24 minifree kernel: [ 2.304119] ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300) +Aug 31 22:50:24 minifree kernel: [ 2.305312] ata3.00: ATA-8: HITACHI HTS722010K9SA00, DC2ZC75A, max UDMA/133 +Aug 31 22:50:24 minifree kernel: [ 2.305317] ata3.00: 195371568 sectors, multi 0: LBA48 NCQ (depth 31/32), AA +Aug 31 22:50:24 minifree kernel: [ 2.306684] ata3.00: configured for UDMA/133 +Aug 31 22:50:24 minifree kernel: [ 2.306893] scsi 2:0:0:0: Direct-Access ATA HITACHI HTS72201 DC2Z PQ: 0 ANSI: 5 +Aug 31 22:50:24 minifree kernel: [ 2.307119] sd 2:0:0:0: Attached scsi generic sg0 type 0 +Aug 31 22:50:24 minifree kernel: [ 2.307251] sd 2:0:0:0: [sda] 195371568 512-byte logical blocks: (100 GB/93.1 GiB) +Aug 31 22:50:24 minifree kernel: [ 2.307395] sd 2:0:0:0: [sda] Write Protect is off +Aug 31 22:50:24 minifree kernel: [ 2.307400] sd 2:0:0:0: [sda] Mode Sense: 00 3a 00 00 +Aug 31 22:50:24 minifree kernel: [ 2.307477] sd 2:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA +Aug 31 22:50:24 minifree kernel: [ 2.632829] sda: sda1 +Aug 31 22:50:24 minifree kernel: [ 2.633271] sd 2:0:0:0: [sda] Attached SCSI disk +Aug 31 22:50:24 minifree kernel: [ 2.784099] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +Aug 31 22:50:24 minifree kernel: [ 2.784104] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 2.784107] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 2.908607] [drm:i915_gem_open], +Aug 31 22:50:24 minifree kernel: [ 2.908634] [drm:intel_crtc_cursor_set], cursor off +Aug 31 22:50:24 minifree kernel: [ 2.908638] [drm:intel_crtc_set_config], [CRTC:3] [NOFB] +Aug 31 22:50:24 minifree kernel: [ 2.908643] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 2.908648] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 2.908652] [drm:intel_crtc_cursor_set], cursor off +Aug 31 22:50:24 minifree kernel: [ 2.908655] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +Aug 31 22:50:24 minifree kernel: [ 2.908660] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 2.908663] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 2.908682] [drm:i915_gem_open], +Aug 31 22:50:24 minifree kernel: [ 2.908697] [drm:intel_crtc_cursor_set], cursor off +Aug 31 22:50:24 minifree kernel: [ 2.908700] [drm:intel_crtc_set_config], [CRTC:3] [NOFB] +Aug 31 22:50:24 minifree kernel: [ 2.908703] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 2.908706] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 2.908709] [drm:intel_crtc_cursor_set], cursor off +Aug 31 22:50:24 minifree kernel: [ 2.908712] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +Aug 31 22:50:24 minifree kernel: [ 2.908716] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 2.908719] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 2.908735] [drm:i915_gem_open], +Aug 31 22:50:24 minifree kernel: [ 2.908824] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +Aug 31 22:50:24 minifree kernel: [ 2.908830] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +Aug 31 22:50:24 minifree kernel: [ 2.908841] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:50:24 minifree kernel: [ 2.908846] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 2.908850] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 2.908871] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +Aug 31 22:50:24 minifree kernel: [ 2.908874] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:50:24 minifree kernel: [ 2.908880] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:50:24 minifree kernel: [ 2.908885] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:50:24 minifree kernel: [ 2.908889] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +Aug 31 22:50:24 minifree kernel: [ 2.908894] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +Aug 31 22:50:24 minifree kernel: [ 2.908901] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:50:24 minifree kernel: [ 2.912519] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:50:24 minifree kernel: [ 2.912529] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:50:24 minifree kernel: [ 2.912533] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:50:24 minifree kernel: [ 2.928108] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:50:24 minifree kernel: [ 2.932103] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:50:24 minifree kernel: [ 2.932110] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:50:24 minifree kernel: [ 2.932115] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:50:24 minifree kernel: [ 2.932118] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:50:24 minifree kernel: [ 2.932404] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:50:24 minifree kernel: [ 2.932407] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:50:24 minifree kernel: [ 2.932410] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:50:24 minifree kernel: [ 2.932413] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:50:24 minifree kernel: [ 2.932424] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:50:24 minifree kernel: [ 2.932427] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:50:24 minifree kernel: [ 2.932430] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:50:24 minifree kernel: [ 2.948104] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:50:24 minifree kernel: [ 2.952104] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:50:24 minifree kernel: [ 2.952111] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:50:24 minifree kernel: [ 2.952115] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:50:24 minifree kernel: [ 2.952118] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:50:24 minifree kernel: [ 2.952401] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:50:24 minifree kernel: [ 2.952403] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:50:24 minifree kernel: [ 2.952406] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:50:24 minifree kernel: [ 2.952409] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:50:24 minifree kernel: [ 2.952420] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:50:24 minifree kernel: [ 2.952423] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:50:24 minifree kernel: [ 2.952427] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:50:24 minifree kernel: [ 2.952431] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 2.952436] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:50:24 minifree kernel: [ 2.952459] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:50:24 minifree kernel: [ 2.952466] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:50:24 minifree kernel: [ 2.952471] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:50:24 minifree kernel: [ 2.952474] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:50:24 minifree kernel: [ 2.952477] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:50:24 minifree kernel: [ 2.952480] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:50:24 minifree kernel: [ 2.952483] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:50:24 minifree kernel: [ 2.952486] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 2.952489] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 2.952493] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:50:24 minifree kernel: [ 2.952495] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:50:24 minifree kernel: [ 2.952500] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:50:24 minifree kernel: [ 2.952503] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:50:24 minifree kernel: [ 2.952508] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:50:24 minifree kernel: [ 2.952512] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:50:24 minifree kernel: [ 2.952514] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:50:24 minifree kernel: [ 2.952517] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:50:24 minifree kernel: [ 2.952521] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:50:24 minifree kernel: [ 2.952524] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:50:24 minifree kernel: [ 2.952527] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:50:24 minifree kernel: [ 2.959612] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120 +Aug 31 22:50:24 minifree kernel: [ 2.959624] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:50:24 minifree kernel: [ 2.965254] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:50:24 minifree kernel: [ 2.965259] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:50:24 minifree kernel: [ 2.965261] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:50:24 minifree kernel: [ 2.965264] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:50:24 minifree kernel: [ 2.965267] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:50:24 minifree kernel: [ 2.965270] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:50:24 minifree kernel: [ 2.965272] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:50:24 minifree kernel: [ 2.965276] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:50:24 minifree kernel: [ 2.965279] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:50:24 minifree kernel: [ 2.988110] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 2.988118] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:50:24 minifree kernel: [ 2.988123] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:50:24 minifree kernel: [ 2.988128] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:50:24 minifree kernel: [ 2.988133] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 2.988138] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:50:24 minifree kernel: [ 2.988151] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 3.028106] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:50:24 minifree kernel: [ 3.028114] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:50:24 minifree kernel: [ 3.044104] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 3.044113] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:50:24 minifree kernel: [ 3.089061] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:50:24 minifree kernel: [ 3.089065] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:50:24 minifree kernel: [ 3.089067] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:50:24 minifree kernel: [ 3.089070] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:50:24 minifree kernel: [ 3.089074] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:50:24 minifree kernel: [ 3.089077] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:50:24 minifree kernel: [ 3.089079] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:50:24 minifree kernel: [ 3.089083] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:50:24 minifree kernel: [ 3.089089] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 3.089094] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:50:24 minifree kernel: [ 3.089097] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:50:24 minifree kernel: [ 3.089100] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 3.089103] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:50:24 minifree kernel: [ 3.089106] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 3.089258] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:50:24 minifree kernel: [ 3.090319] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:50:24 minifree kernel: [ 3.090324] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:50:24 minifree kernel: [ 3.090327] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:50:24 minifree kernel: [ 3.090331] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 3.090335] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:50:24 minifree kernel: [ 3.090351] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:50:24 minifree kernel: [ 3.090356] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:50:24 minifree kernel: [ 3.090359] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:50:24 minifree kernel: [ 3.090362] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:50:24 minifree kernel: [ 3.090365] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:50:24 minifree kernel: [ 3.090369] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:50:24 minifree kernel: [ 3.090371] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:50:24 minifree kernel: [ 3.090374] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 3.090378] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:50:24 minifree kernel: [ 3.090381] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:50:24 minifree kernel: [ 3.090384] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:50:24 minifree kernel: [ 3.090389] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:50:24 minifree kernel: [ 3.090391] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:50:24 minifree kernel: [ 3.090396] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:50:24 minifree kernel: [ 3.090400] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:50:24 minifree kernel: [ 3.090403] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:50:24 minifree kernel: [ 3.090406] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:50:24 minifree kernel: [ 3.090409] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:50:24 minifree kernel: [ 3.090412] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:50:24 minifree kernel: [ 3.090415] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:50:24 minifree kernel: [ 3.096851] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120 +Aug 31 22:50:24 minifree kernel: [ 3.096864] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:50:24 minifree kernel: [ 3.102491] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:50:24 minifree kernel: [ 3.102495] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:50:24 minifree kernel: [ 3.102498] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:50:24 minifree kernel: [ 3.102501] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:50:24 minifree kernel: [ 3.102504] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:50:24 minifree kernel: [ 3.102506] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:50:24 minifree kernel: [ 3.102509] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:50:24 minifree kernel: [ 3.102512] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:50:24 minifree kernel: [ 3.102515] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:50:24 minifree kernel: [ 3.124103] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 3.124110] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:50:24 minifree kernel: [ 3.124116] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:50:24 minifree kernel: [ 3.124121] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:50:24 minifree kernel: [ 3.124126] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 3.124131] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:50:24 minifree kernel: [ 3.124143] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 3.164099] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:50:24 minifree kernel: [ 3.164104] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:50:24 minifree kernel: [ 3.188098] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 3.188105] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:50:24 minifree kernel: [ 3.229059] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:50:24 minifree kernel: [ 3.229063] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:50:24 minifree kernel: [ 3.229065] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:50:24 minifree kernel: [ 3.229068] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:50:24 minifree kernel: [ 3.229071] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:50:24 minifree kernel: [ 3.229075] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:50:24 minifree kernel: [ 3.229077] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:50:24 minifree kernel: [ 3.229081] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:50:24 minifree kernel: [ 3.229086] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 3.229091] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:50:24 minifree kernel: [ 3.229094] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:50:24 minifree kernel: [ 3.229097] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:50:24 minifree kernel: [ 3.229100] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:50:24 minifree kernel: [ 3.229103] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 3.229256] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:50:24 minifree kernel: [ 3.230324] [drm:drm_mode_addfb], [FB:34] +Aug 31 22:50:24 minifree kernel: [ 3.603108] [drm:drm_mode_addfb], [FB:34] +Aug 31 22:50:24 minifree kernel: [ 3.603201] [drm:intel_crtc_set_config], [CRTC:4] [FB:33] #connectors=1 (x y) (0 0) +Aug 31 22:50:24 minifree kernel: [ 3.603207] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 3.603211] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 3.606628] [drm:drm_mode_setcrtc], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 3.606636] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 3.606640] [drm:intel_crtc_set_config], [CRTC:4] [FB:34] #connectors=1 (x y) (0 0) +Aug 31 22:50:24 minifree kernel: [ 3.606645] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=1 +Aug 31 22:50:24 minifree kernel: [ 3.606648] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 3.610935] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 4096 +Aug 31 22:50:24 minifree kernel: [ 3.627861] md: linear personality registered for level -1 +Aug 31 22:50:24 minifree kernel: [ 3.628773] [drm:drm_mode_setcrtc], [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 3.628782] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1] +Aug 31 22:50:24 minifree kernel: [ 3.628787] [drm:intel_crtc_set_config], [CRTC:4] [FB:34] #connectors=1 (x y) (0 0) +Aug 31 22:50:24 minifree kernel: [ 3.628793] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=0 +Aug 31 22:50:24 minifree kernel: [ 3.628797] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:50:24 minifree kernel: [ 3.633141] md: multipath personality registered for level -4 +Aug 31 22:50:24 minifree kernel: [ 3.638092] md: raid0 personality registered for level 0 +Aug 31 22:50:24 minifree kernel: [ 3.643718] md: raid1 personality registered for level 1 +Aug 31 22:50:24 minifree kernel: [ 3.716024] raid6: sse2x1 2266 MB/s +Aug 31 22:50:24 minifree kernel: [ 3.784028] raid6: sse2x2 4053 MB/s +Aug 31 22:50:24 minifree kernel: [ 3.852032] raid6: sse2x4 4547 MB/s +Aug 31 22:50:24 minifree kernel: [ 3.852036] raid6: using algorithm sse2x4 (4547 MB/s) +Aug 31 22:50:24 minifree kernel: [ 3.852038] raid6: using ssse3x2 recovery algorithm +Aug 31 22:50:24 minifree kernel: [ 3.854266] xor: measuring software checksum speed +Aug 31 22:50:24 minifree kernel: [ 3.892019] prefetch64-sse: 6047.000 MB/sec +Aug 31 22:50:24 minifree kernel: [ 3.932018] generic_sse: 5363.000 MB/sec +Aug 31 22:50:24 minifree kernel: [ 3.932021] xor: using function: prefetch64-sse (6047.000 MB/sec) +Aug 31 22:50:24 minifree kernel: [ 3.934078] async_tx: api initialized (async) +Aug 31 22:50:24 minifree kernel: [ 3.946437] md: raid6 personality registered for level 6 +Aug 31 22:50:24 minifree kernel: [ 3.946441] md: raid5 personality registered for level 5 +Aug 31 22:50:24 minifree kernel: [ 3.946444] md: raid4 personality registered for level 4 +Aug 31 22:50:24 minifree kernel: [ 3.957827] md: raid10 personality registered for level 10 +Aug 31 22:50:24 minifree kernel: [ 9.243505] random: cryptsetup urandom read with 119 bits of entropy available +Aug 31 22:50:24 minifree kernel: [ 9.246108] random: nonblocking pool is initialized +Aug 31 22:50:24 minifree kernel: [ 9.266100] bio: create slab <bio-1> at 1 +Aug 31 22:50:24 minifree kernel: [ 9.513079] bio: create slab <bio-1> at 1 +Aug 31 22:50:24 minifree kernel: [ 10.331147] bio: create slab <bio-2> at 2 +Aug 31 22:50:24 minifree kernel: [ 10.332723] Btrfs loaded +Aug 31 22:50:24 minifree kernel: [ 11.808132] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:50:24 minifree kernel: [ 15.403838] EXT4-fs (dm-1): INFO: recovery required on readonly filesystem +Aug 31 22:50:24 minifree kernel: [ 15.403844] EXT4-fs (dm-1): write access will be enabled during recovery +Aug 31 22:50:24 minifree kernel: [ 17.127673] EXT4-fs (dm-1): orphan cleanup on readonly fs +Aug 31 22:50:24 minifree kernel: [ 17.127796] EXT4-fs (dm-1): 1 orphan inode deleted +Aug 31 22:50:24 minifree kernel: [ 17.127800] EXT4-fs (dm-1): recovery complete +Aug 31 22:50:24 minifree kernel: [ 17.216730] EXT4-fs (dm-1): mounted filesystem with ordered data mode. Opts: (null) +Aug 31 22:50:24 minifree kernel: [ 21.824056] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:50:24 minifree kernel: [ 28.044685] EXT4-fs (dm-1): re-mounted. Opts: errors=remount-ro +Aug 31 22:50:24 minifree kernel: [ 29.253227] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +Aug 31 22:50:24 minifree kernel: [ 29.727869] lp: driver loaded but no devices found +Aug 31 22:50:24 minifree kernel: [ 29.764157] ppdev: user-space parallel port driver +Aug 31 22:50:24 minifree kernel: [ 30.065222] type=1400 audit(1409521824.544:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/cups/backend/cups-pdf" pid=647 comm="apparmor_parser" +Aug 31 22:50:24 minifree kernel: [ 30.065234] type=1400 audit(1409521824.544:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/sbin/cupsd" pid=647 comm="apparmor_parser" +Aug 31 22:50:24 minifree kernel: [ 30.065934] type=1400 audit(1409521824.544:4): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=647 comm="apparmor_parser" +Aug 31 22:50:24 minifree kernel: [ 30.182531] Bluetooth: Core ver 2.17 +Aug 31 22:50:24 minifree kernel: [ 30.184399] NET: Registered protocol family 31 +Aug 31 22:50:24 minifree kernel: [ 30.184403] Bluetooth: HCI device and connection manager initialized +Aug 31 22:50:24 minifree kernel: [ 30.184417] Bluetooth: HCI socket layer initialized +Aug 31 22:50:24 minifree kernel: [ 30.184422] Bluetooth: L2CAP socket layer initialized +Aug 31 22:50:24 minifree kernel: [ 30.184430] Bluetooth: SCO socket layer initialized +Aug 31 22:50:24 minifree kernel: [ 30.216147] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 +Aug 31 22:50:24 minifree kernel: [ 30.216153] Bluetooth: BNEP filters: protocol multicast +Aug 31 22:50:24 minifree kernel: [ 30.216167] Bluetooth: BNEP socket layer initialized +Aug 31 22:50:24 minifree kernel: [ 30.217692] Bluetooth: RFCOMM TTY layer initialized +Aug 31 22:50:24 minifree kernel: [ 30.217701] Bluetooth: RFCOMM socket layer initialized +Aug 31 22:50:24 minifree kernel: [ 30.217712] Bluetooth: RFCOMM ver 1.11 +Aug 31 22:50:24 minifree kernel: [ 30.227989] intel_rng: FWH not detected +Aug 31 22:50:24 minifree kernel: [ 30.348498] ACPI Warning: 0x0000000000000528-0x000000000000052f SystemIO conflicts with Region \PMIO 1 (20131115/utaddress-251) +Aug 31 22:50:24 minifree kernel: [ 30.348510] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +Aug 31 22:50:24 minifree kernel: [ 30.348517] ACPI Warning: 0x00000000000004b0-0x00000000000004bf SystemIO conflicts with Region \GPIO 1 (20131115/utaddress-251) +Aug 31 22:50:24 minifree kernel: [ 30.348522] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +Aug 31 22:50:24 minifree kernel: [ 30.348525] ACPI Warning: 0x0000000000000480-0x00000000000004af SystemIO conflicts with Region \GPIO 1 (20131115/utaddress-251) +Aug 31 22:50:24 minifree kernel: [ 30.348530] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +Aug 31 22:50:24 minifree kernel: [ 30.348533] lpc_ich: Resource conflict(s) found affecting gpio_ich +Aug 31 22:50:24 minifree kernel: [ 30.372503] leds_ss4200: no LED devices found +Aug 31 22:50:24 minifree kernel: [ 30.372824] yenta_cardbus 0000:05:00.0: CardBus bridge found [0000:0000] +Aug 31 22:50:24 minifree kernel: [ 30.493456] type=1400 audit(1409521824.972:5): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/sbin/dhclient" pid=696 comm="apparmor_parser" +Aug 31 22:50:24 minifree kernel: [ 30.493470] type=1400 audit(1409521824.972:6): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=696 comm="apparmor_parser" +Aug 31 22:50:24 minifree kernel: [ 30.493478] type=1400 audit(1409521824.972:7): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=696 comm="apparmor_parser" +Aug 31 22:50:24 minifree kernel: [ 30.496483] type=1400 audit(1409521824.976:8): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=696 comm="apparmor_parser" +Aug 31 22:50:24 minifree kernel: [ 30.496497] type=1400 audit(1409521824.976:9): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=696 comm="apparmor_parser" +Aug 31 22:50:24 minifree kernel: [ 30.496998] type=1400 audit(1409521824.976:10): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=696 comm="apparmor_parser" +Aug 31 22:50:24 minifree kernel: [ 30.501113] yenta_cardbus 0000:05:00.0: ISA IRQ mask 0x0cb8, PCI irq 16 +Aug 31 22:50:24 minifree kernel: [ 30.501120] yenta_cardbus 0000:05:00.0: Socket status: 30000006 +Aug 31 22:50:24 minifree kernel: [ 30.501126] pci_bus 0000:05: Raising subordinate bus# of parent bus (#05) from #06 to #09 +Aug 31 22:50:24 minifree kernel: [ 30.501295] yenta_cardbus 0000:05:00.0: pcmcia: parent PCI bridge window: [io 0x2000-0x3fff] +Aug 31 22:50:24 minifree kernel: [ 30.501300] yenta_cardbus 0000:05:00.0: pcmcia: parent PCI bridge window: [mem 0xe0000000-0xe20fffff] +Aug 31 22:50:24 minifree kernel: [ 30.501305] pcmcia_socket pcmcia_socket0: cs: memory probe 0xe0000000-0xe20fffff: +Aug 31 22:50:24 minifree kernel: [ 30.501318] excluding 0xe1ef0000-0xe20fffff +Aug 31 22:50:24 minifree kernel: [ 30.501325] yenta_cardbus 0000:05:00.0: pcmcia: parent PCI bridge window: [mem 0xe2100000-0xe40fffff 64bit pref] +Aug 31 22:50:24 minifree kernel: [ 30.501329] pcmcia_socket pcmcia_socket0: cs: memory probe 0xe2100000-0xe40fffff: +Aug 31 22:50:24 minifree kernel: [ 30.501411] excluding 0xe2100000-0xe40fffff +Aug 31 22:50:25 minifree kernel: [ 30.761785] e1000e 0000:01:00.0: irq 44 for MSI/MSI-X +Aug 31 22:50:25 minifree kernel: [ 30.772718] device-mapper: multipath: version 1.6.0 loaded +Aug 31 22:50:25 minifree kernel: [ 30.841196] Non-volatile memory driver v1.3 +Aug 31 22:50:25 minifree kernel: [ 30.846354] thinkpad_acpi: ThinkPad ACPI Extras v0.25 +Aug 31 22:50:25 minifree kernel: [ 30.846360] thinkpad_acpi: http://ibm-acpi.sf.net/ +Aug 31 22:50:25 minifree kernel: [ 30.846363] thinkpad_acpi: ThinkPad BIOS CBET4000 7BETC7WW (2.08 ), EC 7BHT37WW-3.4 +Aug 31 22:50:25 minifree kernel: [ 30.846365] thinkpad_acpi: Lenovo ThinkPad X60s, model 1702L8G +Aug 31 22:50:25 minifree kernel: [ 30.853545] thinkpad_acpi: detected a 8-level brightness capable ThinkPad +Aug 31 22:50:25 minifree kernel: [ 30.853591] thinkpad_acpi: This ThinkPad has standard ACPI backlight brightness control, supported by the ACPI video driver +Aug 31 22:50:25 minifree kernel: [ 30.853594] thinkpad_acpi: Disabling thinkpad-acpi brightness events by default... +Aug 31 22:50:25 minifree kernel: [ 30.864133] e1000e 0000:01:00.0: irq 44 for MSI/MSI-X +Aug 31 22:50:25 minifree kernel: [ 30.864654] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +Aug 31 22:50:25 minifree kernel: [ 30.904471] thinkpad_acpi: Standard ACPI backlight interface available, not loading native one +Aug 31 22:50:25 minifree kernel: [ 30.904716] thinkpad_acpi: Console audio control enabled, mode: monitor (read only) +Aug 31 22:50:25 minifree kernel: [ 30.917451] input: ThinkPad Extra Buttons as /devices/platform/thinkpad_acpi/input/input7 +Aug 31 22:50:25 minifree kernel: [ 31.070696] hda_intel: probe_mask set to 0x1 for device 17aa:2010 +Aug 31 22:50:25 minifree kernel: [ 31.070755] snd_hda_intel 0000:00:1b.0: irq 46 for MSI/MSI-X +Aug 31 22:50:25 minifree kernel: [ 31.221006] autoconfig: line_outs=1 (0x5/0x0/0x0/0x0/0x0) type:line +Aug 31 22:50:25 minifree kernel: [ 31.221013] speaker_outs=1 (0x7/0x0/0x0/0x0/0x0) +Aug 31 22:50:25 minifree kernel: [ 31.221016] hp_outs=1 (0x6/0x0/0x0/0x0/0x0) +Aug 31 22:50:25 minifree kernel: [ 31.221018] mono: mono_out=0x0 +Aug 31 22:50:25 minifree kernel: [ 31.221020] dig-out=0xa/0x0 +Aug 31 22:50:25 minifree kernel: [ 31.221022] inputs: +Aug 31 22:50:25 minifree kernel: [ 31.221073] Rear Mic=0x18 +Aug 31 22:50:25 minifree kernel: [ 31.221076] Front Mic=0x8 +Aug 31 22:50:25 minifree kernel: [ 31.221079] Line=0x9 +Aug 31 22:50:25 minifree kernel: [ 31.221081] CD=0x19 +Aug 31 22:50:25 minifree kernel: [ 31.221084] Aux=0x17 +Aug 31 22:50:25 minifree kernel: [ 31.306204] input: HDA Intel Front Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input12 +Aug 31 22:50:25 minifree kernel: [ 31.309615] input: HDA Intel Line Out as /devices/pci0000:00/0000:00:1b.0/sound/card0/input11 +Aug 31 22:50:25 minifree kernel: [ 31.312192] input: HDA Intel Line as /devices/pci0000:00/0000:00:1b.0/sound/card0/input10 +Aug 31 22:50:25 minifree kernel: [ 31.316499] input: HDA Intel Front Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input9 +Aug 31 22:50:25 minifree kernel: [ 31.316647] input: HDA Intel Rear Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input8 +Aug 31 22:50:25 minifree kernel: [ 31.491549] pcmcia_socket pcmcia_socket0: cs: memory probe 0x0c0000-0x0fffff: +Aug 31 22:50:25 minifree kernel: [ 31.491580] excluding 0xf0000-0xfffff +Aug 31 22:50:25 minifree kernel: [ 31.491611] pcmcia_socket pcmcia_socket0: cs: memory probe 0xa0000000-0xa0ffffff: +Aug 31 22:50:25 minifree kernel: [ 31.491646] clean. +Aug 31 22:50:25 minifree kernel: [ 31.491672] pcmcia_socket pcmcia_socket0: cs: memory probe 0x60000000-0x60ffffff: +Aug 31 22:50:25 minifree kernel: [ 31.491705] excluding 0x60000000-0x60ffffff +Aug 31 22:50:26 minifree kernel: [ 31.840110] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:50:36 minifree kernel: [ 41.856122] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:50:46 minifree kernel: [ 51.872113] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:50:54 minifree kernel: [ 60.227922] type=1400 audit(1409521854.704:11): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/cups/backend/cups-pdf" pid=1132 comm="apparmor_parser" +Aug 31 22:50:54 minifree kernel: [ 60.227937] type=1400 audit(1409521854.704:12): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=1132 comm="apparmor_parser" +Aug 31 22:50:54 minifree kernel: [ 60.228674] type=1400 audit(1409521854.708:13): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=1132 comm="apparmor_parser" +Aug 31 22:50:55 minifree kernel: [ 60.787283] type=1400 audit(1409521855.264:14): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/sbin/cups-browsed" pid=1143 comm="apparmor_parser" +Aug 31 22:50:56 minifree kernel: [ 61.888127] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:51:04 minifree kernel: [ 70.140147] usb 1-1: new high-speed USB device number 2 using ehci-pci +Aug 31 22:51:04 minifree kernel: [ 70.289002] usb 1-1: New USB device found, idVendor=0cf3, idProduct=9271 +Aug 31 22:51:04 minifree kernel: [ 70.289008] usb 1-1: New USB device strings: Mfr=16, Product=32, SerialNumber=48 +Aug 31 22:51:04 minifree kernel: [ 70.289012] usb 1-1: Product: UB93 +Aug 31 22:51:04 minifree kernel: [ 70.289015] usb 1-1: Manufacturer: ATHEROS +Aug 31 22:51:04 minifree kernel: [ 70.289019] usb 1-1: SerialNumber: 12345 +Aug 31 22:51:04 minifree kernel: [ 70.441093] cfg80211: Calling CRDA to update world regulatory domain +Aug 31 22:51:05 minifree kernel: [ 70.579584] cfg80211: World regulatory domain updated: +Aug 31 22:51:05 minifree kernel: [ 70.579590] cfg80211: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp) +Aug 31 22:51:05 minifree kernel: [ 70.579594] cfg80211: (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) +Aug 31 22:51:05 minifree kernel: [ 70.579598] cfg80211: (2457000 KHz - 2482000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) +Aug 31 22:51:05 minifree kernel: [ 70.579601] cfg80211: (2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) +Aug 31 22:51:05 minifree kernel: [ 70.579604] cfg80211: (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) +Aug 31 22:51:05 minifree kernel: [ 70.579607] cfg80211: (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) +Aug 31 22:51:05 minifree kernel: [ 70.613130] usb 1-1: ath9k_htc: Firmware htc_9271.fw requested +Aug 31 22:51:05 minifree kernel: [ 70.613246] usbcore: registered new interface driver ath9k_htc +Aug 31 22:51:05 minifree kernel: [ 70.909647] usb 1-1: ath9k_htc: Transferred FW: htc_9271.fw, size: 50980 +Aug 31 22:51:05 minifree kernel: [ 71.150263] ath9k_htc 1-1:1.0: ath9k_htc: HTC initialized with 33 credits +Aug 31 22:51:05 minifree kernel: [ 71.418766] ath9k_htc 1-1:1.0: ath9k_htc: FW Version: 1.3 +Aug 31 22:51:05 minifree kernel: [ 71.418770] ath: EEPROM regdomain: 0x65 +Aug 31 22:51:05 minifree kernel: [ 71.418773] ath: EEPROM indicates we should expect a direct regpair map +Aug 31 22:51:05 minifree kernel: [ 71.418777] ath: Country alpha2 being used: 00 +Aug 31 22:51:05 minifree kernel: [ 71.418779] ath: Regpair used: 0x65 +Aug 31 22:51:05 minifree kernel: [ 71.460149] ieee80211 phy0: Atheros AR9271 Rev:1 +Aug 31 22:51:06 minifree kernel: [ 71.904067] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:51:14 minifree kernel: [ 79.945375] usb 1-1: USB disconnect, device number 2 +Aug 31 22:51:14 minifree kernel: [ 80.151202] usb 1-1: ath9k_htc: USB layer deinitialized +Aug 31 22:51:16 minifree kernel: [ 81.920129] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:51:26 minifree kernel: [ 91.936033] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:51:36 minifree kernel: [ 101.952108] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:51:46 minifree kernel: [ 111.968120] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:51:56 minifree kernel: [ 121.984105] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:52:06 minifree kernel: [ 132.000103] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:52:16 minifree kernel: [ 142.016108] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:52:23 minifree kernel: [ 149.297093] e1000e: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx +Aug 31 22:52:23 minifree kernel: [ 149.297248] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +Aug 31 22:52:25 minifree kernel: [ 151.489247] type=1400 audit(1409521945.968:15): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/sbin/dhclient" pid=1314 comm="apparmor_parser" +Aug 31 22:52:25 minifree kernel: [ 151.489262] type=1400 audit(1409521945.968:16): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=1314 comm="apparmor_parser" +Aug 31 22:52:25 minifree kernel: [ 151.489271] type=1400 audit(1409521945.968:17): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=1314 comm="apparmor_parser" +Aug 31 22:52:25 minifree kernel: [ 151.490046] type=1400 audit(1409521945.968:18): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=1314 comm="apparmor_parser" +Aug 31 22:52:25 minifree kernel: [ 151.490055] type=1400 audit(1409521945.968:19): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=1314 comm="apparmor_parser" +Aug 31 22:52:25 minifree kernel: [ 151.490416] type=1400 audit(1409521945.968:20): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=1314 comm="apparmor_parser" +Aug 31 22:52:25 minifree kernel: [ 151.495908] type=1400 audit(1409521945.972:21): apparmor="STATUS" operation="profile_load" profile="unconfined" name="system_tor" pid=1315 comm="apparmor_parser" +Aug 31 22:52:25 minifree kernel: [ 151.500387] type=1400 audit(1409521945.980:22): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/lightdm/lightdm-guest-session" pid=1313 comm="apparmor_parser" +Aug 31 22:52:25 minifree kernel: [ 151.500398] type=1400 audit(1409521945.980:23): apparmor="STATUS" operation="profile_load" profile="unconfined" name="chromium" pid=1313 comm="apparmor_parser" +Aug 31 22:52:25 minifree kernel: [ 151.500825] type=1400 audit(1409521945.980:24): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="chromium" pid=1313 comm="apparmor_parser" +Aug 31 22:52:26 minifree kernel: [ 152.032044] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:52:27 minifree kernel: [ 153.407166] [drm:i915_gem_open], +Aug 31 22:52:28 minifree kernel: [ 154.128716] [drm:i915_gem_open], +Aug 31 22:52:28 minifree kernel: [ 154.128739] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +Aug 31 22:52:28 minifree kernel: [ 154.129127] [drm:i915_gem_open], +Aug 31 22:52:28 minifree kernel: [ 154.129142] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +Aug 31 22:52:28 minifree kernel: [ 154.129149] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +Aug 31 22:52:28 minifree kernel: [ 154.130884] [drm:drm_mode_addfb], [FB:35] +Aug 31 22:52:28 minifree kernel: [ 154.131523] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +Aug 31 22:52:28 minifree kernel: [ 154.131530] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[3] +Aug 31 22:52:28 minifree kernel: [ 154.131585] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:28 minifree kernel: [ 154.131595] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:28 minifree kernel: [ 154.131939] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:52:28 minifree kernel: [ 154.131949] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:52:28 minifree kernel: [ 154.131987] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:52:28 minifree kernel: [ 154.131996] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:52:28 minifree kernel: [ 154.256944] [drm:drm_mode_addfb], [FB:35] +Aug 31 22:52:28 minifree kernel: [ 154.256966] [drm:drm_mode_setcrtc], [CRTC:4] +Aug 31 22:52:28 minifree kernel: [ 154.256976] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:28 minifree kernel: [ 154.256980] [drm:intel_crtc_set_config], [CRTC:4] [FB:35] #connectors=1 (x y) (0 0) +Aug 31 22:52:28 minifree kernel: [ 154.256986] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:4], mode_changed=0, fb_changed=1 +Aug 31 22:52:28 minifree kernel: [ 154.256991] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] +Aug 31 22:52:28 minifree kernel: [ 154.258670] [drm:i9xx_update_plane], Writing base 00800000 00000000 0 0 4096 +Aug 31 22:52:32 minifree kernel: [ 158.275793] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:32 minifree kernel: [ 158.275804] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:32 minifree kernel: [ 158.275809] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:32 minifree kernel: [ 158.275832] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +Aug 31 22:52:32 minifree kernel: [ 158.275836] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:52:32 minifree kernel: [ 158.275841] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:32 minifree kernel: [ 158.275846] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:32 minifree kernel: [ 158.275851] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +Aug 31 22:52:32 minifree kernel: [ 158.275856] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +Aug 31 22:52:32 minifree kernel: [ 158.275865] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:32 minifree kernel: [ 158.276430] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:52:32 minifree kernel: [ 158.276435] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:52:32 minifree kernel: [ 158.276439] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:52:32 minifree kernel: [ 158.288160] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:52:32 minifree kernel: [ 158.292045] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:52:32 minifree kernel: [ 158.292055] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:32 minifree kernel: [ 158.292059] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:52:32 minifree kernel: [ 158.292062] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:52:32 minifree kernel: [ 158.292346] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:32 minifree kernel: [ 158.292349] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:52:32 minifree kernel: [ 158.292352] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:52:32 minifree kernel: [ 158.292358] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:52:32 minifree kernel: [ 158.292396] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:52:32 minifree kernel: [ 158.292401] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:32 minifree kernel: [ 158.292404] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:52:32 minifree kernel: [ 158.292410] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:32 minifree kernel: [ 158.292414] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:52:32 minifree kernel: [ 158.292433] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:52:32 minifree kernel: [ 158.292439] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:52:32 minifree kernel: [ 158.292443] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:52:32 minifree kernel: [ 158.292447] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:52:32 minifree kernel: [ 158.292450] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:52:32 minifree kernel: [ 158.292454] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:52:32 minifree kernel: [ 158.292457] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:52:32 minifree kernel: [ 158.292459] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:32 minifree kernel: [ 158.292463] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:32 minifree kernel: [ 158.292467] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:52:32 minifree kernel: [ 158.292469] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:32 minifree kernel: [ 158.292475] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:52:32 minifree kernel: [ 158.292477] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:32 minifree kernel: [ 158.292482] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:52:32 minifree kernel: [ 158.292486] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:52:32 minifree kernel: [ 158.292489] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:52:32 minifree kernel: [ 158.292492] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:52:32 minifree kernel: [ 158.292495] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:52:32 minifree kernel: [ 158.292499] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:52:32 minifree kernel: [ 158.292501] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:52:32 minifree kernel: [ 158.300167] [drm:i9xx_update_plane], Writing base 00C00000 00000000 0 0 5120 +Aug 31 22:52:32 minifree kernel: [ 158.300181] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:52:32 minifree kernel: [ 158.305816] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:32 minifree kernel: [ 158.305823] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:32 minifree kernel: [ 158.305825] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:32 minifree kernel: [ 158.305828] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:32 minifree kernel: [ 158.305832] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:52:32 minifree kernel: [ 158.305834] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:52:32 minifree kernel: [ 158.305837] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:52:32 minifree kernel: [ 158.305840] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:52:32 minifree kernel: [ 158.305844] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:52:32 minifree kernel: [ 158.324056] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:32 minifree kernel: [ 158.324066] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:32 minifree kernel: [ 158.324071] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:32 minifree kernel: [ 158.324074] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:32 minifree kernel: [ 158.324078] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:32 minifree kernel: [ 158.324081] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:32 minifree kernel: [ 158.324093] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:32 minifree kernel: [ 158.376040] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:52:32 minifree kernel: [ 158.376049] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:52:32 minifree kernel: [ 158.392042] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:32 minifree kernel: [ 158.392052] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:52:32 minifree kernel: [ 158.433012] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:32 minifree kernel: [ 158.433022] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:32 minifree kernel: [ 158.433025] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:32 minifree kernel: [ 158.433028] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:32 minifree kernel: [ 158.433031] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:52:32 minifree kernel: [ 158.433034] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:52:32 minifree kernel: [ 158.433037] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:52:32 minifree kernel: [ 158.433041] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:52:32 minifree kernel: [ 158.433052] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:32 minifree kernel: [ 158.433058] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:32 minifree kernel: [ 158.433061] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:32 minifree kernel: [ 158.433065] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:32 minifree kernel: [ 158.433068] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:32 minifree kernel: [ 158.433072] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:32 minifree kernel: [ 158.433226] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:52:33 minifree kernel: [ 158.887022] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:33 minifree kernel: [ 158.887071] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:52:33 minifree kernel: [ 158.887077] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:33 minifree kernel: [ 158.887081] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:52:33 minifree kernel: [ 158.887098] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:52:33 minifree kernel: [ 158.887104] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:52:33 minifree kernel: [ 158.887108] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:52:33 minifree kernel: [ 158.887112] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:52:33 minifree kernel: [ 158.887115] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:52:33 minifree kernel: [ 158.887118] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:52:33 minifree kernel: [ 158.887121] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:52:33 minifree kernel: [ 158.887124] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:33 minifree kernel: [ 158.887128] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:33 minifree kernel: [ 158.887131] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:52:33 minifree kernel: [ 158.887134] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:33 minifree kernel: [ 158.887139] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:52:33 minifree kernel: [ 158.887142] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:33 minifree kernel: [ 158.887147] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:52:33 minifree kernel: [ 158.887151] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:52:33 minifree kernel: [ 158.887154] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:52:33 minifree kernel: [ 158.887157] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:52:33 minifree kernel: [ 158.887160] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:52:33 minifree kernel: [ 158.887164] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:52:33 minifree kernel: [ 158.887167] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:52:33 minifree kernel: [ 158.895657] [drm:i9xx_update_plane], Writing base 00C00000 00000000 0 0 5120 +Aug 31 22:52:33 minifree kernel: [ 158.895671] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:52:33 minifree kernel: [ 158.901303] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:33 minifree kernel: [ 158.901308] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:33 minifree kernel: [ 158.901310] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:33 minifree kernel: [ 158.901313] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:33 minifree kernel: [ 158.901317] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:52:33 minifree kernel: [ 158.901319] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:52:33 minifree kernel: [ 158.901322] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:52:33 minifree kernel: [ 158.901325] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:52:33 minifree kernel: [ 158.901328] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:52:33 minifree kernel: [ 158.924049] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:33 minifree kernel: [ 158.924061] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:33 minifree kernel: [ 158.924065] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:33 minifree kernel: [ 158.924069] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:33 minifree kernel: [ 158.924072] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:33 minifree kernel: [ 158.924076] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:33 minifree kernel: [ 158.924086] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:33 minifree kernel: [ 158.964043] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:52:33 minifree kernel: [ 158.964051] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:52:33 minifree kernel: [ 158.984046] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:33 minifree kernel: [ 158.984058] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:52:33 minifree kernel: [ 159.033005] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:33 minifree kernel: [ 159.033015] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:33 minifree kernel: [ 159.033018] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:33 minifree kernel: [ 159.033021] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:33 minifree kernel: [ 159.033025] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:52:33 minifree kernel: [ 159.033028] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:52:33 minifree kernel: [ 159.033031] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:52:33 minifree kernel: [ 159.033035] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:52:33 minifree kernel: [ 159.033047] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:33 minifree kernel: [ 159.033053] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:33 minifree kernel: [ 159.033057] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:33 minifree kernel: [ 159.033060] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:33 minifree kernel: [ 159.033064] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:33 minifree kernel: [ 159.033067] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:33 minifree kernel: [ 159.034333] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:52:33 minifree kernel: [ 159.056046] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:52:33 minifree kernel: [ 159.060079] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:52:33 minifree kernel: [ 159.060087] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:33 minifree kernel: [ 159.060091] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:52:33 minifree kernel: [ 159.060094] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:52:33 minifree kernel: [ 159.060374] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:33 minifree kernel: [ 159.060377] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:52:33 minifree kernel: [ 159.060380] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:52:36 minifree kernel: [ 162.048052] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:52:43 minifree kernel: [ 168.846014] [drm:i915_gem_open], +Aug 31 22:52:43 minifree kernel: [ 169.194795] [drm:i915_gem_open], +Aug 31 22:52:43 minifree kernel: [ 169.249719] [drm:i915_gem_open], +Aug 31 22:52:43 minifree kernel: [ 169.283957] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:43 minifree kernel: [ 169.283968] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:43 minifree kernel: [ 169.283973] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:43 minifree kernel: [ 169.283995] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +Aug 31 22:52:43 minifree kernel: [ 169.284035] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:52:43 minifree kernel: [ 169.284041] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:43 minifree kernel: [ 169.284046] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:43 minifree kernel: [ 169.284051] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +Aug 31 22:52:43 minifree kernel: [ 169.284055] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +Aug 31 22:52:43 minifree kernel: [ 169.284065] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:43 minifree kernel: [ 169.284300] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:52:43 minifree kernel: [ 169.284305] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:52:43 minifree kernel: [ 169.284308] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:52:43 minifree kernel: [ 169.300132] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:52:43 minifree kernel: [ 169.304126] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:52:43 minifree kernel: [ 169.304134] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:43 minifree kernel: [ 169.304138] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:52:43 minifree kernel: [ 169.304142] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:52:43 minifree kernel: [ 169.304438] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:43 minifree kernel: [ 169.304441] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:52:43 minifree kernel: [ 169.304445] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:52:43 minifree kernel: [ 169.304449] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:52:43 minifree kernel: [ 169.304503] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:52:43 minifree kernel: [ 169.304508] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:43 minifree kernel: [ 169.304512] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:52:43 minifree kernel: [ 169.304516] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:43 minifree kernel: [ 169.304521] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:52:43 minifree kernel: [ 169.304535] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:52:43 minifree kernel: [ 169.304541] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:52:43 minifree kernel: [ 169.304544] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:52:43 minifree kernel: [ 169.304548] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:52:43 minifree kernel: [ 169.304551] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:52:43 minifree kernel: [ 169.304554] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:52:43 minifree kernel: [ 169.304557] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:52:43 minifree kernel: [ 169.304560] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:43 minifree kernel: [ 169.304563] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:43 minifree kernel: [ 169.304567] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:52:43 minifree kernel: [ 169.304569] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:43 minifree kernel: [ 169.304575] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:52:43 minifree kernel: [ 169.304577] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:43 minifree kernel: [ 169.304582] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:52:43 minifree kernel: [ 169.304586] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:52:43 minifree kernel: [ 169.304589] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:52:43 minifree kernel: [ 169.304592] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:52:43 minifree kernel: [ 169.304595] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:52:43 minifree kernel: [ 169.304599] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:52:43 minifree kernel: [ 169.304601] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:52:43 minifree kernel: [ 169.312528] [drm:i9xx_update_plane], Writing base 02800000 00000000 0 0 5120 +Aug 31 22:52:43 minifree kernel: [ 169.312539] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:52:43 minifree kernel: [ 169.318168] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:43 minifree kernel: [ 169.318172] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:43 minifree kernel: [ 169.318175] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:43 minifree kernel: [ 169.318178] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:43 minifree kernel: [ 169.318181] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:52:43 minifree kernel: [ 169.318184] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:52:43 minifree kernel: [ 169.318187] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:52:43 minifree kernel: [ 169.318190] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:52:43 minifree kernel: [ 169.318193] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:52:43 minifree kernel: [ 169.340052] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:43 minifree kernel: [ 169.340063] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:43 minifree kernel: [ 169.340070] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:43 minifree kernel: [ 169.340075] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:43 minifree kernel: [ 169.340080] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:43 minifree kernel: [ 169.340085] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:43 minifree kernel: [ 169.340098] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:43 minifree kernel: [ 169.380054] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:52:43 minifree kernel: [ 169.380062] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:52:43 minifree kernel: [ 169.424049] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:43 minifree kernel: [ 169.424058] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:52:43 minifree kernel: [ 169.465004] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:43 minifree kernel: [ 169.465012] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:43 minifree kernel: [ 169.465015] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:43 minifree kernel: [ 169.465018] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:43 minifree kernel: [ 169.465021] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:52:43 minifree kernel: [ 169.465025] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:52:43 minifree kernel: [ 169.465028] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:52:43 minifree kernel: [ 169.465031] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:52:43 minifree kernel: [ 169.465043] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:43 minifree kernel: [ 169.465048] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:43 minifree kernel: [ 169.465052] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:43 minifree kernel: [ 169.465055] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:43 minifree kernel: [ 169.465059] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:43 minifree kernel: [ 169.465062] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:43 minifree kernel: [ 169.465213] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:52:44 minifree kernel: [ 169.535204] [drm:intel_crtc_cursor_set], cursor off +Aug 31 22:52:44 minifree kernel: [ 169.646187] [drm:intel_crtc_cursor_set], cursor off +Aug 31 22:52:44 minifree kernel: [ 170.257502] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:44 minifree kernel: [ 170.257514] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:44 minifree kernel: [ 170.257520] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:44 minifree kernel: [ 170.257543] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +Aug 31 22:52:44 minifree kernel: [ 170.257547] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:52:44 minifree kernel: [ 170.257553] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:44 minifree kernel: [ 170.257558] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:44 minifree kernel: [ 170.257563] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +Aug 31 22:52:44 minifree kernel: [ 170.257568] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +Aug 31 22:52:44 minifree kernel: [ 170.257576] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:44 minifree kernel: [ 170.257806] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:52:44 minifree kernel: [ 170.257811] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:52:44 minifree kernel: [ 170.257815] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:52:44 minifree kernel: [ 170.272041] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:52:44 minifree kernel: [ 170.276070] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:52:44 minifree kernel: [ 170.276077] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:44 minifree kernel: [ 170.276080] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:52:44 minifree kernel: [ 170.276083] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:52:44 minifree kernel: [ 170.276360] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:44 minifree kernel: [ 170.276363] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:52:44 minifree kernel: [ 170.276366] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:52:44 minifree kernel: [ 170.276370] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:52:44 minifree kernel: [ 170.276393] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:52:44 minifree kernel: [ 170.276397] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:44 minifree kernel: [ 170.276401] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:52:44 minifree kernel: [ 170.276405] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:44 minifree kernel: [ 170.276410] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:52:44 minifree kernel: [ 170.276424] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:52:44 minifree kernel: [ 170.276430] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:52:44 minifree kernel: [ 170.276433] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:52:44 minifree kernel: [ 170.276437] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:52:44 minifree kernel: [ 170.276440] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:52:44 minifree kernel: [ 170.276443] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:52:44 minifree kernel: [ 170.276446] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:52:44 minifree kernel: [ 170.276449] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:44 minifree kernel: [ 170.276453] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:44 minifree kernel: [ 170.276456] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:52:44 minifree kernel: [ 170.276459] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:44 minifree kernel: [ 170.276464] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:52:44 minifree kernel: [ 170.276467] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:44 minifree kernel: [ 170.276472] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:52:44 minifree kernel: [ 170.276476] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:52:44 minifree kernel: [ 170.276479] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:52:44 minifree kernel: [ 170.276482] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:52:44 minifree kernel: [ 170.276485] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:52:44 minifree kernel: [ 170.276488] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:52:44 minifree kernel: [ 170.276491] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:52:44 minifree kernel: [ 170.283303] [drm:i9xx_update_plane], Writing base 02800000 00000000 0 0 5120 +Aug 31 22:52:44 minifree kernel: [ 170.283314] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:52:44 minifree kernel: [ 170.288947] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:44 minifree kernel: [ 170.288952] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:44 minifree kernel: [ 170.288954] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:44 minifree kernel: [ 170.288958] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:44 minifree kernel: [ 170.288961] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:52:44 minifree kernel: [ 170.288963] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:52:44 minifree kernel: [ 170.288966] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:52:44 minifree kernel: [ 170.288969] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:52:44 minifree kernel: [ 170.288972] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:52:44 minifree kernel: [ 170.328052] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:44 minifree kernel: [ 170.328061] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:44 minifree kernel: [ 170.328066] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:44 minifree kernel: [ 170.328069] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:44 minifree kernel: [ 170.328073] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:44 minifree kernel: [ 170.328076] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:44 minifree kernel: [ 170.328087] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:44 minifree kernel: [ 170.368047] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:52:44 minifree kernel: [ 170.368054] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:52:44 minifree kernel: [ 170.384041] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:44 minifree kernel: [ 170.384048] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:52:44 minifree kernel: [ 170.429004] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:44 minifree kernel: [ 170.429010] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:44 minifree kernel: [ 170.429013] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:44 minifree kernel: [ 170.429016] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:44 minifree kernel: [ 170.429020] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:52:44 minifree kernel: [ 170.429023] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:52:44 minifree kernel: [ 170.429026] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:52:44 minifree kernel: [ 170.429029] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:52:44 minifree kernel: [ 170.429043] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:44 minifree kernel: [ 170.429048] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:44 minifree kernel: [ 170.429052] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:44 minifree kernel: [ 170.429055] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:44 minifree kernel: [ 170.429058] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:44 minifree kernel: [ 170.429062] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:44 minifree kernel: [ 170.429212] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:52:45 minifree kernel: [ 171.084188] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:45 minifree kernel: [ 171.084198] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:45 minifree kernel: [ 171.084203] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:45 minifree kernel: [ 171.084225] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +Aug 31 22:52:45 minifree kernel: [ 171.084229] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:52:45 minifree kernel: [ 171.084235] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:45 minifree kernel: [ 171.084240] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:45 minifree kernel: [ 171.084245] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +Aug 31 22:52:45 minifree kernel: [ 171.084249] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +Aug 31 22:52:45 minifree kernel: [ 171.084258] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:45 minifree kernel: [ 171.084505] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:52:45 minifree kernel: [ 171.084510] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:52:45 minifree kernel: [ 171.084514] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:52:45 minifree kernel: [ 171.100045] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:52:45 minifree kernel: [ 171.104195] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:52:45 minifree kernel: [ 171.104204] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:45 minifree kernel: [ 171.104207] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:52:45 minifree kernel: [ 171.104210] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:52:45 minifree kernel: [ 171.104487] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:45 minifree kernel: [ 171.104490] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:52:45 minifree kernel: [ 171.104494] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:52:45 minifree kernel: [ 171.104498] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:52:45 minifree kernel: [ 171.104532] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:52:45 minifree kernel: [ 171.104537] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:45 minifree kernel: [ 171.104541] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:52:45 minifree kernel: [ 171.104546] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:45 minifree kernel: [ 171.104550] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:52:45 minifree kernel: [ 171.104568] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:52:45 minifree kernel: [ 171.104574] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:52:45 minifree kernel: [ 171.104577] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:52:45 minifree kernel: [ 171.104581] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:52:45 minifree kernel: [ 171.104584] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:52:45 minifree kernel: [ 171.104588] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:52:45 minifree kernel: [ 171.104590] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:52:45 minifree kernel: [ 171.104593] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:45 minifree kernel: [ 171.104597] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:45 minifree kernel: [ 171.104600] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:52:45 minifree kernel: [ 171.104603] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:45 minifree kernel: [ 171.104608] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:52:45 minifree kernel: [ 171.104611] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:45 minifree kernel: [ 171.104616] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:52:45 minifree kernel: [ 171.104620] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:52:45 minifree kernel: [ 171.104623] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:52:45 minifree kernel: [ 171.104626] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:52:45 minifree kernel: [ 171.104629] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:52:45 minifree kernel: [ 171.104633] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:52:45 minifree kernel: [ 171.104635] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:52:45 minifree kernel: [ 171.113463] [drm:i9xx_update_plane], Writing base 02800000 00000000 0 0 5120 +Aug 31 22:52:45 minifree kernel: [ 171.113476] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:52:45 minifree kernel: [ 171.119107] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:45 minifree kernel: [ 171.119112] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:45 minifree kernel: [ 171.119115] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:45 minifree kernel: [ 171.119118] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:45 minifree kernel: [ 171.119122] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:52:45 minifree kernel: [ 171.119124] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:52:45 minifree kernel: [ 171.119127] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:52:45 minifree kernel: [ 171.119130] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:52:45 minifree kernel: [ 171.119133] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:52:45 minifree kernel: [ 171.144051] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:45 minifree kernel: [ 171.144061] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:45 minifree kernel: [ 171.144065] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:45 minifree kernel: [ 171.144069] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:45 minifree kernel: [ 171.144073] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:45 minifree kernel: [ 171.144076] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:45 minifree kernel: [ 171.144087] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:45 minifree kernel: [ 171.212055] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:52:45 minifree kernel: [ 171.212063] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:52:45 minifree kernel: [ 171.228056] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:45 minifree kernel: [ 171.228066] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:52:45 minifree kernel: [ 171.269008] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:45 minifree kernel: [ 171.269017] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:45 minifree kernel: [ 171.269020] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:45 minifree kernel: [ 171.269023] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:45 minifree kernel: [ 171.269026] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:52:45 minifree kernel: [ 171.269029] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:52:45 minifree kernel: [ 171.269032] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:52:45 minifree kernel: [ 171.269036] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:52:45 minifree kernel: [ 171.271055] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:45 minifree kernel: [ 171.271062] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:45 minifree kernel: [ 171.271065] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:45 minifree kernel: [ 171.271069] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:45 minifree kernel: [ 171.271072] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:45 minifree kernel: [ 171.271076] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:45 minifree kernel: [ 171.271234] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:52:45 minifree kernel: [ 171.449390] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:45 minifree kernel: [ 171.449401] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:45 minifree kernel: [ 171.449406] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:45 minifree kernel: [ 171.449429] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +Aug 31 22:52:45 minifree kernel: [ 171.449433] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:52:45 minifree kernel: [ 171.449439] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:45 minifree kernel: [ 171.449444] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:45 minifree kernel: [ 171.449449] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +Aug 31 22:52:45 minifree kernel: [ 171.449453] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +Aug 31 22:52:45 minifree kernel: [ 171.449462] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:45 minifree kernel: [ 171.449715] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:52:45 minifree kernel: [ 171.449720] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:52:45 minifree kernel: [ 171.449724] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:52:45 minifree kernel: [ 171.464239] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:52:45 minifree kernel: [ 171.468039] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:52:45 minifree kernel: [ 171.468046] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:45 minifree kernel: [ 171.468050] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:52:45 minifree kernel: [ 171.468053] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:52:45 minifree kernel: [ 171.468335] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:45 minifree kernel: [ 171.468338] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:52:45 minifree kernel: [ 171.468341] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:52:45 minifree kernel: [ 171.468346] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:52:45 minifree kernel: [ 171.468379] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:52:45 minifree kernel: [ 171.468384] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:45 minifree kernel: [ 171.468388] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:52:45 minifree kernel: [ 171.468393] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:45 minifree kernel: [ 171.468397] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:52:45 minifree kernel: [ 171.468414] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:52:45 minifree kernel: [ 171.468420] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:52:45 minifree kernel: [ 171.468424] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:52:45 minifree kernel: [ 171.468427] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:52:45 minifree kernel: [ 171.468431] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:52:45 minifree kernel: [ 171.468434] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:52:45 minifree kernel: [ 171.468437] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:52:45 minifree kernel: [ 171.468440] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:45 minifree kernel: [ 171.468443] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:45 minifree kernel: [ 171.468447] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:52:45 minifree kernel: [ 171.468450] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:45 minifree kernel: [ 171.468455] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:52:45 minifree kernel: [ 171.468458] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:45 minifree kernel: [ 171.468462] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:52:45 minifree kernel: [ 171.468467] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:52:45 minifree kernel: [ 171.468469] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:52:45 minifree kernel: [ 171.468472] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:52:45 minifree kernel: [ 171.468476] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:52:45 minifree kernel: [ 171.468479] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:52:45 minifree kernel: [ 171.468482] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:52:45 minifree kernel: [ 171.475659] [drm:i9xx_update_plane], Writing base 02860000 00000000 0 0 5120 +Aug 31 22:52:45 minifree kernel: [ 171.475670] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:52:45 minifree kernel: [ 171.481311] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:45 minifree kernel: [ 171.481317] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:45 minifree kernel: [ 171.481320] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:45 minifree kernel: [ 171.481323] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:45 minifree kernel: [ 171.481326] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:52:45 minifree kernel: [ 171.481329] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:52:45 minifree kernel: [ 171.481331] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:52:45 minifree kernel: [ 171.481335] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:52:45 minifree kernel: [ 171.481338] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:52:45 minifree kernel: [ 171.504105] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:45 minifree kernel: [ 171.504115] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:45 minifree kernel: [ 171.504119] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:45 minifree kernel: [ 171.504123] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:45 minifree kernel: [ 171.504127] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:45 minifree kernel: [ 171.504130] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:45 minifree kernel: [ 171.504141] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:46 minifree kernel: [ 171.568041] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:52:46 minifree kernel: [ 171.568048] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:52:46 minifree kernel: [ 171.628046] [drm:intel_wait_for_vblank], vblank wait timed out +Aug 31 22:52:46 minifree kernel: [ 171.628054] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:46 minifree kernel: [ 171.628059] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:52:46 minifree kernel: [ 171.673007] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:46 minifree kernel: [ 171.673014] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:46 minifree kernel: [ 171.673017] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:46 minifree kernel: [ 171.673020] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:46 minifree kernel: [ 171.673023] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:52:46 minifree kernel: [ 171.673027] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:52:46 minifree kernel: [ 171.673029] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:52:46 minifree kernel: [ 171.673033] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:52:46 minifree kernel: [ 171.673133] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:46 minifree kernel: [ 171.673139] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:46 minifree kernel: [ 171.673143] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:46 minifree kernel: [ 171.673147] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:46 minifree kernel: [ 171.673151] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:46 minifree kernel: [ 171.673154] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:46 minifree kernel: [ 171.673361] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:52:46 minifree kernel: [ 171.676431] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:46 minifree kernel: [ 171.676439] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:46 minifree kernel: [ 171.676444] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:46 minifree kernel: [ 171.676465] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +Aug 31 22:52:46 minifree kernel: [ 171.676468] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:52:46 minifree kernel: [ 171.676474] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:46 minifree kernel: [ 171.676479] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:52:46 minifree kernel: [ 171.676483] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +Aug 31 22:52:46 minifree kernel: [ 171.676488] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +Aug 31 22:52:46 minifree kernel: [ 171.676497] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:52:46 minifree kernel: [ 171.676719] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:52:46 minifree kernel: [ 171.676724] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:52:46 minifree kernel: [ 171.676727] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:52:46 minifree kernel: [ 171.692056] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:52:46 minifree kernel: [ 171.697188] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:52:46 minifree kernel: [ 171.697197] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:46 minifree kernel: [ 171.697201] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:52:46 minifree kernel: [ 171.697203] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:52:46 minifree kernel: [ 171.697483] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:52:46 minifree kernel: [ 171.697486] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:52:46 minifree kernel: [ 171.697489] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:52:46 minifree kernel: [ 171.697494] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:52:46 minifree kernel: [ 171.697528] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:52:46 minifree kernel: [ 171.697534] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:46 minifree kernel: [ 171.697537] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:52:46 minifree kernel: [ 171.697542] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:46 minifree kernel: [ 171.697546] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:52:46 minifree kernel: [ 171.697564] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:52:46 minifree kernel: [ 171.697570] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:52:46 minifree kernel: [ 171.697574] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:52:46 minifree kernel: [ 171.697578] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:52:46 minifree kernel: [ 171.697581] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:52:46 minifree kernel: [ 171.697585] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:52:46 minifree kernel: [ 171.697588] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:52:46 minifree kernel: [ 171.697590] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:46 minifree kernel: [ 171.697594] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:52:46 minifree kernel: [ 171.697598] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:52:46 minifree kernel: [ 171.697600] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:46 minifree kernel: [ 171.697605] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:52:46 minifree kernel: [ 171.697608] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:52:46 minifree kernel: [ 171.697613] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:52:46 minifree kernel: [ 171.697617] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:52:46 minifree kernel: [ 171.697620] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:52:46 minifree kernel: [ 171.697623] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:52:46 minifree kernel: [ 171.697626] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:52:46 minifree kernel: [ 171.697629] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:52:46 minifree kernel: [ 171.697632] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:52:46 minifree kernel: [ 171.705575] [drm:i9xx_update_plane], Writing base 02860000 00000000 0 0 5120 +Aug 31 22:52:46 minifree kernel: [ 171.705587] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:52:46 minifree kernel: [ 171.711217] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:46 minifree kernel: [ 171.711221] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:46 minifree kernel: [ 171.711224] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:46 minifree kernel: [ 171.711227] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:46 minifree kernel: [ 171.711230] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:52:46 minifree kernel: [ 171.711233] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:52:46 minifree kernel: [ 171.711235] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:52:46 minifree kernel: [ 171.711239] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:52:46 minifree kernel: [ 171.711242] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:52:46 minifree kernel: [ 171.732081] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:46 minifree kernel: [ 171.732087] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:52:46 minifree kernel: [ 171.732091] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:46 minifree kernel: [ 171.732095] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:46 minifree kernel: [ 171.732098] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:46 minifree kernel: [ 171.732102] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:46 minifree kernel: [ 171.732112] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:46 minifree kernel: [ 171.772048] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:52:46 minifree kernel: [ 171.772053] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:52:46 minifree kernel: [ 171.788030] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:52:46 minifree kernel: [ 171.788036] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:52:46 minifree kernel: [ 171.837008] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:52:46 minifree kernel: [ 171.837016] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:52:46 minifree kernel: [ 171.837019] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:52:46 minifree kernel: [ 171.837022] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:52:46 minifree kernel: [ 171.837026] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:52:46 minifree kernel: [ 171.837029] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:52:46 minifree kernel: [ 171.837032] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:52:46 minifree kernel: [ 171.837035] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:52:46 minifree kernel: [ 171.837045] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:52:46 minifree kernel: [ 171.837050] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:52:46 minifree kernel: [ 171.837053] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:52:46 minifree kernel: [ 171.837057] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:52:46 minifree kernel: [ 171.837060] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:52:46 minifree kernel: [ 171.837064] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:52:46 minifree kernel: [ 171.837214] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:52:46 minifree kernel: [ 171.997747] [drm:drm_mode_addfb], [FB:34] +Aug 31 22:52:46 minifree kernel: [ 172.064040] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:52:56 minifree kernel: [ 182.080084] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:53:06 minifree kernel: [ 191.573667] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:53:06 minifree kernel: [ 191.573678] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] +Aug 31 22:53:06 minifree kernel: [ 191.573684] [drm:intel_lvds_detect], [CONNECTOR:5:LVDS-1] +Aug 31 22:53:06 minifree kernel: [ 191.573706] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : +Aug 31 22:53:06 minifree kernel: [ 191.573710] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x768" 50 54160 1024 1048 1184 1344 768 771 777 806 0x48 0xa +Aug 31 22:53:06 minifree kernel: [ 191.573715] [drm:drm_mode_debug_printmodeline], Modeline 12:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:53:06 minifree kernel: [ 191.573720] [drm:drm_mode_debug_printmodeline], Modeline 9:"1024x768" 40 43330 1024 1048 1184 1344 768 771 777 806 0x40 0xa +Aug 31 22:53:06 minifree kernel: [ 191.573725] [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 +Aug 31 22:53:06 minifree kernel: [ 191.573730] [drm:drm_mode_debug_printmodeline], Modeline 11:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa +Aug 31 22:53:06 minifree kernel: [ 191.573739] [drm:drm_mode_getconnector], [CONNECTOR:5:?] +Aug 31 22:53:06 minifree kernel: [ 191.573976] [drm:drm_mode_getconnector], [CONNECTOR:15:?] +Aug 31 22:53:06 minifree kernel: [ 191.573980] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] +Aug 31 22:53:06 minifree kernel: [ 191.573984] [drm:intel_crt_detect], [CONNECTOR:15:VGA-1] force=1 +Aug 31 22:53:06 minifree kernel: [ 191.596041] [drm:intel_crt_detect], CRT not detected via hotplug +Aug 31 22:53:06 minifree kernel: [ 191.600059] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) +Aug 31 22:53:06 minifree kernel: [ 191.600066] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:53:06 minifree kernel: [ 191.600070] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging +Aug 31 22:53:06 minifree kernel: [ 191.600072] [drm:intel_gmbus_force_bit], enabling bit-banging on i915 gmbus vga. force bit now 1 +Aug 31 22:53:06 minifree kernel: [ 191.600350] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga +Aug 31 22:53:06 minifree kernel: [ 191.600353] [drm:intel_gmbus_force_bit], disabling bit-banging on i915 gmbus vga. force bit now 0 +Aug 31 22:53:06 minifree kernel: [ 191.600356] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found] +Aug 31 22:53:06 minifree kernel: [ 191.600359] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:15:VGA-1] disconnected +Aug 31 22:53:06 minifree kernel: [ 191.600384] [drm:drm_mode_getconnector], [CONNECTOR:17:?] +Aug 31 22:53:06 minifree kernel: [ 191.600388] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:53:06 minifree kernel: [ 191.600392] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=1 +Aug 31 22:53:06 minifree kernel: [ 191.600397] [drm:intel_get_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:53:06 minifree kernel: [ 191.600401] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection +Aug 31 22:53:06 minifree kernel: [ 191.600417] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0 +Aug 31 22:53:06 minifree kernel: [ 191.600423] [drm:connected_sink_compute_bpp], [CONNECTOR:17:SVIDEO-1] checking for sink bpp constrains +Aug 31 22:53:06 minifree kernel: [ 191.600426] [drm:intel_tv_compute_config], forcing bpc to 8 for TV +Aug 31 22:53:06 minifree kernel: [ 191.600429] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0 +Aug 31 22:53:06 minifree kernel: [ 191.600433] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A +Aug 31 22:53:06 minifree kernel: [ 191.600436] [drm:intel_dump_pipe_config], cpu_transcoder: A +Aug 31 22:53:06 minifree kernel: [ 191.600439] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0 +Aug 31 22:53:06 minifree kernel: [ 191.600442] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:53:06 minifree kernel: [ 191.600445] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 +Aug 31 22:53:06 minifree kernel: [ 191.600449] [drm:intel_dump_pipe_config], requested mode: +Aug 31 22:53:06 minifree kernel: [ 191.600452] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:53:06 minifree kernel: [ 191.600457] [drm:intel_dump_pipe_config], adjusted mode: +Aug 31 22:53:06 minifree kernel: [ 191.600459] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0 +Aug 31 22:53:06 minifree kernel: [ 191.600464] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1368 1496 1712 1024 1027 1034 1104, type: 0x40 flags: 0x0 +Aug 31 22:53:06 minifree kernel: [ 191.600468] [drm:intel_dump_pipe_config], port clock: 108000 +Aug 31 22:53:06 minifree kernel: [ 191.600471] [drm:intel_dump_pipe_config], pipe src size: 1280x1024 +Aug 31 22:53:06 minifree kernel: [ 191.600474] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 +Aug 31 22:53:06 minifree kernel: [ 191.600477] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled +Aug 31 22:53:06 minifree kernel: [ 191.600481] [drm:intel_dump_pipe_config], ips: 0 +Aug 31 22:53:06 minifree kernel: [ 191.600484] [drm:intel_dump_pipe_config], double wide: 0 +Aug 31 22:53:06 minifree kernel: [ 191.607207] [drm:i9xx_update_plane], Writing base 05040000 00000000 0 0 5120 +Aug 31 22:53:06 minifree kernel: [ 191.607218] [drm:intel_crtc_mode_set], [ENCODER:18:TV-18] set [MODE:0:NTSC 480i] +Aug 31 22:53:06 minifree kernel: [ 191.612854] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:53:06 minifree kernel: [ 191.612859] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:53:06 minifree kernel: [ 191.612862] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:53:06 minifree kernel: [ 191.612865] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:53:06 minifree kernel: [ 191.612868] [drm:intel_calculate_wm], FIFO entries required for mode: 34 +Aug 31 22:53:06 minifree kernel: [ 191.612870] [drm:intel_calculate_wm], FIFO watermark level: -5 +Aug 31 22:53:06 minifree kernel: [ 191.612873] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 1 +Aug 31 22:53:06 minifree kernel: [ 191.612876] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 1, C: 2, SR 1 +Aug 31 22:53:06 minifree kernel: [ 191.612880] [drm:i9xx_update_wm], memory self refresh disabled +Aug 31 22:53:06 minifree kernel: [ 191.636051] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:53:06 minifree kernel: [ 191.636059] [drm:intel_connector_check_state], [CONNECTOR:17:SVIDEO-1] +Aug 31 22:53:06 minifree kernel: [ 191.636063] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:53:06 minifree kernel: [ 191.636066] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:53:06 minifree kernel: [ 191.636070] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:53:06 minifree kernel: [ 191.636073] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:53:06 minifree kernel: [ 191.636083] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:53:06 minifree kernel: [ 191.676047] [drm:intel_tv_detect_type], TV detected: c0007, 7f0000aa +Aug 31 22:53:06 minifree kernel: [ 191.676053] [drm:intel_tv_detect_type], Unrecognised TV connection +Aug 31 22:53:06 minifree kernel: [ 191.692041] [drm:intel_release_load_detect_pipe], [CONNECTOR:17:SVIDEO-1], [ENCODER:18:TV-18] +Aug 31 22:53:06 minifree kernel: [ 191.692047] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1 +Aug 31 22:53:06 minifree kernel: [ 191.745006] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28 +Aug 31 22:53:06 minifree kernel: [ 191.745014] [drm:intel_calculate_wm], FIFO entries required for mode: 17 +Aug 31 22:53:06 minifree kernel: [ 191.745017] [drm:intel_calculate_wm], FIFO watermark level: 9 +Aug 31 22:53:06 minifree kernel: [ 191.745020] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31 +Aug 31 22:53:06 minifree kernel: [ 191.745024] [drm:i9xx_update_wm], FIFO watermarks - A: 9, B: 29 +Aug 31 22:53:06 minifree kernel: [ 191.745027] [drm:i9xx_update_wm], self-refresh entries: 64 +Aug 31 22:53:06 minifree kernel: [ 191.745030] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 9, B: 29, C: 2, SR 63 +Aug 31 22:53:06 minifree kernel: [ 191.745034] [drm:i9xx_update_wm], memory self refresh enabled +Aug 31 22:53:06 minifree kernel: [ 191.745045] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] +Aug 31 22:53:06 minifree kernel: [ 191.745050] [drm:check_encoder_state], [ENCODER:6:LVDS-6] +Aug 31 22:53:06 minifree kernel: [ 191.745053] [drm:check_encoder_state], [ENCODER:16:DAC-16] +Aug 31 22:53:06 minifree kernel: [ 191.745057] [drm:check_encoder_state], [ENCODER:18:TV-18] +Aug 31 22:53:06 minifree kernel: [ 191.745060] [drm:check_crtc_state], [CRTC:3] +Aug 31 22:53:06 minifree kernel: [ 191.745064] [drm:check_crtc_state], [CRTC:4] +Aug 31 22:53:06 minifree kernel: [ 191.745217] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:17:SVIDEO-1] disconnected +Aug 31 22:53:06 minifree kernel: [ 192.096128] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:53:16 minifree kernel: [ 202.112100] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:53:26 minifree kernel: [ 212.128145] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:53:36 minifree kernel: [ 222.144192] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:53:46 minifree kernel: [ 232.160064] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 +Aug 31 22:53:56 minifree kernel: [ 242.176124] [drm:intel_tv_detect], [CONNECTOR:17:SVIDEO-1] force=0 diff --git a/docs/future/dumps/t500_x200_descriptor/descriptor_diff_t500_x200.txt b/docs/future/dumps/t500_x200_descriptor/descriptor_diff_t500_x200.txt new file mode 100644 index 00000000..f05f6859 --- /dev/null +++ b/docs/future/dumps/t500_x200_descriptor/descriptor_diff_t500_x200.txt @@ -0,0 +1,3366 @@ +--- mkdescriptor.c 2015-03-31 04:46:11.840747724 +0100 ++++ ../lbdev/libreboot/resources/utilities/ich9deblob/src/ich9gen/mkdescriptor.c 2015-03-26 16:55:12.243313103 +0000 +@@ -1,5 +1,19 @@ +-/* mkdescriptor.c: generated C code from ich9deblob */ +-/* .c source file for the descriptor-generating C code */ ++/* ++ * Copyright (C) 2014 Leah Rowe <info@minifree.org> ++ * ++ * This program is free software: you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation, either version 3 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see <http://www.gnu.org/licenses/>. ++ */ + + #include "mkdescriptor.h" + +@@ -35,7 +49,7 @@ + + /* Component Section Record */ + /* FLCOMP */ +- descriptorStruct.componentSection.flcomp.component1Density = 0x3; ++ descriptorStruct.componentSection.flcomp.component1Density = 0x4; + descriptorStruct.componentSection.flcomp.component2Density = 0x2; + descriptorStruct.componentSection.flcomp.reserved1 = 0x0; + descriptorStruct.componentSection.flcomp.reserved2 = 0x00; +@@ -65,7 +79,7 @@ + /* descriptorStruct.regionSection.flReg1.BASE = 0x0003; */ + descriptorStruct.regionSection.flReg1.BASE = (DESCRIPTORREGIONSIZE + GBEREGIONSIZE_8K) >> FLREGIONBITSHIFT; /* see ../descriptor/descriptor.c */ + descriptorStruct.regionSection.flReg1.reserved1 = 0x0; +- /* descriptorStruct.regionSection.flReg1.LIMIT = 0x03ff; */ ++ /* descriptorStruct.regionSection.flReg1.LIMIT = 0x07ff; */ + descriptorStruct.regionSection.flReg1.LIMIT = ((romSize >> FLREGIONBITSHIFT) - 1); /* see ../descriptor/descriptor.c */ + descriptorStruct.regionSection.flReg1.reserved2 = 0x0; + /* FLREG2 (ME) */ +@@ -177,3314 +191,25 @@ + descriptorStruct.mchStraps.mchStrap0.reserved2 = 0xff; + descriptorStruct.mchStraps.mchStrap0.reserved3 = 0xffff; + /* Padding */ +- descriptorStruct.mchStraps.padding[0] = 0xff; +- descriptorStruct.mchStraps.padding[1] = 0xff; +- descriptorStruct.mchStraps.padding[2] = 0xff; +- descriptorStruct.mchStraps.padding[3] = 0xff; +- descriptorStruct.mchStraps.padding[4] = 0xff; +- descriptorStruct.mchStraps.padding[5] = 0xff; +- descriptorStruct.mchStraps.padding[6] = 0xff; +- descriptorStruct.mchStraps.padding[7] = 0xff; +- descriptorStruct.mchStraps.padding[8] = 0xff; +- descriptorStruct.mchStraps.padding[9] = 0xff; +- descriptorStruct.mchStraps.padding[10] = 0xff; +- descriptorStruct.mchStraps.padding[11] = 0xff; +- descriptorStruct.mchStraps.padding[12] = 0xff; +- descriptorStruct.mchStraps.padding[13] = 0xff; +- descriptorStruct.mchStraps.padding[14] = 0xff; +- descriptorStruct.mchStraps.padding[15] = 0xff; +- descriptorStruct.mchStraps.padding[16] = 0xff; +- descriptorStruct.mchStraps.padding[17] = 0xff; +- descriptorStruct.mchStraps.padding[18] = 0xff; +- descriptorStruct.mchStraps.padding[19] = 0xff; +- descriptorStruct.mchStraps.padding[20] = 0xff; +- descriptorStruct.mchStraps.padding[21] = 0xff; +- descriptorStruct.mchStraps.padding[22] = 0xff; +- descriptorStruct.mchStraps.padding[23] = 0xff; +- descriptorStruct.mchStraps.padding[24] = 0xff; +- descriptorStruct.mchStraps.padding[25] = 0xff; +- descriptorStruct.mchStraps.padding[26] = 0xff; +- descriptorStruct.mchStraps.padding[27] = 0xff; +- descriptorStruct.mchStraps.padding[28] = 0xff; +- descriptorStruct.mchStraps.padding[29] = 0xff; +- descriptorStruct.mchStraps.padding[30] = 0xff; +- descriptorStruct.mchStraps.padding[31] = 0xff; +- descriptorStruct.mchStraps.padding[32] = 0xff; +- descriptorStruct.mchStraps.padding[33] = 0xff; +- descriptorStruct.mchStraps.padding[34] = 0xff; +- descriptorStruct.mchStraps.padding[35] = 0xff; +- descriptorStruct.mchStraps.padding[36] = 0xff; +- descriptorStruct.mchStraps.padding[37] = 0xff; +- descriptorStruct.mchStraps.padding[38] = 0xff; +- descriptorStruct.mchStraps.padding[39] = 0xff; +- descriptorStruct.mchStraps.padding[40] = 0xff; +- descriptorStruct.mchStraps.padding[41] = 0xff; +- descriptorStruct.mchStraps.padding[42] = 0xff; +- descriptorStruct.mchStraps.padding[43] = 0xff; +- descriptorStruct.mchStraps.padding[44] = 0xff; +- descriptorStruct.mchStraps.padding[45] = 0xff; +- descriptorStruct.mchStraps.padding[46] = 0xff; +- descriptorStruct.mchStraps.padding[47] = 0xff; +- descriptorStruct.mchStraps.padding[48] = 0xff; +- descriptorStruct.mchStraps.padding[49] = 0xff; +- descriptorStruct.mchStraps.padding[50] = 0xff; +- descriptorStruct.mchStraps.padding[51] = 0xff; +- descriptorStruct.mchStraps.padding[52] = 0xff; +- descriptorStruct.mchStraps.padding[53] = 0xff; +- descriptorStruct.mchStraps.padding[54] = 0xff; +- descriptorStruct.mchStraps.padding[55] = 0xff; +- descriptorStruct.mchStraps.padding[56] = 0xff; +- descriptorStruct.mchStraps.padding[57] = 0xff; +- descriptorStruct.mchStraps.padding[58] = 0xff; +- descriptorStruct.mchStraps.padding[59] = 0xff; +- descriptorStruct.mchStraps.padding[60] = 0xff; +- descriptorStruct.mchStraps.padding[61] = 0xff; +- descriptorStruct.mchStraps.padding[62] = 0xff; +- descriptorStruct.mchStraps.padding[63] = 0xff; +- descriptorStruct.mchStraps.padding[64] = 0xff; +- descriptorStruct.mchStraps.padding[65] = 0xff; +- descriptorStruct.mchStraps.padding[66] = 0xff; +- descriptorStruct.mchStraps.padding[67] = 0xff; +- descriptorStruct.mchStraps.padding[68] = 0xff; +- descriptorStruct.mchStraps.padding[69] = 0xff; +- descriptorStruct.mchStraps.padding[70] = 0xff; +- descriptorStruct.mchStraps.padding[71] = 0xff; +- descriptorStruct.mchStraps.padding[72] = 0xff; +- descriptorStruct.mchStraps.padding[73] = 0xff; +- descriptorStruct.mchStraps.padding[74] = 0xff; +- descriptorStruct.mchStraps.padding[75] = 0xff; +- descriptorStruct.mchStraps.padding[76] = 0xff; +- descriptorStruct.mchStraps.padding[77] = 0xff; +- descriptorStruct.mchStraps.padding[78] = 0xff; +- descriptorStruct.mchStraps.padding[79] = 0xff; +- descriptorStruct.mchStraps.padding[80] = 0xff; +- descriptorStruct.mchStraps.padding[81] = 0xff; +- descriptorStruct.mchStraps.padding[82] = 0xff; +- descriptorStruct.mchStraps.padding[83] = 0xff; +- descriptorStruct.mchStraps.padding[84] = 0xff; +- descriptorStruct.mchStraps.padding[85] = 0xff; +- descriptorStruct.mchStraps.padding[86] = 0xff; +- descriptorStruct.mchStraps.padding[87] = 0xff; +- descriptorStruct.mchStraps.padding[88] = 0xff; +- descriptorStruct.mchStraps.padding[89] = 0xff; +- descriptorStruct.mchStraps.padding[90] = 0xff; +- descriptorStruct.mchStraps.padding[91] = 0xff; +- descriptorStruct.mchStraps.padding[92] = 0xff; +- descriptorStruct.mchStraps.padding[93] = 0xff; +- descriptorStruct.mchStraps.padding[94] = 0xff; +- descriptorStruct.mchStraps.padding[95] = 0xff; +- descriptorStruct.mchStraps.padding[96] = 0xff; +- descriptorStruct.mchStraps.padding[97] = 0xff; +- descriptorStruct.mchStraps.padding[98] = 0xff; +- descriptorStruct.mchStraps.padding[99] = 0xff; +- descriptorStruct.mchStraps.padding[100] = 0xff; +- descriptorStruct.mchStraps.padding[101] = 0xff; +- descriptorStruct.mchStraps.padding[102] = 0xff; +- descriptorStruct.mchStraps.padding[103] = 0xff; +- descriptorStruct.mchStraps.padding[104] = 0xff; +- descriptorStruct.mchStraps.padding[105] = 0xff; +- descriptorStruct.mchStraps.padding[106] = 0xff; +- descriptorStruct.mchStraps.padding[107] = 0xff; +- descriptorStruct.mchStraps.padding[108] = 0xff; +- descriptorStruct.mchStraps.padding[109] = 0xff; +- descriptorStruct.mchStraps.padding[110] = 0xff; +- descriptorStruct.mchStraps.padding[111] = 0xff; +- descriptorStruct.mchStraps.padding[112] = 0xff; +- descriptorStruct.mchStraps.padding[113] = 0xff; +- descriptorStruct.mchStraps.padding[114] = 0xff; +- descriptorStruct.mchStraps.padding[115] = 0xff; +- descriptorStruct.mchStraps.padding[116] = 0xff; +- descriptorStruct.mchStraps.padding[117] = 0xff; +- descriptorStruct.mchStraps.padding[118] = 0xff; +- descriptorStruct.mchStraps.padding[119] = 0xff; +- descriptorStruct.mchStraps.padding[120] = 0xff; +- descriptorStruct.mchStraps.padding[121] = 0xff; +- descriptorStruct.mchStraps.padding[122] = 0xff; +- descriptorStruct.mchStraps.padding[123] = 0xff; +- descriptorStruct.mchStraps.padding[124] = 0xff; +- descriptorStruct.mchStraps.padding[125] = 0xff; +- descriptorStruct.mchStraps.padding[126] = 0xff; +- descriptorStruct.mchStraps.padding[127] = 0xff; +- descriptorStruct.mchStraps.padding[128] = 0xff; +- descriptorStruct.mchStraps.padding[129] = 0xff; +- descriptorStruct.mchStraps.padding[130] = 0xff; +- descriptorStruct.mchStraps.padding[131] = 0xff; +- descriptorStruct.mchStraps.padding[132] = 0xff; +- descriptorStruct.mchStraps.padding[133] = 0xff; +- descriptorStruct.mchStraps.padding[134] = 0xff; +- descriptorStruct.mchStraps.padding[135] = 0xff; +- descriptorStruct.mchStraps.padding[136] = 0xff; +- descriptorStruct.mchStraps.padding[137] = 0xff; +- descriptorStruct.mchStraps.padding[138] = 0xff; +- descriptorStruct.mchStraps.padding[139] = 0xff; +- descriptorStruct.mchStraps.padding[140] = 0xff; +- descriptorStruct.mchStraps.padding[141] = 0xff; +- descriptorStruct.mchStraps.padding[142] = 0xff; +- descriptorStruct.mchStraps.padding[143] = 0xff; +- descriptorStruct.mchStraps.padding[144] = 0xff; +- descriptorStruct.mchStraps.padding[145] = 0xff; +- descriptorStruct.mchStraps.padding[146] = 0xff; +- descriptorStruct.mchStraps.padding[147] = 0xff; +- descriptorStruct.mchStraps.padding[148] = 0xff; +- descriptorStruct.mchStraps.padding[149] = 0xff; +- descriptorStruct.mchStraps.padding[150] = 0xff; +- descriptorStruct.mchStraps.padding[151] = 0xff; +- descriptorStruct.mchStraps.padding[152] = 0xff; +- descriptorStruct.mchStraps.padding[153] = 0xff; +- descriptorStruct.mchStraps.padding[154] = 0xff; +- descriptorStruct.mchStraps.padding[155] = 0xff; +- descriptorStruct.mchStraps.padding[156] = 0xff; +- descriptorStruct.mchStraps.padding[157] = 0xff; +- descriptorStruct.mchStraps.padding[158] = 0xff; +- descriptorStruct.mchStraps.padding[159] = 0xff; +- descriptorStruct.mchStraps.padding[160] = 0xff; +- descriptorStruct.mchStraps.padding[161] = 0xff; +- descriptorStruct.mchStraps.padding[162] = 0xff; +- descriptorStruct.mchStraps.padding[163] = 0xff; +- descriptorStruct.mchStraps.padding[164] = 0xff; +- descriptorStruct.mchStraps.padding[165] = 0xff; +- descriptorStruct.mchStraps.padding[166] = 0xff; +- descriptorStruct.mchStraps.padding[167] = 0xff; +- descriptorStruct.mchStraps.padding[168] = 0xff; +- descriptorStruct.mchStraps.padding[169] = 0xff; +- descriptorStruct.mchStraps.padding[170] = 0xff; +- descriptorStruct.mchStraps.padding[171] = 0xff; +- descriptorStruct.mchStraps.padding[172] = 0xff; +- descriptorStruct.mchStraps.padding[173] = 0xff; +- descriptorStruct.mchStraps.padding[174] = 0xff; +- descriptorStruct.mchStraps.padding[175] = 0xff; +- descriptorStruct.mchStraps.padding[176] = 0xff; +- descriptorStruct.mchStraps.padding[177] = 0xff; +- descriptorStruct.mchStraps.padding[178] = 0xff; +- descriptorStruct.mchStraps.padding[179] = 0xff; +- descriptorStruct.mchStraps.padding[180] = 0xff; +- descriptorStruct.mchStraps.padding[181] = 0xff; +- descriptorStruct.mchStraps.padding[182] = 0xff; +- descriptorStruct.mchStraps.padding[183] = 0xff; +- descriptorStruct.mchStraps.padding[184] = 0xff; +- descriptorStruct.mchStraps.padding[185] = 0xff; +- descriptorStruct.mchStraps.padding[186] = 0xff; +- descriptorStruct.mchStraps.padding[187] = 0xff; +- descriptorStruct.mchStraps.padding[188] = 0xff; +- descriptorStruct.mchStraps.padding[189] = 0xff; +- descriptorStruct.mchStraps.padding[190] = 0xff; +- descriptorStruct.mchStraps.padding[191] = 0xff; +- descriptorStruct.mchStraps.padding[192] = 0xff; +- descriptorStruct.mchStraps.padding[193] = 0xff; +- descriptorStruct.mchStraps.padding[194] = 0xff; +- descriptorStruct.mchStraps.padding[195] = 0xff; +- descriptorStruct.mchStraps.padding[196] = 0xff; +- descriptorStruct.mchStraps.padding[197] = 0xff; +- descriptorStruct.mchStraps.padding[198] = 0xff; +- descriptorStruct.mchStraps.padding[199] = 0xff; +- descriptorStruct.mchStraps.padding[200] = 0xff; +- descriptorStruct.mchStraps.padding[201] = 0xff; +- descriptorStruct.mchStraps.padding[202] = 0xff; +- descriptorStruct.mchStraps.padding[203] = 0xff; +- descriptorStruct.mchStraps.padding[204] = 0xff; +- descriptorStruct.mchStraps.padding[205] = 0xff; +- descriptorStruct.mchStraps.padding[206] = 0xff; +- descriptorStruct.mchStraps.padding[207] = 0xff; +- descriptorStruct.mchStraps.padding[208] = 0xff; +- descriptorStruct.mchStraps.padding[209] = 0xff; +- descriptorStruct.mchStraps.padding[210] = 0xff; +- descriptorStruct.mchStraps.padding[211] = 0xff; +- descriptorStruct.mchStraps.padding[212] = 0xff; +- descriptorStruct.mchStraps.padding[213] = 0xff; +- descriptorStruct.mchStraps.padding[214] = 0xff; +- descriptorStruct.mchStraps.padding[215] = 0xff; +- descriptorStruct.mchStraps.padding[216] = 0xff; +- descriptorStruct.mchStraps.padding[217] = 0xff; +- descriptorStruct.mchStraps.padding[218] = 0xff; +- descriptorStruct.mchStraps.padding[219] = 0xff; +- descriptorStruct.mchStraps.padding[220] = 0xff; +- descriptorStruct.mchStraps.padding[221] = 0xff; +- descriptorStruct.mchStraps.padding[222] = 0xff; +- descriptorStruct.mchStraps.padding[223] = 0xff; +- descriptorStruct.mchStraps.padding[224] = 0xff; +- descriptorStruct.mchStraps.padding[225] = 0xff; +- descriptorStruct.mchStraps.padding[226] = 0xff; +- descriptorStruct.mchStraps.padding[227] = 0xff; +- descriptorStruct.mchStraps.padding[228] = 0xff; +- descriptorStruct.mchStraps.padding[229] = 0xff; +- descriptorStruct.mchStraps.padding[230] = 0xff; +- descriptorStruct.mchStraps.padding[231] = 0xff; +- descriptorStruct.mchStraps.padding[232] = 0xff; +- descriptorStruct.mchStraps.padding[233] = 0xff; +- descriptorStruct.mchStraps.padding[234] = 0xff; +- descriptorStruct.mchStraps.padding[235] = 0xff; +- descriptorStruct.mchStraps.padding[236] = 0xff; +- descriptorStruct.mchStraps.padding[237] = 0xff; +- descriptorStruct.mchStraps.padding[238] = 0xff; +- descriptorStruct.mchStraps.padding[239] = 0xff; +- descriptorStruct.mchStraps.padding[240] = 0xff; +- descriptorStruct.mchStraps.padding[241] = 0xff; +- descriptorStruct.mchStraps.padding[242] = 0xff; +- descriptorStruct.mchStraps.padding[243] = 0xff; +- descriptorStruct.mchStraps.padding[244] = 0xff; +- descriptorStruct.mchStraps.padding[245] = 0xff; +- descriptorStruct.mchStraps.padding[246] = 0xff; +- descriptorStruct.mchStraps.padding[247] = 0xff; +- descriptorStruct.mchStraps.padding[248] = 0xff; +- descriptorStruct.mchStraps.padding[249] = 0xff; +- descriptorStruct.mchStraps.padding[250] = 0xff; +- descriptorStruct.mchStraps.padding[251] = 0xff; +- descriptorStruct.mchStraps.padding[252] = 0xff; +- descriptorStruct.mchStraps.padding[253] = 0xff; +- descriptorStruct.mchStraps.padding[254] = 0xff; +- descriptorStruct.mchStraps.padding[255] = 0xff; +- descriptorStruct.mchStraps.padding[256] = 0xff; +- descriptorStruct.mchStraps.padding[257] = 0xff; +- descriptorStruct.mchStraps.padding[258] = 0xff; +- descriptorStruct.mchStraps.padding[259] = 0xff; +- descriptorStruct.mchStraps.padding[260] = 0xff; +- descriptorStruct.mchStraps.padding[261] = 0xff; +- descriptorStruct.mchStraps.padding[262] = 0xff; +- descriptorStruct.mchStraps.padding[263] = 0xff; +- descriptorStruct.mchStraps.padding[264] = 0xff; +- descriptorStruct.mchStraps.padding[265] = 0xff; +- descriptorStruct.mchStraps.padding[266] = 0xff; +- descriptorStruct.mchStraps.padding[267] = 0xff; +- descriptorStruct.mchStraps.padding[268] = 0xff; +- descriptorStruct.mchStraps.padding[269] = 0xff; +- descriptorStruct.mchStraps.padding[270] = 0xff; +- descriptorStruct.mchStraps.padding[271] = 0xff; +- descriptorStruct.mchStraps.padding[272] = 0xff; +- descriptorStruct.mchStraps.padding[273] = 0xff; +- descriptorStruct.mchStraps.padding[274] = 0xff; +- descriptorStruct.mchStraps.padding[275] = 0xff; +- descriptorStruct.mchStraps.padding[276] = 0xff; +- descriptorStruct.mchStraps.padding[277] = 0xff; +- descriptorStruct.mchStraps.padding[278] = 0xff; +- descriptorStruct.mchStraps.padding[279] = 0xff; +- descriptorStruct.mchStraps.padding[280] = 0xff; +- descriptorStruct.mchStraps.padding[281] = 0xff; +- descriptorStruct.mchStraps.padding[282] = 0xff; +- descriptorStruct.mchStraps.padding[283] = 0xff; +- descriptorStruct.mchStraps.padding[284] = 0xff; +- descriptorStruct.mchStraps.padding[285] = 0xff; +- descriptorStruct.mchStraps.padding[286] = 0xff; +- descriptorStruct.mchStraps.padding[287] = 0xff; +- descriptorStruct.mchStraps.padding[288] = 0xff; +- descriptorStruct.mchStraps.padding[289] = 0xff; +- descriptorStruct.mchStraps.padding[290] = 0xff; +- descriptorStruct.mchStraps.padding[291] = 0xff; +- descriptorStruct.mchStraps.padding[292] = 0xff; +- descriptorStruct.mchStraps.padding[293] = 0xff; +- descriptorStruct.mchStraps.padding[294] = 0xff; +- descriptorStruct.mchStraps.padding[295] = 0xff; +- descriptorStruct.mchStraps.padding[296] = 0xff; +- descriptorStruct.mchStraps.padding[297] = 0xff; +- descriptorStruct.mchStraps.padding[298] = 0xff; +- descriptorStruct.mchStraps.padding[299] = 0xff; +- descriptorStruct.mchStraps.padding[300] = 0xff; +- descriptorStruct.mchStraps.padding[301] = 0xff; +- descriptorStruct.mchStraps.padding[302] = 0xff; +- descriptorStruct.mchStraps.padding[303] = 0xff; +- descriptorStruct.mchStraps.padding[304] = 0xff; +- descriptorStruct.mchStraps.padding[305] = 0xff; +- descriptorStruct.mchStraps.padding[306] = 0xff; +- descriptorStruct.mchStraps.padding[307] = 0xff; +- descriptorStruct.mchStraps.padding[308] = 0xff; +- descriptorStruct.mchStraps.padding[309] = 0xff; +- descriptorStruct.mchStraps.padding[310] = 0xff; +- descriptorStruct.mchStraps.padding[311] = 0xff; +- descriptorStruct.mchStraps.padding[312] = 0xff; +- descriptorStruct.mchStraps.padding[313] = 0xff; +- descriptorStruct.mchStraps.padding[314] = 0xff; +- descriptorStruct.mchStraps.padding[315] = 0xff; +- descriptorStruct.mchStraps.padding[316] = 0xff; +- descriptorStruct.mchStraps.padding[317] = 0xff; +- descriptorStruct.mchStraps.padding[318] = 0xff; +- descriptorStruct.mchStraps.padding[319] = 0xff; +- descriptorStruct.mchStraps.padding[320] = 0xff; +- descriptorStruct.mchStraps.padding[321] = 0xff; +- descriptorStruct.mchStraps.padding[322] = 0xff; +- descriptorStruct.mchStraps.padding[323] = 0xff; +- descriptorStruct.mchStraps.padding[324] = 0xff; +- descriptorStruct.mchStraps.padding[325] = 0xff; +- descriptorStruct.mchStraps.padding[326] = 0xff; +- descriptorStruct.mchStraps.padding[327] = 0xff; +- descriptorStruct.mchStraps.padding[328] = 0xff; +- descriptorStruct.mchStraps.padding[329] = 0xff; +- descriptorStruct.mchStraps.padding[330] = 0xff; +- descriptorStruct.mchStraps.padding[331] = 0xff; +- descriptorStruct.mchStraps.padding[332] = 0xff; +- descriptorStruct.mchStraps.padding[333] = 0xff; +- descriptorStruct.mchStraps.padding[334] = 0xff; +- descriptorStruct.mchStraps.padding[335] = 0xff; +- descriptorStruct.mchStraps.padding[336] = 0xff; +- descriptorStruct.mchStraps.padding[337] = 0xff; +- descriptorStruct.mchStraps.padding[338] = 0xff; +- descriptorStruct.mchStraps.padding[339] = 0xff; +- descriptorStruct.mchStraps.padding[340] = 0xff; +- descriptorStruct.mchStraps.padding[341] = 0xff; +- descriptorStruct.mchStraps.padding[342] = 0xff; +- descriptorStruct.mchStraps.padding[343] = 0xff; +- descriptorStruct.mchStraps.padding[344] = 0xff; +- descriptorStruct.mchStraps.padding[345] = 0xff; +- descriptorStruct.mchStraps.padding[346] = 0xff; +- descriptorStruct.mchStraps.padding[347] = 0xff; +- descriptorStruct.mchStraps.padding[348] = 0xff; +- descriptorStruct.mchStraps.padding[349] = 0xff; +- descriptorStruct.mchStraps.padding[350] = 0xff; +- descriptorStruct.mchStraps.padding[351] = 0xff; +- descriptorStruct.mchStraps.padding[352] = 0xff; +- descriptorStruct.mchStraps.padding[353] = 0xff; +- descriptorStruct.mchStraps.padding[354] = 0xff; +- descriptorStruct.mchStraps.padding[355] = 0xff; +- descriptorStruct.mchStraps.padding[356] = 0xff; +- descriptorStruct.mchStraps.padding[357] = 0xff; +- descriptorStruct.mchStraps.padding[358] = 0xff; +- descriptorStruct.mchStraps.padding[359] = 0xff; +- descriptorStruct.mchStraps.padding[360] = 0xff; +- descriptorStruct.mchStraps.padding[361] = 0xff; +- descriptorStruct.mchStraps.padding[362] = 0xff; +- descriptorStruct.mchStraps.padding[363] = 0xff; +- descriptorStruct.mchStraps.padding[364] = 0xff; +- descriptorStruct.mchStraps.padding[365] = 0xff; +- descriptorStruct.mchStraps.padding[366] = 0xff; +- descriptorStruct.mchStraps.padding[367] = 0xff; +- descriptorStruct.mchStraps.padding[368] = 0xff; +- descriptorStruct.mchStraps.padding[369] = 0xff; +- descriptorStruct.mchStraps.padding[370] = 0xff; +- descriptorStruct.mchStraps.padding[371] = 0xff; +- descriptorStruct.mchStraps.padding[372] = 0xff; +- descriptorStruct.mchStraps.padding[373] = 0xff; +- descriptorStruct.mchStraps.padding[374] = 0xff; +- descriptorStruct.mchStraps.padding[375] = 0xff; +- descriptorStruct.mchStraps.padding[376] = 0xff; +- descriptorStruct.mchStraps.padding[377] = 0xff; +- descriptorStruct.mchStraps.padding[378] = 0xff; +- descriptorStruct.mchStraps.padding[379] = 0xff; +- descriptorStruct.mchStraps.padding[380] = 0xff; +- descriptorStruct.mchStraps.padding[381] = 0xff; +- descriptorStruct.mchStraps.padding[382] = 0xff; +- descriptorStruct.mchStraps.padding[383] = 0xff; +- descriptorStruct.mchStraps.padding[384] = 0xff; +- descriptorStruct.mchStraps.padding[385] = 0xff; +- descriptorStruct.mchStraps.padding[386] = 0xff; +- descriptorStruct.mchStraps.padding[387] = 0xff; +- descriptorStruct.mchStraps.padding[388] = 0xff; +- descriptorStruct.mchStraps.padding[389] = 0xff; +- descriptorStruct.mchStraps.padding[390] = 0xff; +- descriptorStruct.mchStraps.padding[391] = 0xff; +- descriptorStruct.mchStraps.padding[392] = 0xff; +- descriptorStruct.mchStraps.padding[393] = 0xff; +- descriptorStruct.mchStraps.padding[394] = 0xff; +- descriptorStruct.mchStraps.padding[395] = 0xff; +- descriptorStruct.mchStraps.padding[396] = 0xff; +- descriptorStruct.mchStraps.padding[397] = 0xff; +- descriptorStruct.mchStraps.padding[398] = 0xff; +- descriptorStruct.mchStraps.padding[399] = 0xff; +- descriptorStruct.mchStraps.padding[400] = 0xff; +- descriptorStruct.mchStraps.padding[401] = 0xff; +- descriptorStruct.mchStraps.padding[402] = 0xff; +- descriptorStruct.mchStraps.padding[403] = 0xff; +- descriptorStruct.mchStraps.padding[404] = 0xff; +- descriptorStruct.mchStraps.padding[405] = 0xff; +- descriptorStruct.mchStraps.padding[406] = 0xff; +- descriptorStruct.mchStraps.padding[407] = 0xff; +- descriptorStruct.mchStraps.padding[408] = 0xff; +- descriptorStruct.mchStraps.padding[409] = 0xff; +- descriptorStruct.mchStraps.padding[410] = 0xff; +- descriptorStruct.mchStraps.padding[411] = 0xff; +- descriptorStruct.mchStraps.padding[412] = 0xff; +- descriptorStruct.mchStraps.padding[413] = 0xff; +- descriptorStruct.mchStraps.padding[414] = 0xff; +- descriptorStruct.mchStraps.padding[415] = 0xff; +- descriptorStruct.mchStraps.padding[416] = 0xff; +- descriptorStruct.mchStraps.padding[417] = 0xff; +- descriptorStruct.mchStraps.padding[418] = 0xff; +- descriptorStruct.mchStraps.padding[419] = 0xff; +- descriptorStruct.mchStraps.padding[420] = 0xff; +- descriptorStruct.mchStraps.padding[421] = 0xff; +- descriptorStruct.mchStraps.padding[422] = 0xff; +- descriptorStruct.mchStraps.padding[423] = 0xff; +- descriptorStruct.mchStraps.padding[424] = 0xff; +- descriptorStruct.mchStraps.padding[425] = 0xff; +- descriptorStruct.mchStraps.padding[426] = 0xff; +- descriptorStruct.mchStraps.padding[427] = 0xff; +- descriptorStruct.mchStraps.padding[428] = 0xff; +- descriptorStruct.mchStraps.padding[429] = 0xff; +- descriptorStruct.mchStraps.padding[430] = 0xff; +- descriptorStruct.mchStraps.padding[431] = 0xff; +- descriptorStruct.mchStraps.padding[432] = 0xff; +- descriptorStruct.mchStraps.padding[433] = 0xff; +- descriptorStruct.mchStraps.padding[434] = 0xff; +- descriptorStruct.mchStraps.padding[435] = 0xff; +- descriptorStruct.mchStraps.padding[436] = 0xff; +- descriptorStruct.mchStraps.padding[437] = 0xff; +- descriptorStruct.mchStraps.padding[438] = 0xff; +- descriptorStruct.mchStraps.padding[439] = 0xff; +- descriptorStruct.mchStraps.padding[440] = 0xff; +- descriptorStruct.mchStraps.padding[441] = 0xff; +- descriptorStruct.mchStraps.padding[442] = 0xff; +- descriptorStruct.mchStraps.padding[443] = 0xff; +- descriptorStruct.mchStraps.padding[444] = 0xff; +- descriptorStruct.mchStraps.padding[445] = 0xff; +- descriptorStruct.mchStraps.padding[446] = 0xff; +- descriptorStruct.mchStraps.padding[447] = 0xff; +- descriptorStruct.mchStraps.padding[448] = 0xff; +- descriptorStruct.mchStraps.padding[449] = 0xff; +- descriptorStruct.mchStraps.padding[450] = 0xff; +- descriptorStruct.mchStraps.padding[451] = 0xff; +- descriptorStruct.mchStraps.padding[452] = 0xff; +- descriptorStruct.mchStraps.padding[453] = 0xff; +- descriptorStruct.mchStraps.padding[454] = 0xff; +- descriptorStruct.mchStraps.padding[455] = 0xff; +- descriptorStruct.mchStraps.padding[456] = 0xff; +- descriptorStruct.mchStraps.padding[457] = 0xff; +- descriptorStruct.mchStraps.padding[458] = 0xff; +- descriptorStruct.mchStraps.padding[459] = 0xff; +- descriptorStruct.mchStraps.padding[460] = 0xff; +- descriptorStruct.mchStraps.padding[461] = 0xff; +- descriptorStruct.mchStraps.padding[462] = 0xff; +- descriptorStruct.mchStraps.padding[463] = 0xff; +- descriptorStruct.mchStraps.padding[464] = 0xff; +- descriptorStruct.mchStraps.padding[465] = 0xff; +- descriptorStruct.mchStraps.padding[466] = 0xff; +- descriptorStruct.mchStraps.padding[467] = 0xff; +- descriptorStruct.mchStraps.padding[468] = 0xff; +- descriptorStruct.mchStraps.padding[469] = 0xff; +- descriptorStruct.mchStraps.padding[470] = 0xff; +- descriptorStruct.mchStraps.padding[471] = 0xff; +- descriptorStruct.mchStraps.padding[472] = 0xff; +- descriptorStruct.mchStraps.padding[473] = 0xff; +- descriptorStruct.mchStraps.padding[474] = 0xff; +- descriptorStruct.mchStraps.padding[475] = 0xff; +- descriptorStruct.mchStraps.padding[476] = 0xff; +- descriptorStruct.mchStraps.padding[477] = 0xff; +- descriptorStruct.mchStraps.padding[478] = 0xff; +- descriptorStruct.mchStraps.padding[479] = 0xff; +- descriptorStruct.mchStraps.padding[480] = 0xff; +- descriptorStruct.mchStraps.padding[481] = 0xff; +- descriptorStruct.mchStraps.padding[482] = 0xff; +- descriptorStruct.mchStraps.padding[483] = 0xff; +- descriptorStruct.mchStraps.padding[484] = 0xff; +- descriptorStruct.mchStraps.padding[485] = 0xff; +- descriptorStruct.mchStraps.padding[486] = 0xff; +- descriptorStruct.mchStraps.padding[487] = 0xff; +- descriptorStruct.mchStraps.padding[488] = 0xff; +- descriptorStruct.mchStraps.padding[489] = 0xff; +- descriptorStruct.mchStraps.padding[490] = 0xff; +- descriptorStruct.mchStraps.padding[491] = 0xff; +- descriptorStruct.mchStraps.padding[492] = 0xff; +- descriptorStruct.mchStraps.padding[493] = 0xff; +- descriptorStruct.mchStraps.padding[494] = 0xff; +- descriptorStruct.mchStraps.padding[495] = 0xff; +- descriptorStruct.mchStraps.padding[496] = 0xff; +- descriptorStruct.mchStraps.padding[497] = 0xff; +- descriptorStruct.mchStraps.padding[498] = 0xff; +- descriptorStruct.mchStraps.padding[499] = 0xff; +- descriptorStruct.mchStraps.padding[500] = 0xff; +- descriptorStruct.mchStraps.padding[501] = 0xff; +- descriptorStruct.mchStraps.padding[502] = 0xff; +- descriptorStruct.mchStraps.padding[503] = 0xff; +- descriptorStruct.mchStraps.padding[504] = 0xff; +- descriptorStruct.mchStraps.padding[505] = 0xff; +- descriptorStruct.mchStraps.padding[506] = 0xff; +- descriptorStruct.mchStraps.padding[507] = 0xff; +- descriptorStruct.mchStraps.padding[508] = 0xff; +- descriptorStruct.mchStraps.padding[509] = 0xff; +- descriptorStruct.mchStraps.padding[510] = 0xff; +- descriptorStruct.mchStraps.padding[511] = 0xff; +- descriptorStruct.mchStraps.padding[512] = 0xff; +- descriptorStruct.mchStraps.padding[513] = 0xff; +- descriptorStruct.mchStraps.padding[514] = 0xff; +- descriptorStruct.mchStraps.padding[515] = 0xff; +- descriptorStruct.mchStraps.padding[516] = 0xff; +- descriptorStruct.mchStraps.padding[517] = 0xff; +- descriptorStruct.mchStraps.padding[518] = 0xff; +- descriptorStruct.mchStraps.padding[519] = 0xff; +- descriptorStruct.mchStraps.padding[520] = 0xff; +- descriptorStruct.mchStraps.padding[521] = 0xff; +- descriptorStruct.mchStraps.padding[522] = 0xff; +- descriptorStruct.mchStraps.padding[523] = 0xff; +- descriptorStruct.mchStraps.padding[524] = 0xff; +- descriptorStruct.mchStraps.padding[525] = 0xff; +- descriptorStruct.mchStraps.padding[526] = 0xff; +- descriptorStruct.mchStraps.padding[527] = 0xff; +- descriptorStruct.mchStraps.padding[528] = 0xff; +- descriptorStruct.mchStraps.padding[529] = 0xff; +- descriptorStruct.mchStraps.padding[530] = 0xff; +- descriptorStruct.mchStraps.padding[531] = 0xff; +- descriptorStruct.mchStraps.padding[532] = 0xff; +- descriptorStruct.mchStraps.padding[533] = 0xff; +- descriptorStruct.mchStraps.padding[534] = 0xff; +- descriptorStruct.mchStraps.padding[535] = 0xff; +- descriptorStruct.mchStraps.padding[536] = 0xff; +- descriptorStruct.mchStraps.padding[537] = 0xff; +- descriptorStruct.mchStraps.padding[538] = 0xff; +- descriptorStruct.mchStraps.padding[539] = 0xff; +- descriptorStruct.mchStraps.padding[540] = 0xff; +- descriptorStruct.mchStraps.padding[541] = 0xff; +- descriptorStruct.mchStraps.padding[542] = 0xff; +- descriptorStruct.mchStraps.padding[543] = 0xff; +- descriptorStruct.mchStraps.padding[544] = 0xff; +- descriptorStruct.mchStraps.padding[545] = 0xff; +- descriptorStruct.mchStraps.padding[546] = 0xff; +- descriptorStruct.mchStraps.padding[547] = 0xff; +- descriptorStruct.mchStraps.padding[548] = 0xff; +- descriptorStruct.mchStraps.padding[549] = 0xff; +- descriptorStruct.mchStraps.padding[550] = 0xff; +- descriptorStruct.mchStraps.padding[551] = 0xff; +- descriptorStruct.mchStraps.padding[552] = 0xff; +- descriptorStruct.mchStraps.padding[553] = 0xff; +- descriptorStruct.mchStraps.padding[554] = 0xff; +- descriptorStruct.mchStraps.padding[555] = 0xff; +- descriptorStruct.mchStraps.padding[556] = 0xff; +- descriptorStruct.mchStraps.padding[557] = 0xff; +- descriptorStruct.mchStraps.padding[558] = 0xff; +- descriptorStruct.mchStraps.padding[559] = 0xff; +- descriptorStruct.mchStraps.padding[560] = 0xff; +- descriptorStruct.mchStraps.padding[561] = 0xff; +- descriptorStruct.mchStraps.padding[562] = 0xff; +- descriptorStruct.mchStraps.padding[563] = 0xff; +- descriptorStruct.mchStraps.padding[564] = 0xff; +- descriptorStruct.mchStraps.padding[565] = 0xff; +- descriptorStruct.mchStraps.padding[566] = 0xff; +- descriptorStruct.mchStraps.padding[567] = 0xff; +- descriptorStruct.mchStraps.padding[568] = 0xff; +- descriptorStruct.mchStraps.padding[569] = 0xff; +- descriptorStruct.mchStraps.padding[570] = 0xff; +- descriptorStruct.mchStraps.padding[571] = 0xff; +- descriptorStruct.mchStraps.padding[572] = 0xff; +- descriptorStruct.mchStraps.padding[573] = 0xff; +- descriptorStruct.mchStraps.padding[574] = 0xff; +- descriptorStruct.mchStraps.padding[575] = 0xff; +- descriptorStruct.mchStraps.padding[576] = 0xff; +- descriptorStruct.mchStraps.padding[577] = 0xff; +- descriptorStruct.mchStraps.padding[578] = 0xff; +- descriptorStruct.mchStraps.padding[579] = 0xff; +- descriptorStruct.mchStraps.padding[580] = 0xff; +- descriptorStruct.mchStraps.padding[581] = 0xff; +- descriptorStruct.mchStraps.padding[582] = 0xff; +- descriptorStruct.mchStraps.padding[583] = 0xff; +- descriptorStruct.mchStraps.padding[584] = 0xff; +- descriptorStruct.mchStraps.padding[585] = 0xff; +- descriptorStruct.mchStraps.padding[586] = 0xff; +- descriptorStruct.mchStraps.padding[587] = 0xff; +- descriptorStruct.mchStraps.padding[588] = 0xff; +- descriptorStruct.mchStraps.padding[589] = 0xff; +- descriptorStruct.mchStraps.padding[590] = 0xff; +- descriptorStruct.mchStraps.padding[591] = 0xff; +- descriptorStruct.mchStraps.padding[592] = 0xff; +- descriptorStruct.mchStraps.padding[593] = 0xff; +- descriptorStruct.mchStraps.padding[594] = 0xff; +- descriptorStruct.mchStraps.padding[595] = 0xff; +- descriptorStruct.mchStraps.padding[596] = 0xff; +- descriptorStruct.mchStraps.padding[597] = 0xff; +- descriptorStruct.mchStraps.padding[598] = 0xff; +- descriptorStruct.mchStraps.padding[599] = 0xff; +- descriptorStruct.mchStraps.padding[600] = 0xff; +- descriptorStruct.mchStraps.padding[601] = 0xff; +- descriptorStruct.mchStraps.padding[602] = 0xff; +- descriptorStruct.mchStraps.padding[603] = 0xff; +- descriptorStruct.mchStraps.padding[604] = 0xff; +- descriptorStruct.mchStraps.padding[605] = 0xff; +- descriptorStruct.mchStraps.padding[606] = 0xff; +- descriptorStruct.mchStraps.padding[607] = 0xff; +- descriptorStruct.mchStraps.padding[608] = 0xff; +- descriptorStruct.mchStraps.padding[609] = 0xff; +- descriptorStruct.mchStraps.padding[610] = 0xff; +- descriptorStruct.mchStraps.padding[611] = 0xff; +- descriptorStruct.mchStraps.padding[612] = 0xff; +- descriptorStruct.mchStraps.padding[613] = 0xff; +- descriptorStruct.mchStraps.padding[614] = 0xff; +- descriptorStruct.mchStraps.padding[615] = 0xff; +- descriptorStruct.mchStraps.padding[616] = 0xff; +- descriptorStruct.mchStraps.padding[617] = 0xff; +- descriptorStruct.mchStraps.padding[618] = 0xff; +- descriptorStruct.mchStraps.padding[619] = 0xff; +- descriptorStruct.mchStraps.padding[620] = 0xff; +- descriptorStruct.mchStraps.padding[621] = 0xff; +- descriptorStruct.mchStraps.padding[622] = 0xff; +- descriptorStruct.mchStraps.padding[623] = 0xff; +- descriptorStruct.mchStraps.padding[624] = 0xff; +- descriptorStruct.mchStraps.padding[625] = 0xff; +- descriptorStruct.mchStraps.padding[626] = 0xff; +- descriptorStruct.mchStraps.padding[627] = 0xff; +- descriptorStruct.mchStraps.padding[628] = 0xff; +- descriptorStruct.mchStraps.padding[629] = 0xff; +- descriptorStruct.mchStraps.padding[630] = 0xff; +- descriptorStruct.mchStraps.padding[631] = 0xff; +- descriptorStruct.mchStraps.padding[632] = 0xff; +- descriptorStruct.mchStraps.padding[633] = 0xff; +- descriptorStruct.mchStraps.padding[634] = 0xff; +- descriptorStruct.mchStraps.padding[635] = 0xff; +- descriptorStruct.mchStraps.padding[636] = 0xff; +- descriptorStruct.mchStraps.padding[637] = 0xff; +- descriptorStruct.mchStraps.padding[638] = 0xff; +- descriptorStruct.mchStraps.padding[639] = 0xff; +- descriptorStruct.mchStraps.padding[640] = 0xff; +- descriptorStruct.mchStraps.padding[641] = 0xff; +- descriptorStruct.mchStraps.padding[642] = 0xff; +- descriptorStruct.mchStraps.padding[643] = 0xff; +- descriptorStruct.mchStraps.padding[644] = 0xff; +- descriptorStruct.mchStraps.padding[645] = 0xff; +- descriptorStruct.mchStraps.padding[646] = 0xff; +- descriptorStruct.mchStraps.padding[647] = 0xff; +- descriptorStruct.mchStraps.padding[648] = 0xff; +- descriptorStruct.mchStraps.padding[649] = 0xff; +- descriptorStruct.mchStraps.padding[650] = 0xff; +- descriptorStruct.mchStraps.padding[651] = 0xff; +- descriptorStruct.mchStraps.padding[652] = 0xff; +- descriptorStruct.mchStraps.padding[653] = 0xff; +- descriptorStruct.mchStraps.padding[654] = 0xff; +- descriptorStruct.mchStraps.padding[655] = 0xff; +- descriptorStruct.mchStraps.padding[656] = 0xff; +- descriptorStruct.mchStraps.padding[657] = 0xff; +- descriptorStruct.mchStraps.padding[658] = 0xff; +- descriptorStruct.mchStraps.padding[659] = 0xff; +- descriptorStruct.mchStraps.padding[660] = 0xff; +- descriptorStruct.mchStraps.padding[661] = 0xff; +- descriptorStruct.mchStraps.padding[662] = 0xff; +- descriptorStruct.mchStraps.padding[663] = 0xff; +- descriptorStruct.mchStraps.padding[664] = 0xff; +- descriptorStruct.mchStraps.padding[665] = 0xff; +- descriptorStruct.mchStraps.padding[666] = 0xff; +- descriptorStruct.mchStraps.padding[667] = 0xff; +- descriptorStruct.mchStraps.padding[668] = 0xff; +- descriptorStruct.mchStraps.padding[669] = 0xff; +- descriptorStruct.mchStraps.padding[670] = 0xff; +- descriptorStruct.mchStraps.padding[671] = 0xff; +- descriptorStruct.mchStraps.padding[672] = 0xff; +- descriptorStruct.mchStraps.padding[673] = 0xff; +- descriptorStruct.mchStraps.padding[674] = 0xff; +- descriptorStruct.mchStraps.padding[675] = 0xff; +- descriptorStruct.mchStraps.padding[676] = 0xff; +- descriptorStruct.mchStraps.padding[677] = 0xff; +- descriptorStruct.mchStraps.padding[678] = 0xff; +- descriptorStruct.mchStraps.padding[679] = 0xff; +- descriptorStruct.mchStraps.padding[680] = 0xff; +- descriptorStruct.mchStraps.padding[681] = 0xff; +- descriptorStruct.mchStraps.padding[682] = 0xff; +- descriptorStruct.mchStraps.padding[683] = 0xff; +- descriptorStruct.mchStraps.padding[684] = 0xff; +- descriptorStruct.mchStraps.padding[685] = 0xff; +- descriptorStruct.mchStraps.padding[686] = 0xff; +- descriptorStruct.mchStraps.padding[687] = 0xff; +- descriptorStruct.mchStraps.padding[688] = 0xff; +- descriptorStruct.mchStraps.padding[689] = 0xff; +- descriptorStruct.mchStraps.padding[690] = 0xff; +- descriptorStruct.mchStraps.padding[691] = 0xff; +- descriptorStruct.mchStraps.padding[692] = 0xff; +- descriptorStruct.mchStraps.padding[693] = 0xff; +- descriptorStruct.mchStraps.padding[694] = 0xff; +- descriptorStruct.mchStraps.padding[695] = 0xff; +- descriptorStruct.mchStraps.padding[696] = 0xff; +- descriptorStruct.mchStraps.padding[697] = 0xff; +- descriptorStruct.mchStraps.padding[698] = 0xff; +- descriptorStruct.mchStraps.padding[699] = 0xff; +- descriptorStruct.mchStraps.padding[700] = 0xff; +- descriptorStruct.mchStraps.padding[701] = 0xff; +- descriptorStruct.mchStraps.padding[702] = 0xff; +- descriptorStruct.mchStraps.padding[703] = 0xff; +- descriptorStruct.mchStraps.padding[704] = 0xff; +- descriptorStruct.mchStraps.padding[705] = 0xff; +- descriptorStruct.mchStraps.padding[706] = 0xff; +- descriptorStruct.mchStraps.padding[707] = 0xff; +- descriptorStruct.mchStraps.padding[708] = 0xff; +- descriptorStruct.mchStraps.padding[709] = 0xff; +- descriptorStruct.mchStraps.padding[710] = 0xff; +- descriptorStruct.mchStraps.padding[711] = 0xff; +- descriptorStruct.mchStraps.padding[712] = 0xff; +- descriptorStruct.mchStraps.padding[713] = 0xff; +- descriptorStruct.mchStraps.padding[714] = 0xff; +- descriptorStruct.mchStraps.padding[715] = 0xff; +- descriptorStruct.mchStraps.padding[716] = 0xff; +- descriptorStruct.mchStraps.padding[717] = 0xff; +- descriptorStruct.mchStraps.padding[718] = 0xff; +- descriptorStruct.mchStraps.padding[719] = 0xff; +- descriptorStruct.mchStraps.padding[720] = 0xff; +- descriptorStruct.mchStraps.padding[721] = 0xff; +- descriptorStruct.mchStraps.padding[722] = 0xff; +- descriptorStruct.mchStraps.padding[723] = 0xff; +- descriptorStruct.mchStraps.padding[724] = 0xff; +- descriptorStruct.mchStraps.padding[725] = 0xff; +- descriptorStruct.mchStraps.padding[726] = 0xff; +- descriptorStruct.mchStraps.padding[727] = 0xff; +- descriptorStruct.mchStraps.padding[728] = 0xff; +- descriptorStruct.mchStraps.padding[729] = 0xff; +- descriptorStruct.mchStraps.padding[730] = 0xff; +- descriptorStruct.mchStraps.padding[731] = 0xff; +- descriptorStruct.mchStraps.padding[732] = 0xff; +- descriptorStruct.mchStraps.padding[733] = 0xff; +- descriptorStruct.mchStraps.padding[734] = 0xff; +- descriptorStruct.mchStraps.padding[735] = 0xff; +- descriptorStruct.mchStraps.padding[736] = 0xff; +- descriptorStruct.mchStraps.padding[737] = 0xff; +- descriptorStruct.mchStraps.padding[738] = 0xff; +- descriptorStruct.mchStraps.padding[739] = 0xff; +- descriptorStruct.mchStraps.padding[740] = 0xff; +- descriptorStruct.mchStraps.padding[741] = 0xff; +- descriptorStruct.mchStraps.padding[742] = 0xff; +- descriptorStruct.mchStraps.padding[743] = 0xff; +- descriptorStruct.mchStraps.padding[744] = 0xff; +- descriptorStruct.mchStraps.padding[745] = 0xff; +- descriptorStruct.mchStraps.padding[746] = 0xff; +- descriptorStruct.mchStraps.padding[747] = 0xff; +- descriptorStruct.mchStraps.padding[748] = 0xff; +- descriptorStruct.mchStraps.padding[749] = 0xff; +- descriptorStruct.mchStraps.padding[750] = 0xff; +- descriptorStruct.mchStraps.padding[751] = 0xff; +- descriptorStruct.mchStraps.padding[752] = 0xff; +- descriptorStruct.mchStraps.padding[753] = 0xff; +- descriptorStruct.mchStraps.padding[754] = 0xff; +- descriptorStruct.mchStraps.padding[755] = 0xff; +- descriptorStruct.mchStraps.padding[756] = 0xff; +- descriptorStruct.mchStraps.padding[757] = 0xff; +- descriptorStruct.mchStraps.padding[758] = 0xff; +- descriptorStruct.mchStraps.padding[759] = 0xff; +- descriptorStruct.mchStraps.padding[760] = 0xff; +- descriptorStruct.mchStraps.padding[761] = 0xff; +- descriptorStruct.mchStraps.padding[762] = 0xff; +- descriptorStruct.mchStraps.padding[763] = 0xff; +- descriptorStruct.mchStraps.padding[764] = 0xff; +- descriptorStruct.mchStraps.padding[765] = 0xff; +- descriptorStruct.mchStraps.padding[766] = 0xff; +- descriptorStruct.mchStraps.padding[767] = 0xff; +- descriptorStruct.mchStraps.padding[768] = 0xff; +- descriptorStruct.mchStraps.padding[769] = 0xff; +- descriptorStruct.mchStraps.padding[770] = 0xff; +- descriptorStruct.mchStraps.padding[771] = 0xff; +- descriptorStruct.mchStraps.padding[772] = 0xff; +- descriptorStruct.mchStraps.padding[773] = 0xff; +- descriptorStruct.mchStraps.padding[774] = 0xff; +- descriptorStruct.mchStraps.padding[775] = 0xff; +- descriptorStruct.mchStraps.padding[776] = 0xff; +- descriptorStruct.mchStraps.padding[777] = 0xff; +- descriptorStruct.mchStraps.padding[778] = 0xff; +- descriptorStruct.mchStraps.padding[779] = 0xff; +- descriptorStruct.mchStraps.padding[780] = 0xff; +- descriptorStruct.mchStraps.padding[781] = 0xff; +- descriptorStruct.mchStraps.padding[782] = 0xff; +- descriptorStruct.mchStraps.padding[783] = 0xff; +- descriptorStruct.mchStraps.padding[784] = 0xff; +- descriptorStruct.mchStraps.padding[785] = 0xff; +- descriptorStruct.mchStraps.padding[786] = 0xff; +- descriptorStruct.mchStraps.padding[787] = 0xff; +- descriptorStruct.mchStraps.padding[788] = 0xff; +- descriptorStruct.mchStraps.padding[789] = 0xff; +- descriptorStruct.mchStraps.padding[790] = 0xff; +- descriptorStruct.mchStraps.padding[791] = 0xff; +- descriptorStruct.mchStraps.padding[792] = 0xff; +- descriptorStruct.mchStraps.padding[793] = 0xff; +- descriptorStruct.mchStraps.padding[794] = 0xff; +- descriptorStruct.mchStraps.padding[795] = 0xff; +- descriptorStruct.mchStraps.padding[796] = 0xff; +- descriptorStruct.mchStraps.padding[797] = 0xff; +- descriptorStruct.mchStraps.padding[798] = 0xff; +- descriptorStruct.mchStraps.padding[799] = 0xff; +- descriptorStruct.mchStraps.padding[800] = 0xff; +- descriptorStruct.mchStraps.padding[801] = 0xff; +- descriptorStruct.mchStraps.padding[802] = 0xff; +- descriptorStruct.mchStraps.padding[803] = 0xff; +- descriptorStruct.mchStraps.padding[804] = 0xff; +- descriptorStruct.mchStraps.padding[805] = 0xff; +- descriptorStruct.mchStraps.padding[806] = 0xff; +- descriptorStruct.mchStraps.padding[807] = 0xff; +- descriptorStruct.mchStraps.padding[808] = 0xff; +- descriptorStruct.mchStraps.padding[809] = 0xff; +- descriptorStruct.mchStraps.padding[810] = 0xff; +- descriptorStruct.mchStraps.padding[811] = 0xff; +- descriptorStruct.mchStraps.padding[812] = 0xff; +- descriptorStruct.mchStraps.padding[813] = 0xff; +- descriptorStruct.mchStraps.padding[814] = 0xff; +- descriptorStruct.mchStraps.padding[815] = 0xff; +- descriptorStruct.mchStraps.padding[816] = 0xff; +- descriptorStruct.mchStraps.padding[817] = 0xff; +- descriptorStruct.mchStraps.padding[818] = 0xff; +- descriptorStruct.mchStraps.padding[819] = 0xff; +- descriptorStruct.mchStraps.padding[820] = 0xff; +- descriptorStruct.mchStraps.padding[821] = 0xff; +- descriptorStruct.mchStraps.padding[822] = 0xff; +- descriptorStruct.mchStraps.padding[823] = 0xff; +- descriptorStruct.mchStraps.padding[824] = 0xff; +- descriptorStruct.mchStraps.padding[825] = 0xff; +- descriptorStruct.mchStraps.padding[826] = 0xff; +- descriptorStruct.mchStraps.padding[827] = 0xff; +- descriptorStruct.mchStraps.padding[828] = 0xff; +- descriptorStruct.mchStraps.padding[829] = 0xff; +- descriptorStruct.mchStraps.padding[830] = 0xff; +- descriptorStruct.mchStraps.padding[831] = 0xff; +- descriptorStruct.mchStraps.padding[832] = 0xff; +- descriptorStruct.mchStraps.padding[833] = 0xff; +- descriptorStruct.mchStraps.padding[834] = 0xff; +- descriptorStruct.mchStraps.padding[835] = 0xff; +- descriptorStruct.mchStraps.padding[836] = 0xff; +- descriptorStruct.mchStraps.padding[837] = 0xff; +- descriptorStruct.mchStraps.padding[838] = 0xff; +- descriptorStruct.mchStraps.padding[839] = 0xff; +- descriptorStruct.mchStraps.padding[840] = 0xff; +- descriptorStruct.mchStraps.padding[841] = 0xff; +- descriptorStruct.mchStraps.padding[842] = 0xff; +- descriptorStruct.mchStraps.padding[843] = 0xff; +- descriptorStruct.mchStraps.padding[844] = 0xff; +- descriptorStruct.mchStraps.padding[845] = 0xff; +- descriptorStruct.mchStraps.padding[846] = 0xff; +- descriptorStruct.mchStraps.padding[847] = 0xff; +- descriptorStruct.mchStraps.padding[848] = 0xff; +- descriptorStruct.mchStraps.padding[849] = 0xff; +- descriptorStruct.mchStraps.padding[850] = 0xff; +- descriptorStruct.mchStraps.padding[851] = 0xff; +- descriptorStruct.mchStraps.padding[852] = 0xff; +- descriptorStruct.mchStraps.padding[853] = 0xff; +- descriptorStruct.mchStraps.padding[854] = 0xff; +- descriptorStruct.mchStraps.padding[855] = 0xff; +- descriptorStruct.mchStraps.padding[856] = 0xff; +- descriptorStruct.mchStraps.padding[857] = 0xff; +- descriptorStruct.mchStraps.padding[858] = 0xff; +- descriptorStruct.mchStraps.padding[859] = 0xff; +- descriptorStruct.mchStraps.padding[860] = 0xff; +- descriptorStruct.mchStraps.padding[861] = 0xff; +- descriptorStruct.mchStraps.padding[862] = 0xff; +- descriptorStruct.mchStraps.padding[863] = 0xff; +- descriptorStruct.mchStraps.padding[864] = 0xff; +- descriptorStruct.mchStraps.padding[865] = 0xff; +- descriptorStruct.mchStraps.padding[866] = 0xff; +- descriptorStruct.mchStraps.padding[867] = 0xff; +- descriptorStruct.mchStraps.padding[868] = 0xff; +- descriptorStruct.mchStraps.padding[869] = 0xff; +- descriptorStruct.mchStraps.padding[870] = 0xff; +- descriptorStruct.mchStraps.padding[871] = 0xff; +- descriptorStruct.mchStraps.padding[872] = 0xff; +- descriptorStruct.mchStraps.padding[873] = 0xff; +- descriptorStruct.mchStraps.padding[874] = 0xff; +- descriptorStruct.mchStraps.padding[875] = 0xff; +- descriptorStruct.mchStraps.padding[876] = 0xff; +- descriptorStruct.mchStraps.padding[877] = 0xff; +- descriptorStruct.mchStraps.padding[878] = 0xff; +- descriptorStruct.mchStraps.padding[879] = 0xff; +- descriptorStruct.mchStraps.padding[880] = 0xff; +- descriptorStruct.mchStraps.padding[881] = 0xff; +- descriptorStruct.mchStraps.padding[882] = 0xff; +- descriptorStruct.mchStraps.padding[883] = 0xff; +- descriptorStruct.mchStraps.padding[884] = 0xff; +- descriptorStruct.mchStraps.padding[885] = 0xff; +- descriptorStruct.mchStraps.padding[886] = 0xff; +- descriptorStruct.mchStraps.padding[887] = 0xff; +- descriptorStruct.mchStraps.padding[888] = 0xff; +- descriptorStruct.mchStraps.padding[889] = 0xff; +- descriptorStruct.mchStraps.padding[890] = 0xff; +- descriptorStruct.mchStraps.padding[891] = 0xff; +- descriptorStruct.mchStraps.padding[892] = 0xff; +- descriptorStruct.mchStraps.padding[893] = 0xff; +- descriptorStruct.mchStraps.padding[894] = 0xff; +- descriptorStruct.mchStraps.padding[895] = 0xff; +- descriptorStruct.mchStraps.padding[896] = 0xff; +- descriptorStruct.mchStraps.padding[897] = 0xff; +- descriptorStruct.mchStraps.padding[898] = 0xff; +- descriptorStruct.mchStraps.padding[899] = 0xff; +- descriptorStruct.mchStraps.padding[900] = 0xff; +- descriptorStruct.mchStraps.padding[901] = 0xff; +- descriptorStruct.mchStraps.padding[902] = 0xff; +- descriptorStruct.mchStraps.padding[903] = 0xff; +- descriptorStruct.mchStraps.padding[904] = 0xff; +- descriptorStruct.mchStraps.padding[905] = 0xff; +- descriptorStruct.mchStraps.padding[906] = 0xff; +- descriptorStruct.mchStraps.padding[907] = 0xff; +- descriptorStruct.mchStraps.padding[908] = 0xff; +- descriptorStruct.mchStraps.padding[909] = 0xff; +- descriptorStruct.mchStraps.padding[910] = 0xff; +- descriptorStruct.mchStraps.padding[911] = 0xff; +- descriptorStruct.mchStraps.padding[912] = 0xff; +- descriptorStruct.mchStraps.padding[913] = 0xff; +- descriptorStruct.mchStraps.padding[914] = 0xff; +- descriptorStruct.mchStraps.padding[915] = 0xff; +- descriptorStruct.mchStraps.padding[916] = 0xff; +- descriptorStruct.mchStraps.padding[917] = 0xff; +- descriptorStruct.mchStraps.padding[918] = 0xff; +- descriptorStruct.mchStraps.padding[919] = 0xff; +- descriptorStruct.mchStraps.padding[920] = 0xff; +- descriptorStruct.mchStraps.padding[921] = 0xff; +- descriptorStruct.mchStraps.padding[922] = 0xff; +- descriptorStruct.mchStraps.padding[923] = 0xff; +- descriptorStruct.mchStraps.padding[924] = 0xff; +- descriptorStruct.mchStraps.padding[925] = 0xff; +- descriptorStruct.mchStraps.padding[926] = 0xff; +- descriptorStruct.mchStraps.padding[927] = 0xff; +- descriptorStruct.mchStraps.padding[928] = 0xff; +- descriptorStruct.mchStraps.padding[929] = 0xff; +- descriptorStruct.mchStraps.padding[930] = 0xff; +- descriptorStruct.mchStraps.padding[931] = 0xff; +- descriptorStruct.mchStraps.padding[932] = 0xff; +- descriptorStruct.mchStraps.padding[933] = 0xff; +- descriptorStruct.mchStraps.padding[934] = 0xff; +- descriptorStruct.mchStraps.padding[935] = 0xff; +- descriptorStruct.mchStraps.padding[936] = 0xff; +- descriptorStruct.mchStraps.padding[937] = 0xff; +- descriptorStruct.mchStraps.padding[938] = 0xff; +- descriptorStruct.mchStraps.padding[939] = 0xff; +- descriptorStruct.mchStraps.padding[940] = 0xff; +- descriptorStruct.mchStraps.padding[941] = 0xff; +- descriptorStruct.mchStraps.padding[942] = 0xff; +- descriptorStruct.mchStraps.padding[943] = 0xff; +- descriptorStruct.mchStraps.padding[944] = 0xff; +- descriptorStruct.mchStraps.padding[945] = 0xff; +- descriptorStruct.mchStraps.padding[946] = 0xff; +- descriptorStruct.mchStraps.padding[947] = 0xff; +- descriptorStruct.mchStraps.padding[948] = 0xff; +- descriptorStruct.mchStraps.padding[949] = 0xff; +- descriptorStruct.mchStraps.padding[950] = 0xff; +- descriptorStruct.mchStraps.padding[951] = 0xff; +- descriptorStruct.mchStraps.padding[952] = 0xff; +- descriptorStruct.mchStraps.padding[953] = 0xff; +- descriptorStruct.mchStraps.padding[954] = 0xff; +- descriptorStruct.mchStraps.padding[955] = 0xff; +- descriptorStruct.mchStraps.padding[956] = 0xff; +- descriptorStruct.mchStraps.padding[957] = 0xff; +- descriptorStruct.mchStraps.padding[958] = 0xff; +- descriptorStruct.mchStraps.padding[959] = 0xff; +- descriptorStruct.mchStraps.padding[960] = 0xff; +- descriptorStruct.mchStraps.padding[961] = 0xff; +- descriptorStruct.mchStraps.padding[962] = 0xff; +- descriptorStruct.mchStraps.padding[963] = 0xff; +- descriptorStruct.mchStraps.padding[964] = 0xff; +- descriptorStruct.mchStraps.padding[965] = 0xff; +- descriptorStruct.mchStraps.padding[966] = 0xff; +- descriptorStruct.mchStraps.padding[967] = 0xff; +- descriptorStruct.mchStraps.padding[968] = 0xff; +- descriptorStruct.mchStraps.padding[969] = 0xff; +- descriptorStruct.mchStraps.padding[970] = 0xff; +- descriptorStruct.mchStraps.padding[971] = 0xff; +- descriptorStruct.mchStraps.padding[972] = 0xff; +- descriptorStruct.mchStraps.padding[973] = 0xff; +- descriptorStruct.mchStraps.padding[974] = 0xff; +- descriptorStruct.mchStraps.padding[975] = 0xff; +- descriptorStruct.mchStraps.padding[976] = 0xff; +- descriptorStruct.mchStraps.padding[977] = 0xff; +- descriptorStruct.mchStraps.padding[978] = 0xff; +- descriptorStruct.mchStraps.padding[979] = 0xff; +- descriptorStruct.mchStraps.padding[980] = 0xff; +- descriptorStruct.mchStraps.padding[981] = 0xff; +- descriptorStruct.mchStraps.padding[982] = 0xff; +- descriptorStruct.mchStraps.padding[983] = 0xff; +- descriptorStruct.mchStraps.padding[984] = 0xff; +- descriptorStruct.mchStraps.padding[985] = 0xff; +- descriptorStruct.mchStraps.padding[986] = 0xff; +- descriptorStruct.mchStraps.padding[987] = 0xff; +- descriptorStruct.mchStraps.padding[988] = 0xff; +- descriptorStruct.mchStraps.padding[989] = 0xff; +- descriptorStruct.mchStraps.padding[990] = 0xff; +- descriptorStruct.mchStraps.padding[991] = 0xff; +- descriptorStruct.mchStraps.padding[992] = 0xff; +- descriptorStruct.mchStraps.padding[993] = 0xff; +- descriptorStruct.mchStraps.padding[994] = 0xff; +- descriptorStruct.mchStraps.padding[995] = 0xff; +- descriptorStruct.mchStraps.padding[996] = 0xff; +- descriptorStruct.mchStraps.padding[997] = 0xff; +- descriptorStruct.mchStraps.padding[998] = 0xff; +- descriptorStruct.mchStraps.padding[999] = 0xff; +- descriptorStruct.mchStraps.padding[1000] = 0xff; +- descriptorStruct.mchStraps.padding[1001] = 0xff; +- descriptorStruct.mchStraps.padding[1002] = 0xff; +- descriptorStruct.mchStraps.padding[1003] = 0xff; +- descriptorStruct.mchStraps.padding[1004] = 0xff; +- descriptorStruct.mchStraps.padding[1005] = 0xff; +- descriptorStruct.mchStraps.padding[1006] = 0xff; +- descriptorStruct.mchStraps.padding[1007] = 0xff; +- descriptorStruct.mchStraps.padding[1008] = 0xff; +- descriptorStruct.mchStraps.padding[1009] = 0xff; +- descriptorStruct.mchStraps.padding[1010] = 0xff; +- descriptorStruct.mchStraps.padding[1011] = 0xff; +- descriptorStruct.mchStraps.padding[1012] = 0xff; +- descriptorStruct.mchStraps.padding[1013] = 0xff; +- descriptorStruct.mchStraps.padding[1014] = 0xff; +- descriptorStruct.mchStraps.padding[1015] = 0xff; +- descriptorStruct.mchStraps.padding[1016] = 0xff; +- descriptorStruct.mchStraps.padding[1017] = 0xff; +- descriptorStruct.mchStraps.padding[1018] = 0xff; +- descriptorStruct.mchStraps.padding[1019] = 0xff; +- descriptorStruct.mchStraps.padding[1020] = 0xff; +- descriptorStruct.mchStraps.padding[1021] = 0xff; +- descriptorStruct.mchStraps.padding[1022] = 0xff; +- descriptorStruct.mchStraps.padding[1023] = 0xff; +- descriptorStruct.mchStraps.padding[1024] = 0xff; +- descriptorStruct.mchStraps.padding[1025] = 0xff; +- descriptorStruct.mchStraps.padding[1026] = 0xff; +- descriptorStruct.mchStraps.padding[1027] = 0xff; +- descriptorStruct.mchStraps.padding[1028] = 0xff; +- descriptorStruct.mchStraps.padding[1029] = 0xff; +- descriptorStruct.mchStraps.padding[1030] = 0xff; +- descriptorStruct.mchStraps.padding[1031] = 0xff; +- descriptorStruct.mchStraps.padding[1032] = 0xff; +- descriptorStruct.mchStraps.padding[1033] = 0xff; +- descriptorStruct.mchStraps.padding[1034] = 0xff; +- descriptorStruct.mchStraps.padding[1035] = 0xff; +- descriptorStruct.mchStraps.padding[1036] = 0xff; +- descriptorStruct.mchStraps.padding[1037] = 0xff; +- descriptorStruct.mchStraps.padding[1038] = 0xff; +- descriptorStruct.mchStraps.padding[1039] = 0xff; +- descriptorStruct.mchStraps.padding[1040] = 0xff; +- descriptorStruct.mchStraps.padding[1041] = 0xff; +- descriptorStruct.mchStraps.padding[1042] = 0xff; +- descriptorStruct.mchStraps.padding[1043] = 0xff; +- descriptorStruct.mchStraps.padding[1044] = 0xff; +- descriptorStruct.mchStraps.padding[1045] = 0xff; +- descriptorStruct.mchStraps.padding[1046] = 0xff; +- descriptorStruct.mchStraps.padding[1047] = 0xff; +- descriptorStruct.mchStraps.padding[1048] = 0xff; +- descriptorStruct.mchStraps.padding[1049] = 0xff; +- descriptorStruct.mchStraps.padding[1050] = 0xff; +- descriptorStruct.mchStraps.padding[1051] = 0xff; +- descriptorStruct.mchStraps.padding[1052] = 0xff; +- descriptorStruct.mchStraps.padding[1053] = 0xff; +- descriptorStruct.mchStraps.padding[1054] = 0xff; +- descriptorStruct.mchStraps.padding[1055] = 0xff; +- descriptorStruct.mchStraps.padding[1056] = 0xff; +- descriptorStruct.mchStraps.padding[1057] = 0xff; +- descriptorStruct.mchStraps.padding[1058] = 0xff; +- descriptorStruct.mchStraps.padding[1059] = 0xff; +- descriptorStruct.mchStraps.padding[1060] = 0xff; +- descriptorStruct.mchStraps.padding[1061] = 0xff; +- descriptorStruct.mchStraps.padding[1062] = 0xff; +- descriptorStruct.mchStraps.padding[1063] = 0xff; +- descriptorStruct.mchStraps.padding[1064] = 0xff; +- descriptorStruct.mchStraps.padding[1065] = 0xff; +- descriptorStruct.mchStraps.padding[1066] = 0xff; +- descriptorStruct.mchStraps.padding[1067] = 0xff; +- descriptorStruct.mchStraps.padding[1068] = 0xff; +- descriptorStruct.mchStraps.padding[1069] = 0xff; +- descriptorStruct.mchStraps.padding[1070] = 0xff; +- descriptorStruct.mchStraps.padding[1071] = 0xff; +- descriptorStruct.mchStraps.padding[1072] = 0xff; +- descriptorStruct.mchStraps.padding[1073] = 0xff; +- descriptorStruct.mchStraps.padding[1074] = 0xff; +- descriptorStruct.mchStraps.padding[1075] = 0xff; +- descriptorStruct.mchStraps.padding[1076] = 0xff; +- descriptorStruct.mchStraps.padding[1077] = 0xff; +- descriptorStruct.mchStraps.padding[1078] = 0xff; +- descriptorStruct.mchStraps.padding[1079] = 0xff; +- descriptorStruct.mchStraps.padding[1080] = 0xff; +- descriptorStruct.mchStraps.padding[1081] = 0xff; +- descriptorStruct.mchStraps.padding[1082] = 0xff; +- descriptorStruct.mchStraps.padding[1083] = 0xff; +- descriptorStruct.mchStraps.padding[1084] = 0xff; +- descriptorStruct.mchStraps.padding[1085] = 0xff; +- descriptorStruct.mchStraps.padding[1086] = 0xff; +- descriptorStruct.mchStraps.padding[1087] = 0xff; +- descriptorStruct.mchStraps.padding[1088] = 0xff; +- descriptorStruct.mchStraps.padding[1089] = 0xff; +- descriptorStruct.mchStraps.padding[1090] = 0xff; +- descriptorStruct.mchStraps.padding[1091] = 0xff; +- descriptorStruct.mchStraps.padding[1092] = 0xff; +- descriptorStruct.mchStraps.padding[1093] = 0xff; +- descriptorStruct.mchStraps.padding[1094] = 0xff; +- descriptorStruct.mchStraps.padding[1095] = 0xff; +- descriptorStruct.mchStraps.padding[1096] = 0xff; +- descriptorStruct.mchStraps.padding[1097] = 0xff; +- descriptorStruct.mchStraps.padding[1098] = 0xff; +- descriptorStruct.mchStraps.padding[1099] = 0xff; +- descriptorStruct.mchStraps.padding[1100] = 0xff; +- descriptorStruct.mchStraps.padding[1101] = 0xff; +- descriptorStruct.mchStraps.padding[1102] = 0xff; +- descriptorStruct.mchStraps.padding[1103] = 0xff; +- descriptorStruct.mchStraps.padding[1104] = 0xff; +- descriptorStruct.mchStraps.padding[1105] = 0xff; +- descriptorStruct.mchStraps.padding[1106] = 0xff; +- descriptorStruct.mchStraps.padding[1107] = 0xff; +- descriptorStruct.mchStraps.padding[1108] = 0xff; +- descriptorStruct.mchStraps.padding[1109] = 0xff; +- descriptorStruct.mchStraps.padding[1110] = 0xff; +- descriptorStruct.mchStraps.padding[1111] = 0xff; +- descriptorStruct.mchStraps.padding[1112] = 0xff; +- descriptorStruct.mchStraps.padding[1113] = 0xff; +- descriptorStruct.mchStraps.padding[1114] = 0xff; +- descriptorStruct.mchStraps.padding[1115] = 0xff; +- descriptorStruct.mchStraps.padding[1116] = 0xff; +- descriptorStruct.mchStraps.padding[1117] = 0xff; +- descriptorStruct.mchStraps.padding[1118] = 0xff; +- descriptorStruct.mchStraps.padding[1119] = 0xff; +- descriptorStruct.mchStraps.padding[1120] = 0xff; +- descriptorStruct.mchStraps.padding[1121] = 0xff; +- descriptorStruct.mchStraps.padding[1122] = 0xff; +- descriptorStruct.mchStraps.padding[1123] = 0xff; +- descriptorStruct.mchStraps.padding[1124] = 0xff; +- descriptorStruct.mchStraps.padding[1125] = 0xff; +- descriptorStruct.mchStraps.padding[1126] = 0xff; +- descriptorStruct.mchStraps.padding[1127] = 0xff; +- descriptorStruct.mchStraps.padding[1128] = 0xff; +- descriptorStruct.mchStraps.padding[1129] = 0xff; +- descriptorStruct.mchStraps.padding[1130] = 0xff; +- descriptorStruct.mchStraps.padding[1131] = 0xff; +- descriptorStruct.mchStraps.padding[1132] = 0xff; +- descriptorStruct.mchStraps.padding[1133] = 0xff; +- descriptorStruct.mchStraps.padding[1134] = 0xff; +- descriptorStruct.mchStraps.padding[1135] = 0xff; +- descriptorStruct.mchStraps.padding[1136] = 0xff; +- descriptorStruct.mchStraps.padding[1137] = 0xff; +- descriptorStruct.mchStraps.padding[1138] = 0xff; +- descriptorStruct.mchStraps.padding[1139] = 0xff; +- descriptorStruct.mchStraps.padding[1140] = 0xff; +- descriptorStruct.mchStraps.padding[1141] = 0xff; +- descriptorStruct.mchStraps.padding[1142] = 0xff; +- descriptorStruct.mchStraps.padding[1143] = 0xff; +- descriptorStruct.mchStraps.padding[1144] = 0xff; +- descriptorStruct.mchStraps.padding[1145] = 0xff; +- descriptorStruct.mchStraps.padding[1146] = 0xff; +- descriptorStruct.mchStraps.padding[1147] = 0xff; +- descriptorStruct.mchStraps.padding[1148] = 0xff; +- descriptorStruct.mchStraps.padding[1149] = 0xff; +- descriptorStruct.mchStraps.padding[1150] = 0xff; +- descriptorStruct.mchStraps.padding[1151] = 0xff; +- descriptorStruct.mchStraps.padding[1152] = 0xff; +- descriptorStruct.mchStraps.padding[1153] = 0xff; +- descriptorStruct.mchStraps.padding[1154] = 0xff; +- descriptorStruct.mchStraps.padding[1155] = 0xff; +- descriptorStruct.mchStraps.padding[1156] = 0xff; +- descriptorStruct.mchStraps.padding[1157] = 0xff; +- descriptorStruct.mchStraps.padding[1158] = 0xff; +- descriptorStruct.mchStraps.padding[1159] = 0xff; +- descriptorStruct.mchStraps.padding[1160] = 0xff; +- descriptorStruct.mchStraps.padding[1161] = 0xff; +- descriptorStruct.mchStraps.padding[1162] = 0xff; +- descriptorStruct.mchStraps.padding[1163] = 0xff; +- descriptorStruct.mchStraps.padding[1164] = 0xff; +- descriptorStruct.mchStraps.padding[1165] = 0xff; +- descriptorStruct.mchStraps.padding[1166] = 0xff; +- descriptorStruct.mchStraps.padding[1167] = 0xff; +- descriptorStruct.mchStraps.padding[1168] = 0xff; +- descriptorStruct.mchStraps.padding[1169] = 0xff; +- descriptorStruct.mchStraps.padding[1170] = 0xff; +- descriptorStruct.mchStraps.padding[1171] = 0xff; +- descriptorStruct.mchStraps.padding[1172] = 0xff; +- descriptorStruct.mchStraps.padding[1173] = 0xff; +- descriptorStruct.mchStraps.padding[1174] = 0xff; +- descriptorStruct.mchStraps.padding[1175] = 0xff; +- descriptorStruct.mchStraps.padding[1176] = 0xff; +- descriptorStruct.mchStraps.padding[1177] = 0xff; +- descriptorStruct.mchStraps.padding[1178] = 0xff; +- descriptorStruct.mchStraps.padding[1179] = 0xff; +- descriptorStruct.mchStraps.padding[1180] = 0xff; +- descriptorStruct.mchStraps.padding[1181] = 0xff; +- descriptorStruct.mchStraps.padding[1182] = 0xff; +- descriptorStruct.mchStraps.padding[1183] = 0xff; +- descriptorStruct.mchStraps.padding[1184] = 0xff; +- descriptorStruct.mchStraps.padding[1185] = 0xff; +- descriptorStruct.mchStraps.padding[1186] = 0xff; +- descriptorStruct.mchStraps.padding[1187] = 0xff; +- descriptorStruct.mchStraps.padding[1188] = 0xff; +- descriptorStruct.mchStraps.padding[1189] = 0xff; +- descriptorStruct.mchStraps.padding[1190] = 0xff; +- descriptorStruct.mchStraps.padding[1191] = 0xff; +- descriptorStruct.mchStraps.padding[1192] = 0xff; +- descriptorStruct.mchStraps.padding[1193] = 0xff; +- descriptorStruct.mchStraps.padding[1194] = 0xff; +- descriptorStruct.mchStraps.padding[1195] = 0xff; +- descriptorStruct.mchStraps.padding[1196] = 0xff; +- descriptorStruct.mchStraps.padding[1197] = 0xff; +- descriptorStruct.mchStraps.padding[1198] = 0xff; +- descriptorStruct.mchStraps.padding[1199] = 0xff; +- descriptorStruct.mchStraps.padding[1200] = 0xff; +- descriptorStruct.mchStraps.padding[1201] = 0xff; +- descriptorStruct.mchStraps.padding[1202] = 0xff; +- descriptorStruct.mchStraps.padding[1203] = 0xff; +- descriptorStruct.mchStraps.padding[1204] = 0xff; +- descriptorStruct.mchStraps.padding[1205] = 0xff; +- descriptorStruct.mchStraps.padding[1206] = 0xff; +- descriptorStruct.mchStraps.padding[1207] = 0xff; +- descriptorStruct.mchStraps.padding[1208] = 0xff; +- descriptorStruct.mchStraps.padding[1209] = 0xff; +- descriptorStruct.mchStraps.padding[1210] = 0xff; +- descriptorStruct.mchStraps.padding[1211] = 0xff; +- descriptorStruct.mchStraps.padding[1212] = 0xff; +- descriptorStruct.mchStraps.padding[1213] = 0xff; +- descriptorStruct.mchStraps.padding[1214] = 0xff; +- descriptorStruct.mchStraps.padding[1215] = 0xff; +- descriptorStruct.mchStraps.padding[1216] = 0xff; +- descriptorStruct.mchStraps.padding[1217] = 0xff; +- descriptorStruct.mchStraps.padding[1218] = 0xff; +- descriptorStruct.mchStraps.padding[1219] = 0xff; +- descriptorStruct.mchStraps.padding[1220] = 0xff; +- descriptorStruct.mchStraps.padding[1221] = 0xff; +- descriptorStruct.mchStraps.padding[1222] = 0xff; +- descriptorStruct.mchStraps.padding[1223] = 0xff; +- descriptorStruct.mchStraps.padding[1224] = 0xff; +- descriptorStruct.mchStraps.padding[1225] = 0xff; +- descriptorStruct.mchStraps.padding[1226] = 0xff; +- descriptorStruct.mchStraps.padding[1227] = 0xff; +- descriptorStruct.mchStraps.padding[1228] = 0xff; +- descriptorStruct.mchStraps.padding[1229] = 0xff; +- descriptorStruct.mchStraps.padding[1230] = 0xff; +- descriptorStruct.mchStraps.padding[1231] = 0xff; +- descriptorStruct.mchStraps.padding[1232] = 0xff; +- descriptorStruct.mchStraps.padding[1233] = 0xff; +- descriptorStruct.mchStraps.padding[1234] = 0xff; +- descriptorStruct.mchStraps.padding[1235] = 0xff; +- descriptorStruct.mchStraps.padding[1236] = 0xff; +- descriptorStruct.mchStraps.padding[1237] = 0xff; +- descriptorStruct.mchStraps.padding[1238] = 0xff; +- descriptorStruct.mchStraps.padding[1239] = 0xff; +- descriptorStruct.mchStraps.padding[1240] = 0xff; +- descriptorStruct.mchStraps.padding[1241] = 0xff; +- descriptorStruct.mchStraps.padding[1242] = 0xff; +- descriptorStruct.mchStraps.padding[1243] = 0xff; +- descriptorStruct.mchStraps.padding[1244] = 0xff; +- descriptorStruct.mchStraps.padding[1245] = 0xff; +- descriptorStruct.mchStraps.padding[1246] = 0xff; +- descriptorStruct.mchStraps.padding[1247] = 0xff; +- descriptorStruct.mchStraps.padding[1248] = 0xff; +- descriptorStruct.mchStraps.padding[1249] = 0xff; +- descriptorStruct.mchStraps.padding[1250] = 0xff; +- descriptorStruct.mchStraps.padding[1251] = 0xff; +- descriptorStruct.mchStraps.padding[1252] = 0xff; +- descriptorStruct.mchStraps.padding[1253] = 0xff; +- descriptorStruct.mchStraps.padding[1254] = 0xff; +- descriptorStruct.mchStraps.padding[1255] = 0xff; +- descriptorStruct.mchStraps.padding[1256] = 0xff; +- descriptorStruct.mchStraps.padding[1257] = 0xff; +- descriptorStruct.mchStraps.padding[1258] = 0xff; +- descriptorStruct.mchStraps.padding[1259] = 0xff; +- descriptorStruct.mchStraps.padding[1260] = 0xff; +- descriptorStruct.mchStraps.padding[1261] = 0xff; +- descriptorStruct.mchStraps.padding[1262] = 0xff; +- descriptorStruct.mchStraps.padding[1263] = 0xff; +- descriptorStruct.mchStraps.padding[1264] = 0xff; +- descriptorStruct.mchStraps.padding[1265] = 0xff; +- descriptorStruct.mchStraps.padding[1266] = 0xff; +- descriptorStruct.mchStraps.padding[1267] = 0xff; +- descriptorStruct.mchStraps.padding[1268] = 0xff; +- descriptorStruct.mchStraps.padding[1269] = 0xff; +- descriptorStruct.mchStraps.padding[1270] = 0xff; +- descriptorStruct.mchStraps.padding[1271] = 0xff; +- descriptorStruct.mchStraps.padding[1272] = 0xff; +- descriptorStruct.mchStraps.padding[1273] = 0xff; +- descriptorStruct.mchStraps.padding[1274] = 0xff; +- descriptorStruct.mchStraps.padding[1275] = 0xff; +- descriptorStruct.mchStraps.padding[1276] = 0xff; +- descriptorStruct.mchStraps.padding[1277] = 0xff; +- descriptorStruct.mchStraps.padding[1278] = 0xff; +- descriptorStruct.mchStraps.padding[1279] = 0xff; +- descriptorStruct.mchStraps.padding[1280] = 0xff; +- descriptorStruct.mchStraps.padding[1281] = 0xff; +- descriptorStruct.mchStraps.padding[1282] = 0xff; +- descriptorStruct.mchStraps.padding[1283] = 0xff; +- descriptorStruct.mchStraps.padding[1284] = 0xff; +- descriptorStruct.mchStraps.padding[1285] = 0xff; +- descriptorStruct.mchStraps.padding[1286] = 0xff; +- descriptorStruct.mchStraps.padding[1287] = 0xff; +- descriptorStruct.mchStraps.padding[1288] = 0xff; +- descriptorStruct.mchStraps.padding[1289] = 0xff; +- descriptorStruct.mchStraps.padding[1290] = 0xff; +- descriptorStruct.mchStraps.padding[1291] = 0xff; +- descriptorStruct.mchStraps.padding[1292] = 0xff; +- descriptorStruct.mchStraps.padding[1293] = 0xff; +- descriptorStruct.mchStraps.padding[1294] = 0xff; +- descriptorStruct.mchStraps.padding[1295] = 0xff; +- descriptorStruct.mchStraps.padding[1296] = 0xff; +- descriptorStruct.mchStraps.padding[1297] = 0xff; +- descriptorStruct.mchStraps.padding[1298] = 0xff; +- descriptorStruct.mchStraps.padding[1299] = 0xff; +- descriptorStruct.mchStraps.padding[1300] = 0xff; +- descriptorStruct.mchStraps.padding[1301] = 0xff; +- descriptorStruct.mchStraps.padding[1302] = 0xff; +- descriptorStruct.mchStraps.padding[1303] = 0xff; +- descriptorStruct.mchStraps.padding[1304] = 0xff; +- descriptorStruct.mchStraps.padding[1305] = 0xff; +- descriptorStruct.mchStraps.padding[1306] = 0xff; +- descriptorStruct.mchStraps.padding[1307] = 0xff; +- descriptorStruct.mchStraps.padding[1308] = 0xff; +- descriptorStruct.mchStraps.padding[1309] = 0xff; +- descriptorStruct.mchStraps.padding[1310] = 0xff; +- descriptorStruct.mchStraps.padding[1311] = 0xff; +- descriptorStruct.mchStraps.padding[1312] = 0xff; +- descriptorStruct.mchStraps.padding[1313] = 0xff; +- descriptorStruct.mchStraps.padding[1314] = 0xff; +- descriptorStruct.mchStraps.padding[1315] = 0xff; +- descriptorStruct.mchStraps.padding[1316] = 0xff; +- descriptorStruct.mchStraps.padding[1317] = 0xff; +- descriptorStruct.mchStraps.padding[1318] = 0xff; +- descriptorStruct.mchStraps.padding[1319] = 0xff; +- descriptorStruct.mchStraps.padding[1320] = 0xff; +- descriptorStruct.mchStraps.padding[1321] = 0xff; +- descriptorStruct.mchStraps.padding[1322] = 0xff; +- descriptorStruct.mchStraps.padding[1323] = 0xff; +- descriptorStruct.mchStraps.padding[1324] = 0xff; +- descriptorStruct.mchStraps.padding[1325] = 0xff; +- descriptorStruct.mchStraps.padding[1326] = 0xff; +- descriptorStruct.mchStraps.padding[1327] = 0xff; +- descriptorStruct.mchStraps.padding[1328] = 0xff; +- descriptorStruct.mchStraps.padding[1329] = 0xff; +- descriptorStruct.mchStraps.padding[1330] = 0xff; +- descriptorStruct.mchStraps.padding[1331] = 0xff; +- descriptorStruct.mchStraps.padding[1332] = 0xff; +- descriptorStruct.mchStraps.padding[1333] = 0xff; +- descriptorStruct.mchStraps.padding[1334] = 0xff; +- descriptorStruct.mchStraps.padding[1335] = 0xff; +- descriptorStruct.mchStraps.padding[1336] = 0xff; +- descriptorStruct.mchStraps.padding[1337] = 0xff; +- descriptorStruct.mchStraps.padding[1338] = 0xff; +- descriptorStruct.mchStraps.padding[1339] = 0xff; +- descriptorStruct.mchStraps.padding[1340] = 0xff; +- descriptorStruct.mchStraps.padding[1341] = 0xff; +- descriptorStruct.mchStraps.padding[1342] = 0xff; +- descriptorStruct.mchStraps.padding[1343] = 0xff; +- descriptorStruct.mchStraps.padding[1344] = 0xff; +- descriptorStruct.mchStraps.padding[1345] = 0xff; +- descriptorStruct.mchStraps.padding[1346] = 0xff; +- descriptorStruct.mchStraps.padding[1347] = 0xff; +- descriptorStruct.mchStraps.padding[1348] = 0xff; +- descriptorStruct.mchStraps.padding[1349] = 0xff; +- descriptorStruct.mchStraps.padding[1350] = 0xff; +- descriptorStruct.mchStraps.padding[1351] = 0xff; +- descriptorStruct.mchStraps.padding[1352] = 0xff; +- descriptorStruct.mchStraps.padding[1353] = 0xff; +- descriptorStruct.mchStraps.padding[1354] = 0xff; +- descriptorStruct.mchStraps.padding[1355] = 0xff; +- descriptorStruct.mchStraps.padding[1356] = 0xff; +- descriptorStruct.mchStraps.padding[1357] = 0xff; +- descriptorStruct.mchStraps.padding[1358] = 0xff; +- descriptorStruct.mchStraps.padding[1359] = 0xff; +- descriptorStruct.mchStraps.padding[1360] = 0xff; +- descriptorStruct.mchStraps.padding[1361] = 0xff; +- descriptorStruct.mchStraps.padding[1362] = 0xff; +- descriptorStruct.mchStraps.padding[1363] = 0xff; +- descriptorStruct.mchStraps.padding[1364] = 0xff; +- descriptorStruct.mchStraps.padding[1365] = 0xff; +- descriptorStruct.mchStraps.padding[1366] = 0xff; +- descriptorStruct.mchStraps.padding[1367] = 0xff; +- descriptorStruct.mchStraps.padding[1368] = 0xff; +- descriptorStruct.mchStraps.padding[1369] = 0xff; +- descriptorStruct.mchStraps.padding[1370] = 0xff; +- descriptorStruct.mchStraps.padding[1371] = 0xff; +- descriptorStruct.mchStraps.padding[1372] = 0xff; +- descriptorStruct.mchStraps.padding[1373] = 0xff; +- descriptorStruct.mchStraps.padding[1374] = 0xff; +- descriptorStruct.mchStraps.padding[1375] = 0xff; +- descriptorStruct.mchStraps.padding[1376] = 0xff; +- descriptorStruct.mchStraps.padding[1377] = 0xff; +- descriptorStruct.mchStraps.padding[1378] = 0xff; +- descriptorStruct.mchStraps.padding[1379] = 0xff; +- descriptorStruct.mchStraps.padding[1380] = 0xff; +- descriptorStruct.mchStraps.padding[1381] = 0xff; +- descriptorStruct.mchStraps.padding[1382] = 0xff; +- descriptorStruct.mchStraps.padding[1383] = 0xff; +- descriptorStruct.mchStraps.padding[1384] = 0xff; +- descriptorStruct.mchStraps.padding[1385] = 0xff; +- descriptorStruct.mchStraps.padding[1386] = 0xff; +- descriptorStruct.mchStraps.padding[1387] = 0xff; +- descriptorStruct.mchStraps.padding[1388] = 0xff; +- descriptorStruct.mchStraps.padding[1389] = 0xff; +- descriptorStruct.mchStraps.padding[1390] = 0xff; +- descriptorStruct.mchStraps.padding[1391] = 0xff; +- descriptorStruct.mchStraps.padding[1392] = 0xff; +- descriptorStruct.mchStraps.padding[1393] = 0xff; +- descriptorStruct.mchStraps.padding[1394] = 0xff; +- descriptorStruct.mchStraps.padding[1395] = 0xff; +- descriptorStruct.mchStraps.padding[1396] = 0xff; +- descriptorStruct.mchStraps.padding[1397] = 0xff; +- descriptorStruct.mchStraps.padding[1398] = 0xff; +- descriptorStruct.mchStraps.padding[1399] = 0xff; +- descriptorStruct.mchStraps.padding[1400] = 0xff; +- descriptorStruct.mchStraps.padding[1401] = 0xff; +- descriptorStruct.mchStraps.padding[1402] = 0xff; +- descriptorStruct.mchStraps.padding[1403] = 0xff; +- descriptorStruct.mchStraps.padding[1404] = 0xff; +- descriptorStruct.mchStraps.padding[1405] = 0xff; +- descriptorStruct.mchStraps.padding[1406] = 0xff; +- descriptorStruct.mchStraps.padding[1407] = 0xff; +- descriptorStruct.mchStraps.padding[1408] = 0xff; +- descriptorStruct.mchStraps.padding[1409] = 0xff; +- descriptorStruct.mchStraps.padding[1410] = 0xff; +- descriptorStruct.mchStraps.padding[1411] = 0xff; +- descriptorStruct.mchStraps.padding[1412] = 0xff; +- descriptorStruct.mchStraps.padding[1413] = 0xff; +- descriptorStruct.mchStraps.padding[1414] = 0xff; +- descriptorStruct.mchStraps.padding[1415] = 0xff; +- descriptorStruct.mchStraps.padding[1416] = 0xff; +- descriptorStruct.mchStraps.padding[1417] = 0xff; +- descriptorStruct.mchStraps.padding[1418] = 0xff; +- descriptorStruct.mchStraps.padding[1419] = 0xff; +- descriptorStruct.mchStraps.padding[1420] = 0xff; +- descriptorStruct.mchStraps.padding[1421] = 0xff; +- descriptorStruct.mchStraps.padding[1422] = 0xff; +- descriptorStruct.mchStraps.padding[1423] = 0xff; +- descriptorStruct.mchStraps.padding[1424] = 0xff; +- descriptorStruct.mchStraps.padding[1425] = 0xff; +- descriptorStruct.mchStraps.padding[1426] = 0xff; +- descriptorStruct.mchStraps.padding[1427] = 0xff; +- descriptorStruct.mchStraps.padding[1428] = 0xff; +- descriptorStruct.mchStraps.padding[1429] = 0xff; +- descriptorStruct.mchStraps.padding[1430] = 0xff; +- descriptorStruct.mchStraps.padding[1431] = 0xff; +- descriptorStruct.mchStraps.padding[1432] = 0xff; +- descriptorStruct.mchStraps.padding[1433] = 0xff; +- descriptorStruct.mchStraps.padding[1434] = 0xff; +- descriptorStruct.mchStraps.padding[1435] = 0xff; +- descriptorStruct.mchStraps.padding[1436] = 0xff; +- descriptorStruct.mchStraps.padding[1437] = 0xff; +- descriptorStruct.mchStraps.padding[1438] = 0xff; +- descriptorStruct.mchStraps.padding[1439] = 0xff; +- descriptorStruct.mchStraps.padding[1440] = 0xff; +- descriptorStruct.mchStraps.padding[1441] = 0xff; +- descriptorStruct.mchStraps.padding[1442] = 0xff; +- descriptorStruct.mchStraps.padding[1443] = 0xff; +- descriptorStruct.mchStraps.padding[1444] = 0xff; +- descriptorStruct.mchStraps.padding[1445] = 0xff; +- descriptorStruct.mchStraps.padding[1446] = 0xff; +- descriptorStruct.mchStraps.padding[1447] = 0xff; +- descriptorStruct.mchStraps.padding[1448] = 0xff; +- descriptorStruct.mchStraps.padding[1449] = 0xff; +- descriptorStruct.mchStraps.padding[1450] = 0xff; +- descriptorStruct.mchStraps.padding[1451] = 0xff; +- descriptorStruct.mchStraps.padding[1452] = 0xff; +- descriptorStruct.mchStraps.padding[1453] = 0xff; +- descriptorStruct.mchStraps.padding[1454] = 0xff; +- descriptorStruct.mchStraps.padding[1455] = 0xff; +- descriptorStruct.mchStraps.padding[1456] = 0xff; +- descriptorStruct.mchStraps.padding[1457] = 0xff; +- descriptorStruct.mchStraps.padding[1458] = 0xff; +- descriptorStruct.mchStraps.padding[1459] = 0xff; +- descriptorStruct.mchStraps.padding[1460] = 0xff; +- descriptorStruct.mchStraps.padding[1461] = 0xff; +- descriptorStruct.mchStraps.padding[1462] = 0xff; +- descriptorStruct.mchStraps.padding[1463] = 0xff; +- descriptorStruct.mchStraps.padding[1464] = 0xff; +- descriptorStruct.mchStraps.padding[1465] = 0xff; +- descriptorStruct.mchStraps.padding[1466] = 0xff; +- descriptorStruct.mchStraps.padding[1467] = 0xff; +- descriptorStruct.mchStraps.padding[1468] = 0xff; +- descriptorStruct.mchStraps.padding[1469] = 0xff; +- descriptorStruct.mchStraps.padding[1470] = 0xff; +- descriptorStruct.mchStraps.padding[1471] = 0xff; +- descriptorStruct.mchStraps.padding[1472] = 0xff; +- descriptorStruct.mchStraps.padding[1473] = 0xff; +- descriptorStruct.mchStraps.padding[1474] = 0xff; +- descriptorStruct.mchStraps.padding[1475] = 0xff; +- descriptorStruct.mchStraps.padding[1476] = 0xff; +- descriptorStruct.mchStraps.padding[1477] = 0xff; +- descriptorStruct.mchStraps.padding[1478] = 0xff; +- descriptorStruct.mchStraps.padding[1479] = 0xff; +- descriptorStruct.mchStraps.padding[1480] = 0xff; +- descriptorStruct.mchStraps.padding[1481] = 0xff; +- descriptorStruct.mchStraps.padding[1482] = 0xff; +- descriptorStruct.mchStraps.padding[1483] = 0xff; +- descriptorStruct.mchStraps.padding[1484] = 0xff; +- descriptorStruct.mchStraps.padding[1485] = 0xff; +- descriptorStruct.mchStraps.padding[1486] = 0xff; +- descriptorStruct.mchStraps.padding[1487] = 0xff; +- descriptorStruct.mchStraps.padding[1488] = 0xff; +- descriptorStruct.mchStraps.padding[1489] = 0xff; +- descriptorStruct.mchStraps.padding[1490] = 0xff; +- descriptorStruct.mchStraps.padding[1491] = 0xff; +- descriptorStruct.mchStraps.padding[1492] = 0xff; +- descriptorStruct.mchStraps.padding[1493] = 0xff; +- descriptorStruct.mchStraps.padding[1494] = 0xff; +- descriptorStruct.mchStraps.padding[1495] = 0xff; +- descriptorStruct.mchStraps.padding[1496] = 0xff; +- descriptorStruct.mchStraps.padding[1497] = 0xff; +- descriptorStruct.mchStraps.padding[1498] = 0xff; +- descriptorStruct.mchStraps.padding[1499] = 0xff; +- descriptorStruct.mchStraps.padding[1500] = 0xff; +- descriptorStruct.mchStraps.padding[1501] = 0xff; +- descriptorStruct.mchStraps.padding[1502] = 0xff; +- descriptorStruct.mchStraps.padding[1503] = 0xff; +- descriptorStruct.mchStraps.padding[1504] = 0xff; +- descriptorStruct.mchStraps.padding[1505] = 0xff; +- descriptorStruct.mchStraps.padding[1506] = 0xff; +- descriptorStruct.mchStraps.padding[1507] = 0xff; +- descriptorStruct.mchStraps.padding[1508] = 0xff; +- descriptorStruct.mchStraps.padding[1509] = 0xff; +- descriptorStruct.mchStraps.padding[1510] = 0xff; +- descriptorStruct.mchStraps.padding[1511] = 0xff; +- descriptorStruct.mchStraps.padding[1512] = 0xff; +- descriptorStruct.mchStraps.padding[1513] = 0xff; +- descriptorStruct.mchStraps.padding[1514] = 0xff; +- descriptorStruct.mchStraps.padding[1515] = 0xff; +- descriptorStruct.mchStraps.padding[1516] = 0xff; +- descriptorStruct.mchStraps.padding[1517] = 0xff; +- descriptorStruct.mchStraps.padding[1518] = 0xff; +- descriptorStruct.mchStraps.padding[1519] = 0xff; +- descriptorStruct.mchStraps.padding[1520] = 0xff; +- descriptorStruct.mchStraps.padding[1521] = 0xff; +- descriptorStruct.mchStraps.padding[1522] = 0xff; +- descriptorStruct.mchStraps.padding[1523] = 0xff; +- descriptorStruct.mchStraps.padding[1524] = 0xff; +- descriptorStruct.mchStraps.padding[1525] = 0xff; +- descriptorStruct.mchStraps.padding[1526] = 0xff; +- descriptorStruct.mchStraps.padding[1527] = 0xff; +- descriptorStruct.mchStraps.padding[1528] = 0xff; +- descriptorStruct.mchStraps.padding[1529] = 0xff; +- descriptorStruct.mchStraps.padding[1530] = 0xff; +- descriptorStruct.mchStraps.padding[1531] = 0xff; +- descriptorStruct.mchStraps.padding[1532] = 0xff; +- descriptorStruct.mchStraps.padding[1533] = 0xff; +- descriptorStruct.mchStraps.padding[1534] = 0xff; +- descriptorStruct.mchStraps.padding[1535] = 0xff; +- descriptorStruct.mchStraps.padding[1536] = 0xff; +- descriptorStruct.mchStraps.padding[1537] = 0xff; +- descriptorStruct.mchStraps.padding[1538] = 0xff; +- descriptorStruct.mchStraps.padding[1539] = 0xff; +- descriptorStruct.mchStraps.padding[1540] = 0xff; +- descriptorStruct.mchStraps.padding[1541] = 0xff; +- descriptorStruct.mchStraps.padding[1542] = 0xff; +- descriptorStruct.mchStraps.padding[1543] = 0xff; +- descriptorStruct.mchStraps.padding[1544] = 0xff; +- descriptorStruct.mchStraps.padding[1545] = 0xff; +- descriptorStruct.mchStraps.padding[1546] = 0xff; +- descriptorStruct.mchStraps.padding[1547] = 0xff; +- descriptorStruct.mchStraps.padding[1548] = 0xff; +- descriptorStruct.mchStraps.padding[1549] = 0xff; +- descriptorStruct.mchStraps.padding[1550] = 0xff; +- descriptorStruct.mchStraps.padding[1551] = 0xff; +- descriptorStruct.mchStraps.padding[1552] = 0xff; +- descriptorStruct.mchStraps.padding[1553] = 0xff; +- descriptorStruct.mchStraps.padding[1554] = 0xff; +- descriptorStruct.mchStraps.padding[1555] = 0xff; +- descriptorStruct.mchStraps.padding[1556] = 0xff; +- descriptorStruct.mchStraps.padding[1557] = 0xff; +- descriptorStruct.mchStraps.padding[1558] = 0xff; +- descriptorStruct.mchStraps.padding[1559] = 0xff; +- descriptorStruct.mchStraps.padding[1560] = 0xff; +- descriptorStruct.mchStraps.padding[1561] = 0xff; +- descriptorStruct.mchStraps.padding[1562] = 0xff; +- descriptorStruct.mchStraps.padding[1563] = 0xff; +- descriptorStruct.mchStraps.padding[1564] = 0xff; +- descriptorStruct.mchStraps.padding[1565] = 0xff; +- descriptorStruct.mchStraps.padding[1566] = 0xff; +- descriptorStruct.mchStraps.padding[1567] = 0xff; +- descriptorStruct.mchStraps.padding[1568] = 0xff; +- descriptorStruct.mchStraps.padding[1569] = 0xff; +- descriptorStruct.mchStraps.padding[1570] = 0xff; +- descriptorStruct.mchStraps.padding[1571] = 0xff; +- descriptorStruct.mchStraps.padding[1572] = 0xff; +- descriptorStruct.mchStraps.padding[1573] = 0xff; +- descriptorStruct.mchStraps.padding[1574] = 0xff; +- descriptorStruct.mchStraps.padding[1575] = 0xff; +- descriptorStruct.mchStraps.padding[1576] = 0xff; +- descriptorStruct.mchStraps.padding[1577] = 0xff; +- descriptorStruct.mchStraps.padding[1578] = 0xff; +- descriptorStruct.mchStraps.padding[1579] = 0xff; +- descriptorStruct.mchStraps.padding[1580] = 0xff; +- descriptorStruct.mchStraps.padding[1581] = 0xff; +- descriptorStruct.mchStraps.padding[1582] = 0xff; +- descriptorStruct.mchStraps.padding[1583] = 0xff; +- descriptorStruct.mchStraps.padding[1584] = 0xff; +- descriptorStruct.mchStraps.padding[1585] = 0xff; +- descriptorStruct.mchStraps.padding[1586] = 0xff; +- descriptorStruct.mchStraps.padding[1587] = 0xff; +- descriptorStruct.mchStraps.padding[1588] = 0xff; +- descriptorStruct.mchStraps.padding[1589] = 0xff; +- descriptorStruct.mchStraps.padding[1590] = 0xff; +- descriptorStruct.mchStraps.padding[1591] = 0xff; +- descriptorStruct.mchStraps.padding[1592] = 0xff; +- descriptorStruct.mchStraps.padding[1593] = 0xff; +- descriptorStruct.mchStraps.padding[1594] = 0xff; +- descriptorStruct.mchStraps.padding[1595] = 0xff; +- descriptorStruct.mchStraps.padding[1596] = 0xff; +- descriptorStruct.mchStraps.padding[1597] = 0xff; +- descriptorStruct.mchStraps.padding[1598] = 0xff; +- descriptorStruct.mchStraps.padding[1599] = 0xff; +- descriptorStruct.mchStraps.padding[1600] = 0xff; +- descriptorStruct.mchStraps.padding[1601] = 0xff; +- descriptorStruct.mchStraps.padding[1602] = 0xff; +- descriptorStruct.mchStraps.padding[1603] = 0xff; +- descriptorStruct.mchStraps.padding[1604] = 0xff; +- descriptorStruct.mchStraps.padding[1605] = 0xff; +- descriptorStruct.mchStraps.padding[1606] = 0xff; +- descriptorStruct.mchStraps.padding[1607] = 0xff; +- descriptorStruct.mchStraps.padding[1608] = 0xff; +- descriptorStruct.mchStraps.padding[1609] = 0xff; +- descriptorStruct.mchStraps.padding[1610] = 0xff; +- descriptorStruct.mchStraps.padding[1611] = 0xff; +- descriptorStruct.mchStraps.padding[1612] = 0xff; +- descriptorStruct.mchStraps.padding[1613] = 0xff; +- descriptorStruct.mchStraps.padding[1614] = 0xff; +- descriptorStruct.mchStraps.padding[1615] = 0xff; +- descriptorStruct.mchStraps.padding[1616] = 0xff; +- descriptorStruct.mchStraps.padding[1617] = 0xff; +- descriptorStruct.mchStraps.padding[1618] = 0xff; +- descriptorStruct.mchStraps.padding[1619] = 0xff; +- descriptorStruct.mchStraps.padding[1620] = 0xff; +- descriptorStruct.mchStraps.padding[1621] = 0xff; +- descriptorStruct.mchStraps.padding[1622] = 0xff; +- descriptorStruct.mchStraps.padding[1623] = 0xff; +- descriptorStruct.mchStraps.padding[1624] = 0xff; +- descriptorStruct.mchStraps.padding[1625] = 0xff; +- descriptorStruct.mchStraps.padding[1626] = 0xff; +- descriptorStruct.mchStraps.padding[1627] = 0xff; +- descriptorStruct.mchStraps.padding[1628] = 0xff; +- descriptorStruct.mchStraps.padding[1629] = 0xff; +- descriptorStruct.mchStraps.padding[1630] = 0xff; +- descriptorStruct.mchStraps.padding[1631] = 0xff; +- descriptorStruct.mchStraps.padding[1632] = 0xff; +- descriptorStruct.mchStraps.padding[1633] = 0xff; +- descriptorStruct.mchStraps.padding[1634] = 0xff; +- descriptorStruct.mchStraps.padding[1635] = 0xff; +- descriptorStruct.mchStraps.padding[1636] = 0xff; +- descriptorStruct.mchStraps.padding[1637] = 0xff; +- descriptorStruct.mchStraps.padding[1638] = 0xff; +- descriptorStruct.mchStraps.padding[1639] = 0xff; +- descriptorStruct.mchStraps.padding[1640] = 0xff; +- descriptorStruct.mchStraps.padding[1641] = 0xff; +- descriptorStruct.mchStraps.padding[1642] = 0xff; +- descriptorStruct.mchStraps.padding[1643] = 0xff; +- descriptorStruct.mchStraps.padding[1644] = 0xff; +- descriptorStruct.mchStraps.padding[1645] = 0xff; +- descriptorStruct.mchStraps.padding[1646] = 0xff; +- descriptorStruct.mchStraps.padding[1647] = 0xff; +- descriptorStruct.mchStraps.padding[1648] = 0xff; +- descriptorStruct.mchStraps.padding[1649] = 0xff; +- descriptorStruct.mchStraps.padding[1650] = 0xff; +- descriptorStruct.mchStraps.padding[1651] = 0xff; +- descriptorStruct.mchStraps.padding[1652] = 0xff; +- descriptorStruct.mchStraps.padding[1653] = 0xff; +- descriptorStruct.mchStraps.padding[1654] = 0xff; +- descriptorStruct.mchStraps.padding[1655] = 0xff; +- descriptorStruct.mchStraps.padding[1656] = 0xff; +- descriptorStruct.mchStraps.padding[1657] = 0xff; +- descriptorStruct.mchStraps.padding[1658] = 0xff; +- descriptorStruct.mchStraps.padding[1659] = 0xff; +- descriptorStruct.mchStraps.padding[1660] = 0xff; +- descriptorStruct.mchStraps.padding[1661] = 0xff; +- descriptorStruct.mchStraps.padding[1662] = 0xff; +- descriptorStruct.mchStraps.padding[1663] = 0xff; +- descriptorStruct.mchStraps.padding[1664] = 0xff; +- descriptorStruct.mchStraps.padding[1665] = 0xff; +- descriptorStruct.mchStraps.padding[1666] = 0xff; +- descriptorStruct.mchStraps.padding[1667] = 0xff; +- descriptorStruct.mchStraps.padding[1668] = 0xff; +- descriptorStruct.mchStraps.padding[1669] = 0xff; +- descriptorStruct.mchStraps.padding[1670] = 0xff; +- descriptorStruct.mchStraps.padding[1671] = 0xff; +- descriptorStruct.mchStraps.padding[1672] = 0xff; +- descriptorStruct.mchStraps.padding[1673] = 0xff; +- descriptorStruct.mchStraps.padding[1674] = 0xff; +- descriptorStruct.mchStraps.padding[1675] = 0xff; +- descriptorStruct.mchStraps.padding[1676] = 0xff; +- descriptorStruct.mchStraps.padding[1677] = 0xff; +- descriptorStruct.mchStraps.padding[1678] = 0xff; +- descriptorStruct.mchStraps.padding[1679] = 0xff; +- descriptorStruct.mchStraps.padding[1680] = 0xff; +- descriptorStruct.mchStraps.padding[1681] = 0xff; +- descriptorStruct.mchStraps.padding[1682] = 0xff; +- descriptorStruct.mchStraps.padding[1683] = 0xff; +- descriptorStruct.mchStraps.padding[1684] = 0xff; +- descriptorStruct.mchStraps.padding[1685] = 0xff; +- descriptorStruct.mchStraps.padding[1686] = 0xff; +- descriptorStruct.mchStraps.padding[1687] = 0xff; +- descriptorStruct.mchStraps.padding[1688] = 0xff; +- descriptorStruct.mchStraps.padding[1689] = 0xff; +- descriptorStruct.mchStraps.padding[1690] = 0xff; +- descriptorStruct.mchStraps.padding[1691] = 0xff; +- descriptorStruct.mchStraps.padding[1692] = 0xff; +- descriptorStruct.mchStraps.padding[1693] = 0xff; +- descriptorStruct.mchStraps.padding[1694] = 0xff; +- descriptorStruct.mchStraps.padding[1695] = 0xff; +- descriptorStruct.mchStraps.padding[1696] = 0xff; +- descriptorStruct.mchStraps.padding[1697] = 0xff; +- descriptorStruct.mchStraps.padding[1698] = 0xff; +- descriptorStruct.mchStraps.padding[1699] = 0xff; +- descriptorStruct.mchStraps.padding[1700] = 0xff; +- descriptorStruct.mchStraps.padding[1701] = 0xff; +- descriptorStruct.mchStraps.padding[1702] = 0xff; +- descriptorStruct.mchStraps.padding[1703] = 0xff; +- descriptorStruct.mchStraps.padding[1704] = 0xff; +- descriptorStruct.mchStraps.padding[1705] = 0xff; +- descriptorStruct.mchStraps.padding[1706] = 0xff; +- descriptorStruct.mchStraps.padding[1707] = 0xff; +- descriptorStruct.mchStraps.padding[1708] = 0xff; +- descriptorStruct.mchStraps.padding[1709] = 0xff; +- descriptorStruct.mchStraps.padding[1710] = 0xff; +- descriptorStruct.mchStraps.padding[1711] = 0xff; +- descriptorStruct.mchStraps.padding[1712] = 0xff; +- descriptorStruct.mchStraps.padding[1713] = 0xff; +- descriptorStruct.mchStraps.padding[1714] = 0xff; +- descriptorStruct.mchStraps.padding[1715] = 0xff; +- descriptorStruct.mchStraps.padding[1716] = 0xff; +- descriptorStruct.mchStraps.padding[1717] = 0xff; +- descriptorStruct.mchStraps.padding[1718] = 0xff; +- descriptorStruct.mchStraps.padding[1719] = 0xff; +- descriptorStruct.mchStraps.padding[1720] = 0xff; +- descriptorStruct.mchStraps.padding[1721] = 0xff; +- descriptorStruct.mchStraps.padding[1722] = 0xff; +- descriptorStruct.mchStraps.padding[1723] = 0xff; +- descriptorStruct.mchStraps.padding[1724] = 0xff; +- descriptorStruct.mchStraps.padding[1725] = 0xff; +- descriptorStruct.mchStraps.padding[1726] = 0xff; +- descriptorStruct.mchStraps.padding[1727] = 0xff; +- descriptorStruct.mchStraps.padding[1728] = 0xff; +- descriptorStruct.mchStraps.padding[1729] = 0xff; +- descriptorStruct.mchStraps.padding[1730] = 0xff; +- descriptorStruct.mchStraps.padding[1731] = 0xff; +- descriptorStruct.mchStraps.padding[1732] = 0xff; +- descriptorStruct.mchStraps.padding[1733] = 0xff; +- descriptorStruct.mchStraps.padding[1734] = 0xff; +- descriptorStruct.mchStraps.padding[1735] = 0xff; +- descriptorStruct.mchStraps.padding[1736] = 0xff; +- descriptorStruct.mchStraps.padding[1737] = 0xff; +- descriptorStruct.mchStraps.padding[1738] = 0xff; +- descriptorStruct.mchStraps.padding[1739] = 0xff; +- descriptorStruct.mchStraps.padding[1740] = 0xff; +- descriptorStruct.mchStraps.padding[1741] = 0xff; +- descriptorStruct.mchStraps.padding[1742] = 0xff; +- descriptorStruct.mchStraps.padding[1743] = 0xff; +- descriptorStruct.mchStraps.padding[1744] = 0xff; +- descriptorStruct.mchStraps.padding[1745] = 0xff; +- descriptorStruct.mchStraps.padding[1746] = 0xff; +- descriptorStruct.mchStraps.padding[1747] = 0xff; +- descriptorStruct.mchStraps.padding[1748] = 0xff; +- descriptorStruct.mchStraps.padding[1749] = 0xff; +- descriptorStruct.mchStraps.padding[1750] = 0xff; +- descriptorStruct.mchStraps.padding[1751] = 0xff; +- descriptorStruct.mchStraps.padding[1752] = 0xff; +- descriptorStruct.mchStraps.padding[1753] = 0xff; +- descriptorStruct.mchStraps.padding[1754] = 0xff; +- descriptorStruct.mchStraps.padding[1755] = 0xff; +- descriptorStruct.mchStraps.padding[1756] = 0xff; +- descriptorStruct.mchStraps.padding[1757] = 0xff; +- descriptorStruct.mchStraps.padding[1758] = 0xff; +- descriptorStruct.mchStraps.padding[1759] = 0xff; +- descriptorStruct.mchStraps.padding[1760] = 0xff; +- descriptorStruct.mchStraps.padding[1761] = 0xff; +- descriptorStruct.mchStraps.padding[1762] = 0xff; +- descriptorStruct.mchStraps.padding[1763] = 0xff; +- descriptorStruct.mchStraps.padding[1764] = 0xff; +- descriptorStruct.mchStraps.padding[1765] = 0xff; +- descriptorStruct.mchStraps.padding[1766] = 0xff; +- descriptorStruct.mchStraps.padding[1767] = 0xff; +- descriptorStruct.mchStraps.padding[1768] = 0xff; +- descriptorStruct.mchStraps.padding[1769] = 0xff; +- descriptorStruct.mchStraps.padding[1770] = 0xff; +- descriptorStruct.mchStraps.padding[1771] = 0xff; +- descriptorStruct.mchStraps.padding[1772] = 0xff; +- descriptorStruct.mchStraps.padding[1773] = 0xff; +- descriptorStruct.mchStraps.padding[1774] = 0xff; +- descriptorStruct.mchStraps.padding[1775] = 0xff; +- descriptorStruct.mchStraps.padding[1776] = 0xff; +- descriptorStruct.mchStraps.padding[1777] = 0xff; +- descriptorStruct.mchStraps.padding[1778] = 0xff; +- descriptorStruct.mchStraps.padding[1779] = 0xff; +- descriptorStruct.mchStraps.padding[1780] = 0xff; +- descriptorStruct.mchStraps.padding[1781] = 0xff; +- descriptorStruct.mchStraps.padding[1782] = 0xff; +- descriptorStruct.mchStraps.padding[1783] = 0xff; +- descriptorStruct.mchStraps.padding[1784] = 0xff; +- descriptorStruct.mchStraps.padding[1785] = 0xff; +- descriptorStruct.mchStraps.padding[1786] = 0xff; +- descriptorStruct.mchStraps.padding[1787] = 0xff; +- descriptorStruct.mchStraps.padding[1788] = 0xff; +- descriptorStruct.mchStraps.padding[1789] = 0xff; +- descriptorStruct.mchStraps.padding[1790] = 0xff; +- descriptorStruct.mchStraps.padding[1791] = 0xff; +- descriptorStruct.mchStraps.padding[1792] = 0xff; +- descriptorStruct.mchStraps.padding[1793] = 0xff; +- descriptorStruct.mchStraps.padding[1794] = 0xff; +- descriptorStruct.mchStraps.padding[1795] = 0xff; +- descriptorStruct.mchStraps.padding[1796] = 0xff; +- descriptorStruct.mchStraps.padding[1797] = 0xff; +- descriptorStruct.mchStraps.padding[1798] = 0xff; +- descriptorStruct.mchStraps.padding[1799] = 0xff; +- descriptorStruct.mchStraps.padding[1800] = 0xff; +- descriptorStruct.mchStraps.padding[1801] = 0xff; +- descriptorStruct.mchStraps.padding[1802] = 0xff; +- descriptorStruct.mchStraps.padding[1803] = 0xff; +- descriptorStruct.mchStraps.padding[1804] = 0xff; +- descriptorStruct.mchStraps.padding[1805] = 0xff; +- descriptorStruct.mchStraps.padding[1806] = 0xff; +- descriptorStruct.mchStraps.padding[1807] = 0xff; +- descriptorStruct.mchStraps.padding[1808] = 0xff; +- descriptorStruct.mchStraps.padding[1809] = 0xff; +- descriptorStruct.mchStraps.padding[1810] = 0xff; +- descriptorStruct.mchStraps.padding[1811] = 0xff; +- descriptorStruct.mchStraps.padding[1812] = 0xff; +- descriptorStruct.mchStraps.padding[1813] = 0xff; +- descriptorStruct.mchStraps.padding[1814] = 0xff; +- descriptorStruct.mchStraps.padding[1815] = 0xff; +- descriptorStruct.mchStraps.padding[1816] = 0xff; +- descriptorStruct.mchStraps.padding[1817] = 0xff; +- descriptorStruct.mchStraps.padding[1818] = 0xff; +- descriptorStruct.mchStraps.padding[1819] = 0xff; +- descriptorStruct.mchStraps.padding[1820] = 0xff; +- descriptorStruct.mchStraps.padding[1821] = 0xff; +- descriptorStruct.mchStraps.padding[1822] = 0xff; +- descriptorStruct.mchStraps.padding[1823] = 0xff; +- descriptorStruct.mchStraps.padding[1824] = 0xff; +- descriptorStruct.mchStraps.padding[1825] = 0xff; +- descriptorStruct.mchStraps.padding[1826] = 0xff; +- descriptorStruct.mchStraps.padding[1827] = 0xff; +- descriptorStruct.mchStraps.padding[1828] = 0xff; +- descriptorStruct.mchStraps.padding[1829] = 0xff; +- descriptorStruct.mchStraps.padding[1830] = 0xff; +- descriptorStruct.mchStraps.padding[1831] = 0xff; +- descriptorStruct.mchStraps.padding[1832] = 0xff; +- descriptorStruct.mchStraps.padding[1833] = 0xff; +- descriptorStruct.mchStraps.padding[1834] = 0xff; +- descriptorStruct.mchStraps.padding[1835] = 0xff; +- descriptorStruct.mchStraps.padding[1836] = 0xff; +- descriptorStruct.mchStraps.padding[1837] = 0xff; +- descriptorStruct.mchStraps.padding[1838] = 0xff; +- descriptorStruct.mchStraps.padding[1839] = 0xff; +- descriptorStruct.mchStraps.padding[1840] = 0xff; +- descriptorStruct.mchStraps.padding[1841] = 0xff; +- descriptorStruct.mchStraps.padding[1842] = 0xff; +- descriptorStruct.mchStraps.padding[1843] = 0xff; +- descriptorStruct.mchStraps.padding[1844] = 0xff; +- descriptorStruct.mchStraps.padding[1845] = 0xff; +- descriptorStruct.mchStraps.padding[1846] = 0xff; +- descriptorStruct.mchStraps.padding[1847] = 0xff; +- descriptorStruct.mchStraps.padding[1848] = 0xff; +- descriptorStruct.mchStraps.padding[1849] = 0xff; +- descriptorStruct.mchStraps.padding[1850] = 0xff; +- descriptorStruct.mchStraps.padding[1851] = 0xff; +- descriptorStruct.mchStraps.padding[1852] = 0xff; +- descriptorStruct.mchStraps.padding[1853] = 0xff; +- descriptorStruct.mchStraps.padding[1854] = 0xff; +- descriptorStruct.mchStraps.padding[1855] = 0xff; +- descriptorStruct.mchStraps.padding[1856] = 0xff; +- descriptorStruct.mchStraps.padding[1857] = 0xff; +- descriptorStruct.mchStraps.padding[1858] = 0xff; +- descriptorStruct.mchStraps.padding[1859] = 0xff; +- descriptorStruct.mchStraps.padding[1860] = 0xff; +- descriptorStruct.mchStraps.padding[1861] = 0xff; +- descriptorStruct.mchStraps.padding[1862] = 0xff; +- descriptorStruct.mchStraps.padding[1863] = 0xff; +- descriptorStruct.mchStraps.padding[1864] = 0xff; +- descriptorStruct.mchStraps.padding[1865] = 0xff; +- descriptorStruct.mchStraps.padding[1866] = 0xff; +- descriptorStruct.mchStraps.padding[1867] = 0xff; +- descriptorStruct.mchStraps.padding[1868] = 0xff; +- descriptorStruct.mchStraps.padding[1869] = 0xff; +- descriptorStruct.mchStraps.padding[1870] = 0xff; +- descriptorStruct.mchStraps.padding[1871] = 0xff; +- descriptorStruct.mchStraps.padding[1872] = 0xff; +- descriptorStruct.mchStraps.padding[1873] = 0xff; +- descriptorStruct.mchStraps.padding[1874] = 0xff; +- descriptorStruct.mchStraps.padding[1875] = 0xff; +- descriptorStruct.mchStraps.padding[1876] = 0xff; +- descriptorStruct.mchStraps.padding[1877] = 0xff; +- descriptorStruct.mchStraps.padding[1878] = 0xff; +- descriptorStruct.mchStraps.padding[1879] = 0xff; +- descriptorStruct.mchStraps.padding[1880] = 0xff; +- descriptorStruct.mchStraps.padding[1881] = 0xff; +- descriptorStruct.mchStraps.padding[1882] = 0xff; +- descriptorStruct.mchStraps.padding[1883] = 0xff; +- descriptorStruct.mchStraps.padding[1884] = 0xff; +- descriptorStruct.mchStraps.padding[1885] = 0xff; +- descriptorStruct.mchStraps.padding[1886] = 0xff; +- descriptorStruct.mchStraps.padding[1887] = 0xff; +- descriptorStruct.mchStraps.padding[1888] = 0xff; +- descriptorStruct.mchStraps.padding[1889] = 0xff; +- descriptorStruct.mchStraps.padding[1890] = 0xff; +- descriptorStruct.mchStraps.padding[1891] = 0xff; +- descriptorStruct.mchStraps.padding[1892] = 0xff; +- descriptorStruct.mchStraps.padding[1893] = 0xff; +- descriptorStruct.mchStraps.padding[1894] = 0xff; +- descriptorStruct.mchStraps.padding[1895] = 0xff; +- descriptorStruct.mchStraps.padding[1896] = 0xff; +- descriptorStruct.mchStraps.padding[1897] = 0xff; +- descriptorStruct.mchStraps.padding[1898] = 0xff; +- descriptorStruct.mchStraps.padding[1899] = 0xff; +- descriptorStruct.mchStraps.padding[1900] = 0xff; +- descriptorStruct.mchStraps.padding[1901] = 0xff; +- descriptorStruct.mchStraps.padding[1902] = 0xff; +- descriptorStruct.mchStraps.padding[1903] = 0xff; +- descriptorStruct.mchStraps.padding[1904] = 0xff; +- descriptorStruct.mchStraps.padding[1905] = 0xff; +- descriptorStruct.mchStraps.padding[1906] = 0xff; +- descriptorStruct.mchStraps.padding[1907] = 0xff; +- descriptorStruct.mchStraps.padding[1908] = 0xff; +- descriptorStruct.mchStraps.padding[1909] = 0xff; +- descriptorStruct.mchStraps.padding[1910] = 0xff; +- descriptorStruct.mchStraps.padding[1911] = 0xff; +- descriptorStruct.mchStraps.padding[1912] = 0xff; +- descriptorStruct.mchStraps.padding[1913] = 0xff; +- descriptorStruct.mchStraps.padding[1914] = 0xff; +- descriptorStruct.mchStraps.padding[1915] = 0xff; +- descriptorStruct.mchStraps.padding[1916] = 0xff; +- descriptorStruct.mchStraps.padding[1917] = 0xff; +- descriptorStruct.mchStraps.padding[1918] = 0xff; +- descriptorStruct.mchStraps.padding[1919] = 0xff; +- descriptorStruct.mchStraps.padding[1920] = 0xff; +- descriptorStruct.mchStraps.padding[1921] = 0xff; +- descriptorStruct.mchStraps.padding[1922] = 0xff; +- descriptorStruct.mchStraps.padding[1923] = 0xff; +- descriptorStruct.mchStraps.padding[1924] = 0xff; +- descriptorStruct.mchStraps.padding[1925] = 0xff; +- descriptorStruct.mchStraps.padding[1926] = 0xff; +- descriptorStruct.mchStraps.padding[1927] = 0xff; +- descriptorStruct.mchStraps.padding[1928] = 0xff; +- descriptorStruct.mchStraps.padding[1929] = 0xff; +- descriptorStruct.mchStraps.padding[1930] = 0xff; +- descriptorStruct.mchStraps.padding[1931] = 0xff; +- descriptorStruct.mchStraps.padding[1932] = 0xff; +- descriptorStruct.mchStraps.padding[1933] = 0xff; +- descriptorStruct.mchStraps.padding[1934] = 0xff; +- descriptorStruct.mchStraps.padding[1935] = 0xff; +- descriptorStruct.mchStraps.padding[1936] = 0xff; +- descriptorStruct.mchStraps.padding[1937] = 0xff; +- descriptorStruct.mchStraps.padding[1938] = 0xff; +- descriptorStruct.mchStraps.padding[1939] = 0xff; +- descriptorStruct.mchStraps.padding[1940] = 0xff; +- descriptorStruct.mchStraps.padding[1941] = 0xff; +- descriptorStruct.mchStraps.padding[1942] = 0xff; +- descriptorStruct.mchStraps.padding[1943] = 0xff; +- descriptorStruct.mchStraps.padding[1944] = 0xff; +- descriptorStruct.mchStraps.padding[1945] = 0xff; +- descriptorStruct.mchStraps.padding[1946] = 0xff; +- descriptorStruct.mchStraps.padding[1947] = 0xff; +- descriptorStruct.mchStraps.padding[1948] = 0xff; +- descriptorStruct.mchStraps.padding[1949] = 0xff; +- descriptorStruct.mchStraps.padding[1950] = 0xff; +- descriptorStruct.mchStraps.padding[1951] = 0xff; +- descriptorStruct.mchStraps.padding[1952] = 0xff; +- descriptorStruct.mchStraps.padding[1953] = 0xff; +- descriptorStruct.mchStraps.padding[1954] = 0xff; +- descriptorStruct.mchStraps.padding[1955] = 0xff; +- descriptorStruct.mchStraps.padding[1956] = 0xff; +- descriptorStruct.mchStraps.padding[1957] = 0xff; +- descriptorStruct.mchStraps.padding[1958] = 0xff; +- descriptorStruct.mchStraps.padding[1959] = 0xff; +- descriptorStruct.mchStraps.padding[1960] = 0xff; +- descriptorStruct.mchStraps.padding[1961] = 0xff; +- descriptorStruct.mchStraps.padding[1962] = 0xff; +- descriptorStruct.mchStraps.padding[1963] = 0xff; +- descriptorStruct.mchStraps.padding[1964] = 0xff; +- descriptorStruct.mchStraps.padding[1965] = 0xff; +- descriptorStruct.mchStraps.padding[1966] = 0xff; +- descriptorStruct.mchStraps.padding[1967] = 0xff; +- descriptorStruct.mchStraps.padding[1968] = 0xff; +- descriptorStruct.mchStraps.padding[1969] = 0xff; +- descriptorStruct.mchStraps.padding[1970] = 0xff; +- descriptorStruct.mchStraps.padding[1971] = 0xff; +- descriptorStruct.mchStraps.padding[1972] = 0xff; +- descriptorStruct.mchStraps.padding[1973] = 0xff; +- descriptorStruct.mchStraps.padding[1974] = 0xff; +- descriptorStruct.mchStraps.padding[1975] = 0xff; +- descriptorStruct.mchStraps.padding[1976] = 0xff; +- descriptorStruct.mchStraps.padding[1977] = 0xff; +- descriptorStruct.mchStraps.padding[1978] = 0xff; +- descriptorStruct.mchStraps.padding[1979] = 0xff; +- descriptorStruct.mchStraps.padding[1980] = 0xff; +- descriptorStruct.mchStraps.padding[1981] = 0xff; +- descriptorStruct.mchStraps.padding[1982] = 0xff; +- descriptorStruct.mchStraps.padding[1983] = 0xff; +- descriptorStruct.mchStraps.padding[1984] = 0xff; +- descriptorStruct.mchStraps.padding[1985] = 0xff; +- descriptorStruct.mchStraps.padding[1986] = 0xff; +- descriptorStruct.mchStraps.padding[1987] = 0xff; +- descriptorStruct.mchStraps.padding[1988] = 0xff; +- descriptorStruct.mchStraps.padding[1989] = 0xff; +- descriptorStruct.mchStraps.padding[1990] = 0xff; +- descriptorStruct.mchStraps.padding[1991] = 0xff; +- descriptorStruct.mchStraps.padding[1992] = 0xff; +- descriptorStruct.mchStraps.padding[1993] = 0xff; +- descriptorStruct.mchStraps.padding[1994] = 0xff; +- descriptorStruct.mchStraps.padding[1995] = 0xff; +- descriptorStruct.mchStraps.padding[1996] = 0xff; +- descriptorStruct.mchStraps.padding[1997] = 0xff; +- descriptorStruct.mchStraps.padding[1998] = 0xff; +- descriptorStruct.mchStraps.padding[1999] = 0xff; +- descriptorStruct.mchStraps.padding[2000] = 0xff; +- descriptorStruct.mchStraps.padding[2001] = 0xff; +- descriptorStruct.mchStraps.padding[2002] = 0xff; +- descriptorStruct.mchStraps.padding[2003] = 0xff; +- descriptorStruct.mchStraps.padding[2004] = 0xff; +- descriptorStruct.mchStraps.padding[2005] = 0xff; +- descriptorStruct.mchStraps.padding[2006] = 0xff; +- descriptorStruct.mchStraps.padding[2007] = 0xff; +- descriptorStruct.mchStraps.padding[2008] = 0xff; +- descriptorStruct.mchStraps.padding[2009] = 0xff; +- descriptorStruct.mchStraps.padding[2010] = 0xff; +- descriptorStruct.mchStraps.padding[2011] = 0xff; +- descriptorStruct.mchStraps.padding[2012] = 0xff; +- descriptorStruct.mchStraps.padding[2013] = 0xff; +- descriptorStruct.mchStraps.padding[2014] = 0xff; +- descriptorStruct.mchStraps.padding[2015] = 0xff; +- descriptorStruct.mchStraps.padding[2016] = 0xff; +- descriptorStruct.mchStraps.padding[2017] = 0xff; +- descriptorStruct.mchStraps.padding[2018] = 0xff; +- descriptorStruct.mchStraps.padding[2019] = 0xff; +- descriptorStruct.mchStraps.padding[2020] = 0xff; +- descriptorStruct.mchStraps.padding[2021] = 0xff; +- descriptorStruct.mchStraps.padding[2022] = 0xff; +- descriptorStruct.mchStraps.padding[2023] = 0xff; +- descriptorStruct.mchStraps.padding[2024] = 0xff; +- descriptorStruct.mchStraps.padding[2025] = 0xff; +- descriptorStruct.mchStraps.padding[2026] = 0xff; +- descriptorStruct.mchStraps.padding[2027] = 0xff; +- descriptorStruct.mchStraps.padding[2028] = 0xff; +- descriptorStruct.mchStraps.padding[2029] = 0xff; +- descriptorStruct.mchStraps.padding[2030] = 0xff; +- descriptorStruct.mchStraps.padding[2031] = 0xff; +- descriptorStruct.mchStraps.padding[2032] = 0xff; +- descriptorStruct.mchStraps.padding[2033] = 0xff; +- descriptorStruct.mchStraps.padding[2034] = 0xff; +- descriptorStruct.mchStraps.padding[2035] = 0xff; +- descriptorStruct.mchStraps.padding[2036] = 0xff; +- descriptorStruct.mchStraps.padding[2037] = 0xff; +- descriptorStruct.mchStraps.padding[2038] = 0xff; +- descriptorStruct.mchStraps.padding[2039] = 0xff; +- descriptorStruct.mchStraps.padding[2040] = 0xff; +- descriptorStruct.mchStraps.padding[2041] = 0xff; +- descriptorStruct.mchStraps.padding[2042] = 0xff; +- descriptorStruct.mchStraps.padding[2043] = 0xff; +- descriptorStruct.mchStraps.padding[2044] = 0xff; +- descriptorStruct.mchStraps.padding[2045] = 0xff; +- descriptorStruct.mchStraps.padding[2046] = 0xff; +- descriptorStruct.mchStraps.padding[2047] = 0xff; +- descriptorStruct.mchStraps.padding[2048] = 0xff; +- descriptorStruct.mchStraps.padding[2049] = 0xff; +- descriptorStruct.mchStraps.padding[2050] = 0xff; +- descriptorStruct.mchStraps.padding[2051] = 0xff; +- descriptorStruct.mchStraps.padding[2052] = 0xff; +- descriptorStruct.mchStraps.padding[2053] = 0xff; +- descriptorStruct.mchStraps.padding[2054] = 0xff; +- descriptorStruct.mchStraps.padding[2055] = 0xff; +- descriptorStruct.mchStraps.padding[2056] = 0xff; +- descriptorStruct.mchStraps.padding[2057] = 0xff; +- descriptorStruct.mchStraps.padding[2058] = 0xff; +- descriptorStruct.mchStraps.padding[2059] = 0xff; +- descriptorStruct.mchStraps.padding[2060] = 0xff; +- descriptorStruct.mchStraps.padding[2061] = 0xff; +- descriptorStruct.mchStraps.padding[2062] = 0xff; +- descriptorStruct.mchStraps.padding[2063] = 0xff; +- descriptorStruct.mchStraps.padding[2064] = 0xff; +- descriptorStruct.mchStraps.padding[2065] = 0xff; +- descriptorStruct.mchStraps.padding[2066] = 0xff; +- descriptorStruct.mchStraps.padding[2067] = 0xff; +- descriptorStruct.mchStraps.padding[2068] = 0xff; +- descriptorStruct.mchStraps.padding[2069] = 0xff; +- descriptorStruct.mchStraps.padding[2070] = 0xff; +- descriptorStruct.mchStraps.padding[2071] = 0xff; +- descriptorStruct.mchStraps.padding[2072] = 0xff; +- descriptorStruct.mchStraps.padding[2073] = 0xff; +- descriptorStruct.mchStraps.padding[2074] = 0xff; +- descriptorStruct.mchStraps.padding[2075] = 0xff; +- descriptorStruct.mchStraps.padding[2076] = 0xff; +- descriptorStruct.mchStraps.padding[2077] = 0xff; +- descriptorStruct.mchStraps.padding[2078] = 0xff; +- descriptorStruct.mchStraps.padding[2079] = 0xff; +- descriptorStruct.mchStraps.padding[2080] = 0xff; +- descriptorStruct.mchStraps.padding[2081] = 0xff; +- descriptorStruct.mchStraps.padding[2082] = 0xff; +- descriptorStruct.mchStraps.padding[2083] = 0xff; +- descriptorStruct.mchStraps.padding[2084] = 0xff; +- descriptorStruct.mchStraps.padding[2085] = 0xff; +- descriptorStruct.mchStraps.padding[2086] = 0xff; +- descriptorStruct.mchStraps.padding[2087] = 0xff; +- descriptorStruct.mchStraps.padding[2088] = 0xff; +- descriptorStruct.mchStraps.padding[2089] = 0xff; +- descriptorStruct.mchStraps.padding[2090] = 0xff; +- descriptorStruct.mchStraps.padding[2091] = 0xff; +- descriptorStruct.mchStraps.padding[2092] = 0xff; +- descriptorStruct.mchStraps.padding[2093] = 0xff; +- descriptorStruct.mchStraps.padding[2094] = 0xff; +- descriptorStruct.mchStraps.padding[2095] = 0xff; +- descriptorStruct.mchStraps.padding[2096] = 0xff; +- descriptorStruct.mchStraps.padding[2097] = 0xff; +- descriptorStruct.mchStraps.padding[2098] = 0xff; +- descriptorStruct.mchStraps.padding[2099] = 0xff; +- descriptorStruct.mchStraps.padding[2100] = 0xff; +- descriptorStruct.mchStraps.padding[2101] = 0xff; +- descriptorStruct.mchStraps.padding[2102] = 0xff; +- descriptorStruct.mchStraps.padding[2103] = 0xff; +- descriptorStruct.mchStraps.padding[2104] = 0xff; +- descriptorStruct.mchStraps.padding[2105] = 0xff; +- descriptorStruct.mchStraps.padding[2106] = 0xff; +- descriptorStruct.mchStraps.padding[2107] = 0xff; +- descriptorStruct.mchStraps.padding[2108] = 0xff; +- descriptorStruct.mchStraps.padding[2109] = 0xff; +- descriptorStruct.mchStraps.padding[2110] = 0xff; +- descriptorStruct.mchStraps.padding[2111] = 0xff; +- descriptorStruct.mchStraps.padding[2112] = 0xff; +- descriptorStruct.mchStraps.padding[2113] = 0xff; +- descriptorStruct.mchStraps.padding[2114] = 0xff; +- descriptorStruct.mchStraps.padding[2115] = 0xff; +- descriptorStruct.mchStraps.padding[2116] = 0xff; +- descriptorStruct.mchStraps.padding[2117] = 0xff; +- descriptorStruct.mchStraps.padding[2118] = 0xff; +- descriptorStruct.mchStraps.padding[2119] = 0xff; +- descriptorStruct.mchStraps.padding[2120] = 0xff; +- descriptorStruct.mchStraps.padding[2121] = 0xff; +- descriptorStruct.mchStraps.padding[2122] = 0xff; +- descriptorStruct.mchStraps.padding[2123] = 0xff; +- descriptorStruct.mchStraps.padding[2124] = 0xff; +- descriptorStruct.mchStraps.padding[2125] = 0xff; +- descriptorStruct.mchStraps.padding[2126] = 0xff; +- descriptorStruct.mchStraps.padding[2127] = 0xff; +- descriptorStruct.mchStraps.padding[2128] = 0xff; +- descriptorStruct.mchStraps.padding[2129] = 0xff; +- descriptorStruct.mchStraps.padding[2130] = 0xff; +- descriptorStruct.mchStraps.padding[2131] = 0xff; +- descriptorStruct.mchStraps.padding[2132] = 0xff; +- descriptorStruct.mchStraps.padding[2133] = 0xff; +- descriptorStruct.mchStraps.padding[2134] = 0xff; +- descriptorStruct.mchStraps.padding[2135] = 0xff; +- descriptorStruct.mchStraps.padding[2136] = 0xff; +- descriptorStruct.mchStraps.padding[2137] = 0xff; +- descriptorStruct.mchStraps.padding[2138] = 0xff; +- descriptorStruct.mchStraps.padding[2139] = 0xff; +- descriptorStruct.mchStraps.padding[2140] = 0xff; +- descriptorStruct.mchStraps.padding[2141] = 0xff; +- descriptorStruct.mchStraps.padding[2142] = 0xff; +- descriptorStruct.mchStraps.padding[2143] = 0xff; +- descriptorStruct.mchStraps.padding[2144] = 0xff; +- descriptorStruct.mchStraps.padding[2145] = 0xff; +- descriptorStruct.mchStraps.padding[2146] = 0xff; +- descriptorStruct.mchStraps.padding[2147] = 0xff; +- descriptorStruct.mchStraps.padding[2148] = 0xff; +- descriptorStruct.mchStraps.padding[2149] = 0xff; +- descriptorStruct.mchStraps.padding[2150] = 0xff; +- descriptorStruct.mchStraps.padding[2151] = 0xff; +- descriptorStruct.mchStraps.padding[2152] = 0xff; +- descriptorStruct.mchStraps.padding[2153] = 0xff; +- descriptorStruct.mchStraps.padding[2154] = 0xff; +- descriptorStruct.mchStraps.padding[2155] = 0xff; +- descriptorStruct.mchStraps.padding[2156] = 0xff; +- descriptorStruct.mchStraps.padding[2157] = 0xff; +- descriptorStruct.mchStraps.padding[2158] = 0xff; +- descriptorStruct.mchStraps.padding[2159] = 0xff; +- descriptorStruct.mchStraps.padding[2160] = 0xff; +- descriptorStruct.mchStraps.padding[2161] = 0xff; +- descriptorStruct.mchStraps.padding[2162] = 0xff; +- descriptorStruct.mchStraps.padding[2163] = 0xff; +- descriptorStruct.mchStraps.padding[2164] = 0xff; +- descriptorStruct.mchStraps.padding[2165] = 0xff; +- descriptorStruct.mchStraps.padding[2166] = 0xff; +- descriptorStruct.mchStraps.padding[2167] = 0xff; +- descriptorStruct.mchStraps.padding[2168] = 0xff; +- descriptorStruct.mchStraps.padding[2169] = 0xff; +- descriptorStruct.mchStraps.padding[2170] = 0xff; +- descriptorStruct.mchStraps.padding[2171] = 0xff; +- descriptorStruct.mchStraps.padding[2172] = 0xff; +- descriptorStruct.mchStraps.padding[2173] = 0xff; +- descriptorStruct.mchStraps.padding[2174] = 0xff; +- descriptorStruct.mchStraps.padding[2175] = 0xff; +- descriptorStruct.mchStraps.padding[2176] = 0xff; +- descriptorStruct.mchStraps.padding[2177] = 0xff; +- descriptorStruct.mchStraps.padding[2178] = 0xff; +- descriptorStruct.mchStraps.padding[2179] = 0xff; +- descriptorStruct.mchStraps.padding[2180] = 0xff; +- descriptorStruct.mchStraps.padding[2181] = 0xff; +- descriptorStruct.mchStraps.padding[2182] = 0xff; +- descriptorStruct.mchStraps.padding[2183] = 0xff; +- descriptorStruct.mchStraps.padding[2184] = 0xff; +- descriptorStruct.mchStraps.padding[2185] = 0xff; +- descriptorStruct.mchStraps.padding[2186] = 0xff; +- descriptorStruct.mchStraps.padding[2187] = 0xff; +- descriptorStruct.mchStraps.padding[2188] = 0xff; +- descriptorStruct.mchStraps.padding[2189] = 0xff; +- descriptorStruct.mchStraps.padding[2190] = 0xff; +- descriptorStruct.mchStraps.padding[2191] = 0xff; +- descriptorStruct.mchStraps.padding[2192] = 0xff; +- descriptorStruct.mchStraps.padding[2193] = 0xff; +- descriptorStruct.mchStraps.padding[2194] = 0xff; +- descriptorStruct.mchStraps.padding[2195] = 0xff; +- descriptorStruct.mchStraps.padding[2196] = 0xff; +- descriptorStruct.mchStraps.padding[2197] = 0xff; +- descriptorStruct.mchStraps.padding[2198] = 0xff; +- descriptorStruct.mchStraps.padding[2199] = 0xff; +- descriptorStruct.mchStraps.padding[2200] = 0xff; +- descriptorStruct.mchStraps.padding[2201] = 0xff; +- descriptorStruct.mchStraps.padding[2202] = 0xff; +- descriptorStruct.mchStraps.padding[2203] = 0xff; +- descriptorStruct.mchStraps.padding[2204] = 0xff; +- descriptorStruct.mchStraps.padding[2205] = 0xff; +- descriptorStruct.mchStraps.padding[2206] = 0xff; +- descriptorStruct.mchStraps.padding[2207] = 0xff; +- descriptorStruct.mchStraps.padding[2208] = 0xff; +- descriptorStruct.mchStraps.padding[2209] = 0xff; +- descriptorStruct.mchStraps.padding[2210] = 0xff; +- descriptorStruct.mchStraps.padding[2211] = 0xff; +- descriptorStruct.mchStraps.padding[2212] = 0xff; +- descriptorStruct.mchStraps.padding[2213] = 0xff; +- descriptorStruct.mchStraps.padding[2214] = 0xff; +- descriptorStruct.mchStraps.padding[2215] = 0xff; +- descriptorStruct.mchStraps.padding[2216] = 0xff; +- descriptorStruct.mchStraps.padding[2217] = 0xff; +- descriptorStruct.mchStraps.padding[2218] = 0xff; +- descriptorStruct.mchStraps.padding[2219] = 0xff; +- descriptorStruct.mchStraps.padding[2220] = 0xff; +- descriptorStruct.mchStraps.padding[2221] = 0xff; +- descriptorStruct.mchStraps.padding[2222] = 0xff; +- descriptorStruct.mchStraps.padding[2223] = 0xff; +- descriptorStruct.mchStraps.padding[2224] = 0xff; +- descriptorStruct.mchStraps.padding[2225] = 0xff; +- descriptorStruct.mchStraps.padding[2226] = 0xff; +- descriptorStruct.mchStraps.padding[2227] = 0xff; +- descriptorStruct.mchStraps.padding[2228] = 0xff; +- descriptorStruct.mchStraps.padding[2229] = 0xff; +- descriptorStruct.mchStraps.padding[2230] = 0xff; +- descriptorStruct.mchStraps.padding[2231] = 0xff; +- descriptorStruct.mchStraps.padding[2232] = 0xff; +- descriptorStruct.mchStraps.padding[2233] = 0xff; +- descriptorStruct.mchStraps.padding[2234] = 0xff; +- descriptorStruct.mchStraps.padding[2235] = 0xff; +- descriptorStruct.mchStraps.padding[2236] = 0xff; +- descriptorStruct.mchStraps.padding[2237] = 0xff; +- descriptorStruct.mchStraps.padding[2238] = 0xff; +- descriptorStruct.mchStraps.padding[2239] = 0xff; +- descriptorStruct.mchStraps.padding[2240] = 0xff; +- descriptorStruct.mchStraps.padding[2241] = 0xff; +- descriptorStruct.mchStraps.padding[2242] = 0xff; +- descriptorStruct.mchStraps.padding[2243] = 0xff; +- descriptorStruct.mchStraps.padding[2244] = 0xff; +- descriptorStruct.mchStraps.padding[2245] = 0xff; +- descriptorStruct.mchStraps.padding[2246] = 0xff; +- descriptorStruct.mchStraps.padding[2247] = 0xff; +- descriptorStruct.mchStraps.padding[2248] = 0xff; +- descriptorStruct.mchStraps.padding[2249] = 0xff; +- descriptorStruct.mchStraps.padding[2250] = 0xff; +- descriptorStruct.mchStraps.padding[2251] = 0xff; +- descriptorStruct.mchStraps.padding[2252] = 0xff; +- descriptorStruct.mchStraps.padding[2253] = 0xff; +- descriptorStruct.mchStraps.padding[2254] = 0xff; +- descriptorStruct.mchStraps.padding[2255] = 0xff; +- descriptorStruct.mchStraps.padding[2256] = 0xff; +- descriptorStruct.mchStraps.padding[2257] = 0xff; +- descriptorStruct.mchStraps.padding[2258] = 0xff; +- descriptorStruct.mchStraps.padding[2259] = 0xff; +- descriptorStruct.mchStraps.padding[2260] = 0xff; +- descriptorStruct.mchStraps.padding[2261] = 0xff; +- descriptorStruct.mchStraps.padding[2262] = 0xff; +- descriptorStruct.mchStraps.padding[2263] = 0xff; +- descriptorStruct.mchStraps.padding[2264] = 0xff; +- descriptorStruct.mchStraps.padding[2265] = 0xff; +- descriptorStruct.mchStraps.padding[2266] = 0xff; +- descriptorStruct.mchStraps.padding[2267] = 0xff; +- descriptorStruct.mchStraps.padding[2268] = 0xff; +- descriptorStruct.mchStraps.padding[2269] = 0xff; +- descriptorStruct.mchStraps.padding[2270] = 0xff; +- descriptorStruct.mchStraps.padding[2271] = 0xff; +- descriptorStruct.mchStraps.padding[2272] = 0xff; +- descriptorStruct.mchStraps.padding[2273] = 0xff; +- descriptorStruct.mchStraps.padding[2274] = 0xff; +- descriptorStruct.mchStraps.padding[2275] = 0xff; +- descriptorStruct.mchStraps.padding[2276] = 0xff; +- descriptorStruct.mchStraps.padding[2277] = 0xff; +- descriptorStruct.mchStraps.padding[2278] = 0xff; +- descriptorStruct.mchStraps.padding[2279] = 0xff; +- descriptorStruct.mchStraps.padding[2280] = 0xff; +- descriptorStruct.mchStraps.padding[2281] = 0xff; +- descriptorStruct.mchStraps.padding[2282] = 0xff; +- descriptorStruct.mchStraps.padding[2283] = 0xff; +- descriptorStruct.mchStraps.padding[2284] = 0xff; +- descriptorStruct.mchStraps.padding[2285] = 0xff; +- descriptorStruct.mchStraps.padding[2286] = 0xff; +- descriptorStruct.mchStraps.padding[2287] = 0xff; +- descriptorStruct.mchStraps.padding[2288] = 0xff; +- descriptorStruct.mchStraps.padding[2289] = 0xff; +- descriptorStruct.mchStraps.padding[2290] = 0xff; +- descriptorStruct.mchStraps.padding[2291] = 0xff; +- descriptorStruct.mchStraps.padding[2292] = 0xff; +- descriptorStruct.mchStraps.padding[2293] = 0xff; +- descriptorStruct.mchStraps.padding[2294] = 0xff; +- descriptorStruct.mchStraps.padding[2295] = 0xff; +- descriptorStruct.mchStraps.padding[2296] = 0xff; +- descriptorStruct.mchStraps.padding[2297] = 0xff; +- descriptorStruct.mchStraps.padding[2298] = 0xff; +- descriptorStruct.mchStraps.padding[2299] = 0xff; +- descriptorStruct.mchStraps.padding[2300] = 0xff; +- descriptorStruct.mchStraps.padding[2301] = 0xff; +- descriptorStruct.mchStraps.padding[2302] = 0xff; +- descriptorStruct.mchStraps.padding[2303] = 0xff; +- descriptorStruct.mchStraps.padding[2304] = 0xff; +- descriptorStruct.mchStraps.padding[2305] = 0xff; +- descriptorStruct.mchStraps.padding[2306] = 0xff; +- descriptorStruct.mchStraps.padding[2307] = 0xff; +- descriptorStruct.mchStraps.padding[2308] = 0xff; +- descriptorStruct.mchStraps.padding[2309] = 0xff; +- descriptorStruct.mchStraps.padding[2310] = 0xff; +- descriptorStruct.mchStraps.padding[2311] = 0xff; +- descriptorStruct.mchStraps.padding[2312] = 0xff; +- descriptorStruct.mchStraps.padding[2313] = 0xff; +- descriptorStruct.mchStraps.padding[2314] = 0xff; +- descriptorStruct.mchStraps.padding[2315] = 0xff; +- descriptorStruct.mchStraps.padding[2316] = 0xff; +- descriptorStruct.mchStraps.padding[2317] = 0xff; +- descriptorStruct.mchStraps.padding[2318] = 0xff; +- descriptorStruct.mchStraps.padding[2319] = 0xff; +- descriptorStruct.mchStraps.padding[2320] = 0xff; +- descriptorStruct.mchStraps.padding[2321] = 0xff; +- descriptorStruct.mchStraps.padding[2322] = 0xff; +- descriptorStruct.mchStraps.padding[2323] = 0xff; +- descriptorStruct.mchStraps.padding[2324] = 0xff; +- descriptorStruct.mchStraps.padding[2325] = 0xff; +- descriptorStruct.mchStraps.padding[2326] = 0xff; +- descriptorStruct.mchStraps.padding[2327] = 0xff; +- descriptorStruct.mchStraps.padding[2328] = 0xff; +- descriptorStruct.mchStraps.padding[2329] = 0xff; +- descriptorStruct.mchStraps.padding[2330] = 0xff; +- descriptorStruct.mchStraps.padding[2331] = 0xff; +- descriptorStruct.mchStraps.padding[2332] = 0xff; +- descriptorStruct.mchStraps.padding[2333] = 0xff; +- descriptorStruct.mchStraps.padding[2334] = 0xff; +- descriptorStruct.mchStraps.padding[2335] = 0xff; +- descriptorStruct.mchStraps.padding[2336] = 0xff; +- descriptorStruct.mchStraps.padding[2337] = 0xff; +- descriptorStruct.mchStraps.padding[2338] = 0xff; +- descriptorStruct.mchStraps.padding[2339] = 0xff; +- descriptorStruct.mchStraps.padding[2340] = 0xff; +- descriptorStruct.mchStraps.padding[2341] = 0xff; +- descriptorStruct.mchStraps.padding[2342] = 0xff; +- descriptorStruct.mchStraps.padding[2343] = 0xff; +- descriptorStruct.mchStraps.padding[2344] = 0xff; +- descriptorStruct.mchStraps.padding[2345] = 0xff; +- descriptorStruct.mchStraps.padding[2346] = 0xff; +- descriptorStruct.mchStraps.padding[2347] = 0xff; +- descriptorStruct.mchStraps.padding[2348] = 0xff; +- descriptorStruct.mchStraps.padding[2349] = 0xff; +- descriptorStruct.mchStraps.padding[2350] = 0xff; +- descriptorStruct.mchStraps.padding[2351] = 0xff; +- descriptorStruct.mchStraps.padding[2352] = 0xff; +- descriptorStruct.mchStraps.padding[2353] = 0xff; +- descriptorStruct.mchStraps.padding[2354] = 0xff; +- descriptorStruct.mchStraps.padding[2355] = 0xff; +- descriptorStruct.mchStraps.padding[2356] = 0xff; +- descriptorStruct.mchStraps.padding[2357] = 0xff; +- descriptorStruct.mchStraps.padding[2358] = 0xff; +- descriptorStruct.mchStraps.padding[2359] = 0xff; +- descriptorStruct.mchStraps.padding[2360] = 0xff; +- descriptorStruct.mchStraps.padding[2361] = 0xff; +- descriptorStruct.mchStraps.padding[2362] = 0xff; +- descriptorStruct.mchStraps.padding[2363] = 0xff; +- descriptorStruct.mchStraps.padding[2364] = 0xff; +- descriptorStruct.mchStraps.padding[2365] = 0xff; +- descriptorStruct.mchStraps.padding[2366] = 0xff; +- descriptorStruct.mchStraps.padding[2367] = 0xff; +- descriptorStruct.mchStraps.padding[2368] = 0xff; +- descriptorStruct.mchStraps.padding[2369] = 0xff; +- descriptorStruct.mchStraps.padding[2370] = 0xff; +- descriptorStruct.mchStraps.padding[2371] = 0xff; +- descriptorStruct.mchStraps.padding[2372] = 0xff; +- descriptorStruct.mchStraps.padding[2373] = 0xff; +- descriptorStruct.mchStraps.padding[2374] = 0xff; +- descriptorStruct.mchStraps.padding[2375] = 0xff; +- descriptorStruct.mchStraps.padding[2376] = 0xff; +- descriptorStruct.mchStraps.padding[2377] = 0xff; +- descriptorStruct.mchStraps.padding[2378] = 0xff; +- descriptorStruct.mchStraps.padding[2379] = 0xff; +- descriptorStruct.mchStraps.padding[2380] = 0xff; +- descriptorStruct.mchStraps.padding[2381] = 0xff; +- descriptorStruct.mchStraps.padding[2382] = 0xff; +- descriptorStruct.mchStraps.padding[2383] = 0xff; +- descriptorStruct.mchStraps.padding[2384] = 0xff; +- descriptorStruct.mchStraps.padding[2385] = 0xff; +- descriptorStruct.mchStraps.padding[2386] = 0xff; +- descriptorStruct.mchStraps.padding[2387] = 0xff; +- descriptorStruct.mchStraps.padding[2388] = 0xff; +- descriptorStruct.mchStraps.padding[2389] = 0xff; +- descriptorStruct.mchStraps.padding[2390] = 0xff; +- descriptorStruct.mchStraps.padding[2391] = 0xff; +- descriptorStruct.mchStraps.padding[2392] = 0xff; +- descriptorStruct.mchStraps.padding[2393] = 0xff; +- descriptorStruct.mchStraps.padding[2394] = 0xff; +- descriptorStruct.mchStraps.padding[2395] = 0xff; +- descriptorStruct.mchStraps.padding[2396] = 0xff; +- descriptorStruct.mchStraps.padding[2397] = 0xff; +- descriptorStruct.mchStraps.padding[2398] = 0xff; +- descriptorStruct.mchStraps.padding[2399] = 0xff; +- descriptorStruct.mchStraps.padding[2400] = 0xff; +- descriptorStruct.mchStraps.padding[2401] = 0xff; +- descriptorStruct.mchStraps.padding[2402] = 0xff; +- descriptorStruct.mchStraps.padding[2403] = 0xff; +- descriptorStruct.mchStraps.padding[2404] = 0xff; +- descriptorStruct.mchStraps.padding[2405] = 0xff; +- descriptorStruct.mchStraps.padding[2406] = 0xff; +- descriptorStruct.mchStraps.padding[2407] = 0xff; +- descriptorStruct.mchStraps.padding[2408] = 0xff; +- descriptorStruct.mchStraps.padding[2409] = 0xff; +- descriptorStruct.mchStraps.padding[2410] = 0xff; +- descriptorStruct.mchStraps.padding[2411] = 0xff; +- descriptorStruct.mchStraps.padding[2412] = 0xff; +- descriptorStruct.mchStraps.padding[2413] = 0xff; +- descriptorStruct.mchStraps.padding[2414] = 0xff; +- descriptorStruct.mchStraps.padding[2415] = 0xff; +- descriptorStruct.mchStraps.padding[2416] = 0xff; +- descriptorStruct.mchStraps.padding[2417] = 0xff; +- descriptorStruct.mchStraps.padding[2418] = 0xff; +- descriptorStruct.mchStraps.padding[2419] = 0xff; +- descriptorStruct.mchStraps.padding[2420] = 0xff; +- descriptorStruct.mchStraps.padding[2421] = 0xff; +- descriptorStruct.mchStraps.padding[2422] = 0xff; +- descriptorStruct.mchStraps.padding[2423] = 0xff; +- descriptorStruct.mchStraps.padding[2424] = 0xff; +- descriptorStruct.mchStraps.padding[2425] = 0xff; +- descriptorStruct.mchStraps.padding[2426] = 0xff; +- descriptorStruct.mchStraps.padding[2427] = 0xff; +- descriptorStruct.mchStraps.padding[2428] = 0xff; +- descriptorStruct.mchStraps.padding[2429] = 0xff; +- descriptorStruct.mchStraps.padding[2430] = 0xff; +- descriptorStruct.mchStraps.padding[2431] = 0xff; +- descriptorStruct.mchStraps.padding[2432] = 0xff; +- descriptorStruct.mchStraps.padding[2433] = 0xff; +- descriptorStruct.mchStraps.padding[2434] = 0xff; +- descriptorStruct.mchStraps.padding[2435] = 0xff; +- descriptorStruct.mchStraps.padding[2436] = 0xff; +- descriptorStruct.mchStraps.padding[2437] = 0xff; +- descriptorStruct.mchStraps.padding[2438] = 0xff; +- descriptorStruct.mchStraps.padding[2439] = 0xff; +- descriptorStruct.mchStraps.padding[2440] = 0xff; +- descriptorStruct.mchStraps.padding[2441] = 0xff; +- descriptorStruct.mchStraps.padding[2442] = 0xff; +- descriptorStruct.mchStraps.padding[2443] = 0xff; +- descriptorStruct.mchStraps.padding[2444] = 0xff; +- descriptorStruct.mchStraps.padding[2445] = 0xff; +- descriptorStruct.mchStraps.padding[2446] = 0xff; +- descriptorStruct.mchStraps.padding[2447] = 0xff; +- descriptorStruct.mchStraps.padding[2448] = 0xff; +- descriptorStruct.mchStraps.padding[2449] = 0xff; +- descriptorStruct.mchStraps.padding[2450] = 0xff; +- descriptorStruct.mchStraps.padding[2451] = 0xff; +- descriptorStruct.mchStraps.padding[2452] = 0xff; +- descriptorStruct.mchStraps.padding[2453] = 0xff; +- descriptorStruct.mchStraps.padding[2454] = 0xff; +- descriptorStruct.mchStraps.padding[2455] = 0xff; +- descriptorStruct.mchStraps.padding[2456] = 0xff; +- descriptorStruct.mchStraps.padding[2457] = 0xff; +- descriptorStruct.mchStraps.padding[2458] = 0xff; +- descriptorStruct.mchStraps.padding[2459] = 0xff; +- descriptorStruct.mchStraps.padding[2460] = 0xff; +- descriptorStruct.mchStraps.padding[2461] = 0xff; +- descriptorStruct.mchStraps.padding[2462] = 0xff; +- descriptorStruct.mchStraps.padding[2463] = 0xff; +- descriptorStruct.mchStraps.padding[2464] = 0xff; +- descriptorStruct.mchStraps.padding[2465] = 0xff; +- descriptorStruct.mchStraps.padding[2466] = 0xff; +- descriptorStruct.mchStraps.padding[2467] = 0xff; +- descriptorStruct.mchStraps.padding[2468] = 0xff; +- descriptorStruct.mchStraps.padding[2469] = 0xff; +- descriptorStruct.mchStraps.padding[2470] = 0xff; +- descriptorStruct.mchStraps.padding[2471] = 0xff; +- descriptorStruct.mchStraps.padding[2472] = 0xff; +- descriptorStruct.mchStraps.padding[2473] = 0xff; +- descriptorStruct.mchStraps.padding[2474] = 0xff; +- descriptorStruct.mchStraps.padding[2475] = 0xff; +- descriptorStruct.mchStraps.padding[2476] = 0xff; +- descriptorStruct.mchStraps.padding[2477] = 0xff; +- descriptorStruct.mchStraps.padding[2478] = 0xff; +- descriptorStruct.mchStraps.padding[2479] = 0xff; +- descriptorStruct.mchStraps.padding[2480] = 0xff; +- descriptorStruct.mchStraps.padding[2481] = 0xff; +- descriptorStruct.mchStraps.padding[2482] = 0xff; +- descriptorStruct.mchStraps.padding[2483] = 0xff; +- descriptorStruct.mchStraps.padding[2484] = 0xff; +- descriptorStruct.mchStraps.padding[2485] = 0xff; +- descriptorStruct.mchStraps.padding[2486] = 0xff; +- descriptorStruct.mchStraps.padding[2487] = 0xff; +- descriptorStruct.mchStraps.padding[2488] = 0xff; +- descriptorStruct.mchStraps.padding[2489] = 0xff; +- descriptorStruct.mchStraps.padding[2490] = 0xff; +- descriptorStruct.mchStraps.padding[2491] = 0xff; +- descriptorStruct.mchStraps.padding[2492] = 0xff; +- descriptorStruct.mchStraps.padding[2493] = 0xff; +- descriptorStruct.mchStraps.padding[2494] = 0xff; +- descriptorStruct.mchStraps.padding[2495] = 0xff; +- descriptorStruct.mchStraps.padding[2496] = 0xff; +- descriptorStruct.mchStraps.padding[2497] = 0xff; +- descriptorStruct.mchStraps.padding[2498] = 0xff; +- descriptorStruct.mchStraps.padding[2499] = 0xff; +- descriptorStruct.mchStraps.padding[2500] = 0xff; +- descriptorStruct.mchStraps.padding[2501] = 0xff; +- descriptorStruct.mchStraps.padding[2502] = 0xff; +- descriptorStruct.mchStraps.padding[2503] = 0xff; +- descriptorStruct.mchStraps.padding[2504] = 0xff; +- descriptorStruct.mchStraps.padding[2505] = 0xff; +- descriptorStruct.mchStraps.padding[2506] = 0xff; +- descriptorStruct.mchStraps.padding[2507] = 0xff; +- descriptorStruct.mchStraps.padding[2508] = 0xff; +- descriptorStruct.mchStraps.padding[2509] = 0xff; +- descriptorStruct.mchStraps.padding[2510] = 0xff; +- descriptorStruct.mchStraps.padding[2511] = 0xff; +- descriptorStruct.mchStraps.padding[2512] = 0xff; +- descriptorStruct.mchStraps.padding[2513] = 0xff; +- descriptorStruct.mchStraps.padding[2514] = 0xff; +- descriptorStruct.mchStraps.padding[2515] = 0xff; +- descriptorStruct.mchStraps.padding[2516] = 0xff; +- descriptorStruct.mchStraps.padding[2517] = 0xff; +- descriptorStruct.mchStraps.padding[2518] = 0xff; +- descriptorStruct.mchStraps.padding[2519] = 0xff; +- descriptorStruct.mchStraps.padding[2520] = 0xff; +- descriptorStruct.mchStraps.padding[2521] = 0xff; +- descriptorStruct.mchStraps.padding[2522] = 0xff; +- descriptorStruct.mchStraps.padding[2523] = 0xff; +- descriptorStruct.mchStraps.padding[2524] = 0xff; +- descriptorStruct.mchStraps.padding[2525] = 0xff; +- descriptorStruct.mchStraps.padding[2526] = 0xff; +- descriptorStruct.mchStraps.padding[2527] = 0xff; +- descriptorStruct.mchStraps.padding[2528] = 0xff; +- descriptorStruct.mchStraps.padding[2529] = 0xff; +- descriptorStruct.mchStraps.padding[2530] = 0xff; +- descriptorStruct.mchStraps.padding[2531] = 0xff; +- descriptorStruct.mchStraps.padding[2532] = 0xff; +- descriptorStruct.mchStraps.padding[2533] = 0xff; +- descriptorStruct.mchStraps.padding[2534] = 0xff; +- descriptorStruct.mchStraps.padding[2535] = 0xff; +- descriptorStruct.mchStraps.padding[2536] = 0xff; +- descriptorStruct.mchStraps.padding[2537] = 0xff; +- descriptorStruct.mchStraps.padding[2538] = 0xff; +- descriptorStruct.mchStraps.padding[2539] = 0xff; +- descriptorStruct.mchStraps.padding[2540] = 0xff; +- descriptorStruct.mchStraps.padding[2541] = 0xff; +- descriptorStruct.mchStraps.padding[2542] = 0xff; +- descriptorStruct.mchStraps.padding[2543] = 0xff; +- descriptorStruct.mchStraps.padding[2544] = 0xff; +- descriptorStruct.mchStraps.padding[2545] = 0xff; +- descriptorStruct.mchStraps.padding[2546] = 0xff; +- descriptorStruct.mchStraps.padding[2547] = 0xff; +- descriptorStruct.mchStraps.padding[2548] = 0xff; +- descriptorStruct.mchStraps.padding[2549] = 0xff; +- descriptorStruct.mchStraps.padding[2550] = 0xff; +- descriptorStruct.mchStraps.padding[2551] = 0xff; +- descriptorStruct.mchStraps.padding[2552] = 0xff; +- descriptorStruct.mchStraps.padding[2553] = 0xff; +- descriptorStruct.mchStraps.padding[2554] = 0xff; +- descriptorStruct.mchStraps.padding[2555] = 0xff; +- descriptorStruct.mchStraps.padding[2556] = 0xff; +- descriptorStruct.mchStraps.padding[2557] = 0xff; +- descriptorStruct.mchStraps.padding[2558] = 0xff; +- descriptorStruct.mchStraps.padding[2559] = 0xff; +- descriptorStruct.mchStraps.padding[2560] = 0xff; +- descriptorStruct.mchStraps.padding[2561] = 0xff; +- descriptorStruct.mchStraps.padding[2562] = 0xff; +- descriptorStruct.mchStraps.padding[2563] = 0xff; +- descriptorStruct.mchStraps.padding[2564] = 0xff; +- descriptorStruct.mchStraps.padding[2565] = 0xff; +- descriptorStruct.mchStraps.padding[2566] = 0xff; +- descriptorStruct.mchStraps.padding[2567] = 0xff; +- descriptorStruct.mchStraps.padding[2568] = 0xff; +- descriptorStruct.mchStraps.padding[2569] = 0xff; +- descriptorStruct.mchStraps.padding[2570] = 0xff; +- descriptorStruct.mchStraps.padding[2571] = 0xff; +- descriptorStruct.mchStraps.padding[2572] = 0xff; +- descriptorStruct.mchStraps.padding[2573] = 0xff; +- descriptorStruct.mchStraps.padding[2574] = 0xff; +- descriptorStruct.mchStraps.padding[2575] = 0xff; +- descriptorStruct.mchStraps.padding[2576] = 0xff; +- descriptorStruct.mchStraps.padding[2577] = 0xff; +- descriptorStruct.mchStraps.padding[2578] = 0xff; +- descriptorStruct.mchStraps.padding[2579] = 0xff; +- descriptorStruct.mchStraps.padding[2580] = 0xff; +- descriptorStruct.mchStraps.padding[2581] = 0xff; +- descriptorStruct.mchStraps.padding[2582] = 0xff; +- descriptorStruct.mchStraps.padding[2583] = 0xff; +- descriptorStruct.mchStraps.padding[2584] = 0xff; +- descriptorStruct.mchStraps.padding[2585] = 0xff; +- descriptorStruct.mchStraps.padding[2586] = 0xff; +- descriptorStruct.mchStraps.padding[2587] = 0xff; +- descriptorStruct.mchStraps.padding[2588] = 0xff; +- descriptorStruct.mchStraps.padding[2589] = 0xff; +- descriptorStruct.mchStraps.padding[2590] = 0xff; +- descriptorStruct.mchStraps.padding[2591] = 0xff; +- descriptorStruct.mchStraps.padding[2592] = 0xff; +- descriptorStruct.mchStraps.padding[2593] = 0xff; +- descriptorStruct.mchStraps.padding[2594] = 0xff; +- descriptorStruct.mchStraps.padding[2595] = 0xff; +- descriptorStruct.mchStraps.padding[2596] = 0xff; +- descriptorStruct.mchStraps.padding[2597] = 0xff; +- descriptorStruct.mchStraps.padding[2598] = 0xff; +- descriptorStruct.mchStraps.padding[2599] = 0xff; +- descriptorStruct.mchStraps.padding[2600] = 0xff; +- descriptorStruct.mchStraps.padding[2601] = 0xff; +- descriptorStruct.mchStraps.padding[2602] = 0xff; +- descriptorStruct.mchStraps.padding[2603] = 0xff; +- descriptorStruct.mchStraps.padding[2604] = 0xff; +- descriptorStruct.mchStraps.padding[2605] = 0xff; +- descriptorStruct.mchStraps.padding[2606] = 0xff; +- descriptorStruct.mchStraps.padding[2607] = 0xff; +- descriptorStruct.mchStraps.padding[2608] = 0xff; +- descriptorStruct.mchStraps.padding[2609] = 0xff; +- descriptorStruct.mchStraps.padding[2610] = 0xff; +- descriptorStruct.mchStraps.padding[2611] = 0xff; +- descriptorStruct.mchStraps.padding[2612] = 0xff; +- descriptorStruct.mchStraps.padding[2613] = 0xff; +- descriptorStruct.mchStraps.padding[2614] = 0xff; +- descriptorStruct.mchStraps.padding[2615] = 0xff; +- descriptorStruct.mchStraps.padding[2616] = 0xff; +- descriptorStruct.mchStraps.padding[2617] = 0xff; +- descriptorStruct.mchStraps.padding[2618] = 0xff; +- descriptorStruct.mchStraps.padding[2619] = 0xff; +- descriptorStruct.mchStraps.padding[2620] = 0xff; +- descriptorStruct.mchStraps.padding[2621] = 0xff; +- descriptorStruct.mchStraps.padding[2622] = 0xff; +- descriptorStruct.mchStraps.padding[2623] = 0xff; +- descriptorStruct.mchStraps.padding[2624] = 0xff; +- descriptorStruct.mchStraps.padding[2625] = 0xff; +- descriptorStruct.mchStraps.padding[2626] = 0xff; +- descriptorStruct.mchStraps.padding[2627] = 0xff; +- descriptorStruct.mchStraps.padding[2628] = 0xff; +- descriptorStruct.mchStraps.padding[2629] = 0xff; +- descriptorStruct.mchStraps.padding[2630] = 0xff; +- descriptorStruct.mchStraps.padding[2631] = 0xff; +- descriptorStruct.mchStraps.padding[2632] = 0xff; +- descriptorStruct.mchStraps.padding[2633] = 0xff; +- descriptorStruct.mchStraps.padding[2634] = 0xff; +- descriptorStruct.mchStraps.padding[2635] = 0xff; +- descriptorStruct.mchStraps.padding[2636] = 0xff; +- descriptorStruct.mchStraps.padding[2637] = 0xff; +- descriptorStruct.mchStraps.padding[2638] = 0xff; +- descriptorStruct.mchStraps.padding[2639] = 0xff; +- descriptorStruct.mchStraps.padding[2640] = 0xff; +- descriptorStruct.mchStraps.padding[2641] = 0xff; +- descriptorStruct.mchStraps.padding[2642] = 0xff; +- descriptorStruct.mchStraps.padding[2643] = 0xff; +- descriptorStruct.mchStraps.padding[2644] = 0xff; +- descriptorStruct.mchStraps.padding[2645] = 0xff; +- descriptorStruct.mchStraps.padding[2646] = 0xff; +- descriptorStruct.mchStraps.padding[2647] = 0xff; +- descriptorStruct.mchStraps.padding[2648] = 0xff; +- descriptorStruct.mchStraps.padding[2649] = 0xff; +- descriptorStruct.mchStraps.padding[2650] = 0xff; +- descriptorStruct.mchStraps.padding[2651] = 0xff; +- descriptorStruct.mchStraps.padding[2652] = 0xff; +- descriptorStruct.mchStraps.padding[2653] = 0xff; +- descriptorStruct.mchStraps.padding[2654] = 0xff; +- descriptorStruct.mchStraps.padding[2655] = 0xff; +- descriptorStruct.mchStraps.padding[2656] = 0xff; +- descriptorStruct.mchStraps.padding[2657] = 0xff; +- descriptorStruct.mchStraps.padding[2658] = 0xff; +- descriptorStruct.mchStraps.padding[2659] = 0xff; +- descriptorStruct.mchStraps.padding[2660] = 0xff; +- descriptorStruct.mchStraps.padding[2661] = 0xff; +- descriptorStruct.mchStraps.padding[2662] = 0xff; +- descriptorStruct.mchStraps.padding[2663] = 0xff; +- descriptorStruct.mchStraps.padding[2664] = 0xff; +- descriptorStruct.mchStraps.padding[2665] = 0xff; +- descriptorStruct.mchStraps.padding[2666] = 0xff; +- descriptorStruct.mchStraps.padding[2667] = 0xff; +- descriptorStruct.mchStraps.padding[2668] = 0xff; +- descriptorStruct.mchStraps.padding[2669] = 0xff; +- descriptorStruct.mchStraps.padding[2670] = 0xff; +- descriptorStruct.mchStraps.padding[2671] = 0xff; +- descriptorStruct.mchStraps.padding[2672] = 0xff; +- descriptorStruct.mchStraps.padding[2673] = 0xff; +- descriptorStruct.mchStraps.padding[2674] = 0xff; +- descriptorStruct.mchStraps.padding[2675] = 0xff; +- descriptorStruct.mchStraps.padding[2676] = 0xff; +- descriptorStruct.mchStraps.padding[2677] = 0xff; +- descriptorStruct.mchStraps.padding[2678] = 0xff; +- descriptorStruct.mchStraps.padding[2679] = 0xff; +- descriptorStruct.mchStraps.padding[2680] = 0xff; +- descriptorStruct.mchStraps.padding[2681] = 0xff; +- descriptorStruct.mchStraps.padding[2682] = 0xff; +- descriptorStruct.mchStraps.padding[2683] = 0xff; +- descriptorStruct.mchStraps.padding[2684] = 0xff; +- descriptorStruct.mchStraps.padding[2685] = 0xff; +- descriptorStruct.mchStraps.padding[2686] = 0xff; +- descriptorStruct.mchStraps.padding[2687] = 0xff; +- descriptorStruct.mchStraps.padding[2688] = 0xff; +- descriptorStruct.mchStraps.padding[2689] = 0xff; +- descriptorStruct.mchStraps.padding[2690] = 0xff; +- descriptorStruct.mchStraps.padding[2691] = 0xff; +- descriptorStruct.mchStraps.padding[2692] = 0xff; +- descriptorStruct.mchStraps.padding[2693] = 0xff; +- descriptorStruct.mchStraps.padding[2694] = 0xff; +- descriptorStruct.mchStraps.padding[2695] = 0xff; +- descriptorStruct.mchStraps.padding[2696] = 0xff; +- descriptorStruct.mchStraps.padding[2697] = 0xff; +- descriptorStruct.mchStraps.padding[2698] = 0xff; +- descriptorStruct.mchStraps.padding[2699] = 0xff; +- descriptorStruct.mchStraps.padding[2700] = 0xff; +- descriptorStruct.mchStraps.padding[2701] = 0xff; +- descriptorStruct.mchStraps.padding[2702] = 0xff; +- descriptorStruct.mchStraps.padding[2703] = 0xff; +- descriptorStruct.mchStraps.padding[2704] = 0xff; +- descriptorStruct.mchStraps.padding[2705] = 0xff; +- descriptorStruct.mchStraps.padding[2706] = 0xff; +- descriptorStruct.mchStraps.padding[2707] = 0xff; +- descriptorStruct.mchStraps.padding[2708] = 0xff; +- descriptorStruct.mchStraps.padding[2709] = 0xff; +- descriptorStruct.mchStraps.padding[2710] = 0xff; +- descriptorStruct.mchStraps.padding[2711] = 0xff; +- descriptorStruct.mchStraps.padding[2712] = 0xff; +- descriptorStruct.mchStraps.padding[2713] = 0xff; +- descriptorStruct.mchStraps.padding[2714] = 0xff; +- descriptorStruct.mchStraps.padding[2715] = 0xff; +- descriptorStruct.mchStraps.padding[2716] = 0xff; +- descriptorStruct.mchStraps.padding[2717] = 0xff; +- descriptorStruct.mchStraps.padding[2718] = 0xff; +- descriptorStruct.mchStraps.padding[2719] = 0xff; +- descriptorStruct.mchStraps.padding[2720] = 0xff; +- descriptorStruct.mchStraps.padding[2721] = 0xff; +- descriptorStruct.mchStraps.padding[2722] = 0xff; +- descriptorStruct.mchStraps.padding[2723] = 0xff; +- descriptorStruct.mchStraps.padding[2724] = 0xff; +- descriptorStruct.mchStraps.padding[2725] = 0xff; +- descriptorStruct.mchStraps.padding[2726] = 0xff; +- descriptorStruct.mchStraps.padding[2727] = 0xff; +- descriptorStruct.mchStraps.padding[2728] = 0xff; +- descriptorStruct.mchStraps.padding[2729] = 0xff; +- descriptorStruct.mchStraps.padding[2730] = 0xff; +- descriptorStruct.mchStraps.padding[2731] = 0xff; +- descriptorStruct.mchStraps.padding[2732] = 0xff; +- descriptorStruct.mchStraps.padding[2733] = 0xff; +- descriptorStruct.mchStraps.padding[2734] = 0xff; +- descriptorStruct.mchStraps.padding[2735] = 0xff; +- descriptorStruct.mchStraps.padding[2736] = 0xff; +- descriptorStruct.mchStraps.padding[2737] = 0xff; +- descriptorStruct.mchStraps.padding[2738] = 0xff; +- descriptorStruct.mchStraps.padding[2739] = 0xff; +- descriptorStruct.mchStraps.padding[2740] = 0xff; +- descriptorStruct.mchStraps.padding[2741] = 0xff; +- descriptorStruct.mchStraps.padding[2742] = 0xff; +- descriptorStruct.mchStraps.padding[2743] = 0xff; +- descriptorStruct.mchStraps.padding[2744] = 0xff; +- descriptorStruct.mchStraps.padding[2745] = 0xff; +- descriptorStruct.mchStraps.padding[2746] = 0xff; +- descriptorStruct.mchStraps.padding[2747] = 0xff; +- descriptorStruct.mchStraps.padding[2748] = 0xff; +- descriptorStruct.mchStraps.padding[2749] = 0xff; +- descriptorStruct.mchStraps.padding[2750] = 0xff; +- descriptorStruct.mchStraps.padding[2751] = 0xff; +- descriptorStruct.mchStraps.padding[2752] = 0xff; +- descriptorStruct.mchStraps.padding[2753] = 0xff; +- descriptorStruct.mchStraps.padding[2754] = 0xff; +- descriptorStruct.mchStraps.padding[2755] = 0xff; +- descriptorStruct.mchStraps.padding[2756] = 0xff; +- descriptorStruct.mchStraps.padding[2757] = 0xff; +- descriptorStruct.mchStraps.padding[2758] = 0xff; +- descriptorStruct.mchStraps.padding[2759] = 0xff; +- descriptorStruct.mchStraps.padding[2760] = 0xff; +- descriptorStruct.mchStraps.padding[2761] = 0xff; +- descriptorStruct.mchStraps.padding[2762] = 0xff; +- descriptorStruct.mchStraps.padding[2763] = 0xff; +- descriptorStruct.mchStraps.padding[2764] = 0xff; +- descriptorStruct.mchStraps.padding[2765] = 0xff; +- descriptorStruct.mchStraps.padding[2766] = 0xff; +- descriptorStruct.mchStraps.padding[2767] = 0xff; +- descriptorStruct.mchStraps.padding[2768] = 0xff; +- descriptorStruct.mchStraps.padding[2769] = 0xff; +- descriptorStruct.mchStraps.padding[2770] = 0xff; +- descriptorStruct.mchStraps.padding[2771] = 0xff; +- descriptorStruct.mchStraps.padding[2772] = 0xff; +- descriptorStruct.mchStraps.padding[2773] = 0xff; +- descriptorStruct.mchStraps.padding[2774] = 0xff; +- descriptorStruct.mchStraps.padding[2775] = 0xff; +- descriptorStruct.mchStraps.padding[2776] = 0xff; +- descriptorStruct.mchStraps.padding[2777] = 0xff; +- descriptorStruct.mchStraps.padding[2778] = 0xff; +- descriptorStruct.mchStraps.padding[2779] = 0xff; +- descriptorStruct.mchStraps.padding[2780] = 0xff; +- descriptorStruct.mchStraps.padding[2781] = 0xff; +- descriptorStruct.mchStraps.padding[2782] = 0xff; +- descriptorStruct.mchStraps.padding[2783] = 0xff; +- descriptorStruct.mchStraps.padding[2784] = 0xff; +- descriptorStruct.mchStraps.padding[2785] = 0xff; +- descriptorStruct.mchStraps.padding[2786] = 0xff; +- descriptorStruct.mchStraps.padding[2787] = 0xff; +- descriptorStruct.mchStraps.padding[2788] = 0xff; +- descriptorStruct.mchStraps.padding[2789] = 0xff; +- descriptorStruct.mchStraps.padding[2790] = 0xff; +- descriptorStruct.mchStraps.padding[2791] = 0xff; +- descriptorStruct.mchStraps.padding[2792] = 0xff; +- descriptorStruct.mchStraps.padding[2793] = 0xff; +- descriptorStruct.mchStraps.padding[2794] = 0xff; +- descriptorStruct.mchStraps.padding[2795] = 0xff; +- descriptorStruct.mchStraps.padding[2796] = 0xff; +- descriptorStruct.mchStraps.padding[2797] = 0xff; +- descriptorStruct.mchStraps.padding[2798] = 0xff; +- descriptorStruct.mchStraps.padding[2799] = 0xff; +- descriptorStruct.mchStraps.padding[2800] = 0xff; +- descriptorStruct.mchStraps.padding[2801] = 0xff; +- descriptorStruct.mchStraps.padding[2802] = 0xff; +- descriptorStruct.mchStraps.padding[2803] = 0xff; +- descriptorStruct.mchStraps.padding[2804] = 0xff; +- descriptorStruct.mchStraps.padding[2805] = 0xff; +- descriptorStruct.mchStraps.padding[2806] = 0xff; +- descriptorStruct.mchStraps.padding[2807] = 0xff; +- descriptorStruct.mchStraps.padding[2808] = 0xff; +- descriptorStruct.mchStraps.padding[2809] = 0xff; +- descriptorStruct.mchStraps.padding[2810] = 0xff; +- descriptorStruct.mchStraps.padding[2811] = 0xff; +- descriptorStruct.mchStraps.padding[2812] = 0xff; +- descriptorStruct.mchStraps.padding[2813] = 0xff; +- descriptorStruct.mchStraps.padding[2814] = 0xff; +- descriptorStruct.mchStraps.padding[2815] = 0xff; +- descriptorStruct.mchStraps.padding[2816] = 0xff; +- descriptorStruct.mchStraps.padding[2817] = 0xff; +- descriptorStruct.mchStraps.padding[2818] = 0xff; +- descriptorStruct.mchStraps.padding[2819] = 0xff; +- descriptorStruct.mchStraps.padding[2820] = 0xff; +- descriptorStruct.mchStraps.padding[2821] = 0xff; +- descriptorStruct.mchStraps.padding[2822] = 0xff; +- descriptorStruct.mchStraps.padding[2823] = 0xff; +- descriptorStruct.mchStraps.padding[2824] = 0xff; +- descriptorStruct.mchStraps.padding[2825] = 0xff; +- descriptorStruct.mchStraps.padding[2826] = 0xff; +- descriptorStruct.mchStraps.padding[2827] = 0xff; +- descriptorStruct.mchStraps.padding[2828] = 0xff; +- descriptorStruct.mchStraps.padding[2829] = 0xff; +- descriptorStruct.mchStraps.padding[2830] = 0xff; +- descriptorStruct.mchStraps.padding[2831] = 0xff; +- descriptorStruct.mchStraps.padding[2832] = 0xff; +- descriptorStruct.mchStraps.padding[2833] = 0xff; +- descriptorStruct.mchStraps.padding[2834] = 0xff; +- descriptorStruct.mchStraps.padding[2835] = 0xff; +- descriptorStruct.mchStraps.padding[2836] = 0xff; +- descriptorStruct.mchStraps.padding[2837] = 0xff; +- descriptorStruct.mchStraps.padding[2838] = 0xff; +- descriptorStruct.mchStraps.padding[2839] = 0xff; +- descriptorStruct.mchStraps.padding[2840] = 0xff; +- descriptorStruct.mchStraps.padding[2841] = 0xff; +- descriptorStruct.mchStraps.padding[2842] = 0xff; +- descriptorStruct.mchStraps.padding[2843] = 0xff; +- descriptorStruct.mchStraps.padding[2844] = 0xff; +- descriptorStruct.mchStraps.padding[2845] = 0xff; +- descriptorStruct.mchStraps.padding[2846] = 0xff; +- descriptorStruct.mchStraps.padding[2847] = 0xff; +- descriptorStruct.mchStraps.padding[2848] = 0xff; +- descriptorStruct.mchStraps.padding[2849] = 0xff; +- descriptorStruct.mchStraps.padding[2850] = 0xff; +- descriptorStruct.mchStraps.padding[2851] = 0xff; +- descriptorStruct.mchStraps.padding[2852] = 0xff; +- descriptorStruct.mchStraps.padding[2853] = 0xff; +- descriptorStruct.mchStraps.padding[2854] = 0xff; +- descriptorStruct.mchStraps.padding[2855] = 0xff; +- descriptorStruct.mchStraps.padding[2856] = 0xff; +- descriptorStruct.mchStraps.padding[2857] = 0xff; +- descriptorStruct.mchStraps.padding[2858] = 0xff; +- descriptorStruct.mchStraps.padding[2859] = 0xff; +- descriptorStruct.mchStraps.padding[2860] = 0xff; +- descriptorStruct.mchStraps.padding[2861] = 0xff; +- descriptorStruct.mchStraps.padding[2862] = 0xff; +- descriptorStruct.mchStraps.padding[2863] = 0xff; +- descriptorStruct.mchStraps.padding[2864] = 0xff; +- descriptorStruct.mchStraps.padding[2865] = 0xff; +- descriptorStruct.mchStraps.padding[2866] = 0xff; +- descriptorStruct.mchStraps.padding[2867] = 0xff; +- descriptorStruct.mchStraps.padding[2868] = 0xff; +- descriptorStruct.mchStraps.padding[2869] = 0xff; +- descriptorStruct.mchStraps.padding[2870] = 0xff; +- descriptorStruct.mchStraps.padding[2871] = 0xff; +- descriptorStruct.mchStraps.padding[2872] = 0xff; +- descriptorStruct.mchStraps.padding[2873] = 0xff; +- descriptorStruct.mchStraps.padding[2874] = 0xff; +- descriptorStruct.mchStraps.padding[2875] = 0xff; +- descriptorStruct.mchStraps.padding[2876] = 0xff; +- descriptorStruct.mchStraps.padding[2877] = 0xff; +- descriptorStruct.mchStraps.padding[2878] = 0xff; +- descriptorStruct.mchStraps.padding[2879] = 0xff; +- descriptorStruct.mchStraps.padding[2880] = 0xff; +- descriptorStruct.mchStraps.padding[2881] = 0xff; +- descriptorStruct.mchStraps.padding[2882] = 0xff; +- descriptorStruct.mchStraps.padding[2883] = 0xff; +- descriptorStruct.mchStraps.padding[2884] = 0xff; +- descriptorStruct.mchStraps.padding[2885] = 0xff; +- descriptorStruct.mchStraps.padding[2886] = 0xff; +- descriptorStruct.mchStraps.padding[2887] = 0xff; +- descriptorStruct.mchStraps.padding[2888] = 0xff; +- descriptorStruct.mchStraps.padding[2889] = 0xff; +- descriptorStruct.mchStraps.padding[2890] = 0xff; +- descriptorStruct.mchStraps.padding[2891] = 0xff; +- descriptorStruct.mchStraps.padding[2892] = 0xff; +- descriptorStruct.mchStraps.padding[2893] = 0xff; +- descriptorStruct.mchStraps.padding[2894] = 0xff; +- descriptorStruct.mchStraps.padding[2895] = 0xff; +- descriptorStruct.mchStraps.padding[2896] = 0xff; +- descriptorStruct.mchStraps.padding[2897] = 0xff; +- descriptorStruct.mchStraps.padding[2898] = 0xff; +- descriptorStruct.mchStraps.padding[2899] = 0xff; +- descriptorStruct.mchStraps.padding[2900] = 0xff; +- descriptorStruct.mchStraps.padding[2901] = 0xff; +- descriptorStruct.mchStraps.padding[2902] = 0xff; +- descriptorStruct.mchStraps.padding[2903] = 0xff; +- descriptorStruct.mchStraps.padding[2904] = 0xff; +- descriptorStruct.mchStraps.padding[2905] = 0xff; +- descriptorStruct.mchStraps.padding[2906] = 0xff; +- descriptorStruct.mchStraps.padding[2907] = 0xff; +- descriptorStruct.mchStraps.padding[2908] = 0xff; +- descriptorStruct.mchStraps.padding[2909] = 0xff; +- descriptorStruct.mchStraps.padding[2910] = 0xff; +- descriptorStruct.mchStraps.padding[2911] = 0xff; +- descriptorStruct.mchStraps.padding[2912] = 0xff; +- descriptorStruct.mchStraps.padding[2913] = 0xff; +- descriptorStruct.mchStraps.padding[2914] = 0xff; +- descriptorStruct.mchStraps.padding[2915] = 0xff; +- descriptorStruct.mchStraps.padding[2916] = 0xff; +- descriptorStruct.mchStraps.padding[2917] = 0xff; +- descriptorStruct.mchStraps.padding[2918] = 0xff; +- descriptorStruct.mchStraps.padding[2919] = 0xff; +- descriptorStruct.mchStraps.padding[2920] = 0xff; +- descriptorStruct.mchStraps.padding[2921] = 0xff; +- descriptorStruct.mchStraps.padding[2922] = 0xff; +- descriptorStruct.mchStraps.padding[2923] = 0xff; +- descriptorStruct.mchStraps.padding[2924] = 0xff; +- descriptorStruct.mchStraps.padding[2925] = 0xff; +- descriptorStruct.mchStraps.padding[2926] = 0xff; +- descriptorStruct.mchStraps.padding[2927] = 0xff; +- descriptorStruct.mchStraps.padding[2928] = 0xff; +- descriptorStruct.mchStraps.padding[2929] = 0xff; +- descriptorStruct.mchStraps.padding[2930] = 0xff; +- descriptorStruct.mchStraps.padding[2931] = 0xff; +- descriptorStruct.mchStraps.padding[2932] = 0xff; +- descriptorStruct.mchStraps.padding[2933] = 0xff; +- descriptorStruct.mchStraps.padding[2934] = 0xff; +- descriptorStruct.mchStraps.padding[2935] = 0xff; +- descriptorStruct.mchStraps.padding[2936] = 0xff; +- descriptorStruct.mchStraps.padding[2937] = 0xff; +- descriptorStruct.mchStraps.padding[2938] = 0xff; +- descriptorStruct.mchStraps.padding[2939] = 0xff; +- descriptorStruct.mchStraps.padding[2940] = 0xff; +- descriptorStruct.mchStraps.padding[2941] = 0xff; +- descriptorStruct.mchStraps.padding[2942] = 0xff; +- descriptorStruct.mchStraps.padding[2943] = 0xff; +- descriptorStruct.mchStraps.padding[2944] = 0xff; +- descriptorStruct.mchStraps.padding[2945] = 0xff; +- descriptorStruct.mchStraps.padding[2946] = 0xff; +- descriptorStruct.mchStraps.padding[2947] = 0xff; +- descriptorStruct.mchStraps.padding[2948] = 0xff; +- descriptorStruct.mchStraps.padding[2949] = 0xff; +- descriptorStruct.mchStraps.padding[2950] = 0xff; +- descriptorStruct.mchStraps.padding[2951] = 0xff; +- descriptorStruct.mchStraps.padding[2952] = 0xff; +- descriptorStruct.mchStraps.padding[2953] = 0xff; +- descriptorStruct.mchStraps.padding[2954] = 0xff; +- descriptorStruct.mchStraps.padding[2955] = 0xff; +- descriptorStruct.mchStraps.padding[2956] = 0xff; +- descriptorStruct.mchStraps.padding[2957] = 0xff; +- descriptorStruct.mchStraps.padding[2958] = 0xff; +- descriptorStruct.mchStraps.padding[2959] = 0xff; +- descriptorStruct.mchStraps.padding[2960] = 0xff; +- descriptorStruct.mchStraps.padding[2961] = 0xff; +- descriptorStruct.mchStraps.padding[2962] = 0xff; +- descriptorStruct.mchStraps.padding[2963] = 0xff; +- descriptorStruct.mchStraps.padding[2964] = 0xff; +- descriptorStruct.mchStraps.padding[2965] = 0xff; +- descriptorStruct.mchStraps.padding[2966] = 0xff; +- descriptorStruct.mchStraps.padding[2967] = 0xff; +- descriptorStruct.mchStraps.padding[2968] = 0xff; +- descriptorStruct.mchStraps.padding[2969] = 0xff; +- descriptorStruct.mchStraps.padding[2970] = 0xff; +- descriptorStruct.mchStraps.padding[2971] = 0xff; +- descriptorStruct.mchStraps.padding[2972] = 0xff; +- descriptorStruct.mchStraps.padding[2973] = 0xff; +- descriptorStruct.mchStraps.padding[2974] = 0xff; +- descriptorStruct.mchStraps.padding[2975] = 0xff; +- descriptorStruct.mchStraps.padding[2976] = 0xff; +- descriptorStruct.mchStraps.padding[2977] = 0xff; +- descriptorStruct.mchStraps.padding[2978] = 0xff; +- descriptorStruct.mchStraps.padding[2979] = 0xff; +- descriptorStruct.mchStraps.padding[2980] = 0xff; +- descriptorStruct.mchStraps.padding[2981] = 0xff; +- descriptorStruct.mchStraps.padding[2982] = 0xff; +- descriptorStruct.mchStraps.padding[2983] = 0xff; +- descriptorStruct.mchStraps.padding[2984] = 0xff; +- descriptorStruct.mchStraps.padding[2985] = 0xff; +- descriptorStruct.mchStraps.padding[2986] = 0xff; +- descriptorStruct.mchStraps.padding[2987] = 0xff; +- descriptorStruct.mchStraps.padding[2988] = 0xff; +- descriptorStruct.mchStraps.padding[2989] = 0xff; +- descriptorStruct.mchStraps.padding[2990] = 0xff; +- descriptorStruct.mchStraps.padding[2991] = 0xff; +- descriptorStruct.mchStraps.padding[2992] = 0xff; +- descriptorStruct.mchStraps.padding[2993] = 0xff; +- descriptorStruct.mchStraps.padding[2994] = 0xff; +- descriptorStruct.mchStraps.padding[2995] = 0xff; +- descriptorStruct.mchStraps.padding[2996] = 0xff; +- descriptorStruct.mchStraps.padding[2997] = 0xff; +- descriptorStruct.mchStraps.padding[2998] = 0xff; +- descriptorStruct.mchStraps.padding[2999] = 0xff; +- descriptorStruct.mchStraps.padding[3000] = 0xff; +- descriptorStruct.mchStraps.padding[3001] = 0xff; +- descriptorStruct.mchStraps.padding[3002] = 0xff; +- descriptorStruct.mchStraps.padding[3003] = 0xff; +- descriptorStruct.mchStraps.padding[3004] = 0xff; +- descriptorStruct.mchStraps.padding[3005] = 0xff; +- descriptorStruct.mchStraps.padding[3006] = 0xff; +- descriptorStruct.mchStraps.padding[3007] = 0xff; +- descriptorStruct.mchStraps.padding[3008] = 0xff; +- descriptorStruct.mchStraps.padding[3009] = 0xff; +- descriptorStruct.mchStraps.padding[3010] = 0xff; +- descriptorStruct.mchStraps.padding[3011] = 0xff; +- descriptorStruct.mchStraps.padding[3012] = 0xff; +- descriptorStruct.mchStraps.padding[3013] = 0xff; +- descriptorStruct.mchStraps.padding[3014] = 0xff; +- descriptorStruct.mchStraps.padding[3015] = 0xff; +- descriptorStruct.mchStraps.padding[3016] = 0xff; +- descriptorStruct.mchStraps.padding[3017] = 0xff; +- descriptorStruct.mchStraps.padding[3018] = 0xff; +- descriptorStruct.mchStraps.padding[3019] = 0xff; +- descriptorStruct.mchStraps.padding[3020] = 0xff; +- descriptorStruct.mchStraps.padding[3021] = 0xff; +- descriptorStruct.mchStraps.padding[3022] = 0xff; +- descriptorStruct.mchStraps.padding[3023] = 0xff; +- descriptorStruct.mchStraps.padding[3024] = 0xff; +- descriptorStruct.mchStraps.padding[3025] = 0xff; +- descriptorStruct.mchStraps.padding[3026] = 0xff; +- descriptorStruct.mchStraps.padding[3027] = 0xff; +- descriptorStruct.mchStraps.padding[3028] = 0xff; +- descriptorStruct.mchStraps.padding[3029] = 0xff; +- descriptorStruct.mchStraps.padding[3030] = 0xff; +- descriptorStruct.mchStraps.padding[3031] = 0xff; +- descriptorStruct.mchStraps.padding[3032] = 0xff; +- descriptorStruct.mchStraps.padding[3033] = 0xff; +- descriptorStruct.mchStraps.padding[3034] = 0xff; +- descriptorStruct.mchStraps.padding[3035] = 0xff; +- descriptorStruct.mchStraps.padding[3036] = 0xff; +- descriptorStruct.mchStraps.padding[3037] = 0xff; +- descriptorStruct.mchStraps.padding[3038] = 0xff; +- descriptorStruct.mchStraps.padding[3039] = 0xff; +- descriptorStruct.mchStraps.padding[3040] = 0xff; +- descriptorStruct.mchStraps.padding[3041] = 0xff; +- descriptorStruct.mchStraps.padding[3042] = 0xff; +- descriptorStruct.mchStraps.padding[3043] = 0xff; +- descriptorStruct.mchStraps.padding[3044] = 0xff; +- descriptorStruct.mchStraps.padding[3045] = 0xff; +- descriptorStruct.mchStraps.padding[3046] = 0xff; +- descriptorStruct.mchStraps.padding[3047] = 0xff; +- descriptorStruct.mchStraps.padding[3048] = 0xff; +- descriptorStruct.mchStraps.padding[3049] = 0xff; +- descriptorStruct.mchStraps.padding[3050] = 0xff; +- descriptorStruct.mchStraps.padding[3051] = 0xff; +- descriptorStruct.mchStraps.padding[3052] = 0xff; +- descriptorStruct.mchStraps.padding[3053] = 0xff; +- descriptorStruct.mchStraps.padding[3054] = 0xff; +- descriptorStruct.mchStraps.padding[3055] = 0xff; +- descriptorStruct.mchStraps.padding[3056] = 0xff; +- descriptorStruct.mchStraps.padding[3057] = 0xff; +- descriptorStruct.mchStraps.padding[3058] = 0xff; +- descriptorStruct.mchStraps.padding[3059] = 0xff; +- descriptorStruct.mchStraps.padding[3060] = 0xff; +- descriptorStruct.mchStraps.padding[3061] = 0xff; +- descriptorStruct.mchStraps.padding[3062] = 0xff; +- descriptorStruct.mchStraps.padding[3063] = 0xff; +- descriptorStruct.mchStraps.padding[3064] = 0xff; +- descriptorStruct.mchStraps.padding[3065] = 0xff; +- descriptorStruct.mchStraps.padding[3066] = 0xff; +- descriptorStruct.mchStraps.padding[3067] = 0xff; +- descriptorStruct.mchStraps.padding[3068] = 0xff; +- descriptorStruct.mchStraps.padding[3069] = 0xff; +- descriptorStruct.mchStraps.padding[3070] = 0xff; +- descriptorStruct.mchStraps.padding[3071] = 0xff; +- descriptorStruct.mchStraps.padding[3072] = 0xff; +- descriptorStruct.mchStraps.padding[3073] = 0xff; +- descriptorStruct.mchStraps.padding[3074] = 0xff; +- descriptorStruct.mchStraps.padding[3075] = 0xff; +- descriptorStruct.mchStraps.padding[3076] = 0xff; +- descriptorStruct.mchStraps.padding[3077] = 0xff; +- descriptorStruct.mchStraps.padding[3078] = 0xff; +- descriptorStruct.mchStraps.padding[3079] = 0xff; +- descriptorStruct.mchStraps.padding[3080] = 0xff; +- descriptorStruct.mchStraps.padding[3081] = 0xff; +- descriptorStruct.mchStraps.padding[3082] = 0xff; +- descriptorStruct.mchStraps.padding[3083] = 0xff; +- descriptorStruct.mchStraps.padding[3084] = 0xff; +- descriptorStruct.mchStraps.padding[3085] = 0xff; +- descriptorStruct.mchStraps.padding[3086] = 0xff; +- descriptorStruct.mchStraps.padding[3087] = 0xff; +- descriptorStruct.mchStraps.padding[3088] = 0xff; +- descriptorStruct.mchStraps.padding[3089] = 0xff; +- descriptorStruct.mchStraps.padding[3090] = 0xff; +- descriptorStruct.mchStraps.padding[3091] = 0xff; +- descriptorStruct.mchStraps.padding[3092] = 0xff; +- descriptorStruct.mchStraps.padding[3093] = 0xff; +- descriptorStruct.mchStraps.padding[3094] = 0xff; +- descriptorStruct.mchStraps.padding[3095] = 0xff; +- descriptorStruct.mchStraps.padding[3096] = 0xff; +- descriptorStruct.mchStraps.padding[3097] = 0xff; +- descriptorStruct.mchStraps.padding[3098] = 0xff; +- descriptorStruct.mchStraps.padding[3099] = 0xff; +- descriptorStruct.mchStraps.padding[3100] = 0xff; +- descriptorStruct.mchStraps.padding[3101] = 0xff; +- descriptorStruct.mchStraps.padding[3102] = 0xff; +- descriptorStruct.mchStraps.padding[3103] = 0xff; +- descriptorStruct.mchStraps.padding[3104] = 0xff; +- descriptorStruct.mchStraps.padding[3105] = 0xff; +- descriptorStruct.mchStraps.padding[3106] = 0xff; +- descriptorStruct.mchStraps.padding[3107] = 0xff; +- descriptorStruct.mchStraps.padding[3108] = 0xff; +- descriptorStruct.mchStraps.padding[3109] = 0xff; +- descriptorStruct.mchStraps.padding[3110] = 0xff; +- descriptorStruct.mchStraps.padding[3111] = 0xff; +- descriptorStruct.mchStraps.padding[3112] = 0xff; +- descriptorStruct.mchStraps.padding[3113] = 0xff; +- descriptorStruct.mchStraps.padding[3114] = 0xff; +- descriptorStruct.mchStraps.padding[3115] = 0xff; +- descriptorStruct.mchStraps.padding[3116] = 0xff; +- descriptorStruct.mchStraps.padding[3117] = 0xff; +- descriptorStruct.mchStraps.padding[3118] = 0xff; +- descriptorStruct.mchStraps.padding[3119] = 0xff; +- descriptorStruct.mchStraps.padding[3120] = 0xff; +- descriptorStruct.mchStraps.padding[3121] = 0xff; +- descriptorStruct.mchStraps.padding[3122] = 0xff; +- descriptorStruct.mchStraps.padding[3123] = 0xff; +- descriptorStruct.mchStraps.padding[3124] = 0xff; +- descriptorStruct.mchStraps.padding[3125] = 0xff; +- descriptorStruct.mchStraps.padding[3126] = 0xff; +- descriptorStruct.mchStraps.padding[3127] = 0xff; +- descriptorStruct.mchStraps.padding[3128] = 0xff; +- descriptorStruct.mchStraps.padding[3129] = 0xff; +- descriptorStruct.mchStraps.padding[3130] = 0xff; +- descriptorStruct.mchStraps.padding[3131] = 0xff; +- descriptorStruct.mchStraps.padding[3132] = 0xff; +- descriptorStruct.mchStraps.padding[3133] = 0xff; +- descriptorStruct.mchStraps.padding[3134] = 0xff; +- descriptorStruct.mchStraps.padding[3135] = 0xff; +- descriptorStruct.mchStraps.padding[3136] = 0xff; +- descriptorStruct.mchStraps.padding[3137] = 0xff; +- descriptorStruct.mchStraps.padding[3138] = 0xff; +- descriptorStruct.mchStraps.padding[3139] = 0xff; +- descriptorStruct.mchStraps.padding[3140] = 0xff; +- descriptorStruct.mchStraps.padding[3141] = 0xff; +- descriptorStruct.mchStraps.padding[3142] = 0xff; +- descriptorStruct.mchStraps.padding[3143] = 0xff; +- descriptorStruct.mchStraps.padding[3144] = 0xff; +- descriptorStruct.mchStraps.padding[3145] = 0xff; +- descriptorStruct.mchStraps.padding[3146] = 0xff; +- descriptorStruct.mchStraps.padding[3147] = 0xff; +- descriptorStruct.mchStraps.padding[3148] = 0xff; +- descriptorStruct.mchStraps.padding[3149] = 0xff; +- descriptorStruct.mchStraps.padding[3150] = 0xff; +- descriptorStruct.mchStraps.padding[3151] = 0xff; +- descriptorStruct.mchStraps.padding[3152] = 0xff; +- descriptorStruct.mchStraps.padding[3153] = 0xff; +- descriptorStruct.mchStraps.padding[3154] = 0xff; +- descriptorStruct.mchStraps.padding[3155] = 0xff; +- descriptorStruct.mchStraps.padding[3156] = 0xff; +- descriptorStruct.mchStraps.padding[3157] = 0xff; +- descriptorStruct.mchStraps.padding[3158] = 0xff; +- descriptorStruct.mchStraps.padding[3159] = 0xff; +- descriptorStruct.mchStraps.padding[3160] = 0xff; +- descriptorStruct.mchStraps.padding[3161] = 0xff; +- descriptorStruct.mchStraps.padding[3162] = 0xff; +- descriptorStruct.mchStraps.padding[3163] = 0xff; +- descriptorStruct.mchStraps.padding[3164] = 0xff; +- descriptorStruct.mchStraps.padding[3165] = 0xff; +- descriptorStruct.mchStraps.padding[3166] = 0xff; +- descriptorStruct.mchStraps.padding[3167] = 0xff; +- descriptorStruct.mchStraps.padding[3168] = 0xff; +- descriptorStruct.mchStraps.padding[3169] = 0xff; +- descriptorStruct.mchStraps.padding[3170] = 0xff; +- descriptorStruct.mchStraps.padding[3171] = 0xff; +- descriptorStruct.mchStraps.padding[3172] = 0xff; +- descriptorStruct.mchStraps.padding[3173] = 0xff; +- descriptorStruct.mchStraps.padding[3174] = 0xff; +- descriptorStruct.mchStraps.padding[3175] = 0xff; +- descriptorStruct.mchStraps.padding[3176] = 0xff; +- descriptorStruct.mchStraps.padding[3177] = 0xff; +- descriptorStruct.mchStraps.padding[3178] = 0xff; +- descriptorStruct.mchStraps.padding[3179] = 0xff; +- descriptorStruct.mchStraps.padding[3180] = 0xff; +- descriptorStruct.mchStraps.padding[3181] = 0xff; +- descriptorStruct.mchStraps.padding[3182] = 0xff; +- descriptorStruct.mchStraps.padding[3183] = 0xff; +- descriptorStruct.mchStraps.padding[3184] = 0xff; +- descriptorStruct.mchStraps.padding[3185] = 0xff; +- descriptorStruct.mchStraps.padding[3186] = 0xff; +- descriptorStruct.mchStraps.padding[3187] = 0xff; +- descriptorStruct.mchStraps.padding[3188] = 0xff; +- descriptorStruct.mchStraps.padding[3189] = 0xff; +- descriptorStruct.mchStraps.padding[3190] = 0xff; +- descriptorStruct.mchStraps.padding[3191] = 0xff; +- descriptorStruct.mchStraps.padding[3192] = 0xff; +- descriptorStruct.mchStraps.padding[3193] = 0xff; +- descriptorStruct.mchStraps.padding[3194] = 0xff; +- descriptorStruct.mchStraps.padding[3195] = 0xff; +- descriptorStruct.mchStraps.padding[3196] = 0xff; +- descriptorStruct.mchStraps.padding[3197] = 0xff; +- descriptorStruct.mchStraps.padding[3198] = 0xff; +- descriptorStruct.mchStraps.padding[3199] = 0xff; +- descriptorStruct.mchStraps.padding[3200] = 0xff; +- descriptorStruct.mchStraps.padding[3201] = 0xff; +- descriptorStruct.mchStraps.padding[3202] = 0xff; +- descriptorStruct.mchStraps.padding[3203] = 0xff; +- descriptorStruct.mchStraps.padding[3204] = 0xff; +- descriptorStruct.mchStraps.padding[3205] = 0xff; +- descriptorStruct.mchStraps.padding[3206] = 0xff; +- descriptorStruct.mchStraps.padding[3207] = 0xff; +- descriptorStruct.mchStraps.padding[3208] = 0xff; +- descriptorStruct.mchStraps.padding[3209] = 0xff; +- descriptorStruct.mchStraps.padding[3210] = 0xff; +- descriptorStruct.mchStraps.padding[3211] = 0xff; +- descriptorStruct.mchStraps.padding[3212] = 0xff; +- descriptorStruct.mchStraps.padding[3213] = 0xff; +- descriptorStruct.mchStraps.padding[3214] = 0xff; +- descriptorStruct.mchStraps.padding[3215] = 0xff; +- descriptorStruct.mchStraps.padding[3216] = 0xff; +- descriptorStruct.mchStraps.padding[3217] = 0xff; +- descriptorStruct.mchStraps.padding[3218] = 0xff; +- descriptorStruct.mchStraps.padding[3219] = 0xff; +- descriptorStruct.mchStraps.padding[3220] = 0xff; +- descriptorStruct.mchStraps.padding[3221] = 0xff; +- descriptorStruct.mchStraps.padding[3222] = 0xff; +- descriptorStruct.mchStraps.padding[3223] = 0xff; +- descriptorStruct.mchStraps.padding[3224] = 0xff; +- descriptorStruct.mchStraps.padding[3225] = 0xff; +- descriptorStruct.mchStraps.padding[3226] = 0xff; +- descriptorStruct.mchStraps.padding[3227] = 0xff; +- descriptorStruct.mchStraps.padding[3228] = 0xff; +- descriptorStruct.mchStraps.padding[3229] = 0xff; +- descriptorStruct.mchStraps.padding[3230] = 0xff; +- descriptorStruct.mchStraps.padding[3231] = 0xff; +- descriptorStruct.mchStraps.padding[3232] = 0xff; +- descriptorStruct.mchStraps.padding[3233] = 0xff; +- descriptorStruct.mchStraps.padding[3234] = 0xff; +- descriptorStruct.mchStraps.padding[3235] = 0xff; +- descriptorStruct.mchStraps.padding[3236] = 0xff; +- descriptorStruct.mchStraps.padding[3237] = 0xff; +- descriptorStruct.mchStraps.padding[3238] = 0xff; +- descriptorStruct.mchStraps.padding[3239] = 0xff; +- descriptorStruct.mchStraps.padding[3240] = 0xff; +- descriptorStruct.mchStraps.padding[3241] = 0xff; +- descriptorStruct.mchStraps.padding[3242] = 0xff; +- descriptorStruct.mchStraps.padding[3243] = 0xff; +- descriptorStruct.mchStraps.padding[3244] = 0xff; +- descriptorStruct.mchStraps.padding[3245] = 0xff; +- descriptorStruct.mchStraps.padding[3246] = 0xff; +- descriptorStruct.mchStraps.padding[3247] = 0xff; +- descriptorStruct.mchStraps.padding[3248] = 0xff; +- descriptorStruct.mchStraps.padding[3249] = 0xff; +- descriptorStruct.mchStraps.padding[3250] = 0xff; +- descriptorStruct.mchStraps.padding[3251] = 0xff; +- descriptorStruct.mchStraps.padding[3252] = 0xff; +- descriptorStruct.mchStraps.padding[3253] = 0xff; +- descriptorStruct.mchStraps.padding[3254] = 0xff; +- descriptorStruct.mchStraps.padding[3255] = 0xff; +- descriptorStruct.mchStraps.padding[3256] = 0xff; +- descriptorStruct.mchStraps.padding[3257] = 0xff; +- descriptorStruct.mchStraps.padding[3258] = 0xff; +- descriptorStruct.mchStraps.padding[3259] = 0xff; +- descriptorStruct.mchStraps.padding[3260] = 0xff; +- descriptorStruct.mchStraps.padding[3261] = 0xff; +- descriptorStruct.mchStraps.padding[3262] = 0xff; +- descriptorStruct.mchStraps.padding[3263] = 0xff; +- descriptorStruct.mchStraps.padding[3264] = 0xff; +- descriptorStruct.mchStraps.padding[3265] = 0xff; +- descriptorStruct.mchStraps.padding[3266] = 0xff; +- descriptorStruct.mchStraps.padding[3267] = 0xff; +- descriptorStruct.mchStraps.padding[3268] = 0xff; +- descriptorStruct.mchStraps.padding[3269] = 0xff; +- descriptorStruct.mchStraps.padding[3270] = 0xff; +- descriptorStruct.mchStraps.padding[3271] = 0xff; +- descriptorStruct.mchStraps.padding[3272] = 0xff; +- descriptorStruct.mchStraps.padding[3273] = 0xff; +- descriptorStruct.mchStraps.padding[3274] = 0xff; +- descriptorStruct.mchStraps.padding[3275] = 0xff; +- descriptorStruct.mchStraps.padding[3276] = 0xbf; +- descriptorStruct.mchStraps.padding[3277] = 0x25; +- descriptorStruct.mchStraps.padding[3278] = 0x4a; +- descriptorStruct.mchStraps.padding[3279] = 0x00; +- descriptorStruct.mchStraps.padding[3280] = 0x09; +- descriptorStruct.mchStraps.padding[3281] = 0x20; +- descriptorStruct.mchStraps.padding[3282] = 0x09; +- descriptorStruct.mchStraps.padding[3283] = 0x20; +- descriptorStruct.mchStraps.padding[3284] = 0x1f; +- descriptorStruct.mchStraps.padding[3285] = 0x47; +- descriptorStruct.mchStraps.padding[3286] = 0x00; +- descriptorStruct.mchStraps.padding[3287] = 0x00; +- descriptorStruct.mchStraps.padding[3288] = 0x15; +- descriptorStruct.mchStraps.padding[3289] = 0x20; +- descriptorStruct.mchStraps.padding[3290] = 0x15; +- descriptorStruct.mchStraps.padding[3291] = 0x20; ++ for (i = 0; i < 3292; i++) { ++ descriptorStruct.mchStraps.padding[i] = 0xFF; ++ } + + /* ME VSCC Table */ +- descriptorStruct.meVsccTable.jid0 = 0x001630ef; ++ descriptorStruct.meVsccTable.jid0 = 0x001720c2; + descriptorStruct.meVsccTable.vscc0 = 0x20052005; +- descriptorStruct.meVsccTable.jid1 = 0x00167020; ++ descriptorStruct.meVsccTable.jid1 = 0x001730ef; + descriptorStruct.meVsccTable.vscc1 = 0x20052005; +- descriptorStruct.meVsccTable.jid2 = 0x001620c2; +- descriptorStruct.meVsccTable.vscc2 = 0x20052005; ++ descriptorStruct.meVsccTable.jid2 = 0x0000481f; ++ descriptorStruct.meVsccTable.vscc2 = 0x20152015; + /* Padding */ + for (i = 0; i < 4; i++) { + descriptorStruct.meVsccTable.padding[i] = 0xFF; + } + + /* Descriptor Map 2 Record */ +- descriptorStruct.descriptor2Map.meVsccTableBaseAddress = 0xed; +- descriptorStruct.descriptor2Map.meVsccTableLength = 0x0a; ++ descriptorStruct.descriptor2Map.meVsccTableBaseAddress = 0xee; ++ descriptorStruct.descriptor2Map.meVsccTableLength = 0x06; + descriptorStruct.descriptor2Map.reserved = 0x0000; + + /* OEM section */ diff --git a/docs/future/dumps/t500_x200_descriptor/gbe_diff_t500_x200.txt b/docs/future/dumps/t500_x200_descriptor/gbe_diff_t500_x200.txt new file mode 100644 index 00000000..40b20057 --- /dev/null +++ b/docs/future/dumps/t500_x200_descriptor/gbe_diff_t500_x200.txt @@ -0,0 +1,68 @@ +--- mkgbe.c 2015-03-31 04:46:11.840747724 +0100 ++++ ../lbdev/libreboot/resources/utilities/ich9deblob/src/ich9gen/mkgbe.c 2015-03-26 16:55:12.243313103 +0000 +@@ -1,5 +1,19 @@ +-/* mkgbe.c: generated C code from ich9deblob */ +-/* .c source file for the gbe-generating C code */ ++/* ++ * Copyright (C) 2014 Leah Rowe <info@minifree.org> ++ * ++ * This program is free software: you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation, either version 3 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see <http://www.gnu.org/licenses/>. ++ */ + + #include "mkgbe.h" + +@@ -14,11 +28,11 @@ + /* MAC address (words 00h to 02h) */ + /* see ../gbe/gbe.c */ + gbeStruct4k.macAddress[0] = 0x00; +- gbeStruct4k.macAddress[1] = 0x22; +- gbeStruct4k.macAddress[2] = 0x68; +- gbeStruct4k.macAddress[3] = 0x1d; +- gbeStruct4k.macAddress[4] = 0x5f; +- gbeStruct4k.macAddress[5] = 0xc1; ++ gbeStruct4k.macAddress[1] = 0xf5; ++ gbeStruct4k.macAddress[2] = 0xf0; ++ gbeStruct4k.macAddress[3] = 0x40; ++ gbeStruct4k.macAddress[4] = 0x71; ++ gbeStruct4k.macAddress[5] = 0xfe; + + /* Word 03h (Reserved) */ + gbeStruct4k.reservedWord03h.reserved1_0 = 0x00; +@@ -83,7 +97,7 @@ + gbeStruct4k.sharedInitializationControlWord.phyPowerDownEnable = 0x1; + gbeStruct4k.sharedInitializationControlWord.reserved3 = 0x1; + gbeStruct4k.sharedInitializationControlWord.reserved4 = 0x0; +- gbeStruct4k.sharedInitializationControlWord.sign = 0x0; ++ gbeStruct4k.sharedInitializationControlWord.sign = 0x2; + + /* Word 14h (Extended Configuration Control Word 1) */ + gbeStruct4k.extendedConfigurationControlWord1.extendedConfigurationPointer = 0x020; +@@ -198,7 +212,7 @@ + gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.reserved2 = 0x0; + gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.signature = 0x1; + /* Boot Agent Configuration Customization Options (Word 32h) */ +- gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.buildNumber = 0x24; ++ gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.buildNumber = 0x18; + gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.minorVersionNumber = 0x3; + gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.majorVersionNumber = 0x1; + /* IBA Capabilities (Word 33h) */ +@@ -223,7 +237,7 @@ + gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[10] = 0xffff; + + /* Word 3Fh (Checksum) */ +- gbeStruct4k.checkSum = 0xe818; ++ gbeStruct4k.checkSum = 0x348a; + + /* The rest of Gbe (word 40h or byte 80h onwards) is just padding (0xFF) */ + for (i = 0; i < 3968; i++) { diff --git a/docs/future/dumps/t500log/biosdecode.log b/docs/future/dumps/t500log/biosdecode.log new file mode 100644 index 00000000..2e979247 --- /dev/null +++ b/docs/future/dumps/t500log/biosdecode.log @@ -0,0 +1,24 @@ +# biosdecode 2.12 +VPD present. + BIOS Build ID: 7VET83WW + Box Serial Number: R889Z75 + Motherboard Serial Number: VQ11102N32T + Machine Type/Model: 224397G +SMBIOS 2.4 present. + Structure Table Length: 2833 bytes + Structure Table Address: 0x000E0010 + Number Of Structures: 80 + Maximum Structure Size: 120 bytes +BIOS32 Service Directory present. + Revision: 0 + Calling Interface Address: 0x000FDC50 +ACPI 2.0 present. + OEM Identifier: LENOVO + RSD Table 32-bit Address: 0xBDB49BBA + XSD Table 64-bit Address: 0x00000000BDB49C22 +PNP BIOS 1.0 present. + Event Notification: Not Supported + Real Mode 16-bit Code Address: E13F:1A19 + Real Mode 16-bit Data Address: 0040:0000 + 16-bit Protected Mode Code Address: 0x000F8A9D + 16-bit Protected Mode Data Address: 0x00000400 diff --git a/docs/future/dumps/t500log/codec#0 b/docs/future/dumps/t500log/codec#0 new file mode 100644 index 00000000..b9d0ab3d --- /dev/null +++ b/docs/future/dumps/t500log/codec#0 @@ -0,0 +1,208 @@ +Codec: Conexant CX20561 (Hermosa) +Address: 0 +AFG Function Id: 0x1 (unsol 1) +MFG Function Id: 0x2 (unsol 1) +Vendor Id: 0x14f15051 +Subsystem Id: 0x17aa2100 +Revision Id: 0x100000 +Modem Function Group: 0x2 +Default PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM +Default Amp-In caps: N/A +Default Amp-Out caps: N/A +State of AFG node 0x01: + Power states: D0 D1 D2 D3 CLKSTOP + Power: setting=D0, actual=D0 +GPIO: io=4, o=0, i=0, unsolicited=1, wake=0 + IO[0]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[1]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[2]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[3]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 +Node 0x10 [Audio Output] wcaps 0xc1d: Stereo Amp-Out R/L + Control: name="Speaker Playback Volume", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Control: name="Speaker Playback Switch", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Device: name="CX20561 Analog", type="Audio", device=0 + Amp-Out caps: ofs=0x4a, nsteps=0x4a, stepsize=0x03, mute=0 + Amp-Out vals: [0x29 0x29] + Converter: stream=8, channel=0 + PCM: + rates [0x560]: 44100 48000 96000 192000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x11 [Audio Output] wcaps 0xc1d: Stereo Amp-Out R/L + Control: name="Headphone Playback Volume", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Control: name="Headphone Playback Switch", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Amp-Out caps: ofs=0x4a, nsteps=0x4a, stepsize=0x03, mute=0 + Amp-Out vals: [0x29 0x29] + Converter: stream=8, channel=0 + PCM: + rates [0x560]: 44100 48000 96000 192000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x12 [Audio Output] wcaps 0x211: Stereo Digital + Control: name="IEC958 Playback Con Mask", index=0, device=0 + Control: name="IEC958 Playback Pro Mask", index=0, device=0 + Control: name="IEC958 Playback Default", index=0, device=0 + Control: name="IEC958 Playback Switch", index=0, device=0 + Control: name="IEC958 Default PCM Playback Switch", index=0, device=0 + Device: name="CX20561 Digital", type="SPDIF", device=1 + Converter: stream=8, channel=0 + Digital: + Digital category: 0x0 + IEC Coding Type: 0x0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x5]: PCM AC3 +Node 0x13 [Beep Generator Widget] wcaps 0x70000c: Mono Amp-Out + Control: name="Beep Playback Volume", index=0, device=0 + ControlAmp: chs=1, dir=Out, idx=0, ofs=0 + Control: name="Beep Playback Switch", index=0, device=0 + ControlAmp: chs=1, dir=Out, idx=0, ofs=0 + Amp-Out caps: ofs=0x03, nsteps=0x03, stepsize=0x17, mute=0 + Amp-Out vals: [0x00] +Node 0x14 [Audio Input] wcaps 0x100d1b: Stereo Amp-In R/L + Device: name="CX20561 Analog", type="Audio", device=0 + Amp-In caps: ofs=0x4a, nsteps=0x50, stepsize=0x03, mute=0 + Amp-In vals: [0x50 0x50] [0x50 0x50] + Converter: stream=4, channel=0 + SDI-Select: 0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x1d* 0x17 +Node 0x15 [Audio Input] wcaps 0x100d1b: Stereo Amp-In R/L + Control: name="Capture Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=1, ofs=0 + Amp-In caps: ofs=0x4a, nsteps=0x50, stepsize=0x03, mute=0 + Amp-In vals: [0x50 0x50] + Converter: stream=0, channel=0 + SDI-Select: 0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 1 + 0x18 +Node 0x16 [Pin Complex] wcaps 0x400581: Stereo + Control: name="Headphone Jack", index=0, device=0 + Pincap 0x0000001c: OUT HP Detect + Pin Default 0x022140f0: [Jack] HP Out at Ext Front + Conn = 1/8, Color = Green + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0xc0: OUT HP + Unsolicited: tag=02, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10 0x11* +Node 0x17 [Pin Complex] wcaps 0x40048b: Stereo Amp-In + Control: name="Dock Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Dock Mic Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x27, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00001224: IN Detect + Vref caps: 50 80 + Pin Default 0x61a190f0: [N/A] Mic at Sep Rear + Conn = 1/8, Color = Pink + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x24: IN VREF_80 + Unsolicited: tag=03, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x18 [Pin Complex] wcaps 0x40048b: Stereo Amp-In + Control: name="Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Mic Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x27, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00001224: IN Detect + Vref caps: 50 80 + Pin Default 0x02a190f0: [Jack] Mic at Ext Front + Conn = 1/8, Color = Pink + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x24: IN VREF_80 + Unsolicited: tag=04, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x19 [Pin Complex] wcaps 0x400581: Stereo + Control: name="Dock Headphone Jack", index=0, device=0 + Pincap 0x00000014: OUT Detect + Pin Default 0x40f000f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x40: OUT + Unsolicited: tag=01, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10 0x11* +Node 0x1a [Pin Complex] wcaps 0x400501: Stereo + Control: name="Speaker Phantom Jack", index=0, device=0 + Pincap 0x00010010: OUT EAPD + EAPD 0x2: EAPD + Pin Default 0x901701f0: [Fixed] Speaker at Int N/A + Conn = Analog, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10* 0x11 +Node 0x1b [Pin Complex] wcaps 0x400500: Mono + Pincap 0x00010010: OUT EAPD + EAPD 0x2: EAPD + Pin Default 0x40f001f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10* 0x11 +Node 0x1c [Pin Complex] wcaps 0x400701: Stereo Digital + Control: name="SPDIF Phantom Jack", index=0, device=0 + Pincap 0x00000010: OUT + Pin Default 0x40f001f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 1 + 0x12 +Node 0x1d [Pin Complex] wcaps 0x40040b: Stereo Amp-In + Control: name="Internal Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Internal Mic Phantom Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x2f, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00000020: IN + Pin Default 0x90a601f0: [Fixed] Mic at Int N/A + Conn = Digital, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x20: IN + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x1e [Vendor Defined Widget] wcaps 0xf00000: Mono diff --git a/docs/future/dumps/t500log/cpuinfo.log b/docs/future/dumps/t500log/cpuinfo.log new file mode 100644 index 00000000..9d142692 --- /dev/null +++ b/docs/future/dumps/t500log/cpuinfo.log @@ -0,0 +1,58 @@ +processor : 0 +vendor_id : GenuineIntel +cpu family : 6 +model : 23 +model name : Intel(R) Core(TM)2 Duo CPU P8700 @ 2.53GHz +stepping : 10 +microcode : 0xa07 +cpu MHz : 800.000 +cache size : 3072 KB +physical id : 0 +siblings : 2 +core id : 0 +cpu cores : 2 +apicid : 0 +initial apicid : 0 +fdiv_bug : no +f00f_bug : no +coma_bug : no +fpu : yes +fpu_exception : yes +cpuid level : 13 +wp : yes +flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc arch_perfmon pebs bts aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xsave lahf_lm ida dtherm tpr_shadow vnmi flexpriority +bogomips : 5053.79 +clflush size : 64 +cache_alignment : 64 +address sizes : 36 bits physical, 48 bits virtual +power management: + +processor : 1 +vendor_id : GenuineIntel +cpu family : 6 +model : 23 +model name : Intel(R) Core(TM)2 Duo CPU P8700 @ 2.53GHz +stepping : 10 +microcode : 0xa07 +cpu MHz : 1600.000 +cache size : 3072 KB +physical id : 0 +siblings : 2 +core id : 1 +cpu cores : 2 +apicid : 1 +initial apicid : 1 +fdiv_bug : no +f00f_bug : no +coma_bug : no +fpu : yes +fpu_exception : yes +cpuid level : 13 +wp : yes +flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc arch_perfmon pebs bts aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xsave lahf_lm ida dtherm tpr_shadow vnmi flexpriority +bogomips : 5053.79 +clflush size : 64 +cache_alignment : 64 +address sizes : 36 bits physical, 48 bits virtual +power management: + diff --git a/docs/future/dumps/t500log/dmesg.log b/docs/future/dumps/t500log/dmesg.log new file mode 100644 index 00000000..353fe26b --- /dev/null +++ b/docs/future/dumps/t500log/dmesg.log @@ -0,0 +1,1062 @@ +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 3.13.0-39-lowlatency (root@devel.trisquel.info) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #66+7.0trisquel2 SMP PREEMPT Wed Oct 29 14:55:34 UTC 2014 (Ubuntu 3.13.0-39.66+7.0trisquel2-lowlatency 3.13.11.8-gnu) +[ 0.000000] KERNEL supported cpus: +[ 0.000000] Intel GenuineIntel +[ 0.000000] AMD AuthenticAMD +[ 0.000000] NSC Geode by NSC +[ 0.000000] Cyrix CyrixInstead +[ 0.000000] Centaur CentaurHauls +[ 0.000000] Transmeta GenuineTMx86 +[ 0.000000] Transmeta TransmetaCPU +[ 0.000000] UMC UMC UMC UMC +[ 0.000000] Disabled fast string operations +[ 0.000000] e820: BIOS-provided physical RAM map: +[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009ebff] usable +[ 0.000000] BIOS-e820: [mem 0x000000000009ec00-0x000000000009ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000000dc000-0x00000000000fffff] reserved +[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000bd6a0fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000bd6a1000-0x00000000bd6a6fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bd6a7000-0x00000000bd7b7fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000bd7b8000-0x00000000bd80efff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bd80f000-0x00000000bd8c6fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000bd8c7000-0x00000000bd8d1fff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000bd8d2000-0x00000000bd8d4fff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x00000000bd8d5000-0x00000000bd8d8fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bd8d9000-0x00000000bd8dcfff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000bd8dd000-0x00000000bd8dffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bd8e0000-0x00000000bd906fff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000bd907000-0x00000000bd907fff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x00000000bd908000-0x00000000bdb0efff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000bdb0f000-0x00000000bdb9efff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000bdb9f000-0x00000000bdbfefff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x00000000bdbff000-0x00000000bdbfffff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000bdc00000-0x00000000bfffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec0ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed003ff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed10000-0x00000000fed13fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed18000-0x00000000fed19fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed8ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000ff800000-0x00000000ffffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000013bffffff] usable +[ 0.000000] NX (Execute Disable) protection: active +[ 0.000000] SMBIOS 2.4 present. +[ 0.000000] DMI: LENOVO 224397G/224397G, BIOS 7VET83WW (3.13 ) 03/12/2010 +[ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved +[ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable +[ 0.000000] e820: last_pfn = 0x13c000 max_arch_pfn = 0x1000000 +[ 0.000000] MTRR default type: uncachable +[ 0.000000] MTRR fixed ranges enabled: +[ 0.000000] 00000-9FFFF write-back +[ 0.000000] A0000-BFFFF uncachable +[ 0.000000] C0000-D3FFF write-protect +[ 0.000000] D4000-DBFFF uncachable +[ 0.000000] DC000-FFFFF write-protect +[ 0.000000] MTRR variable ranges enabled: +[ 0.000000] 0 base 13C000000 mask FFC000000 uncachable +[ 0.000000] 1 base 0BE000000 mask FFE000000 uncachable +[ 0.000000] 2 base 000000000 mask F80000000 write-back +[ 0.000000] 3 base 080000000 mask FC0000000 write-back +[ 0.000000] 4 base 100000000 mask FC0000000 write-back +[ 0.000000] 5 base 0BDE00000 mask FFFE00000 uncachable +[ 0.000000] 6 disabled +[ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 +[ 0.000000] original variable MTRRs +[ 0.000000] reg 0, base: 5056MB, range: 64MB, type UC +[ 0.000000] reg 1, base: 3040MB, range: 32MB, type UC +[ 0.000000] reg 2, base: 0GB, range: 2GB, type WB +[ 0.000000] reg 3, base: 2GB, range: 1GB, type WB +[ 0.000000] reg 4, base: 4GB, range: 1GB, type WB +[ 0.000000] reg 5, base: 3038MB, range: 2MB, type UC +[ 0.000000] total RAM covered: 3998M +[ 0.000000] Found optimal setting for mtrr clean up +[ 0.000000] gran_size: 64K chunk_size: 128M num_reg: 6 lose cover RAM: 0G +[ 0.000000] New variable MTRRs +[ 0.000000] reg 0, base: 0GB, range: 2GB, type WB +[ 0.000000] reg 1, base: 2GB, range: 1GB, type WB +[ 0.000000] reg 2, base: 3038MB, range: 2MB, type UC +[ 0.000000] reg 3, base: 3040MB, range: 32MB, type UC +[ 0.000000] reg 4, base: 4GB, range: 1GB, type WB +[ 0.000000] reg 5, base: 5056MB, range: 64MB, type UC +[ 0.000000] e820: update [mem 0xbde00000-0xffffffff] usable ==> reserved +[ 0.000000] found SMP MP-table at [mem 0x000f6480-0x000f648f] mapped at [c00f6480] +[ 0.000000] Scanning 1 areas for low memory corruption +[ 0.000000] initial memory mapped: [mem 0x00000000-0x01ffffff] +[ 0.000000] Base memory trampoline at [c009a000] 9a000 size 16384 +[ 0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff] +[ 0.000000] [mem 0x00000000-0x000fffff] page 4k +[ 0.000000] init_memory_mapping: [mem 0x37800000-0x379fffff] +[ 0.000000] [mem 0x37800000-0x379fffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x34000000-0x377fffff] +[ 0.000000] [mem 0x34000000-0x377fffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x00100000-0x33ffffff] +[ 0.000000] [mem 0x00100000-0x001fffff] page 4k +[ 0.000000] [mem 0x00200000-0x33ffffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x37a00000-0x37bfdfff] +[ 0.000000] [mem 0x37a00000-0x37bfdfff] page 4k +[ 0.000000] BRK [0x01b9a000, 0x01b9afff] PGTABLE +[ 0.000000] RAMDISK: [mem 0x3553e000-0x36a96fff] +[ 0.000000] ACPI: RSDP 000f6440 000024 (v02 LENOVO) +[ 0.000000] ACPI: XSDT bdb49c22 00008C (v01 LENOVO TP-7V 00003130 LTP 00000000) +[ 0.000000] ACPI: FACP bdb49d00 0000F4 (v03 LENOVO TP-7V 00003130 LNVO 00000001) +[ 0.000000] ACPI: DSDT bdb4a10e 00FAC1 (v01 LENOVO TP-7V 00003130 MSFT 03000000) +[ 0.000000] ACPI: FACS bdb8e000 000040 +[ 0.000000] ACPI: SSDT bdb49eb4 00025A (v01 LENOVO TP-7V 00003130 MSFT 03000000) +[ 0.000000] ACPI: ECDT bdb59bcf 000052 (v01 LENOVO TP-7V 00003130 LNVO 00000001) +[ 0.000000] ACPI: APIC bdb59c21 000078 (v01 LENOVO TP-7V 00003130 LNVO 00000001) +[ 0.000000] ACPI: MCFG bdb59c99 00003C (v01 LENOVO TP-7V 00003130 LNVO 00000001) +[ 0.000000] ACPI: HPET bdb59cd5 000038 (v01 LENOVO TP-7V 00003130 LNVO 00000001) +[ 0.000000] ACPI: SLIC bdb59e62 000176 (v01 LENOVO TP-7V 00003130 LTP 00000000) +[ 0.000000] ACPI: BOOT bdb59fd8 000028 (v01 LENOVO TP-7V 00003130 LTP 00000001) +[ 0.000000] ACPI: SSDT bdb8d1fa 000568 (v01 LENOVO TP-7V 00003130 INTL 20050513) +[ 0.000000] ACPI: TCPA bd907000 000032 (v00 00000000 00000000) +[ 0.000000] ACPI: SSDT bd8d4000 000655 (v01 PmRef CpuPm 00003000 INTL 20050624) +[ 0.000000] ACPI: SSDT bd8d3000 000274 (v01 PmRef Cpu0Tst 00003000 INTL 20050624) +[ 0.000000] ACPI: SSDT bd8d2000 000242 (v01 PmRef ApTst 00003000 INTL 20050624) +[ 0.000000] ACPI: DMI detected: Lenovo ThinkPad T500 +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] 4164MB HIGHMEM available. +[ 0.000000] 891MB LOWMEM available. +[ 0.000000] mapped low ram: 0 - 37bfe000 +[ 0.000000] low ram: 0 - 37bfe000 +[ 0.000000] BRK [0x01b9b000, 0x01b9bfff] PGTABLE +[ 0.000000] Zone ranges: +[ 0.000000] DMA [mem 0x00001000-0x00ffffff] +[ 0.000000] Normal [mem 0x01000000-0x37bfdfff] +[ 0.000000] HighMem [mem 0x37bfe000-0x3bffffff] +[ 0.000000] Movable zone start for each node +[ 0.000000] Early memory node ranges +[ 0.000000] node 0: [mem 0x00001000-0x0009dfff] +[ 0.000000] node 0: [mem 0x00100000-0xbd6a0fff] +[ 0.000000] node 0: [mem 0xbd6a7000-0xbd7b7fff] +[ 0.000000] node 0: [mem 0xbd80f000-0xbd8c6fff] +[ 0.000000] node 0: [mem 0xbdbff000-0xbdbfffff] +[ 0.000000] node 0: [mem 0x00000000-0x3bffffff] +[ 0.000000] On node 0 totalpages: 1021960 +[ 0.000000] free_area_init_node: node 0, pgdat c19a7bc0, node_mem_map f2dbe020 +[ 0.000000] DMA zone: 32 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 3997 pages, LIFO batch:0 +[ 0.000000] Normal zone: 1752 pages used for memmap +[ 0.000000] Normal zone: 224254 pages, LIFO batch:31 +[ 0.000000] HighMem zone: 8329 pages used for memmap +[ 0.000000] HighMem zone: 793709 pages, LIFO batch:31 +[ 0.000000] Using APIC driver default +[ 0.000000] ACPI: PM-Timer IO Port: 0x1008 +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] disabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x03] disabled) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) +[ 0.000000] ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0]) +[ 0.000000] IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-23 +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) +[ 0.000000] ACPI: IRQ0 used by override. +[ 0.000000] ACPI: IRQ2 used by override. +[ 0.000000] ACPI: IRQ9 used by override. +[ 0.000000] Using ACPI (MADT) for SMP configuration information +[ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000 +[ 0.000000] smpboot: Allowing 4 CPUs, 2 hotplug CPUs +[ 0.000000] nr_irqs_gsi: 40 +[ 0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x0009f000-0x0009ffff] +[ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000dbfff] +[ 0.000000] PM: Registered nosave memory: [mem 0x000dc000-0x000fffff] +[ 0.000000] e820: [mem 0xc0000000-0xdfffffff] available for PCI devices +[ 0.000000] Booting paravirtualized kernel on bare hardware +[ 0.000000] setup_percpu: NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:4 nr_node_ids:1 +[ 0.000000] PERCPU: Embedded 14 pages/cpu @f7bb3000 s36288 r0 d21056 u57344 +[ 0.000000] pcpu-alloc: s36288 r0 d21056 u57344 alloc=14*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 1020176 +[ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-3.13.0-39-lowlatency root=UUID=900a05b1-d125-4de4-93a6-2cdaa0e68d09 ro nomdmonddf nomdmonisw nomdmonddf nomdmonisw +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Initializing CPU#0 +[ 0.000000] xsave: enabled xstate_bv 0x3, cntxt size 0x240 +[ 0.000000] allocated 10354680 bytes of page_cgroup +[ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups +[ 0.000000] Initializing HighMem for node 0 (00037bfe:0013c000) +[ 0.000000] Memory: 4002360K/4087840K available (6578K kernel code, 638K rwdata, 2772K rodata, 868K init, 924K bss, 85480K reserved, 3174836K highmem) +[ 0.000000] virtual kernel memory layout: +[ 0.000000] fixmap : 0xfff14000 - 0xfffff000 ( 940 kB) +[ 0.000000] pkmap : 0xffc00000 - 0xffe00000 (2048 kB) +[ 0.000000] vmalloc : 0xf83fe000 - 0xffbfe000 ( 120 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf7bfe000 ( 891 MB) +[ 0.000000] .init : 0xc19c3000 - 0xc1a9c000 ( 868 kB) +[ 0.000000] .data : 0xc166cd34 - 0xc19c2ac0 (3415 kB) +[ 0.000000] .text : 0xc1000000 - 0xc166cd34 (6579 kB) +[ 0.000000] Checking if this processor honours the WP bit even in supervisor mode...Ok. +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] RCU dyntick-idle grace-period acceleration is enabled. +[ 0.000000] Dump stacks of tasks blocking RCU-preempt GP. +[ 0.000000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4. +[ 0.000000] NR_IRQS:2304 nr_irqs:712 16 +[ 0.000000] CPU 0 irqstacks, hard=f6c08000 soft=f6c0a000 +[ 0.000000] Console: colour VGA+ 80x25 +[ 0.000000] console [tty0] enabled +[ 0.000000] hpet clockevent registered +[ 0.000000] tsc: Fast TSC calibration using PIT +[ 0.000000] tsc: Detected 2526.897 MHz processor +[ 0.002002] Calibrating delay loop (skipped), value calculated using timer frequency.. 5053.79 BogoMIPS (lpj=2526897) +[ 0.002096] pid_max: default: 32768 minimum: 301 +[ 0.002171] Security Framework initialized +[ 0.002233] AppArmor: AppArmor initialized +[ 0.002278] Yama: becoming mindful. +[ 0.002367] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.002417] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.002697] Initializing cgroup subsys memory +[ 0.002748] Initializing cgroup subsys devices +[ 0.002795] Initializing cgroup subsys freezer +[ 0.002841] Initializing cgroup subsys blkio +[ 0.002887] Initializing cgroup subsys bfqio +[ 0.002933] Initializing cgroup subsys perf_event +[ 0.003005] Initializing cgroup subsys hugetlb +[ 0.003074] Disabled fast string operations +[ 0.003123] CPU: Physical Processor ID: 0 +[ 0.003168] CPU: Processor Core ID: 0 +[ 0.003214] mce: CPU supports 6 MCE banks +[ 0.003266] CPU0: Thermal monitoring enabled (TM2) +[ 0.003322] Last level iTLB entries: 4KB 128, 2MB 4, 4MB 4 +[ 0.003322] Last level dTLB entries: 4KB 256, 2MB 0, 4MB 32 +[ 0.003322] tlb_flushall_shift: -1 +[ 0.003703] Freeing SMP alternatives memory: 24K (c1a9c000 - c1aa2000) +[ 0.004536] ACPI: Core revision 20131115 +[ 0.013161] ACPI: All ACPI Tables successfully acquired +[ 0.014010] ftrace: allocating 27933 entries in 55 pages +[ 0.021082] Enabling APIC mode: Flat. Using 1 I/O APICs +[ 0.022308] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 +[ 0.032367] smpboot: CPU0: Intel(R) Core(TM)2 Duo CPU P8700 @ 2.53GHz (fam: 06, model: 17, stepping: 0a) +[ 0.033000] Performance Events: PEBS fmt0+, 4-deep LBR, Core2 events, Intel PMU driver. +[ 0.033000] ... version: 2 +[ 0.033000] ... bit width: 40 +[ 0.033000] ... generic registers: 2 +[ 0.033000] ... value mask: 000000ffffffffff +[ 0.033000] ... max period: 000000007fffffff +[ 0.033001] ... fixed-purpose events: 3 +[ 0.033046] ... event mask: 0000000700000003 +[ 0.042062] CPU 1 irqstacks, hard=f6d28000 soft=f6d2a000 +[ 0.042064] x86: Booting SMP configuration: +[ 0.003000] Initializing CPU#1 +[ 0.003000] Disabled fast string operations +[ 0.054122] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter. +[ 0.042111] .... node #0, CPUs: #1 +[ 0.054315] x86: Booted up 1 node, 2 CPUs +[ 0.054401] smpboot: Total of 2 processors activated (10107.58 BogoMIPS) +[ 0.055109] devtmpfs: initialized +[ 0.055315] EVM: security.selinux +[ 0.055361] EVM: security.SMACK64 +[ 0.055406] EVM: security.ima +[ 0.055450] EVM: security.capability +[ 0.056086] PM: Registering ACPI NVS region [mem 0xbd8c7000-0xbd8d1fff] (45056 bytes) +[ 0.056086] PM: Registering ACPI NVS region [mem 0xbd8d9000-0xbd8dcfff] (16384 bytes) +[ 0.056086] PM: Registering ACPI NVS region [mem 0xbd8e0000-0xbd906fff] (159744 bytes) +[ 0.056129] PM: Registering ACPI NVS region [mem 0xbdb0f000-0xbdb9efff] (589824 bytes) +[ 0.057217] pinctrl core: initialized pinctrl subsystem +[ 0.057342] regulator-dummy: no parameters +[ 0.057422] RTC time: 12:05:17, date: 05/03/15 +[ 0.057510] NET: Registered protocol family 16 +[ 0.057754] EISA bus registered +[ 0.057799] cpuidle: using governor ladder +[ 0.057845] cpuidle: using governor menu +[ 0.057984] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it +[ 0.058006] ACPI: bus type PCI registered +[ 0.058053] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 +[ 0.058173] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xe0000000-0xe3ffffff] (base 0xe0000000) +[ 0.058237] PCI: MMCONFIG at [mem 0xe0000000-0xe3ffffff] reserved in E820 +[ 0.058287] PCI: Using MMCONFIG for extended config space +[ 0.058334] PCI: Using configuration type 1 for base access +[ 0.060062] bio: create slab <bio-0> at 0 +[ 0.060087] ACPI: Added _OSI(Module Device) +[ 0.060134] ACPI: Added _OSI(Processor Device) +[ 0.060181] ACPI: Added _OSI(3.0 _SCP Extensions) +[ 0.060227] ACPI: Added _OSI(Processor Aggregator Device) +[ 0.060276] ACPI: Added _OSI(Linux) +[ 0.062197] ACPI : EC: EC description table is found, configuring boot EC +[ 0.069031] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query honored via DMI +[ 0.078455] ACPI: SSDT bd8d7c20 0002C8 (v01 PmRef Cpu0Ist 00003000 INTL 20050624) +[ 0.079266] ACPI: Dynamic OEM Table Load: +[ 0.079373] ACPI: SSDT (null) 0002C8 (v01 PmRef Cpu0Ist 00003000 INTL 20050624) +[ 0.079625] ACPI: SSDT bd8d5020 00087A (v01 PmRef Cpu0Cst 00003001 INTL 20050624) +[ 0.080244] ACPI: Dynamic OEM Table Load: +[ 0.080351] ACPI: SSDT (null) 00087A (v01 PmRef Cpu0Cst 00003001 INTL 20050624) +[ 0.087240] ACPI: SSDT bd8d6ca0 0001CF (v01 PmRef ApIst 00003000 INTL 20050624) +[ 0.088177] ACPI: Dynamic OEM Table Load: +[ 0.088284] ACPI: SSDT (null) 0001CF (v01 PmRef ApIst 00003000 INTL 20050624) +[ 0.092077] ACPI: SSDT bd8d6f20 00008D (v01 PmRef ApCst 00003000 INTL 20050624) +[ 0.092339] ACPI: Dynamic OEM Table Load: +[ 0.092446] ACPI: SSDT (null) 00008D (v01 PmRef ApCst 00003000 INTL 20050624) +[ 0.097163] ACPI: Interpreter enabled +[ 0.097216] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20131115/hwxface-580) +[ 0.097341] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20131115/hwxface-580) +[ 0.097476] ACPI: (supports S0 S3 S4 S5) +[ 0.097522] ACPI: Using IOAPIC for interrupt routing +[ 0.097593] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug +[ 0.098665] ACPI: ACPI Dock Station Driver: 3 docks/bays found +[ 0.107215] ACPI: Power Resource [PUBS] (on) +[ 0.114068] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.114526] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.114981] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.115423] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.115877] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.116331] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.116785] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.117270] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.117675] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff]) +[ 0.117728] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] +[ 0.118326] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability] +[ 0.118414] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge +[ 0.118691] PCI host bridge to bus 0000:00 +[ 0.118739] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.118788] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7] +[ 0.118838] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff] +[ 0.118887] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff] +[ 0.118937] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff] +[ 0.118987] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff] +[ 0.119006] pci_bus 0000:00: root bus resource [mem 0xc0000000-0xfebfffff] +[ 0.119064] pci 0000:00:00.0: [8086:2a40] type 00 class 0x060000 +[ 0.119085] DMAR: Forcing write-buffer flush capability +[ 0.119133] DMAR: Disabling IOMMU for graphics on this chipset +[ 0.119260] pci 0000:00:02.0: [8086:2a42] type 00 class 0x030000 +[ 0.119273] pci 0000:00:02.0: reg 0x10: [mem 0xfc000000-0xfc3fffff 64bit] +[ 0.119281] pci 0000:00:02.0: reg 0x18: [mem 0xd0000000-0xdfffffff 64bit pref] +[ 0.119287] pci 0000:00:02.0: reg 0x20: [io 0x1800-0x1807] +[ 0.119380] pci 0000:00:02.1: [8086:2a43] type 00 class 0x038000 +[ 0.119391] pci 0000:00:02.1: reg 0x10: [mem 0xf4200000-0xf42fffff 64bit] +[ 0.119495] pci 0000:00:03.0: [8086:2a44] type 00 class 0x078000 +[ 0.119511] pci 0000:00:03.0: reg 0x10: [mem 0xfc625800-0xfc62580f 64bit] +[ 0.119562] pci 0000:00:03.0: PME# supported from D0 D3hot D3cold +[ 0.119692] pci 0000:00:19.0: [8086:10bf] type 00 class 0x020000 +[ 0.119717] pci 0000:00:19.0: reg 0x10: [mem 0xfc400000-0xfc41ffff] +[ 0.119729] pci 0000:00:19.0: reg 0x14: [mem 0xfc424000-0xfc424fff] +[ 0.119741] pci 0000:00:19.0: reg 0x18: [io 0x1820-0x183f] +[ 0.119831] pci 0000:00:19.0: PME# supported from D0 D3hot D3cold +[ 0.119885] pci 0000:00:19.0: System wakeup disabled by ACPI +[ 0.120018] pci 0000:00:1a.0: [8086:2937] type 00 class 0x0c0300 +[ 0.120076] pci 0000:00:1a.0: reg 0x20: [io 0x1840-0x185f] +[ 0.120187] pci 0000:00:1a.0: System wakeup disabled by ACPI +[ 0.120273] pci 0000:00:1a.1: [8086:2938] type 00 class 0x0c0300 +[ 0.120331] pci 0000:00:1a.1: reg 0x20: [io 0x1860-0x187f] +[ 0.120457] pci 0000:00:1a.2: [8086:2939] type 00 class 0x0c0300 +[ 0.120514] pci 0000:00:1a.2: reg 0x20: [io 0x1880-0x189f] +[ 0.120623] pci 0000:00:1a.2: System wakeup disabled by ACPI +[ 0.120722] pci 0000:00:1a.7: [8086:293c] type 00 class 0x0c0320 +[ 0.120748] pci 0000:00:1a.7: reg 0x10: [mem 0xfc625c00-0xfc625fff] +[ 0.120859] pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold +[ 0.120914] pci 0000:00:1a.7: System wakeup disabled by ACPI +[ 0.121012] pci 0000:00:1b.0: [8086:293e] type 00 class 0x040300 +[ 0.121034] pci 0000:00:1b.0: reg 0x10: [mem 0xfc420000-0xfc423fff 64bit] +[ 0.121133] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold +[ 0.121195] pci 0000:00:1b.0: System wakeup disabled by ACPI +[ 0.121284] pci 0000:00:1c.0: [8086:2940] type 01 class 0x060400 +[ 0.121389] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold +[ 0.121447] pci 0000:00:1c.0: System wakeup disabled by ACPI +[ 0.121537] pci 0000:00:1c.3: [8086:2946] type 01 class 0x060400 +[ 0.121642] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold +[ 0.121700] pci 0000:00:1c.3: System wakeup disabled by ACPI +[ 0.121788] pci 0000:00:1c.4: [8086:2948] type 01 class 0x060400 +[ 0.121891] pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold +[ 0.121952] pci 0000:00:1c.4: System wakeup disabled by ACPI +[ 0.122047] pci 0000:00:1d.0: [8086:2934] type 00 class 0x0c0300 +[ 0.122105] pci 0000:00:1d.0: reg 0x20: [io 0x18a0-0x18bf] +[ 0.122216] pci 0000:00:1d.0: System wakeup disabled by ACPI +[ 0.122304] pci 0000:00:1d.1: [8086:2935] type 00 class 0x0c0300 +[ 0.122361] pci 0000:00:1d.1: reg 0x20: [io 0x18c0-0x18df] +[ 0.122485] pci 0000:00:1d.2: [8086:2936] type 00 class 0x0c0300 +[ 0.122542] pci 0000:00:1d.2: reg 0x20: [io 0x18e0-0x18ff] +[ 0.122678] pci 0000:00:1d.7: [8086:293a] type 00 class 0x0c0320 +[ 0.122704] pci 0000:00:1d.7: reg 0x10: [mem 0xfc626000-0xfc6263ff] +[ 0.122816] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold +[ 0.122870] pci 0000:00:1d.7: System wakeup disabled by ACPI +[ 0.122955] pci 0000:00:1e.0: [8086:2448] type 01 class 0x060401 +[ 0.123078] pci 0000:00:1e.0: System wakeup disabled by ACPI +[ 0.123169] pci 0000:00:1f.0: [8086:2919] type 00 class 0x060100 +[ 0.123394] pci 0000:00:1f.2: [8086:2929] type 00 class 0x010601 +[ 0.123423] pci 0000:00:1f.2: reg 0x10: [io 0x1818-0x181f] +[ 0.123434] pci 0000:00:1f.2: reg 0x14: [io 0x180c-0x180f] +[ 0.123445] pci 0000:00:1f.2: reg 0x18: [io 0x1810-0x1817] +[ 0.123457] pci 0000:00:1f.2: reg 0x1c: [io 0x1808-0x180b] +[ 0.123468] pci 0000:00:1f.2: reg 0x20: [io 0x1c00-0x1c1f] +[ 0.123480] pci 0000:00:1f.2: reg 0x24: [mem 0xfc625000-0xfc6257ff] +[ 0.123551] pci 0000:00:1f.2: PME# supported from D3hot +[ 0.123636] pci 0000:00:1f.3: [8086:2930] type 00 class 0x0c0500 +[ 0.123658] pci 0000:00:1f.3: reg 0x10: [mem 0xfc626400-0xfc6264ff 64bit] +[ 0.123688] pci 0000:00:1f.3: reg 0x20: [io 0x1c20-0x1c3f] +[ 0.123852] pci 0000:00:1c.0: PCI bridge to [bus 02] +[ 0.123984] pci 0000:00:1c.3: PCI bridge to [bus 05-0c] +[ 0.124008] pci 0000:00:1c.3: bridge window [io 0x2000-0x2fff] +[ 0.124013] pci 0000:00:1c.3: bridge window [mem 0xf8000000-0xf9ffffff] +[ 0.124021] pci 0000:00:1c.3: bridge window [mem 0xf4000000-0xf40fffff 64bit pref] +[ 0.124099] pci 0000:00:1c.4: PCI bridge to [bus 0d-14] +[ 0.124151] pci 0000:00:1c.4: bridge window [io 0x3000-0x3fff] +[ 0.124155] pci 0000:00:1c.4: bridge window [mem 0xfa000000-0xfbffffff] +[ 0.124163] pci 0000:00:1c.4: bridge window [mem 0xf4100000-0xf41fffff 64bit pref] +[ 0.124236] pci 0000:15:00.0: [1180:0476] type 02 class 0x060700 +[ 0.124260] pci 0000:15:00.0: proprietary Ricoh MMC controller disabled (via cardbus function) +[ 0.124322] pci 0000:15:00.0: MMC cards are now supported by standard SDHCI controller +[ 0.124400] pci 0000:15:00.0: reg 0x10: [mem 0xf4300000-0xf4300fff] +[ 0.124444] pci 0000:15:00.0: supports D1 D2 +[ 0.124446] pci 0000:15:00.0: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.124507] pci 0000:15:00.1: [1180:0832] type 00 class 0x0c0010 +[ 0.124534] pci 0000:15:00.1: reg 0x10: [mem 0xf4301000-0xf43017ff] +[ 0.124651] pci 0000:15:00.1: supports D1 D2 +[ 0.124653] pci 0000:15:00.1: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.124712] pci 0000:15:00.2: [1180:0822] type 00 class 0x080500 +[ 0.124738] pci 0000:15:00.2: reg 0x10: [mem 0xf4301800-0xf43018ff] +[ 0.124855] pci 0000:15:00.2: supports D1 D2 +[ 0.124857] pci 0000:15:00.2: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.124916] pci 0000:15:00.4: [1180:0592] type 00 class 0x088000 +[ 0.124942] pci 0000:15:00.4: reg 0x10: [mem 0xf4302000-0xf43020ff] +[ 0.125099] pci 0000:15:00.4: supports D1 D2 +[ 0.125101] pci 0000:15:00.4: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.125161] pci 0000:15:00.5: [1180:0852] type 00 class 0x088000 +[ 0.125187] pci 0000:15:00.5: reg 0x10: [mem 0xf4302400-0xf43024ff] +[ 0.125305] pci 0000:15:00.5: supports D1 D2 +[ 0.125307] pci 0000:15:00.5: PME# supported from D0 D1 D2 D3hot D3cold +[ 0.125413] pci 0000:00:1e.0: PCI bridge to [bus 15-18] (subtractive decode) +[ 0.125466] pci 0000:00:1e.0: bridge window [io 0x4000-0x7fff] +[ 0.125471] pci 0000:00:1e.0: bridge window [mem 0xf4300000-0xf7ffffff] +[ 0.125479] pci 0000:00:1e.0: bridge window [mem 0xf0000000-0xf3ffffff 64bit pref] +[ 0.125481] pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode) +[ 0.125483] pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode) +[ 0.125486] pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode) +[ 0.125488] pci 0000:00:1e.0: bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode) +[ 0.125490] pci 0000:00:1e.0: bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode) +[ 0.125492] pci 0000:00:1e.0: bridge window [mem 0xc0000000-0xfebfffff] (subtractive decode) +[ 0.125556] pci_bus 0000:16: busn_res: can not insert [bus 16-ff] under [bus 15-18] (conflicts with (null) [bus 15-18]) +[ 0.125562] pci_bus 0000:16: busn_res: [bus 16-ff] end is updated to 17 +[ 0.125591] pci_bus 0000:00: on NUMA node 0 +[ 0.125592] acpi PNP0A08:00: Disabling ASPM (FADT indicates it is unsupported) +[ 0.127540] ACPI: Enabled 3 GPEs in block 00 to 3F +[ 0.127663] ACPI: \_SB_.PCI0: notify handler is installed +[ 0.127780] Found 1 acpi root devices +[ 0.131062] ACPI : EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62 +[ 0.131203] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none +[ 0.131203] vgaarb: loaded +[ 0.131203] vgaarb: bridge control possible 0000:00:02.0 +[ 0.131348] SCSI subsystem initialized +[ 0.131406] libata version 3.00 loaded. +[ 0.131406] ACPI: bus type USB registered +[ 0.131406] usbcore: registered new interface driver usbfs +[ 0.131406] usbcore: registered new interface driver hub +[ 0.132009] usbcore: registered new device driver usb +[ 0.132102] PCI: Using ACPI for IRQ routing +[ 0.134560] PCI: pci_cache_line_size set to 64 bytes +[ 0.134646] e820: reserve RAM buffer [mem 0x0009ec00-0x0009ffff] +[ 0.134648] e820: reserve RAM buffer [mem 0xbd6a1000-0xbfffffff] +[ 0.134652] e820: reserve RAM buffer [mem 0xbd7b8000-0xbfffffff] +[ 0.134655] e820: reserve RAM buffer [mem 0xbd8c7000-0xbfffffff] +[ 0.134658] e820: reserve RAM buffer [mem 0xbdc00000-0xbfffffff] +[ 0.134756] NetLabel: Initializing +[ 0.134802] NetLabel: domain hash size = 128 +[ 0.134848] NetLabel: protocols = UNLABELED CIPSOv4 +[ 0.134905] NetLabel: unlabeled traffic allowed by default +[ 0.135086] HPET: 4 timers in total, 0 timers will be used for per-cpu timer +[ 0.135142] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0 +[ 0.135343] hpet0: 4 comparators, 64-bit 14.318180 MHz counter +[ 0.137029] Switched to clocksource hpet +[ 0.144380] AppArmor: AppArmor Filesystem Enabled +[ 0.144459] pnp: PnP ACPI init +[ 0.144518] ACPI: bus type PNP registered +[ 0.164925] system 00:00: [mem 0x00000000-0x0009ffff] could not be reserved +[ 0.164977] system 00:00: [mem 0x000c0000-0x000c3fff] could not be reserved +[ 0.165039] system 00:00: [mem 0x000c4000-0x000c7fff] could not be reserved +[ 0.165091] system 00:00: [mem 0x000c8000-0x000cbfff] has been reserved +[ 0.165141] system 00:00: [mem 0x000cc000-0x000cffff] has been reserved +[ 0.165191] system 00:00: [mem 0x000d0000-0x000d3fff] could not be reserved +[ 0.165242] system 00:00: [mem 0x000dc000-0x000dffff] could not be reserved +[ 0.165293] system 00:00: [mem 0x000e0000-0x000e3fff] could not be reserved +[ 0.165343] system 00:00: [mem 0x000e4000-0x000e7fff] could not be reserved +[ 0.165394] system 00:00: [mem 0x000e8000-0x000ebfff] could not be reserved +[ 0.165445] system 00:00: [mem 0x000ec000-0x000effff] could not be reserved +[ 0.165495] system 00:00: [mem 0x000f0000-0x000fffff] could not be reserved +[ 0.165546] system 00:00: [mem 0x00100000-0xbfffffff] could not be reserved +[ 0.165597] system 00:00: [mem 0xfec00000-0xfed3ffff] could not be reserved +[ 0.165648] system 00:00: [mem 0xfed4c000-0xffffffff] could not be reserved +[ 0.165701] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active) +[ 0.185630] system 00:01: [io 0x1000-0x107f] could not be reserved +[ 0.185680] system 00:01: [io 0x1180-0x11ff] has been reserved +[ 0.185731] system 00:01: [io 0x0800-0x080f] has been reserved +[ 0.185780] system 00:01: [io 0x15e0-0x15ef] has been reserved +[ 0.185829] system 00:01: [io 0x1600-0x167f] has been reserved +[ 0.185879] system 00:01: [io 0x1680-0x169f] has been reserved +[ 0.185928] system 00:01: [mem 0xe0000000-0xefffffff] has been reserved +[ 0.185979] system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved +[ 0.186041] system 00:01: [mem 0xfed10000-0xfed13fff] has been reserved +[ 0.186092] system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved +[ 0.186142] system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved +[ 0.186193] system 00:01: [mem 0xfed45000-0xfed4bfff] has been reserved +[ 0.186839] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active) +[ 0.186896] pnp 00:02: Plug and Play ACPI device, IDs PNP0103 (active) +[ 0.186906] pnp 00:03: [dma 4] +[ 0.186930] pnp 00:03: Plug and Play ACPI device, IDs PNP0200 (active) +[ 0.186958] pnp 00:04: Plug and Play ACPI device, IDs PNP0800 (active) +[ 0.186998] pnp 00:05: Plug and Play ACPI device, IDs PNP0c04 (active) +[ 0.187044] pnp 00:06: Plug and Play ACPI device, IDs PNP0b00 (active) +[ 0.187077] pnp 00:07: Plug and Play ACPI device, IDs PNP0303 (active) +[ 0.187110] pnp 00:08: Plug and Play ACPI device, IDs IBM3780 PNP0f13 (active) +[ 0.207039] pnp 00:09: Plug and Play ACPI device, IDs PNP0c31 (active) +[ 0.207517] pnp: PnP ACPI: found 10 devices +[ 0.207564] ACPI: bus type PNP unregistered +[ 0.207612] PnPBIOS: Disabled by ACPI PNP +[ 0.244523] pci 0000:00:1c.0: bridge window [io 0x1000-0x0fff] to [bus 02] add_size 1000 +[ 0.244528] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 02] add_size 200000 +[ 0.244530] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 02] add_size 200000 +[ 0.244572] pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x000fffff] get_res_add_size add_size 200000 +[ 0.244574] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 +[ 0.244577] pci 0000:00:1c.0: res[13]=[io 0x1000-0x0fff] get_res_add_size add_size 1000 +[ 0.244582] pci 0000:00:1c.0: BAR 14: assigned [mem 0xc0000000-0xc01fffff] +[ 0.244635] pci 0000:00:1c.0: BAR 15: assigned [mem 0xc0200000-0xc03fffff 64bit pref] +[ 0.244697] pci 0000:00:1c.0: BAR 13: assigned [io 0x8000-0x8fff] +[ 0.244747] pci 0000:00:1c.0: PCI bridge to [bus 02] +[ 0.244797] pci 0000:00:1c.0: bridge window [io 0x8000-0x8fff] +[ 0.244851] pci 0000:00:1c.0: bridge window [mem 0xc0000000-0xc01fffff] +[ 0.244904] pci 0000:00:1c.0: bridge window [mem 0xc0200000-0xc03fffff 64bit pref] +[ 0.244970] pci 0000:00:1c.3: PCI bridge to [bus 05-0c] +[ 0.245030] pci 0000:00:1c.3: bridge window [io 0x2000-0x2fff] +[ 0.245084] pci 0000:00:1c.3: bridge window [mem 0xf8000000-0xf9ffffff] +[ 0.245136] pci 0000:00:1c.3: bridge window [mem 0xf4000000-0xf40fffff 64bit pref] +[ 0.245203] pci 0000:00:1c.4: PCI bridge to [bus 0d-14] +[ 0.245252] pci 0000:00:1c.4: bridge window [io 0x3000-0x3fff] +[ 0.245305] pci 0000:00:1c.4: bridge window [mem 0xfa000000-0xfbffffff] +[ 0.245358] pci 0000:00:1c.4: bridge window [mem 0xf4100000-0xf41fffff 64bit pref] +[ 0.245426] pci 0000:15:00.0: res[15]=[mem 0x04000000-0x03ffffff pref] get_res_add_size add_size 4000000 +[ 0.245429] pci 0000:15:00.0: res[16]=[mem 0x04000000-0x03ffffff] get_res_add_size add_size 4000000 +[ 0.245431] pci 0000:15:00.0: res[13]=[io 0x0100-0x00ff] get_res_add_size add_size 100 +[ 0.245433] pci 0000:15:00.0: res[14]=[io 0x0100-0x00ff] get_res_add_size add_size 100 +[ 0.245436] pci 0000:15:00.0: BAR 15: assigned [mem 0xf0000000-0xf3ffffff pref] +[ 0.245499] pci 0000:15:00.0: BAR 16: assigned [mem 0xc4000000-0xc7ffffff] +[ 0.245549] pci 0000:15:00.0: BAR 13: assigned [io 0x4000-0x40ff] +[ 0.245599] pci 0000:15:00.0: BAR 14: assigned [io 0x4400-0x44ff] +[ 0.245649] pci 0000:15:00.0: CardBus bridge to [bus 16-17] +[ 0.245697] pci 0000:15:00.0: bridge window [io 0x4000-0x40ff] +[ 0.245750] pci 0000:15:00.0: bridge window [io 0x4400-0x44ff] +[ 0.245803] pci 0000:15:00.0: bridge window [mem 0xf0000000-0xf3ffffff pref] +[ 0.245867] pci 0000:15:00.0: bridge window [mem 0xc4000000-0xc7ffffff] +[ 0.245921] pci 0000:00:1e.0: PCI bridge to [bus 15-18] +[ 0.245970] pci 0000:00:1e.0: bridge window [io 0x4000-0x7fff] +[ 0.246034] pci 0000:00:1e.0: bridge window [mem 0xf4300000-0xf7ffffff] +[ 0.246087] pci 0000:00:1e.0: bridge window [mem 0xf0000000-0xf3ffffff 64bit pref] +[ 0.246154] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7] +[ 0.246156] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff] +[ 0.246158] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.246160] pci_bus 0000:00: resource 7 [mem 0x000d4000-0x000d7fff] +[ 0.246162] pci_bus 0000:00: resource 8 [mem 0x000d8000-0x000dbfff] +[ 0.246164] pci_bus 0000:00: resource 9 [mem 0xc0000000-0xfebfffff] +[ 0.246167] pci_bus 0000:02: resource 0 [io 0x8000-0x8fff] +[ 0.246169] pci_bus 0000:02: resource 1 [mem 0xc0000000-0xc01fffff] +[ 0.246171] pci_bus 0000:02: resource 2 [mem 0xc0200000-0xc03fffff 64bit pref] +[ 0.246173] pci_bus 0000:05: resource 0 [io 0x2000-0x2fff] +[ 0.246175] pci_bus 0000:05: resource 1 [mem 0xf8000000-0xf9ffffff] +[ 0.246178] pci_bus 0000:05: resource 2 [mem 0xf4000000-0xf40fffff 64bit pref] +[ 0.246180] pci_bus 0000:0d: resource 0 [io 0x3000-0x3fff] +[ 0.246182] pci_bus 0000:0d: resource 1 [mem 0xfa000000-0xfbffffff] +[ 0.246184] pci_bus 0000:0d: resource 2 [mem 0xf4100000-0xf41fffff 64bit pref] +[ 0.246186] pci_bus 0000:15: resource 0 [io 0x4000-0x7fff] +[ 0.246188] pci_bus 0000:15: resource 1 [mem 0xf4300000-0xf7ffffff] +[ 0.246191] pci_bus 0000:15: resource 2 [mem 0xf0000000-0xf3ffffff 64bit pref] +[ 0.246193] pci_bus 0000:15: resource 4 [io 0x0000-0x0cf7] +[ 0.246195] pci_bus 0000:15: resource 5 [io 0x0d00-0xffff] +[ 0.246197] pci_bus 0000:15: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.246199] pci_bus 0000:15: resource 7 [mem 0x000d4000-0x000d7fff] +[ 0.246201] pci_bus 0000:15: resource 8 [mem 0x000d8000-0x000dbfff] +[ 0.246203] pci_bus 0000:15: resource 9 [mem 0xc0000000-0xfebfffff] +[ 0.246205] pci_bus 0000:16: resource 0 [io 0x4000-0x40ff] +[ 0.246207] pci_bus 0000:16: resource 1 [io 0x4400-0x44ff] +[ 0.246209] pci_bus 0000:16: resource 2 [mem 0xf0000000-0xf3ffffff pref] +[ 0.246212] pci_bus 0000:16: resource 3 [mem 0xc4000000-0xc7ffffff] +[ 0.246249] NET: Registered protocol family 2 +[ 0.246495] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.246559] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.246630] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.246707] TCP: reno registered +[ 0.246753] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.246808] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.246916] NET: Registered protocol family 1 +[ 0.246974] pci 0000:00:02.0: Boot video device +[ 0.248116] PCI: CLS 64 bytes, default 64 +[ 0.248159] Trying to unpack rootfs image as initramfs... +[ 0.684192] Freeing initrd memory: 21860K (f553e000 - f6a97000) +[ 0.684342] Simple Boot Flag at 0x35 set to 0x1 +[ 0.684544] microcode: CPU0 sig=0x1067a, pf=0x80, revision=0xa07 +[ 0.684599] microcode: CPU1 sig=0x1067a, pf=0x80, revision=0xa07 +[ 0.684721] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba +[ 0.684784] Scanning for low memory corruption every 60 seconds +[ 0.685127] Initialise system trusted keyring +[ 0.685217] audit: initializing netlink socket (disabled) +[ 0.685277] type=2000 audit(1430654717.684:1): initialized +[ 0.700910] bounce pool size: 64 pages +[ 0.700966] HugeTLB registered 2 MB page size, pre-allocated 0 pages +[ 0.702589] zbud: loaded +[ 0.702704] VFS: Disk quotas dquot_6.5.2 +[ 0.702800] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) +[ 0.703367] fuse init (API version 7.22) +[ 0.703503] msgmni has been set to 1659 +[ 0.703617] Key type big_key registered +[ 0.704163] Key type asymmetric registered +[ 0.704211] Asymmetric key parser 'x509' registered +[ 0.704292] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) +[ 0.704386] io scheduler noop registered +[ 0.704435] io scheduler deadline registered +[ 0.704513] io scheduler cfq registered +[ 0.704562] io scheduler bfq registered (default) +[ 0.704609] BFQ I/O-scheduler version: v7r5 +[ 0.704883] pcieport 0000:00:1c.0: irq 40 for MSI/MSI-X +[ 0.705125] pcieport 0000:00:1c.3: irq 41 for MSI/MSI-X +[ 0.705309] pcieport 0000:00:1c.4: irq 42 for MSI/MSI-X +[ 0.705477] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt +[ 0.705532] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded +[ 0.705591] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt +[ 0.705645] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded +[ 0.705703] pcieport 0000:00:1c.4: Signaling PME through PCIe PME interrupt +[ 0.705756] pcie_pme 0000:00:1c.4:pcie01: service driver pcie_pme loaded +[ 0.705776] pci_hotplug: PCI Hot Plug PCI Core version: 0.5 +[ 0.705880] pciehp 0000:00:1c.0:pcie04: HPC vendor_id 8086 device_id 2940 ss_vid 17aa ss_did 20f3 +[ 0.706016] pciehp 0000:00:1c.0:pcie04: service driver pciehp loaded +[ 0.706032] pciehp 0000:00:1c.3:pcie04: HPC vendor_id 8086 device_id 2946 ss_vid 17aa ss_did 20f3 +[ 0.706154] pciehp 0000:00:1c.3:pcie04: service driver pciehp loaded +[ 0.706169] pciehp 0000:00:1c.4:pcie04: HPC vendor_id 8086 device_id 2948 ss_vid 17aa ss_did 20f3 +[ 0.706291] pciehp 0000:00:1c.4:pcie04: service driver pciehp loaded +[ 0.706298] pciehp: PCI Express Hot Plug Controller Driver version: 0.4 +[ 0.706409] intel_idle: does not run on family 6 model 23 +[ 0.706417] ipmi message handler version 39.2 +[ 0.706620] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.706852] ACPI: AC Adapter [AC] (on-line) +[ 0.706996] input: Lid Switch as /devices/LNXSYSTM:00/device:00/PNP0C0D:00/input/input0 +[ 0.707373] ACPI: Lid Switch [LID] +[ 0.707458] input: Sleep Button as /devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1 +[ 0.707521] ACPI: Sleep Button [SLPB] +[ 0.707612] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 +[ 0.707674] ACPI: Power Button [PWRF] +[ 0.709269] Monitor-Mwait will be used to enter C-1 state +[ 0.709274] Monitor-Mwait will be used to enter C-2 state +[ 0.709278] Monitor-Mwait will be used to enter C-3 state +[ 0.709281] tsc: Marking TSC unstable due to TSC halts in idle +[ 0.709337] ACPI: acpi_idle registered with cpuidle +[ 0.711717] thermal LNXTHERM:00: registered as thermal_zone0 +[ 0.711771] ACPI: Thermal Zone [THM0] (48 C) +[ 0.729046] thermal LNXTHERM:01: registered as thermal_zone1 +[ 0.729095] ACPI: Thermal Zone [THM1] (50 C) +[ 0.729177] GHES: HEST is not enabled! +[ 0.729318] isapnp: Scanning for PnP cards... +[ 0.729400] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.729409] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled +[ 0.729519] ACPI: Battery Slot [BAT0] (battery absent) +[ 0.730776] Linux agpgart interface v0.103 +[ 0.730923] agpgart-intel 0000:00:00.0: Intel GM45 Chipset +[ 0.731056] agpgart-intel 0000:00:00.0: detected gtt size: 2097152K total, 262144K mappable +[ 0.732082] agpgart-intel 0000:00:00.0: detected 32768K stolen memory +[ 0.732225] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000 +[ 0.738049] tpm_tis 00:09: 1.2 TPM (device-id 0x1020, rev-id 6) +[ 0.738099] tpm_tis 00:09: Intel iTPM workaround enabled +[ 0.810044] tpm_tis 00:09: TPM is disabled/deactivated (0x6) +[ 0.811502] brd: module loaded +[ 0.812298] loop: module loaded +[ 0.812879] libphy: Fixed MDIO Bus: probed +[ 0.813069] tun: Universal TUN/TAP device driver, 1.6 +[ 0.813118] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> +[ 0.813201] PPP generic driver version 2.4.2 +[ 0.813289] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver +[ 0.813340] ehci-pci: EHCI PCI platform driver +[ 0.813508] ehci-pci 0000:00:1a.7: EHCI Host Controller +[ 0.813561] ehci-pci 0000:00:1a.7: new USB bus registered, assigned bus number 1 +[ 0.813636] ehci-pci 0000:00:1a.7: debug port 1 +[ 0.817590] ehci-pci 0000:00:1a.7: cache line size of 64 is not supported +[ 0.817660] ehci-pci 0000:00:1a.7: irq 23, io mem 0xfc625c00 +[ 0.824040] ehci-pci 0000:00:1a.7: USB 2.0 started, EHCI 1.00 +[ 0.824127] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.824178] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.824238] usb usb1: Product: EHCI Host Controller +[ 0.824286] usb usb1: Manufacturer: Linux 3.13.0-39-lowlatency ehci_hcd +[ 0.824336] usb usb1: SerialNumber: 0000:00:1a.7 +[ 0.824479] hub 1-0:1.0: USB hub found +[ 0.824531] hub 1-0:1.0: 6 ports detected +[ 0.824916] ehci-pci 0000:00:1d.7: EHCI Host Controller +[ 0.824969] ehci-pci 0000:00:1d.7: new USB bus registered, assigned bus number 2 +[ 0.825060] ehci-pci 0000:00:1d.7: debug port 1 +[ 0.829012] ehci-pci 0000:00:1d.7: cache line size of 64 is not supported +[ 0.829056] ehci-pci 0000:00:1d.7: irq 19, io mem 0xfc626000 +[ 0.835018] ehci-pci 0000:00:1d.7: USB 2.0 started, EHCI 1.00 +[ 0.835135] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.835186] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.835246] usb usb2: Product: EHCI Host Controller +[ 0.835294] usb usb2: Manufacturer: Linux 3.13.0-39-lowlatency ehci_hcd +[ 0.835345] usb usb2: SerialNumber: 0000:00:1d.7 +[ 0.839276] Monitor-Mwait will be used to enter C-3 state +[ 0.839280] hub 2-0:1.0: USB hub found +[ 0.839336] hub 2-0:1.0: 6 ports detected +[ 0.839956] ehci-platform: EHCI generic platform driver +[ 0.840024] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver +[ 0.840073] ohci-pci: OHCI PCI platform driver +[ 0.840131] ohci-platform: OHCI generic platform driver +[ 0.840186] uhci_hcd: USB Universal Host Controller Interface driver +[ 0.840318] uhci_hcd 0000:00:1a.0: UHCI Host Controller +[ 0.840369] uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 3 +[ 0.840491] uhci_hcd 0000:00:1a.0: irq 20, io base 0x00001840 +[ 0.840590] usb usb3: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.840641] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.840702] usb usb3: Product: UHCI Host Controller +[ 0.840750] usb usb3: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.840800] usb usb3: SerialNumber: 0000:00:1a.0 +[ 0.840938] hub 3-0:1.0: USB hub found +[ 0.840990] hub 3-0:1.0: 2 ports detected +[ 0.841231] uhci_hcd 0000:00:1a.1: UHCI Host Controller +[ 0.841283] uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4 +[ 0.841397] uhci_hcd 0000:00:1a.1: irq 21, io base 0x00001860 +[ 0.841499] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.841550] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.841610] usb usb4: Product: UHCI Host Controller +[ 0.841658] usb usb4: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.842320] usb usb4: SerialNumber: 0000:00:1a.1 +[ 0.842458] hub 4-0:1.0: USB hub found +[ 0.842510] hub 4-0:1.0: 2 ports detected +[ 0.842736] uhci_hcd 0000:00:1a.2: UHCI Host Controller +[ 0.842787] uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5 +[ 0.842901] uhci_hcd 0000:00:1a.2: irq 22, io base 0x00001880 +[ 0.843012] usb usb5: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.843063] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.843123] usb usb5: Product: UHCI Host Controller +[ 0.843171] usb usb5: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.843222] usb usb5: SerialNumber: 0000:00:1a.2 +[ 0.843359] hub 5-0:1.0: USB hub found +[ 0.843411] hub 5-0:1.0: 2 ports detected +[ 0.843644] uhci_hcd 0000:00:1d.0: UHCI Host Controller +[ 0.843695] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6 +[ 0.843809] uhci_hcd 0000:00:1d.0: irq 16, io base 0x000018a0 +[ 0.843909] usb usb6: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.843962] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.844034] usb usb6: Product: UHCI Host Controller +[ 0.844082] usb usb6: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.844132] usb usb6: SerialNumber: 0000:00:1d.0 +[ 0.844271] hub 6-0:1.0: USB hub found +[ 0.844323] hub 6-0:1.0: 2 ports detected +[ 0.844553] uhci_hcd 0000:00:1d.1: UHCI Host Controller +[ 0.844605] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7 +[ 0.844717] uhci_hcd 0000:00:1d.1: irq 17, io base 0x000018c0 +[ 0.844816] usb usb7: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.844867] usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.844927] usb usb7: Product: UHCI Host Controller +[ 0.844976] usb usb7: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.845037] usb usb7: SerialNumber: 0000:00:1d.1 +[ 0.845176] hub 7-0:1.0: USB hub found +[ 0.845229] hub 7-0:1.0: 2 ports detected +[ 0.845458] uhci_hcd 0000:00:1d.2: UHCI Host Controller +[ 0.845510] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8 +[ 0.845625] uhci_hcd 0000:00:1d.2: irq 18, io base 0x000018e0 +[ 0.845727] usb usb8: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.845777] usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.845837] usb usb8: Product: UHCI Host Controller +[ 0.845885] usb usb8: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.845935] usb usb8: SerialNumber: 0000:00:1d.2 +[ 0.846093] hub 8-0:1.0: USB hub found +[ 0.846146] hub 8-0:1.0: 2 ports detected +[ 0.846371] i8042: PNP: PS/2 Controller [PNP0303:KBD,PNP0f13:MOU] at 0x60,0x64 irq 1,12 +[ 0.854811] serio: i8042 KBD port at 0x60,0x64 irq 1 +[ 0.854862] serio: i8042 AUX port at 0x60,0x64 irq 12 +[ 0.855027] mousedev: PS/2 mouse device common for all mice +[ 0.855218] rtc_cmos 00:06: RTC can wake from S4 +[ 0.855389] rtc_cmos 00:06: rtc core: registered rtc_cmos as rtc0 +[ 0.855484] rtc_cmos 00:06: alarms up to one month, y3k, 114 bytes nvram, hpet irqs +[ 0.855618] device-mapper: uevent: version 1.0.3 +[ 0.855725] device-mapper: ioctl: 4.27.0-ioctl (2013-10-30) initialised: dm-devel@redhat.com +[ 0.855808] platform eisa.0: Probing EISA bus 0 +[ 0.855857] platform eisa.0: EISA: Cannot allocate resource for mainboard +[ 0.855907] platform eisa.0: Cannot allocate resource for EISA slot 1 +[ 0.855958] platform eisa.0: Cannot allocate resource for EISA slot 2 +[ 0.856019] platform eisa.0: Cannot allocate resource for EISA slot 3 +[ 0.856070] platform eisa.0: Cannot allocate resource for EISA slot 4 +[ 0.856120] platform eisa.0: Cannot allocate resource for EISA slot 5 +[ 0.856170] platform eisa.0: Cannot allocate resource for EISA slot 6 +[ 0.856220] platform eisa.0: Cannot allocate resource for EISA slot 7 +[ 0.856282] platform eisa.0: Cannot allocate resource for EISA slot 8 +[ 0.856332] platform eisa.0: EISA: Detected 0 cards +[ 0.856384] cpufreq-nforce2: No nForce2 chipset. +[ 0.856432] ledtrig-cpu: registered to indicate activity on CPUs +[ 0.856626] TCP: cubic registered +[ 0.856776] NET: Registered protocol family 10 +[ 0.857052] NET: Registered protocol family 17 +[ 0.857107] Key type dns_resolver registered +[ 0.857329] Using IPI No-Shortcut mode +[ 0.857448] Loading compiled-in X.509 certificates +[ 0.860267] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3 +[ 0.861508] Loaded X.509 cert 'Magrathea: Glacier signing key: 680cb30646cc91d1b36b663dc44e87808b042a52' +[ 0.861583] registered taskstats version 1 +[ 0.863893] Key type trusted registered +[ 0.865792] Key type encrypted registered +[ 0.867715] AppArmor: AppArmor sha1 policy hashing enabled +[ 0.885045] tpm_tis 00:09: A TPM error (6) occurred attempting to read a pcr value +[ 0.885107] IMA: No TPM chip found, activating TPM-bypass! +[ 0.885507] regulator-dummy: disabling +[ 0.885577] Magic number: 15:3:76 +[ 0.885705] rtc_cmos 00:06: setting system clock to 2015-05-03 12:05:18 UTC (1430654718) +[ 0.901299] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found +[ 0.901352] EDD information not available. +[ 0.901503] PM: Hibernation image not present or could not be loaded. +[ 1.087749] isapnp: No Plug & Play device found +[ 1.088240] Freeing unused kernel memory: 868K (c19c3000 - c1a9c000) +[ 1.088350] Write protecting the kernel text: 6580k +[ 1.088525] Write protecting the kernel read-only data: 2776k +[ 1.088577] NX-protecting the kernel data: 5708k +[ 1.110287] systemd-udevd[116]: starting version 204 +[ 1.141089] usb 2-2: new high-speed USB device number 2 using ehci-pci +[ 1.166650] [drm] Initialized drm 1.1.0 20060810 +[ 1.176744] pps_core: LinuxPPS API ver. 1 registered +[ 1.176797] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> +[ 1.190035] wmi: Mapper loaded +[ 1.225811] PTP clock support registered +[ 1.232326] ahci 0000:00:1f.2: version 3.0 +[ 1.232520] ahci 0000:00:1f.2: irq 43 for MSI/MSI-X +[ 1.232572] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled +[ 1.232655] ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 4 ports 3 Gbps 0x3 impl SATA mode +[ 1.232721] ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pio slum part ccc sxs +[ 1.237032] scsi0 : ahci +[ 1.238024] scsi1 : ahci +[ 1.241034] scsi2 : ahci +[ 1.241728] sdhci: Secure Digital Host Controller Interface driver +[ 1.241782] sdhci: Copyright(c) Pierre Ossman +[ 1.242020] scsi3 : ahci +[ 1.242138] ata1: SATA max UDMA/133 abar m2048@0xfc625000 port 0xfc625100 irq 43 +[ 1.242204] ata2: SATA max UDMA/133 abar m2048@0xfc625000 port 0xfc625180 irq 43 +[ 1.242267] ata3: DUMMY +[ 1.242314] ata4: DUMMY +[ 1.261164] usb 2-2: New USB device found, idVendor=0b95, idProduct=1790 +[ 1.261223] usb 2-2: New USB device strings: Mfr=1, Product=2, SerialNumber=3 +[ 1.261278] usb 2-2: Product: AX88179 +[ 1.261329] usb 2-2: Manufacturer: ASIX Elec. +[ 1.261381] usb 2-2: SerialNumber: 00803F5D087AE3 +[ 1.290396] sdhci-pci 0000:15:00.2: SDHCI controller found [1180:0822] (rev 21) +[ 1.292641] sdhci-pci 0000:15:00.2: Will use DMA mode even though HW doesn't fully claim to support it. +[ 1.292719] sdhci-pci 0000:15:00.2: dummy supplies not allowed +[ 1.292771] mmc0: no vqmmc regulator found +[ 1.292821] sdhci-pci 0000:15:00.2: dummy supplies not allowed +[ 1.292872] mmc0: no vmmc regulator found +[ 1.293927] sdhci-pci 0000:15:00.2: Will use DMA mode even though HW doesn't fully claim to support it. +[ 1.296964] mmc0: SDHCI controller on PCI [0000:15:00.2] using DMA +[ 1.315167] [drm] Memory usable by graphics device = 2048M +[ 1.323106] i915 0000:00:02.0: irq 44 for MSI/MSI-X +[ 1.323122] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.323176] [drm] Driver supports precise vblank timestamp query. +[ 1.325610] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem +[ 1.327406] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k +[ 1.327457] e1000e: Copyright(c) 1999 - 2013 Intel Corporation. +[ 1.360077] firewire_ohci 0000:15:00.1: added OHCI v1.10 device as card 0, 4 IR + 4 IT contexts, quirks 0x11 +[ 1.404196] fbcon: inteldrmfb (fb0) is primary device +[ 1.547135] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300) +[ 1.548423] ata1.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.548427] ata1.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out +[ 1.548539] ata1.00: ACPI cmd ef/5f:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.548541] ata1.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.589778] ata1.00: ATA-8: WDC WD2500BEVS-08VAT2, 14.01A14, max UDMA/133 +[ 1.589781] ata1.00: 488397168 sectors, multi 16: LBA48 NCQ (depth 31/32), AA +[ 1.591940] ata1.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.591944] ata1.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out +[ 1.592061] ata1.00: ACPI cmd ef/5f:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.592064] ata1.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.594016] ata1.00: configured for UDMA/133 +[ 1.594229] scsi 0:0:0:0: Direct-Access ATA WDC WD2500BEVS-0 14.0 PQ: 0 ANSI: 5 +[ 1.594501] sd 0:0:0:0: [sda] 488397168 512-byte logical blocks: (250 GB/232 GiB) +[ 1.594518] sd 0:0:0:0: Attached scsi generic sg0 type 0 +[ 1.594607] sd 0:0:0:0: [sda] Write Protect is off +[ 1.594610] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00 +[ 1.594652] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA +[ 1.629835] sda: sda1 sda2 < sda5 sda6 > +[ 1.630551] sd 0:0:0:0: [sda] Attached SCSI disk +[ 1.677260] psmouse serio1: alps: Unknown ALPS touchpad: E7=10 00 64, EC=10 00 64 +[ 1.861220] firewire_core 0000:15:00.1: created device fw0: GUID 00016c2000b8125f, S400 +[ 1.899114] ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300) +[ 1.906682] ata2.00: ACPI cmd e3/00:1f:00:00:00:a0 (IDLE) succeeded +[ 1.911726] ata2.00: ACPI cmd e3/00:02:00:00:00:a0 (IDLE) succeeded +[ 1.911730] ata2.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.913488] ata2.00: ATAPI: Optiarc DVD RW AD-7930H, 1.D0, max UDMA/100 +[ 1.925908] ata2.00: ACPI cmd e3/00:1f:00:00:00:a0 (IDLE) succeeded +[ 1.930132] Console: switching to colour frame buffer device 128x48 +[ 1.930934] ata2.00: ACPI cmd e3/00:02:00:00:00:a0 (IDLE) succeeded +[ 1.930938] ata2.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.932628] ata2.00: configured for UDMA/100 +[ 1.939201] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device +[ 1.941707] i915 0000:00:02.0: registered panic notifier +[ 1.950136] scsi 1:0:0:0: CD-ROM Optiarc DVD RW AD-7930H 1.D0 PQ: 0 ANSI: 5 +[ 1.969550] sr0: scsi3-mmc drive: 24x/24x writer dvd-ram cd/rw xa/form2 cdda tray +[ 1.972132] cdrom: Uniform CD-ROM driver Revision: 3.20 +[ 1.974846] sr 1:0:0:0: Attached scsi CD-ROM sr0 +[ 1.974939] sr 1:0:0:0: Attached scsi generic sg1 type 5 +[ 1.978931] ACPI: Video Device [VID] (multi-head: yes rom: no post: no) +[ 1.989556] acpi device:02: registered as cooling_device2 +[ 1.992260] input: Video Bus as /devices/LNXSYSTM:00/device:00/PNP0A08:00/LNXVIDEO:00/input/input6 +[ 1.995024] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0 +[ 1.997875] e1000e 0000:00:19.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode +[ 2.000740] e1000e 0000:00:19.0: irq 45 for MSI/MSI-X +[ 2.028044] psmouse serio1: trackpoint: IBM TrackPoint firmware: 0x0e, buttons: 3/3 +[ 2.045577] input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio1/input/input5 +[ 2.197236] e1000e 0000:00:19.0 eth0: (PCI Express:2.5GT/s:Width x1) 00:22:68:1d:5f:c1 +[ 2.199930] e1000e 0000:00:19.0 eth0: Intel(R) PRO/1000 Network Connection +[ 2.202618] e1000e 0000:00:19.0 eth0: MAC: 7, PHY: 8, PBA No: 1008FF-0FF +[ 2.467919] md: linear personality registered for level -1 +[ 2.476368] md: multipath personality registered for level -4 +[ 2.484981] md: raid0 personality registered for level 0 +[ 2.494883] md: raid1 personality registered for level 1 +[ 2.523049] raid6: mmxx1 1988 MB/s +[ 2.540029] raid6: mmxx2 2339 MB/s +[ 2.557056] raid6: sse1x1 1410 MB/s +[ 2.574038] raid6: sse1x2 1792 MB/s +[ 2.591037] raid6: sse2x1 2605 MB/s +[ 2.608037] raid6: sse2x2 3210 MB/s +[ 2.608076] raid6: using algorithm sse2x2 (3210 MB/s) +[ 2.608125] raid6: using ssse3x1 recovery algorithm +[ 2.615066] xor: measuring software checksum speed +[ 2.625030] pIII_sse : 5932.000 MB/sec +[ 2.635031] prefetch64-sse: 6756.000 MB/sec +[ 2.635078] xor: using function: prefetch64-sse (6756.000 MB/sec) +[ 2.641070] async_tx: api initialized (async) +[ 2.676429] md: raid6 personality registered for level 6 +[ 2.676484] md: raid5 personality registered for level 5 +[ 2.676662] md: raid4 personality registered for level 4 +[ 2.691632] md: raid10 personality registered for level 10 +[ 2.805016] random: nonblocking pool is initialized +[ 2.920817] bio: create slab <bio-1> at 1 +[ 2.921930] Btrfs loaded +[ 3.201253] EXT4-fs (sda1): mounted filesystem with ordered data mode. Opts: (null) +[ 11.687514] Adding 6894588k swap on /dev/sda5. Priority:-1 extents:1 across:6894588k FS +[ 11.740261] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 11.856982] systemd-udevd[391]: starting version 204 +[ 11.988698] lp: driver loaded but no devices found +[ 12.017169] ppdev: user-space parallel port driver +[ 12.240415] Non-volatile memory driver v1.3 +[ 12.279756] thinkpad_acpi: ThinkPad ACPI Extras v0.25 +[ 12.279761] thinkpad_acpi: http://ibm-acpi.sf.net/ +[ 12.279763] thinkpad_acpi: ThinkPad BIOS 7VET83WW (3.13 ), EC 7VHT16WW-1.06 +[ 12.279766] thinkpad_acpi: Lenovo ThinkPad T500, model 224397G +[ 12.307500] type=1400 audit(1430651129.921:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/sbin/dhclient" pid=462 comm="apparmor_parser" +[ 12.307510] type=1400 audit(1430651129.921:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=462 comm="apparmor_parser" +[ 12.307517] type=1400 audit(1430651129.921:4): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=462 comm="apparmor_parser" +[ 12.309315] type=1400 audit(1430651129.923:5): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=462 comm="apparmor_parser" +[ 12.309325] type=1400 audit(1430651129.923:6): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=462 comm="apparmor_parser" +[ 12.309718] type=1400 audit(1430651129.923:7): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=462 comm="apparmor_parser" +[ 12.327128] thinkpad_acpi: detected a 16-level brightness capable ThinkPad +[ 12.329873] thinkpad_acpi: radio switch found; radios are enabled +[ 12.329894] thinkpad_acpi: This ThinkPad has standard ACPI backlight brightness control, supported by the ACPI video driver +[ 12.329897] thinkpad_acpi: Disabling thinkpad-acpi brightness events by default... +[ 12.365868] thinkpad_acpi: Standard ACPI backlight interface available, not loading native one +[ 12.370496] thinkpad_acpi: Console audio control enabled, mode: monitor (read only) +[ 12.382976] input: ThinkPad Extra Buttons as /devices/platform/thinkpad_acpi/input/input7 +[ 12.409233] r592: driver successfully loaded +[ 12.435744] yenta_cardbus 0000:15:00.0: CardBus bridge found [17aa:20c6] +[ 12.517664] ACPI Warning: 0x00001028-0x0000102f SystemIO conflicts with Region \_SB_.PCI0.LPC_.PMIO 1 (20131115/utaddress-251) +[ 12.517675] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 12.517680] ACPI Warning: 0x000011b0-0x000011bf SystemIO conflicts with Region \_SB_.PCI0.LPC_.LPIO 1 (20131115/utaddress-251) +[ 12.517686] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 12.517689] ACPI Warning: 0x00001180-0x000011af SystemIO conflicts with Region \_SB_.PCI0.LPC_.LPIO 1 (20131115/utaddress-251) +[ 12.517694] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 12.517696] lpc_ich: Resource conflict(s) found affecting gpio_ich +[ 12.537570] snd_hda_intel 0000:00:1b.0: irq 46 for MSI/MSI-X +[ 12.559824] yenta_cardbus 0000:15:00.0: ISA IRQ mask 0x0cb8, PCI irq 16 +[ 12.559831] yenta_cardbus 0000:15:00.0: Socket status: 30000006 +[ 12.559839] yenta_cardbus 0000:15:00.0: pcmcia: parent PCI bridge window: [io 0x4000-0x7fff] +[ 12.559844] pcmcia_socket pcmcia_socket0: cs: IO port probe 0x4000-0x7fff: +[ 12.570045] hda_codec: CX20561 (Hermosa): BIOS auto-probing. +[ 12.570487] autoconfig: line_outs=1 (0x1a/0x0/0x0/0x0/0x0) type:speaker +[ 12.570491] speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) +[ 12.570493] hp_outs=2 (0x19/0x16/0x0/0x0/0x0) +[ 12.570495] mono: mono_out=0x0 +[ 12.570498] dig-out=0x1c/0x0 +[ 12.570500] inputs: +[ 12.570503] Mic=0x18 +[ 12.570505] Internal Mic=0x1d +[ 12.570507] Dock Mic=0x17 +[ 12.571526] hda_codec: Enable sync_write for stable communication +[ 12.574407] input: HDA Intel Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input11 +[ 12.574615] input: HDA Intel Dock Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input10 +[ 12.574789] input: HDA Intel Dock Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input9 +[ 12.574959] input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input8 +[ 12.575690] mei_me 0000:00:03.0: irq 47 for MSI/MSI-X +[ 12.585028] device-mapper: multipath: version 1.6.0 loaded +[ 12.561557] excluding 0x4000-0x40ff 0x4400-0x44ff +[ 12.658770] yenta_cardbus 0000:15:00.0: pcmcia: parent PCI bridge window: [mem 0xf4300000-0xf7ffffff] +[ 12.658777] pcmcia_socket pcmcia_socket0: cs: memory probe 0xf4300000-0xf7ffffff: +[ 12.658782] excluding 0xf4300000-0xf46cffff +[ 12.658800] yenta_cardbus 0000:15:00.0: pcmcia: parent PCI bridge window: [mem 0xf0000000-0xf3ffffff 64bit pref] +[ 12.658804] pcmcia_socket pcmcia_socket0: cs: memory probe 0xf0000000-0xf3ffffff: +[ 12.658826] excluding 0xf0000000-0xf3ffffff +[ 12.664392] r852: driver loaded successfully +[ 12.912402] kvm: disabled by bios +[ 12.940654] ax88179_178a 2-2:1.0 eth1: register 'ax88179_178a' at usb-0000:00:1d.7-2, ASIX AX88179 USB 3.0 Gigabit Ethernet, 80:3f:5d:08:7a:e3 +[ 12.943043] usbcore: registered new interface driver ax88179_178a +[ 12.979166] kvm: disabled by bios +[ 13.078215] systemd-udevd[413]: renamed network interface eth1 to eth2 +[ 13.117195] pcmcia_socket pcmcia_socket0: cs: IO port probe 0x100-0x3af: +[ 13.119548] clean. +[ 13.119578] pcmcia_socket pcmcia_socket0: cs: IO port probe 0x3e0-0x4ff: +[ 13.120473] excluding 0x4d0-0x4d7 +[ 13.120566] pcmcia_socket pcmcia_socket0: cs: IO port probe 0x820-0x8ff: +[ 13.121329] clean. +[ 13.121353] pcmcia_socket pcmcia_socket0: cs: IO port probe 0xc00-0xcf7: +[ 13.122201] clean. +[ 13.122229] pcmcia_socket pcmcia_socket0: cs: memory probe 0x0c0000-0x0fffff: +[ 13.122237] excluding 0xc0000-0xd3fff 0xdc000-0xfffff +[ 13.122272] pcmcia_socket pcmcia_socket0: cs: memory probe 0xa0000000-0xa0ffffff: +[ 13.122287] excluding 0xa0000000-0xa0ffffff +[ 13.122311] pcmcia_socket pcmcia_socket0: cs: memory probe 0x60000000-0x60ffffff: +[ 13.122326] excluding 0x60000000-0x60ffffff +[ 13.122350] pcmcia_socket pcmcia_socket0: cs: IO port probe 0xa00-0xaff: +[ 13.123217] clean. +[ 41.374397] EXT4-fs (sda1): warning: mounting fs with errors, running e2fsck is recommended +[ 41.374705] EXT4-fs (sda1): re-mounted. Opts: errors=remount-ro +[ 41.528699] SGI XFS with ACLs, security attributes, realtime, large block/inode numbers, no debug enabled +[ 41.559407] XFS (sda6): Mounting Filesystem +[ 41.747785] XFS (sda6): Ending clean mount +[ 42.167809] init: failsafe main process (721) killed by TERM signal +[ 42.703391] type=1400 audit(1430651160.316:8): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/cups/backend/cups-pdf" pid=854 comm="apparmor_parser" +[ 42.703403] type=1400 audit(1430651160.316:9): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/sbin/cupsd" pid=854 comm="apparmor_parser" +[ 42.704201] type=1400 audit(1430651160.317:10): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=854 comm="apparmor_parser" +[ 42.817805] Bluetooth: Core ver 2.17 +[ 42.817834] NET: Registered protocol family 31 +[ 42.817836] Bluetooth: HCI device and connection manager initialized +[ 42.817847] Bluetooth: HCI socket layer initialized +[ 42.817852] Bluetooth: L2CAP socket layer initialized +[ 42.817860] Bluetooth: SCO socket layer initialized +[ 42.830260] Bluetooth: RFCOMM TTY layer initialized +[ 42.830273] Bluetooth: RFCOMM socket layer initialized +[ 42.830281] Bluetooth: RFCOMM ver 1.11 +[ 42.858743] type=1400 audit(1430651160.471:11): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/sbin/dhclient" pid=874 comm="apparmor_parser" +[ 42.858755] type=1400 audit(1430651160.471:12): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=874 comm="apparmor_parser" +[ 42.858763] type=1400 audit(1430651160.471:13): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=874 comm="apparmor_parser" +[ 42.859570] type=1400 audit(1430651160.472:14): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=874 comm="apparmor_parser" +[ 42.859578] type=1400 audit(1430651160.472:15): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=874 comm="apparmor_parser" +[ 42.859939] type=1400 audit(1430651160.472:16): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/lightdm/lightdm-guest-session" pid=873 comm="apparmor_parser" +[ 42.859948] type=1400 audit(1430651160.472:17): apparmor="STATUS" operation="profile_load" profile="unconfined" name="chromium" pid=873 comm="apparmor_parser" +[ 42.953835] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 +[ 42.953840] Bluetooth: BNEP filters: protocol multicast +[ 42.953851] Bluetooth: BNEP socket layer initialized +[ 43.051816] init: cups main process (855) killed by HUP signal +[ 43.051835] init: cups main process ended, respawning +[ 44.468481] e1000e 0000:00:19.0: irq 45 for MSI/MSI-X +[ 44.569206] e1000e 0000:00:19.0: irq 45 for MSI/MSI-X +[ 44.569418] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 44.569930] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 44.712188] init: plymouth-upstart-bridge main process ended, respawning +[ 44.884246] IPv6: ADDRCONF(NETDEV_UP): eth2: link is not ready +[ 44.884774] IPv6: ADDRCONF(NETDEV_UP): eth2: link is not ready +[ 47.806197] ax88179_178a 2-2:1.0 eth2: ax88179 - Link status is: 1 +[ 47.808322] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready +[ 72.805208] audit_printk_skb: 78 callbacks suppressed +[ 72.805214] type=1400 audit(1430651190.418:44): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/cups/backend/cups-pdf" pid=2240 comm="apparmor_parser" +[ 72.805224] type=1400 audit(1430651190.418:45): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=2240 comm="apparmor_parser" +[ 72.806335] type=1400 audit(1430651190.419:46): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=2240 comm="apparmor_parser" +[ 103.542583] i2c /dev entries driver +[ 140.117085] [drm] GMBUS [i915 gmbus dpd] timed out, falling back to bit banging on pin 6 +[ 572.914142] perf samples too long (2509 > 2500), lowering kernel.perf_event_max_sample_rate to 50000 +[ 2475.161644] perf samples too long (5018 > 5000), lowering kernel.perf_event_max_sample_rate to 25000 +[ 9967.166214] init: upstart-udev-bridge main process (385) terminated with status 1 +[ 9967.166237] init: upstart-udev-bridge main process ended, respawning +[ 9967.166497] init: upstart-socket-bridge main process (636) terminated with status 1 +[ 9967.166515] init: upstart-socket-bridge main process ended, respawning +[ 9967.166734] init: upstart-file-bridge main process (762) terminated with status 1 +[ 9967.166751] init: upstart-file-bridge main process ended, respawning diff --git a/docs/future/dumps/t500log/dmidecode.log b/docs/future/dumps/t500log/dmidecode.log new file mode 100644 index 00000000..f5452d03 --- /dev/null +++ b/docs/future/dumps/t500log/dmidecode.log @@ -0,0 +1,651 @@ +# dmidecode 2.12 +SMBIOS 2.4 present. +80 structures occupying 2833 bytes. +Table at 0x000E0010. + +Handle 0x0000, DMI type 0, 24 bytes +BIOS Information + Vendor: LENOVO + Version: 7VET83WW (3.13 ) + Release Date: 03/12/2010 + Address: 0xE0000 + Runtime Size: 128 kB + ROM Size: 4096 kB + Characteristics: + PCI is supported + PC Card (PCMCIA) is supported + PNP is supported + BIOS is upgradeable + BIOS shadowing is allowed + ESCD support is available + Boot from CD is supported + Selectable boot is supported + BIOS ROM is socketed + EDD is supported + ACPI is supported + USB legacy is supported + BIOS boot specification is supported + Targeted content distribution is supported + BIOS Revision: 3.19 + Firmware Revision: 1.6 + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: LENOVO + Product Name: 224397G + Version: ThinkPad T500 + Serial Number: R889Z75 + UUID: 2EA16981-4FBB-11CB-A739-DB6D463577E9 + Wake-up Type: Power Switch + SKU Number: Not Specified + Family: ThinkPad T500 + +Handle 0x0002, DMI type 2, 8 bytes +Base Board Information + Manufacturer: LENOVO + Product Name: 224397G + Version: Not Available + Serial Number: VQ11102N32T + +Handle 0x0003, DMI type 3, 13 bytes +Chassis Information + Manufacturer: LENOVO + Type: Notebook + Lock: Not Present + Version: Not Available + Serial Number: Not Available + Asset Tag: No Asset Information + Boot-up State: Unknown + Power Supply State: Unknown + Thermal State: Unknown + Security Status: Unknown + +Handle 0x0004, DMI type 126, 13 bytes +Inactive + +Handle 0x0005, DMI type 126, 13 bytes +Inactive + +Handle 0x0006, DMI type 4, 35 bytes +Processor Information + Socket Designation: None + Type: Central Processor + Family: Other + Manufacturer: GenuineIntel + ID: 7A 06 01 00 FF FB EB BF + Signature: Type 0, Family 6, Model 23, Stepping 10 + Flags: + FPU (Floating-point unit on-chip) + VME (Virtual mode extension) + DE (Debugging extension) + PSE (Page size extension) + TSC (Time stamp counter) + MSR (Model specific registers) + PAE (Physical address extension) + MCE (Machine check exception) + CX8 (CMPXCHG8 instruction supported) + APIC (On-chip APIC hardware supported) + SEP (Fast system call) + MTRR (Memory type range registers) + PGE (Page global enable) + MCA (Machine check architecture) + CMOV (Conditional move instruction supported) + PAT (Page attribute table) + PSE-36 (36-bit page size extension) + CLFSH (CLFLUSH instruction supported) + DS (Debug store) + ACPI (ACPI supported) + MMX (MMX technology supported) + FXSR (FXSAVE and FXSTOR instructions supported) + SSE (Streaming SIMD extensions) + SSE2 (Streaming SIMD extensions 2) + SS (Self-snoop) + HTT (Multi-threading) + TM (Thermal monitor supported) + PBE (Pending break enabled) + Version: Intel(R) Core(TM)2 Duo CPU P8700 @ 2.53GHz + Voltage: 1.3 V + External Clock: 266 MHz + Max Speed: 2530 MHz + Current Speed: 2530 MHz + Status: Populated, Enabled + Upgrade: None + L1 Cache Handle: 0x000A + L2 Cache Handle: 0x000C + L3 Cache Handle: Not Provided + Serial Number: Not Specified + Asset Tag: Not Specified + Part Number: Not Specified + +Handle 0x0007, DMI type 5, 20 bytes +Memory Controller Information + Error Detecting Method: None + Error Correcting Capabilities: + None + Supported Interleave: One-way Interleave + Current Interleave: One-way Interleave + Maximum Memory Module Size: 4096 MB + Maximum Total Memory Size: 8192 MB + Supported Speeds: + Other + Supported Memory Types: + DIMM + SDRAM + Memory Module Voltage: 2.9 V + Associated Memory Slots: 2 + 0x0008 + 0x0009 + Enabled Error Correcting Capabilities: + Unknown + +Handle 0x0008, DMI type 6, 12 bytes +Memory Module Information + Socket Designation: DIMM Slot 1 + Bank Connections: 0 1 + Current Speed: 42 ns + Type: DIMM SDRAM + Installed Size: 2048 MB (Double-bank Connection) + Enabled Size: 2048 MB (Double-bank Connection) + Error Status: OK + +Handle 0x0009, DMI type 6, 12 bytes +Memory Module Information + Socket Designation: DIMM Slot 2 + Bank Connections: 2 3 + Current Speed: 42 ns + Type: DIMM SDRAM + Installed Size: 2048 MB (Double-bank Connection) + Enabled Size: 2048 MB (Double-bank Connection) + Error Status: OK + +Handle 0x000A, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L1 Cache + Configuration: Enabled, Socketed, Level 1 + Operational Mode: Write Back + Location: Internal + Installed Size: 64 kB + Maximum Size: 64 kB + Supported SRAM Types: + Synchronous + Installed SRAM Type: Synchronous + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Instruction + Associativity: 8-way Set-associative + +Handle 0x000B, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L1 Cache + Configuration: Enabled, Socketed, Level 1 + Operational Mode: Write Back + Location: Internal + Installed Size: 64 kB + Maximum Size: 64 kB + Supported SRAM Types: + Synchronous + Installed SRAM Type: Synchronous + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Data + Associativity: 8-way Set-associative + +Handle 0x000C, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L2 Cache + Configuration: Enabled, Socketed, Level 2 + Operational Mode: Write Back + Location: Internal + Installed Size: 3072 kB + Maximum Size: 3072 kB + Supported SRAM Types: + Burst + Installed SRAM Type: Burst + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Unified + Associativity: 8-way Set-associative + +Handle 0x000D, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: External Monitor + External Connector Type: DB-15 female + Port Type: Video Port + +Handle 0x000E, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Microphone Jack + External Connector Type: Mini Jack (headphones) + Port Type: Audio Port + +Handle 0x000F, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Headphone Jack + External Connector Type: Mini Jack (headphones) + Port Type: Audio Port + +Handle 0x0010, DMI type 126, 9 bytes +Inactive + +Handle 0x0011, DMI type 126, 9 bytes +Inactive + +Handle 0x0012, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Modem + External Connector Type: RJ-11 + Port Type: Modem Port + +Handle 0x0013, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Ethernet + External Connector Type: RJ-45 + Port Type: Network Port + +Handle 0x0014, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 1 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0015, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 2 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0016, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 3 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0017, DMI type 126, 9 bytes +Inactive + +Handle 0x0018, DMI type 126, 9 bytes +Inactive + +Handle 0x0019, DMI type 126, 9 bytes +Inactive + +Handle 0x001A, DMI type 126, 9 bytes +Inactive + +Handle 0x001B, DMI type 126, 9 bytes +Inactive + +Handle 0x001C, DMI type 126, 9 bytes +Inactive + +Handle 0x001D, DMI type 126, 9 bytes +Inactive + +Handle 0x001E, DMI type 126, 9 bytes +Inactive + +Handle 0x001F, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: IEEE1394 + External Connector Type: IEEE 1394 + Port Type: Firewire (IEEE P1394) + +Handle 0x0020, DMI type 9, 13 bytes +System Slot Information + Designation: ExpressCard Slot 1 + Type: x1 PCI Express + Current Usage: Available + Length: Other + ID: 0 + Characteristics: + Hot-plug devices are supported + +Handle 0x0021, DMI type 9, 13 bytes +System Slot Information + Designation: CardBus Slot 1 + Type: 32-bit PC Card (PCMCIA) + Current Usage: Available + Length: Other + ID: Adapter 1, Socket 0 + Characteristics: + 5.0 V is provided + 3.3 V is provided + PC Card-16 is supported + Cardbus is supported + Zoom Video is supported + Modem ring resume is supported + PME signal is supported + Hot-plug devices are supported + +Handle 0x0022, DMI type 126, 13 bytes +Inactive + +Handle 0x0023, DMI type 126, 13 bytes +Inactive + +Handle 0x0024, DMI type 9, 13 bytes +System Slot Information + Designation: Media Card Slot 1 + Type: Other + Current Usage: Available + Length: Other + Characteristics: + Hot-plug devices are supported + +Handle 0x0025, DMI type 126, 13 bytes +Inactive + +Handle 0x0026, DMI type 126, 13 bytes +Inactive + +Handle 0x0027, DMI type 10, 6 bytes +On Board Device Information + Type: Other + Status: Disabled + Description: IBM Embedded Security hardware + +Handle 0x0028, DMI type 11, 5 bytes +OEM Strings + String 1: IBM ThinkPad Embedded Controller -[7VHT16WW-1.06 ]- + +Handle 0x0029, DMI type 13, 22 bytes +BIOS Language Information + Language Description Format: Abbreviated + Installable Languages: 1 + enUS + Currently Installed Language: enUS + +Handle 0x002A, DMI type 15, 25 bytes +System Event Log + Area Length: 0 bytes + Header Start Offset: 0x0000 + Header Length: 16 bytes + Data Start Offset: 0x0010 + Access Method: General-purpose non-volatile data functions + Access Address: 0x0000 + Status: Valid, Not Full + Change Token: 0x00000036 + Header Format: Type 1 + Supported Log Type Descriptors: 1 + Descriptor 1: POST error + Data Format 1: POST results bitmap + +Handle 0x002B, DMI type 16, 15 bytes +Physical Memory Array + Location: System Board Or Motherboard + Use: System Memory + Error Correction Type: None + Maximum Capacity: 8 GB + Error Information Handle: Not Provided + Number Of Devices: 2 + +Handle 0x002C, DMI type 17, 27 bytes +Memory Device + Array Handle: 0x002B + Error Information Handle: No Error + Total Width: 64 bits + Data Width: 64 bits + Size: 2048 MB + Form Factor: SODIMM + Set: None + Locator: DIMM 1 + Bank Locator: Bank 0/1 + Type: DDR3 + Type Detail: Synchronous + Speed: 1066 MHz + Manufacturer: 80CE + Serial Number: 62A2F4AA + Asset Tag: 1007 + Part Number: M471B5673FH0-CF8 + +Handle 0x002D, DMI type 17, 27 bytes +Memory Device + Array Handle: 0x002B + Error Information Handle: No Error + Total Width: 64 bits + Data Width: 64 bits + Size: 2048 MB + Form Factor: SODIMM + Set: None + Locator: DIMM 2 + Bank Locator: Bank 2/3 + Type: DDR3 + Type Detail: Synchronous + Speed: 1066 MHz + Manufacturer: 80CE + Serial Number: 674E4052 + Asset Tag: 1007 + Part Number: M471B5673FH0-CF8 + +Handle 0x002E, DMI type 18, 23 bytes +32-bit Memory Error Information + Type: OK + Granularity: Unknown + Operation: Unknown + Vendor Syndrome: Unknown + Memory Array Address: Unknown + Device Address: Unknown + Resolution: Unknown + +Handle 0x002F, DMI type 19, 15 bytes +Memory Array Mapped Address + Starting Address: 0x00000000000 + Ending Address: 0x000FFFFFFFF + Range Size: 4 GB + Physical Array Handle: 0x002B + Partition Width: 2 + +Handle 0x0030, DMI type 20, 19 bytes +Memory Device Mapped Address + Starting Address: 0x00000000000 + Ending Address: 0x0007FFFFFFF + Range Size: 2 GB + Physical Device Handle: 0x002C + Memory Array Mapped Address Handle: 0x002F + Partition Row Position: 1 + +Handle 0x0031, DMI type 20, 19 bytes +Memory Device Mapped Address + Starting Address: 0x00080000000 + Ending Address: 0x000FFFFFFFF + Range Size: 2 GB + Physical Device Handle: 0x002D + Memory Array Mapped Address Handle: 0x002F + Partition Row Position: 1 + +Handle 0x0032, DMI type 21, 7 bytes +Built-in Pointing Device + Type: Track Point + Interface: PS/2 + Buttons: 3 + +Handle 0x0033, DMI type 126, 7 bytes +Inactive + +Handle 0x0034, DMI type 126, 26 bytes +Inactive + +Handle 0x0035, DMI type 126, 26 bytes +Inactive + +Handle 0x0036, DMI type 24, 5 bytes +Hardware Security + Power-On Password Status: Disabled + Keyboard Password Status: Disabled + Administrator Password Status: Disabled + Front Panel Reset Status: Unknown + +Handle 0x0037, DMI type 32, 11 bytes +System Boot Information + Status: No errors detected + +Handle 0x0038, DMI type 131, 17 bytes +OEM-specific Type + Header and Data: + 83 11 38 00 01 02 03 FF FF 1F 00 00 00 00 00 02 + 00 + Strings: + BOOTINF 20h + BOOTDEV 21h + KEYPTRS 23h + +Handle 0x0039, DMI type 131, 22 bytes +OEM-specific Type + Header and Data: + 83 16 39 00 01 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 01 + Strings: + TVT-Enablement + +Handle 0x003A, DMI type 132, 7 bytes +OEM-specific Type + Header and Data: + 84 07 3A 00 02 D8 36 + +Handle 0x003B, DMI type 126, 5 bytes +Inactive + +Handle 0x003C, DMI type 134, 13 bytes +OEM-specific Type + Header and Data: + 86 0D 3C 00 12 03 10 20 00 00 00 00 00 + +Handle 0x003D, DMI type 134, 16 bytes +OEM-specific Type + Header and Data: + 86 10 3D 00 00 49 4E 54 43 01 01 00 00 02 01 02 + Strings: + TPM INFO + System Reserved + +Handle 0x003E, DMI type 135, 13 bytes +OEM-specific Type + Header and Data: + 87 0D 3E 00 54 50 07 00 01 00 00 00 00 + +Handle 0x003F, DMI type 135, 18 bytes +OEM-specific Type + Header and Data: + 87 12 3F 00 54 50 07 01 01 B8 0F 00 00 00 02 00 + 00 00 + +Handle 0x0040, DMI type 135, 35 bytes +OEM-specific Type + Header and Data: + 87 23 40 00 54 50 07 02 42 41 59 20 49 2F 4F 20 + 01 00 02 00 00 0B 00 18 18 0E 18 02 00 0B 00 10 + 18 0A 18 + +Handle 0x0041, DMI type 135, 34 bytes +OEM-specific Type + Header and Data: + 87 22 41 00 54 50 07 04 01 06 01 01 02 00 02 01 + 02 00 03 01 02 00 04 01 02 00 05 01 02 00 06 01 + 02 00 + +Handle 0x0042, DMI type 135, 10 bytes +OEM-specific Type + Header and Data: + 87 0A 42 00 54 50 07 03 01 0A + +Handle 0x0043, DMI type 136, 6 bytes +OEM-specific Type + Header and Data: + 88 06 43 00 5A 5A + +Handle 0x0044, DMI type 126, 28 bytes +Inactive + +Handle 0x0045, DMI type 138, 40 bytes +OEM-specific Type + Header and Data: + 8A 28 45 00 14 01 02 01 40 02 01 40 02 01 40 02 + 01 40 01 40 42 49 4F 53 20 50 61 73 73 77 6F 72 + 64 20 46 6F 72 6D 61 74 + +Handle 0x0046, DMI type 139, 37 bytes +OEM-specific Type + Header and Data: + 8B 25 46 00 11 01 0A 00 00 00 00 00 00 00 00 00 + 00 50 57 4D 53 20 4B 65 79 20 49 6E 66 6F 72 6D + 61 74 69 6F 6E + +Handle 0x0047, DMI type 140, 67 bytes +OEM-specific Type + Header and Data: + 8C 43 47 00 4C 45 4E 4F 56 4F 0B 00 01 F6 9A B9 + C7 4F F5 79 58 D0 EB 27 97 73 A3 8D B7 01 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 + +Handle 0x0048, DMI type 140, 47 bytes +OEM-specific Type + Header and Data: + 8C 2F 48 00 4C 45 4E 4F 56 4F 0B 01 01 08 00 24 + 57 62 D4 30 E5 43 D7 A6 83 9E 6C 7E 7A 70 43 00 + 00 00 00 10 00 10 00 10 01 D0 00 20 01 00 01 + +Handle 0x0049, DMI type 140, 63 bytes +OEM-specific Type + Header and Data: + 8C 3F 49 00 4C 45 4E 4F 56 4F 0B 02 01 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +Handle 0x004A, DMI type 140, 17 bytes +OEM-specific Type + Header and Data: + 8C 11 4A 00 4C 45 4E 4F 56 4F 0B 03 01 00 00 00 + 00 + +Handle 0x004B, DMI type 140, 19 bytes +OEM-specific Type + Header and Data: + 8C 13 4B 00 4C 45 4E 4F 56 4F 0B 04 01 B2 00 53 + 4D 20 00 + +Handle 0x004C, DMI type 129, 8 bytes +OEM-specific Type + Header and Data: + 81 08 4C 00 01 01 02 00 + Strings: + Intel_ASF + Intel_ASF_001 + +Handle 0x004D, DMI type 130, 20 bytes +OEM-specific Type + Header and Data: + 82 14 4D 00 24 41 4D 54 01 00 00 00 00 A5 00 00 + 00 00 00 00 + +Handle 0x004E, DMI type 131, 64 bytes +OEM-specific Type + Header and Data: + 83 40 4E 00 14 00 00 00 00 00 40 2A 00 00 00 00 + F8 00 19 29 00 00 00 00 21 00 00 00 02 00 04 00 + FC 03 00 00 01 00 01 15 C8 00 BF 10 00 00 00 00 + 00 00 00 00 07 00 00 00 76 50 72 6F 00 00 00 00 + +Handle 0x004F, DMI type 127, 4 bytes +End Of Table + diff --git a/docs/future/dumps/t500log/ectool.log b/docs/future/dumps/t500log/ectool.log new file mode 100644 index 00000000..6b67bb66 --- /dev/null +++ b/docs/future/dumps/t500log/ectool.log @@ -0,0 +1,19 @@ +EC RAM: + +00: a6 05 a0 40 fe 96 00 00 1f 02 47 00 00 00 80 00 +10: 00 00 ff ff f4 3c 87 09 5b ff 83 00 ff ff 2d 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 +30: 07 00 02 00 30 04 00 00 00 00 00 10 00 50 00 00 +40: 00 00 00 00 00 00 14 00 42 01 00 00 00 00 00 00 +50: 00 c0 02 19 df 07 05 03 0c 05 08 04 04 d0 07 8c +60: 0a b8 0b 7a 0d 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 12 30 80 24 23 26 80 80 80 80 80 +80: 00 00 00 06 b4 07 03 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 27 28 27 80 80 80 80 80 11 41 00 0e 00 00 00 00 +d0: 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 10 60 52 07 24 6e 55 03 +f0: 37 56 48 54 31 36 57 57 13 72 68 ee 13 72 4e 50 + diff --git a/docs/future/dumps/t500log/flashrom_info.log b/docs/future/dumps/t500log/flashrom_info.log new file mode 100644 index 00000000..35d9e914 --- /dev/null +++ b/docs/future/dumps/t500log/flashrom_info.log @@ -0,0 +1,118 @@ +flashrom v0.9.8-r1889 on Linux 3.13.0-39-lowlatency (i686) +flashrom is free software, get the source code at http://www.flashrom.org + +flashrom was built with libpci 3.2.1, GCC 4.8.2, little endian +Command line (5 args): flashrom -V -p internal:laptop=force_I_want_a_brick -c MX25L3205D/MX25L3208D +Calibrating delay loop... OS timer resolution is 2 usecs, 789M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1002 us, 10000 myus = 10008 us, 8 myus = 10 us, OK. +Initializing internal programmer +No coreboot table found. +Using Internal DMI decoder. +DMI string chassis-type: "Notebook" +Laptop detected via DMI. +DMI string system-manufacturer: "LENOVO" +DMI string system-product-name: "224397G" +DMI string system-version: "ThinkPad T500" +DMI string baseboard-manufacturer: "LENOVO" +DMI string baseboard-product-name: "224397G" +DMI string baseboard-version: "Not Available" +======================================================================== +WARNING! You seem to be running flashrom on an unsupported laptop. +Laptops, notebooks and netbooks are difficult to support and we +recommend to use the vendor flashing utility. The embedded controller +(EC) in these machines often interacts badly with flashing. +See the manpage and http://www.flashrom.org/Laptops for details. + +If flash is shared with the EC, erase is guaranteed to brick your laptop +and write may brick your laptop. +Read and probe may irritate your EC and cause fan failure, backlight +failure and sudden poweroff. +You have been warned. +======================================================================== +Proceeding anyway because user forced us to. +Found chipset "Intel ICH9M" with PCI ID 8086:2919. +Enabling flash write... Root Complex Register Block address = 0xfed1c000 +GCS = 0x380461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI) +Top Swap: not enabled +0xfff80000/0xffb80000 FWH IDSEL: 0x0 +0xfff00000/0xffb00000 FWH IDSEL: 0x0 +0xffe80000/0xffa80000 FWH IDSEL: 0x0 +0xffe00000/0xffa00000 FWH IDSEL: 0x0 +0xffd80000/0xff980000 FWH IDSEL: 0x0 +0xffd00000/0xff900000 FWH IDSEL: 0x0 +0xffc80000/0xff880000 FWH IDSEL: 0x0 +0xffc00000/0xff800000 FWH IDSEL: 0x0 +0xff700000/0xff300000 FWH IDSEL: 0x4 +0xff600000/0xff200000 FWH IDSEL: 0x5 +0xff500000/0xff100000 FWH IDSEL: 0x6 +0xff400000/0xff000000 FWH IDSEL: 0x7 +0xfff80000/0xffb80000 FWH decode enabled +0xfff00000/0xffb00000 FWH decode enabled +0xffe80000/0xffa80000 FWH decode enabled +0xffe00000/0xffa00000 FWH decode enabled +0xffd80000/0xff980000 FWH decode enabled +0xffd00000/0xff900000 FWH decode enabled +0xffc80000/0xff880000 FWH decode enabled +0xffc00000/0xff800000 FWH decode enabled +0xff700000/0xff300000 FWH decode disabled +0xff600000/0xff200000 FWH decode disabled +0xff500000/0xff100000 FWH decode disabled +0xff400000/0xff000000 FWH decode disabled +Maximum FWH chip size: 0x400000 bytes +SPI Read Configuration: prefetching disabled, caching enabled, +BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled +SPIBAR = 0xb7727000 + 0x3800 +0x04: 0xe008 (HSFS) +HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 +Warning: SPI Configuration Lockdown activated. +Reading OPCODES... done +0x06: 0x3f04 (HSFC) +HSFC: FGO=0, FCYCLE=2, FDBC=63, SME=0 +0x50: 0x00001a1b (FRAP) +BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b +0x54: 0x00000000 FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. +0x58: 0x03ff0200 FREG1: BIOS region (0x00200000-0x003fffff) is read-write. +0x5C: 0x01f50001 FREG2: Warning: Management Engine region (0x00001000-0x001f5fff) is locked. +0x60: 0x01f701f6 FREG3: Gigabit Ethernet region (0x001f6000-0x001f7fff) is read-write. +0x64: 0x01ff01f8 FREG4: Platform Data region (0x001f8000-0x001fffff) is read-write. +Not all flash regions are freely accessible by flashrom. This is most likely +due to an active ME. Please see http://flashrom.org/ME for details. +0x74: 0x9fff03e0 PR0: Warning: 0x003e0000-0x01ffffff is read-only. +0x84: 0x81ff81f8 PR4: Warning: 0x001f8000-0x001fffff is locked. +Writes have been disabled for safety reasons. You can enforce write +support with the ich_spi_force programmer option, but you will most likely +harm your hardware! If you force flashrom you will get no support if +something breaks. On a few mainboards it is possible to enable write +access by setting a jumper (see its documentation or the board itself). +0x90: 0x04 (SSFS) +SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 +0x91: 0x004240 (SSFC) +SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=2, SME=0, SCF=0 +0x94: 0x5006 (PREOP) +0x96: 0x143b (OPTYPE) +0x98: 0x05200302 (OPMENU) +0x9C: 0x0601209f (OPMENU+4) +0xA0: 0x00000000 (BBAR) +0xC4: 0x00002005 (LVSCC) +LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xC8: 0x00002005 (UVSCC) +UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20 +0xD0: 0x00000000 (FPB) +OK. +The following protocols are supported: FWH, SPI. +Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016 +Found Macronix flash chip "MX25L3205D/MX25L3208D" (4096 kB, SPI) mapped at physical address 0xffc00000. +Chip status register is 0x00. +Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set +Chip status register: Bit 6 is not set +Chip status register: Block Protect 3 (BP3) is not set +Chip status register: Block Protect 2 (BP2) is not set +Chip status register: Block Protect 1 (BP1) is not set +Chip status register: Block Protect 0 (BP0) is not set +Chip status register: Write Enable Latch (WEL) is not set +Chip status register: Write In Progress (WIP/BUSY) is not set +This chip may contain one-time programmable memory. flashrom cannot read +and may never be able to write it, hence it may not be able to completely +clone the contents of this chip (see man page for details). +No operations were specified. +Restoring MMIO space at 0xb772a8a0 +Restoring PCI config space for 00:1f:0 reg 0xdc diff --git a/docs/future/dumps/t500log/flashrom_read.log b/docs/future/dumps/t500log/flashrom_read.log new file mode 100644 index 00000000..b3e3d6a2 --- /dev/null +++ b/docs/future/dumps/t500log/flashrom_read.log @@ -0,0 +1,123 @@ +flashrom v0.9.8-r1889 on Linux 3.13.0-39-lowlatency (i686) +flashrom is free software, get the source code at http://www.flashrom.org + +flashrom was built with libpci 3.2.1, GCC 4.8.2, little endian +Command line (7 args): flashrom -V -p internal:laptop=force_I_want_a_brick -r rom.bin -c MX25L3205D/MX25L3208D +Calibrating delay loop... OS timer resolution is 1 usecs, 790M loops per second, 10 myus = 26 us, 100 myus = 100 us, 1000 myus = 1003 us, 10000 myus = 10018 us, 4 myus = 5 us, OK. +Initializing internal programmer +No coreboot table found. +Using Internal DMI decoder. +DMI string chassis-type: "Notebook" +Laptop detected via DMI. +DMI string system-manufacturer: "LENOVO" +DMI string system-product-name: "224397G" +DMI string system-version: "ThinkPad T500" +DMI string baseboard-manufacturer: "LENOVO" +DMI string baseboard-product-name: "224397G" +DMI string baseboard-version: "Not Available" +======================================================================== +WARNING! You seem to be running flashrom on an unsupported laptop. +Laptops, notebooks and netbooks are difficult to support and we +recommend to use the vendor flashing utility. The embedded controller +(EC) in these machines often interacts badly with flashing. +See the manpage and http://www.flashrom.org/Laptops for details. + +If flash is shared with the EC, erase is guaranteed to brick your laptop +and write may brick your laptop. +Read and probe may irritate your EC and cause fan failure, backlight +failure and sudden poweroff. +You have been warned. +======================================================================== +Proceeding anyway because user forced us to. +Found chipset "Intel ICH9M" with PCI ID 8086:2919. +Enabling flash write... Root Complex Register Block address = 0xfed1c000 +GCS = 0x380461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI) +Top Swap: not enabled +0xfff80000/0xffb80000 FWH IDSEL: 0x0 +0xfff00000/0xffb00000 FWH IDSEL: 0x0 +0xffe80000/0xffa80000 FWH IDSEL: 0x0 +0xffe00000/0xffa00000 FWH IDSEL: 0x0 +0xffd80000/0xff980000 FWH IDSEL: 0x0 +0xffd00000/0xff900000 FWH IDSEL: 0x0 +0xffc80000/0xff880000 FWH IDSEL: 0x0 +0xffc00000/0xff800000 FWH IDSEL: 0x0 +0xff700000/0xff300000 FWH IDSEL: 0x4 +0xff600000/0xff200000 FWH IDSEL: 0x5 +0xff500000/0xff100000 FWH IDSEL: 0x6 +0xff400000/0xff000000 FWH IDSEL: 0x7 +0xfff80000/0xffb80000 FWH decode enabled +0xfff00000/0xffb00000 FWH decode enabled +0xffe80000/0xffa80000 FWH decode enabled +0xffe00000/0xffa00000 FWH decode enabled +0xffd80000/0xff980000 FWH decode enabled +0xffd00000/0xff900000 FWH decode enabled +0xffc80000/0xff880000 FWH decode enabled +0xffc00000/0xff800000 FWH decode enabled +0xff700000/0xff300000 FWH decode disabled +0xff600000/0xff200000 FWH decode disabled +0xff500000/0xff100000 FWH decode disabled +0xff400000/0xff000000 FWH decode disabled +Maximum FWH chip size: 0x400000 bytes +SPI Read Configuration: prefetching disabled, caching enabled, +BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled +SPIBAR = 0xb7714000 + 0x3800 +0x04: 0xe008 (HSFS) +HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 +Warning: SPI Configuration Lockdown activated. +Reading OPCODES... done +0x06: 0x3f04 (HSFC) +HSFC: FGO=0, FCYCLE=2, FDBC=63, SME=0 +0x50: 0x00001a1b (FRAP) +BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b +0x54: 0x00000000 FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. +0x58: 0x03ff0200 FREG1: BIOS region (0x00200000-0x003fffff) is read-write. +0x5C: 0x01f50001 FREG2: Warning: Management Engine region (0x00001000-0x001f5fff) is locked. +0x60: 0x01f701f6 FREG3: Gigabit Ethernet region (0x001f6000-0x001f7fff) is read-write. +0x64: 0x01ff01f8 FREG4: Platform Data region (0x001f8000-0x001fffff) is read-write. +Not all flash regions are freely accessible by flashrom. This is most likely +due to an active ME. Please see http://flashrom.org/ME for details. +0x74: 0x9fff03e0 PR0: Warning: 0x003e0000-0x01ffffff is read-only. +0x84: 0x81ff81f8 PR4: Warning: 0x001f8000-0x001fffff is locked. +Writes have been disabled for safety reasons. You can enforce write +support with the ich_spi_force programmer option, but you will most likely +harm your hardware! If you force flashrom you will get no support if +something breaks. On a few mainboards it is possible to enable write +access by setting a jumper (see its documentation or the board itself). +0x90: 0x04 (SSFS) +SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 +0x91: 0x004130 (SSFC) +SSFC: SCGO=0, ACS=0, SPOP=0, COP=3, DBC=1, SME=0, SCF=0 +0x94: 0x5006 (PREOP) +0x96: 0x143b (OPTYPE) +0x98: 0x05200302 (OPMENU) +0x9C: 0x0601209f (OPMENU+4) +0xA0: 0x00000000 (BBAR) +0xC4: 0x00002005 (LVSCC) +LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xC8: 0x00002005 (UVSCC) +UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20 +0xD0: 0x00000000 (FPB) +OK. +The following protocols are supported: FWH, SPI. +Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016 +Found Macronix flash chip "MX25L3205D/MX25L3208D" (4096 kB, SPI) mapped at physical address 0xffc00000. +Chip status register is 0x00. +Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set +Chip status register: Bit 6 is not set +Chip status register: Block Protect 3 (BP3) is not set +Chip status register: Block Protect 2 (BP2) is not set +Chip status register: Block Protect 1 (BP1) is not set +Chip status register: Block Protect 0 (BP0) is not set +Chip status register: Write Enable Latch (WEL) is not set +Chip status register: Write In Progress (WIP/BUSY) is not set +This chip may contain one-time programmable memory. flashrom cannot read +and may never be able to write it, hence it may not be able to completely +clone the contents of this chip (see man page for details). +Reading flash... Transaction error! +SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 +SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 +Running OPCODE 0x03 failed at address 0x001000 (payload length was 64). +Read operation failed! +FAILED. +Restoring MMIO space at 0xb77178a0 +Restoring PCI config space for 00:1f:0 reg 0xdc diff --git a/docs/future/dumps/t500log/flashrom_write.log b/docs/future/dumps/t500log/flashrom_write.log new file mode 100644 index 00000000..d966ecb4 --- /dev/null +++ b/docs/future/dumps/t500log/flashrom_write.log @@ -0,0 +1,119 @@ +flashrom v0.9.8-r1889 on Linux 3.13.0-39-lowlatency (i686) +flashrom is free software, get the source code at http://www.flashrom.org + +flashrom was built with libpci 3.2.1, GCC 4.8.2, little endian +Command line (7 args): flashrom -V -p internal:laptop=force_I_want_a_brick -w ../t500recipe.rom -c MX25L3205D/MX25L3208D +Calibrating delay loop... OS timer resolution is 1 usecs, 789M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1013 us, 10000 myus = 10017 us, 4 myus = 6 us, OK. +Initializing internal programmer +No coreboot table found. +Using Internal DMI decoder. +DMI string chassis-type: "Notebook" +Laptop detected via DMI. +DMI string system-manufacturer: "LENOVO" +DMI string system-product-name: "224397G" +DMI string system-version: "ThinkPad T500" +DMI string baseboard-manufacturer: "LENOVO" +DMI string baseboard-product-name: "224397G" +DMI string baseboard-version: "Not Available" +======================================================================== +WARNING! You seem to be running flashrom on an unsupported laptop. +Laptops, notebooks and netbooks are difficult to support and we +recommend to use the vendor flashing utility. The embedded controller +(EC) in these machines often interacts badly with flashing. +See the manpage and http://www.flashrom.org/Laptops for details. + +If flash is shared with the EC, erase is guaranteed to brick your laptop +and write may brick your laptop. +Read and probe may irritate your EC and cause fan failure, backlight +failure and sudden poweroff. +You have been warned. +======================================================================== +Proceeding anyway because user forced us to. +Found chipset "Intel ICH9M" with PCI ID 8086:2919. +Enabling flash write... Root Complex Register Block address = 0xfed1c000 +GCS = 0x380461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI) +Top Swap: not enabled +0xfff80000/0xffb80000 FWH IDSEL: 0x0 +0xfff00000/0xffb00000 FWH IDSEL: 0x0 +0xffe80000/0xffa80000 FWH IDSEL: 0x0 +0xffe00000/0xffa00000 FWH IDSEL: 0x0 +0xffd80000/0xff980000 FWH IDSEL: 0x0 +0xffd00000/0xff900000 FWH IDSEL: 0x0 +0xffc80000/0xff880000 FWH IDSEL: 0x0 +0xffc00000/0xff800000 FWH IDSEL: 0x0 +0xff700000/0xff300000 FWH IDSEL: 0x4 +0xff600000/0xff200000 FWH IDSEL: 0x5 +0xff500000/0xff100000 FWH IDSEL: 0x6 +0xff400000/0xff000000 FWH IDSEL: 0x7 +0xfff80000/0xffb80000 FWH decode enabled +0xfff00000/0xffb00000 FWH decode enabled +0xffe80000/0xffa80000 FWH decode enabled +0xffe00000/0xffa00000 FWH decode enabled +0xffd80000/0xff980000 FWH decode enabled +0xffd00000/0xff900000 FWH decode enabled +0xffc80000/0xff880000 FWH decode enabled +0xffc00000/0xff800000 FWH decode enabled +0xff700000/0xff300000 FWH decode disabled +0xff600000/0xff200000 FWH decode disabled +0xff500000/0xff100000 FWH decode disabled +0xff400000/0xff000000 FWH decode disabled +Maximum FWH chip size: 0x400000 bytes +SPI Read Configuration: prefetching disabled, caching enabled, +BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled +SPIBAR = 0xb76e8000 + 0x3800 +0x04: 0xe008 (HSFS) +HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 +Warning: SPI Configuration Lockdown activated. +Reading OPCODES... done +0x06: 0x3f04 (HSFC) +HSFC: FGO=0, FCYCLE=2, FDBC=63, SME=0 +0x50: 0x00001a1b (FRAP) +BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b +0x54: 0x00000000 FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. +0x58: 0x03ff0200 FREG1: BIOS region (0x00200000-0x003fffff) is read-write. +0x5C: 0x01f50001 FREG2: Warning: Management Engine region (0x00001000-0x001f5fff) is locked. +0x60: 0x01f701f6 FREG3: Gigabit Ethernet region (0x001f6000-0x001f7fff) is read-write. +0x64: 0x01ff01f8 FREG4: Platform Data region (0x001f8000-0x001fffff) is read-write. +Not all flash regions are freely accessible by flashrom. This is most likely +due to an active ME. Please see http://flashrom.org/ME for details. +0x74: 0x9fff03e0 PR0: Warning: 0x003e0000-0x01ffffff is read-only. +0x84: 0x81ff81f8 PR4: Warning: 0x001f8000-0x001fffff is locked. +Writes have been disabled for safety reasons. You can enforce write +support with the ich_spi_force programmer option, but you will most likely +harm your hardware! If you force flashrom you will get no support if +something breaks. On a few mainboards it is possible to enable write +access by setting a jumper (see its documentation or the board itself). +0x90: 0x04 (SSFS) +SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 +0x91: 0x000000 (SSFC) +SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0 +0x94: 0x5006 (PREOP) +0x96: 0x143b (OPTYPE) +0x98: 0x05200302 (OPMENU) +0x9C: 0x0601209f (OPMENU+4) +0xA0: 0x00000000 (BBAR) +0xC4: 0x00002005 (LVSCC) +LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xC8: 0x00002005 (UVSCC) +UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20 +0xD0: 0x00000000 (FPB) +OK. +The following protocols are supported: FWH, SPI. +Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016 +Found Macronix flash chip "MX25L3205D/MX25L3208D" (4096 kB, SPI) mapped at physical address 0xffc00000. +Chip status register is 0x00. +Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set +Chip status register: Bit 6 is not set +Chip status register: Block Protect 3 (BP3) is not set +Chip status register: Block Protect 2 (BP2) is not set +Chip status register: Block Protect 1 (BP1) is not set +Chip status register: Block Protect 0 (BP0) is not set +Chip status register: Write Enable Latch (WEL) is not set +Chip status register: Write In Progress (WIP/BUSY) is not set +This chip may contain one-time programmable memory. flashrom cannot read +and may never be able to write it, hence it may not be able to completely +clone the contents of this chip (see man page for details). +Write/erase is not working yet on your programmer in its current configuration. +Aborting. +Restoring MMIO space at 0xb76eb8a0 +Restoring PCI config space for 00:1f:0 reg 0xdc diff --git a/docs/future/dumps/t500log/inteltool.log b/docs/future/dumps/t500log/inteltool.log new file mode 100644 index 00000000..9529ab53 --- /dev/null +++ b/docs/future/dumps/t500log/inteltool.log @@ -0,0 +1,3373 @@ +CPU: ID 0x1067a, Processor Type 0x0, Family 0x6, Model 0x17, Stepping 0xa +Northbridge: 8086:2a40 (GL40/GS40/GM45/GS45/PM45) +Southbridge: 8086:2919 (ICH9M) + +============= GPIOS ============= + +GPIOBASE = 0x1180 (IO) + +gpiobase+0x0000: 0x197e23fe (GPIO_USE_SEL) +gpiobase+0x0004: 0xe0a26dfe (GP_IO_SEL) +gpiobase+0x0008: 0x00000000 (RESERVED) +gpiobase+0x000c: 0xe3feef3b (GP_LVL) +gpiobase+0x0010: 0x00000000 (RESERVED) +gpiobase+0x0014: 0x00000000 (RESERVED) +gpiobase+0x0018: 0x00000000 (GPO_BLINK) +gpiobase+0x001c: 0x00000000 (GP_SER_BLINK) +gpiobase+0x0020: 0x00080000 (GP_SB_CMDSTS) +gpiobase+0x0024: 0x00000000 (GP_SB_DATA) +gpiobase+0x0028: 0x00000000 (RESERVED) +gpiobase+0x002c: 0x00000102 (GPI_INV) +gpiobase+0x0030: 0x030306f6 (GPIO_USE_SEL2) +gpiobase+0x0034: 0x1f55f9f1 (GP_IO_SEL2) +gpiobase+0x0038: 0x1dfffba3 (GP_LVL2) +gpiobase+0x003c: 0x00000000 (RESERVED) + + + +============= RCBA ============== + +RCBA = 0xfed1c000 (MEM) + +0x0000: 0x10010002 +0x0004: 0x00000801 +0x0008: 0x00000001 +0x0010: 0x00000001 +0x0014: 0x80000001 +0x001c: 0x03128011 +0x0020: 0x81080080 +0x0030: 0x0000000f +0x0034: 0x000f0000 +0x003c: 0x000000f0 +0x0040: 0x0f000000 +0x0048: 0x0000f000 +0x0050: 0x0000000f +0x0054: 0x000f0000 +0x005c: 0x000000f0 +0x0060: 0x0f000000 +0x0068: 0x0000f000 +0x0088: 0x00109000 +0x0090: 0x00002000 +0x0094: 0x00002000 +0x0100: 0x1a010005 +0x0104: 0x00020802 +0x0110: 0x01010001 +0x0118: 0xfed18000 +0x0120: 0x01020003 +0x0128: 0x000e0000 +0x0130: 0x02020002 +0x0138: 0x000e1000 +0x0140: 0x03020002 +0x0148: 0x000e2000 +0x0150: 0x04020003 +0x0158: 0x000e3000 +0x0160: 0x0f020003 +0x0168: 0x000d8000 +0x0170: 0x05020003 +0x0178: 0x000e4000 +0x0180: 0x06020002 +0x0188: 0x000e5000 +0x01a0: 0x00010006 +0x01a4: 0x00012c41 +0x01a8: 0x00410003 +0x01f0: 0x00000001 +0x01f4: 0x86000040 +0x01fc: 0x0000060b +0x0200: 0x01102008 +0x0208: 0x04210044 +0x0210: 0x0000f710 +0x0220: 0x00000045 +0x0228: 0x04124aaa +0x0230: 0x00010000 +0x0234: 0x00000003 +0x0238: 0x00543210 +0x023c: 0x00000800 +0x0240: 0x000c0299 +0x0244: 0x001202b1 +0x0248: 0x002f04c7 +0x024c: 0x00bd0000 +0x0250: 0x00c30000 +0x0254: 0x008a0424 +0x0258: 0x008a0d8b +0x0260: 0x00cd0b03 +0x0268: 0x00030018 +0x0270: 0x00030000 +0x0274: 0x00040010 +0x0278: 0x001f00e2 +0x027c: 0x002300f2 +0x0280: 0x00c90000 +0x0284: 0x00cf0000 +0x0288: 0x00d306b6 +0x0f20: 0xb2b577cc +0x0f24: 0x000000c3 +0x0f28: 0x00180000 +0x0f2c: 0x001fffff +0x0f30: 0x0000ff8f +0x1d3c: 0x0000000b +0x1d48: 0x00030000 +0x1e10: 0x00020800 +0x1e80: 0x000c0801 +0x1e84: 0x000200f0 +0x2010: 0x00080401 +0x2014: 0x14000016 +0x2018: 0xbc4abcb5 +0x2020: 0x00c9605b +0x2024: 0x0b203040 +0x2028: 0x04c8ff00 +0x202c: 0x0f6c0f00 +0x2030: 0x00004454 +0x2034: 0xb2b577cc +0x2044: 0x000000c3 +0x204c: 0x001ff800 +0x2050: 0x00100fff +0x2054: 0x00000787 +0x2060: 0x81000000 +0x2080: 0x18206006 +0x2088: 0x00000260 +0x208c: 0x0006000c +0x2090: 0x31000000 +0x20a0: 0x18206006 +0x20a8: 0x00000260 +0x20ac: 0x0006000c +0x20b0: 0x07000000 +0x20c0: 0x18206006 +0x20c8: 0x00000260 +0x20cc: 0x0006000c +0x20d0: 0x0c000000 +0x20e0: 0x18206006 +0x20e8: 0x00000260 +0x20ec: 0x0006000c +0x20f0: 0x0a000000 +0x3100: 0x04341200 +0x3108: 0x40000321 +0x310c: 0x00014321 +0x3110: 0x00000002 +0x3114: 0x40000321 +0x3118: 0x00000001 +0x3140: 0x00003107 +0x3144: 0x76543210 +0x3148: 0x00000010 +0x314c: 0x00007654 +0x3150: 0x00000004 +0x31fc: 0x03000000 +0x3400: 0x0000001c +0x3404: 0x00000080 +0x3410: 0x00380461 +0x3418: 0x03260001 +0x341c: 0xbf4f001f +0x3430: 0x00000001 +0x3500: 0x0fff0fff +0x3504: 0x1b6db6db +0x3508: 0x0000001b +0x350c: 0x08000020 +0x3510: 0x09008fb8 +0x3528: 0x16003f80 +0x352c: 0x000bc008 +0x3530: 0x1800ff4f +0x3800: 0x03ff0200 +0x3804: 0x3f04e008 +0x3808: 0x0020efc0 +0x384c: 0xb2000000 +0x3850: 0x00001a1b +0x3858: 0x03ff0200 +0x385c: 0x01f50001 +0x3860: 0x01f701f6 +0x3864: 0x01ff01f8 +0x3874: 0x9fff03e0 +0x3884: 0x81ff81f8 +0x3890: 0x00400000 +0x3894: 0x143b5006 +0x3898: 0x05200302 +0x389c: 0x0601209f +0x38b0: 0x00000004 +0x38b4: 0x04040001 +0x38c0: 0x00000007 +0x38c4: 0x00002005 +0x38c8: 0x00002005 +0x3e00: 0xffffffff +0x3e04: 0xffffffff +0x3e08: 0xffffffff +0x3e0c: 0xffffffff +0x3e10: 0xffffffff +0x3e14: 0xffffffff +0x3e18: 0xffffffff +0x3e1c: 0xffffffff +0x3e20: 0xffffffff +0x3e24: 0xffffffff +0x3e28: 0xffffffff +0x3e2c: 0xffffffff +0x3e30: 0xffffffff +0x3e34: 0xffffffff +0x3e38: 0xffffffff +0x3e3c: 0xffffffff +0x3e40: 0xffffffff +0x3e44: 0xffffffff +0x3e48: 0xffffffff +0x3e4c: 0xffffffff +0x3e50: 0xffffffff +0x3e54: 0xffffffff +0x3e58: 0xffffffff +0x3e5c: 0xffffffff +0x3e60: 0xffffffff +0x3e64: 0xffffffff +0x3e68: 0xffffffff +0x3e6c: 0xffffffff +0x3e70: 0xffffffff +0x3e74: 0xffffffff +0x3e78: 0xffffffff +0x3e7c: 0xffffffff +0x3f00: 0x0000000b + + + +============= PMBASE ============ + +PMBASE = 0x1000 (IO) + +pmbase+0x0000: 0x0001 (PM1_STS) +pmbase+0x0002: 0x0120 (PM1_EN) +pmbase+0x0004: 0x00001c03 (PM1_CNT) +pmbase+0x0008: 0x0033172e (PM1_TMR) +pmbase+0x000c: 0x00000000 (RESERVED) +pmbase+0x0010: 0x00000080 (PROC_CNT) +pmbase+0x0019: 0x00 (RESERVED) +pmbase+0x001a: 0x0000 (RESERVED) +pmbase+0x001c: 0x20000000 (RESERVED) +pmbase+0x0020: 0x6c380000 (GPE0_STS) + 0x00000000 +pmbase+0x0028: 0x01020046 (GPE0_EN) + 0x00000000 +pmbase+0x0030: 0x00062033 (SMI_EN) +pmbase+0x0034: 0x00004900 (SMI_STS) +pmbase+0x0038: 0x0000 (ALT_GP_SMI_EN) +pmbase+0x003a: 0x6c3a (ALT_GP_SMI_STS) +pmbase+0x003c: 0x00 (UPRWC) +pmbase+0x003d: 0x0000 (RESERVED) +pmbase+0x003f: 0x00 (RESERVED) +pmbase+0x0040: 0x0000 (RESERVED) +pmbase+0x0042: 0x00 (GPE_CNTL) +pmbase+0x0043: 0x00 (RESERVED) +pmbase+0x0044: 0x12a0 (DEVACT_STS) +pmbase+0x0046: 0x0000 (RESERVED) +pmbase+0x0048: 0x00000000 (RESERVED) +pmbase+0x004c: 0x00000000 (RESERVED) +pmbase+0x0050: 0x00 (PM2_CNT (Mobile)) +pmbase+0x0051: 0x00 (RESERVED) +pmbase+0x0052: 0x0000 (RESERVED) +pmbase+0x0054: 0x0074541d (C3_RES (Mobile)) +pmbase+0x0058: 0x00000000 (C5_RES (Mobile)) +pmbase+0x005c: 0x00000000 (RESERVED) +pmbase+0x0060: 0x0004 (TCO_RLD) +pmbase+0x0062: 0x00 (TCO_DAT_IN) +pmbase+0x0063: 0x00 (TCO_DAT_OUT) +pmbase+0x0064: 0x0000 (TCO1_STS) +pmbase+0x0066: 0x0000 (TCO2_STS) +pmbase+0x0068: 0x0800 (TCO1_CNT) +pmbase+0x006a: 0x0008 (TCO2_CNT) +pmbase+0x006c: 0x0000 (TCO_MESSAGE) +pmbase+0x006e: 0x00 (TCO_WDCNT) +pmbase+0x006f: 0x00 (RESERVED) +pmbase+0x0070: 0x03 (SW_IRQ_GEN) +pmbase+0x0071: 0x00 (RESERVED) +pmbase+0x0072: 0x03ff (TCO_TMR) +pmbase+0x0074: 0x00000000 (RESERVED) +pmbase+0x0078: 0x00000000 (RESERVED) +pmbase+0x007c: 0x00000000 (RESERVED) + + + +============= MCHBAR ============ + +MCHBAR = 0xfed10000 (MEM) + +0x0034: 0x00000002 +0x0040: 0x00202200 +0x0044: 0xc6200032 +0x0048: 0x808002a8 +0x004c: 0x00100000 +0x0050: 0x00800001 +0x0054: 0x00800102 +0x0070: 0x12200009 +0x0074: 0x17000200 +0x0090: 0x00005054 +0x0094: 0x20210880 +0x00a4: 0x00d00000 +0x00b0: 0x00d00000 +0x00bc: 0x00d00000 +0x00d0: 0x00000002 +0x00f4: 0x01804000 +0x0200: 0x000f0002 +0x0204: 0x00000010 +0x0208: 0x00810060 +0x020c: 0x00180006 +0x0218: 0x86008400 +0x0220: 0x00210264 +0x0224: 0x00000300 +0x0228: 0x30000000 +0x0230: 0x34028000 +0x0234: 0x00000009 +0x0238: 0x04bdb600 +0x023c: 0x003db600 +0x0240: 0xa8000000 +0x0400: 0x000e0022 +0x0404: 0x00002202 +0x040c: 0x0f800100 +0x0410: 0x2186a000 +0x041c: 0x22222099 +0x0420: 0x0000002d +0x0424: 0x0000002d +0x0428: 0x00000050 +0x042c: 0x00000050 +0x04d0: 0x24a00012 +0x0518: 0x24250a0a +0x0530: 0x0a0a0005 +0x0680: 0x08100f0e +0x0684: 0x08080808 +0x0688: 0x09090808 +0x068c: 0x0d0c0b0a +0x0698: 0x100e0d0c +0x069c: 0x08081612 +0x06a0: 0x09090808 +0x06a4: 0x0b0b0a0a +0x06b0: 0x1d000055 +0x06b4: 0x0000001a +0x06c0: 0x03030303 +0x06c4: 0x04040404 +0x06c8: 0x03050505 +0x06cc: 0x03030303 +0x06d8: 0x03030303 +0x06dc: 0x04040403 +0x06e0: 0x05050504 +0x06e4: 0x03030505 +0x06f0: 0x25000066 +0x06f4: 0x00000022 +0x0700: 0x08080808 +0x0704: 0x09090909 +0x0708: 0x080a0a0a +0x070c: 0x08080808 +0x0718: 0x08080808 +0x071c: 0x09090909 +0x0720: 0x0a0a0a0a +0x0724: 0x08080a0a +0x0730: 0x25000066 +0x0734: 0x00000022 +0x073c: 0x80000000 +0x0740: 0x08080808 +0x0744: 0x09090909 +0x0748: 0x080a0a0a +0x074c: 0x08080808 +0x0758: 0x08080808 +0x075c: 0x09090909 +0x0760: 0x0a0a0a0a +0x0764: 0x08080a0a +0x0770: 0x25000066 +0x0774: 0x00000022 +0x077c: 0x80000000 +0x0780: 0x0a090909 +0x0784: 0x0c0b0b0a +0x0788: 0x060e0d0c +0x078c: 0x09080707 +0x0798: 0x0c0b0a0a +0x079c: 0x0c0c0c0c +0x07a0: 0x0e0d0d0c +0x07a4: 0x09090f0e +0x07b0: 0x25000066 +0x07b4: 0x00000022 +0x07c0: 0x0a090909 +0x07c4: 0x0c0b0b0a +0x07c8: 0x060e0d0c +0x07cc: 0x09080707 +0x07d8: 0x0c0b0a0a +0x07dc: 0x0c0c0c0c +0x07e0: 0x0e0d0d0c +0x07e4: 0x09090f0e +0x07f0: 0x25000066 +0x07f4: 0x00000022 +0x0840: 0x08100f0e +0x0844: 0x08080808 +0x0848: 0x09090808 +0x084c: 0x0d0c0b0a +0x0858: 0x100e0d0c +0x085c: 0x08081612 +0x0860: 0x09090808 +0x0864: 0x0b0b0a0a +0x0870: 0x1d000055 +0x0874: 0x0000001a +0x0880: 0x03030303 +0x0884: 0x04040404 +0x0888: 0x03050505 +0x088c: 0x03030303 +0x0898: 0x03030303 +0x089c: 0x04040403 +0x08a0: 0x05050504 +0x08a4: 0x03030505 +0x08b0: 0x25000066 +0x08b4: 0x00000022 +0x08c0: 0x00003735 +0x08c4: 0x00000807 +0x08c8: 0x00001f1f +0x0a00: 0x00200010 +0x0a04: 0x00200020 +0x0a08: 0x00008686 +0x0a28: 0xe0000000 +0x0a2c: 0x03300000 +0x0a34: 0x00200010 +0x0a38: 0x00200020 +0x0a3c: 0x00008686 +0x0a5c: 0x00000190 +0x0ac0: 0x0000010f +0x0ae4: 0x00001111 +0x0aec: 0x00000201 +0x0af0: 0xdf7e3d68 +0x0af4: 0x68cabaf6 +0x0af8: 0x32de4393 +0x0afc: 0xf5ec9fe1 +0x0b00: 0x01400182 +0x0b28: 0x0186a000 +0x0b2c: 0x15211521 +0x0b30: 0x0e0c0e0c +0x0b34: 0x0e0c1521 +0x0b38: 0x0e0c1501 +0x0b3c: 0x0c020807 +0x0b40: 0x04030201 +0x0b44: 0x08070605 +0x0b48: 0x110f0c09 +0x0b4c: 0x1a171513 +0x0b50: 0x2723201d +0x0b54: 0x312f2d2a +0x0b58: 0x3a383633 +0x0b5c: 0x3f3f3e3c +0x0b60: 0x04040302 +0x0b64: 0x08070605 +0x0b68: 0x120e0b09 +0x0b6c: 0x211d1815 +0x0b70: 0x2b292724 +0x0b74: 0x31302f2d +0x0b78: 0x39373533 +0x0b7c: 0x3f3d3b3a +0x0b84: 0x00084aa1 +0x0b88: 0x0045030e +0x0b8c: 0x00222222 +0x0b90: 0x00800080 +0x0b94: 0x162f252b +0x0b9c: 0x00000008 +0x0ba0: 0x00000008 +0x0ba4: 0x00000008 +0x0ba8: 0x00000008 +0x0bac: 0x162f162f +0x0bb0: 0x14000000 +0x0bbc: 0x0f000000 +0x0bc8: 0x00200000 +0x0bcc: 0x594b0000 +0x0bd0: 0x5a222200 +0x0bd4: 0x0024005a +0x0bd8: 0x0000000c +0x0be0: 0x1b6decf3 +0x0be4: 0x367b6db6 +0x0c00: 0x00644066 +0x0c04: 0x01010101 +0x0c08: 0x00008000 +0x0c14: 0x30950002 +0x0c34: 0x00008000 +0x0c38: 0x17771777 +0x0c48: 0x3f000000 +0x0c50: 0x01010101 +0x0c60: 0x80000000 +0x0c64: 0x00004080 +0x0e10: 0x003d0098 +0x0e14: 0x00000004 +0x0e50: 0x00f003c0 +0x0e54: 0x000f03c0 +0x0e58: 0x00ff03c0 +0x0e5c: 0x3c0f03c0 +0x0e60: 0x3c0003c0 +0x0e70: 0x000000b9 +0x0e74: 0x9c000000 +0x0e78: 0x0214a6d6 +0x0e7c: 0x00470a04 +0x0e80: 0xa0000510 +0x0e84: 0xb55f0931 +0x0e88: 0x8100077e +0x0e8c: 0x00002080 +0x0ea8: 0x00c80000 +0x0eac: 0x00002000 +0x0eb0: 0x00010000 +0x0ee8: 0x00a60000 +0x0f00: 0x00000900 +0x0f04: 0x00002e80 +0x0f08: 0x0000730f +0x0f0c: 0x000010a4 +0x0f10: 0x000000a2 +0x0f20: 0x20000000 +0x0f60: 0x01030419 +0x0f80: 0x80000000 +0x0fb0: 0x00000003 +0x0fb8: 0x00000003 +0x0fc0: 0x061f08fd +0x0ffc: 0x000007c0 +0x1000: 0x0093007f +0x1004: 0x00ff0000 +0x1008: 0x400000ff +0x100c: 0x00000040 +0x1010: 0x80000009 +0x101c: 0x00008098 +0x1040: 0x0001007f +0x1044: 0x00ff0000 +0x1048: 0x000000ff +0x1050: 0x80000000 +0x105c: 0x00008098 +0x1070: 0x00000001 +0x1080: 0x00000006 +0x1100: 0x00000300 +0x1110: 0x17cd17ac +0x1114: 0x179b178a +0x1118: 0x17891778 +0x111c: 0x17671756 +0x1120: 0x10111213 +0x1124: 0x14151617 +0x1128: 0x18191a1b +0x112c: 0x1c1d1e1f +0x1130: 0x00010203 +0x1134: 0x04050607 +0x1138: 0x08090a0b +0x113c: 0x0c0d0e0f +0x1190: 0x00000007 +0x119c: 0xa8000000 +0x11b8: 0x4000333c +0x11c0: 0x03030100 +0x11c4: 0x0a030a03 +0x11c8: 0x00000020 +0x11cc: 0x00000017 +0x1200: 0x00400020 +0x1204: 0x00400040 +0x1208: 0x00090033 +0x120c: 0x00000003 +0x1210: 0x48e18c61 +0x1214: 0x128088a5 +0x1218: 0x22283313 +0x121c: 0x32088304 +0x1220: 0x68ba6035 +0x1224: 0x83590a54 +0x1228: 0x066a6804 +0x122c: 0x00000002 +0x1230: 0x43000208 +0x1234: 0x910c1800 +0x1238: 0x0c001001 +0x1248: 0x20802025 +0x124c: 0x60a47687 +0x1250: 0x000006c4 +0x1254: 0x871a066d +0x1258: 0x40100401 +0x1260: 0x0000000b +0x1264: 0x00982022 +0x1268: 0x00000006 +0x1274: 0x80000000 +0x12a0: 0x0000000a +0x12a4: 0x00000020 +0x1300: 0x00400020 +0x1304: 0x00400040 +0x1308: 0x00090033 +0x130c: 0x00000003 +0x1310: 0x48e18c61 +0x1314: 0x128088a5 +0x1318: 0x22283313 +0x131c: 0x32088304 +0x1320: 0x68ba6035 +0x1324: 0x83590a54 +0x1328: 0x066a6804 +0x132c: 0x00000002 +0x1330: 0x43000208 +0x1334: 0x910c1800 +0x1338: 0x0c001001 +0x1348: 0x20802025 +0x134c: 0x60a47687 +0x1350: 0x000006c4 +0x1354: 0x871a066d +0x1358: 0x40100401 +0x1360: 0x0000000b +0x1364: 0x00982022 +0x1368: 0x00000006 +0x1374: 0x80000000 +0x13a0: 0x0000000a +0x13a4: 0x00000020 +0x1400: 0x00113300 +0x1408: 0xf3ff8000 +0x140c: 0x80010880 +0x1410: 0x6000200e +0x1414: 0x24049800 +0x1420: 0x2222aa22 +0x1428: 0x00555801 +0x142c: 0x05330407 +0x1430: 0x02000300 +0x1434: 0x80000243 +0x1440: 0x00000044 +0x1444: 0x02000000 +0x1450: 0x0000000a +0x1470: 0x8628230f +0x1474: 0x5228b409 +0x1478: 0x94244108 +0x147c: 0xa6255008 +0x1490: 0x00e70067 +0x1494: 0x000d8000 +0x14a0: 0x80130002 +0x14a4: 0x25930002 +0x14a8: 0x83810000 +0x14ac: 0x43110000 +0x14b0: 0x0e461000 +0x14b4: 0x0e401800 +0x14b8: 0x0e451000 +0x14bc: 0x0e351800 +0x14c0: 0x0e420000 +0x14c4: 0x0e450800 +0x14c8: 0x0e460000 +0x14cc: 0x8e510800 +0x14e0: 0x55500000 +0x14f0: 0x00000600 +0x1570: 0x00840008 +0x1574: 0x00840008 +0x1578: 0x00840008 +0x157c: 0x008b0008 +0x1590: 0x00e70067 +0x1594: 0x000d8000 +0x15a0: 0x82130002 +0x15a4: 0x02930002 +0x15a8: 0x62810000 +0x15ac: 0x33110000 +0x15b0: 0x8e421000 +0x15b4: 0x0e431800 +0x15b8: 0x0e441000 +0x15bc: 0x8e421800 +0x15c0: 0x0e320000 +0x15c4: 0x8e410800 +0x15c8: 0x8e450000 +0x15cc: 0x0e450800 +0x15e0: 0x55500000 +0x15f0: 0x00000600 +0x16cc: 0x000000ff +0x16d4: 0x00000400 + + + +============= EPBAR ============= + +EPBAR = 0xfed19000 (MEM) + +0x0000: 0x04010002 +0x0004: 0x00000401 +0x0008: 0x00000001 +0x0010: 0x00000001 +0x0014: 0x80000001 +0x001c: 0x100a8010 +0x0020: 0x81080080 +0x0028: 0x0a0a0a0a +0x002c: 0x0000001a +0x0038: 0x01380138 +0x003c: 0x01380138 +0x0040: 0x00010005 +0x0044: 0x00010201 +0x0050: 0x01010001 +0x0058: 0xfed18000 +0x0060: 0x02000002 +0x0068: 0x00008000 +0x0100: 0x55555555 +0x0104: 0x55555555 +0x0108: 0x55555555 +0x010c: 0x55555555 +0x0110: 0x55555555 +0x0114: 0x55555555 +0x0118: 0x55555555 +0x011c: 0x00005555 + + + +============= DMIBAR ============ + +DMIBAR = 0xfed18000 (MEM) + +0x0000: 0x04010002 +0x0004: 0x00000001 +0x0008: 0x00000001 +0x0010: 0x00000001 +0x0014: 0x80000001 +0x001c: 0x00008001 +0x0020: 0x81000080 +0x0028: 0x00000001 +0x002c: 0x86000040 +0x0040: 0x08010005 +0x0044: 0x01010202 +0x0050: 0x00020001 +0x0058: 0xfed1c000 +0x0060: 0x00010001 +0x0068: 0xfed19000 +0x0080: 0x00010006 +0x0084: 0x00012c41 +0x0088: 0x00410003 +0x00f0: 0x03010000 +0x00f4: 0x00000005 +0x00fc: 0x00000013 +0x01cc: 0x00060010 +0x01d4: 0x00002000 +0x0200: 0x08006f24 +0x0204: 0x0000b13f +0x0208: 0x00007cb0 +0x0210: 0x00000100 +0x0214: 0x0008000f +0x0218: 0x0ee1026b +0x021c: 0x026c026c +0x0224: 0x00030007 +0x0230: 0x1400000c +0x0234: 0xbc4abcb5 +0x0300: 0x002f04c1 +0x0304: 0x003104c9 +0x0308: 0x00060018 +0x030c: 0x00690423 +0x0310: 0x006a0424 +0x0314: 0x00060000 +0x0318: 0x00c50ae3 +0x031c: 0x00cd0b03 +0x0324: 0x00030018 +0x0328: 0x00030000 +0x0334: 0x00040010 +0x0338: 0x00060000 +0x0e00: 0x000001fe +0x0e08: 0x000000c0 +0x0e0c: 0x000000bd +0x0e10: 0x00000010 +0x0e18: 0x00000010 +0x0e1c: 0x00000001 +0x0e20: 0x00000010 +0x0e24: 0x0000000e +0x0e28: 0x3a588887 +0x0e2c: 0x88d07333 +0x0e30: 0x00009000 +0x0f00: 0x0000033c +0x0f04: 0x07050880 +0x0f08: 0x00100052 +0x0f10: 0x00010012 +0x0f14: 0x30400000 +0x0f20: 0x3c000757 +0x0f30: 0x0e3b0808 +0x0f34: 0x000a0000 +0x0f44: 0x07050880 +0x0f48: 0x00100052 +0x0f50: 0x00010012 +0x0f54: 0x30400000 +0x0f60: 0x3c000757 +0x0f64: 0x00000100 +0x0f70: 0x0e370808 +0x0f74: 0x00020000 +0x0f80: 0x0000033c +0x0f84: 0x07050880 +0x0f88: 0x00100052 +0x0f90: 0x00010012 +0x0f94: 0x30400000 +0x0fa0: 0x3c000757 +0x0fa4: 0x00000100 +0x0fb0: 0x0e340808 +0x0fb4: 0x000a0000 +0x0fc4: 0x07050880 +0x0fc8: 0x00100052 +0x0fd0: 0x00010012 +0x0fd4: 0x30000000 +0x0fe0: 0x3c000757 +0x0fe4: 0x00000100 +0x0ff0: 0x0e380408 +0x0ff4: 0x000a0000 + + +========= PCIEXBAR ======== + +PCIEXBAR: 0xe0000000 + +PCIe 00:00.0 extended config space: +0000: 86 80 40 2a 06 01 90 20 07 00 00 06 00 00 00 00 +0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0020: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e0 20 +0030: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +0040: 01 90 d1 fe 00 00 00 00 01 00 d1 fe 00 00 00 00 +0050: 00 00 50 03 59 00 00 00 00 00 00 00 00 00 00 00 +0060: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00 +0070: 01 00 40 c0 00 00 00 00 01 10 00 00 00 00 00 00 +0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0090: 10 11 11 01 30 11 11 00 40 00 4e 00 00 1a 3b 00 +00a0: 20 00 c0 13 00 00 00 00 00 00 00 00 00 00 00 00 +00b0: 00 c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00d0: 00 00 00 00 00 00 00 00 00 00 00 00 91 02 00 00 +00e0: 09 00 0a 11 88 64 00 1c 01 00 00 00 00 00 00 00 +00f0: 01 00 00 00 00 00 00 00 a0 0f 07 00 00 00 00 00 +0100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +01a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +01b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +01c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +01d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +01e0: 00 00 00 00 00 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00 00 00 00 00 00 00 00 00 00 +0ad0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0ae0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0af0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 +0b00: 86 80 29 29 07 04 b0 02 03 01 06 01 00 00 00 00 +0b10: 19 18 00 00 0d 18 00 00 11 18 00 00 09 18 00 00 +0b20: 01 1c 00 00 00 50 62 fc 00 00 00 00 aa 17 f8 20 +0b30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +0b40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 +0b50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0b60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0b70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 +0b80: 05 70 09 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +0b90: 60 0c 03 83 93 01 00 4c 00 00 00 00 0c 00 00 00 +0ba0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00 +0bb0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +0bc0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 +0bd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0be0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0bf0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 +0c00: 86 80 29 29 07 04 b0 02 03 01 06 01 00 00 00 00 +0c10: 19 18 00 00 0d 18 00 00 11 18 00 00 09 18 00 00 +0c20: 01 1c 00 00 00 50 62 fc 00 00 00 00 aa 17 f8 20 +0c30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +0c40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 +0c50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0c60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0c70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 +0c80: 05 70 09 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +0c90: 60 0c 03 83 93 01 00 4c 00 00 00 00 0c 00 00 00 +0ca0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00 +0cb0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +0cc0: 00 00 00 00 05 00 00 Error: Dumping AMBs on this MCH is not (yet) supported. +00 00 00 00 00 00 00 00 00 +0cd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0ce0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0cf0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 +0d00: 86 80 29 29 07 04 b0 02 03 01 06 01 00 00 00 00 +0d10: 19 18 00 00 0d 18 00 00 11 18 00 00 09 18 00 00 +0d20: 01 1c 00 00 00 50 62 fc 00 00 00 00 aa 17 f8 20 +0d30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +0d40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 +0d50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0d60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0d70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 +0d80: 05 70 09 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +0d90: 60 0c 03 83 93 01 00 4c 00 00 00 00 0c 00 00 00 +0da0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00 +0db0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +0dc0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 +0dd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0de0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0df0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 +0e00: 86 80 29 29 07 04 b0 02 03 01 06 01 00 00 00 00 +0e10: 19 18 00 00 0d 18 00 00 11 18 00 00 09 18 00 00 +0e20: 01 1c 00 00 00 50 62 fc 00 00 00 00 aa 17 f8 20 +0e30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +0e40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 +0e50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0e60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0e70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 +0e80: 05 70 09 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +0e90: 60 0c 03 83 93 01 00 4c 00 00 00 00 0c 00 00 00 +0ea0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00 +0eb0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +0ec0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 +0ed0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0ee0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0ef0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 +0f00: 86 80 29 29 07 04 b0 02 03 01 06 01 00 00 00 00 +0f10: 19 18 00 00 0d 18 00 00 11 18 00 00 09 18 00 00 +0f20: 01 1c 00 00 00 50 62 fc 00 00 00 00 aa 17 f8 20 +0f30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +0f40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 +0f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0f70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 +0f80: 05 70 09 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +0f90: 60 0c 03 83 93 01 00 4c 00 00 00 00 0c 00 00 00 +0fa0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00 +0fb0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +0fc0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 +0fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +0ff0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + + +Error: Dumping MSRs on this CPU (0x010670) is not (yet) supported. + + + +============= AMBs ============ + + +============= SPI / BIOS CNTL ============= + +Error: Dumping SPI on this southbridge is not (yet) supported. diff --git a/docs/future/dumps/t500log/lspci.log b/docs/future/dumps/t500log/lspci.log new file mode 100644 index 00000000..7b3d310a --- /dev/null +++ b/docs/future/dumps/t500log/lspci.log @@ -0,0 +1,2120 @@ +00:00.0 Host bridge [0600]: Intel Corporation Mobile 4 Series Chipset Memory Controller Hub [8086:2a40] (rev 07) + Subsystem: Lenovo Device [17aa:20e0] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0a <?> + Kernel driver in use: agpgart-intel +00: 86 80 40 2a 06 01 90 20 07 00 00 06 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e0 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 90 d1 fe 00 00 00 00 01 00 d1 fe 00 00 00 00 +50: 00 00 50 03 59 00 00 00 00 00 00 00 00 00 00 00 +60: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00 +70: 01 00 40 c0 00 00 00 00 01 10 00 00 00 00 00 00 +80: 00 00 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00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller [8086:2a42] (rev 07) (prog-if 00 [VGA controller]) + Subsystem: Lenovo Device [17aa:20e4] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 44 + Region 0: Memory at fc000000 (64-bit, non-prefetchable) [size=4M] + Region 2: Memory at d0000000 (64-bit, prefetchable) [size=256M] + Region 4: I/O ports at 1800 [size=8] + Expansion ROM at <unassigned> [disabled] + Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4142 + Capabilities: [d0] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: i915 +00: 86 80 42 2a 07 04 90 00 07 00 00 03 00 00 80 00 +10: 04 00 00 fc 00 00 00 00 0c 00 00 d0 00 00 00 00 +20: 01 18 00 00 00 00 00 00 00 00 00 00 aa 17 e4 20 +30: 00 00 00 00 90 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 48 00 00 00 09 00 0a 11 88 64 00 1c +50: 01 00 50 03 19 00 00 00 00 00 00 00 00 00 00 be +60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 05 d0 01 00 0c 30 e0 fe 42 41 00 00 00 00 00 00 +a0: 00 00 00 00 09 00 06 20 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 40 01 00 00 +d0: 01 00 23 00 00 00 00 00 00 00 00 00 34 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 80 00 1a 41 20 00 00 +f0: 0d 1c 34 07 ff 00 00 00 a0 0f 07 00 fa b0 b6 bd + +00:02.1 Display controller [0380]: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller [8086:2a43] (rev 07) + Subsystem: Lenovo Device [17aa:20e4] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Region 0: Memory at f4200000 (64-bit, non-prefetchable) [size=1M] + Capabilities: [d0] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- +00: 86 80 43 2a 07 00 90 00 07 00 80 03 00 00 80 00 +10: 04 00 20 f4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e4 20 +30: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 +40: 00 00 00 00 48 00 00 00 09 00 0a 11 88 64 00 1c +50: 01 00 50 03 19 00 00 00 00 00 00 00 00 00 00 be +60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 40 01 00 00 +d0: 01 00 23 00 00 00 00 00 00 00 00 00 34 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 0d 1c 34 07 ff 00 00 00 a0 0f 07 00 00 00 00 00 + +00:03.0 Communication controller [0780]: Intel Corporation Mobile 4 Series Chipset MEI Controller [8086:2a44] (rev 07) + Subsystem: Lenovo Device [17aa:20e6] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 47 + Region 0: Memory at fc625800 (64-bit, non-prefetchable) [size=16] + Capabilities: [50] Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4172 + Kernel driver in use: mei_me +00: 86 80 44 2a 06 04 10 00 07 00 80 07 00 00 80 00 +10: 04 58 62 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e6 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 4a 0a 0a 30 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 8c 03 c8 08 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 05 00 81 00 +90: 0c 30 e0 fe 00 00 00 00 72 41 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:19.0 Ethernet controller [0200]: Intel Corporation 82567LF Gigabit Network Connection [8086:10bf] (rev 03) + Subsystem: Lenovo Device [17aa:20ee] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 45 + Region 0: Memory at fc400000 (32-bit, non-prefetchable) [size=128K] + Region 1: Memory at fc424000 (32-bit, non-prefetchable) [size=4K] + Region 2: I/O ports at 1820 [size=32] + Capabilities: [c8] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- + Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4192 + Capabilities: [e0] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: e1000e +00: 86 80 bf 10 07 05 10 00 03 00 00 02 00 00 00 00 +10: 00 00 40 fc 00 40 42 fc 21 18 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 ee 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 22 c8 00 20 00 0d +d0: 05 e0 81 00 0c 30 e0 fe 00 00 00 00 92 41 00 00 +e0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1a.0 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #4 [8086:2937] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 20 + Region 4: I/O ports at 1840 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 37 29 05 00 90 02 03 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 41 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + +00:1a.1 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #5 [8086:2938] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 21 + Region 4: I/O ports at 1860 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 38 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + +00:1a.2 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #6 [8086:2939] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin C routed to IRQ 22 + Region 4: I/O ports at 1880 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 39 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 81 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + +00:1a.7 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #2 [8086:293c] (rev 03) (prog-if 20 [EHCI]) + Subsystem: Lenovo Device [17aa:20f1] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 23 + Region 0: Memory at fc625c00 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Capabilities: [98] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ehci-pci +00: 86 80 3c 29 06 01 90 02 03 20 03 0c 00 00 00 00 +10: 00 5c 62 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f1 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 +60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 00 00 c0 +70: 40 00 9f 0f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 88 85 40 00 86 0f 04 00 06 17 02 20 + +00:1b.0 Audio device [0403]: Intel Corporation 82801I (ICH9 Family) HD Audio Controller [8086:293e] (rev 03) + Subsystem: Lenovo Device [17aa:20f2] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Interrupt: pin B routed to IRQ 46 + Region 0: Memory at fc420000 (64-bit, non-prefetchable) [size=16K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4162 + Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed- WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [130 v1] Root Complex Link + Desc: PortNumber=0f ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: snd_hda_intel +00: 86 80 3e 29 06 05 10 00 03 00 03 04 10 00 00 00 +10: 04 00 42 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f2 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 01 00 00 07 00 00 00 00 00 00 00 00 00 80 00 00 +50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 +60: 05 70 81 00 0c 30 e0 fe 00 00 00 00 62 41 00 00 +70: 10 00 91 00 00 00 00 10 00 08 10 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 01 00 00 00 00 31 00 a3 02 00 00 00 00 +d0: 61 00 a3 02 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 +100: 02 00 01 13 01 00 00 00 00 00 00 00 00 00 00 00 +110: 00 00 00 00 ff 00 00 80 00 00 00 00 00 00 00 00 +120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +130: 05 00 01 00 00 01 02 0f 00 00 00 00 00 00 00 00 +140: 01 00 02 00 00 00 00 00 00 c0 d1 fe 00 00 00 00 +150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +200: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +210: 00 00 00 00 00 00 00 00 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00 00 00 00 00 00 00 00 00 + +00:1c.0 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 1 [8086:2940] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 + I/O behind bridge: 00008000-00008fff + Memory behind bridge: c0000000-c01fffff + Prefetchable memory behind bridge: 00000000c0200000-00000000c03fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #0, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41c1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=01 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 40 29 07 05 10 00 03 00 04 06 10 00 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00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.3 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 4 [8086:2946] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=05, subordinate=0c, sec-latency=0 + I/O behind bridge: 00002000-00002fff + Memory behind bridge: f8000000-f9ffffff + Prefetchable memory behind bridge: 00000000f4000000-00000000f40fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #3, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41d1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=04 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 46 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 05 0c 00 20 20 00 00 +20: 00 f8 f0 f9 01 f4 01 f4 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 04 04 00 +40: 10 80 41 01 00 80 00 00 00 00 10 00 11 4c 11 04 +50: 03 00 01 10 e0 a0 18 00 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00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.4 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 5 [8086:2948] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=0d, subordinate=14, sec-latency=0 + I/O behind bridge: 00003000-00003fff + Memory behind bridge: fa000000-fbffffff + Prefetchable memory behind bridge: 00000000f4100000-00000000f41fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #4, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41e1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: 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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ca0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +cb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +cc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +cd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ce0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +cf0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +da0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +db0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +dc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +dd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +de0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +df0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ea0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +eb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ec0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ed0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ee0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ef0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1d.0 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 [8086:2934] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 16 + Region 4: I/O ports at 18a0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 34 29 05 00 90 02 03 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: a1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + +00:1d.1 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 [8086:2935] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 17 + Region 4: I/O ports at 18c0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 35 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: c1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + +00:1d.2 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 [8086:2936] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin C routed to IRQ 18 + Region 4: I/O ports at 18e0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 36 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: e1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + +00:1d.7 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 [8086:293a] (rev 03) (prog-if 20 [EHCI]) + Subsystem: Lenovo Device [17aa:20f1] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 19 + Region 0: Memory at fc626000 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Capabilities: [98] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP+ + Kernel driver in use: ehci-pci +00: 86 80 3a 29 06 01 90 02 03 20 03 0c 00 00 00 00 +10: 00 60 62 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f1 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 +60: 20 20 9f 01 00 00 00 00 01 00 00 01 00 00 00 c0 +70: c0 00 1f 0f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 88 85 40 00 86 0f 04 00 06 17 02 20 + +00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev 93) (prog-if 01 [Subtractive decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Bus: primary=00, secondary=15, subordinate=18, sec-latency=32 + I/O behind bridge: 00004000-00007fff + Memory behind bridge: f4300000-f7ffffff + Prefetchable memory behind bridge: 00000000f0000000-00000000f3ffffff + Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [50] Subsystem: Lenovo Device [17aa:20f4] +00: 86 80 48 24 07 01 10 00 93 01 04 06 00 00 01 00 +10: 00 00 00 00 00 00 00 00 00 15 18 20 40 70 80 22 +20: 30 f4 f0 f7 01 f0 f1 f3 00 00 00 00 00 00 00 00 +30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 04 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 +50: 0d 00 00 00 aa 17 f4 20 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + +00:1f.0 ISA bridge [0601]: Intel Corporation ICH9M LPC Interface Controller [8086:2919] (rev 03) + Subsystem: Lenovo Device [17aa:20f6] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0c <?> + Kernel driver in use: lpc_ich +00: 86 80 19 29 07 00 10 02 03 00 01 06 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f6 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 10 00 00 80 00 00 00 81 11 00 00 10 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 8b 8b 8b 8b 90 00 00 00 8b 8b 8b 8b f8 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 10 02 0e 3f 01 16 7c 00 e1 15 0c 00 81 16 1c 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 24 0a 00 00 39 00 80 00 2b 1c 0a 00 00 03 00 40 +b0: 00 00 f0 00 00 00 00 00 08 00 02 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 67 45 00 00 00 ff 00 00 00 00 00 00 +e0: 09 00 0c 10 20 02 24 03 64 00 00 00 00 00 00 00 +f0: 01 c0 d1 fe 00 00 00 00 86 0f 04 00 00 00 00 00 + +00:1f.2 SATA controller [0106]: Intel Corporation 82801IBM/IEM (ICH9M/ICH9M-E) 4 port SATA Controller [AHCI mode] [8086:2929] (rev 03) (prog-if 01 [AHCI 1.0]) + Subsystem: Lenovo Device [17aa:20f8] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 43 + Region 0: I/O ports at 1818 [size=8] + Region 1: I/O ports at 180c [size=4] + Region 2: I/O ports at 1810 [size=8] + Region 3: I/O ports at 1808 [size=4] + Region 4: I/O ports at 1c00 [size=32] + Region 5: Memory at fc625000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit- + Address: fee0300c Data: 4122 + Capabilities: [70] Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004 + Capabilities: [b0] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ahci +00: 86 80 29 29 07 04 b0 02 03 01 06 01 00 00 00 00 +10: 19 18 00 00 0d 18 00 00 11 18 00 00 09 18 00 00 +20: 01 1c 00 00 00 50 62 fc 00 00 00 00 aa 17 f8 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 +80: 05 70 09 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +90: 60 0c 03 83 93 01 00 4c 00 00 00 00 0c 00 00 00 +a0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00 +b0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + +00:1f.3 SMBus [0c05]: Intel Corporation 82801I (ICH9 Family) SMBus Controller [8086:2930] (rev 03) + Subsystem: Lenovo Device [17aa:20f9] + Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 11 + Region 0: Memory at fc626400 (64-bit, non-prefetchable) [size=256] + Region 4: I/O ports at 1c20 [size=32] +00: 86 80 30 29 03 01 80 02 03 00 05 0c 00 00 00 00 +10: 04 64 62 fc 00 00 00 00 00 00 00 00 00 00 00 00 +20: 21 1c 00 00 00 00 00 00 00 00 00 00 aa 17 f9 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 02 04 04 00 f0 00 08 08 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 04 00 00 00 00 00 + +15:00.0 CardBus bridge [0607]: Ricoh Co Ltd RL5c476 II [1180:0476] (rev ba) + Subsystem: Lenovo ThinkPad R61 [17aa:20c6] + Physical Slot: 1 + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 168, Cache Line Size: 64 bytes + Interrupt: pin A routed to IRQ 16 + Region 0: Memory at f4300000 (32-bit, non-prefetchable) [size=4K] + Bus: primary=15, secondary=16, subordinate=17, sec-latency=176 + Memory window 0: f0000000-f3ffffff (prefetchable) + Memory window 1: c4000000-c7ffffff + I/O window 0: 00004000-000040ff + I/O window 1: 00004400-000044ff + BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset- 16bInt+ PostWrite+ + 16-bit legacy interface ports at 0001 + Capabilities: [dc] Power Management version 2 + Flags: PMEClk+ DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- + Bridge: PM- B3+ + Kernel driver in use: yenta_cardbus +00: 80 11 76 04 07 00 10 02 ba 00 07 06 10 a8 82 00 +10: 00 00 30 f4 dc 00 00 02 15 16 17 b0 00 00 00 f0 +20: 00 f0 ff f3 00 00 00 c4 00 f0 ff c7 00 40 00 00 +30: fc 40 00 00 00 44 00 00 fc 44 00 00 0b 01 80 05 +40: aa 17 c6 20 01 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 a0 04 00 03 00 00 63 04 63 04 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 09 00 00 f0 00 05 00 00 00 +b0: 00 00 00 00 00 00 00 62 00 30 00 00 00 00 00 00 +c0: aa 17 c6 20 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 0a fe +e0: 00 40 c0 24 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +15:00.1 FireWire (IEEE 1394) [0c00]: Ricoh Co Ltd R5C832 IEEE 1394 Controller [1180:0832] (rev 04) (prog-if 10 [OHCI]) + Subsystem: Lenovo ThinkPad R61 [17aa:20c7] + Physical Slot: 1 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 32 (500ns min, 1000ns max), Cache Line Size: 64 bytes + Interrupt: pin B routed to IRQ 17 + Region 0: Memory at f4301000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [dc] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME+ + Kernel driver in use: firewire_ohci +00: 80 11 32 08 06 01 10 02 04 10 00 0c 10 20 80 00 +10: 00 10 30 f4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 c7 20 +30: 00 00 00 00 dc 00 00 00 00 00 00 00 0b 02 02 04 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 80 16 00 00 00 00 00 20 00 00 66 66 32 12 +90: 48 60 66 10 00 00 02 00 50 80 00 00 01 01 18 00 +a0: 00 00 00 00 00 00 00 00 20 00 00 00 aa 17 c7 20 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 02 fe +e0: 00 c0 00 48 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +15:00.2 SD Host controller [0805]: Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter [1180:0822] (rev 21) + Subsystem: Lenovo ThinkPad W500 [17aa:20c8] + Physical Slot: 1 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 32, Cache Line Size: 64 bytes + Interrupt: pin C routed to IRQ 18 + Region 0: Memory at f4301800 (32-bit, non-prefetchable) [size=256] + Capabilities: [80] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- + Kernel driver in use: sdhci-pci +00: 80 11 22 08 06 01 10 02 21 00 05 08 10 20 80 00 +10: 00 18 30 f4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 c8 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 02 fe 00 40 00 48 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 c8 20 +b0: 04 00 02 00 00 00 00 00 00 00 00 00 a0 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: a1 21 e0 01 00 00 00 00 40 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 d0 00 20 02 00 00 00 00 + +15:00.4 System peripheral [0880]: Ricoh Co Ltd R5C592 Memory Stick Bus Host Adapter [1180:0592] (rev 11) + Subsystem: Lenovo ThinkPad T61 [17aa:20ca] + Physical Slot: 1 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 32, Cache Line Size: 64 bytes + Interrupt: pin C routed to IRQ 18 + Region 0: Memory at f4302000 (32-bit, non-prefetchable) [size=256] + Capabilities: [80] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- + Kernel driver in use: r592 +00: 80 11 92 05 06 01 10 02 11 00 80 08 10 20 80 00 +10: 00 20 30 f4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 ca 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 02 fe 00 40 00 48 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 ca 20 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 c0 00 20 02 00 00 00 00 + +15:00.5 System peripheral [0880]: Ricoh Co Ltd xD-Picture Card Controller [1180:0852] (rev 11) + Subsystem: Lenovo Device [17aa:20cb] + Physical Slot: 1 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 32, Cache Line Size: 64 bytes + Interrupt: pin C routed to IRQ 18 + Region 0: Memory at f4302400 (32-bit, non-prefetchable) [size=256] + Capabilities: [80] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- + Kernel driver in use: r852 +00: 80 11 52 08 06 01 10 02 11 00 80 08 10 20 80 00 +10: 00 24 30 f4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 cb 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 02 fe 00 40 00 48 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 cb 20 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 c0 00 20 02 00 00 00 00 + diff --git a/docs/future/dumps/t500log/lspnp.log b/docs/future/dumps/t500log/lspnp.log new file mode 100644 index 00000000..9c0cb27f --- /dev/null +++ b/docs/future/dumps/t500log/lspnp.log @@ -0,0 +1 @@ +bash: lspnp: command not found diff --git a/docs/future/dumps/t500log/lsusb.log b/docs/future/dumps/t500log/lsusb.log new file mode 100644 index 00000000..33a0c60e --- /dev/null +++ b/docs/future/dumps/t500log/lsusb.log @@ -0,0 +1,614 @@ + +Bus 002 Device 002: ID 0b95:1790 ASIX Electronics Corp. AX88179 Gigabit Ethernet +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.10 + bDeviceClass 255 Vendor Specific Class + bDeviceSubClass 255 Vendor Specific Subclass + bDeviceProtocol 0 + bMaxPacketSize0 64 + idVendor 0x0b95 ASIX Electronics Corp. + idProduct 0x1790 AX88179 Gigabit Ethernet + bcdDevice 1.00 + iManufacturer 1 ASIX Elec. + iProduct 2 AX88179 + iSerial 3 00803F5D087AE3 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 39 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xa0 + (Bus Powered) + Remote Wakeup + MaxPower 248mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 3 + bInterfaceClass 255 Vendor Specific Class + bInterfaceSubClass 255 Vendor Specific Subclass + bInterfaceProtocol 0 + iInterface 4 Network_Interface + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0008 1x 8 bytes + bInterval 11 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x82 EP 2 IN + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0200 1x 512 bytes + bInterval 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0200 1x 512 bytes + bInterval 0 +Binary Object Store Descriptor: + bLength 5 + bDescriptorType 15 + wTotalLength 22 + bNumDeviceCaps 2 + USB 2.0 Extension Device Capability: + bLength 7 + bDescriptorType 16 + bDevCapabilityType 2 + bmAttributes 0x00000002 + Link Power Management (LPM) Supported + SuperSpeed USB Device Capability: + bLength 10 + bDescriptorType 16 + bDevCapabilityType 3 + bmAttributes 0x00 + wSpeedsSupported 0x000e + Device can operate at Full Speed (12Mbps) + Device can operate at High Speed (480Mbps) + Device can operate at SuperSpeed (5Gbps) + bFunctionalitySupport 1 + Lowest fully-functional device speed is Full Speed (12Mbps) + bU1DevExitLat 1 micro seconds + bU2DevExitLat 101 micro seconds +Device Status: 0x0000 + (Bus Powered) + +Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0002 2.0 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency ehci_hcd + iProduct 2 EHCI Host Controller + iSerial 1 0000:00:1d.7 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0004 1x 4 bytes + bInterval 12 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 6 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 10 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x78 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0503 highspeed power enable connect + Port 3: 0000.0100 power + Port 4: 0000.0100 power + Port 5: 0000.0100 power + Port 6: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 008 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.2 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x06 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 007 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.1 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x06 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 006 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0002 2.0 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency ehci_hcd + iProduct 2 EHCI Host Controller + iSerial 1 0000:00:1a.7 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0004 1x 4 bytes + bInterval 12 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 6 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 10 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x58 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power + Port 3: 0000.0100 power + Port 4: 0000.0100 power + Port 5: 0000.0100 power + Port 6: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 005 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.2 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x04 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 004 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.1 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x06 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered diff --git a/docs/future/dumps/t500log/msrtool.log b/docs/future/dumps/t500log/msrtool.log new file mode 100644 index 00000000..03f12598 --- /dev/null +++ b/docs/future/dumps/t500log/msrtool.log @@ -0,0 +1,29 @@ +msrtool +Detected system linux: Linux with /dev/cpu/*/msr +Detected target intel_core2_later: Intel Xeon Processor 5200, 5400 series, Intel Core 2 Quad processors 8000, 9000 series + +syntax: msrtool [-hvqrkl] [-c cpu] [-m system] [-t target ...] + [-i addr=hi[:]lo] | [-s file] | [-d [:]file] | addr... + -h show this help text + -v be verbose + -q be quiet (overrides -v) + -r include [Reserved] values + -k list all known systems and targets + -l list MSRs and bit fields for current target(s) (-kl for ALL targets!) + -c access MSRs on the specified CPU, default=0 + -m force a system, e.g: -m linux + -t force a target, can be used multiple times, e.g: -t geodelx -t cs5536 + -i immediate mode + decode hex addr=hi:lo for the target without reading hw value + e.g: -i 4c00000f=f2f100ff56960004 + -s stream mode + read one MSR address per line and append current hw value to the line + use the filename - for stdin/stdout + using -l -s ignores input and will output all MSRs with values + -d diff mode + read one address and value per line and compare with current hw value, + printing differences to stdout. use the filename - to read from stdin + use :file or :- to reverse diff, normally hw values are considered new + addr.. direct mode, read and decode values for the given MSR address(es) + +No mode or address(es) specified! diff --git a/docs/future/dumps/t500log/nvramtool.log b/docs/future/dumps/t500log/nvramtool.log new file mode 100644 index 00000000..0120f4e0 --- /dev/null +++ b/docs/future/dumps/t500log/nvramtool.log @@ -0,0 +1,16 @@ +0000 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ................ +0010 | 00 00 f0 00 03 80 02 00 fc 01 00 00 00 3c 0e 00 | .............<.. +0020 | 00 02 00 00 00 00 01 00 00 bb bb 01 00 00 04 36 | ...............6 +0030 | 00 fc 20 8c 00 01 e0 f5 00 00 00 00 00 00 00 00 | .. ............. +0040 | 00 04 b0 bb 00 03 bb 54 2f 87 d0 70 80 00 00 00 | .......T/..p.... +0050 | 00 00 c0 05 52 f8 af 5d 04 5b 0f 02 00 00 00 44 | ....R..].[.....D +0060 | 00 00 00 00 d7 00 00 72 10 07 08 0a 0f 03 07 05 | .......r........ +0070 | 85 fe 00 c9 41 20 c0 10 fc 62 6d 0b 49 53 b2 00 | ....A ...bm.IS.. +0080 | 7a 06 00 bd 36 e0 00 45 00 04 b1 32 42 00 43 42 | z...6..E...2B.CB +0090 | 01 81 94 01 50 02 84 02 00 02 02 40 19 03 0a 3f | ....P......@...? +00a0 | 00 00 00 00 00 00 00 00 00 68 2d 40 39 00 00 22 | .........h-@9.." +00b0 | 00 00 00 00 88 00 00 3c 00 00 00 00 00 00 00 00 | .......<........ +00c0 | 11 0b bf 0d 00 c3 41 20 40 12 fc 00 3c 00 08 ff | ......A @...<... +00d0 | 00 a1 ff 3f ff 43 00 00 00 44 00 00 00 40 00 00 | ...?.C...D...@.. +00e0 | 00 40 00 00 00 40 00 00 00 40 0c 60 00 00 00 00 | .@...@...@.`.... +00f0 | 00 00 00 00 88 c6 fa 03 83 c2 fa 02 00 00 01 df | ................ diff --git a/docs/future/dumps/t500log/pin_hwC0D0 b/docs/future/dumps/t500log/pin_hwC0D0 new file mode 100644 index 00000000..61135600 --- /dev/null +++ b/docs/future/dumps/t500log/pin_hwC0D0 @@ -0,0 +1,8 @@ +0x16 0x022140f0 +0x17 0x61a190f0 +0x18 0x02a190f0 +0x19 0x40f000f0 +0x1a 0x901701f0 +0x1b 0x40f001f0 +0x1c 0x40f001f0 +0x1d 0x90a601f0 diff --git a/docs/future/dumps/t500log/superiotool.log b/docs/future/dumps/t500log/superiotool.log new file mode 100644 index 00000000..ed07a2ab --- /dev/null +++ b/docs/future/dumps/t500log/superiotool.log @@ -0,0 +1,170 @@ +superiotool r4.0-9564-g58649b0 +Probing for ALi Super I/O at 0x3f0... + Failed. Returned data: id=0xffff, rev=0xff +Probing for ALi Super I/O at 0x370... + Failed. Returned data: id=0xffff, rev=0xff +Probing for Fintek Super I/O at 0x2e... + Failed. Returned data: vid=0xffff, id=0xffff +Probing for Fintek Super I/O at 0x4e... + Failed. Returned data: vid=0xffff, id=0xffff +Probing for Fintek Super I/O at 0x2e... + Failed. Returned data: vid=0xffff, id=0xffff +Probing for Fintek Super I/O at 0x4e... + Failed. Returned data: vid=0xffff, id=0xffff +Probing for ITE Super I/O (init=standard) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8502e) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8761e) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8228e) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=0x87,0x87) at 0x20e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=standard) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8502e) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8761e) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8228e) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=0x87,0x87) at 0x25e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=standard) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8502e) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8761e) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8228e) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=standard) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8502e) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8761e) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=it8228e) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... + Failed. Returned data: id=0xffff, rev=0xf +Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... + Failed. Returned data: id=0xffff, rev=0xf +Probing for NSC Super I/O at 0x2e... + Failed. Returned data: port=0xff, port+1=0xff +Probing for NSC Super I/O at 0x4e... + Failed. Returned data: port=0xff, port+1=0xff +Probing for NSC Super I/O at 0x15c... + Failed. Returned data: port=0xff, port+1=0xff +Probing for NSC Super I/O at 0x164e... +Found NSC PC87382 (sid=0xf4, srid=0x04) at 0x164e +Register dump: +idx 20 21 22 26 27 29 +val f4 11 60 0e 04 b0 +def f4 11 63 00 00 00 +LDN 0x02 (IR) +idx 30 60 61 70 71 74 75 f0 +val 00 02 f8 03 03 04 04 82 +def 00 02 f8 03 03 04 04 02 +LDN 0x03 (COM1) +idx 30 60 61 70 71 74 75 f0 +val 00 03 f8 04 03 04 04 02 +def 00 03 f8 04 03 04 04 02 +LDN 0x07 (GPIO) +idx 30 60 61 70 71 74 75 f0 f1 f2 +val 01 16 80 00 03 04 04 21 04 00 +def 00 00 00 00 03 04 04 00 MM 01 +LDN 0x19 (Docking LPC switch) +idx 30 60 61 70 71 74 75 +val 01 16 4c 00 00 04 04 +def 00 00 00 00 00 04 04 +Probing for Nuvoton Super I/O at 0x164e... + Failed. Returned data: chip_id=0xf411 +Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e... + Failed. Returned data: sid=0xf4, id=0xf411, rev=0x00 +Probing for Nuvoton Super I/O at 0x2e... + Failed. Returned data: chip_id=0xffff +Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e... + Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 +Probing for Nuvoton Super I/O at 0x4e... + Failed. Returned data: chip_id=0xffff +Probing for Nuvoton Super I/O (sid=0xfc) at 0x4e... + Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... + Failed. Returned data: id=0xf4, rev=0x11 +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... + Failed. Returned data: id=0x00, rev=0x00 +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... + Failed. Returned data: id=0xff, rev=0xff +Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... + Failed. Returned data: id=0xff, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x2e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x2e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x4e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x4e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x3f0... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x3f0... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x370... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x370... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x88) at 0x250... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x89) at 0x250... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... + Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff +Probing for VIA Super I/O at 0x3f0... + PCI device 1106:0686 not found. +Probing for AMD EC Super I/O at 0xaa... +Probing for Server Engines Super I/O at 0x2e... + Failed. Returned data: id=0xffff, rev=0xff +Probing for Infineon Super I/O at 0x2e... + Failed. Returned data: id=0xff, rev=0xff +Probing for Infineon Super I/O at 0x4e... + Failed. Returned data: id=0xff, rev=0xff diff --git a/docs/future/dumps/x b/docs/future/dumps/x new file mode 100644 index 00000000..1ef5139c --- /dev/null +++ b/docs/future/dumps/x @@ -0,0 +1,1442 @@ + + +coreboot-4.0-6196-g1aa8cbd-7BETC7WW (2.08 ) Tue Jun 3 22:16:33 BST 2014 starting... + +Mobile Intel(R) 82945GM/GME Express Chipset +(G)MCH capable of up to FSB 800 MHz +(G)MCH capable of up to DDR2-667 +Setting up static southbridge registers... GPIOS... done. +Disabling Watchdog reboot... done. +Setting up static northbridge registers... done. +Waiting for MCHBAR to come up...ok +PM1_CNT: 00001c00 +SMBus controller enabled. +Setting up RAM controller. +This mainboard supports Dual Channel Operation. +DDR II Channel 0 Socket 0: x16DS +DDR II Channel 1 Socket 0: x8DDS +Memory will be driven at 667MHz with CAS=5 clocks +tRAS = 15 cycles +tRP = 5 cycles +tRCD = 5 cycles +Refresh: 7.8us +tWR = 5 cycles +DIMM 0 side 0 = 512 MB +DIMM 0 side 1 = 512 MB +DIMM 2 side 0 = 1024 MB +DIMM 2 side 1 = 1024 MB +tRFC = 43 cycles +Setting Graphics Frequency... +FSB: 667 MHz Voltage: 1.05V Render: 250Mhz Display: 200MHz +Setting Memory Frequency... CLKCFG=0x00010023, CLKCFG=0x00010043, ok +Setting mode of operation for memory channels...Dual Channel Assymetric. +Programming Clock Crossing...MEM=667 FSB=667... ok +Setting RAM size... +C0DRB = 0x20202010 +C1DRB = 0x60606040 +TOLUD = 0x00c0 +Setting row attributes... +C0DRA = 0x0033 +C1DRA = 0x0033 +DIMM0 has 8 banks. +DIMM2 has 8 banks. +one dimm per channel config.. +Initializing System Memory IO... +Programming Dual Channel RCOMP +Table Index: 3 +Programming DLL Timings... +Enabling System Memory IO... +jedec enable sequence: bank 0 +jedec enable sequence: bank 1 +bankaddr from bank size of rank 0 +jedec enable sequence: bank 4 +bankaddr from bank size of rank 1 +jedec enable sequence: bank 5 +bankaddr from bank size of rank 4 +receive_enable_autoconfig() for channel 0 + find_strobes_low() + set_receive_enable() medium=0x3, coarse=0x5 + set_receive_enable() medium=0x1, coarse=0x5 + find_strobes_edge() + set_receive_enable() medium=0x1, coarse=0x5 + set_receive_enable() medium=0x3, coarse=0x5 + set_receive_enable() medium=0x1, coarse=0x5 + add_quarter_clock() mediumcoarse=15 fine=f3 + set_receive_enable() medium=0x3, coarse=0x5 + find_preamble() + set_receive_enable() medium=0x3, coarse=0x4 + set_receive_enable() medium=0x3, coarse=0x3 + add_quarter_clock() mediumcoarse=0f fine=73 + normalize() + set_receive_enable() medium=0x0, coarse=0x4 +receive_enable_autoconfig() for channel 1 + find_strobes_low() + set_receive_enable() medium=0x3, coarse=0x5 + set_receive_enable() medium=0x1, coarse=0x5 + find_strobes_edge() + set_receive_enable() medium=0x1, coarse=0x5 + add_quarter_clock() mediumcoarse=15 fine=c5 + set_receive_enable() medium=0x3, coarse=0x5 + find_preamble() + set_receive_enable() medium=0x3, coarse=0x4 + set_receive_enable() medium=0x3, coarse=0x3 + add_quarter_clock() mediumcoarse=0f fine=45 + normalize() + set_receive_enable() medium=0x0, coarse=0x4 +RAM initialization finished. +Setting up Egress Port RCRB +Loading p + +*** Log truncated, 497 characters dropped. *** + +Adding CBMEM entry as no. 3 +Trying CBFS ramstage loader. +CBFS: loading stage fallback/ramstage @ 0x100000 (417848 bytes), entry @ 0x100000 +coreboot-4.0-6196-g1aa8cbd-7BETC7WW (2.08 ) Tue Jun 3 22:16:33 BST 2014 booting... +BS: Entering BS_PRE_DEVICE state. +BS: Exiting BS_PRE_DEVICE state. +BS: BS_PRE_DEVICE times (us): entry 0 run 2975 exit 0 +BS: Entering BS_DEV_INIT_CHIPS state. +BS: Exiting BS_DEV_INIT_CHIPS state. +BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3324 exit 0 +BS: Entering BS_DEV_ENUMERATE state. +Enumerating buses... +Show all devs...Before device enumeration. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.3: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PNP: 164e.2: enabled 1 +PNP: 164e.3: enabled 0 +PNP: 164e.7: enabled 1 +PNP: 164e.19: enabled 1 +PNP: 002e.0: enabled 0 +PNP: 002e.1: enabled 1 +PNP: 002e.2: enabled 0 +PNP: 002e.3: enabled 1 +PNP: 002e.7: enabled 1 +PNP: 002e.a: enabled 0 +PCI: 00:1f.1: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 00:69: enabled 1 +I2C: 00:54: enabled 1 +I2C: 00:55: enabled 1 +I2C: 00:56: enabled 1 +I2C: 00:57: enabled 1 +I2C: 00:5c: enabled 1 +I2C: 00:5d: enabled 1 +I2C: 00:5e: enabled 1 +I2C: 00:5f: enabled 1 +Compare with tree... +Root Device: enabled 1 + CPU_CLUSTER: 0: enabled 1 + APIC: 00: enabled 1 + DOMAIN: 0000: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:02.0: enabled 1 + PCI: 00:02.1: enabled 1 + PCI: 00:1b.0: enabled 1 + PCI: 00:1c.0: enabled 1 + PCI: 00:1c.1: enabled 1 + PCI: 00:1d.0: enabled 1 + PCI: 00:1d.1: enabled 1 + PCI: 00:1d.2: enabled 1 + PCI: 00:1d.3: enabled 1 + PCI: 00:1d.7: enabled 1 + PCI: 00:1f.0: enabled 1 + PNP: 00ff.1: enabled 1 + PNP: 00ff.2: enabled 1 + PNP: 164e.2: enabled 1 + PNP: 164e.3: enabled 0 + PNP: 164e.7: enabled 1 + PNP: 164e.19: enabled 1 + PNP: 002e.0: enabled 0 + PNP: 002e.1: enabled 1 + PNP: 002e.2: enabled 0 + PNP: 002e.3: enabled 1 + PNP: 002e.7: enabled 1 + PNP: 002e.a: enabled 0 + PCI: 00:1f.1: enabled 1 + PCI: 00:1f.2: enabled 1 + PCI: 00:1f.3: enabled 1 + I2C: 00:69: enabled 1 + I2C: 00:54: enabled 1 + I2C: 00:55: enabled 1 + I2C: 00:56: enabled 1 + I2C: 00:57: enabled 1 + I2C: 00:5c: enabled 1 + I2C: 00:5d: enabled 1 + I2C: 00:5e: enabled 1 + I2C: 00:5f: enabled 1 +scan_static_bus for Root Device +CPU_CLUSTER: 0 enabled +DOMAIN: 0000 enabled +DOMAIN: 0000 scanning... +PCI: pci_scan_bus for bus 00 +PCI: 00:00.0 [8086/27a0] ops +PCI: 00:00.0 [8086/27a0] enabled +PCI: 00:02.0 [8086/27a2] ops +PCI: 00:02.0 [8086/27a2] enabled +PCI: 00:02.1 [8086/27a6] ops +PCI: 00:02.1 [8086/27a6] enabled +PCI: 00:1b.0 [8086/27d8] ops +PCI: 00:1b.0 [8086/27d8] enabled +PCI: 00:1c.0 [8086/0000] bus ops +PCI: 00:1c.0 [8086/27d0] enabled +PCI: 00:1c.1 [8086/0000] bus ops +PCI: 00:1c.1 [8086/27d2] enabled +PCI: 00:1c.2 [8086/0000] bus ops +PCI: 00:1c.2 [8086/27d4] enabled +PCI: 00:1c.3 [8086/0000] bus ops +PCI: 00:1c.3 [8086/27d6] enabled +PCI: 00:1d.0 [8086/27c8] ops +PCI: 00:1d.0 [8086/27c8] enabled +PCI: 00:1d.1 [8086/27c9] ops +PCI: 00:1d.1 [8086/27c9] enabled +PCI: 00:1d.2 [8086/27ca] ops +PCI: 00:1d.2 [8086/27ca] enabled +PCI: 00:1d.3 [8086/27cb] ops +PCI: 00:1d.3 [8086/27cb] enabled +PCI: 00:1d.7 [8086/27cc] ops +PCI: 00:1d.7 [8086/27cc] enabled +PCI: 00:1e.0 [8086/2448] bus ops +PCI: 00:1e.0 [8086/2448] enabled +PCI: 00:1f.0 [8086/27b9] bus ops +PCI: 00:1f.0 [8086/27b9] enabled +PCI: 00:1f.1 [8086/27df] ops +PCI: 00:1f.1 [8086/27df] enabled +PCI: 00:1f.2 [8086/0000] ops +PCI: 00:1f.2 [8086/27c4] enabled +PCI: 00:1f.3 [8086/27da] bus ops +PCI: 00:1f.3 [8086/27da] enabled +do_pci_scan_bridge for PCI: 00:1c.0 +PCI: pci_scan_bus for bus 01 +PCI: 01:00.0 [8086/109a] enabled +PCI: pci_scan_bus returning with max=001 +do_pci_scan_bridge returns max 1 +do_pci_scan_bridge for PCI: 00:1c.1 +PCI: pci_scan_bus for bus 02 +PCI: 02:00.0 [168c/002b] enabled +PCI: pci_scan_bus returning with max=002 +do_pci_scan_bridge returns max 2 +do_pci_scan_bridge for PCI: 00:1c.2 +PCI: pci_scan_bus for bus 03 +PCI: pci_scan_bus returning with max=003 +do_pci_scan_bridge returns max 3 +do_pci_scan_bridge for PCI: 00:1c.3 +PCI: pci_scan_bus for bus 04 +PCI: pci_scan_bus returning with max=004 +do_pci_scan_bridge returns max 4 +do_pci_scan_bridge for PCI: 00:1e.0 +PCI: pci_scan_bus for bus 05 +PCI: 05:00.0 [1180/0476] bus ops +PCI: 05:00.0 [1180/0476] enabled +PCI: 05:00.1 [1180/0552] enabled +PCI: 05:00.2 [1180/0822] enabled +PCI: 05:00.3 [1180/0843] enabled +do_pci_scan_bridge for PCI: 05:00.0 +PCI: pci_scan_bus for bus 06 +PCI: pci_scan_bus returning with max=006 +do_pci_scan_bridge returns max 6 +PCI: pci_scan_bus returning with max=006 +do_pci_scan_bridge returns max 6 +scan_static_bus for PCI: 00:1f.0 +WARNING: No CMOS option 'touchpad'. +PNP: 00ff.1 enabled +recv_ec_data: 0x37 +recv_ec_data: 0x42 +recv_ec_data: 0x48 +recv_ec_data: 0x54 +recv_ec_data: 0x33 +recv_ec_data: 0x37 +recv_ec_data: 0x57 +recv_ec_data: 0x57 +recv_ec_data: 0x04 +recv_ec_data: 0x03 +recv_ec_data: 0x00 +recv_ec_data: 0x11 +EC Firmware ID 7BHT37WW-3.4, Version 0.01B +recv_ec_data: 0x00 +recv_ec_data: 0x10 +recv_ec_data: 0x20 +recv_ec_data: 0x30 +recv_ec_data: 0x00 +recv_ec_data: 0xa6 +recv_ec_data: 0x01 +recv_ec_data: 0x30 +PNP: 00ff.2 enabled +PNP: 164e.2 enabled +PNP: 164e.3 disabled +PNP: 164e.7 enabled +PNP: 164e.19 enabled +PNP: 002e.0 disabled +PNP: 002e.1 enabled +PNP: 002e.2 disabled +PNP: 002e.3 enabled +PNP: 002e.7 enabled +PNP: 002e.a disabled +scan_static_bus for PCI: 00:1f.0 done +scan_static_bus for PCI: 00:1f.3 +smbus: PCI: 00:1f.3[0]->I2C: 01:69 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled +scan_static_bus for PCI: 00:1f.3 done +PCI: pci_scan_bus returning with max=006 +scan_static_bus for Root Device done +done +BS: Exiting BS_DEV_ENUMERATE state. +BS: BS_DEV_ENUMERATE times (us): entry 0 run 529332 exit 0 +BS: Entering BS_DEV_RESOURCES state. +found VGA at PCI: 00:02.0 +Setting up VGA for PCI: 00:02.0 +Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 +Setting PCI_BRIDGE_CTL_VGA for bridge Root Device +Allocating resources... +Reading resources... +Root Device read_resources bus 0 link: 0 +CPU_CLUSTER: 0 read_resources bus 0 link: 0 +APIC: 00 missing read_resources +CPU_CLUSTER: 0 read_resources bus 0 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 +Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. +PCI: 00:1c.0 read_resources bus 1 link: 0 +PCI: 00:1c.0 read_resources bus 1 link: 0 done +PCI: 00:1c.1 read_resources bus 2 link: 0 +PCI: 00:1c.1 read_resources bus 2 link: 0 done +PCI: 00:1c.2 read_resources bus 3 link: 0 +PCI: 00:1c.2 read_resources bus 3 link: 0 done +PCI: 00:1c.3 read_resources bus 4 link: 0 +PCI: 00:1c.3 read_resources bus 4 link: 0 done +PCI: 00:1e.0 read_resources bus 5 link: 0 +PCI: 05:00.0 read_resources bus 6 link: 0 +PCI: 05:00.0 read_resources bus 6 link: 0 done +PCI: 00:1e.0 read_resources bus 5 link: 0 done +PCI: 00:1f.0 read_resources bus 0 link: 0 +PNP: 00ff.1 missing read_resources +PNP: 00ff.2 missing read_resources +PCI: 00:1f.0 read_resources bus 0 link: 0 done +PCI: 00:1f.3 read_resources bus 1 link: 0 +PCI: 00:1f.3 read_resources bus 1 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 done +Root Device read_resources bus 0 link: 0 done +Done reading resources. +Show resources in subtree (Root Device)...After reading. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 + PCI: 00:00.0 + PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf + PCI: 00:02.0 + PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10 + PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14 + PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18 + PCI: 00:02.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 1c + PCI: 00:02.1 + PCI: 00:02.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 + PCI: 00:1c.0 child on link 0 PCI: 01:00.0 + PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 01:00.0 + PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 + PCI: 01:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 + PCI: 00:1c.1 child on link 0 PCI: 02:00.0 + PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1c.3 + PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.3 + PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10 + PCI: 00:1e.0 child on link 0 PCI: 05:00.0 + PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 05:00.0 + PCI: 05:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 + PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffffffff flags 100 index 2c + PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffffffff flags 100 index 34 + PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 1200 index 1c + PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 05:00.1 + PCI: 05:00.1 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 10 + PCI: 05:00.2 + PCI: 05:00.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 05:00.3 + PCI: 05:00.3 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PNP: 164e.2 + PNP: 164e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 164e.3 + PNP: 164e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 164e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.7 + PNP: 164e.7 resource base 1680 size 10 align 4 gran 4 limit ffff flags c0000100 index 60 + PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.19 + PNP: 164e.19 resource base 164c size 2 align 1 gran 1 limit ffff flags c0000100 index 60 + PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 + PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 3bc size 400 align 10 gran 10 limit 7ff flags c0000100 index 60 + PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 002e.3 + PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.7 + PNP: 002e.7 resource base 1620 size 8 align 3 gran 3 limit ffff flags c0000100 index 60 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.a + PNP: 002e.a resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 60 + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PCI: 00:1f.1 + PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:1f.2 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:69 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + I2C: 01:69 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f +DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff +PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 01:00.0 18 * [0x0 - 0x1f] io +PCI: 00:1c.0 compute_resources_io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 05:00.0 2c * [0x0 - 0xfff] io +PCI: 05:00.0 34 * [0x1000 - 0x1fff] io +PCI: 00:1e.0 compute_resources_io: base: 2000 size: 2000 align: 12 gran: 12 limit: ffff done +PCI: 00:1e.0 1c * [0x0 - 0x1fff] io +PCI: 00:1c.0 1c * [0x2000 - 0x2fff] io +PCI: 00:1d.0 20 * [0x3000 - 0x301f] io +PCI: 00:1d.1 20 * [0x3020 - 0x303f] io +PCI: 00:1d.2 20 * [0x3040 - 0x305f] io +PCI: 00:1d.3 20 * [0x3060 - 0x307f] io +PCI: 00:1f.1 20 * [0x3080 - 0x308f] io +PCI: 00:1f.2 20 * [0x3090 - 0x309f] io +PCI: 00:02.0 14 * [0x30a0 - 0x30a7] io +PCI: 00:1f.1 10 * [0x30a8 - 0x30af] io +PCI: 00:1f.1 18 * [0x30b0 - 0x30b7] io +PCI: 00:1f.2 10 * [0x30b8 - 0x30bf] io +PCI: 00:1f.2 18 * [0x30c0 - 0x30c7] io +PCI: 00:1f.1 14 * [0x30c8 - 0x30cb] io +PCI: 00:1f.1 1c * [0x30cc - 0x30cf] io +PCI: 00:1f.2 14 * [0x30d0 - 0x30d3] io +PCI: 00:1f.2 1c * [0x30d4 - 0x30d7] io +DOMAIN: 0000 compute_resources_io: base: 30d8 size: 30d8 align: 12 gran: 0 limit: ffff done +DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:00.0 10 * [0x0 - 0x1ffff] mem +PCI: 00:1c.0 compute_resources_mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 02:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:1c.1 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 05:00.0 1c * [0x0 - 0x1ffffff] prefmem +PCI: 00:1e.0 compute_resources_prefmem: base: 2000000 size: 2000000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 05:00.0 24 * [0x0 - 0x1ffffff] mem +PCI: 05:00.0 10 * [0x2000000 - 0x2000fff] mem +PCI: 05:00.1 10 * [0x2001000 - 0x20017ff] mem +PCI: 05:00.2 10 * [0x2001800 - 0x20018ff] mem +PCI: 05:00.3 10 * [0x2001900 - 0x20019ff] mem +PCI: 00:1e.0 compute_resources_mem: base: 2001a00 size: 2100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem +PCI: 00:1e.0 20 * [0x10000000 - 0x120fffff] mem +PCI: 00:1e.0 24 * [0x12100000 - 0x140fffff] prefmem +PCI: 00:1c.0 20 * [0x14100000 - 0x141fffff] mem +PCI: 00:1c.1 20 * [0x14200000 - 0x142fffff] mem +PCI: 00:02.0 10 * [0x14300000 - 0x1437ffff] mem +PCI: 00:02.1 10 * [0x14380000 - 0x143fffff] mem +PCI: 00:02.0 1c * [0x14400000 - 0x1443ffff] mem +PCI: 00:1b.0 10 * [0x14440000 - 0x14443fff] mem +PCI: 00:1d.7 10 * [0x14444000 - 0x144443ff] mem +PCI: 00:1f.2 24 * [0x14444400 - 0x144447ff] mem +DOMAIN: 0000 compute_resources_mem: base: 14444800 size: 14444800 align: 28 gran: 0 limit: ffffffff done +avoid_fixed_resources: DOMAIN: 0000 +avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff +constrain_resources: DOMAIN: 0000 +constrain_resources: PCI: 00:00.0 +constrain_resources: PCI: 00:02.0 +constrain_resources: PCI: 00:02.1 +constrain_resources: PCI: 00:1b.0 +constrain_resources: PCI: 00:1c.0 +constrain_resources: PCI: 01:00.0 +constrain_resources: PCI: 00:1c.1 +constrain_resources: PCI: 02:00.0 +constrain_resources: PCI: 00:1c.2 +constrain_resources: PCI: 00:1c.3 +constrain_resources: PCI: 00:1d.0 +constrain_resources: PCI: 00:1d.1 +constrain_resources: PCI: 00:1d.2 +constrain_resources: PCI: 00:1d.3 +constrain_resources: PCI: 00:1d.7 +constrain_resources: PCI: 00:1e.0 +constrain_resources: PCI: 05:00.0 +constrain_resources: PCI: 05:00.1 +constrain_resources: PCI: 05:00.2 +constrain_resources: PCI: 05:00.3 +constrain_resources: PCI: 00:1f.0 +constrain_resources: PNP: 00ff.1 +constrain_resources: PNP: 00ff.2 +skipping PNP: 00ff.2@60 fixed resource, size=0! +skipping PNP: 00ff.2@62 fixed resource, size=0! +skipping PNP: 00ff.2@64 fixed resource, size=0! +skipping PNP: 00ff.2@66 fixed resource, size=0! +constrain_resources: PNP: 164e.2 +constrain_resources: PNP: 164e.7 +constrain_resources: PNP: 164e.19 +constrain_resources: PNP: 002e.1 +constrain_resources: PNP: 002e.3 +constrain_resources: PNP: 002e.7 +constrain_resources: PCI: 00:1f.1 +constrain_resources: PCI: 00:1f.2 +constrain_resources: PCI: 00:1f.3 +constrain_resources: I2C: 01:69 +constrain_resources: I2C: 01:54 +constrain_resources: I2C: 01:55 +constrain_resources: I2C: 01:56 +constrain_resources: I2C: 01:57 +constrain_resources: I2C: 01:5c +constrain_resources: I2C: 01:5d +constrain_resources: I2C: 01:5e +constrain_resources: I2C: 01:5f +avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff + lim->base 00001690 lim->limit 0000ffff +avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff + lim->base 00000000 lim->limit efffffff +Setting resources... +DOMAIN: 0000 allocate_resources_io: base:1690 size:30d8 align:12 gran:0 limit:ffff +Assigned: PCI: 00:1e.0 1c * [0x2000 - 0x3fff] io +Assigned: PCI: 00:1c.0 1c * [0x4000 - 0x4fff] io +Assigned: PCI: 00:1d.0 20 * [0x5000 - 0x501f] io +Assigned: PCI: 00:1d.1 20 * [0x5020 - 0x503f] io +Assigned: PCI: 00:1d.2 20 * [0x5040 - 0x505f] io +Assigned: PCI: 00:1d.3 20 * [0x5060 - 0x507f] io +Assigned: PCI: 00:1f.1 20 * [0x5080 - 0x508f] io +Assigned: PCI: 00:1f.2 20 * [0x5090 - 0x509f] io +Assigned: PCI: 00:02.0 14 * [0x50a0 - 0x50a7] io +Assigned: PCI: 00:1f.1 10 * [0x50a8 - 0x50af] io +Assigned: PCI: 00:1f.1 18 * [0x50b0 - 0x50b7] io +Assigned: PCI: 00:1f.2 10 * [0x50b8 - 0x50bf] io +Assigned: PCI: 00:1f.2 18 * [0x50c0 - 0x50c7] io +Assigned: PCI: 00:1f.1 14 * [0x50c8 - 0x50cb] io +Assigned: PCI: 00:1f.1 1c * [0x50cc - 0x50cf] io +Assigned: PCI: 00:1f.2 14 * [0x50d0 - 0x50d3] io +Assigned: PCI: 00:1f.2 1c * [0x50d4 - 0x50d7] io +DOMAIN: 0000 allocate_resources_io: next_base: 50d8 size: 30d8 align: 12 gran: 0 done +PCI: 00:1c.0 allocate_resources_io: base:4000 size:1000 align:12 gran:12 limit:ffff +Assigned: PCI: 01:00.0 18 * [0x4000 - 0x401f] io +PCI: 00:1c.0 allocate_resources_io: next_base: 4020 size: 1000 align: 12 gran: 12 done +PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.3 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.3 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1e.0 allocate_resources_io: base:2000 size:2000 align:12 gran:12 limit:ffff +Assigned: PCI: 05:00.0 2c * [0x2000 - 0x2fff] io +Assigned: PCI: 05:00.0 34 * [0x3000 - 0x3fff] io +PCI: 00:1e.0 allocate_resources_io: next_base: 4000 size: 2000 align: 12 gran: 12 done +DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:14444800 align:28 gran:0 limit:efffffff +Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem +Assigned: PCI: 00:1e.0 20 * [0xe0000000 - 0xe20fffff] mem +Assigned: PCI: 00:1e.0 24 * [0xe2100000 - 0xe40fffff] prefmem +Assigned: PCI: 00:1c.0 20 * [0xe4100000 - 0xe41fffff] mem +Assigned: PCI: 00:1c.1 20 * [0xe4200000 - 0xe42fffff] mem +Assigned: PCI: 00:02.0 10 * [0xe4300000 - 0xe437ffff] mem +Assigned: PCI: 00:02.1 10 * [0xe4380000 - 0xe43fffff] mem +Assigned: PCI: 00:02.0 1c * [0xe4400000 - 0xe443ffff] mem +Assigned: PCI: 00:1b.0 10 * [0xe4440000 - 0xe4443fff] mem +Assigned: PCI: 00:1d.7 10 * [0xe4444000 - 0xe44443ff] mem +Assigned: PCI: 00:1f.2 24 * [0xe4444400 - 0xe44447ff] mem +DOMAIN: 0000 allocate_resources_mem: next_base: e4444800 size: 14444800 align: 28 gran: 0 done +PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.0 allocate_resources_mem: base:e4100000 size:100000 align:20 gran:20 limit:efffffff +Assigned: PCI: 01:00.0 10 * [0xe4100000 - 0xe411ffff] mem +PCI: 00:1c.0 allocate_resources_mem: next_base: e4120000 size: 100000 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_mem: base:e4200000 size:100000 align:20 gran:20 limit:efffffff +Assigned: PCI: 02:00.0 10 * [0xe4200000 - 0xe420ffff] mem +PCI: 00:1c.1 allocate_resources_mem: next_base: e4210000 size: 100000 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.3 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.3 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.3 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.3 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1e.0 allocate_resources_prefmem: base:e2100000 size:2000000 align:20 gran:20 limit:efffffff +Assigned: PCI: 05:00.0 1c * [0xe2100000 - 0xe40fffff] prefmem +PCI: 00:1e.0 allocate_resources_prefmem: next_base: e4100000 size: 2000000 align: 20 gran: 20 done +PCI: 00:1e.0 allocate_resources_mem: base:e0000000 size:2100000 align:20 gran:20 limit:efffffff +Assigned: PCI: 05:00.0 24 * [0xe0000000 - 0xe1ffffff] mem +Assigned: PCI: 05:00.0 10 * [0xe2000000 - 0xe2000fff] mem +Assigned: PCI: 05:00.1 10 * [0xe2001000 - 0xe20017ff] mem +Assigned: PCI: 05:00.2 10 * [0xe2001800 - 0xe20018ff] mem +Assigned: PCI: 05:00.3 10 * [0xe2001900 - 0xe20019ff] mem +PCI: 00:1e.0 allocate_resources_mem: next_base: e2001a00 size: 2100000 align: 20 gran: 20 done +Root Device assign_resources, bus 0 link: 0 +pci_tolm: 0xd0000000 +Base of stolen memory: 0xbf800000 +Top of Low Used DRAM: 0xc0000000 +IGD decoded, subtracting 8M UMA +Available memory: 3137536K (3064M) +Adding PCIe config bar +DOMAIN: 0000 assign_resources, bus 0 link: 0 +PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig> +PCI: 00:02.0 10 <- [0x00e4300000 - 0x00e437ffff] size 0x00080000 gran 0x13 mem +PCI: 00:02.0 14 <- [0x00000050a0 - 0x00000050a7] size 0x00000008 gran 0x03 io +PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem +PCI: 00:02.0 1c <- [0x00e4400000 - 0x00e443ffff] size 0x00040000 gran 0x12 mem +PCI: 00:02.1 10 <- [0x00e4380000 - 0x00e43fffff] size 0x00080000 gran 0x13 mem +PCI: 00:1b.0 10 <- [0x00e4440000 - 0x00e4443fff] size 0x00004000 gran 0x0e mem64 +PCI: 00:1c.0 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus 01 io +PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem +PCI: 00:1c.0 20 <- [0x00e4100000 - 0x00e41fffff] size 0x00100000 gran 0x14 bus 01 mem +PCI: 00:1c.0 assign_resources, bus 1 link: 0 +PCI: 01:00.0 10 <- [0x00e4100000 - 0x00e411ffff] size 0x00020000 gran 0x11 mem +PCI: 01:00.0 18 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io +PCI: 00:1c.0 assign_resources, bus 1 link: 0 +PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io +PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem +PCI: 00:1c.1 20 <- [0x00e4200000 - 0x00e42fffff] size 0x00100000 gran 0x14 bus 02 mem +PCI: 00:1c.1 assign_resources, bus 2 link: 0 +PCI: 02:00.0 10 <- [0x00e4200000 - 0x00e420ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:1c.1 assign_resources, bus 2 link: 0 +PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io +PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem +PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem +PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io +PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 prefmem +PCI: 00:1c.3 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 mem +PCI: 00:1d.0 20 <- [0x0000005000 - 0x000000501f] size 0x00000020 gran 0x05 io +PCI: 00:1d.1 20 <- [0x0000005020 - 0x000000503f] size 0x00000020 gran 0x05 io +PCI: 00:1d.2 20 <- [0x0000005040 - 0x000000505f] size 0x00000020 gran 0x05 io +PCI: 00:1d.3 20 <- [0x0000005060 - 0x000000507f] size 0x00000020 gran 0x05 io +PCI: 00:1d.7 10 <- [0x00e4444000 - 0x00e44443ff] size 0x00000400 gran 0x0a mem +PCI: 00:1e.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 05 io +PCI: 00:1e.0 24 <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x14 bus 05 prefmem +PCI: 00:1e.0 20 <- [0x00e0000000 - 0x00e20fffff] size 0x02100000 gran 0x14 bus 05 mem +PCI: 00:1e.0 assign_resources, bus 5 link: 0 +PCI: 05:00.0 In set resources +PCI: 05:00.0 10 <- [0x00e2000000 - 0x00e2000fff] size 0x00001000 gran 0x0c mem +PCI: 05:00.0 2c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x02 io +PCI: 05:00.0 34 <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x02 io +PCI: 05:00.0 1c <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x0c prefmem +PCI: 05:00.0 24 <- [0x00e0000000 - 0x00e1ffffff] size 0x02000000 gran 0x0c mem +PCI: 05:00.1 10 <- [0x00e2001000 - 0x00e20017ff] size 0x00000800 gran 0x0b mem +PCI: 05:00.2 10 <- [0x00e2001800 - 0x00e20018ff] size 0x00000100 gran 0x08 mem +PCI: 05:00.3 10 <- [0x00e2001900 - 0x00e20019ff] size 0x00000100 gran 0x08 mem +PCI: 00:1e.0 assign_resources, bus 5 link: 0 +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PNP: 00ff.1 missing set_resources +PNP: 00ff.2 missing set_resources +PNP: 164e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io +ERROR: PNP: 164e.2 70 irq size: 0x0000000001 not assigned +ERROR: PNP: 164e.2 74 drq size: 0x0000000001 not assigned +ERROR: PNP: 164e.2 75 drq size: 0x0000000001 not assigned +PNP: 164e.7 60 <- [0x0000001680 - 0x000000168f] size 0x00000010 gran 0x04 io +ERROR: PNP: 164e.7 70 irq size: 0x0000000001 not assigned +PNP: 164e.19 60 <- [0x000000164c - 0x000000164d] size 0x00000002 gran 0x01 io +ERROR: PNP: 164e.19 70 irq size: 0x0000000001 not assigned +PNP: 002e.1 60 <- [0x00000003bc - 0x00000007bb] size 0x00000400 gran 0x0a io +PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq +ERROR: PNP: 002e.1 74 drq size: 0x0000000001 not assigned +PNP: 002e.3 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io +PNP: 002e.3 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq +PNP: 002e.7 60 <- [0x0000001620 - 0x0000001627] size 0x00000008 gran 0x03 io +ERROR: PNP: 002e.7 70 irq size: 0x0000000001 not assigned +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PCI: 00:1f.1 10 <- [0x00000050a8 - 0x00000050af] size 0x00000008 gran 0x03 io +PCI: 00:1f.1 14 <- [0x00000050c8 - 0x00000050cb] size 0x00000004 gran 0x02 io +PCI: 00:1f.1 18 <- [0x00000050b0 - 0x00000050b7] size 0x00000008 gran 0x03 io +PCI: 00:1f.1 1c <- [0x00000050cc - 0x00000050cf] size 0x00000004 gran 0x02 io +PCI: 00:1f.1 20 <- [0x0000005080 - 0x000000508f] size 0x00000010 gran 0x04 io +PCI: 00:1f.2 10 <- [0x00000050b8 - 0x00000050bf] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 14 <- [0x00000050d0 - 0x00000050d3] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 18 <- [0x00000050c0 - 0x00000050c7] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 1c <- [0x00000050d4 - 0x00000050d7] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 20 <- [0x0000005090 - 0x000000509f] size 0x00000010 gran 0x04 io +PCI: 00:1f.2 24 <- [0x00e4444400 - 0x00e44447ff] size 0x00000400 gran 0x0a mem +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +CBMEM region bf6d0000-bf7fffff (cbmem_late_set_table) +Root Device assign_resources, bus 0 link: 0 +Done setting resources. +Show resources in subtree (Root Device)...After assigning values. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 1690 size 30d8 align 12 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base d0000000 size 14444800 align 28 gran 0 limit efffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 + DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 4 + DOMAIN: 0000 resource base bf800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5 + DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7 + PCI: 00:00.0 + PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf + PCI: 00:02.0 + PCI: 00:02.0 resource base e4300000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10 + PCI: 00:02.0 resource base 50a0 size 8 align 3 gran 3 limit ffff flags 60000100 index 14 + PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 18 + PCI: 00:02.0 resource base e4400000 size 40000 align 18 gran 18 limit efffffff flags 60000200 index 1c + PCI: 00:02.1 + PCI: 00:02.1 resource base e4380000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base e4440000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10 + PCI: 00:1c.0 child on link 0 PCI: 01:00.0 + PCI: 00:1c.0 resource base 4000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.0 resource base e4100000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 01:00.0 + PCI: 01:00.0 resource base e4100000 size 20000 align 17 gran 17 limit efffffff flags 60000200 index 10 + PCI: 01:00.0 resource base 4000 size 20 align 5 gran 5 limit ffff flags 60000100 index 18 + PCI: 00:1c.1 child on link 0 PCI: 02:00.0 + PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.1 resource base e4200000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base e4200000 size 10000 align 16 gran 16 limit efffffff flags 60000201 index 10 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1c.3 + PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 5000 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 5020 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 5040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.3 + PCI: 00:1d.3 resource base 5060 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base e4444000 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10 + PCI: 00:1e.0 child on link 0 PCI: 05:00.0 + PCI: 00:1e.0 resource base 2000 size 2000 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1e.0 resource base e2100000 size 2000000 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1e.0 resource base e0000000 size 2100000 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 05:00.0 + PCI: 05:00.0 resource base e2000000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 + PCI: 05:00.0 resource base 2000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 2c + PCI: 05:00.0 resource base 3000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 34 + PCI: 05:00.0 resource base e2100000 size 2000000 align 12 gran 12 limit efffffff flags 60001200 index 1c + PCI: 05:00.0 resource base e0000000 size 2000000 align 12 gran 12 limit efffffff flags 60000200 index 24 + PCI: 05:00.1 + PCI: 05:00.1 resource base e2001000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 10 + PCI: 05:00.2 + PCI: 05:00.2 resource base e2001800 size 100 align 8 gran 8 limit efffffff flags 60000200 index 10 + PCI: 05:00.3 + PCI: 05:00.3 resource base e2001900 size 100 align 8 gran 8 limit efffffff flags 60000200 index 10 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PNP: 164e.2 + PNP: 164e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 164e.3 + PNP: 164e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 164e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.7 + PNP: 164e.7 resource base 1680 size 10 align 4 gran 4 limit ffff flags e0000100 index 60 + PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 164e.19 + PNP: 164e.19 resource base 164c size 2 align 1 gran 1 limit ffff flags e0000100 index 60 + PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 + PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 3bc size 400 align 10 gran 10 limit 7ff flags e0000100 index 60 + PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 + PNP: 002e.3 + PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.7 + PNP: 002e.7 resource base 1620 size 8 align 3 gran 3 limit ffff flags e0000100 index 60 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.a + PNP: 002e.a resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 60 + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PCI: 00:1f.1 + PCI: 00:1f.1 resource base 50a8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 + PCI: 00:1f.1 resource base 50c8 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 + PCI: 00:1f.1 resource base 50b0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 + PCI: 00:1f.1 resource base 50cc size 4 align 2 gran 2 limit ffff flags 60000100 index 1c + PCI: 00:1f.1 resource base 5080 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 50b8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 + PCI: 00:1f.2 resource base 50d0 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 + PCI: 00:1f.2 resource base 50c0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 + PCI: 00:1f.2 resource base 50d4 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c + PCI: 00:1f.2 resource base 5090 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 + PCI: 00:1f.2 resource base e4444400 size 400 align 10 gran 10 limit efffffff flags 60000200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:69 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + I2C: 01:69 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f +Done allocating resources. +BS: Exiting BS_DEV_RESOURCES state. +BS: BS_DEV_RESOURCES times (us): entry 0 run 3353806 exit 0 +BS: Entering BS_DEV_ENABLE state. +Enabling resources... +PCI: 00:00.0 subsystem <- 17aa/2017 +PCI: 00:00.0 cmd <- 06 +PCI: 00:02.0 subsystem <- 17aa/201a +PCI: 00:02.0 cmd <- 03 +PCI: 00:02.1 subsystem <- 17aa/201a +PCI: 00:02.1 cmd <- 02 +PCI: 00:1b.0 subsystem <- 17aa/2010 +PCI: 00:1b.0 cmd <- 102 +PCI: 00:1c.0 bridge ctrl <- 0003 +PCI: 00:1c.0 subsystem <- 0000/0000 +PCI: 00:1c.0 cmd <- 107 +PCI: 00:1c.1 bridge ctrl <- 0003 +PCI: 00:1c.1 subsystem <- 0000/0000 +PCI: 00:1c.1 cmd <- 106 +PCI: 00:1c.2 bridge ctrl <- 0003 +PCI: 00:1c.2 cmd <- 00 +PCI: 00:1c.3 bridge ctrl <- 0003 +PCI: 00:1c.3 cmd <- 00 +PCI: 00:1d.0 subsystem <- 17aa/200a +PCI: 00:1d.0 cmd <- 01 +PCI: 00:1d.1 subsystem <- 17aa/200a +PCI: 00:1d.1 cmd <- 01 +PCI: 00:1d.2 subsystem <- 17aa/200a +PCI: 00:1d.2 cmd <- 01 +PCI: 00:1d.3 subsystem <- 17aa/200a +PCI: 00:1d.3 cmd <- 01 +PCI: 00:1d.7 subsystem <- 17aa/200b +PCI: 00:1d.7 cmd <- 102 +PCI: 00:1e.0 bridge ctrl <- 0003 +PCI: 00:1e.0 cmd <- 07 (NOT WRITTEN!) +PCI: 00:1f.0 subsystem <- 17aa/2009 +PCI: 00:1f.0 cmd <- 107 +PCI: 00:1f.1 subsystem <- 17aa/200c +PCI: 00:1f.1 cmd <- 01 +PCI: 00:1f.2 subsystem <- 17aa/200d +PCI: 00:1f.2 cmd <- 03 +PCI: 00:1f.3 subsystem <- 17aa/200f +PCI: 00:1f.3 cmd <- 101 +PCI: 01:00.0 cmd <- 03 +PCI: 02:00.0 cmd <- 02 +PCI: 05:00.0 bridge ctrl <- 0503 +PCI: 05:00.0 cmd <- 03 +PCI: 05:00.1 cmd <- 02 +PCI: 05:00.2 cmd <- 06 +PCI: 05:00.3 cmd <- 06 +done. +BS: Exiting BS_DEV_ENABLE state. +BS: BS_DEV_ENABLE times (us): entry 0 run 124473 exit 0 +BS: Entering BS_DEV_INIT state. +Initializing devices... +Root Device init +recv_ec_data: 0x11 +recv_ec_data: 0x11 +Root Device init 5804 usecs +CPU_CLUSTER: 0 init +start_eip=0x00001000, code_size=0x00000031 +Initializing SMM handler... ... pmbase = 0x0500 + +SMI_STS: MCSMI PM1 +PM1_STS: WAK PWRBTN TMROF +GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 +ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 +TCO_STS: INTRD_DET + ... raise SMI# +Initializing CPU #0 +CPU: vendor Intel device 6ec +CPU: family 06, model 0e, stepping 0c +Enabling cache +microcode: sig=0x6ec pf=0x20 revision=0x0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +microcode: updated to revision 0x54 date=2006-05-01 +CPU: Intel(R) Core(TM) Duo CPU L2400 @ 1.66GHz. +MTRR: Physical address space: +0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 +0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 +0x00000000000c0000 - 0x00000000bf800000 size 0xbf740000 type 6 +0x00000000bf800000 - 0x00000000d0000000 size 0x10800000 type 0 +0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 +0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 +MTRR addr 0x0-0x10 set to 6 type @ 0 +MTRR addr 0x10-0x20 set to 6 type @ 1 +MTRR addr 0x20-0x30 set to 6 type @ 2 +MTRR addr 0x30-0x40 set to 6 type @ 3 +MTRR addr 0x40-0x50 set to 6 type @ 4 +MTRR addr 0x50-0x60 set to 6 type @ 5 +MTRR addr 0x60-0x70 set to 6 type @ 6 +MTRR addr 0x70-0x80 set to 6 type @ 7 +MTRR addr 0x80-0x84 set to 6 type @ 8 +MTRR addr 0x84-0x88 set to 6 type @ 9 +MTRR addr 0x88-0x8c set to 6 type @ 10 +MTRR addr 0x8c-0x90 set to 6 type @ 11 +MTRR addr 0x90-0x94 set to 6 type @ 12 +MTRR addr 0x94-0x98 set to 6 type @ 13 +MTRR addr 0x98-0x9c set to 6 type @ 14 +MTRR addr 0x9c-0xa0 set to 6 type @ 15 +MTRR addr 0xa0-0xa4 set to 0 type @ 16 +MTRR addr 0xa4-0xa8 set to 0 type @ 17 +MTRR addr 0xa8-0xac set to 0 type @ 18 +MTRR addr 0xac-0xb0 set to 0 type @ 19 +MTRR addr 0xb0-0xb4 set to 0 type @ 20 +MTRR addr 0xb4-0xb8 set to 0 type @ 21 +MTRR addr 0xb8-0xbc set to 0 type @ 22 +MTRR addr 0xbc-0xc0 set to 0 type @ 23 +MTRR addr 0xc0-0xc1 set to 6 type @ 24 +MTRR addr 0xc1-0xc2 set to 6 type @ 25 +MTRR addr 0xc2-0xc3 set to 6 type @ 26 +MTRR addr 0xc3-0xc4 set to 6 type @ 27 +MTRR addr 0xc4-0xc5 set to 6 type @ 28 +MTRR addr 0xc5-0xc6 set to 6 type @ 29 +MTRR addr 0xc6-0xc7 set to 6 type @ 30 +MTRR addr 0xc7-0xc8 set to 6 type @ 31 +MTRR addr 0xc8-0xc9 set to 6 type @ 32 +MTRR addr 0xc9-0xca set to 6 type @ 33 +MTRR addr 0xca-0xcb set to 6 type @ 34 +MTRR addr 0xcb-0xcc set to 6 type @ 35 +MTRR addr 0xcc-0xcd set to 6 type @ 36 +MTRR addr 0xcd-0xce set to 6 type @ 37 +MTRR addr 0xce-0xcf set to 6 type @ 38 +MTRR addr 0xcf-0xd0 set to 6 type @ 39 +MTRR addr 0xd0-0xd1 set to 6 type @ 40 +MTRR addr 0xd1-0xd2 set to 6 type @ 41 +MTRR addr 0xd2-0xd3 set to 6 type @ 42 +MTRR addr 0xd3-0xd4 set to 6 type @ 43 +MTRR addr 0xd4-0xd5 set to 6 type @ 44 +MTRR addr 0xd5-0xd6 set to 6 type @ 45 +MTRR addr 0xd6-0xd7 set to 6 type @ 46 +MTRR addr 0xd7-0xd8 set to 6 type @ 47 +MTRR addr 0xd8-0xd9 set to 6 type @ 48 +MTRR addr 0xd9-0xda set to 6 type @ 49 +MTRR addr 0xda-0xdb set to 6 type @ 50 +MTRR addr 0xdb-0xdc set to 6 type @ 51 +MTRR addr 0xdc-0xdd set to 6 type @ 52 +MTRR addr 0xdd-0xde set to 6 type @ 53 +MTRR addr 0xde-0xdf set to 6 type @ 54 +MTRR addr 0xdf-0xe0 set to 6 type @ 55 +MTRR addr 0xe0-0xe1 set to 6 type @ 56 +MTRR addr 0xe1-0xe2 set to 6 type @ 57 +MTRR addr 0xe2-0xe3 set to 6 type @ 58 +MTRR addr 0xe3-0xe4 set to 6 type @ 59 +MTRR addr 0xe4-0xe5 set to 6 type @ 60 +MTRR addr 0xe5-0xe6 set to 6 type @ 61 +MTRR addr 0xe6-0xe7 set to 6 type @ 62 +MTRR addr 0xe7-0xe8 set to 6 type @ 63 +MTRR addr 0xe8-0xe9 set to 6 type @ 64 +MTRR addr 0xe9-0xea set to 6 type @ 65 +MTRR addr 0xea-0xeb set to 6 type @ 66 +MTRR addr 0xeb-0xec set to 6 type @ 67 +MTRR addr 0xec-0xed set to 6 type @ 68 +MTRR addr 0xed-0xee set to 6 type @ 69 +MTRR addr 0xee-0xef set to 6 type @ 70 +MTRR addr 0xef-0xf0 set to 6 type @ 71 +MTRR addr 0xf0-0xf1 set to 6 type @ 72 +MTRR addr 0xf1-0xf2 set to 6 type @ 73 +MTRR addr 0xf2-0xf3 set to 6 type @ 74 +MTRR addr 0xf3-0xf4 set to 6 type @ 75 +MTRR addr 0xf4-0xf5 set to 6 type @ 76 +MTRR addr 0xf5-0xf6 set to 6 type @ 77 +MTRR addr 0xf6-0xf7 set to 6 type @ 78 +MTRR addr 0xf7-0xf8 set to 6 type @ 79 +MTRR addr 0xf8-0xf9 set to 6 type @ 80 +MTRR addr 0xf9-0xfa set to 6 type @ 81 +MTRR addr 0xfa-0xfb set to 6 type @ 82 +MTRR addr 0xfb-0xfc set to 6 type @ 83 +MTRR addr 0xfc-0xfd set to 6 type @ 84 +MTRR addr 0xfd-0xfe set to 6 type @ 85 +MTRR addr 0xfe-0xff set to 6 type @ 86 +MTRR addr 0xff-0x100 set to 6 type @ 87 +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 32 bits +MTRR: default type WB/UC MTRR counts: 4/4. +MTRR: UC selected as default type. +MTRR: 0 base 0x0000000000000000 mask 0x0000000080000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x00000000c0000000 type 6 +MTRR: 2 base 0x00000000bf800000 mask 0x00000000ff800000 type 0 +MTRR: 3 base 0x00000000d0000000 mask 0x00000000f0000000 type 1 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x00 done. +CPU: 0 2 siblings +CPU: 0 has sibling 1 +CPU #0 initialized +CPU1: stack_base 00160000, stack_end 00160ff8 +Asserting INIT. +Waiting for send to finish... ++Deasserting INIT. +Waiting for send to finish... ++#startup loops: 2. +Sending STARTUP #1 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++Sending STARTUP #2 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++After Startup. +Initializing CPU #1 +Waiting for 1 CPUS to stop +CPU: vendor Intel device 6ec +CPU: family 06, model 0e, stepping 0c +Enabling cache +microcode: sig=0x6ec pf=0x20 revision=0x0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +Microcode size field is 0 +microcode: updated to revision 0x54 date=2006-05-01 +CPU: Intel(R) Core(TM) Duo CPU L2400 @ 1.66GHz. +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 32 bits +MTRR: 0 base 0x0000000000000000 mask 0x0000000080000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x00000000c0000000 type 6 +MTRR: 2 base 0x00000000bf800000 mask 0x00000000ff800000 type 0 +MTRR: 3 base 0x00000000d0000000 mask 0x00000000f0000000 type 1 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x01 done. +CPU: 1 2 siblings +CPU #1 initialized +CPU 1 going down... +All AP CPUs stopped (11641 loops) +CPU1: stack: 00160000 - 00161000, lowest used address 00160c68, stack used: 920 bytes +CPU_CLUSTER: 0 init 687708 usecs +PCI: 00:00.0 init +Normal boot. +PCI: 00:00.0 init 2905 usecs +PCI: 00:02.0 init +Initializing VGA without OPROM. +GMADR=0xd0000008 GTTADR=0xe4400000 +i915lightup: graphics d0020000 mmio e4300000 addrport 50a0 physbase bf800000 +Extracted contents: +header: 00 ff ff ff ff ff ff 00 +serial number: 30 ae 00 40 00 00 00 00 00 0f +version: 01 03 +basic params: 80 19 12 78 ea +chroma info: ed 75 91 57 4f 8b 26 21 50 54 +established: 21 08 00 +standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 +descriptor 1: 28 15 00 40 41 00 26 30 18 88 36 00 f6 b9 00 00 00 18 +descriptor 2: ed 10 00 40 41 00 26 30 18 88 36 00 f6 b9 00 00 00 18 +descriptor 3: 00 00 00 0f 00 61 43 32 61 43 28 0f 01 00 4c a3 58 4a +descriptor 4: 00 00 00 fe 00 4c 54 4e 31 32 31 58 4a 2d 4c 30 37 0a +extensions: 00 +checksum: 00 + +Manufacturer: LEN Model 4000 Serial Number 0 +EDID version: 1.3 +Digital display +Maximum image size: 25 cm x 18 cm +Gamma: 220% +Check DPMS levels +DPMS levels: Standby Suspend Off +Supported color formats: RGB 4:4:4, YCrCb 4:2:2 +First detailed timing is preferred timing +Established timings supported: + 640x480@60Hz + 800x600@60Hz + 1024x768@60Hz +Standard timings supported: +Detailed timings +Hex of detail: 281500404100263018883600f6b900000018 +Did detailed timing +Detailed mode (IN HEX): Clock 54160 KHz, f6 mm x b9 mm + 0400 0418 04a0 0540 hborder 0 + 0300 0303 0309 0326 vborder 0 + -hsync -vsync +Hex of detail: ed1000404100263018883600f6b900000018 +Detailed mode (IN HEX): Clock 54160 KHz, f6 mm x b9 mm + 0400 0418 04a0 0540 hborder 0 + 0300 0303 0309 0326 vborder 0 + -hsync -vsync +Hex of detail: 0000000f006143326143280f01004ca3584a +Manufacturer-specified data, tag 15 +Hex of detail: 000000fe004c544e313231584a2d4c30370a +ASCII string: LTN121XJ +Checksum +Checksum: 0x0 (valid) + +Unknown extension block + +EDID block does NOT conform to EDID 1.3! + Missing name descriptor + Missing monitor ranges + Detailed block string not properly terminated +EDID block does not conform at all! + Bad year of manufacture + Detailed blocks filled with garbage +I915_WRITE(HTOTAL(pipe), 053f03ff) +I915_WRITE(HBLANK(pipe),0x053f03ff) +I915_WRITE(HSYNC(pipe),0x049f0417) +I915_WRITE(VTOTAL(pipe), 032502ff) +I915_WRITE(VBLANK(pipe),0x032502ff) +I915_WRITE(VSYNC(pipe),0x03080302) +Table has 2247 elements +Change verbosity to 0 +run: return 2246 +Run returns 2247 +gtt_setup: GTT PGETLB_CTL register: 0x0 +gtt_setup: GTT PGETLB_CTL register: 0x1 +gtt_setup: GTT PGETLB_CTL register: 0xbf800001 +gtt_setup: GTT PGETLB_CTL register: 0xbf800003 +gtt_setup is enabled: GTT PGETLB_CTL register: 0x1 +setgtt(0,1600,0xbf800000,4096); +GTT PGETLB_CTL register: 0xbf800001 +GTT Enabled +memset d0020000 to 0x00 for 3145728 bytes +229929 microseconds +PCI: 00:02.0 init 265041 usecs +PCI: 00:02.1 init +PCI: 00:02.1 init 2382 usecs +PCI: 00:1b.0 init +Azalia: codec type: Azalia +Azalia: base = e4440000 +Azalia: codec_mask = 03 +Azalia: Initializing codec #1 +Azalia: codec viddid: 14f12bfa +Azalia: No verb! +Azalia: Initializing codec #0 +Azalia: codec viddid: 11d41981 +Azalia: No verb! +PCI: 00:1b.0 init 25808 usecs +PCI: 00:1c.0 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.0 init 4490 usecs +PCI: 00:1c.1 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.1 init 4490 usecs +PCI: 00:1c.2 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.2 init 4491 usecs +PCI: 00:1c.3 init +Initializing ICH7 PCIe bridge. +PCI: 00:1c.3 init 4489 usecs +PCI: 00:1d.0 init +UHCI: Setting up controller.. done. +PCI: 00:1d.0 init 4925 usecs +PCI: 00:1d.1 init +UHCI: Setting up controller.. done. +PCI: 00:1d.1 init 4926 usecs +PCI: 00:1d.2 init +UHCI: Setting up controller.. done. +PCI: 00:1d.2 init 4924 usecs +PCI: 00:1d.3 init +UHCI: Setting up controller.. done. +PCI: 00:1d.3 init 4925 usecs +PCI: 00:1d.7 init +EHCI: Setting up controller.. done. +PCI: 00:1d.7 init 4933 usecs +PCI: 00:1e.0 init +PCI: 00:1e.0 init 1683 usecs +PCI: 00:1f.0 init +i82801gx: lpc_init +IOAPIC: Initializing IOAPIC at 0xfec00000 +IOAPIC: Bootstrap Processor Local APIC = 0x00 +IOAPIC: ID = 0x02 +IOAPIC: Dumping registers + reg 0x0000: 0x02000000 + reg 0x0001: 0x00170020 + reg 0x0002: 0x00170020 +WARNING: No CMOS option 'power_on_after_fail'. +Set power on after power failure. +NMI sources enabled. +rtc_failed = 0x0 +RTC Init +i8259_configure_irq_trigger: current interrupts are 0x0 +i8259_configure_irq_trigger: try to set interrupts 0x200 +Disabling ACPI via APMC: +done. +Locking SMM. +PCI: 00:1f.0 init 50455 usecs +PCI: 00:1f.1 init +i82801gx_ide: initializing... IDE0 +PCI: 00:1f.1 init 4942 usecs +PCI: 00:1f.2 init +i82801gx_sata: initializing... +SATA controller in AHCI mode. +PCI: 00:1f.2 init 7210 usecs +PCI: 01:00.0 init +PCI: 01:00.0 init 1669 usecs +PCI: 02:00.0 init +PCI: 02:00.0 init 1668 usecs +PCI: 05:00.0 init +Ricoh RL5c476: Initializing. +CF Base = 0 +CF boot not enabled. +PCI: 05:00.0 init 7377 usecs +PCI: 05:00.1 init +PCI: 05:00.1 init 1670 usecs +PCI: 05:00.2 init +PCI: 05:00.2 init 1670 usecs +PCI: 05:00.3 init +PCI: 05:00.3 init 1670 usecs +PNP: 164e.2 init +PNP: 164e.2 init 1582 usecs +PNP: 164e.7 init +PNP: 164e.7 init 1584 usecs +PNP: 164e.19 init +PNP: 164e.19 init 1670 usecs +PNP: 002e.1 init +PNP: 002e.1 init 1582 usecs +PNP: 002e.3 init +PNP: 002e.3 init 1584 usecs +PNP: 002e.7 init +PNP: 002e.7 init 1582 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:69 init +I2C: 01:69 init 16205 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:54 init +I2C: 01:54 init 3593 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:55 init +I2C: 01:55 init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:56 init +I2C: 01:56 init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:57 init +I2C: 01:57 init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5c init +Locking EEPROM RFID +init EEPROM done +I2C: 01:5c init 28615 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5d init +I2C: 01:5d init 3593 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5e init +I2C: 01:5e init 3592 usecs +smbus: PCI: 00:1f.3[0]->I2C: 01:5f init +I2C: 01:5f init 3593 usecs +Devices initialized +Show all devs...After init. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.3: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PNP: 164e.2: enabled 1 +PNP: 164e.3: enabled 0 +PNP: 164e.7: enabled 1 +PNP: 164e.19: enabled 1 +PNP: 002e.0: enabled 0 +PNP: 002e.1: enabled 1 +PNP: 002e.2: enabled 0 +PNP: 002e.3: enabled 1 +PNP: 002e.7: enabled 1 +PNP: 002e.a: enabled 0 +PCI: 00:1f.1: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 01:69: enabled 1 +I2C: 01:54: enabled 1 +I2C: 01:55: enabled 1 +I2C: 01:56: enabled 1 +I2C: 01:57: enabled 1 +I2C: 01:5c: enabled 1 +I2C: 01:5d: enabled 1 +I2C: 01:5e: enabled 1 +I2C: 01:5f: enabled 1 +PCI: 00:1c.2: enabled 1 +PCI: 00:1c.3: enabled 1 +PCI: 00:1e.0: enabled 1 +PCI: 01:00.0: enabled 1 +PCI: 02:00.0: enabled 1 +PCI: 05:00.0: enabled 1 +PCI: 05:00.1: enabled 1 +PCI: 05:00.2: enabled 1 +PCI: 05:00.3: enabled 1 +APIC: 01: enabled 1 +BS: Exiting BS_DEV_INIT state. +BS: BS_DEV_INIT times (us): entry 0 run 1411225 exit 0 +BS: Entering BS_POST_DEVICE state. +CBMEM region bf6d0000-bf7fffff (cbmem_check_toc) +Adding CBMEM entry as no. 4 +Moving GDT to bf6e0600...ok +Finalize devices... +Devices finalized +BS: Exiting BS_POST_DEVICE state. +BS: BS_POST_DEVICE times (us): entry 9470 run 6558 exit 0 +BS: Entering BS_OS_RESUME_CHECK state. +BS: Exiting BS_OS_RESUME_CHECK state. +BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3401 exit 0 +BS: Entering BS_WRITE_TABLES state. +Copying Interrupt Routing Table to 0x000f0000... done. +Adding CBMEM entry as no. 5 +Copying Interrupt Routing Table to 0xbf6e0800... done. +PIRQ table: 272 bytes. +Wrote the mp table end at: 000f0410 - 000f05cc +Adding CBMEM entry as no. 6 +Wrote the mp tabl +6653 bytes lost diff --git a/docs/future/dumps/x60_5893_native.tar.gz b/docs/future/dumps/x60_5893_native.tar.gz Binary files differnew file mode 100644 index 00000000..59266f82 --- /dev/null +++ b/docs/future/dumps/x60_5893_native.tar.gz diff --git a/docs/future/dumps/x60_5893_native_crashdump b/docs/future/dumps/x60_5893_native_crashdump new file mode 100644 index 00000000..a3aedb64 --- /dev/null +++ b/docs/future/dumps/x60_5893_native_crashdump @@ -0,0 +1,77 @@ +Time: 1401660987 s 272232 us +Kernel: 3.14.4-gnuowen +PCI ID: 0x27a2 +EIR: 0x00000010 +IER: 0x00028053 +PGTBL_ER: 0x00000012 +FORCEWAKE: 0x00000000 +DERRMR: 0x00000000 +CCID: 0x00000000 +Missed interrupts: 0x00000000 + fence[0] = 00000000 + fence[1] = 00000000 + fence[2] = 00000000 + fence[3] = 00000000 + fence[4] = 00000000 + fence[5] = 00000000 + fence[6] = 00000000 + fence[7] = 00000000 + fence[8] = 00000000 + fence[9] = 00000000 + fence[10] = 00000000 + fence[11] = 00000000 + fence[12] = 00000000 + fence[13] = 00000000 + fence[14] = 00000000 + fence[15] = 00000000 + INSTDONE_0: 0x7fffffc0 + INSTDONE_1: 0x00000000 + INSTDONE_2: 0x00000000 + INSTDONE_3: 0x00000000 +Active [0]: +Pinned [0]: +Num Pipes: 2 +Pipe [0]: + Power: off + SRC: 00000000 +Plane [0]: + CNTR: 00000000 + STRIDE: 00000000 + SIZE: 00000000 + POS: 00000000 + ADDR: 00000000 +Cursor [0]: + CNTR: 00000000 + POS: 00000000 + BASE: 00000000 +Pipe [1]: + Power: off + SRC: 00000000 +Plane [1]: + CNTR: 00000000 + STRIDE: 00000000 + SIZE: 00000000 + POS: 00000000 + ADDR: 00000000 +Cursor [1]: + CNTR: 00000000 + POS: 00000000 + BASE: 00000000 +CPU transcoder: A + Power: off + CONF: 00000000 + HTOTAL: 00000000 + HBLANK: 00000000 + HSYNC: 00000000 + VTOTAL: 00000000 + VBLANK: 00000000 + VSYNC: 00000000 +CPU transcoder: A + Power: off + CONF: 00000000 + HTOTAL: 00000000 + HBLANK: 00000000 + HSYNC: 00000000 + VTOTAL: 00000000 + VBLANK: 00000000 + VSYNC: 00000000 diff --git a/docs/future/dumps/x60_5893_vbios.tar.gz b/docs/future/dumps/x60_5893_vbios.tar.gz Binary files differnew file mode 100644 index 00000000..4ff78404 --- /dev/null +++ b/docs/future/dumps/x60_5893_vbios.tar.gz diff --git a/docs/future/dumps/x60_lspcixxxvvnn_5927_19 b/docs/future/dumps/x60_lspcixxxvvnn_5927_19 new file mode 100644 index 00000000..5c524c9f --- /dev/null +++ b/docs/future/dumps/x60_lspcixxxvvnn_5927_19 @@ -0,0 +1,809 @@ +00:00.0 Host bridge [0600]: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and 945GT Express Memory Controller Hub [8086:27a0] (rev 03) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:2017] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=09 <?> + Kernel driver in use: agpgart-intel +00: 86 80 a0 27 06 00 90 20 03 00 00 06 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 17 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 90 d1 fe 01 40 d1 fe 05 00 00 f0 01 80 d1 fe +50: 00 00 30 00 19 00 00 00 00 00 00 00 00 00 00 00 +60: 01 30 d1 fe 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 30 33 33 33 33 33 33 00 ff 03 00 00 80 1a 38 00 +a0: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 be ba fe ca +e0: 09 00 09 51 02 04 0a 90 0e 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 05 00 10 00 00 00 + +00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller [8086:27a2] (rev 03) (prog-if 00 [VGA controller]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:201a] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 16 + Region 0: Memory at e4200000 (32-bit, non-prefetchable) [size=512K] + Region 1: I/O ports at 50a0 [size=8] + Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M] + Region 3: Memory at e4300000 (32-bit, non-prefetchable) [size=256K] + Expansion ROM at <unassigned> [disabled] + Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit- + Address: 00000000 Data: 0000 + Capabilities: [d0] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: i915 +00: 86 80 a2 27 07 00 90 00 03 00 00 03 00 00 80 00 +10: 00 00 20 e4 a1 50 00 00 08 00 00 d0 00 00 30 e4 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 1a 20 +30: 00 00 00 00 90 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 48 00 00 00 09 00 09 51 02 04 0a 90 +50: 0e 00 30 00 19 00 00 00 00 00 00 00 00 00 80 7f +60: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 05 d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 03 00 64 34 ff 00 00 00 86 0f 05 00 00 00 00 00 + +00:02.1 Display controller [0380]: Intel Corporation Mobile 945GM/GMS/GME, 943/940GML Express Integrated Graphics Controller [8086:27a6] (rev 03) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:201a] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Region 0: Memory at e4280000 (32-bit, non-prefetchable) [size=512K] + Capabilities: [d0] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- +00: 86 80 a6 27 07 00 90 00 03 00 80 03 00 00 80 00 +10: 00 00 28 e4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 1a 20 +30: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 +40: 00 00 00 00 48 00 00 00 09 00 09 51 02 04 0a 90 +50: 0e 00 30 00 19 00 00 00 00 00 00 00 00 00 80 7f +60: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 03 00 64 34 ff 00 00 00 86 0f 05 00 00 00 00 00 + +00:1b.0 Audio device [0403]: Intel Corporation NM10/ICH7 Family High Definition Audio Controller [8086:27d8] (rev 02) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:2010] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Interrupt: pin B routed to IRQ 46 + Region 0: Memory at e4340000 (64-bit, non-prefetchable) [size=16K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4162 + Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us + ClockPM- Surprise- LLActRep- BwNot- + LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed- WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=1 ArbSelect=Fixed TC/VC=80 + Status: NegoPending- InProgress- + Capabilities: [130 v1] Root Complex Link + Desc: PortNumber=0f ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: snd_hda_intel +00: 86 80 d8 27 06 05 10 00 02 00 03 04 10 00 00 00 +10: 04 00 34 e4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 10 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 07 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 +60: 05 70 81 00 0c 30 e0 fe 00 00 00 00 62 41 00 00 +70: 10 00 91 00 00 00 00 00 00 08 10 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.0 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 1 [8086:27d0] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 + I/O behind bridge: 00004000-00004fff + Memory behind bridge: e4100000-e41fffff + Prefetchable memory behind bridge: 0000000080000000-00000000801fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #0, PowerLimit 0.000W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg+ + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- + Changed: MRL- PresDet- LinkState+ + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4191 + Capabilities: [90] Subsystem: Intel Corporation NM10/ICH7 Family PCI Express Port 1 [8086:27d0] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=01 ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d0 27 07 05 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 01 01 00 40 40 00 00 +20: 10 e4 10 e4 01 80 11 80 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 06 00 +40: 10 80 41 01 c0 0f 00 00 00 00 10 00 11 2c 11 01 +50: 40 00 11 30 60 00 00 00 38 10 40 01 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe 91 41 00 00 00 00 00 00 +90: 0d a0 00 00 86 80 d0 27 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 0e 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.1 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 2 [8086:27d2] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41b1 + Capabilities: [90] Subsystem: Intel Corporation NM10/ICH7 Family PCI Express Port 2 [8086:27d2] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=02 ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d2 27 04 05 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 02 02 00 f0 00 00 20 +20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 02 06 00 +40: 10 80 41 00 c0 0f 00 00 00 00 10 00 11 2c 11 02 +50: 40 00 01 10 60 00 00 00 00 00 40 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe b1 41 00 00 00 00 00 00 +90: 0d a0 00 00 86 80 d2 27 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 0e 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.2 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 3 [8086:27d4] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41d1 + Capabilities: [90] Subsystem: Device [0000:0000] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=03 ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d4 27 04 04 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 03 03 00 f0 00 00 20 +20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 03 06 00 +40: 10 80 41 00 c0 0f 00 00 00 00 10 00 11 2c 11 03 +50: 40 00 01 10 60 00 00 00 00 00 40 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe d1 41 00 00 00 00 00 00 +90: 0d a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 0e 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.3 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 4 [8086:27d6] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4122 + Capabilities: [90] Subsystem: Device [0000:0000] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=04 ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d6 27 04 04 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 04 04 00 f0 00 00 20 +20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 04 06 00 +40: 10 80 41 00 c0 0f 00 00 00 00 10 00 11 2c 11 04 +50: 40 00 01 10 60 00 00 00 00 00 40 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +90: 0d a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 0e 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.0 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #1 [8086:27c8] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 16 + Region 4: I/O ports at 5000 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 c8 27 01 00 80 02 02 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 01 50 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.1 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #2 [8086:27c9] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin B routed to IRQ 17 + Region 4: I/O ports at 5020 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 c9 27 01 00 80 02 02 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 21 50 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.2 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #3 [8086:27ca] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin C routed to IRQ 18 + Region 4: I/O ports at 5040 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 ca 27 01 00 80 02 02 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 41 50 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.3 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #4 [8086:27cb] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin D routed to IRQ 19 + Region 4: I/O ports at 5060 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 cb 27 01 00 80 02 02 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 50 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.7 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB2 EHCI Controller [8086:27cc] (rev 02) (prog-if 20 [EHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200b] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 19 + Region 0: Memory at e4344000 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Kernel driver in use: ehci-pci +00: 86 80 cc 27 06 01 90 02 02 20 03 0c 00 00 00 00 +10: 00 40 34 e4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 0b 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 00 a0 20 00 00 00 00 +60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 00 00 e0 +70: 00 00 df 3f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 11 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 ff 00 ff 00 20 00 00 88 +e0: 00 00 00 00 db b6 6d 00 00 00 00 00 00 00 00 00 +f0: 00 80 00 09 88 85 40 00 86 0f 02 00 0a 17 02 20 + +00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev e2) (prog-if 01 [Subtractive decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Bus: primary=00, secondary=05, subordinate=06, sec-latency=32 + I/O behind bridge: 00002000-00003fff + Memory behind bridge: e0000000-e20fffff + Prefetchable memory behind bridge: 00000000e2100000-00000000e40fffff + Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [50] Subsystem: Device [0000:0000] +00: 86 80 48 24 07 00 10 00 e2 01 04 06 00 00 01 00 +10: 00 00 00 00 00 00 00 00 00 05 06 20 20 30 80 22 +20: 00 e0 00 e2 11 e2 01 e4 00 00 00 00 00 00 00 00 +30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 06 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 +50: 0d 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.0 ISA bridge [0601]: Intel Corporation 82801GBM (ICH7-M) LPC Interface Bridge [8086:27b9] (rev 02) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:2009] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0c <?> + Kernel driver in use: lpc_ich +00: 86 80 b9 27 07 00 10 02 02 00 01 06 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 09 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 05 00 00 80 00 00 00 81 04 00 00 10 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 80 80 80 80 d0 00 00 00 80 80 80 80 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 10 02 0d 1f 01 16 7c 00 e1 15 0c 00 81 16 1c 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: ac 06 00 00 30 00 00 00 13 1c 0a 00 00 03 00 00 +b0: 00 00 f0 00 00 00 00 00 00 00 02 0a 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 33 22 11 00 67 45 00 00 cf ff 00 00 08 00 00 00 +e0: 09 00 0c 10 b4 02 24 17 00 00 00 00 00 00 00 00 +f0: 01 c0 d1 fe 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.1 IDE interface [0101]: Intel Corporation 82801G (ICH7 Family) IDE Controller [8086:27df] (rev 02) (prog-if 8a [Master SecP PriP]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200c] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+ + Latency: 0 + Interrupt: pin C routed to IRQ 16 + Region 0: I/O ports at 01f0 [size=8] + Region 1: I/O ports at 03f4 [size=1] + Region 2: I/O ports at 0170 [size=8] + Region 3: I/O ports at 0374 [size=1] + Region 4: I/O ports at 5080 [size=16] + Kernel driver in use: ata_piix +00: 86 80 df 27 05 00 88 02 02 8a 01 01 00 00 00 00 +10: a9 50 00 00 c9 50 00 00 b1 50 00 00 cd 50 00 00 +20: 81 50 00 00 00 00 00 00 00 00 00 00 aa 17 0c 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 03 00 00 +40: 00 40 00 40 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.2 SATA controller [0106]: Intel Corporation 82801GBM/GHM (ICH7-M Family) SATA Controller [AHCI mode] [8086:27c5] (rev 02) (prog-if 01 [AHCI 1.0]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200d] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 45 + Region 0: I/O ports at 50b8 [size=8] + Region 1: I/O ports at 50d0 [size=4] + Region 2: I/O ports at 50c0 [size=8] + Region 3: I/O ports at 50d4 [size=4] + Region 4: I/O ports at 5090 [size=16] + Region 5: Memory at e4344400 (32-bit, non-prefetchable) [size=1K] + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4152 + Capabilities: [70] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: ahci +00: 86 80 c5 27 07 04 b0 02 02 01 06 01 00 00 00 00 +10: b9 50 00 00 d1 50 00 00 c1 50 00 00 d5 50 00 00 +20: 91 50 00 00 00 44 34 e4 00 00 00 00 aa 17 0d 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 00 02 00 00 +40: 07 a3 00 80 00 00 00 00 01 00 01 00 00 00 00 00 +50: 00 00 00 00 03 30 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 70 01 00 0c 30 e0 fe 52 41 00 00 00 00 00 00 +90: 40 00 15 02 80 01 00 5a 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.3 SMBus [0c05]: Intel Corporation NM10/ICH7 Family SMBus Controller [8086:27da] (rev 02) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200f] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 11 + Region 4: I/O ports at 0400 [size=32] +00: 86 80 da 27 01 01 80 02 02 00 05 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 01 04 00 00 00 00 00 00 00 00 00 00 aa 17 0f 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +01:00.0 Ethernet controller [0200]: Intel Corporation 82573L Gigabit Ethernet Controller [8086:109a] + Subsystem: Lenovo ThinkPad X60s [17aa:207e] + Physical Slot: 0 + Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 44 + Region 0: Memory at e4100000 (32-bit, non-prefetchable) [disabled] [size=128K] + Region 2: I/O ports at 4000 [disabled] [size=32] + Capabilities: [c8] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D3 NoSoftRst- PME-Enable+ DSel=0 DScale=1 PME- + Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4182 + Capabilities: [e0] Express (v1) Endpoint, MSI 00 + DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us + ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- + DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ + RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 512 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us + ClockPM+ Surprise- LLActRep- BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + Capabilities: [100 v1] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- + AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn- + Capabilities: [140 v1] Device Serial Number 00-16-d3-ff-ff-b6-d0-98 + Kernel driver in use: e1000e +00: 86 80 9a 10 00 04 10 00 00 00 00 02 10 00 00 00 +10: 00 00 10 e4 00 00 00 00 01 40 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 7e 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 22 c8 03 21 00 0f +d0: 05 e0 81 00 0c 30 e0 fe 00 00 00 00 82 41 00 00 +e0: 10 00 01 00 c1 0c 00 00 1f 28 10 00 11 1c 07 00 +f0: 00 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 + +05:00.0 CardBus bridge [0607]: Ricoh Co Ltd RL5c476 II [1180:0476] (rev b4) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 168 + Interrupt: pin A routed to IRQ 16 + Region 0: Memory at e2000000 (32-bit, non-prefetchable) [size=4K] + Bus: primary=05, secondary=06, subordinate=06, sec-latency=176 + Memory window 0: 84000000-87fff000 (prefetchable) + Memory window 1: 88000000-8bfff000 + I/O window 0: 00002000-000020ff + I/O window 1: 00002400-000024ff + BridgeCtl: Parity+ SERR+ ISA- VGA- MAbort- >Reset- 16bInt+ PostWrite+ + 16-bit legacy interface ports at 0001 + Kernel driver in use: yenta_cardbus +00: 80 11 76 04 07 00 10 02 b4 00 07 06 00 a8 82 00 +10: 00 00 00 e2 dc 00 00 02 05 06 06 b0 00 00 00 84 +20: 00 f0 ff 87 00 00 00 88 00 f0 ff 8b 00 20 00 00 +30: fc 20 00 00 00 24 00 00 fc 24 00 00 0b 01 83 05 +40: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 a0 00 00 03 00 00 63 04 63 04 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 b2 00 30 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 0a fe +e0: 00 40 c0 24 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +05:00.1 FireWire (IEEE 1394) [0c00]: Ricoh Co Ltd R5C552 IEEE 1394 Controller [1180:0552] (rev 09) (prog-if 10 [OHCI]) + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 64 (500ns min, 1000ns max) + Interrupt: pin B routed to IRQ 17 + Region 0: Memory at e2001000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [dc] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME+ + Kernel driver in use: firewire_ohci +00: 80 11 52 05 06 00 10 02 09 10 00 0c 00 40 80 00 +10: 00 10 00 e2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 dc 00 00 00 00 00 00 00 0b 02 02 04 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 80 16 00 00 00 00 00 20 00 00 66 66 32 12 +90: 48 60 66 10 00 00 02 00 00 80 00 00 00 01 18 00 +a0: 00 00 00 00 00 00 00 00 20 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 02 fe +e0: 00 c0 00 48 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +05:00.2 SD Host controller [0805]: Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter [1180:0822] (rev 18) + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 64 + Interrupt: pin C routed to IRQ 18 + Region 0: Memory at e2001800 (32-bit, non-prefetchable) [size=256] + Capabilities: [80] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- + Kernel driver in use: sdhci-pci +00: 80 11 22 08 06 00 10 02 18 00 05 08 00 40 80 00 +10: 00 18 00 e2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 02 fe 00 40 00 48 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 02 00 00 00 00 00 00 00 00 00 a0 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: a1 21 80 01 00 00 00 00 40 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 c3 00 20 02 00 00 00 00 + diff --git a/docs/future/dumps/x60_lspcixxxvvnn_6717_1 b/docs/future/dumps/x60_lspcixxxvvnn_6717_1 new file mode 100644 index 00000000..ca1b298e --- /dev/null +++ b/docs/future/dumps/x60_lspcixxxvvnn_6717_1 @@ -0,0 +1,810 @@ +00:00.0 Host bridge [0600]: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and 945GT Express Memory Controller Hub [8086:27a0] (rev 03) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:2017] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=09 <?> + Kernel driver in use: agpgart-intel +00: 86 80 a0 27 06 00 90 20 03 00 00 06 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 17 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 90 d1 fe 01 40 d1 fe 05 00 00 f0 01 80 d1 fe +50: 00 00 30 00 19 00 00 00 00 00 00 00 00 00 00 00 +60: 01 30 d1 fe 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 30 33 33 33 33 33 33 00 ff 03 00 00 80 1a 38 00 +a0: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 be ba fe ca +e0: 09 00 09 51 02 04 0a 90 0e 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 05 00 10 00 00 00 + +00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller [8086:27a2] (rev 03) (prog-if 00 [VGA controller]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:201a] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 16 + Region 0: Memory at e4200000 (32-bit, non-prefetchable) [size=512K] + Region 1: I/O ports at 50a0 [size=8] + Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M] + Region 3: Memory at e4300000 (32-bit, non-prefetchable) [size=256K] + Expansion ROM at <unassigned> [disabled] + Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit- + Address: 00000000 Data: 0000 + Capabilities: [d0] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: i915 +00: 86 80 a2 27 07 00 90 00 03 00 00 03 00 00 80 00 +10: 00 00 20 e4 a1 50 00 00 08 00 00 d0 00 00 30 e4 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 1a 20 +30: 00 00 00 00 90 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 48 00 00 00 09 00 09 51 02 04 0a 90 +50: 0e 00 30 00 19 00 00 00 00 00 00 00 00 00 80 7f +60: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 05 d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 03 00 64 34 ff 00 00 00 86 0f 05 00 00 00 00 00 + +00:02.1 Display controller [0380]: Intel Corporation Mobile 945GM/GMS/GME, 943/940GML Express Integrated Graphics Controller [8086:27a6] (rev 03) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:201a] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Region 0: Memory at e4280000 (32-bit, non-prefetchable) [size=512K] + Capabilities: [d0] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- +00: 86 80 a6 27 07 00 90 00 03 00 80 03 00 00 80 00 +10: 00 00 28 e4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 1a 20 +30: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 +40: 00 00 00 00 48 00 00 00 09 00 09 51 02 04 0a 90 +50: 0e 00 30 00 19 00 00 00 00 00 00 00 00 00 80 7f +60: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 03 00 64 34 ff 00 00 00 86 0f 05 00 00 00 00 00 + +00:1b.0 Audio device [0403]: Intel Corporation NM10/ICH7 Family High Definition Audio Controller [8086:27d8] (rev 02) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:2010] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Interrupt: pin B routed to IRQ 46 + Region 0: Memory at e4340000 (64-bit, non-prefetchable) [size=16K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4162 + Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us + ClockPM- Surprise- LLActRep- BwNot- + LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed- WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=1 ArbSelect=Fixed TC/VC=80 + Status: NegoPending- InProgress- + Capabilities: [130 v1] Root Complex Link + Desc: PortNumber=0f ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: snd_hda_intel +00: 86 80 d8 27 06 05 10 00 02 00 03 04 10 00 00 00 +10: 04 00 34 e4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 10 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 07 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 +60: 05 70 81 00 0c 30 e0 fe 00 00 00 00 62 41 00 00 +70: 10 00 91 00 00 00 00 00 00 08 10 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.0 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 1 [8086:27d0] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 + I/O behind bridge: 00004000-00004fff + Memory behind bridge: e4100000-e41fffff + Prefetchable memory behind bridge: 0000000080000000-00000000801fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #0, PowerLimit 0.000W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg+ + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- + Changed: MRL- PresDet- LinkState+ + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4191 + Capabilities: [90] Subsystem: Intel Corporation NM10/ICH7 Family PCI Express Port 1 [8086:27d0] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=01 ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d0 27 07 05 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 01 01 00 40 40 00 00 +20: 10 e4 10 e4 01 80 11 80 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 06 00 +40: 10 80 41 01 c0 0f 00 00 00 00 10 00 11 2c 11 01 +50: 40 00 11 30 60 00 00 00 38 10 40 01 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe 91 41 00 00 00 00 00 00 +90: 0d a0 00 00 86 80 d0 27 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 0e 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.1 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 2 [8086:27d2] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41b1 + Capabilities: [90] Subsystem: Intel Corporation NM10/ICH7 Family PCI Express Port 2 [8086:27d2] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=02 ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d2 27 04 05 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 02 02 00 f0 00 00 20 +20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 02 06 00 +40: 10 80 41 00 c0 0f 00 00 00 00 10 00 11 2c 11 02 +50: 40 00 01 10 60 00 00 00 00 00 40 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe b1 41 00 00 00 00 00 00 +90: 0d a0 00 00 86 80 d2 27 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 0e 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.2 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 3 [8086:27d4] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41d1 + Capabilities: [90] Subsystem: Device [0000:0000] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=03 ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d4 27 04 04 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 03 03 00 f0 00 00 20 +20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 03 06 00 +40: 10 80 41 00 c0 0f 00 00 00 00 10 00 11 2c 11 03 +50: 40 00 01 10 60 00 00 00 00 00 40 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe d1 41 00 00 00 00 00 00 +90: 0d a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 0e 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.3 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 4 [8086:27d6] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4122 + Capabilities: [90] Subsystem: Device [0000:0000] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=04 ComponentID=00 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d6 27 04 04 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 04 04 00 f0 00 00 20 +20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 04 06 00 +40: 10 80 41 00 c0 0f 00 00 00 00 10 00 11 2c 11 04 +50: 40 00 01 10 60 00 00 00 00 00 40 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +90: 0d a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 0e 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.0 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #1 [8086:27c8] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 16 + Region 4: I/O ports at 5000 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 c8 27 01 00 80 02 02 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 01 50 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.1 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #2 [8086:27c9] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin B routed to IRQ 17 + Region 4: I/O ports at 5020 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 c9 27 01 00 80 02 02 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 21 50 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.2 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #3 [8086:27ca] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin C routed to IRQ 18 + Region 4: I/O ports at 5040 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 ca 27 01 00 80 02 02 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 41 50 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.3 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #4 [8086:27cb] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin D routed to IRQ 19 + Region 4: I/O ports at 5060 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 cb 27 01 00 80 02 02 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 50 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.7 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB2 EHCI Controller [8086:27cc] (rev 02) (prog-if 20 [EHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200b] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 19 + Region 0: Memory at e4344000 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Kernel driver in use: ehci-pci +00: 86 80 cc 27 06 01 90 02 02 20 03 0c 00 00 00 00 +10: 00 40 34 e4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 0b 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 00 a0 20 00 00 00 00 +60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 00 08 e0 +70: 00 00 ff 3f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 11 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 ff 00 ff 00 20 00 00 88 +e0: 00 00 00 00 db b6 6d 00 00 00 00 00 00 00 00 00 +f0: 00 80 00 09 88 85 40 00 86 0f 02 00 0a 17 02 20 + +00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev e2) (prog-if 01 [Subtractive decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Bus: primary=00, secondary=05, subordinate=06, sec-latency=32 + I/O behind bridge: 00002000-00003fff + Memory behind bridge: e0000000-e20fffff + Prefetchable memory behind bridge: 00000000e2100000-00000000e40fffff + Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [50] Subsystem: Device [0000:0000] +00: 86 80 48 24 07 00 10 00 e2 01 04 06 00 00 01 00 +10: 00 00 00 00 00 00 00 00 00 05 06 20 20 30 80 22 +20: 00 e0 00 e2 11 e2 01 e4 00 00 00 00 00 00 00 00 +30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 06 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 +50: 0d 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.0 ISA bridge [0601]: Intel Corporation 82801GBM (ICH7-M) LPC Interface Bridge [8086:27b9] (rev 02) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:2009] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0c <?> + Kernel driver in use: lpc_ich +00: 86 80 b9 27 07 00 10 02 02 00 01 06 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 09 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 05 00 00 80 00 00 00 81 04 00 00 10 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 80 80 80 80 d0 00 00 00 80 80 80 80 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 10 02 0d 1f 01 16 7c 00 e1 15 0c 00 81 16 1c 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: ac 06 00 00 30 00 00 00 13 1c 0a 00 00 03 00 00 +b0: 00 00 f0 00 00 00 00 00 00 00 02 0a 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 33 22 11 00 67 45 00 00 cf ff 00 00 08 00 00 00 +e0: 09 00 0c 10 b4 02 24 17 00 00 00 00 00 00 00 00 +f0: 01 c0 d1 fe 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.1 IDE interface [0101]: Intel Corporation 82801G (ICH7 Family) IDE Controller [8086:27df] (rev 02) (prog-if 8a [Master SecP PriP]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200c] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+ + Latency: 0 + Interrupt: pin C routed to IRQ 16 + Region 0: I/O ports at 01f0 [size=8] + Region 1: I/O ports at 03f4 [size=1] + Region 2: I/O ports at 0170 [size=8] + Region 3: I/O ports at 0374 [size=1] + Region 4: I/O ports at 5080 [size=16] + Kernel driver in use: ata_piix +00: 86 80 df 27 05 00 88 02 02 8a 01 01 00 00 00 00 +10: a9 50 00 00 c9 50 00 00 b1 50 00 00 cd 50 00 00 +20: 81 50 00 00 00 00 00 00 00 00 00 00 aa 17 0c 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 03 00 00 +40: 00 40 00 40 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.2 SATA controller [0106]: Intel Corporation 82801GBM/GHM (ICH7-M Family) SATA Controller [AHCI mode] [8086:27c5] (rev 02) (prog-if 01 [AHCI 1.0]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200d] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 44 + Region 0: I/O ports at 50b8 [size=8] + Region 1: I/O ports at 50d0 [size=4] + Region 2: I/O ports at 50c0 [size=8] + Region 3: I/O ports at 50d4 [size=4] + Region 4: I/O ports at 5090 [size=16] + Region 5: Memory at e4344400 (32-bit, non-prefetchable) [size=1K] + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4142 + Capabilities: [70] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: ahci +00: 86 80 c5 27 07 04 b0 02 02 01 06 01 00 00 00 00 +10: b9 50 00 00 d1 50 00 00 c1 50 00 00 d5 50 00 00 +20: 91 50 00 00 00 44 34 e4 00 00 00 00 aa 17 0d 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 00 02 00 00 +40: 07 a3 00 80 00 00 00 00 01 00 01 00 00 00 00 00 +50: 00 00 00 00 03 30 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 70 01 00 0c 30 e0 fe 42 41 00 00 00 00 00 00 +90: 40 00 15 02 80 01 00 5a 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.3 SMBus [0c05]: Intel Corporation NM10/ICH7 Family SMBus Controller [8086:27da] (rev 02) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200f] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 11 + Region 4: I/O ports at 0400 [size=32] +00: 86 80 da 27 01 01 80 02 02 00 05 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 01 04 00 00 00 00 00 00 00 00 00 00 aa 17 0f 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +01:00.0 Ethernet controller [0200]: Intel Corporation 82573L Gigabit Ethernet Controller [8086:109a] + Subsystem: Lenovo ThinkPad X60s [17aa:207e] + Physical Slot: 0 + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Interrupt: pin A routed to IRQ 45 + Region 0: Memory at e4100000 (32-bit, non-prefetchable) [size=128K] + Region 2: I/O ports at 4000 [size=32] + Capabilities: [c8] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- + Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4182 + Capabilities: [e0] Express (v1) Endpoint, MSI 00 + DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us + ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- + DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ + RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 512 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us + ClockPM+ Surprise- LLActRep- BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + Capabilities: [100 v1] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- + AERCap: First Error Pointer: 14, GenCap- CGenEn- ChkCap- ChkEn- + Capabilities: [140 v1] Device Serial Number 00-16-d3-ff-ff-b6-d0-98 + Kernel driver in use: e1000e +00: 86 80 9a 10 07 04 10 00 00 00 00 02 10 00 00 00 +10: 00 00 10 e4 00 00 00 00 01 40 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 7e 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 22 c8 00 20 00 0f +d0: 05 e0 81 00 0c 30 e0 fe 00 00 00 00 82 41 00 00 +e0: 10 00 01 00 c1 0c 00 00 1f 28 10 00 11 1c 07 00 +f0: 00 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 + +05:00.0 CardBus bridge [0607]: Ricoh Co Ltd RL5c476 II [1180:0476] (rev b4) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 168 + Interrupt: pin A routed to IRQ 16 + Region 0: Memory at e2000000 (32-bit, non-prefetchable) [size=4K] + Bus: primary=05, secondary=06, subordinate=06, sec-latency=176 + Memory window 0: 84000000-87fff000 (prefetchable) + Memory window 1: 88000000-8bfff000 + I/O window 0: 00002000-000020ff + I/O window 1: 00002400-000024ff + BridgeCtl: Parity+ SERR+ ISA- VGA- MAbort- >Reset- 16bInt+ PostWrite+ + 16-bit legacy interface ports at 0001 + Kernel driver in use: yenta_cardbus +00: 80 11 76 04 07 00 10 02 b4 00 07 06 00 a8 82 00 +10: 00 00 00 e2 dc 00 00 02 05 06 06 b0 00 00 00 84 +20: 00 f0 ff 87 00 00 00 88 00 f0 ff 8b 00 20 00 00 +30: fc 20 00 00 00 24 00 00 fc 24 00 00 0b 01 83 05 +40: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 a0 00 00 03 00 00 63 04 63 04 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 b2 00 30 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 0a fe +e0: 00 40 c0 24 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +05:00.1 FireWire (IEEE 1394) [0c00]: Ricoh Co Ltd R5C552 IEEE 1394 Controller [1180:0552] (rev 09) (prog-if 10 [OHCI]) + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 64 (500ns min, 1000ns max) + Interrupt: pin B routed to IRQ 17 + Region 0: Memory at e2001000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [dc] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME+ + Kernel driver in use: firewire_ohci +00: 80 11 52 05 06 00 10 02 09 10 00 0c 00 40 80 00 +10: 00 10 00 e2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 dc 00 00 00 00 00 00 00 0b 02 02 04 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 80 16 00 00 00 00 00 20 00 00 66 66 32 12 +90: 48 60 66 10 00 00 02 00 00 80 00 00 00 01 18 00 +a0: 00 00 00 00 00 00 00 00 20 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 02 fe +e0: 00 c0 00 48 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +05:00.2 SD Host controller [0805]: Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter [1180:0822] (rev 18) + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 64 + Interrupt: pin C routed to IRQ 18 + Region 0: Memory at e2001800 (32-bit, non-prefetchable) [size=256] + Capabilities: [80] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- + Kernel driver in use: sdhci-pci +00: 80 11 22 08 06 00 10 02 18 00 05 08 00 40 80 00 +10: 00 18 00 e2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 02 fe 00 40 00 48 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 02 00 00 00 00 00 00 00 00 00 a0 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: a1 21 80 01 00 00 00 00 40 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 c3 00 20 02 00 00 00 00 + diff --git a/docs/future/dumps/x60_lspcixxxvvnn_factory b/docs/future/dumps/x60_lspcixxxvvnn_factory new file mode 100644 index 00000000..885a7bce --- /dev/null +++ b/docs/future/dumps/x60_lspcixxxvvnn_factory @@ -0,0 +1,842 @@ +00:00.0 Host bridge [0600]: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and 945GT Express Memory Controller Hub [8086:27a0] (rev 03) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:2017] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=09 <?> + Kernel driver in use: agpgart-intel +00: 86 80 a0 27 06 01 90 20 03 00 00 06 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 17 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 90 d1 fe 01 40 d1 fe 05 00 00 f0 01 80 d1 fe +50: 00 00 30 00 19 00 00 00 00 00 00 00 00 00 00 00 +60: 01 00 20 80 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 10 11 11 01 30 11 11 00 ff 03 00 00 80 1a 39 00 +a0: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 04 01 00 00 +e0: 09 00 09 51 02 04 0a 90 0e 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 05 00 10 00 00 00 + +00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller [8086:27a2] (rev 03) (prog-if 00 [VGA controller]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:201a] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 16 + Region 0: Memory at ee100000 (32-bit, non-prefetchable) [size=512K] + Region 1: I/O ports at 1800 [size=8] + Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M] + Region 3: Memory at ee200000 (32-bit, non-prefetchable) [size=256K] + Expansion ROM at <unassigned> [disabled] + Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit- + Address: 00000000 Data: 0000 + Capabilities: [d0] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: i915 +00: 86 80 a2 27 07 00 90 00 03 00 00 03 00 00 80 00 +10: 00 00 10 ee 01 18 00 00 08 00 00 d0 00 00 20 ee +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 1a 20 +30: 00 00 00 00 90 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 48 00 00 00 09 00 09 51 02 04 0a 90 +50: 0e 00 30 00 19 00 00 00 00 00 00 00 00 00 80 7f +60: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 05 d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 03 00 64 34 b2 00 00 00 86 0f 05 00 00 00 00 00 + +00:02.1 Display controller [0380]: Intel Corporation Mobile 945GM/GMS/GME, 943/940GML Express Integrated Graphics Controller [8086:27a6] (rev 03) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:201a] + Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Region 0: Memory at ee180000 (32-bit, non-prefetchable) [size=512K] + Capabilities: [d0] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- +00: 86 80 a6 27 03 00 90 00 03 00 80 03 00 00 80 00 +10: 00 00 18 ee 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 1a 20 +30: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 +40: 00 00 00 00 48 00 00 00 09 00 09 51 02 04 0a 90 +50: 0e 00 30 00 19 00 00 00 00 00 00 00 00 00 80 7f +60: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 03 00 64 34 b2 00 00 00 86 0f 05 00 00 00 00 00 + +00:1b.0 Audio device [0403]: Intel Corporation NM10/ICH7 Family High Definition Audio Controller [8086:27d8] (rev 02) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:2010] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Interrupt: pin B routed to IRQ 46 + Region 0: Memory at ee240000 (64-bit, non-prefetchable) [size=16K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4162 + Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us + ClockPM- Surprise- LLActRep- BwNot- + LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed- WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=1 ArbSelect=Fixed TC/VC=80 + Status: NegoPending- InProgress- + Capabilities: [130 v1] Root Complex Link + Desc: PortNumber=0f ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: snd_hda_intel +00: 86 80 d8 27 06 05 10 00 02 00 03 04 10 00 00 00 +10: 04 00 24 ee 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 10 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 03 00 00 03 00 00 00 00 00 00 00 00 00 80 00 00 +50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 +60: 05 70 81 00 0c 30 e0 fe 00 00 00 00 62 41 00 00 +70: 10 00 91 00 00 00 00 00 00 08 10 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.0 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 1 [8086:27d0] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 + I/O behind bridge: 00002000-00002fff + Memory behind bridge: ee000000-ee0fffff + Prefetchable memory behind bridge: 0000000080000000-00000000801fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #2, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg+ + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- + Changed: MRL- PresDet- LinkState+ + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4191 + Capabilities: [90] Subsystem: Lenovo Device [17aa:2011] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=01 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d0 27 07 05 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 02 02 00 20 20 00 20 +20: 00 ee 00 ee 01 80 11 80 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 04 00 +40: 10 80 41 01 c0 0f 00 00 00 00 10 00 11 2c 11 01 +50: 40 00 11 30 e0 a0 10 00 38 10 40 01 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe 91 41 00 00 00 00 00 00 +90: 0d a0 00 00 aa 17 11 20 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 80 00 00 00 00 +e0: 00 0f c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.1 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 2 [8086:27d2] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 + I/O behind bridge: 00003000-00004fff + Memory behind bridge: e8000000-e9ffffff + Prefetchable memory behind bridge: 00000000e4000000-00000000e40fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #3, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg+ + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41b1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:2011] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=02 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d2 27 07 05 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 03 03 00 30 40 00 20 +20: 00 e8 f0 e9 01 e4 01 e4 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 02 04 00 +40: 10 80 41 01 c0 0f 00 00 00 00 10 00 11 4c 11 02 +50: 00 00 01 10 e0 a0 18 00 38 10 00 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe b1 41 00 00 00 00 00 00 +90: 0d a0 00 00 aa 17 11 20 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 00 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.2 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 3 [8086:27d4] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=04, subordinate=0b, sec-latency=0 + I/O behind bridge: 00005000-00006fff + Memory behind bridge: ea000000-ebffffff + Prefetchable memory behind bridge: 00000000e4100000-00000000e41fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #4, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg+ + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41d1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:2011] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=03 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d4 27 07 05 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 04 0b 00 50 60 00 20 +20: 00 ea f0 eb 11 e4 11 e4 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 03 04 00 +40: 10 80 41 01 c0 0f 00 00 00 00 10 00 11 4c 11 03 +50: 00 00 01 10 e0 a0 20 00 38 10 00 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe d1 41 00 00 00 00 00 00 +90: 0d a0 00 00 aa 17 11 20 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 00 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1c.3 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 4 [8086:27d6] (rev 02) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=0c, subordinate=13, sec-latency=0 + I/O behind bridge: 00007000-00008fff + Memory behind bridge: ec000000-edffffff + Prefetchable memory behind bridge: 00000000e4200000-00000000e42fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited + ExtTag- RBE- FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #5, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg+ + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4122 + Capabilities: [90] Subsystem: Lenovo Device [17aa:2011] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=04 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c001 + Kernel driver in use: pcieport +00: 86 80 d6 27 07 05 10 00 02 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 0c 13 00 70 80 00 20 +20: 00 ec f0 ed 21 e4 21 e4 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 04 04 00 +40: 10 80 41 01 c0 0f 00 00 00 00 10 00 11 4c 11 04 +50: 00 00 01 10 e0 a0 28 00 38 10 00 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe 22 41 00 00 00 00 00 00 +90: 0d a0 00 00 aa 17 11 20 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00 +e0: 00 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.0 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #1 [8086:27c8] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 16 + Region 4: I/O ports at 1820 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 c8 27 01 00 80 02 02 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 21 18 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.1 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #2 [8086:27c9] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin B routed to IRQ 17 + Region 4: I/O ports at 1840 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 c9 27 01 00 80 02 02 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 41 18 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.2 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #3 [8086:27ca] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin C routed to IRQ 18 + Region 4: I/O ports at 1860 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 ca 27 01 00 80 02 02 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 18 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 0f 00 00 03 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.3 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI Controller #4 [8086:27cb] (rev 02) (prog-if 00 [UHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200a] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 19 + Region 4: I/O ports at 1880 [size=32] + Kernel driver in use: uhci_hcd +00: 86 80 cb 27 05 00 80 02 02 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 81 18 00 00 00 00 00 00 00 00 00 00 aa 17 0a 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1d.7 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB2 EHCI Controller [8086:27cc] (rev 02) (prog-if 20 [EHCI]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200b] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 19 + Region 0: Memory at ee444000 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Kernel driver in use: ehci-pci +00: 86 80 cc 27 06 01 90 02 02 20 03 0c 00 00 00 00 +10: 00 40 44 ee 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 0b 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 00 a0 20 00 00 00 00 +60: 20 20 9f 01 00 00 00 00 01 00 00 00 00 00 08 c0 +70: 00 00 dd 3f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 11 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 ff 00 ff 00 20 00 00 88 +e0: 00 00 00 00 db b6 6d 00 00 00 00 00 00 00 00 00 +f0: 00 80 00 09 88 85 40 00 86 0f 02 00 06 17 02 20 + +00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev e2) (prog-if 01 [Subtractive decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Bus: primary=00, secondary=15, subordinate=18, sec-latency=32 + I/O behind bridge: 00009000-0000cfff + Memory behind bridge: e4300000-e7ffffff + Prefetchable memory behind bridge: 00000000e0000000-00000000e3ffffff + Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [50] Subsystem: Lenovo Device [17aa:2013] +00: 86 80 48 24 07 00 10 00 e2 01 04 06 00 00 01 00 +10: 00 00 00 00 00 00 00 00 00 15 18 20 90 c0 80 22 +20: 30 e4 f0 e7 01 e0 f1 e3 00 00 00 00 00 00 00 00 +30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 +50: 0d 00 00 00 aa 17 13 20 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.0 ISA bridge [0601]: Intel Corporation 82801GBM (ICH7-M) LPC Interface Bridge [8086:27b9] (rev 02) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:2009] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0c <?> + Kernel driver in use: lpc_ich +00: 86 80 b9 27 07 00 10 02 02 00 01 06 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 09 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 10 00 00 80 00 00 00 81 11 00 00 10 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 8b 8b 8b 8b 92 00 00 00 8b 8b 8b 8b 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 10 02 0e 1f 01 16 7c 00 e1 15 0c 00 81 16 1c 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 24 02 00 00 30 00 00 00 13 1c 0a 02 00 03 00 00 +b0: 00 00 f0 00 00 00 00 00 00 00 02 0a 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 44 12 11 00 67 45 00 00 c0 ff 00 00 01 00 00 00 +e0: 09 00 0c 10 b4 02 24 17 00 00 00 00 00 00 00 00 +f0: 01 c0 d1 fe 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.1 IDE interface [0101]: Intel Corporation 82801G (ICH7 Family) IDE Controller [8086:27df] (rev 02) (prog-if 8a [Master SecP PriP]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200c] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+ + Latency: 0 + Interrupt: pin C routed to IRQ 16 + Region 0: I/O ports at 01f0 [size=8] + Region 1: I/O ports at 03f4 [size=1] + Region 2: I/O ports at 0170 [size=8] + Region 3: I/O ports at 0374 [size=1] + Region 4: I/O ports at 1810 [size=16] + Kernel driver in use: ata_piix +00: 86 80 df 27 05 00 88 02 02 8a 01 01 00 00 00 00 +10: 01 00 00 00 01 00 00 00 01 00 00 00 01 00 00 00 +20: 11 18 00 00 00 00 00 00 00 00 00 00 aa 17 0c 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 03 00 00 +40: 00 c0 00 40 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.2 SATA controller [0106]: Intel Corporation 82801GBM/GHM (ICH7-M Family) SATA Controller [AHCI mode] [8086:27c5] (rev 02) (prog-if 01 [AHCI 1.0]) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200d] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 45 + Region 0: I/O ports at 18d0 [size=8] + Region 1: I/O ports at 18c4 [size=4] + Region 2: I/O ports at 18c8 [size=8] + Region 3: I/O ports at 18c0 [size=4] + Region 4: I/O ports at 18b0 [size=16] + Region 5: Memory at ee444400 (32-bit, non-prefetchable) [size=1K] + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4152 + Capabilities: [70] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: ahci +00: 86 80 c5 27 07 04 b0 02 02 01 06 01 00 00 00 00 +10: d1 18 00 00 c5 18 00 00 c9 18 00 00 c1 18 00 00 +20: b1 18 00 00 00 44 44 ee 00 00 00 00 aa 17 0d 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +40: 07 a3 00 80 00 00 00 00 01 00 02 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 70 01 00 0c 30 e0 fe 52 41 00 00 00 00 00 00 +90: 40 00 11 10 80 01 00 4a 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +00:1f.3 SMBus [0c05]: Intel Corporation NM10/ICH7 Family SMBus Controller [8086:27da] (rev 02) + Subsystem: Lenovo ThinkPad T60/R60 series [17aa:200f] + Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 11 + Region 4: I/O ports at 18e0 [size=32] +00: 86 80 da 27 01 01 80 02 02 00 05 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: e1 18 00 00 00 00 00 00 00 00 00 00 aa 17 0f 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 + +02:00.0 Ethernet controller [0200]: Intel Corporation 82573L Gigabit Ethernet Controller [8086:109a] + Subsystem: Lenovo ThinkPad X60s [17aa:207e] + Physical Slot: 2 + Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 44 + Region 0: Memory at ee000000 (32-bit, non-prefetchable) [disabled] [size=128K] + Region 2: I/O ports at 2000 [disabled] [size=32] + Capabilities: [c8] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D3 NoSoftRst- PME-Enable+ DSel=0 DScale=1 PME- + Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4182 + Capabilities: [e0] Express (v1) Endpoint, MSI 00 + DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us + ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- + DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ + RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 512 bytes + DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ TransPend- + LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us + ClockPM+ Surprise- LLActRep- BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + Capabilities: [100 v1] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- + AERCap: First Error Pointer: 14, GenCap- CGenEn- ChkCap- ChkEn- + Capabilities: [140 v1] Device Serial Number 00-16-d3-ff-ff-b6-d0-98 + Kernel driver in use: e1000e +00: 86 80 9a 10 00 05 10 00 00 00 00 02 10 00 00 00 +10: 00 00 00 ee 00 00 00 00 01 20 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 7e 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 22 c8 03 21 00 0f +d0: 05 e0 81 00 0c 30 e0 fe 00 00 00 00 82 41 00 00 +e0: 10 00 01 00 c1 0c 00 00 1f 28 1a 00 11 1c 07 00 +f0: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 + +15:00.0 CardBus bridge [0607]: Ricoh Co Ltd RL5c476 II [1180:0476] (rev b4) + Subsystem: Lenovo ThinkPad X60s [17aa:201c] + Physical Slot: 1 + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 168 + Interrupt: pin A routed to IRQ 16 + Region 0: Memory at e4300000 (32-bit, non-prefetchable) [size=4K] + Bus: primary=15, secondary=16, subordinate=17, sec-latency=176 + Memory window 0: e0000000-e3fff000 (prefetchable) + Memory window 1: f4000000-f7fff000 + I/O window 0: 00009000-000090ff + I/O window 1: 00009400-000094ff + BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset- 16bInt+ PostWrite+ + 16-bit legacy interface ports at 0001 + Kernel driver in use: yenta_cardbus +00: 80 11 76 04 07 00 10 02 b4 00 07 06 00 a8 82 00 +10: 00 00 30 e4 dc 00 00 02 15 16 17 b0 00 00 00 e0 +20: 00 f0 ff e3 00 00 00 f4 00 f0 ff f7 00 90 00 00 +30: fc 90 00 00 00 94 00 00 fc 94 00 00 0b 01 80 05 +40: aa 17 1c 20 01 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 a0 04 00 03 00 00 63 04 63 04 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 b2 00 30 00 00 00 00 00 00 +c0: aa 17 1c 20 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 0a fe +e0: 00 40 c0 24 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +15:00.1 FireWire (IEEE 1394) [0c00]: Ricoh Co Ltd R5C552 IEEE 1394 Controller [1180:0552] (rev 09) (prog-if 10 [OHCI]) + Subsystem: Lenovo ThinkPad X60s [17aa:201e] + Physical Slot: 1 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 64 (500ns min, 1000ns max) + Interrupt: pin B routed to IRQ 17 + Region 0: Memory at e4301000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [dc] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME+ + Kernel driver in use: firewire_ohci +00: 80 11 52 05 06 00 10 02 09 10 00 0c 00 40 80 00 +10: 00 10 30 e4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 1e 20 +30: 00 00 00 00 dc 00 00 00 00 00 00 00 0b 02 02 04 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 80 80 16 00 00 00 00 00 20 00 00 66 66 32 12 +90: 48 60 66 10 00 00 02 00 50 80 00 00 00 01 18 00 +a0: 00 00 00 00 00 00 00 00 20 00 00 00 aa 17 1e 20 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 02 c8 +e0: 00 c0 00 48 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +15:00.2 SD Host controller [0805]: Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter [1180:0822] (rev 18) + Subsystem: Lenovo ThinkPad X60s [17aa:201d] + Physical Slot: 1 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 64 + Interrupt: pin C routed to IRQ 18 + Region 0: Memory at e4301800 (32-bit, non-prefetchable) [size=256] + Capabilities: [80] Power Management version 2 + Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- + Kernel driver in use: sdhci-pci +00: 80 11 22 08 06 00 10 02 18 00 05 08 00 40 80 00 +10: 00 18 30 e4 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 1d 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 00 02 fe 00 40 00 48 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 1d 20 +b0: 00 00 02 00 00 00 00 00 00 00 00 00 a0 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: a1 21 80 01 00 00 00 00 40 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 c3 00 20 02 00 00 00 00 + diff --git a/docs/future/gnutoo_fallback_patch b/docs/future/gnutoo_fallback_patch new file mode 100644 index 00000000..88658fbd --- /dev/null +++ b/docs/future/gnutoo_fallback_patch @@ -0,0 +1,182 @@ +<GNUtoo-irssi> I documented it +<GNUtoo-irssi> but I should update the page +<GNUtoo-irssi> somehow it works without any but one of my extra patches +<GNUtoo-irssi> but it has 1 small issue +<phcoder-1creen> GNUtoo-irssi: do you need review on those? I think that sth like it could save me countless external reflashs +<GNUtoo-irssi> phcoder-1creen: well, most of them are unnecessary now +<GNUtoo-irssi> 1 patch is usefull only for improving code readability of existing coreboot code +<GNUtoo-irssi> 1 patch is only changing the reboot count of the fallback mecanism +<GNUtoo-irssi> beside that I see nothing remaining +<GNUtoo-irssi> but I can check again +<GNUtoo-irssi> I have to do it now +<GNUtoo-irssi> The documentation is on the wiki +<GNUtoo-irssi> caveats: +<GNUtoo-irssi> 1) sometimes the x60 reboots twice, +<GNUtoo-irssi> for instance if you run poweroff, then let it power down, and as soon as it seems powered down, you press the power button +<GNUtoo-irssi> in that case it will do a reset +<GNUtoo-irssi> 2) suspend/resume and userspace needs some handling, I've systemd units for booting only, but not for suspend/resume +<GNUtoo-irssi> but you can do it by hand +<GNUtoo-irssi> config MAX_REBOOT_CNT +<GNUtoo-irssi> <tab>int +<GNUtoo-irssi> <tab>default 1 +<GNUtoo-irssi> that's what I added in src/mainboard/lenovo/x60/Kconfig +<GNUtoo-irssi> before I had a patch to make it selectable it in Kconfig, +<GNUtoo-irssi> that is to say the user enter the max reboot count he wants +<GNUtoo-irssi> I think the global default is 3 +<GNUtoo-irssi> Then I've some other interesting patches +<GNUtoo-irssi> I wonder if they're acceptable +<GNUtoo-irssi> one patch is for adding etc/grub.cfg from Kconfig +<GNUtoo-irssi> Use case: the user builds once, he do ./build/cbfstool ./build/coreboot.rom add -n etc/grub.cfg -f grub.cfg -t raw +<GNUtoo-irssi> but he re-do make +<GNUtoo-irssi> and forgett to re-add grub.cfg +<GNUtoo-irssi> it's just a convenience +<GNUtoo-irssi> (he could do it with a script too) +<GNUtoo-irssi> *he/she +<GNUtoo-irssi> I guess the user is a she in english? +<GNUtoo-irssi> en french it's a he +<GNUtoo-irssi> I've also a flashrom patch to submit +<GNUtoo-irssi> phcoder-1creen: "it could save me countless external reflashs" => that was exactly my use case +<GNUtoo-irssi> There are some other interesting stuff that could extend the use case: +<GNUtoo-irssi> there is a flash log for the chromebooks +<GNUtoo-irssi> example use case: you go to a conference in the USA, you are in the plane +<GNUtoo-irssi> you then continue developing there, you reflash etc... +<GNUtoo-irssi> but then you need the log of the failed boot somehow +<GNUtoo-irssi> the flash log (which is in coreboot but require CONFIG_CHROMEOS or something like that) could help with that second use case +<GNUtoo-irssi> Else the logs in RAM + a watchdog could also do the trick +<GNUtoo-irssi> *hardware watchdog +<GNUtoo-irssi> so that second approach of the second use case would just require some modifications related to cbmem +<GNUtoo-irssi> they may already be there, because I'm way out of the loop +<GNUtoo-irssi> I'll make a list of the interesting patches I have locally +<GNUtoo-irssi> and look at gerrit too +<GNUtoo-irssi> btw, is there some easy infrastructure work to do? +<GNUtoo-irssi> like something that can be done on the side +* ttyS3 has quit (Ping timeout: 264 seconds) +<GNUtoo-irssi> The x60[s/t], T60(with intel GPUs), are mostly complete, the main issue remaining is merging that improved GPU init code +<GNUtoo-irssi> fallback/ is mostly merged but that one patch I was talking about +<GNUtoo-irssi> then I guess the ACPI part was merged +<GNUtoo-irssi> I'm unsure about the IRDA +<GNUtoo-irssi> I mostly test on x60t nowadays +<GNUtoo-irssi> (my t60 has a nasty bug with ctrl+d, probably ec related) +<GNUtoo-irssi> I've also to look about the security of the I/Os +<GNUtoo-irssi> (like what's on the dock connector) +<GNUtoo-irssi> there is also the license issue of the microcodes inside the headers +<GNUtoo-irssi> I'll add all that in the wiki +<phcoder-1creen> GNUtoo-irssi: did you test digitizer? +<GNUtoo-irssi> yes +<GNUtoo-irssi> works well with libreboot 6 beta3 patches on top of coreboot git +<GNUtoo-irssi> I use it often +<GNUtoo-irssi> with xournal mainly +<GNUtoo-irssi> I've been in a local shop and I've found a compatilble wacom pen: it has: +<GNUtoo-irssi> touch, button(right click), eraser +<GNUtoo-irssi> all do work +<GNUtoo-irssi> the pen is not the x60 pen, but it does work fine +<phcoder-1creen> digitizer patches are already in +<GNUtoo-irssi> The screen's directional keys the its middle key work +<GNUtoo-irssi> yes +<GNUtoo-irssi> I'll update soon +<GNUtoo-irssi> I'll probably sumarize the patch I've left in the wiki +<GNUtoo-irssi> and update that fallback page +<GNUtoo-irssi> phcoder-1creen: is the IRDA supposed to work? +<phcoder-1creen> GNUtoo-irssi: 5243 +<phcoder-1creen> T60, rght? +* KidBeta has quit (Quit: My MacBook Pro has gone to sleep. ZZZzzz…) +<GNUtoo-irssi> x60 and x60t +<GNUtoo-irssi> oops +<GNUtoo-irssi> x60t and t60 +<GNUtoo-irssi> I'll test them together, I was trying lirc instead directlyt +<phcoder-1creen> 5242 for X60 +<GNUtoo-irssi> ok +<GNUtoo-irssi> thanks +<phcoder-1creen> GNUtoo-irssi: did you see x200 port? +<GNUtoo-irssi> yes +<GNUtoo-irssi> what CPU is it? +<GNUtoo-irssi> and what chipset? +<phcoder-1creen> gm45. Intel GPU +<GNUtoo-irssi> ok +<GNUtoo-irssi> I've looked at your new ports and related, +<GNUtoo-irssi> it probably cover the chipset I have in my N71JQ +<GNUtoo-irssi> but I probably don't have time to do the port anytime soon +<phcoder-1creen> gm45 was already covered by rk9 +<GNUtoo-irssi> yes +<GNUtoo-irssi> it's core 2 duo with the first AMT in the NICs, right? +<GNUtoo-irssi> and 64bit? +<phcoder-1creen> it's 64bit. I can't tell anything about AMT. +<GNUtoo-irssi> so I guess that if someone unsolder his nic firmware flash, the AMT is gone? +<GNUtoo-irssi> ok +<GNUtoo-irssi> if so that's probably a good tradeoff +<GNUtoo-irssi> you get more recent laptops at the cost of unsoldering or blanking the NIC's flash +<phcoder-1creen> ME firmware is in the flash chip. There is information that on gm45 you can remove ME firmware without any consequences but I din't really try +<GNUtoo-irssi> assuming it's like with the old i945 laptops +<GNUtoo-irssi> ok, wow, nice +<GNUtoo-irssi> how fast is it in between the T60's and the Nehalem's laptops(x201) +<phcoder-1creen> roda rk9 runs without ME firmware AFACIT +<GNUtoo-irssi> ok +<GNUtoo-irssi> about roda and so on, there isn't a lot of infos on the rugged laptops +<GNUtoo-irssi> I guess that nobody still test on them +<phcoder-1creen> No. But the list of connectors they have is truly impressive. As is battery capacity and heaviness. +<GNUtoo-irssi> indeed +<GNUtoo-irssi> it probably has lot of interesting peripherals too, like GPS, 3g modem(how is it connected?) and so on +<GNUtoo-irssi> for the heavyness, it's a way to make geeks become like rambo? +<GNUtoo-irssi> s/geeks/geeks and nerds +<phcoder-1creen> 3g modems are optional. I guess it's minipcie slot. +<phcoder-1creen> BTW x200 has 3 minipcie slots +<GNUtoo-irssi> wow +<phcoder-1creen> (not counting exprecsscard) +<GNUtoo-irssi> ok +<GNUtoo-irssi> that permits to have 2 wifi cards... +<phcoder-1creen> if driver can handle it, sure. When I tried with 2 intel cards, intel drivers and networkmanager got confused. +<GNUtoo-irssi> (ath9k/ath5k have some difficulties when creating multiples interfaces when WPA is involved) +<GNUtoo-irssi> ok +<phcoder-1creen> 3rd minipcie was intended for UWB. +<GNUtoo-irssi> well, I have multiples cards easily here +<GNUtoo-irssi> I never had a problem with non-intel cards +<phcoder-1creen> network manager will still get confused +<GNUtoo-irssi> example: ath9k + ath9k_htc => both interfaces appear in kde's network manager GUI +<GNUtoo-irssi> it was getting confused with intel cards and rfkill +<GNUtoo-irssi> (and I lacked the fimrware of the intel cards...so that added to the confusion) +<GNUtoo-irssi> Example use case: connect to 2 different AP on 2 different networks +<phcoder-1creen> yes network manager and multiple cards and rfkill resultsin confusion +<GNUtoo-irssi> my ath9k_htc is usb +<GNUtoo-irssi> so no hardware rfkill +<GNUtoo-irssi> btw, the mini-pcie connectors do export only pci? +<GNUtoo-irssi> do they export usb, and sata? +<GNUtoo-irssi> (and some other pins for rfkill, SIM card, and so on) + + + + + + + +<GNUtoo-irssi> ok +<GNUtoo-irssi> well, I must update the instructions +<GNUtoo-irssi> I was going trough the list of patches I had first +<GNUtoo-irssi> yes +<GNUtoo-irssi> but to a specific/personal page +<vimuser> could you link me to the updated instructions? (when done) +<GNUtoo-irssi> well, I'll update them first +<GNUtoo-irssi> I was going trough my patches list before that +<GNUtoo-irssi> so I'll do that now +<vimuser> So I gather that you basically reset the counter yourself after you boot (after typing grub password) +<vimuser> and so, if you boot and the counter is higher, you know if someone tried to use it +<GNUtoo-irssi> yes, my systemd unit does it +<GNUtoo-irssi> *resets it +<GNUtoo-irssi> so it works like that: +<GNUtoo-irssi> the bootblock switch from normal/ to fallback if the counter is > CONFIG_MAX_REBOOT_CNT +<GNUtoo-irssi> if no normal/ is there it also switch to fallback/ +<GNUtoo-irssi> and then it increments the counter +<GNUtoo-irssi> (it's badly explained by me but you get the idea) +<GNUtoo-irssi> then my systemd units reset the counter to 0 once it's fully booted +<GNUtoo-irssi> that way if it fails, let's say at booting any linux kernel, then the user won't have bricked the laptop +<GNUtoo-irssi> (and the developer will have saved lot of time) +<GNUtoo-irssi> the issue is that I didn't reset the counter at resume +<GNUtoo-irssi> I should look how +<GNUtoo-irssi> but at least that makes it developer friendly if the user don't have suspend-resume covered yet +<GNUtoo-irssi> testing images is then a lot faster +<GNUtoo-irssi> and for "production", only fallback/ populated, but with the mecanism in place +<GNUtoo-irssi> that way he can test normal/ easily + + + + + diff --git a/docs/future/index.html b/docs/future/index.html new file mode 100644 index 00000000..1a629865 --- /dev/null +++ b/docs/future/index.html @@ -0,0 +1,599 @@ +<!DOCTYPE html> +<html lang="en"> +<head> + <meta charset="utf-8"> + <title>libreboot tutorials</title> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <meta name="viewport" content="width=device-width, initial-scale=1.0"> + <meta name="author" content="glugman"> + <meta name="description" content="tutorials for libreboot, the reboot library."> + <meta name="robots" content="all"> +</head> + +<body> + + <div class="section"> + + <h1 id="pagetop">Development notes</h1> + <p> + These are development notes, for future use. For old (obselete) notes, see <a href="old.html">old.html</a>. + </p> + <p> + Or go <a href="../tasks.html">back to main task list</a>. + </p> + + </div> + + <div class="section"> + + <h1>Table of contents</h1> + <ul> + <li><a href="#standard_test">Standard test</a></li> + <li><a href="#t60_cpu_microcode">T60 cpu microcode</a></li> + <li><a href="#i945_vram_size">i945 VRAM size</a></li> + <li><a href="#lcd_i945_incompatibility">LCD panels on i945 - fix incompatible panels</a></li> + <li><a href="#i945_vbt">i945 X60/T60 VBT implementation (experimental: testing)</a></li> + <li><a href="#intelvbttool_results">IntelVbtTool results</a></li> + <li><a href="#fallback_patches">Fallback patches for i945</a></li> + </ul> + + </div> + + <div class="section"> + + <h1 id="standard_test">standard test</h1> + <p> + These logs are usually obtained when testing changes related to graphics on i945 (X60 and T60). + </p> + <ul> + <li> + Make a copy of these files: + <ul> + <li>/var/log/dmesg</li> + <li>/var/log/kern.log</li> + <li>/var/log/Xorg.0.log</li> + <li>/proc/ioports</li> + <li>/proc/iomem</li> + <li>/sys/class/drm/card0/error</li> + </ul> + </li> + <li> + Record these outputs: + <ul> + <li>sudo intel_reg_dumper</li> + <li>uname -r</li> + <li>lspci -vvvvnnnnxxxx</li> + <li>sudo modprobe msr</li> + <li>sudo inteltool -a</li> + <li>sudo cbmem -c</li> + </ul> + </li> + <li> + Try some 3D games with latest kernel. + </li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="t60_cpu_microcode">T60 cpu microcode</h1> + + <p> + TODO: T60: find (for rare buggy CPUs that are unstable without microcode updates) if there is a workaround (patched kernel, special parameter, etc) So far, only 1 processor has been found to have issues. See microcode errata sheets http://download.intel.com/design/mobile/SPECUPDT/31407918.pdf and http://download.intel.com/design/mobile/SPECUPDT/30922214.pdf and then look at the debugging results collected in <a href="../t7200q">t7200q</a> directory (q means quirk). + </p> + + <p> + Every other T7200 tested so far has worked without microcode updates. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="i945_vram_size">i945 VRAM size</h1> + + <p> + Apparently, only 8MB VRAM is available on i945 GPUs (though it could do 64MB):<br/> + phcoder: No. Hardware default is 8 MiB. When I wanted to make it configurable, I saw that docs mention only one other alternative: 1MiB. Later isn't event enough for 1024x768 at 24bpp without any acceleration or double buffering. It's possible that there are undocumented values. Which options do you have in vendor BIOS? + How to find out how much vram you have:<br/> + phcoder: TOM - BSM<br/> + phcoder: check what vendor BIOS offers as options<br/> + vimuser: I thought it could do 64MB usually<br/> + phcoder: not accorging to doc.<br/> + phcoder: see mobile-945-express-chipset-datasheet page 93<br/> + phcoder: see also src/northbridge/intel/i945/{early_init,northbridge,gma}.c<br/> + vimuser: "011 = DVMT (UMA) mode, 8 MB of memory pre-allocated for<br/> + vimuser: frame buffer."<br/> + vimuser: "Others - reserved"<br/> + phcoder: the easiest way is a loop at this position which tries different values and reads (and prints) BSM with them<br/> + stefanct: vimuser: they suggest that you change the value and look how BSM reacts to that<br/> + stefanct: as they pointed out earlier vram size = TOM - BSM<br/> + stefanct: different values of GMS<br/> + stefanct: phcoder: hm... this could be a hint. look at the text description of TOLUD at page 103<br/> + stefanct: it mentions 64 MB in the text about BSM as well<br/> + stefanct: table 18...<br/> + phcoder: stefanct: I have a guess which value make is 64 but I will not tell to avoid skewing test results<br/> + stefanct: phcoder: sure... i assumed you were not sure if it supports it at all. testing it properly is of course a good idea :)<br/> + stefanct: test the various possible (but reserved) values of GMS and see what the resulting VRAM size is<br/> + vimuser: so, TOM - BSM + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h1 id="lcd_i945_incompatibility">LCD panels on i945 - fix incompatible panels</h1> + + <p> + Fix T60 issues (see incompatible panels listed at <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a>). + </p> + + <p> + Run that tool (resources/utilities/i945gpu/intel-regs.py) as root on systems with the offending panels in: + </p> + <ul> + <li>Coreboot (or libreboot, whatever) with VBIOS (disable native graphics also)</li> + <li>(Factory BIOS also?)</li> + </ul> + + <p> + This shows values in devicetree.cb and src/northbridge/intel/i945/gma.c, the idea is that you run it on factory bios or vbios + and that it will (might) show different values: then you try those in the native graphics (in libreboot). + </p> + + <p> + Other values/registers might also need to be added to the script for these tests. + </p> + + <p> + check if intel_bios_reader from intel-gpu-tools reports the same value (BIOS has a hardcoded value) for PWM modulation frequency. + This file can read the VBIOS (64K dump). + </p> + + <p> + Check other tools in intel-gpu-tools aswell, compare outputs. Possibly add more information to intel-regs.py output (submit changes to mtjm). + Do oprom trace / replay (<a href="http://www.coreboot.org/User:GNUtoo#How_to_get_rid_of_the_vbios_of_the_x60_.5BNew_Version.5D">http://www.coreboot.org/User:GNUtoo#How_to_get_rid_of_the_vbios_of_the_x60_.5BNew_Version.5D</a>) + </p> + + <p> + Study how EDID works and how gma.c handles it. + </p> + + <p> + Original getregs.py script can be found at <a href="http://hg.mtjm.eu/scripts/file/tip/intel-regs.py">http://hg.mtjm.eu/scripts/file/tip/intel-regs.py</a> + written by Michał Masłowski. + </p> + + <p> + About fixing remaining LCD panels on 5345:<br/> + 'polarity' is mentioned in coreboot log (cbmem -c). compare output (with working and non-working panel). (and see the other notes in docs/future/index.html) + </p> + <p> + There was a theory that working panels are + 6bpc (bits per colour) and nonworking are + 8bpc, but all EDIDs that we have here are + for 6bpc panels. + </p> + <p>We should compare coreboot logs + (from <code>cbmem -c</code> from systems with + working and nonworking panels.</p> + <p>How to dump EDID:</p> + <p> + # <b>apt-get install i2c-tools</b><br/> + # <b>modprobe i2c-dev</b><br/> + Find out the correct ID to use:<br/> + # <b>i2cdetect -l</b><br/> + Example:<br/> + # <b>i2cdump -y 2 0x50</b> + </p> + + <p> + Working panel: EDID dump from LG-Philips LP150E05-A2K1: + </p> +<pre> +No size specified (using byte-data access) + 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef +00: XX ff ff ff ff ff ff 00 30 ae 43 40 00 00 00 00 X.......0?C@.... +10: 00 0f 01 03 80 1e 17 78 ea af 00 99 58 53 8c 2a .??????x??.?XS?* +20: 25 50 54 21 08 00 81 80 01 01 01 01 01 01 01 01 %PT!?.?????????? +30: 01 01 01 01 01 01 30 2a 78 20 51 1a 10 40 30 70 ??????0*x Q??@0p +40: 13 00 31 e4 10 00 00 18 28 23 78 20 51 1a 10 40 ?.1??..?(#x Q??@ +50: 30 70 13 00 31 e4 10 00 00 18 00 00 00 0f 00 90 0p?.1??..?...?.? +60: 43 32 90 43 28 14 06 00 32 0c 00 00 00 00 00 fe C2?C(??.2?.....? +70: 00 4c 50 31 35 30 45 30 35 2d 41 32 0a 20 00 9b .LP150E05-A2? .? +80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +</pre> + + <p> + Working panel: EDID dump from Boe-Hydis HT14P12-100 FRU: 13N7061 (Inverter FRU: 41W1010) + </p> + +<pre> + 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef +00: 00 ff ff ff ff ff ff 00 30 ae 22 40 00 00 00 00 ........0?"@.... +10: 00 0f 01 03 80 1c 15 78 ea af 40 95 56 4a 8f 25 .??????x??@?VJ?% +20: 20 50 54 21 08 00 81 80 01 01 01 01 01 01 01 01 PT!?.?????????? +30: 01 01 01 01 01 01 30 2a 78 20 51 1a 10 40 30 70 ??????0*x Q??@0p +40: 13 00 1d d6 10 00 00 19 25 23 78 20 51 1a 10 40 ?.???..?%#x Q??@ +50: 30 70 13 00 1d d6 10 00 00 19 00 00 00 0f 00 90 0p?.???..?...?.? +60: 43 32 90 43 28 0f 01 00 09 e5 00 00 00 00 00 fe C2?C(??.??.....? +70: 00 48 54 31 34 50 31 32 2d 31 30 30 0a 20 00 3f .HT14P12-100? .? +80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +</pre> + +<p>LTN141XA-L01: revert to libreboot git commit c943281 to see this</p> + + <p> + <b>Non-</b>working panel: EDID dump from Samsung LTN150XG-L08: + </p> +<pre> + 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef +00: 00 ff ff ff ff ff ff 00 30 ae 40 40 00 00 00 00 ........0?@@.... +10: 00 0f 01 03 80 1f 17 78 ea 2d 05 97 57 51 8a 27 .??????x?-??WQ?' +20: 23 50 54 21 08 00 01 01 01 01 01 01 01 01 01 01 #PT!?.?????????? +30: 01 01 01 01 01 01 64 19 00 40 41 00 26 30 18 88 ??????d?.@A.&0?? +40: 36 00 30 e4 10 00 00 19 28 15 00 40 41 00 26 30 6.0??..?(?.@A.&0 +50: 18 88 36 00 30 e4 10 00 00 19 00 00 00 0f 00 61 ??6.0??..?...?.a +60: 43 32 61 43 28 14 01 00 4c a3 58 47 00 00 00 fe C2aC(??.L?XG...? +70: 00 4c 54 4e 31 35 30 58 47 2d 4c 30 38 0a 00 6d .LTN150XG-L08?.m +80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +</pre> + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="i945_vbt">i945 gfx: X60/T60 VBT implementation (experimental: testing)</h1> + + <p> + intel_bios_dumper in intel-gpu-tools seems interesting. + </p> + <p> + <b>Use 'drm.debug=0x06' kernel parameter when booting in grub!</b> + </p> + <p> + Before each test run, boot a live USB and delete the old logs in /var/log (kernel log, xorg log, dmesg and so on). + </p> + <p> + Load (from the ROM) the runningvga.bin for each LCD panel on each system; do not execute it, only load it! (coreboot will have to be modified). + Rename the ROM appropriately, based on the system name and the panel name. coreboot_nativegfx_5868_plusrunningvga_t60_14_LTD141ECMB.rom, + for instance. Keep a copy for later use. + </p> + + <p>You are supposed to:</p> + <ul> + <li>enable native graphics in menuconfig</li> + <li>include the self-modified VGA ROM (load, but not execute) - for reverse engineering the correct VBT tables.</li> + </ul> + + <p> + With each boot, make notes about what you see and get logs using the <a href="#standard_test">standard test</a>. + You will need the files from <a href="#intelvbttool_results">#intelvbttool_results</a> for each system. + </p> + + Results (# means untested): + <ul> + <li> + <b>X60/X60s:</b> + <ul> + <li>TMD-Toshiba LTD121ECHB: #</li> + <li>CMO N121X5-L06: #</li> + <li>Samsung LTN121XJ-L07: #</li> + <li>BOE-Hydis HT121X01-101: #</li> + </ul> + </li> + <li> + <b>X60T XGA:</b> + <ul> + <li>BOE-Hydis HV121X03-100: #</li> + </ul> + </li> + <li> + <b>X60T SXGA+:</b> + <ul> + <li>BOE-Hydis HV121P01-100: #</li> + </ul> + </li> + <li> + <b>T60 14" XGA:</b> + <ul> + <li>Samsung LTN141XA-L01: #</li> + <li>CMO N141XC: #</li> + <li>BOE-Hydis HT14X14: #</li> + <li>TMD-Toshiba LTD141ECMB: #</li> + </ul> + </li> + <li> + <b>T60 14" SXGA+</b> + <ul> + <li>TMD-Toshiba LTD141EN9B: #</li> + <li>Samsung LTN141P4-L02: #</li> + <li>Boe-Hydis HT14P12: #</li> + </ul> + </li> + <li> + <b>T60 15" XGA</b> + <ul> + <li>Samsung LTN150XG-L08: #</li> + <li>LG-Philips LP150X09: #</li> + <li>13N7068 (IDtech): #</li> + <li>13N7069 (CMO): #</li> + + </ul> + </li> + <li> + <b>T60 15" SXGA+</b> + <ul> + <li>LG-Philips LP150E05-A2K1: #</li> + <li>BOE-Hydis HV150P01-100: #</li> + </ul> + </li> + <li> + <b>T60 15" UXGA</b> + <ul> + <li>BOE-Hydis HV150UX1-100: #</li> + <li>IDTech N150U3-L01: #</li> + <li>BOE-Hydis HV150UX1-102: #</li> + </ul> + </li> + <li> + <b>T50 15" QXGA</b> + <ul> + <li>IDtech IAQX10N: #</li> + <li>IDtech IAQX10S: #</li> + </ul> + </li> + </ul> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="intelvbttool_results">intelvbttool test results (VGA ROM dumps)</h1> + <p> + The VBIOS on i945 (intel gpu) platforms is self-modifying; that is, + its contents change when you run it. intelvbttool takes a dump of + the currently running vbios, and parses it. + </p> + + <p> + The idea is that we can extract the VBT tables using this knowledge, on the X60, X60 Tablet and T60 (Intel GPU). + </p> + + <p> + Here is an example of how VBT was implemented on the ThinkPad X230: + <a href="http://review.coreboot.org/#/c/5396">http://review.coreboot.org/#/c/5396</a>. + </p> + + <p> + You'll need to build a T60 ROM with SeaBIOS and the VGA ROM (for Intel GPU). An X60 ROM is also needed (same configuration, using the VGA ROM for X60). + </p> + + <p> + T60 has DVI on its dock, make sure that the dock is attached when getting this output. + </p> + + <p> + Get intelvbttool here: <a href="http://review.coreboot.org/#/c/5842">http://review.coreboot.org/#/c/5842</a> (util/intelvbttool). + </p> + + <p> + Now dump a copy of the running VGA BIOS: + <b>$ sudo dd if=/dev/mem bs=64k of=runningvga.bin skip=12 count=1</b><br/> + Then do (and record the output):<br/> + <b>$ ./intelvbttool runningvga.bin > intelvbttool_out</b> + </p> + + <p> + Backup both files (runningvga.bin and intelvbttool_out), renaming them to match the system and LCD panel used. + <a href="../misc/index.html#get_edid_panelname">../misc/index.html#get_edid_panelname</a> will show you how to get the name (model) of the LCD panel used. + </p> + + <h2>Test results (# means untested and all had docks, unless noted).</h2> + + <ul> + <li> + <b>X60/X60s:</b> + <ul> + <li>TMD-Toshiba LTD121ECHB: #</li> + <li>CMO N121X5-L06: #</li> + <li>Samsung LTN121XJ-L07: #</li> + <li>BOE-Hydis HT121X01-101: #</li> + </ul> + </li> + <li> + <b>X60T XGA (1024x768):</b> + <ul> + <li>BOE-Hydis HV121X03-100: #</li> + </ul> + </li> + <li> + <b>X60T SXGA+ (1400x1050):</b> + <ul> + <li>BOE-Hydis HV121P01-100: #</li> + </ul> + </li> + <li> + <b>T60 14" XGA (1024x768):</b> + <ul> + <li>Samsung LTN141XA-L01: #</li> + <li>CMO N141XC: #</li> + <li>BOE-Hydis HT14X14: #</li> + <li>TMD-Toshiba LTD141ECMB: #</li> + </ul> + </li> + <li> + <b>T60 14" SXGA+ (1400x1050):</b> + <ul> + <li>TMD-Toshiba LTD141EN9B: #</li> + <li>Samsung LTN141P4-L02: #</li> + <li>Boe-Hydis HT14P12: #</li> + </ul> + </li> + <li> + <b>T60 15" XGA (1024x768):</b> + <ul> + <li>Samsung LTN150XG-L08: #</li> + <li>LG-Philips LP150X09: #</li> + <li>13N7068 (IDtech): #</li> + <li>13N7069 (CMO): #</li> + </ul> + </li> + <li> + <b>T60 15" SXGA+ (1400x1050):</b> + <ul> + <li>LG-Philips LP150E05-A2K1: #</li> + <li>BOE-Hydis HV150P01-100: #</li> + </ul> + </li> + <li> + <b>T60 15" UXGA (1600x1200):</b> + <ul> + <li>BOE-Hydis HV150UX1-100: #</li> + <li>IDTech N150U3-L01: #</li> + <li>BOE-Hydis HV150UX1-102: #</li> + </ul> + </li> + <li> + <b>T60 15" QXGA (2048x1536):</b> + <ul> + <li>IDtech IAQX10N: #</li> + <li>IDtech IAQX10S: #</li> + </ul> + </li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="fallback_patches">Fallback patches</h1> + + <ul> + <li> + Todo: test gnutoo's fallback patches: <a href="http://www.coreboot.org/Fallback_mechanism">http://www.coreboot.org/Fallback_mechanism</a> + (some parts use systemd. adapt for upstart, which is what trisquel uses)<br/> + see <a href="gnutoo_fallback_patch">this IRC log</a> (warning, not cleaned up) + </li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="other">Other - unlisted (low priority)</h1> + + <ul> + <li> + PTE errors still exist on i945 with 6718 (which is merged). <a href="http://review.coreboot.org/#/c/6718/">http://review.coreboot.org/#/c/6718/</a> + <ul> + <li><a href="future/dumps/pte_x60_6718/dmesg">dmesg</a></li> + <li><a href="future/dumps/pte_x60_6718/kern.log">kern.log</a></li> + <li>This doesn't seem to cause any issues for general use.</li> + </ul> + </li> + <li> + Implement INT 10H support in i945 native graphics. (this will be a lot of work. SeaBIOS has code for some geode boards, to get a general idea). + </li> + <li> + T60 15" QXGA (2048x1536): fixed issue where GRUB wouldn't show any graphics. (Not many people have this panel) + <ul> + <li>It might be the same issue I ran into with Paul on the X60 (not enough memory being allocated) since the same code works on T60 SXGA+ and UXGA, where GRUB actually display graphics.</li> + </ul> + </li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/future/old.html b/docs/future/old.html new file mode 100644 index 00000000..8e490c55 --- /dev/null +++ b/docs/future/old.html @@ -0,0 +1,319 @@ +<!DOCTYPE html> +<html lang="en"> +<head> + <meta charset="utf-8"> + <title>libreboot tutorials</title> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <meta name="viewport" content="width=device-width, initial-scale=1.0"> + <meta name="author" content="glugman"> + <meta name="description" content="tutorials for libreboot, the reboot library."> + <meta name="robots" content="all"> +</head> + +<body> + + <div class="section"> + + <h1 id="pagetop">Development notes (old/obsolete notes)</h1> + <p> + For current notes, see <a href="index.html">index.html</a>. + </p> + + <p> + These are old (obsolete) notes that mare kept because they might become useful again in the future. + </p> + + </div> + + <div class="section"> + + <h1>Table of contents</h1> + <ul> + <li><a href="#x60_native_notes">X60 native graphics initialization (backlight controls)</a></li> + <li><a href="#t60_native_notes">T60 native graphics initialization (backlight controls)</a></li> + <li><a href="#5320_kernel312fix">i945: 3D fix (based on 5927) for kernel 3.12+ on 5320</a></li> + <li><a href="#x60_cb5927_testing">i945/x60: coreboot 5927 testing (3D fix for kernel 3.12+ on replay code)</a></li> + </ul> + + </div> + + <div class="section"> + + <h1 id="x60_native_notes">X60 native graphics initialization (with backlight controls)</h1> + + <p> + <b> + This is now obsolete. A better way was found (included in libreboot): <a href="http://review.coreboot.org/#/c/6731/">http://review.coreboot.org/#/c/6731/</a> + </b> + </p> + + <p> + <b><i>Also check <a href="#5320_kernel312fix">#5320_kernel312fix</a> (to fix 3D on kernel 3.12/higher)</i></b> + </p> + <p> + <b>The fix below was done on 5320/6 (from review.coreboot.org) but should work just fine on later versions of 5320.</b> + </p> + <p> + Native gpu init + backlight controls! (Fn keys). Also confirmed on X60 Tablet (1024x768) and X60 Tablet (1400x1050) + </p> + <p> + <b>Add backlight controls:</b> in <i>src/mainboard/lenovo/x60/devicetree.cb</i>, change <b>gpu_backlight</b> to <b>0x879F879E</b> + </p> + <p> + That's all! <b>This has also been backported into libreboot 5th release (line 1233 in src/mainboard/lenovo/x60/i915io.c)</b>. GNUtoo (Denis Carikli) + told me about the register <b>BLC_PWM_CTL</b> and that you could set it to control backlight. I read that address using devmem2 while running the VBIOS:<br/> + <b># devmem2 0xe4361254 w</b> + </p> + <p> + The change is also included in libreboot 6. + </p> + <p> + When doing this, it gave back that value. The same trick was used to get backlight controls for T60 (see <a href="#t60_native_notes">#t60_native_notes</a>). + </p> + + <h2>Further notes</h2> + <p> + Reading <b>0xe4361254</b> (address) in Lenovo BIOS always yields FFFFFFFF, even when writing to it (and writing to it doesn't affect brightness controls). + 'mtjm' on IRC found that the buttons (Fn keys) control /sys/class/backlight/acpi_video0 which has no affect on 61254 (BLC_PWM_CTL). This person says + intel_backlight has different values and uses the register. devmem2 works, needs checking <b>lspci -vv</b> for where the memory is mapped, + which is different than on coreboot; mtjm found that it was 0xec061254 on his system (X60 Tablet), and the register value is different too. + <b>This is relevant, because we still don't know how backlight controls are actually handled. We got it working by accident. We need to know more.</b>. + </p> + <p> + Intel-gpu-tools may prove useful for further debugging: <a href="http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/">http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/</a> + </p> + <p> + mtjm says 0xe4300000 is an MMIO region of the gpu (lspci -vv shows it), 0x61254 (BLC_PWM_CTL) is a documented register. Searching the kernel driver for backlight + shows that in intel_panel.c this register is used (there is an XXX comment about finding the right value, where recent kernels get it from. + </p> + <p> + What we want to do is calculate a good value, instead of setting it in devicetree.cb. mtjm says about backlight physics: + it has a light source , uses pulse width modulation (PWM) to turn it on/off, dimming is done by spending less time on. + <b>Note: this may not be correct; this person says that their understanding is based on how the Lenote yeeloong works</b>. + </p> + <p> + mtjm goes on to say, that the register specifies the frequency used for PWM in its depending on the GPU core frequency, so it + might be possible to calculate it without hardcoded laptop-specific values. Therefore, I am supposed to find out the 'display core frequency' + (mtjm says there might be a register for it; also, it might be in 5320 or the replay code) and the PWM modulation frequency. + https://en.wikipedia.org/wiki/Backlight#Flicker_due_to_backlight_dimming + </p> + <p> + phcoder (Vladimir Serbinenko) who is author of 5320 (review.coreboot.org) talks about 'duty cycle limit' and 'flickering frequency'. + </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="t60_native_notes">T60 native graphics initialization (with backlight controls)</h1> + + <p> + <b> + This is now obsolete. A better way was found (included in libreboot): <a href="http://review.coreboot.org/#/c/6731/">http://review.coreboot.org/#/c/6731/</a> + </b> + </p> + <p> + <b><i>Also check <a href="#5320_kernel312fix">#5320_kernel312fix</a> (to fix 3D on kernel 3.12/higher)</i></b> + </p> + <p> + <b>The fix below was done on an earlier version of 5345 changeset (review.coreboot.org), but should work on the current version. it is included in libreboot 6</b> + </p> + <p> + <b>Add backlight controls:</b> in <i>src/mainboard/lenovo/t60/devicetree.cb</i>, change <b>gpu_backlight</b> to <b>0x58BF58BE</b> + </p> + <p> + Hold on! Check <a href="../misc/index.html#get_edid_panelname">../misc/index.html#get_edid_panelname</a> to know what LCD panel you have. This is important for the next step! + </p> + + <h2>Supported panels</h2> + <p> + <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a>. + </p> + + <p> + See <a href="index.html#lcd_i945_incompatibility">index.html#lcd_i945_incompatibility</a>. + </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="5320_kernel312fix">i945: 3D fix (based on 5927) for kernel 3.12+ on 5320</h1> + + <p> + <b> + This is now obsolete. Merged in coreboot: <a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a> + </b> + </p> + + <p><b>This needs to be rewritten (or better organized, or deleted?)</b>. This is also now included in libreboot 6 (using the proper way, not the 7c0000 method which was a hack)</p> + + <p> + <b>This was done on 5320/6 so far. The fix below is for 5320/6 which is now obsolete. This needs to be re-done for the latest version + of 5320. The fix below is (in practise) only for reference, therefore.</b> + </p> + + <p> + See <a href="#x60_cb5927_testing">#x60_cb5927_testing</a> for the original (and current) fix, for the replay code. Now we want + to implement that on top of <a href="http://review.coreboot.org/#/c/5320">http://review.coreboot.org/#/c/5320</a> + which is the current code for native graphics initialization on i945. + </p> + + <p> + src/northbridge/intel/i945/gma.c (using the 7c0000 hack) on 5320: <a href="dumps/5320_7c0000_gma.c">5320_7c0000_gma.c</a> (rename it to gma.c, + replacing the current one). + </p> + + <p> + The above is a hack (as is the original). A better (more correct) method is implemented in later versions of 5927, so + that should also be adapted for 5320. For now, you can use the above fix. + </p> + + <p> + The correct way to do it is to set gtt address to (end of stolen memory - gtt size), which is what later versions of 5927 do (successfully). + </p> + + <p> + Here is some debugging output using intel_gpu_tools v1.2-1 (from trisquel repositories) using tool "intel_gtt": + </p> + + <ul> + <li> + Trisquel 6. kernel 3.14.4: + <ul> + <li>with libreboot 5th release (using the 7c0000 gtt hack from 5927/3): <a href="http://paste.debian.net/104306">http://paste.debian.net/104306</a></li> + <li>with coreboot+vgarom: <a href="http://paste.debian.net/104309">http://paste.debian.net/104309</a></li> + </ul> + </li> + <li> + Trisquel 6. kernel 3.2.0-60 (from Trisquel repositories): + <ul> + <li>with coreboot (no vbios or native init): <a href="http://paste.debian.net/104341">http://paste.debian.net/104341</a></li> + </ul> + </li> + </ul> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="x60_cb5927_testing">i945/X60: Coreboot 5927 testing (3D fix for kernel 3.12+ on replay code)</h1> + + <p> + <b> + This is now obsolete. Merged in coreboot: <a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a> + </b> + </p> + + <p><b>The latest version as-is (5927/11) has not been tested by me yet. Always boot with 'drm.debug=0x06' kernel parameter when testing this.</b></p> + + <p> + This is the fix for 3D on kernel 3.12 and higher on i945 (ThinkPad X60 in this case). This is for the replay code. + Libreboot 5th release has a version of this backported already (based on 5927/3 using the '7c0000' hack). + </p> + + <p> + <b> + The replay code is obsolete (see 5320 changeset on review.coreboot.org for better version + which supports more systems/screens, and then 5345 for T60). Information here for reference since that is where the fix was first applied. + </b> + </p> + + <p> + Read the information on <a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a>. + </p> + + <p> + For historical purposes, here is a collection of IRC logs that once existed on this page, related to the issue: + <a href="dumps/kernel312_irc">kernel312_irc</a>. + </p> + + <p> + PGETBL_CTL differs between VBIOS (-) and native graphics init (+).<br/> + + - PGETBL_CTL: 0x3ffc0001<br/> + + PGETBL_CTL: 0x3f800001 + </p> + + <p>GTT (graphics translation table) size is PGETBL_save, max 256 KiB. BSM (Base of Stolen Memory) is given by the bios.</p> + + <ul> + <li>5927/7: <a href="dumps/5927_7.tar.gz">5927_7.tar.gz</a> (GRUB graphics are correct now, and 3D still works)</li> + <li>5927/6: <a href="dumps/5927_6.tar.gz">5927_6.tar.gz</a> (GRUB graphics still corrupt, 3D/everything still works after GRUB)</li> + <li>5927/5: <a href="dumps/5927_5.tar.gz">5927_5.tar.gz</a> (GRUB graphics corrupt, 3D/everything still works after GRUB)</li> + <li>5927/3: <a href="dumps/5927_3.tar.gz">5927_3.tar.gz</a> (3D still works! kernel 3.14.4) - the '7c0000' hack</li> + <li>5927/2: <a href="dumps/5927_2.tar.gz">5927_2.tar.gz</a> (3D works! kernel 3.14.4) - the '7c0000' hack</li> + <li> + 5927/1 (didn't fix the 3D issue): + <ul> + <li><a href="dumps/5927_cbmemc">cbmem -c</a></li> + <li><a href="dumps/5927_crashdump">/sys/class/drm/card0/error</a></li> + <li><a href="dumps/5927_config">.config</a></li> + </ul> + </li> + </ul> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. 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This is true if + you want to build libreboot from source, with either libreboot_src.tar.xz or git. + <b>If you are using libreboot_util.tar.xz (binary archive) then you can ignore this, because + ROM images and statically compiled executables for the utilities are included.</b> + </p> + + <div class="important"> + <p> + For Trisquel 7, you can run the following command:<br/> + $ <b>sudo ./build dependencies trisquel7</b> + </p> + <p> + For Parabola, you can run the following command:<br/> + $ <b>sudo ./build dependencies parabola</b><br/> + or:<br/> + # <b>./build dependencies parabola</b> + </p> + </div> + + <p> + For other GNU/Linux distributions, you can adapt the existing scripts. + </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="build_meta">Get the full source code from metadata (git clone)</h1> + + <p> + If you downloaded libreboot from git, then there are some steps to download and patch + the source code for all relevant dependencies. The archive in the git repository used to be + available as a tarball called 'libreboot_meta.tar.gz'. It contains 'metadata' (scripts) + which define how the source was created (where it came from). + </p> + + <p> + You can use the scripts included to download everything. + </p> + + <p> + First, <a href="#build_dependencies">install the build dependencies</a>. + </p> + + <p> + Since libreboot makes extensive use of git, you need to configure git properly. If you have not yet configured + git, then the minimum requirement is:<br/> + $ <b>git config --global user.name "Your Name"</b><br/> + $ <b>git config --global user.email your@emailaddress.com</b><br/> + This is what will also appear in git logs if you ever commit your own changes to a given repository. For + more information, see <a href="http://git-scm.com/doc">http://git-scm.com/doc</a>. + </p> + + <p> + Another nice config for you (optional, but recommended):<br/> + $ <b>git config --global core.editor nano</b><br/> + $ <b>git config --global color.status auto</b><br/> + $ <b>git config --global color.branch auto</b><br/> + $ <b>git config --global color.interactive auto</b><br/> + $ <b>git config --global color.diff auto</b> + </p> + + <p> + After that, run the script:<br/> + $ <b>./download all</b> + </p> + + <p> + What this did was download everything (grub, coreboot, memtest86+, bucts, flashrom) + at the versions last tested for this release, and patch them. Read the script + in a text editor to learn more. + </p> + + <p> + To build the ROM images, see <a href="#build">#build</a>. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="build_bucts">How to build "bucts" (for LenovoBIOS X60/X60S/X60T/T60)</h1> + + <p> + <b>This is for Lenovo BIOS users on the ThinkPad X60/X60S, X60 Tablet and T60. If you have coreboot or libreboot running already, ignore this.</b> + </p> + + <p> + BUC.TS isn't really specific to these laptops, but is a bit inside the a register in the chipset on some Intel systems. + </p> + + <p> + Bucts is needed when flashing in software the X60/X60S/X60T/T60 ROM while Lenovo BIOS is running; + external flashing will be safe regardless. + Each ROM contains identical data inside the two final 64K region in the file*. + This corresponds to the final two 64K regions in the flash chip. Lenovo BIOS will prevent you from writing the + final one, so running "<b>bucts 1</b>" will set the system to boot from the other block instead (which + is writeable along with everything beneath it when using a patched flashrom. see <a href="#build_flashrom">#build_flashrom</a>). + After shutting down and booting up after the first flash of libreboot, + the final 64K block is writeable so you flash the ROM again with an unpatched flashrom and run "<b>bucts 0</b>" to + make the system boot from the normal (highest) block again. + </p> + + <p> + *Libreboot ROM images have identical data in those two 64KiB regions because dd is used to do that, by the build system. + If you're building from upstream (coreboot), you have to do it manually. + </p> + + <p> + BUC.TS is backed up (powered) by the NVRAM battery (or CMOS battery, as some people call it). On thinkpads, + this is typically in a yellow plastic package with the battery inside, connected via power lines to the + mainboard. Removing that battery removes power to BUC.TS, resetting the bit back to 0 (if you previously set + it to 1). + </p> + + <p> + BUC.TS utility is included in libreboot_src.tar.xz and libreboot_util.tar.xz.<br/> + <b>If you downloaded from git, follow <a href="#build_meta">#build_meta</a> before you proceed.</b> + </p> + + <p> + "BUC" means "<b>B</b>ack<b>u</b>p <b>C</b>ontrol" (it's a register) and "TS" means "<b>T</b>op <b>S</b>wap" + (it's a status bit). Hence "bucts" (BUC.TS). TS 1 and TS 0 corresponds to bucts 1 and bucts 0. + </p> + + <p> + If you have the binary release archive, you'll find executables under ./bucts/. Otherwise if you need to build from source, continue reading. + </p> + + <p> + First, <a href="#build_dependencies">install the build dependencies</a>. + </p> + + <p> + To build bucts, do this in the main directory:<br/> + $ <b>./build module bucts</b> + </p> + + <p> + To statically compile it, do this:<br/> + $ <b>./build module bucts static</b> + </p> + + <p> + The "builddeps" script in libreboot_src also makes use of builddeps-bucts. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="build_flashrom">How to build "flashrom"</h1> + + <p> + Flashrom is the utility for flashing/dumping ROM images. This is what you will use to install libreboot. + </p> + + <p> + Flashrom source code is included in libreboot_src.tar.xz and libreboot_util.tar.xz.<br/> + <b>If you downloaded from git, follow <a href="#build_meta">#build_meta</a> before you proceed.</b> + </p> + + <p> + If you are using the binary release archive, then there are already binaries included + under ./flashrom/. The flashing scripts will try to choose the correct one for you. Otherwise + if you wish to re-build flashrom from source, continue reading. + </p> + + <p> + First, <a href="#build_dependencies">install the build dependencies</a>. + </p> + + <p> + To build it, do the following in the main directory:<br/> + $ <b>./build module flashrom</b> + </p> + + <p> + To statically compile it, do the following in the main directory:<br/> + $ <b>./build module flashrom static</b> + </p> + + <p> + After you've done that, under ./flashrom/ you will find the following executables: + </p> + <ul> + <li> + <b>flashrom</b> + <ul> + <li>For flashing while coreboot or libreboot is running.</li> + </ul> + </li> + <li> + <b>flashrom_lenovobios_sst</b> + <ul> + <li>This is patched for flashing while Lenovo BIOS is running on an X60 or T60 with the SST25VF016B (SST) flash chip.</li> + </ul> + </li> + <li> + <b>flashrom_lenovobios_macronix</b> + <ul> + <li>This is patched for flashing while Lenovo BIOS is running on an X60 or T60 with the MX25L1605D (Macronix) flash chip.</li> + </ul> + </li> + </ul> + + <p> + The "builddeps" script in libreboot_src also makes use of builddeps-flashrom. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="config">Configuring libreboot</h1> + + <p> + Before building a ROM in libreboot (or coreboot, for that matter), you need to configure it. + Configuration files should already be included, so you don't need to do anything. This information + is only for reference. If you are updating or modifying coreboot-libre, and need to update the configs + in any way, refer to <a href="../maintain/index.html#newboard_libreboot">../maintain/index.html#newboard_libreboot</a>. + </p> + + <p> + If you've already built a kernel before, you know how to use this interface. + </p> + + <div class="subsection"> + <h2 id="config_dmidecode"> + dmidecode + </h2> + <p> + There is certain information that can be useful to enter in particular: + </p> + <ul> + <li>Local version string</li> + <li>SMBIOS Serial Number</li> + <li>SMBIOS Manufacturer</li> + <li>SMBIOS Version</li> + <li>SMBIOS Product name</li> + </ul> + <p> + This information can be obtained using:<br/> + <b>$ sudo dmidecode</b><br/> + <b># dmidecode</b> + </p> + <p> + Specifically, it's good practise to enter the same information for libreboot that you found when running this + with the original BIOS or firmware. <b>libreboot has already done this for you. This information is for reference, + in the hope that it will be useful.</b> + </p> + <p> + In practise, this information is useless and you can + just leave it on the defaults that coreboot uses (this + is what libreboot does, on most boards). + </p> + </div> + + <h2 id="config">GRUB payload</h2> + + <p> + GRUB is one of the payloads that libreboot targets. + </p> + + <p> + Configurations are then saved as files called <b>".config"</b>. Copies of each configuration used + for each system type by the libreboot build scripts are stored in resources/libreboot/config/grub/ + </p> + + <div class="subsection"> + <h3 id="config_x86"> + Generic configuration file (file: resources/libreboot/config/payload/board/config) + </h3> + <ul> + <li>General setup / Expert mode = <i>enable</i></li> + <li>General / Use CMOS for configuration values = <i>enable</i></li> + <li>Mainboard / Mainboard vendor = <i>Name of manufacturer</i></li> + <li>Mainboard / Mainboard model = <i>Model name</i></li> + <li>Mainboard / ROM chip size = <i>size of flash chip</i></li> + <li>Chipset / Include CPU microcode in CBFS = <i>Do not include microcode updates</i></li> + <li>Devices / Use native graphics initialization = <i>enable</i></li> + <li> + Display / Keep VESA framebuffer = <i>disable</i> (disable for text-mode graphics, enable for coreboot vesa framebuffer) + <ul> + <li>Libreboot provides this with text-mode enabled by default, but it automatically patches a copy of the config at build time + to enable coreboot framebuffer for a separate set of ROM images, in each system.</li> + </ul> + </li> + <li>Generic Drivers / USB 2.0 EHCI debug dongle support = <i>Enable</i></li> + <li>Generic Drivers / Enable early (pre-RAM) usbdebug = <i>Enable</i></li> + <li>Generic Drivers / Type of dongle = <i>Net20DC or compatible</i></li> + <li>Generic Drivers / Digitizer = <i>Present</i></li> + + <li>Console / USB dongle console output = <i>enable</i></li> + <li>Payload / Add a payload = <i>An ELF executable payload</i></li> + <li>Payload / Payload path and filename = <i>grub.elf</i></li> + </ul> + <p> + Now go back into Devices: + </p> + <ul> + <li>Devices / Run VGA Option ROMs = <i>disable</i></li> + <li>Devices / Run Option ROMs on PCI devices = <i>disable</i></li> + </ul> + <p> + The resulting .config file was saved as resources/libreboot/config/<b>payload/board/config</b> and is used by the build + scripts for this system. + </p> + </div> + + <h2 id="config_chromebook">Configuring libreboot for chromebooks</h2> + <p> + Depthcharge is one of the payloads that libreboot targets. + </p> + <p> + Configurations are then saved as files called <b>".config"</b>. Copies of each configuration used + for each system type by the libreboot build scripts are stored in resources/libreboot/config/depthcharge/ + </p> + <div class="subsection"> + <h3 id="config_arm"> + Generic configuration file (file: resources/libreboot/config/depthcharge/board/config) + </h3> + <ul> + <li>Mainboard / Mainboard vendor = <i>Google</i></li> + <li>Mainboard / Mainboard model = <i>name of model</i></li> + <li>Chipset / ChromeOS / Build for ChromeOS = <i>enable</i></li> + <li>Chipset / ChromeOS / Verify firmware with vboot. = <i>disable</i></li> + <li>Payload / Add a payload = <i>An ELF executable payload</i></li> + <li>Payload / Payload path and filename = <i>depthcharge.elf</i></li> + </ul> + <p> + The resulting .config file was saved as resources/libreboot/config/<b>depthcharge/board/config</b> and is used by the build + scripts for this system. + </p> + </div> + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="build">How to build the ROM images</h1> + + <p>You don't need to do much, as there are scripts already written for you that can build everything automatically.</p> + + <p> + You can build libreboot from source on a 32-bit (i686) or 64-bit (x86_64) system. Recommended (if possible): x86_64. + ASUS KFSN4-DRE has 64-bit CPUs. + On a ThinkPad T60, you can replace the CPU (Core 2 Duo T5600, T7200 or T7600. T5600 recommended) for 64-bit support. + On an X60s, you can replace the board with one that has a Core 2 Duo L7400 (you could also use an X60 Tablet board with the same CPU). + On an X60, you can replace the board with one that has a Core 2 Duo T5600 or T7200 (T5600 is recommended). All MacBook2,1 laptops + are 64-bit, as are all ThinkPad X200, X200S, X200 Tablet, R400, T400 and T500 laptops. Warning: MacBook1,1 laptops are all 32-bit only. + </p> + + <p> + First, <a href="#build_dependencies">install the build dependencies</a>. + </p> + <p> + If you downloaded libreboot from git, refer to <a href="#build_meta">#build_meta</a>. + </p> + + <p> + Build all of the components used in libreboot:<br/> + $ <b>./build module all</b> + </p> + + <p> + You can also build each modules separately, using <i>./build module modulename</i>. + To see the possible values for <i>modulename</i>, use:<br/> + $ <b>./build module list</b> + </p> + + <p> + After that, build the ROM images (for all boards):<br/> + $ <b>./build roms withgrub</b><br/> + Alternatively, you can build for a specific board or set of boards. + For example:<br/> + $ <b>./build roms withgrub x60</b><br/> + $ <b>./build roms withgrub x200_8mb</b><br/> + $ <b>./build roms withgrub x60 x200_8mb</b><br/> + The list of board options can be found by looking at the directory + names in <b>resources/libreboot/config/grub/</b>. + </p> + <p> + For those boards which use the depcharge payload, you must use: + $ <b>./build roms withdepthcharge</b><br/> + You can also build for a specific board or set of boards. For example:<br/> + $ <b>./build roms withdepthcharge veyron_speedy</b> + </p> + + <p> + To clean (reverse) everything, do the following:<br/> + $ <b>./build clean all</b> + </p> + + <p> + The ROM images will be stored under <b>bin/<i>payload</i>/</b>, + where <i>payload</i> could be <i>grub</i>, <i>depthcharge</i>, <i>seabios</i>, or + whatever other payload those images were built for. + </p> + + <div class="subsection"> + + <h2>Preparing release archives (optional)</h2> + + <p> + <b>This is only confirmed to work (tested) in Trisquel 7. Parabola *fails* at this stage + (for now). For all other distros, YMMV.</b> + </p> + + <p> + This is mainly intended for use with the git repository. + These commands will work in the release archive (_src), unless otherwise noted below. + </p> + + <p> + The archives will appear under <i>release/${version}/</i>; + ${version} will either be set using <i>git describe</i> or, + if a <i>version</i> file already exists (_src release archive), + then it will simply re-use that. + </p> + + <p> + Tag the current commit, and that version will appear in both the ${version} + string on the directory under <i>release/</i>, and in the file names of the + archives. Otherwise, whatever git uses for <i>git describe --tags HEAD</i> + will be used. + </p> + + <p> + Utilities (static executables):<br/> + $ <b>./build release util</b> + </p> + <p> + Archive containing flashrom and bucts source code:<br/> + $ <b>./build release tobuild</b> + </p> + <p> + Documentation archive (<b>does not work on _src release archive, only git</b>):<br/> + $ <b>./build release docs</b> + </p> + <p> + ROM image archives:<br/> + $ <b>./build release roms</b> + </p> + <p> + Source code archive:<br/> + $ <b>./build release src</b> + </p> + <p> + SHA512 sums of all other release archives that have been generated:<br/> + $ <b>./build release sha512sums</b> + </p> + + <p> + If you are building on an i686 host, this will build statically linked 32-bit binaries in + the binary release archive that you created, + for: <b>nvramtool, cbfstool, ich9deblob, cbmem</b>. + </p> + + <p> + If you are building on an x86_64 host, this will build statically linked 32- *and* 64-bit binaries for + <b>cbmem</b>, <b>ich9deblob</b>, <b>cbfstool</b> and <b>nvramtool</b>. + </p> + <p> + <b>To include statically linked i686 and x86_64 binaries for bucts and flashrom, + you will need to build them on a chroot, a virtual system or a real + system where the host uses each given architecture. These packages are difficult + to cross-compile, and the libreboot project is still figuring out how to deal + with them.</b> + </p> + <p> + The same applies if you want to include statically linked flashrom binaries for ARM. + </p> + + <p> + armv7l binaries (tested on a BeagleBone Black) are also included in libreboot_util, for: + </p> + <ul> + <li>cbfstool</li> + <li>ich9gen</li> + <li>ich9deblob</li> + <li>flashrom</li> + </ul> + + <p> + If you are building binaries on a live system or chroot (for flashrom/bucts), you can use the following to statically link them:<br/> + $ <b>./build module flashrom static</b><br/> + $ <b>./build module bucts static</b> + </p> + + <p> + The same conditions as above apply for ARM (except, building bucts on ARM is pointless, and for flashrom + you only need the normal executable since the lenovobios_sst and _macronix executables are meant + to run on an X60/T60 while lenovo bios is present, working around the security restrictions). + </p> + + <p> + The command that you used for generating the release archives will also run the following command:<br/> + $ <b>./build release tobuild</b><br/> + The archive <b>tobuild.tar.xz</b> will have been created under <b>release/</b>, containing bucts, flashrom and all other required + resources for building them. + </p> + + <p> + You'll find that the files libreboot_util.tar.xz and libreboot_src.tar.xz have been created, under <b>release/</b>. + </p> + + <p> + The ROM images will be stored in separate archives for each system, under <b>release/rom/</b>. + </p> + + </div> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/gnulinux/configuring_parabola.html b/docs/gnulinux/configuring_parabola.html new file mode 100644 index 00000000..fec15a26 --- /dev/null +++ b/docs/gnulinux/configuring_parabola.html @@ -0,0 +1,884 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Configuring Parabola (post-install)</title> +</head> + +<body> + <div class="section"> + <h1 id="pagetop">Configuring Parabola (post-install)</h1> + <p> + Post-installation configuration steps for Parabola GNU/Linux-libre. Parabola is extremely flexible; this is just an example. + </p> + <p> + <a href="index.html">Back to previous index</a> + </p> + </div> + + <div class="section"> + + <h1>Table of Contents</h1> + <ul> + <li> + <a href="#pacman_configure">Configuring pacman</a> + <ul> + <li><a href="#pacman_update">Updating Parabola</a></li> + <li> + <a href="#pacman_maintain">Maintaining Parabola during system updates</a> + <ul> + <li><a href="#pacman_cacheclean">Clearing package cache after updating</a></li> + <li><a href="#pacman_commandequiv">Pacman command equivalents (compared to other package managers)</a></li> + </ul> + </li> + <li><a href="#yourfreedom">your-freedom</a></li> + </ul> + </li> + <li><a href="#useradd">Add a user account</a></li> + <li><a href="#systemd">System D</a></li> + <li><a href="#interesting_repos">Interesting repositories</a></li> + <li> + <a href="#network">Setup a network connection in Parabola</a> + <ul> + <li><a href="#network_hostname">Setting hostname</a></li> + <li><a href="#network_status">Network status</a></li> + <li><a href="#network_devicenames">Network interface names</a></li> + <li><a href="#network_setup">Network setup</a></li> + </ul> + </li> + <li><a href="#system_maintain">System maintenance</a> - important!</li> + <li> + <a href="#desktop">Configuring the desktop</a> + <ul> + <li><a href="#desktop_xorg">Install Xorg</a></li> + <li><a href="#desktop_kblayout">Xorg keyboard layout</a></li> + <li><a href="#desktop_lxde">Install LXDE</a></li> + <li><a href="#lxde_clock">LXDE - clock</a></li> + <li><a href="#lxde_font">LXDE - font</a></li> + <li><a href="#lxde_screenlock">LXDE - screenlock</a></li> + <li><a href="#lxde_automount">LXDE - automounting</a></li> + <li><a href="#lxde_suspend">LXDE - disable suspend</a></li> + <li><a href="#lxde_battery">LXDE - battery monitor</a></li> + <li><a href="#lxde_network">LXDE - network manager</a></li> + </ul> + </li> + </ul> + + </div> + + <div class="section"> + + <p> + While not strictly related to the libreboot project, this guide + is intended to be useful for those interested in installing + Parabola on their libreboot system. + </p> + + <p> + It details configuration steps that I took after installing the base system, + as a follow up to <a href="encrypted_parabola.html">encrypted_parabola.html</a>. + This guide is likely to become obsolete at a later date (due to the volatile + 'rolling-release' model that Arch/Parabola both use), but attempts will be made to maintain it. + </p> + + <p> + <b> + This guide was valid on 2014-09-21. If you see any changes that should to be made at the present date, please get in touch + with the libreboot project! + </b> + </p> + + </div> + + <div class="section"> + + <p> + You do not necessarily have to follow this guide word-for-word; <i>parabola</i> is extremely flexible. + The aim here is to provide a common setup that most users will be happy with. While Parabola + can seem daunting at first glance (especially for new GNU/Linux users), with a simple guide it can provide + all the same usability as Trisquel, without hiding any details from the user. + </p> + + <p> + Paradoxically, as you get more advanced Parabola can actually become <i>easier to use</i> + when you want to set up your system in a special way compared to what most distributions provide. + You will find over time that other distributions tend to <i>get in your way</i>. + </p> + + </div> + + <div class="section"> + + <p> + <b> + This guide assumes that you already have Parabola installed. If you have not yet installed Parabola, + then <a href="encrypted_parabola.html">this guide</a> is highly recommended! + </b> + </p> + + <p> + A lot of the steps in this guide will refer to the Arch wiki. Arch is the upstream distribution that Parabola uses. + Most of this guide will also tell you to read wiki articles, other pages, manuals, and so on. In general it tries + to cherry pick the most useful information but nonetheless you are encouraged to learn as much as possible. + <b>It might take you a few days to fully install your system how you like, depending on how much you need to read. Patience is key, + especially for new users</b>. + </p> + + <p> + The Arch wiki will sometimes use bad language, such as calling the whole system Linux, using the term open-source (or closed-source), + and it will sometimes recommend the use of proprietary software. You need to be careful about this when reading anything on the + Arch wiki. + </p> + + </div> + + <div class="section"> + + <p> + Some of these steps require internet access. I'll go into networking later but for now, I just connected + my system to a switch and did:<br/> + # <b>systemctl start dhcpcd.service</b><br/> + You can stop it later by running:<br/> + # <b>systemctl stop dhcpcd.service</b><br/> + For most people this should be enough, but if you don't have DHCP on your network then you should setup your network connection first:<br/> + <a href="#network">Setup network connection in Parabola</a> + </p> + + </div> + + <div class="section"> + + <h2 id="pacman_configure">Configure pacman</h2> + <p> + pacman (<b>pac</b>kage <b>man</b>ager) is the name of the package management system in Arch, which Parabola + (as a deblobbed parallel effort) also uses. Like with 'apt-get' on debian-based systems like Trisquel, + this can be used to add/remove and update the software on your computer. + </p> + <p> + Based on <a href="https://wiki.parabolagnulinux.org/Installation_Guide#Configure_pacman">https://wiki.parabolagnulinux.org/Installation_Guide#Configure_pacman</a> + and from reading <a href="https://wiki.archlinux.org/index.php/Pacman">https://wiki.archlinux.org/index.php/Pacman</a> (make sure to read and understand this, + it's very important) and + <a href="https://wiki.parabolagnulinux.org/Official_Repositories">https://wiki.parabolagnulinux.org/Official_Repositories</a> + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="pacman_update">Updating Parabola</h2> + <p> + In the end, I didn't change my configuration for pacman. When you are updating, resync with the latest package names/versions:<br/> + # <b>pacman -Syy</b><br/> + (according to the wiki, -Syy is better than Sy because it refreshes the package list even if it appears to be up to date, + which can be useful when switching to another mirror).<br/> + Then, update the system:<br/> + # <b>pacman -Syu</b> + </p> + <p> + <b> + Before installing packages with 'pacman -S', always update first, using the notes above. + </b> + </p> + <p> + Keep an eye out on the output, or read it in /var/log/pacman.log. Sometimes, pacman will show messages + about maintenance steps that you will need to perform with certain files (typically configurations) + after the update. Also, you should check both the Parabola and Arch home pages to see if they mention any issues. + If a new kernel is installed, you should also update to be able to use it (the currently running kernel will + also be fine). It's generally good enough to update Parabola once every week, or maybe twice. As a + rolling release distribution, it's a good idea never to leave your install too outdated; update regularly. This + is simply because of the way the project works; old packages are deleted from the repositories quickly, once they are updated. + A system that hasn't been updated for quite a while will mean potentially more reading of previous posts through the website, + and more maintenance work. + </p> + <p> + The Arch forum can also be useful, if others have the same issue as you (if you encounter issues, that is). The <i>Parabola</i> + IRC channel (#parabola on freenode) can also help you. + </p> + <p> + Due to this and the volatile nature of Parabola/Arch, you should only update when you have at least a couple hours of spare time + in case of issues that need to be resolved. You should never update, for example, if you need your system for an important event, + like a presentation or sending an email to an important person before an allocated deadline, and so on. + </p> + <p> + Relax - packages are well-tested regularly when new updates are made to the repositories. Separate 'testing' repositories + exist for this exact reason. Despite what many people will tell you, Parabola is fairly stable and trouble-free, + so long as you are aware of how to check for issues, and are willing to spend some time fixing issues in + the rare event that they do occur. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="pacman_maintain">Maintaining Parabola</h2> + <p> + Parabola is a very simple distro, in the sense that you are in full control + and everything is made transparent to you. One consequence is + that you also need to know what you are doing, and what you have done before. In general, keeping notes (such as what I have done + with this page) can be very useful as a reference in the future (if you wanted to re-install it or install the distro + on another computer, for example). + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + <h3 id="pacman_cacheclean">Cleaning the package cache</h3> + <p> + <b> + The following is very important as you continue to use, update and maintain your Parabola system:<br/> + <a href="https://wiki.archlinux.org/index.php/Pacman#Cleaning_the_package_cache">https://wiki.archlinux.org/index.php/Pacman#Cleaning_the_package_cache</a>. + Essentially, this guide talks about a directory that has to be cleaned once in a while, to prevent it from growing too big (it's a cache + of old package information, updated automatically when you do anything in pacman). + </b> + </p> + <p> + To clean out all old packages that are cached:<br/> + # <b>pacman -Sc</b> + </p> + <p> + The wiki cautions that this should be used with care. For example, since older packages are deleted from the repo, + if you encounter issues and want to revert back to an older package then it's useful to have the caches available. + Only do this if you are sure that you won't need it. + </p> + <p> + The wiki also mentions this method for removing everything from the cache, including currently installed packages that are cached:<br/> + # <b>pacman -Scc</b><br/> + This is inadvisable, since it means re-downloading the package again if you wanted to quickly re-install it. This should only be used + when disk space is at a premium. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + <h3 id="pacman_commandequiv">pacman command equivalents</h3> + <p> + The following table lists other distro package manager commands, and their equivalent in pacman:<br/> + <a href="https://wiki.archlinux.org/index.php/Pacman_Rosetta">https://wiki.archlinux.org/index.php/Pacman_Rosetta</a> + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="yourfreedom">your-freedom</h2> + <p> + your-freedom is a package specific to Parabola, and it is installed by default. What it does is conflict with packages + from Arch that are known to be non-free (proprietary) software. When migrating from Arch (there is a guide on the Parabola + wiki for migrating - converting - an existing Arch system to a Parabola system), installing + your-freedom will also fail if these packages are installed, citing them as conflicts; the recommended solution + is then to delete the offending packages, and continue installing <i>your-freedom</i>. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="useradd">Add a user</h2> + <p> + Based on <a href="https://wiki.archlinux.org/index.php/Users_and_Groups">https://wiki.archlinux.org/index.php/Users_and_Groups</a>. + </p> + <p> + It is important (for security reasons) to create and use a non-root (non-admin) user account for everyday use. The default 'root' account is intended + only for critical administrative work, since it has complete access to the entire operating system. + </p> + <p> + Read the entire document linked to above, and then continue. + </p> + <p> + Add your user:<br/> + # <b>useradd -m -G wheel -s /bin/bash <i>yourusername</i></b><br/> + Set a password:<br/> + # <b>passwd <i>yourusername</i></b> + </p> + + <p> + Use of the <i>diceware method</i> is recommended, for generating secure passphrases (instead of passwords). + </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h2 id="systemd">systemd</h2> + <p> + This is the name of the system used for managing services in Parabola. It is a good idea to become familiar with it. + Read <a href="https://wiki.archlinux.org/index.php/systemd">https://wiki.archlinux.org/index.php/systemd</a> + and <a href="https://wiki.archlinux.org/index.php/systemd#Basic_systemctl_usage">https://wiki.archlinux.org/index.php/systemd#Basic_systemctl_usage</a> + to gain a full understanding. <b>This is very important! Make sure to read them.</b> + </p> + <p> + An example of a 'service' could be a webserver (such as lighttpd), or sshd (openssh), dhcp, etc. There are countless others. + </p> + <p> + <a href="https://bbs.archlinux.org/viewtopic.php?pid=1149530#p1149530">https://bbs.archlinux.org/viewtopic.php?pid=1149530#p1149530</a> explains + the background behind the decision by Arch (Parabola's upstream supplier) to use systemd. + </p> + + <p> + The manpage should also help:<br/> + # <b>man systemd</b><br/> + The section on 'unit types' is especially useful. + </p> + + <p> + According to the wiki, systemd 'journal' keeps logs of a size up to 10% of the total size your / partition takes up. + on a 60GB root this would mean 6GB. That's not exactly practical, and can have performance implications later when the + log gets too big. Based on instructions from the wiki, I will reduce the total size of the journal to 50MiB (the wiki + recommends 50MiB). + </p> + <p> + Open /etc/systemd/journald.conf and find the line that says:<br/> + <i>#SystemMaxUse=</i><br/> + Change it to say:<br/> + <i>SystemMaxUse=50M</i> + </p> + <p> + The wiki also recommended a method for forwarding journal output to TTY 12 (accessible by pressing ctrl+alt+f12, + and you use ctrl+alt+[F1-F12] to switch between terminals). I decided not to enable it. + </p> + <p> + Restart journald:<br/> + # <b>systemctl restart systemd-journald</b> + </p> + + <p> + The wiki recommends that if the journal gets too large, you can also simply delete (rm -Rf) everything inside /var/log/journald/* + but recommends backing it up. This shouldn't be necessary, since you already set the size limit above and systemd will automatically + start to delete older records when the journal size reaches it's limit (according to systemd developers). + </p> + + <p> + Finally, the wiki mentions 'temporary' files and the utility for managing them.<br/> + # <b>man systemd-tmpfiles</b><br/> + The command for 'clean' is:<br/> + # <b>systemd-tmpfiles --clean</b><br/> + According to the manpage, this <i>"cleans all files and directories with an age parameter"</i>. + According to the Arch wiki, this reads information in /etc/tmpfiles.d/ and /usr/lib/tmpfiles.d/ + to know what actions to perform. Therefore, it is a good idea to read what's stored in these locations + to get a better understanding. + </p> + <p> + I looked in /etc/tmpfiles.d/ and found that it was empty on my system. However, /usr/lib/tmpfiles.d/ contained some files. + The first one was etc.conf, containing information and a reference to this manpage:<br/> + # <b>man tmpfiles.d</b><br/> + Read that manpage, and then continue studying all the files. + </p> + <p> + The systemd developers tell me that it isn't usually necessary to touch the systemd-tmpfiles utility manually at all. + </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h2 id="interesting_repos">Interesting repositories</h2> + <p> + Parabola wiki at <a href="https://wiki.parabolagnulinux.org/Repositories#kernels">https://wiki.parabolagnulinux.org/Repositories#kernels</a> + mentions about a repository called [kernels] for custom kernels that aren't in the default base. It might be worth looking into what is available + there, depending on your use case. + </p> + <p> + I enabled it on my system, to see what was in it. Edit /etc/pacman.conf and below the 'extra' section add:<br/> + <i> + [kernels]<br/> + Include = /etc/pacman.d/mirrorlist + </i> + </p> + <p> + Now sync with the repository:<br/> + # <b>pacman -Syy</b> + </p> + <p> + List all available packages in this repository:<br/> + # <b>pacman -Sl kernels</b> + </p> + <p> + In the end, I decided not to install anything from it but I kept the repository enabled regardless. + </p> + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h2 id="network">Setup a network connection in Parabola</h2> + <p> + Read <a href="https://wiki.archlinux.org/index.php/Configuring_Network">https://wiki.archlinux.org/index.php/Configuring_Network</a>. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + <h3 id="network_hostname">Set the hostname</h3> + <p> + This should be the same as the hostname that you set in /etc/hostname when installing Parabola. You can also do it with systemd (do so now, if you like):<br/> + # <b>hostnamectl set-hostname <i>yourhostname</i></b><br/> + This writes the specified hostname to /etc/hostname. More information can be found in these manpages:<br/> + # <b>man hostname</b><br/> + # <b>info hostname</b><br/> + # <b>man hostnamectl</b> + </p> + <p> + Add the same hostname to /etc/hosts, on each line. Example:<br/> + <i> + 127.0.0.1 localhost.localdomain localhost <u>myhostname</u><br/> + ::1 localhost.localdomain localhost <u>myhostname</u> + </i> + </p> + <p> + You'll note that I set both lines; the 2nd line is for IPv6. More and more ISPs are providing this now (mine does) + so it's good to be forward-thinking here. + </p> + <p> + The <i>hostname</i> utility is part of the <i>inetutils</i> package and is in core/, installed by default (as part of <i>base</i>). + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + <h3 id="network_status">Network Status</h3> + <p> + According to the Arch wiki, <a href="https://wiki.archlinux.org/index.php/Udev">udev</a> should already detect the ethernet chipset + and load the driver for it automatically at boot time. You can check this in the <i>"Ethernet controller"</i> section + when running this command:<br/> + # <b>lspci -v</b> + </p> + <p> + Look at the remaining sections <i>'Kernel driver in use'</i> and <i>'Kernel modules'</i>. In my case it was as follows:<br/> + <i> + Kernel driver in use: e1000e<br/> + Kernel modules: e1000e + </i> + </p> + <p> + Check that the driver was loaded by issuing <i>dmesg | grep module_name</i>. In my case, I did:<br/> + # <b>dmesg | grep e1000e</b> + </p> + <h3 id="network_devicenames">Network device names</h3> + <p> + According to <a href="https://wiki.archlinux.org/index.php/Configuring_Network#Device_names">https://wiki.archlinux.org/index.php/Configuring_Network#Device_names</a>, + it is important to note that the old interface names like eth0, wlan0, wwan0 and so on no longer apply. Instead, <i>systemd</i> + creates device names starting with en (for enternet), wl (for wifi) and ww (for wwan) with a fixed identifier that systemd automatically generates. + An example device name for your ethernet chipset would be <i>enp0s25</i>, where it is never supposed to change. + </p> + <p> + If you want to enable the old names (eth0, wlan0, wwan0, etc), the Arch wiki recommends + adding <i>net.ifnames=0</i> to your kernel parameters (in libreboot context, this would be accomplished by following the + instructions in <a href="grub_cbfs.html">grub_cbfs.html</a>). + </p> + <p> + For background information, + read <a href="http://www.freedesktop.org/wiki/Software/systemd/PredictableNetworkInterfaceNames/">Predictable Network Interface Names</a> + </p> + <p> + Show device names:<br/> + # <b>ls /sys/class/net</b> + </p> + <p> + Changing the device names is possible (I chose not to do it):<br/> + <a href="https://wiki.archlinux.org/index.php/Configuring_Network#Change_device_name">https://wiki.archlinux.org/index.php/Configuring_Network#Change_device_name</a> + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + <h3 id="network_setup">Network setup</h3> + <p> + I actually chose to ignore most of Networking section on the wiki. Instead, I plan to set up LXDE desktop with the graphical + network-manager client. Here is a list of network managers:<br/> + <a href="https://wiki.archlinux.org/index.php/List_of_applications/Internet#Network_managers">https://wiki.archlinux.org/index.php/List_of_applications/Internet#Network_managers</a>. + If you need to, set a static IP address (temporarily) using the networking guide and the Arch wiki, or start the dhcpcd service in systemd. + NetworkManager will be setup later, after installing LXDE. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="system_maintain">System Maintenance</h2> + <p> + Read <a href="https://wiki.archlinux.org/index.php/System_maintenance">https://wiki.archlinux.org/index.php/System_maintenance</a> before continuing. + Also read <a href="https://wiki.archlinux.org/index.php/Enhance_system_stability">https://wiki.archlinux.org/index.php/Enhance_system_stability</a>. + <b>This is important, so make sure to read them!</b> + </p> + <p> + Install smartmontools (it can be used to check smart data. HDDs use non-free firmware inside, but it's transparent to you + but the smart data comes from it. Therefore, don't rely on it too much):<br/> + # <b>pacman -S smartmontools</b><br/> + Read <a href="https://wiki.archlinux.org/index.php/S.M.A.R.T.">https://wiki.archlinux.org/index.php/S.M.A.R.T.</a> to learn how to use it. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="desktop">Configuring the desktop</h2> + <p> + Based on steps from + <a href="https://wiki.archlinux.org/index.php/General_recommendations#Graphical_user_interface">General Recommendations</a> on the Arch wiki. + The plan is to use LXDE and LXDM/LightDM, along with everything else that you would expect on other distributions that provide LXDE + by default. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + <div class="subsection"> + <h3 id="desktop_xorg">Installing Xorg</h3> + <p> + Based on <a href="https://wiki.archlinux.org/index.php/Xorg">https://wiki.archlinux.org/index.php/Xorg</a>. + </p> + <p> + Firstly, install it!<br/> + # <b>pacman -S xorg-server</b><br/> + I also recommend installing this (contains lots of useful tools, including <i>xrandr</i>):<br/> + # <b>pacman -S xorg-server-utils</b> + </p> + <p> + Install the driver. For me this was <i>xf86-video-intel</i> on the ThinkPad X60. T60 and macbook11/21 should be the same.<br/> + # <b>pacman -S xf86-video-intel</b><br/> + For other systems you can try:<br/> + # <b>pacman -Ss xf86-video- | less</b><br/> + Combined with looking at your <i>lspci</i> output, you can determine which driver is needed. + By default, Xorg will revert to xf86-video-vesa which is a generic driver and doesn't provide true hardware acceleration. + </p> + <p> + Other drivers (not just video) can be found by looking at the <i>xorg-drivers</i> group:<br/> + # <b>pacman -Sg xorg-drivers</b><br/> + </p> + <p> + Mostly you will rely on a display manager, but in case you ever want to start X without one:<br/> + # <b>pacman -S xorg-xinit</b> + </p> + <p> + <optional><br/> + Arch wiki recommends installing these, for testing that X works:<br/> + # <b>pacman -S xorg-twm xorg-xclock xterm</b><br/> + Refer to <a href="https://wiki.archlinux.org/index.php/Xinitrc">https://wiki.archlinux.org/index.php/Xinitrc</a>. + and test X:<br/> + # <b>startx</b><br/> + When you are satisfied, type <b><i>exit</i></b> in xterm, inside the X session.<br/> + Uninstall them (clutter. eww): # <b>pacman -S xorg-xinit xorg-twm xorg-xclock xterm</b><br/> + </optional> + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="subsection"> + <h3 id="desktop_kblayout">Xorg keyboard layout</h3> + <p> + Refer to <a href="https://wiki.archlinux.org/index.php/Keyboard_configuration_in_Xorg">https://wiki.archlinux.org/index.php/Keyboard_configuration_in_Xorg</a>. + </p> + <p> + Xorg uses a different configuration method for keyboard layouts, so you will notice that the layout you + set in /etc/vconsole.conf earlier might not actually be the same in X. + </p> + <p> + To see what layout you currently use, try this on a terminal emulator in X:<br/> + # <b>setxkbmap -print -verbose 10</b> + </p> + <p> + In my case, I wanted to use the Dvorak (UK) keyboard which is quite different from Xorg's default Qwerty (US) layout. + </p> + <p> + I'll just say it now: <i>XkbModel</i> can be <i>pc105</i> in this case (ThinkPad X60, with a 105-key UK keyboard). + If you use an American keyboard (typically 104 keys) you will want to use <i>pc104</i>. + </p> + <p> + <i>XkbLayout</i> in my case would be <i>gb</i>, and <i>XkbVariant</i> would be <i>dvorak</i>. + </p> + <p> + The Arch wiki recommends two different methods for setting the keyboard layout:<br/> + <a href="https://wiki.archlinux.org/index.php/Keyboard_configuration_in_Xorg#Using_X_configuration_files">https://wiki.archlinux.org/index.php/Keyboard_configuration_in_Xorg#Using_X_configuration_files</a> and<br/> + <a href="https://wiki.archlinux.org/index.php/Keyboard_configuration_in_Xorg#Using_localectl">https://wiki.archlinux.org/index.php/Keyboard_configuration_in_Xorg#Using_localectl</a>. + </p> + <p> + In my case, I chose to use the <i>configuration file</i> method:<br/> + Create the file /etc/X11/xorg.conf.d/10-keyboard.conf and put this inside:<br/> + <i> + Section "InputClass"<br/> + Identifier "system-keyboard"<br/> + MatchIsKeyboard "on"<br/> + Option "XkbLayout" "gb"<br/> + Option "XkbModel" "pc105"<br/> + Option "XkbVariant" "dvorak"<br/> + EndSection + </i> + </p> + <p> + For you, the steps above may differ if you have a different layout. If you use a US Qwerty keyboard, then + you don't even need to do anything (though it might help, for the sake of being explicit). + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="subsection"> + <h3 id="desktop_lxde">Install LXDE</h3> + <p> + Desktop choice isn't that important to me, so for simplicity I decided to use LXDE. It's lightweight + and does everything that I need. + If you would like to try something different, refer to + <a href="https://wiki.archlinux.org/index.php/Desktop_environment">https://wiki.archlinux.org/index.php/Desktop_environment</a> + </p> + <p> + Refer to <a href="https://wiki.archlinux.org/index.php/LXDE">https://wiki.archlinux.org/index.php/LXDE</a>. + </p> + <p> + Install it, choosing 'all' when asked for the default package list:<br/> + # <b>pacman -S lxde obconf</b> + </p> + <p> + I didn't want the following, so I removed them:<br/> + # <b>pacman -R lxmusic lxtask</b> + </p> + <p> + I also lazily installed all fonts:<br/> + # <b>pacman -S $(pacman -Ssq ttf-)</b> + </p> + <p> + LXDE comes with a terminal. You probably want a browser to go with that; I choose GNU IceCat, part of the <i><a href="https://gnu.org/">GNU project</a></i>:<br/> + # <b>pacman -S icecat</b><br/> + And a mail client:<br/> + # <b>pacman -S icedove</b> + </p> + <p> + In IceCat, go to <i>Preferences :: Advanced</i> and disable <i>GNU IceCat Health Report</i>. + </p> + <p> + I also like to install these:<br/> + # <b>pacman -S xsensors stress htop</b> + </p> + <p> + Enable LXDM (the default display manager, providing a graphical login):<br/> + # <b>systemctl enable lxdm.service</b><br/> + It will start when you boot up the system. To start it now, do:<br/> + # <b>systemctl start lxdm.service</b> + </p> + <p> + Log in with your standard (non-root) user that you created earlier. + It is advisable to also create an xinitrc rule in case you ever want to start lxde without lxdm. + Read <a href="https://wiki.archlinux.org/index.php/Xinitrc">https://wiki.archlinux.org/index.php/Xinitrc</a>. + </p> + <p> + Open LXterminal:<br/> + $ <b>cp /etc/skel/.xinitrc ~</b><br/> + Open .xinitrc and add the following plus a line break at the bottom of the file.<br/> + <i> + # Probably not needed. The same locale info that we set before<br/> + # Based on advice from the LXDE wiki + export LC_ALL=en_GB.UTF-8<br/> + export LANGUAGE=en_GB.UTF-8<br/> + export LANG=en_GB.UTF-8<br/> + <br/> + # Start lxde desktop<br/> + exec startlxde<br/> + </i> + Now make sure that it is executable:<br/> + $ <b>chmod +x .xinitrc</b> + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="subsection"> + <h3 id="lxde_clock">LXDE - clock</h3> + <p> + In <b>Digital Clock Settings</b> (right click the clock) I set the Clock Format to <i>%Y/%m/%d %H:%M:%S</i> + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="subsection"> + <h3 id="lxde_font">LXDE - font</h3> + <p> + NOTE TO SELF: come back to this later. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="subsection"> + <h3 id="lxde_screenlock">LXDE - screenlock</h3> + <p> + Arch wiki recommends to use <i>xscreensaver</i>:<br/> + # <b>pacman -S xscreensaver</b> + </p> + <p> + Under <i>Preferences :: Screensaver</i> in the LXDE menu, I chose <i>Mode: Blank Screen Only</i>, + setting <i>Blank After</i>, <i>Cycle After</i> and <i>Lock Screen After</i> (checked) to 10 minutes. + </p> + <p> + You can now lock the screen with <i>Logout :: Lock Screen</i> in the LXDE menu. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="subsection"> + <h3 id="lxde_automount">LXDE - automounting</h3> + <p> + Refer to <a href="https://wiki.archlinux.org/index.php/File_manager_functionality">https://wiki.archlinux.org/index.php/File_manager_functionality</a>. + </p> + <p> + I chose to ignore this for now. NOTE TO SELF: come back to this later. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="subsection"> + <h3 id="lxde_suspend">LXDE - disable suspend</h3> + <p> + When closing the laptop lid, the system suspends. This is annoying at least to me. + NOTE TO SELF: disable it, then document the steps here. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="subsection"> + <h3 id="lxde_battery">LXDE - battery monitor</h3> + <p> + Right click lxde panel and <i>Add/Remove Panel Items</i>. Click <i>Add</i> and select <i>Battery Monitor</i>, then click <i>Add</i>. + Close and then right-click the applet and go to <i>Battery Monitor Settings</i>, check the box that says <i>Show Extended Information</i>. + Now click <i>Close</i>. When you hover the cursor over it, it'll show information about the battery. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="subsection"> + <h3 id="lxde_network">LXDE - Network Manager</h3> + <p> + Refer to <a href="https://wiki.archlinux.org/index.php/LXDE#Network_Management">https://wiki.archlinux.org/index.php/LXDE#Network_Management</a>. + Then I read: <a href="https://wiki.archlinux.org/index.php/NetworkManager">https://wiki.archlinux.org/index.php/NetworkManager</a>. + </p> + <p> + Install Network Manager:<br/> + # <b>pacman -S networkmanager</b> + </p> + <p> + You will also want the graphical applet:<br/> + # <b>pacman -S network-manager-applet</b><br/> + Arch wiki says that an autostart rule will be written at <i>/etc/xdg/autostart/nm-applet.desktop</i> + </p> + <p> + I want to be able to use a VPN at some point, so the wiki tells me to do:<br/> + # <b>pacman -S networkmanager-openvpn</b> + </p> + <p> + LXDE uses openbox, so I refer to:<br/> + <a href="https://wiki.archlinux.org/index.php/NetworkManager#Openbox">https://wiki.archlinux.org/index.php/NetworkManager#Openbox</a>. + </p> + <p> + It tells me for the applet I need:<br/> + # <b>pacman -S xfce4-notifyd gnome-icon-theme</b><br/> + Also, for storing authentication details (wifi) I need:<br/> + # <b>pacman -S gnome-keyring</b> + </p> + <p> + I wanted to quickly enable networkmanager:<br/> + # <b>systemctl stop dhcpcd</b><br/> + # <b>systemctl start NetworkManager</b><br/> + Enable NetworkManager at boot time:<br/> + # <b>systemctl enable NetworkManager</b> + </p> + <p> + Restart LXDE (log out, and then log back in). + </p> + <p> + I added the volume control applet to the panel (right click panel, and add a new applet). + I also later changed the icons to use the gnome icon theme, in <i>lxappearance</i>. + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/gnulinux/encrypted_parabola.html b/docs/gnulinux/encrypted_parabola.html new file mode 100644 index 00000000..1d32a20e --- /dev/null +++ b/docs/gnulinux/encrypted_parabola.html @@ -0,0 +1,854 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Installing Parabola GNU/Linux with full disk encryption (including /boot)</title> +</head> + +<body> + <div class="section"> + <h1>Installing Parabola GNU/Linux with full disk encryption (including /boot)</h1> + <p> + Libreboot on x86 uses the GRUB <a href="http://www.coreboot.org/Payloads#GRUB_2">payload</a> + by default, which means that the GRUB configuration file + (where your GRUB menu comes from) is stored directly alongside libreboot + and it's GRUB payload executable, inside + the flash chip. In context, this means that installing distributions and managing them + is handled slightly differently compared to traditional BIOS systems. + </p> + + <p> + On most systems, the /boot partition has to be left unencrypted while the others are encrypted. + This is so that GRUB, and therefore the kernel, can be loaded and executed since the firmware + can't open a LUKS volume. Not so with libreboot! Since GRUB is already included directly as a + payload, even /boot can be encrypted. This protects /boot from tampering by someone with physical + access to the system. + </p> + <p> + <b>This guide is *only* for the GRUB payload. If you use the depthcharge payload, ignore this section entirely.</b> + </p> + + <p> + Note: on some thinkpads, a faulty DVD drive can cause the cryptomount -a step during boot to fail. If this happens to you, try removing the drive. + </p> + <p> + <a href="index.html">Back to previous index</a> + </p> + </div> + + <div class="section"> + + <p> + Boot Parabola's install environment. <a href="grub_boot_installer.html">How to boot a GNU/Linux installer</a>. + </p> + + <p> + For this guide I used the 2015 08 01 image to boot the live installer and install the system. + This is available at <a href="https://wiki.parabola.nu/Get_Parabola#Main_live_ISO">this page</a>. + </p> + + <p> + This guide will go through the installation steps taken at the time of writing, which may or may not change due to + the volatile nature of Parabola (it changes all the time). In general most of it should remain the same. If you spot mistakes, + please say so! This guide will be ported to the Parabola wiki at a later date. For up to date Parabola install guide, go to + the Parabola wiki. This guide essentially cherry picks the useful information (valid at the + time of writing: 2015-08-25). + </p> + + </div> + + <div class="section"> + + <p> This section deals with wiping the storage device on which you plan to install Parabola + GNU/Linux. Follow these steps, but if you use an SSD, also: + + <p> + - beware there are issues with TRIM (not enabled through luks) and security issues if you do enable it. + See <a href="https://wiki.archlinux.org/index.php/Dm-crypt/Specialties#Discard.2FTRIM_support_for_solid_state_drives_.28SSD.29">this page</a> + for more info. + </p> + + <p> - make sure it's brand-new (or barely used). Or, otherwise, be sure that it never previously contained plaintext copies of your data. + </p> + + <p> - make sure to read <a href="https://wiki.archlinux.org/index.php/Solid_State_Drives">this article</a>. Edit /etc/fstab later on when + chrooted into your install. Also, read the whole article and keep all points in mind, adapting them for this guide. + </p> + + <p> + Securely wipe the drive:<br/> + # <b>dd if=/dev/urandom of=/dev/sda; sync</b><br/> + NOTE: If you have an SSD, only do this the first time. If it was already LUKS-encrypted before, + use the info below to wipe the LUKS header. Also, check online for your SSD what the recommended + erase block size is. For example if it was 2MiB:<br/> + # <b>dd if=/dev/urandom of=/dev/sda bs=2M; sync</b> + </p> + <p> + If your drive was already LUKS encrypted (maybe you are re-installing your distro) then + it is already 'wiped'. You should just wipe the LUKS header. + <a href="https://www.lisenet.com/2013/luks-add-keys-backup-and-restore-volume-header/">https://www.lisenet.com/2013/luks-add-keys-backup-and-restore-volume-header/</a> + showed me how to do this. It recommends doing the first 3MiB. Now, that guide is recommending putting zero there. I'm going to use urandom. Do this:<br/> + # <b>head -c 3145728 /dev/urandom > /dev/sda; sync</b><br/> + (Wiping the LUKS header is important, since it has hashed passphrases and so on. It's 'secure', but 'potentially' a risk). + </p> + + </div> + + <div class="section"> + + <h2> + Change keyboard layout + </h2> + <p> + Parabola live shell assumes US Qwerty. If you have something different, list the available keymaps and use yours:<br/> + # <b>localectl list-keymaps</b><br/> + # <b>loadkeys LAYOUT</b><br/> + For me, LAYOUT would have been dvorak-uk. + </p> + + </div> + + <div class="section"> + + <h2>Establish an internet connection</h2> + <p> + Refer to <a href="https://wiki.parabola.nu/Beginners%27_guide#Establish_an_internet_connection">this guide</a>. Wired is recommended, + but wireless is also explained there. + </p> + + </div> + + <div class="section"> + + <h2>Getting started</h2> + <p> + The beginning is based on <a href="https://wiki.parabolagnulinux.org/Installation_Guide">https://wiki.parabolagnulinux.org/Installation_Guide</a>. + Then I referred to <a href="https://wiki.archlinux.org/index.php/Partitioning">https://wiki.archlinux.org/index.php/Partitioning</a> at first. + </p> + + </div> + + <div class="section"> + + <h2>dm-mod</h2> + <p> + device-mapper will be used - a lot. Make sure that the kernel module is loaded:<br/> + # <b>modprobe dm-mod</b> + </p> + + <h2>Create LUKS partition</h2> + <p> + I am using MBR partitioning, so I use cfdisk:<br/> + # <b>cfdisk /dev/sda</b> + </p> + <p> + I create a single large sda1 filling the whole drive, leaving it as the default type 'Linux' (83). + </p> + <p> + Now I refer to <a href="https://wiki.archlinux.org/index.php/Dm-crypt/Drive_preparation#Partitioning">https://wiki.archlinux.org/index.php/Dm-crypt/Drive_preparation#Partitioning</a>:<br/> + I am then directed to <a href="https://wiki.archlinux.org/index.php/Dm-crypt/Device_encryption">https://wiki.archlinux.org/index.php/Dm-crypt/Device_encryption</a>. + </p> + <p> + Parabola forces you to RTFM. Do that. + </p> + <p> + It tells me to run:<br/> + # <b>cryptsetup benchmark</b> (for making sure the list below is populated)<br/> + Then:<br/> + # <b>cat /proc/crypto</b><br/> + This gives me crypto options that I can use. It also provides a representation of the best way to set up LUKS (in this case, security is a priority; speed, a distant second). + To gain a better understanding, I am also reading:<br/> + # <b>man cryptsetup</b> + </p> + <p> + Following that page, based on my requirements, I do the following based on <a href="https://wiki.archlinux.org/index.php/Dm-crypt/Device_encryption#Encryption_options_for_LUKS_mode">https://wiki.archlinux.org/index.php/Dm-crypt/Device_encryption#Encryption_options_for_LUKS_mode</a>. + Reading through, it seems like Serpent (encryption) and Whirlpool (hash) is the best option. + </p> + <p> + I am initializing LUKS with the following:<br/> + # <b>cryptsetup -v --cipher serpent-xts-plain64 --key-size 512 --hash whirlpool --use-random --verify-passphrase luksFormat /dev/sda1</b> + Choose a <b>secure</b> passphrase here. Ideally lots of lowercase/uppercase numbers, letters, symbols etc all in a random pattern. The + password length should be as long as you are able to handle without writing it down or storing it anywhere. + </p> + + <p> + Use of the <i>diceware method</i> is recommended, for generating secure passphrases (instead of passwords). + </p> + + </div> + + <div class="section"> + + <h2>Create LVM</h2> + <p> + Now I refer to <a href="https://wiki.archlinux.org/index.php/LVM">https://wiki.archlinux.org/index.php/LVM</a>. + </p> + <p> + Open the LUKS partition:<br/> + # <b>cryptsetup luksOpen /dev/sda1 lvm</b><br/> + (it will be available at /dev/mapper/lvm) + </p> + <p> + Create LVM partition:<br/> + # <b>pvcreate /dev/mapper/lvm</b><br/> + Show that you just created it:<br/> + # <b>pvdisplay</b> + </p> + <p> + Now I create the volume group, inside of which the logical volumes will be created:<br/> + # <b>vgcreate matrix /dev/mapper/lvm</b><br/> + (volume group name is 'matrix' - choose your own name, if you like) + Show that you created it:<br/> + # <b>vgdisplay</b> + </p> + <p> + Now create the logical volumes:<br/> + # <b>lvcreate -L 2G matrix -n swapvol</b> (2G swap partition, named <u>swapvol</u>)<br/> + Again, choose your own name if you like. Also, make sure to choose a swap size of your own needs. It basically depends on how much RAM + you have installed. I refer to <a +href="http://www.linux.com/news/software/applications/8208-all-about-linux-swap-space">http://www.linux.com/news/software/applications/8208-all-about-linux-swap-space</a>.<br/> + # <b>lvcreate -l +100%FREE matrix -n root</b> (single large partition in the rest of the space, named <u>root</u>)<br/> + You can also be flexible here, for example you can specify a /boot, a /, a /home, a /var, a /usr, etc. For example, + if you will be running a web/mail server then you want /var in its own partition (so that if it fills up with logs, it won't crash your system). + For a home/laptop system (typical use case), a root and a swap will do (really). + </p> + <p> + Verify that the logical volumes were created, using the following command:<br/> + # <b>lvdisplay</b> + </p> + + </div> + + <div class="section"> + + <h2>Create / and swap partitions, and mount</h2> + <p> + For the swapvol LV I use:<br/> + # <b>mkswap /dev/mapper/matrix-swapvol</b><br/> + Activate swap:<br/> + # <b>swapon /dev/matrix/swapvol</b> + </p> + <p> + For the root LV I use:<br/> + # <b>mkfs.ext4 /dev/mapper/matrix-root</b> + </p> + <p> + Mount the root (/) partition:<br/> + # <b>mount /dev/matrix/root /mnt</b> + </p> + + </div> + + <div class="section"> + + <h2>Continue with Parabola installation</h2> + <p> + This guide is really about GRUB, Parabola and cryptomount. I have to show how to install Parabola + so that the guide can continue. + </p> + <p> + Now I am following the rest of <a href="https://wiki.parabolagnulinux.org/Installation_Guide">https://wiki.parabolagnulinux.org/Installation_Guide</a>. + I also cross referenced <a href="https://wiki.archlinux.org/index.php/Installation_guide">https://wiki.archlinux.org/index.php/Installation_guide</a>. + </p> + <p> + Create /home and /boot on root mountpoint:<br/> + # <b>mkdir -p /mnt/home</b><br/> + # <b>mkdir -p /mnt/boot</b> + </p> + <p> + Once all the remaining partitions, if any, have been mounted, the devices are ready to install Parabola. + </p> + + <p> + In <b>/etc/pacman.d/mirrorlist</b>, comment out all lines except the Server line closest to where you are (I chose the UK Parabola + server (main server)) and then did:<br/> + # <b>pacman -Syy</b><br/> + # <b>pacman -Syu</b><br/> + # <b>pacman -Sy pacman</b> (and then I did the other 2 steps above, again)<br/> + In my case I did the steps in the next paragraph, and followed the steps in this paragraph again. + </p> + <p> + <troubleshooting><br/> + The following is based on 'Verification of package signatures' in the Parabola install guide.<br/> + Check there first to see if steps differ by now.<br/> + Now you have to update the default Parabola keyring. This is used for signing and verifying packages:<br/> + # <b>pacman -Sy parabola-keyring</b><br/> + It says that if you get GPG errors, then it's probably an expired key and, therefore, you should do:<br/> + # <b>pacman-key --populate parabola</b><br/> + # <b>pacman-key --refresh-keys</b><br/> + # <b>pacman -Sy parabola-keyring</b><br/> + To be honest, you should do the above anyway. Parabola has a lot of maintainers, and a lot of keys. Really!<br/> + If you get an error mentioning dirmngr, do:<br/> + # <b>dirmngr </dev/null</b><br/> + Also, it says that if the clock is set incorrectly then you have to manually set the correct time <br/> + (if keys are listed as expired because of it):<br/> + # <b>date MMDDhhmm[[CC]YY][.ss]</b><br/> + I also had to install:<br/> + # <b>pacman -S archlinux-keyring</b><br/> + # <b>pacman-key --populate archlinux</b><br/> + In my case I saw some conflicting files reported in pacman, stopping me from using it.<br/> + I deleted the files that it mentioned + and then it worked. Specifically, I had this error:<br/> + <i>licenses: /usr/share/licenses/common/MPS exists in filesystem</i><br/> + I rm -Rf'd the file and then pacman worked. I'm told that the following would have also made it work:<br/> + # <b>pacman -Sf licenses</b><br/> + </troubleshooting><br/> + </p> + <p> + I also like to install other packages (base-devel, compilers and so on) and wpa_supplicant/dialog/iw/wpa_actiond are needed for wireless after the install:<br/> + # <b>pacstrap /mnt base base-devel wpa_supplicant dialog iw wpa_actiond</b> + </p> + + </div> + + <div class="section"> + + <h2>Configure the system</h2> + <p> + Generate an fstab - UUIDs are used because they have certain advantages (see <a href="https://wiki.parabola.nu/Fstab#Identifying_filesystems">https://wiki.parabola.nu/Fstab#Identifying_filesystems</a>. + If you prefer labels instead, replace the -U option with -L):<br/> + # <b>genfstab -U -p /mnt >> /mnt/etc/fstab</b><br/> + Check the created file:<br/> + # <b>cat /mnt/etc/fstab</b><br/> + (If there are any errors, edit the file. Do <b>NOT</b> run the genfstab command again!) + </p> + <p> + Chroot into new system:<br/> + # <b>arch-chroot /mnt /bin/bash</b> + </p> + <p> + It's a good idea to have this installed:<br/> + # <b>pacman -S linux-libre-lts</b> + </p> + <p> + It was also suggested that you should install this kernel (read up on what GRSEC is):<br/> + # <b>pacman -S linux-libre-grsec</b> + </p> + <p> + This is another kernel that sits inside /boot, which you can use. LTS means 'long-term support'. These are so-called 'stable' kernels + that can be used as a fallback during updates, if a bad kernel causes issues for you. + </p> + <p> + Parabola does not have wget. This is sinister. Install it:<br/> + # <b>pacman -S wget</b> + </p> + <p> + Locale:<br/> + # <b>nano /etc/locale.gen</b><br/> + Uncomment your needed localisations. For example en_GB.UTF-8 (UTF-8 is highly recommended over other options).<br/> + # <b>locale-gen</b><br/> + # <b>echo LANG=en_GB.UTF-8 > /etc/locale.conf</b><br/> + # <b>export LANG=en_GB.UTF-8</b> + </p> + <p> + Console font and keymap:<br/> + # <b>nano /etc/vconsole.conf</b><br/> + In my case: + </p> +<pre> +KEYMAP=dvorak-uk +FONT=lat9w-16 +</pre> + <p> + Time zone:<br/> + # <b>ln -s /usr/share/zoneinfo/Europe/London /etc/localtime</b><br/> + (Replace Zone and Subzone to your liking. See /usr/share/zoneinfo) + </p> + <p> + Hardware clock:<br/> + # <b>hwclock --systohc --utc</b> + </p> + <p> + Hostname: + Write your hostname to /etc/hostname. For example, if your hostname is parabola:<br/> + # <b>echo parabola > /etc/hostname</b><br/> + Add the same hostname to /etc/hosts:<br/> + # <b>nano /etc/hosts</b><br/> + </p> +<pre> +#<ip-address> <hostname.domain.org> <hostname> +127.0.0.1 localhost.localdomain localhost parabola +::1 localhost.localdomain localhost parabola +</pre> + <p> Configure the network: + Refer to <a href="https://wiki.parabola.nu/Beginners%27_guide#Configure_the_network">https://wiki.parabola.nu/Beginners%27_guide#Configure_the_network</a>. + </p> + <p> Mkinitcpio: + Configure /etc/mkinitcpio.conf as needed (see <a href="https://wiki.parabola.nu/Mkinitcpio">https://wiki.parabola.nu/Mkinitcpio</a>). + Runtime modules can be found in /usr/lib/initcpio/hooks, and build hooks can be found in /usr/lib/initcpio/install. (# <b>mkinitcpio -H hookname</b> gives information about each hook.) + Specifically, for this use case:<br/> + # <b>nano /etc/mkinitcpio.conf</b><br/> + Then modify the file like so: + </p> + <ul> + <li>MODULES="i915"</li> + <li>This forces the driver to load earlier, so that the console font isn't wiped out after getting to login). Macbook21 users will also need <strong>hid-generic, hid and hid-apple to have a working keyboard when asked to enter the LUKS password.</strong></li> + <li>HOOKS="base udev autodetect modconf block keyboard keymap consolefont encrypt lvm2 filesystems fsck shutdown"</li> + <li>Explanation:</li> + <li>keymap adds to initramfs the keymap that you specified in /etc/vconsole.conf</li> + <li>consolefont adds to initramfs the font that you specified in /etc/vconsole.conf</li> + <li>encrypt adds LUKS support to the initramfs - needed to unlock your disks at boot time</li> + <li>lvm2 adds LVM support to the initramfs - needed to mount the LVM partitions at boot time</li> + <li>shutdown is needed according to Parabola wiki for unmounting devices (such as LUKS/LVM) during shutdown)</li> + </ul> + <p> + Now using mkinitcpio, you can create the kernel and ramdisk for booting with (this is different from Arch, specifying linux-libre instead of linux):<br/> + # <b>mkinitcpio -p linux-libre</b><br/> + Also do it for linux-libre-lts:<br/> + # <b>mkinitcpio -p linux-libre-lts</b><br/> + Also do it for linux-libre-grsec:<br/> + # <b>mkinitcpio -p linux-libre-grsec</b> + </p> + <p> + Set the root password: + At the time of writing, Parabola used SHA512 by default for its password hashing. I referred to <a href="https://wiki.archlinux.org/index.php/SHA_password_hashes">https://wiki.archlinux.org/index.php/SHA_password_hashes</a>.<br/> + # <b>nano /etc/pam.d/passwd</b><br/> + Add rounds=65536 at the end of the uncommented 'password' line.<br/> + # <b>passwd root</b><br/> + Make sure to set a secure password! Also, it must never be the same as your LUKS password. + </p> + + <p> + Use of the <i>diceware method</i> is recommended, for generating secure passphrases (instead of passwords). + </p> + + </div> + + <div class="section"> + + <h2>Extra security tweaks</h2> + <p> + Based on <a href="https://wiki.archlinux.org/index.php/Security">https://wiki.archlinux.org/index.php/Security</a>. + </p> + <p> + Restrict access to important directories:<br/> + # <b>chmod 700 /boot /etc/{iptables,arptables}</b> + </p> + <p> + Lockout user after three failed login attempts:<br/> + Edit the file /etc/pam.d/system-login and comment out that line:<br/> + <i># auth required pam_tally.so onerr=succeed file=/var/log/faillog</i><br/> + Or just delete it. Above it, put:<br/> + <i>auth required pam_tally.so deny=2 unlock_time=600 onerr=succeed file=/var/log/faillog</i><br/> + To unlock a user manually (if a password attempt is failed 3 times), do:<br/> + # <b>pam_tally --user <i>theusername</i> --reset</b> + What the above configuration does is lock the user out for 10 minutes, if they make 3 failed login attempts. + </p> + <p> + Configure sudo - not covered here. Will be covered post-installation in another tutorial, at a later date. + If this is a single-user system, you don't really need sudo. + </p> + + </div> + + <div class="section"> + + <h2>Unmount, reboot!</h2> + <p> + Exit from chroot:<br/> + # <b>exit</b> + </p> + <p> + unmount:<br/> + # <b>umount -R /mnt</b><br/> + # <b>swapoff -a</b> + </p> + <p> + deactivate the lvm lv's:<br/> + # <b>lvchange -an /dev/matrix/root</b><br/> + # <b>lvchange -an /dev/matrix/swapvol</b><br/> + </p> + <p> + Lock the encrypted partition (close it):<br/> + # <b>cryptsetup luksClose lvm</b> + </p> + <p> + # <b>shutdown -h now</b><br/> + Remove the installation media, then boot up again. + </p> + + </div> + + <div class="section"> + + <h2>Booting from GRUB</h2> + <p> + Initially you will have to boot manually. Press C to get to the GRUB command line. The underlined parts are optional + (using those 2 underlines will boot lts kernel instead of normal). + </p> + <p> + grub> <b>cryptomount -a</b><br/> + grub> <b>set root='lvm/matrix-root'</b><br/> + grub> <b>linux /boot/vmlinuz-linux-libre<u>-lts</u> root=/dev/matrix/root cryptdevice=/dev/sda1:root</b><br/> + grub> <b>initrd /boot/initramfs-linux-libre<u>-lts</u>.img</b><br/> + grub> <b>boot</b><br/> + </p> + <p> + You could also make it load /boot/vmlinuz-linux-libre-grsec and /boot/initramfs-linux-libre-grsec.img + </p> + + </div> + + <div class="section"> + + <h2>Follow-up tutorial: configuring Parabola</h2> + <p> + We will modify grub.config inside the ROM and do all kinds of fun stuff, but I recommend that you first transform the current bare-bones Parabola install into a more useable system. + Doing so will make the upcoming ROM modifications MUCH easier to perform and less risky! + <a href="configuring_parabola.html">configuring_parabola.html</a> shows my own notes post-installation. Using these, you can get a basic + system similar to the one that I chose for myself. You can also cherry pick useful notes and come up with your own system. + Parabola is user-centric, which means that you are in control. For more information, read <a href="https://wiki.archlinux.org/index.php/The_Arch_Way">The Arch Way</a> + (Parabola also follows it). + </p> + + </div> + + <div class="section"> + + <h2>Modify grub.cfg inside the ROM</h2> + + <p> + (Re-)log in to your system, pressing C, so booting manually from GRUB (see above). You need to modify the ROM, so that Parabola can boot automatically with this configuration. + <a href="grub_cbfs.html">grub_cbfs.html</a> shows you how. Follow that guide, using the configuration details below. + If you go for option 2 (re-flash), promise to do this on grubtest.cfg first! We can't emphasise this enough. This is to reduce the possibility of bricking your device! + </p> + + <p> + I will go for the re-flash option here. Firstly, cd to the libreboot_util/cbfstool/{armv7l i686 x86_64} directory. + Dump the current firmware - where <i>libreboot.rom</i> is an example: make sure to adapt:<br/> + # <b>flashrom -p internal -r libreboot.rom</b><br/> + If flashrom complains about multiple flash chips detected, add a <i>-c</i> option at the end, with the name of your chosen chip is quotes.<br/> + You can check if everything is in there (<i>grub.cfg</i> and <i>grubtest.cfg</i> would be really nice):<br/> + $ <b>./cbfstool libreboot.rom print</b><br/> + Extract grubtest.cfg:<br/> + $ <b>./cbfstool libreboot.rom extract -n grubtest.cfg -f grubtest.cfg</b><br/> + And modify:<br/> + $ <b>nano grubtest.cfg</b> + </p> + + <p> + In grubtest.cfg, inside the 'Load Operating System' menu entry, change the contents to: + </p> +<pre> +cryptomount -a<br/> +set root='lvm/matrix-root'<br/> +linux /boot/vmlinuz-linux-libre<u>-lts</u> root=/dev/matrix/root cryptdevice=/dev/sda1:root<br/> +initrd /boot/initramfs-linux-libre<u>-lts</u>.img +</pre> + + <p> + Note: the underlined parts above (-lts) can also be removed, to boot the latest kernel instead of LTS (long-term support) kernels. + You could also copy the menu entry and in one have -lts, and without in the other menuentry. + You could also create a menu entry to load /boot/vmlinuz-linux-libre-grsec and /boot/initramfs-linux-libre-grsec.img + The first entry will load by default. + </p> + + <p> + Without specifying a device, the <i>-a</i> parameter tries to unlock all detected LUKS volumes. + You can also specify -u UUID or -a (device). + </p> + + <p> + Now, to protect your system from an attacker simply booting a live usb distro and re-flashing the boot firmware, we are going to add a password for GRUB. + In a new terminal window, if you are not yet online, start dhcp on ethernet:<br/> + # <b>systemctl start dhcpcd.service</b> + Or make sure to get connected to the internet in any other way you prefer, at least. + </p> + + <p> + Use of the <i>diceware method</i> is recommended, for generating secure passphrases (instead of passwords). + </p> + + <p style="font-size:2em;"> + AGAIN: MAKE SURE TO DO THIS WHOLE SECTION ON grubtest.cfg *BEFORE* DOING IT ON grub.cfg. + (When we get there, upon reboot, select the menu entry that says <i>Switch to grubtest.cfg</i> and test that it works. + Only once you are satisfied, copy that to grub.cfg. Only a few steps to go, though.) + WHY? BECAUSE AN INCORRECTLY SET PASSWORD CONFIG MEANS YOU CAN'T AUTHENTICATE, WHICH MEANS 'BRICK'. + </p> + + <p> + (emphasis added, because it's needed: this is a common roadblock for users.) + </p> + + <p> + We need a utility that comes with GRUB, so we will download it temporarily. (Remember that GRUB isn't needed for booting, since it's already included as a payload in libreboot.) + Also, we will use flashrom, and I installed dmidecode. You only need base-devel (compilers and so on) to build and use cbfstool. It was already installed if you followed this tutorial, but here + it is:<br/> + # <b>pacman -S grub flashrom dmidecode base-devel</b><br/> + Next, do:<br/> + # <b>grub-mkpasswd-pbkdf2</b><br/> + Enter your chosen password at the prompt and your hash will be shown. Copy this string - you will add it to your grubtest.cfg. + </p> + + <p> + The password below (it's <b>password</b>, by the way) after <i>'password_pbkdf2 root'</i> <i>should be changed</i> to your own. + Make sure to specify a password that is different from both your LUKS *and* your root/user password. + Obviously, do not simply copy and paste the examples shown here... + </p> + + <p> + Next, back in grubtest.cfg, above the first 'Load Operating System' menu entry, you should now add your GRUB password, like so + (replace with your own name (I used <b>root</b> on both lines, feel free to choose another one) and the password hash which you copied): + </p> +<pre> +set superusers="root" +password_pbkdf2 root grub.pbkdf2.sha512.10000.711F186347156BC105CD83A2ED7AF1EB971AA2B1EB2640172F34B0DEFFC97E654AF48E5F0C3B7622502B76458DA494270CC0EA6504411D676E6752FD1651E749.8DD11178EB8D1F633308FD8FCC64D0B243F949B9B99CCEADE2ECA11657A757D22025986B0FA116F1D5191E0A22677674C994EDBFADE62240E9D161688266A711 +</pre> + + <p> + Save your changes in grubtest.cfg, then delete the unmodified config from the ROM image:<br/> + $ <b>./cbfstool libreboot.rom remove -n grubtest.cfg</b><br/> + and insert the modified grubtest.cfg:<br/> + $ <b>./cbfstool libreboot.rom add -n grubtest.cfg -f grubtest.cfg -t raw</b><br/> + </p> + + <p> + Now refer to <a href="http://libreboot.org/docs/install/index.html#flashrom">http://libreboot.org/docs/install/index.html#flashrom</a>. + Cd (up) to the libreboot_util directory and update the flash chip contents:<br/> + # <b>./flash update libreboot.rom</b><br/> + Ocassionally, coreboot changes the name of a given board. If flashrom complains about a board mismatch, but you are sure that you chose the correct ROM image, then run this alternative command:<br/> + # <b>./flash forceupdate libreboot.rom</b><br/> + You should see "Verifying flash... VERIFIED." written at the end of the flashrom output. + </p> + + <p> + With this new configuration, Parabola can boot automatically and you will have to enter a password at boot time, in GRUB, before being able to use any of the menu entries or switch to the terminal. + Let's test it out: reboot and choose grubtest.cfg from the GRUB menu, using the arrow keys on your keyboard. + Enter the name you chose, the GRUB password, your LUKS passphrase and login as root/your user. All went well? Great! + </p> + + <p> + If it does not work like you want it to, if you are unsure or sceptical in any way, don't despair: you have been wise and did not brick your device! Reboot and login the default way, and then modify + your grubtest.cfg until you get it right! + <b>Do *not* proceed past this point unless you are 100% sure that your new configuration is safe (or desirable) to use.</b> + </p> + + <p> + Now, we can easily and safely create a copy of grubtest.cfg, called grub.cfg. This will be the same except for one difference: the menuentry 'Switch to grub.cfg' is changed to 'Switch to grubtest.cfg' + and, inside it, all instances of grub.cfg to grubtest.cfg. This is so that the main config still links (in the menu) to grubtest.cfg, so that you don't have to manually switch to it, in case you ever + want to follow this guide again in the future (modifying the already modified config). + Inside libreboot_util/cbfstool/{armv7l i686 x86_64}, we can do this with the following command:<br/> + $ <b>sed -e 's:(cbfsdisk)/grub.cfg:(cbfsdisk)/grubtest.cfg:g' -e 's:Switch to grub.cfg:Switch to grubtest.cfg:g' < grubtest.cfg > grub.cfg</b><br/> + Delete the grub.cfg that remained inside the ROM:<br/> + $ <b>./cbfstool libreboot.rom remove -n grub.cfg</b><br/> + Add the modified version that you just made:<br/> + $ <b>./cbfstool libreboot.rom add -n grub.cfg -f grub.cfg -t raw</b><br/> + </p> + + <p> + Now you have a modified ROM. Once more, refer to <a href="http://libreboot.org/docs/install/index.html#flashrom">http://libreboot.org/docs/install/index.html#flashrom</a>. + Cd to the libreboot_util directory and update the flash chip contents:<br/> + # <b>./flash update libreboot.rom</b><br/> + And wait for the "Verifying flash... VERIFIED." Once you have done that, shut down and then boot up with your new configuration. + </p> + + <p> + When done, delete GRUB (remember, we only needed it for the <i>grub-mkpasswd-pbkdf2</i> utility; + GRUB is already part of libreboot, flashed alongside it as a <i>payload</i>):<br/> + # <b>pacman -R grub</b> + </p> + + </div> + + <div class="section"> + + <p> + If you followed all that correctly, you should now have a fully encrypted Parabola installation. + Refer to the wiki for how to do the rest. + </p> + + </div> + + <div class="section"> + <h2>Bonus: Using a key file to unlock /boot/</h2> + <p> + By default, you will have to enter your LUKS passphrase twice; once in GRUB, and once when booting the kernel. + GRUB unlocks the encrypted partition and then loads the kernel, but the kernel is not aware of the fact + that it is being loaded from an encrypted volume. Therefore, you will be asked to enter your passphrase a second time. + A workaround is to put a keyfile inside initramfs, with instructions for the kernel to use it when + booting. This is safe, because /boot/ is encrypted (otherwise, putting a keyfile inside initramfs would be a bad idea).<br/> + + Boot up and login as root or your user. Then generate the key file:<br/> + # <b>dd bs=512 count=4 if=/dev/urandom of=/etc/mykeyfile iflag=fullblock</b><br/> + Insert it into the luks volume:<br/> + # <b>cryptsetup luksAddKey /dev/sdX /etc/mykeyfile</b><br/> + and enter your LUKS passphrase when prompted. + Add the keyfile to the initramfs by adding it to FILES in /etc/mkinitcpio.conf. For example:<br/> + # <b>FILES="/etc/mykeyfile"</b><br/> + Create the initramfs image from scratch:<br/> + # <b>mkinitcpio -p linux-libre</b><br/> + # <b>mkinitcpio -p linux-libre-lts</b><br/> + # <b>mkinitcpio -p linux-libre-grsec</b><br/> + Add the following to your grub.cfg - you are now able to do that, see above! -, or add it in the kernel command line for GRUB:<br/> + # <b>cryptkey=rootfs:/etc/mykeyfile</b><br/> + <br/> + You can also place this inside the grub.cfg that exists in CBFS: <a href="grub_cbfs.html">grub_cbfs.html</a>. + </p> + + </div> + + <div class="section"> + + <h2>Further security tips</h2> + <p> + <a href="https://wiki.archlinux.org/index.php/Security">https://wiki.archlinux.org/index.php/Security</a>.<br/> + <a href="https://wiki.parabolagnulinux.org/User:GNUtoo/laptop">https://wiki.parabolagnulinux.org/User:GNUtoo/laptop</a> + </p> + + </div> + + <div class="section"> + + <h1 id="troubleshooting">Troubleshooting</h1> + + <p> + A user reported issues when booting with a docking station attached + on an X200, when decrypting the disk in GRUB. The error + <i>AHCI transfer timed out</i> was observed. The workaround + was to remove the docking station. + </p> + + <p> + Further investigation revealed that it was the DVD drive causing problems. + Removing that worked around the issue. + </p> + +<pre> + +"sudo wodim -prcap" shows information about the drive: +Device was not specified. Trying to find an appropriate drive... +Detected CD-R drive: /dev/sr0 +Using /dev/cdrom of unknown capabilities +Device type : Removable CD-ROM +Version : 5 +Response Format: 2 +Capabilities : +Vendor_info : 'HL-DT-ST' +Identification : 'DVDRAM GU10N ' +Revision : 'MX05' +Device seems to be: Generic mmc2 DVD-R/DVD-RW. + +Drive capabilities, per MMC-3 page 2A: + + Does read CD-R media + Does write CD-R media + Does read CD-RW media + Does write CD-RW media + Does read DVD-ROM media + Does read DVD-R media + Does write DVD-R media + Does read DVD-RAM media + Does write DVD-RAM media + Does support test writing + + Does read Mode 2 Form 1 blocks + Does read Mode 2 Form 2 blocks + Does read digital audio blocks + Does restart non-streamed digital audio reads accurately + Does support Buffer-Underrun-Free recording + Does read multi-session CDs + Does read fixed-packet CD media using Method 2 + Does not read CD bar code + Does not read R-W subcode information + Does read raw P-W subcode data from lead in + Does return CD media catalog number + Does return CD ISRC information + Does support C2 error pointers + Does not deliver composite A/V data + + Does play audio CDs + Number of volume control levels: 256 + Does support individual volume control setting for each channel + Does support independent mute setting for each channel + Does not support digital output on port 1 + Does not support digital output on port 2 + + Loading mechanism type: tray + Does support ejection of CD via START/STOP command + Does not lock media on power up via prevent jumper + Does allow media to be locked in the drive via PREVENT/ALLOW command + Is not currently in a media-locked state + Does not support changing side of disk + Does not have load-empty-slot-in-changer feature + Does not support Individual Disk Present feature + + Maximum read speed: 4234 kB/s (CD 24x, DVD 3x) + Current read speed: 4234 kB/s (CD 24x, DVD 3x) + Maximum write speed: 4234 kB/s (CD 24x, DVD 3x) + Current write speed: 4234 kB/s (CD 24x, DVD 3x) + Rotational control selected: CLV/PCAV + Buffer size in KB: 1024 + Copy management revision supported: 1 + Number of supported write speeds: 4 + Write speed # 0: 4234 kB/s CLV/PCAV (CD 24x, DVD 3x) + Write speed # 1: 2822 kB/s CLV/PCAV (CD 16x, DVD 2x) + Write speed # 2: 1764 kB/s CLV/PCAV (CD 10x, DVD 1x) + Write speed # 3: 706 kB/s CLV/PCAV (CD 4x, DVD 0x) + +Supported CD-RW media types according to MMC-4 feature 0x37: + Does write multi speed CD-RW media + Does write high speed CD-RW media + Does write ultra high speed CD-RW media + Does not write ultra high speed+ CD-RW media + +</pre> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Copyright © 2015 Jeroen Quint <jezza@diplomail.ch><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/gnulinux/encrypted_trisquel.html b/docs/gnulinux/encrypted_trisquel.html new file mode 100644 index 00000000..56a694d3 --- /dev/null +++ b/docs/gnulinux/encrypted_trisquel.html @@ -0,0 +1,498 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Installing Trisquel GNU/Linux with full disk encryption (including /boot)</title> +</head> + +<body> + <div class="section"> + <h1>Installing Trisquel GNU/Linux with full disk encryption (including /boot)</h1> + <p> + Libreboot on x86 uses the GRUB <a href="http://www.coreboot.org/Payloads#GRUB_2">payload</a> + by default, which means that the GRUB configuration file + (where your GRUB menu comes from) is stored directly alongside libreboot + and its GRUB payload executable, inside + the flash chip. In context, this means that installing distributions and managing them + is handled slightly differently compared to traditional BIOS systems. + </p> + + <p> + On most systems, the /boot partition has to be left unencrypted while the others are encrypted. + This is so that GRUB, and therefore the kernel, can be loaded and executed since the firmware + can't open a LUKS volume. Not so with libreboot! Since GRUB is already included directly as a + payload, even /boot can be encrypted. This protects /boot from tampering by someone with physical + access to the system. + </p> + <p> + This works in Trisquel 7, and probably Trisquel 6. Boot the 'net installer' (Install Trisquel in Text Mode). + <a href="grub_boot_installer.html">How to boot a GNU/Linux installer</a>. + </p> + <p> + <b>This guide is *only* for the GRUB payload. If you use the depthcharge payload, ignore this section entirely.</b> + </p> + + + <p> + Note: on some thinkpads, a faulty DVD drive can cause the cryptomount -a step during boot to fail. If this happens to you, try removing the drive. + </p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + + <p> + Set a strong user password (lots of lowercase/uppercase, numbers and symbols). + </p> + + <p> + Use of the <i>diceware method</i> is recommended, for generating secure passphrases (instead of passwords). + </p> + + <p> + when the installer asks you to set up + encryption (ecryptfs) for your home directory, select 'Yes' if you want to: <b>LUKS is already secure and performs well. Having ecryptfs on top of it + will add noticeable performance penalty, for little security gain in most use cases. This is therefore optional, and not recommended. + Choose 'no'.</b> + </p> + + <p> + <b> + Your user password should be different from the LUKS password which you will set later on. + Your LUKS password should, like the user password, be secure. + </b> + </p> + + </div> + + <div class="section"> + + <h1>Partitioning</h1> + + <p>Choose 'Manual' partitioning:</p> + <ul> + <li>Select drive and create new partition table</li> + <li> + Single large partition. The following are mostly defaults: + <ul> + <li>Use as: physical volume for encryption</li> + <li>Encryption: aes</li> + <li>key size: 256</li> + <li>IV algorithm: xts-plain64</li> + <li>Encryption key: passphrase</li> (<i>diceware method</i> recommended for choosing password) + <li>erase data: Yes (only choose 'No' if it's a new drive that doesn't contain your private data)</li> + </ul> + </li> + <li> + Select 'configure encrypted volumes' + <ul> + <li>Create encrypted volumes</li> + <li>Select your partition</li> + <li>Finish</li> + <li>Really erase: Yes</li> + <li>(erase will take a long time. be patient)</li> + <li>(if your old system was encrypted, just let this run for about a minute to + make sure that the LUKS header is wiped out)</li> + </ul> + </li> + <li> + Select encrypted space: + <ul> + <li>use as: physical volume for LVM</li> + <li>Choose 'done setting up the partition'</li> + </ul> + </li> + <li> + Configure the logical volume manager: + <ul> + <li>Keep settings: Yes</li> + </ul> + </li> + <li> + Create volume group: + <ul> + <li>Name: <b>matrix</b> (you can use whatever you want here, this is just an example)</li> + <li>Select crypto partition</li> + </ul> + </li> + <li> + Create logical volume + <ul> + <li>select <b>matrix</b> (or whatever you named it before)</li> + <li>name: <b>root</b> (you can use whatever you want here, this is just an example)</li> + <li>size: default, minus 2048 MB</li> + </ul> + </li> + <li> + Create logical volume + <ul> + <li>select <b>matrix</b> (or whatever you named it before)</li> + <li>name: <b>swap</b> (you can use whatever you want here, this is just an example)</li> + <li>size: press enter</li> + </ul> + </li> + </ul> + + </div> + + <div class="section"> + + <h1>Further partitioning</h1> + + <p> + Now you are back at the main partitioning screen. You will simply set mountpoints and filesystems to use. + </p> + <ul> + <li> + LVM LV root + <ul> + <li>use as: ext4</li> + <li>mount point: /</li> + <li>done setting up partition</li> + </ul> + </li> + <li> + LVM LV swap + <ul> + <li>use as: swap area</li> + <li>done setting up partition</li> + </ul> + </li> + <li>Now you select 'Finished partitioning and write changes to disk'.</li> + </ul> + + </div> + + <div class="section"> + + <h1>Kernel</h1> + + <p> + Installation will ask what kernel you want to use. linux-generic is fine. + </p> + + </div> + + <div class="section"> + + <h1>Tasksel</h1> + + <p> + Choose <i>"Trisquel Desktop Environment"</i> if you want GNOME, + <i>"Trisquel-mini Desktop Environment"</i> if you + want LXDE or <i>"Triskel Desktop Environment"</i> if you want KDE. + If you want to have no desktop (just a basic shell) + when you boot or if you want to create your own custom setup, then choose nothing here (don't select anything). + You might also want to choose some of the other package groups; it's up to you. + </p> + + </div> + + <div class="section"> + + <h1>Postfix configuration</h1> + + <p> + If asked, choose <i>"No Configuration"</i> here (or maybe you want to select something else. It's up to you.) + </p> + + </div> + + <div class="section"> + + <h1>Install the GRUB boot loader to the master boot record</h1> + + <p> + Choose 'Yes'. It will fail, but don't worry. Then at the main menu, choose 'Continue without a bootloader'. + You could also choose 'No'. Choice is irrelevant here. + </p> + + <p> + <i>You do not need to install GRUB at all, since in libreboot you are using the GRUB payload (for libreboot) to boot your system directly.</i> + </p> + + </div> + + <div class="section"> + + <h1>Clock UTC</h1> + + <p> + Just say 'Yes'. + </p> + + </div> + + <div class="section"> + + <h1> + Booting your system + </h1> + + <p> + At this point, you will have finished the installation. At your GRUB payload, press C to get to the command line. + </p> + + <p> + Do that:<br/> + grub> <b>cryptomount -a</b><br/> + grub> <b>set root='lvm/matrix-root'</b><br/> + grub> <b>linux /vmlinuz root=/dev/mapper/matrix-root cryptdevice=/dev/mapper/matrix-root:root</b><br/> + grub> <b>initrd /initrd.img</b><br/> + grub> <b>boot</b> + </p> + + </div> + + <div class="section"> + + <h1> + ecryptfs + </h1> + + <p> + If you didn't encrypt your home directory, then you can safely ignore this section. + </p> + + <p> + Immediately after logging in, do that:<br/> + $ <b>sudo ecryptfs-unwrap-passphrase</b> + </p> + + <p> + This will be needed in the future if you ever need to recover your home directory from another system, so write it down and keep the note + somewhere secret. Ideally, you should memorize it and then burn the note (or not even write it down, and memorize it still)> + </p> + + </div> + + <div class="section"> + + <h1> + Modify grub.cfg (CBFS) + </h1> + + <p> + Now you need to set it up so that the system will automatically boot, without having to type a bunch of commands. + </p> + + <p> + Modify your grub.cfg (in the firmware) <a href="grub_cbfs.html">using this tutorial</a>; + just change the default menu entry 'Load Operating System' to say this inside: + </p> + + <p> + <b>cryptomount -a</b><br/> + <b>set root='lvm/matrix-root'</b><br/> + <b>linux /vmlinuz root=/dev/mapper/matrix-root cryptdevice=/dev/mapper/matrix-root:root</b><br/> + <b>initrd /initrd.img</b> + </p> + + <p> + Without specifying a device, the <i>-a</i> parameter tries to unlock all detected LUKS volumes. + You can also specify -u UUID or -a (device). + </p> + + <p> + Additionally, you should set a GRUB password. This is not your LUKS password, but it's a password that you have to enter to see + GRUB. This protects your system from an attacker simply booting a live USB and re-flashing your firmware. <b>This should be different than your LUKS passphrase and user password.</b> + </p> + <p> + Use of the <i>diceware method</i> is recommended, for generating secure passphrases (as opposed to passwords). + </p> + + <p> + The GRUB utility can be used like so:<br/> + $ <b>grub-mkpasswd-pbkdf2</b> + </p> + + <p> + Give it a password (remember, it has to be secure) and it'll output something like:<br/> + <b>grub.pbkdf2.sha512.10000.711F186347156BC105CD83A2ED7AF1EB971AA2B1EB2640172F34B0DEFFC97E654AF48E5F0C3B7622502B76458DA494270CC0EA6504411D676E6752FD1651E749.8DD11178EB8D1F633308FD8FCC64D0B243F949B9B99CCEADE2ECA11657A757D22025986B0FA116F1D5191E0A22677674C994EDBFADE62240E9D161688266A711</b> + </p> + <p> + Use of the <i>diceware method</i> is recommended, for generating secure passphrases (instead of passwords). + </p> + + <p> + Put that in the grub.cfg (the one for CBFS inside the ROM) before the 'Load Operating System' menu entry like so (example):<br/> + </p> + <pre> +<b>set superusers="root"</b> +<b>password_pbkdf2 root grub.pbkdf2.sha512.10000.711F186347156BC105CD83A2ED7AF1EB971AA2B1EB2640172F34B0DEFFC97E654AF48E5F0C3B7622502B76458DA494270CC0EA6504411D676E6752FD1651E749.8DD11178EB8D1F633308FD8FCC64D0B243F949B9B99CCEADE2ECA11657A757D22025986B0FA116F1D5191E0A22677674C994EDBFADE62240E9D161688266A711</b> + </pre> + <p style="font-size:2em;"> + MAKE SURE TO DO THIS ON grubtest.cfg *BEFORE* DOING IT ON grub.cfg. + Then select the menu entry that says <i>Switch to grubtest.cfg</i> and test that it works. + Then copy that to grub.cfg once you're satisfied. + WHY? BECAUSE AN INCORRECTLY SET PASSWORD CONFIG MEANS YOU CAN'T AUTHENTICATE, WHICH MEANS 'BRICK'. + </p> + <p> + (emphasis added, because it's needed. This is a common roadblock for users) + </p> + + <p> + Obviously, replace it with the correct hash that you actually got for the password that you entered. Meaning, not the hash that you see above! + </p> + + <p> + After this, you will have a modified ROM with the menu entry for cryptomount, and the entry before that for the GRUB password. Flash the modified ROM + using <a href="../install/index.html#flashrom">this tutorial</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="troubleshooting">Troubleshooting</h1> + + <p> + A user reported issues when booting with a docking station attached + on an X200, when decrypting the disk in GRUB. The error + <i>AHCI transfer timed out</i> was observed. The workaround + was to remove the docking station. + </p> + + <p> + Further investigation revealed that it was the DVD drive causing problems. + Removing that worked around the issue. + </p> + +<pre> + +"sudo wodim -prcap" shows information about the drive: +Device was not specified. Trying to find an appropriate drive... +Detected CD-R drive: /dev/sr0 +Using /dev/cdrom of unknown capabilities +Device type : Removable CD-ROM +Version : 5 +Response Format: 2 +Capabilities : +Vendor_info : 'HL-DT-ST' +Identification : 'DVDRAM GU10N ' +Revision : 'MX05' +Device seems to be: Generic mmc2 DVD-R/DVD-RW. + +Drive capabilities, per MMC-3 page 2A: + + Does read CD-R media + Does write CD-R media + Does read CD-RW media + Does write CD-RW media + Does read DVD-ROM media + Does read DVD-R media + Does write DVD-R media + Does read DVD-RAM media + Does write DVD-RAM media + Does support test writing + + Does read Mode 2 Form 1 blocks + Does read Mode 2 Form 2 blocks + Does read digital audio blocks + Does restart non-streamed digital audio reads accurately + Does support Buffer-Underrun-Free recording + Does read multi-session CDs + Does read fixed-packet CD media using Method 2 + Does not read CD bar code + Does not read R-W subcode information + Does read raw P-W subcode data from lead in + Does return CD media catalog number + Does return CD ISRC information + Does support C2 error pointers + Does not deliver composite A/V data + + Does play audio CDs + Number of volume control levels: 256 + Does support individual volume control setting for each channel + Does support independent mute setting for each channel + Does not support digital output on port 1 + Does not support digital output on port 2 + + Loading mechanism type: tray + Does support ejection of CD via START/STOP command + Does not lock media on power up via prevent jumper + Does allow media to be locked in the drive via PREVENT/ALLOW command + Is not currently in a media-locked state + Does not support changing side of disk + Does not have load-empty-slot-in-changer feature + Does not support Individual Disk Present feature + + Maximum read speed: 4234 kB/s (CD 24x, DVD 3x) + Current read speed: 4234 kB/s (CD 24x, DVD 3x) + Maximum write speed: 4234 kB/s (CD 24x, DVD 3x) + Current write speed: 4234 kB/s (CD 24x, DVD 3x) + Rotational control selected: CLV/PCAV + Buffer size in KB: 1024 + Copy management revision supported: 1 + Number of supported write speeds: 4 + Write speed # 0: 4234 kB/s CLV/PCAV (CD 24x, DVD 3x) + Write speed # 1: 2822 kB/s CLV/PCAV (CD 16x, DVD 2x) + Write speed # 2: 1764 kB/s CLV/PCAV (CD 10x, DVD 1x) + Write speed # 3: 706 kB/s CLV/PCAV (CD 4x, DVD 0x) + +Supported CD-RW media types according to MMC-4 feature 0x37: + Does write multi speed CD-RW media + Does write high speed CD-RW media + Does write ultra high speed CD-RW media + Does not write ultra high speed+ CD-RW media + +</pre> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/gnulinux/grub_boot_installer.html b/docs/gnulinux/grub_boot_installer.html new file mode 100644 index 00000000..f6e9b687 --- /dev/null +++ b/docs/gnulinux/grub_boot_installer.html @@ -0,0 +1,312 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>How to install GNU/Linux on a libreboot system</title> +</head> + +<body> + <div id="pagetop" class="section"> + <h1>How to install GNU/Linux on a libreboot system</h1> + <p> + This section relates to preparing, booting and installing a + GNU/Linux distribution on your libreboot system, using nothing more than a USB flash drive (and <i>dd</i>). + </p> + <ul> + <li><a href="#prepare">Prepare the USB drive (in GNU/Linux)</a></li> + <li><a href="#encryption">Installing GNU/Linux with full disk encryption</a></li> + <li><a href="#guix">GNU Guix System Distribution?</a></li> + <li><a href="#trisquel_netinstall">Trisquel net install?</a></li> + <li><a href="#parse_isolinux">Booting ISOLINUX images (automatic method)</a></li> + <li><a href="#manual_isolinux">Booting ISOLINUX images (manual method)</a></li> + <li><a href="#troubleshooting">Troubleshooting</a></li> + </ul> + <p> + <a href="index.html">Back to previous index</a> + </p> + </div> + + <div class="section"> + <p> + <b>This section is only for the GRUB payload. For depthcharge (used on CrOS devices in libreboot), instructions + have yet to be written in the libreboot documentation.</b> + </p> + </div> + + <div id="prepare" class="section"> + + <h2>Prepare the USB drive (in GNU/Linux)</h2> + + <p> + Connect the USB drive. Check dmesg:<br/> + <b>$ dmesg</b><br/> + + Check lsblk to confirm which drive it is:<br/> + <b>$ lsblk</b> + </p> + + <p> + Check that it wasn't automatically mounted. If it was, unmount it. For example:<br/> + <b>$ sudo umount /dev/sdX*</b><br/> + <b># umount /dev/sdX*</b> + </p> + + <p> + dmesg told you what device it is. Overwrite the drive, writing your distro ISO to it with dd. For example:<br/> + <b>$ sudo dd if=gnulinux.iso of=/dev/sdX bs=8M; sync</b><br/> + <b># dd if=gnulinux.iso of=/dev/sdX bs=8M; sync</b> + </p> + + <p> + You should now be able to boot the installer from your USB drive. Continue reading, for + information about how to do that. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div id="encryption" class="section"> + + <h2>Installing GNU/Linux with full disk encryption</h2> + + <ul> + <li><a href="encrypted_trisquel.html">Installing Trisquel GNU/Linux with full disk encryption (including /boot)</a></li> + <li><a href="encrypted_parabola.html">Installing Parabola GNU/Linux with full disk encryption (including /boot)</a></li> + </ul> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div id="guix" class="section"> + + <h2>GNU Guix System Distribution?</h2> + + <p> + The Guix installers uses the GRUB bootloader, unlike most GNU/Linux installers which will likely use ISOLINUX. + </p> + <p> + To boot the Guix live USB install, select <b><i>Search for GRUB configuration (grub.cfg) outside of CBFS</i></b> from + the GRUB payload menu. After you have done that, a new menuentry will appear at the very bottom with text like + <b><i>Load Config from (usb0)</i></b>; select that, and it should boot. + </p> + <p> + Once you have installed Guix onto the main storage device, check + <a href="grub_cbfs.html#option1_dont_reflash">grub_cbfs.html#option1_dont_reflash</a> for hints on how + to boot it. + </p> + + <p> + GuixSD (Guix System Distribution) is highly recommended; it's part of GNU, and + <a href="https://www.gnu.org/distros/free-distros.html">endorsed</a> by the Free Software Foundation. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div id="trisquel_netinstall" class="section"> + + <h2>Trisquel net install?</h2> + + <p> + Tip: don't use the official net install image. Download the full GNOME ISO (the ~1.5GiB one). + In this ISO, there is still the capability to boot the net install, while it also provides + an easy to use live system (which you can boot from USB). This ISO also works using + <i>syslinux_configfile -i</i> (the <i>Parse ISOLINUX</i> menu entries in the default + GRUB configuration that libreboot uses). + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div id="parse_isolinux" class="section"> + + <h2>Booting ISOLINUX images (automatic method)</h2> + + <p> + Boot it in GRUB using the <i>Parse ISOLINUX config (USB)</i> option. + + A new menu should appear in GRUB, showing the boot options for that distro; this is a GRUB menu, converted from the usual + ISOLINUX menu provided by that distro. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div id="manual_isolinux" class="section"> + + <h2>Booting ISOLINUX images (manual method)</h2> + + <p> + <i>These are generic instructions. They may or may not be correct for your + distribution. You must adapt them appropriately, for whatever GNU/Linux distribution + it is that you are trying to install.</i> + </p> + + <p> + If the ISOLINUX parser or <i>Search for GRUB configuration</i> options won't work, then press C in GRUB to access the command line.<br/> + grub> <b>ls</b><br/> + + Get the device from above output, eg (usb0). Example:<br/> + grub> <b>cat (usb0)/isolinux/isolinux.cfg</b><br/> + + Either this will show the ISOLINUX menuentries for that ISO, or link to other .cfg files, for example /isolinux/foo.cfg.<br/> + + If it did that, then you do:<br/> + grub> <b>cat (usb0)/isolinux/foo.cfg</b><br/> + + And so on, until you find the correct menuentries for ISOLINUX. + <b>The file <i>/isolinux/foo.cfg</i> is a fictional example. Do not actually + use this example, unless you actually have that file, if it is appropriate.</b> + </p> + + <p> + For Trisquel (and other debian-based distros), there are typically menuentries listed in + <i>/isolinux/txt.cfg</i> or <i>/isolinux/gtk.cfg</i>. For dual-architecture ISO images + (i686 and x86_64), there may be separate files/directories for each architecture. + Just keep searching through the image, until you find the correct ISOLINUX configuration file. + </p> + + <p> + Now look at the ISOLINUX menuentry. It'll look like:<br/> + <b> + kernel /path/to/kernel<br/> + append PARAMETERS initrd=/path/to/initrd MAYBE_MORE_PARAMETERS<br/> + </b> + + GRUB works the same way, but in it's own way. Example GRUB commands:<br/> + grub> <b>set root='usb0'</b><br/> + grub> <b>linux /path/to/kernel PARAMETERS MAYBE_MORE_PARAMETERS</b><br/> + grub> <b>initrd /path/to/initrd</b><br/> + grub> <b>boot</b><br/> + Note: <i>usb0</i> may be incorrect. Check the output of the <i>ls</i> command in GRUB, + to see a list of USB devices/partitions. + + Of course this will vary from distro to distro. If you did all of that correctly, then it should now be booting your USB + drive in the way that you specified. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div id="troubleshooting" class="section"> + + <h1>Troubleshooting</h1> + + <p> + Most of these issues occur when using libreboot with coreboot's 'text mode' instead of the coreboot framebuffer. + This mode is useful for booting payloads like memtest86+ which expect text-mode, but for GNU/Linux distributions + it can be problematic when they are trying to switch to a framebuffer because it doesn't exist. + </p> + + <p> + In most cases, you should use the vesafb ROM images. Example filename: libreboot_ukdvorak_vesafb.rom. + </p> + + <h2>parabola won't boot in text-mode</h2> + + <p> + Use one of the ROM images with vesafb in the filename (uses coreboot framebuffer instead of text-mode). + </p> + + <h2>debian-installer (trisquel net install) graphical corruption in text-mode</h2> + <p> + When using the ROM images that use coreboot's "text mode" instead of the coreboot framebuffer, + booting the Trisquel net installer results in graphical corruption because it is trying to switch to a framebuffer which doesn't + exist. Use that kernel parameter on the 'linux' line when booting it:<br/> + <b>vga=normal fb=false</b> + </p> + + <p> + Tested in Trisquel 6 (and 7). This forces debian-installer to start in text-mode, instead of trying to switch to a framebuffer. + </p> + + <p> + If selecting text-mode from a GRUB menu created using the ISOLINUX parser, you can press E on the menu entry to add this. + Or, if you are booting manually (from GRUB terminal) then just add the parameters. + </p> + + <p> + This workaround was found on the page: <a href="https://www.debian.org/releases/stable/i386/ch05s04.html">https://www.debian.org/releases/stable/i386/ch05s04.html</a>. + It should also work for gNewSense, Debian and any other apt-get distro that provides debian-installer (text mode) net install method. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/gnulinux/grub_cbfs.html b/docs/gnulinux/grub_cbfs.html new file mode 100644 index 00000000..afaa39b9 --- /dev/null +++ b/docs/gnulinux/grub_cbfs.html @@ -0,0 +1,376 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>How to replace the default GRUB configuration file on a libreboot system</title> +</head> + +<body> + <div class="section"> + <h1 id="pagetop">How to replace the default GRUB configuration file on a libreboot system</h1> + <p> + Libreboot on x86 uses the GRUB <a href="http://www.coreboot.org/Payloads#GRUB_2">payload</a> + by default, which means that the GRUB configuration file + (where your GRUB menu comes from) is stored directly alongside libreboot + and its GRUB payload executable, inside + the flash chip. In context, this means that installing distributions and managing them + is handled slightly differently compared to traditional BIOS systems. + </p> + <p> + A libreboot (or coreboot) ROM image is not simply "flat"; there is an actual + filesystem inside called CBFS (coreboot filesystem). A utility called 'cbfstool' + allows you to change the contents of the ROM image. In this case, libreboot is configured + such that the 'grub.cfg' and 'grubtest.cfg' files exist directly inside CBFS instead of + inside the GRUB payload 'memdisk' (which is itself stored in CBFS). + </p> + <p> + You can either modify + the GRUB configuration stored in the flash chip, or you can modify a GRUB configuration + file on the main storage which the libreboot GRUB payload will automatically search for. + </p> + <p> + Here is an excellent writeup about CBFS (coreboot filesystem): + <a href="http://lennartb.home.xs4all.nl/coreboot/col5.html">http://lennartb.home.xs4all.nl/coreboot/col5.html</a>. + </p> + <p> + <b>This guide is *only* for the GRUB payload. If you use the depthcharge payload, ignore this section entirely.</b> + </p> + <p> + <a href="index.html">Back to previous index</a> + </p> + </div> + + <div class="section"> + + <h1>Table of Contents</h1> + + <ul> + <li><a href="#introduction">Introduction</a></li> + <li><a href="#option1_dont_reflash">1st option: don't re-flash</a></li> + <li> + <a href="#option2_reflash">2nd option: re-flash</a> + <ul> + <li><a href="#tools">Acquire the necessary utilities</a></li> + <li><a href="#rom">Acquiring the correct ROM image</a></li> + <li><a href="#extract_testconfig">Extract grubtest from the ROM image</a> + <li><a href="#reinsert_modified_testconfig">Re-insert the modified grubtest.cfg into the ROM image</a></li> + <li><a href="#testing">Testing</a> + <li><a href="#final_steps">Final steps</a></li> + </ul> + </li> + </ul> + + </div> + + <div class="section"> + + <h2 id="introduction">Introduction</h2> + + <p> + Download the latest release from + <a href="http://libreboot.org/">http://libreboot.org/</a> + <br/><b>If you downloaded from git, refer to + <a href="../git/index.html#build_meta">../git/index.html#build_meta</a> before continuing.</b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + <p> + There are several advantages to modifying the GRUB configuration stored in CBFS, but + this also means that you have to flash a new libreboot ROM image on your system (some users + feel intimidated by this, to say the least). + Doing so can be risky if not handled correctly, because it can result in a bricked + system (recovery is easy if you have the <a href="../install/bbb_setup.html">equipment</a> + for it, but most people don't). If you aren't up to that then don't worry; it is possible + to use a custom GRUB menu without flashing a new image, by loading a GRUB configuration + from a partition on the main storage instead. + </p> + + + </div> + + <div class="section"> + + <h2 id="option1_dont_reflash">1st option: don't re-flash</h2> + + <p> + By default, GRUB in libreboot is configured to scan all partitions on the main storage + for /boot/grub/libreboot_grub.cfg or /grub/libreboot_grub.cfg(for systems where /boot + is on a dedicated partition), and then use it automatically. + </p> + <p> + Simply create your custom GRUB configuration and save it to <b>/boot/grub/libreboot_grub.cfg</b> + on the running system. The next time you boot, GRUB (in libreboot) will automatically switch to + this configuration file. <b>This means that you do not have to re-flash, recompile or otherwise + modify libreboot at all!</b> + </p> + + <p> + Ideally, your distribution should automatically generate a libreboot_grub.cfg file that is written + specifically under the assumption that it will be read and used on a libreboot system that uses + GRUB as a payload. If your distribution does not do this, then you can try to add that feature + yourself or politely ask someone involved with or otherwise knowledgeable about the distribution + to do it for you. The libreboot_grub.cfg could either contain the full configuration, or it could + chainload another GRUB ELF executable (built to be used as a coreboot payload) that is located in + a partition on the main storage. + </p> + + <p> + If you want to adapt a copy of the existing <i>libreboot</i> GRUB configuration and use that for the libreboot_grub.cfg file, then + follow <a href="#tools">#tools</a>, <a href="#rom">#rom</a> and + <a href="#extract_testconfig">#extract_testconfig</a> to get the <b><i>grubtest.cfg</i></b>. + Rename <b><i>grubtest.cfg</i></b> to <b><i>libreboot_grub.cfg</i></b> and save it to <b><i>/boot/grub/</i></b> + on the running system where it is intended to be used. Modify the file at that location however you see fit, + and then stop reading this guide (the rest of this page is irrelevant to you); <b>in libreboot_grub.cfg on disk, + if you are adapting it based on grub.cfg from CBFS then remove the check for libreboot_grub.cfg otherwise it will loop.</b>. + </p> + + <p> + This is all well and good, but what should you actually put in your GRUB configuration file? + Read <a href="grub_config.html">grub_config.html</a> for more information. + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="option2_reflash">2nd option: re-flash</h2> + + <p> + You can modify what is stored inside the flash chip quite easily. Read on to find out how. + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + <div class="section"> + <h2 id="tools">Acquire the necessary utilities</h2> + + <p> + Use <b><i>cbfstool</i></b> and <b><i>flashrom</i></b>. There are available in the <i>libreboot_util</i> release archive, + or they can be compiled (see <a href="../git/index.html#build_flashrom">../git/index.html#build_flashrom</a>). + Flashrom is also available from the repositories:<br/> + # <b>pacman -S flashrom</b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="rom">Acquiring the correct ROM image</h2> + + <p> + You can either work directly with one of the ROM images already included in the libreboot ROM archives, or re-use the ROM that + you have currently flashed. For the purpose of this tutorial it is assumed that your ROM image file is named <i>libreboot.rom</i>, + so please make sure to adapt. + </p> + <p> + ROM images are included pre-compiled in libreboot. You can also dump your current firmware, using flashrom:<br/> + $ <b>sudo flashrom -p internal -r libreboot.rom</b><br/> + # <b>flashrom -p internal -r libreboot.rom</b><br/> + If you are told to specify the chip, add the option <b>-c {your chip}</b> to the command, for example:<br/> + # <b>flashrom -c MX25L6405 -p internal -r libreboot.rom</b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="extract_testconfig">Extract grubtest.cfg from the ROM image</h2> + + <p> + You can check the contents of the ROM image, inside CBFS:<br/> + <b>$ cd .../libreboot_util/cbfstool</b> + <b>$ ./cbfstool libreboot.rom print</b> + </p> + + <p> + The files <i>grub.cfg</i> and <i>grubtest.cfg</i> should be present. grub.cfg is loaded by default, + with a menuentry for switching to grubtest.cfg. In this tutorial, you will first modify and test <i>grubtest.cfg</i>. + This is to reduce the possibility of bricking your device, so DO NOT SKIP THIS! + </p> + + <p> + Extract grubtest.cfg from the ROM image:<br/> + <b>$ ./cbfstool libreboot.rom extract -n grubtest.cfg -f grubtest.cfg</b> + </p> + + <p> + Modify the grubtest.cfg accordingly. + </p> + + <p> + This is all well and good, but what should you actually put in your GRUB configuration file? + Read <a href="grub_config.html">grub_config.html</a> for more information. + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="reinsert_modified_testconfig">Re-insert the modified grubtest.cfg into the ROM image</h2> + + <p> + Once your grubtest.cfg is modified and saved, delete the unmodified config from the ROM image:<br/> + <b>$ ./cbfstool libreboot.rom remove -n grubtest.cfg</b> + </p> + + <p> + Next, insert the modified version:<br/> + <b>$ ./cbfstool libreboot.rom add -n grubtest.cfg -f grubtest.cfg -t raw</b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="testing">Testing</h2> + + <p> + <b> + Now you have a modified ROM. Refer back to <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> for information + on how to flash it.<br/> + $ <b>cd /libreboot_util</b> + # <b>./flash update libreboot.rom</b><br/> + Ocassionally, coreboot changes the name of a given board. If flashrom complains about a board mismatch, but you are sure that you chose the correct ROM image, then run this alternative command:<br/> + # <b>./flash forceupdate libreboot.rom</b><br/> + You should see <b>"Verifying flash... VERIFIED."</b> written at the end of the flashrom output. + Once you have done that, shut down and then boot up with your new test configuration. + </b> + </p> + + <p> + Choose (in GRUB) the menu entry that switches to grubtest.cfg. If it works, then your config is safe and you can continue below. + </p> + + <p> + <b> + If it does not work like you want it to, if you are unsure or sceptical in any way, + then re-do the steps above until you get it right! Do *not* proceed past this point + unless you are 100% sure that your new configuration is safe (or desirable) to use. + </b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h2 id="final_steps">Final steps</h2> + + <p> + When you are satisfied booting from grubtest.cfg, you can create a copy of grubtest.cfg, called grub.cfg. This is the same except for one difference: + the menuentry 'Switch to grub.cfg' will be changed to 'Switch to grubtest.cfg' and inside it, + all instances of grub.cfg to grubtest.cfg. This is so that the main config still + links (in the menu) to grubtest.cfg, so that you don't have to manually switch to it, in + case you ever want to follow this guide again in the future (modifying the already modified config). From /libreboot_util/cbfstool, do:<br/> + $ <b>sed -e 's:(cbfsdisk)/grub.cfg:(cbfsdisk)/grubtest.cfg:g' -e 's:Switch to grub.cfg:Switch to grubtest.cfg:g' < grubtest.cfg > grub.cfg</b><br/> + </p> + + <p> + Delete the grub.cfg that remained inside the ROM:<br/> + <b>$ ./cbfstool libreboot.rom remove -n grub.cfg</b> + </p> + + <p> + Add the modified version that you just made:<br/> + <b>$ ./cbfstool libreboot.rom add -n grub.cfg -f grub.cfg -t raw</b> + </p> + + <p> + <b> + Now you have a modified ROM. Again, refer back to <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> for information + on how to flash it. It's the same method as you used before. Shut down and then boot up with your new configuration. + </b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Copyright © 2015 Jeroen Quint <jezza@diplomail.ch><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/gnulinux/grub_config.html b/docs/gnulinux/grub_config.html new file mode 100644 index 00000000..bde9541f --- /dev/null +++ b/docs/gnulinux/grub_config.html @@ -0,0 +1,223 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Writing a GRUB configuration file</title> +</head> + +<body> + <div class="section"> + <h1 id="pagetop">Writing a GRUB configuration file</h1> + <p> + This section is for those systems which use the GRUB payload. + <b>If your system uses the depthcharge payload, ignore this section.</b> + </p> + <p> + <a href="index.html">Back to index</a> + </p> + </div> + + <div class="section"> + + <h1>Table of Contents</h1> + <ul> + <li> + <a href="#example_modifications">Example modifications for <i>grubtest.cfg</i></a> + <ul> + <li><a href="#example_modifications_trisquel">Trisquel GNU/Linux-libre</a></li> + <li><a href="#example_modifications_parabola">Parabola GNU/Linux-libre</a></li> + </ul> + </li> + </ul> + + </div> + + <div class="section"> + <h2 id="example_modifications">Example modifications for <i>grubtest.cfg</i></h2> + + <p> + These are some common examples of ways in which the grubtest.cfg file can be modified. + </p> + + <div class="subsection"> + <h2>Obvious option: don't even modify the built-in grub.cfg</h2> + <p> + Use the menuentry that says something like <i>Search for GRUB outside CBFS</i>. Assuming that you + have a grub.cfg file at /boot/grub/ in your installed distro, this will generate a new menuentry in + the GRUB menu. Use that to boot. + </p> + <p> + Then do this as root:<br/> + $ <b>cd /boot/grub/</b><br/> + $ <b>ln -s grub.cfg libreboot_grub.cfg</b> + </p> + <p> + After that, your system should then boot automatically. + </p> + </div> + + <div class="subsection"> + + <h2>Trisquel with full disk encryption, custom partition layout</h2> + <p> + GRUB can boot from a symlink (or symlinks) pointing to your kernel/initramfs, whether from an unencrypted or encrypted /boot/. You + can create your own custom symlink(s) but you have to manually update them when updating your kernel. This guide (not maintained by + the libreboot project) shows how to configure Trisquel to automatically update that symlink on every kernel update. + <a href="http://www.rel4tion.org/people/fr33domlover/libreboot-fix/">http://www.rel4tion.org/people/fr33domlover/libreboot-fix/</a> + </p> + <p> + TODO: adapt those notes and put them here. The author said that it was CC-0, so re-licensing under GFDL shouldn't be a problem. + </p> + + </div> + + <div class="subsection"> + <h3 id="example_modifications_trisquel">Trisquel GNU/Linux-libre</h3> + + <p> + As an example, on my test system in /boot/grub/grub.cfg (on the HDD/SSD) I see for the main menu entry: + </p> + <ul> + <li><b>linux /boot/vmlinuz-3.15.1-gnu.nonpae root=UUID=3a008e14-4871-497b-95e5-fb180f277951 ro crashkernel=384M-2G:64M,2G-:128M quiet splash $vt_handoff</b></li> + <li><b>initrd /boot/initrd.img-3.15.1-gnu.nonpae</b></li> + </ul> + + <p> + <b>ro</b>, <b>quiet</b>, <b>splash</b>, <b>crashkernel=384M-2G:64M,2G-:128M</b> and + <b>$vt_handoff</b> can be safely ignored. + </p> + + <p> + I use this to get my partition layout:<br/> + $ <b>lsblk</b> + </p> + + <p> + In my case, I have no /boot partition, instead /boot is on the same partition as / on sda1. + Yours might be different. In GRUB terms, sda means ahci0. 1 means msdos1, or gpt1, depending + on whether I am using MBR or GPT partitioning. Thus, /dev/sda1 is GRUB is (ahci0,msdos1) or + (ahci0,gpt1). In my case, I use MBR partitioning so it's (ahci0,msdos1). + 'msdos' is a GRUB name simply because this partitioning type is traditionally used by MS-DOS. + It doesn't mean that you have a proprietary OS. + </p> + + <p> + Trisquel doesn't keep the filenames of kernels consistent, instead it keeps old kernels and + new kernel updates are provided with the version in the filename. This can make GRUB payload + a bit tricky. Fortunately, there are symlinks /vmlinuz and /initrd.img + so if your /boot and / are on the same partition, you can set GRUB to boot from that. + These are also updated automatically when installing kernel updates from your distributions + apt-get repositories. + <b> + Note: when using <a href="http://jxself.org/linux-libre">jxself kernel releases</a>, + these are not updated at all and you have to update them manually. + </b> + </p> + + <p> + For the GRUB payload grubtest.cfg (in the 'Load Operating System' menu entry), we therefore have (in this example):<br/> + <b>set root='ahci0,msdos1'</b><br/> + <b>linux /vmlinuz root=UUID=3a008e14-4871-497b-95e5-fb180f277951</b><br/> + <b>initrd /initrd.img</b> + </p> + + <p> + Optionally, you can convert the UUID to its real device name, for example /dev/sda1 in this case. + sdX naming isn't very reliable, though, which is why UUID is used for most distributions. + </p> + + <p> + Alternatively, if your /boot is on a separate partition then you cannot rely on the /vmlinuz and /initrd.img symlinks. + Instead, go into /boot and create your own symlinks (update them manually when you install a new kernel update).<br/> + $ <b>sudo -s</b> (or <b>su -</b>)<br/> + # <b>cd /boot/</b><br/> + # <b>rm -f vmlinuz initrd.img</b><br/> + # <b>ln -s <u>yourkernel</u> ksym</b><br/> + # <b>ln -s <u>yourinitrd</u> isym</b><br/> + # <b>exit</b> + </p> + + <p> + Then your grubtest.cfg menu entry (for payload) becomes like that, for example if / was on sda2 and /boot was on sda1:<br/> + <b>set root='ahci0,msdos1'</b><br/> + <b>linux /ksym root=/dev/sda2</b><br/> + <b>initrd /isym</b> + </p> + + <p> + There are lots of possible variations so please try to adapt. + </p> + + </div> + + <div class="subsection"> + <h3 id="example_modifications_parabola">Parabola GNU/Linux-libre</h3> + + <p> + You can basically adapt the above. Note however that Parabola does not keep old kernels still installed, and the file names + are always consistent, so you don't need to boot from symlinks, you can just use the real thing directly. + </p> + </div> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/gnulinux/index.html b/docs/gnulinux/index.html new file mode 100644 index 00000000..25c3b79e --- /dev/null +++ b/docs/gnulinux/index.html @@ -0,0 +1,97 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>GNU/Linux distributions</title> +</head> + +<body> + + <div class="section"> + + <h1 id="pagetop">GNU/Linux distributions</h1> + <p> + This section relates to dealing with GNU/Linux distributions: preparing bootable USB drives, + changing the default GRUB menu and so on. + </p> + <p> + <b>This section is only for the *GRUB* payload. For depthcharge, instructions have yet to be written.</b> + </p> + <p> + <a href="../index.html">Back to previous index</a>. + </p> + <ul> + <li><a href="grub_boot_installer.html">How to install GNU/Linux on a libreboot system</a></li> + <li> + <a href="grub_cbfs.html">How to replace the default GRUB configuration file on a libreboot system</a> + <ul> + <li><a href="grub_config.html">Writing a GRUB configuration file</a></li> + </ul> + </li> + <li> + <a href="encrypted_parabola.html">Installing Parabola GNU/Linux-libre with full disk encryption (including /boot)</a> + <ul> + <li>Follow-up tutorial: <a href="configuring_parabola.html">Configuring Parabola (post-install)</a></li> + </ul> + </li> + <li><a href="encrypted_trisquel.html">Installing Trisquel GNU/Linux-libre with full disk encryption (including /boot)</a></li> + </ul> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/grub/index.html b/docs/grub/index.html new file mode 100644 index 00000000..13422bb4 --- /dev/null +++ b/docs/grub/index.html @@ -0,0 +1,190 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>GRUB payload</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">GRUB payload</h1> + <p> + This section relates to the GRUB payload used in libreboot. + </p> + <p> + Or <a href="../index.html">Back to main index</a>. + </p> + <ul> + <li><a href="#grub_background">Changing the background image in GRUB</a></li> + <li><a href="#grub_font">Setting font in GRUB</a></li> + <li><a href="#grub_keyboard">GRUB keyboard layouts</a> + <ul> + <li><a href="#grub_custom_keyboard">Custom keyboard layout in GRUB</a></li> + <li><a href="#grub_ukdvorak_keyboard">UK Dvorak keyboard layout in GRUB</a></li> + </ul> + </li> + </ul> + </div> + + <div class="section"> + + <h1 id="grub_background">Changing the background image in GRUB</h1> + + <p> + Use cbfstool from libreboot_util, or libreboot_src/coreboot/util/cbfstool/ if you want to build from source. + </p> + <p> + ./cbfstool yourrom.rom remove background.png -n background.png<br/> + ./cbfstool yourrom.rom add -f background.png -n background.png -t raw + </p> + <p> + When you've done this, re-flash your ROM and you should have a new background at boot time. + </p> + + </div> + + <div class="section"> + + <h1 id="grub_font">Setting font in GRUB (for reference)</h1> + + <p>You don't need to do this unless you would like to change the default font yourself. + (this is just for reference. It has already been done for you)</p> + + <p>The old font used was Unifont, and this had some missing characters: for instance, the border showed ??? characters instead of lines.</p> + + <p>I tried DeJavu Sans Mono from this website: + <a href="http://dejavu-fonts.org/wiki/Download">dejavu-fonts.org</a></p> + + <p>Specifically, the version that I chose was the latest at the time of writing (Saturday 21 June 2014): + <a href="http://sourceforge.net/projects/dejavu/files/dejavu/2.34/dejavu-fonts-ttf-2.34.tar.bz2">this one</a></p> + + <p>This is a free font that is also contained in GNU/Linux distributions like Trisquel or Parabola.</p> + + <p><b>$ cd libreboot_src/grub</b><br/> + compile grub (the build scripts info on how to do this)<br/> + come back out into libreboot_src/resources/grub:<br/> + <b>$ cd ../libreboot_src/resources/grub/font</b></p> + + <p>I took Dejavu Sans Mono from dejavu (included in this version of libreboot) and did:<br/> + <b>$ ../../../grub/grub-mkfont -o dejavusansmono.pf2 dejavu-fonts-ttf-2.34/ttf/DejaVuSansMono.ttf</b></p> + + <p>I then added the instructions to 'gen.sh' script in grub-assemble to include resources/grub/dejavusansmono.pf2 + in all of the ROM images, at the root of the GRUB memdisk.<br/> + I then added that instructions to the grub.cfg files (to load the font):<br/> + <b>loadfont (memdisk)/dejavusansmono.pf2</b></p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="grub_keyboard">GRUB keyboard layouts (for reference)</h1> + + <div class="subsection"> + + <h2 id="grub_custom_keyboard">Custom keyboard layout in GRUB (for reference)</h2> + + <p> + Keymaps are stored in resources/utilities/grub-assemble/keymap/. + </p> + + <p> + Example (French Azerty):<br/> + <b>$ ckbcomp fr > frazerty</b><br/><br/> + Go in grub directory:<br/> + <b>cat frazerty | ./grub/grub-mklayout -o frazerty.gkb</b> + </p> + + <p> + You must make sure that the files are named keymap and keymap.gkb (where 'keymap' can be whatever you want). + </p> + + <p> + Then from the above example, you would put <b>frazerty</b> in <b>resources/utilities/grub-assemble/keymap/original/</b> and + the <b>frazerty.gkb</b> file goes under <b>resources/utilities/grub-assemble/keymap/</b> + </p> + + <p> + The build scripts will automatically see this, and automatically build + ROM images with your custom layout (given the name) and include them under bin. Example: <b>libreboot_frazerty.rom</b>. + </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="subsection"> + + <h2 id="grub_ukdvorak_keyboard">UK Dvorak keyboard layout in GRUB (for reference)</h2> + + <p> + ukdvorak had to be created manually, based on usdvorak. diff them (under resources/utilities/grub-assemble/keymap/original) + to see how ukdvorak file was created + </p> + + <p><b>$ cat ukdvorak | ./grub/grub-mklayout -o ukdvorak.gkb</b></p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + </div> + + <div class="section"> + + <p> + Copyright © 2014 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hardware/index.html b/docs/hardware/index.html new file mode 100644 index 00000000..3b11f25b --- /dev/null +++ b/docs/hardware/index.html @@ -0,0 +1,82 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Hardware maintenance</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Hardware maintenance</h1> + <p> + This section relates to hardware maintenance on supported targets. + </p> + <p> + <a href="../index.html">Back to previous index</a>. + </p> + <ul> + <li><a href="x60_keyboard.html">ThinkPad X60/X60s/X60T: Change keyboard</a> (the procedure on X200/X200S/X200T is almost identical)</li> + <li><a href="x60_heatsink.html">ThinkPad X60/X60S: change the fan/heatsink</a></li> + <li><a href="x60_lcd_change.html">ThinkPad X60/X60s: How to change the LCD panel</a> (incomplete. pics only for now)</li> + <li><a href="t60_lcd_15.html">ThinkPad T60 15.1" changing LCD panel</a></li> + <li><a href="t60_heatsink.html">ThinkPad T60: change the fan/heatsink</a></li> + </ul> + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hardware/t60_heatsink.html b/docs/hardware/t60_heatsink.html new file mode 100644 index 00000000..9b83eeba --- /dev/null +++ b/docs/hardware/t60_heatsink.html @@ -0,0 +1,171 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Changing the heatsink or CPU on a ThinkPad T60</title> +</head> + +<body> + + <div class="section"> + <h1>Changing heatsink (or CPU) on the ThinkPad T60</h1> + <p> + Using this guide you can also change/upgrade the CPU. + </p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + <h1 id="hardware_requirements">Hardware requirements</h1> + <ul> + <li>rubbing alcohol or isopropyl alcohol, and thermal compound for changing CPU heatsink (procedure involves removing heatsink)</li> + <li>thermal compound/paste (Arctic MX-4 is good. Others are also good.)</li> + </ul> + </div> + + <div class="section"> + <h1 id="software_requirements">Software requirements</h1> + <ul> + <li>xsensors</li> + <li>stress</li> + </ul> + </div> + + <div class="section"> + + <h1 id="recovery">Disassembly</h1> + + <p> + Remove those screws and remove the HDD:<br/> + <img src="../images/t60_dev/0001.JPG" alt="" /> <img src="../images/t60_dev/0002.JPG" alt="" /> + </p> + + <p> + Lift off the palm rest:<br/> + <img src="../images/t60_dev/0003.JPG" alt="" /> + </p> + + <p> + Lift up the keyboard, pull it back a bit, flip it over like that and then disconnect it from the board:<br/> + <img src="../images/t60_dev/0004.JPG" alt="" /> <img src="../images/t60_dev/0005.JPG" alt="" /> <img src="../images/t60_dev/0006.JPG" alt="" /> + </p> + + <p> + Gently wedge both sides loose:<br/> + <img src="../images/t60_dev/0007.JPG" alt="" /> <img src="../images/t60_dev/0008.JPG" alt="" /> + </p> + + <p> + Remove that cable from the position:<br/> + <img src="../images/t60_dev/0009.JPG" alt="" /> <img src="../images/t60_dev/0010.JPG" alt="" /> + </p> + + <p> + Remove the bezel (sorry forgot to take pics). + </p> + + <p> + On the CPU (and there is another chip south-east to it, sorry forgot to take pic) + clean off the old thermal paste (with the alcohol) and apply new (Artic Silver 5 is good, others are good too) + you should also clean the heatsink the same way<br/> + <img src="../images/t60_dev/0051.JPG" alt="" /> + </p> + + <p> + This is also an opportunity to change the CPU to another one. For example if you had a Core Duo T2400, you can upgrade it to a better processor + (higher speed, 64-bit support). A Core 2 Duo T7600 was installed here. + </p> + + <p> + Attach the heatsink and install the screws (also, make sure to install the AC jack as highlighted):<br/> + <img src="../images/t60_dev/0052.JPG" alt="" /> + </p> + + <p> + Reinstall that upper bezel:<br/> + <img src="../images/t60_dev/0053.JPG" alt="" /> + </p> + + <p> + Do that:<br/> + <img src="../images/t60_dev/0054.JPG" alt="" /> <img src="../images/t60_dev/0055.JPG" alt="" /> + </p> + + <p> + Attach keyboard:<br/> + <img src="../images/t60_dev/0056.JPG" alt="" /> + </p> + + <p> + Place keyboard and (sorry, forgot to take pics) reinstall the palmrest and insert screws on the underside:<br/> + <img src="../images/t60_dev/0058.JPG" alt="" /> + </p> + + <p> + It lives!<br/> + <img src="../images/t60_dev/0071.JPG" alt="" /> <img src="../images/t60_dev/0072.JPG" alt="" /> <img src="../images/t60_dev/0073.JPG" alt="" /> + </p> + + <p> + Always stress test ('stress -c 2' and xsensors. below 90C is ok) when replacing cpu paste/heatsink:<br/> + <img src="../images/t60_dev/0074.JPG" alt="" /> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hardware/t60_lcd_15.html b/docs/hardware/t60_lcd_15.html new file mode 100644 index 00000000..a1c5d691 --- /dev/null +++ b/docs/hardware/t60_lcd_15.html @@ -0,0 +1,128 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Changing LCD panel on 15.1 inch T60</title> +</head> + +<body> + + <div class="section"> + <h1>Changing the LCD panel on a 15.1" T60</h1> + <p> + This is for the 15.1" T60. If you have another size then the procedure will differ; for example, on 14.1" you have + to remove the hinges and the procedure is a bit more involved than on 15.1". + </p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + + <h1 id="recovery">Disassembly</h1> + + <p> + Remove those covers and unscrew:<br/> + <img src="../images/t60_dev/0059.JPG" alt="" /> <img src="../images/t60_dev/0060.JPG" alt="" /> <img src="../images/t60_dev/0061.JPG" alt="" /> + </p> + + <p> + Gently pry off the front bezel. + </p> + + <p> + Remove inverter board:<br/> + <img src="../images/t60_dev/0064.JPG" alt="" /> + </p> + + <p> + Disconnect LCD cable:<br/> + <img src="../images/t60_dev/0065.JPG" alt="" /> + </p> + + <p> + Remove the panel:<br/> + <img src="../images/t60_dev/0066.JPG" alt="" /> + </p> + + <p> + Move the rails (left and right side) from the old panel to the new one and then attach LCD cable:<br/> + <img src="../images/t60_dev/0068.JPG" alt="" /> + </p> + + <p> + Insert panel (this one is an LG-Philips LP150E05-A2K1, and there are others. See <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a>):<br/> + <img src="../images/t60_dev/0069.JPG" alt="" /> + </p> + + <p> + Insert new inverter board (see <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a> for what is recommended on your LCD panel):<br/> + <img src="../images/t60_dev/0070.JPG" alt="" /> + </p> + + <p> + Now re-attach the front bezel and put all the screws in. + </p> + + <p> + It lives!<br/> + <img src="../images/t60_dev/0071.JPG" alt="" /> <img src="../images/t60_dev/0072.JPG" alt="" /> <img src="../images/t60_dev/0073.JPG" alt="" /> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hardware/x60_heatsink.html b/docs/hardware/x60_heatsink.html new file mode 100644 index 00000000..97747141 --- /dev/null +++ b/docs/hardware/x60_heatsink.html @@ -0,0 +1,187 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Libreboot documentation: Switch heatsink on ThinkPad X60</title> +</head> + +<body> + + <div class="section"> + <h1>Changing the fan/heatsink on the ThinkPad X60</h1> + <p> + This guide will teach you how to replace the fan and heatsink on your ThinkPad X60. + </p> + <p><a href="index.html">Back to main index</a></p> + </div> + + <div class="section"> + <h1>Table of Contents</h1> + <ul> + <li><a href="#hardware_requirements">Hardware Requirements</a></li> + <li><a href="#software_requirements">Software Requirements</a></li> + <li><a href="#procedure">Disassembly</a></li> + </ul> + </div> + + <div class="section"> + <h1 id="hardware_requirements">Hardware requirements</h1> + <ul> + <li>isopropyl alcohol (sometimes called rubbing alcohol)</li> + <li>your new fan and/or heatsink</li> + <li>CPU thermal compound (some say Arctic MX-4 is good, others are also 'ok')</li> + <li>Something to spread the paste with</li> + </ul> + </div> + + <div class="section"> + <h1 id="software_requirements">Software requirements (for CPU stress testing)</h1> + <ul> + <li>xsensors utility</li> + <li>stress utility</li> + </ul> + </div> + + <div class="section"> + <h1 id="procedure">Disassembly</h1> + <p> + Remove those screws:<br/> + <img src="../images/x60_heatsink/0000.jpg" alt="" /> + </p> + <p> + Push the keyboard forward (carefully):<br/> + <img src="../images/x60_heatsink/0001.jpg" alt="" /> + </p> + <p> + Lift the keyboard up and disconnect it from the board:<br/> + <img src="../images/x60_heatsink/0002.jpg" alt="" /> + </p> + <p> + Grab the right-hand side of the chassis and force it off (gently) and pry up the rest of the chassis:<br/> + <img src="../images/x60_heatsink/0003.jpg" alt="" /> + </p> + <p> + You should now have this:<br/> + <img src="../images/x60_heatsink/0004.jpg" alt="" /> + </p> + <p> + Disconnect the wifi antenna cables, the modem cable and the speaker:<br/> + <img src="../images/x60_heatsink/0005.jpg" alt="" /> + </p> + <p> + Unroute the cables along their path, carefully lifting the tape that holds them in place. Then, disconnect the modem + cable (other end) and power connection and unroute all the cables so that they dangle by the monitor hinge on the right-hand + side:<br/> + <img src="../images/x60_heatsink/0006.jpg" alt="" /> + </p> + <p> + Disconnect the monitor from the motherboard, and unroute the grey antenna cable, carefully lifting the tape + that holds it into place:<br/> + <img src="../images/x60_heatsink/0008.jpg" alt="" /> + </p> + <p> + Carefully lift the remaining tape and unroute the left antenna cable so that it is loose:<br/> + <img src="../images/x60_heatsink/0009.jpg" alt="" /> + </p> + <p> + Remove those screws:<br/> + <img src="../images/x60_heatsink/0011.jpg" alt="" /> + </p> + <p> + Remove those screws:<br/> + <img src="../images/x60_heatsink/0012.jpg" alt="" /> + </p> + <p> + Carefully remove the plate, like so:<br/> + <img src="../images/x60_heatsink/0013.jpg" alt="" /> + </p> + <p> + Remove the SATA connector:<br/> + <img src="../images/x60_heatsink/0014.jpg" alt="" /> + </p> + <p> + Now remove the motherboard (gently) and cast the lcd/chassis aside:<br/> + <img src="../images/x60_heatsink/0015.jpg" alt="" /> + </p> + <p> + Look at that black tape above the heatsink, remove it:<br/> + <img src="../images/x60_heatsink/0016.jpg" alt="" /> + </p> + <p> + Now you have removed it:<br/> + <img src="../images/x60_heatsink/0017.jpg" alt="" /> + </p> + + <p> + Disconnect the fan and remove all the screws, heatsink will easily come off:<br/> + <img src="../images/x60_heatsink/0018.jpg" alt="" /> + </p> + + <p> + Remove the old paste with a cloth (from the CPU and heatsink) and then clean both of them with the alcohol (to remove remaining residue of the paste). + Apply a pea-sized amount of paste to the both chipsets that the heatsink covered and spread it evenly (uniformally). + Finally reinstall the heatsink, reversing previous steps. + </p> + + <p> + <b>stress -c 2</b> command can be used to push the CPU to 100%, and <b>xsensors</b> (or <b>watch sensors</b> command) can be used to monitor heat. + Below 90C is ok. + </p> + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hardware/x60_keyboard.html b/docs/hardware/x60_keyboard.html new file mode 100644 index 00000000..9216b337 --- /dev/null +++ b/docs/hardware/x60_keyboard.html @@ -0,0 +1,91 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad X60: Change keyboard</title> +</head> + +<body> + + <div class="section"> + <h1>Thinkpad X60/X60s/X60t: Change keyboard</h1> + <p> + Use this guide to replace the keyboard on your ThinkPad X60. Also works for X60s and X60 Tablet. + </p> + <p> + Although slightly different, this guide can also be followed for the ThinkPad X200, X200S and X200 Tablet. + The screws are in more or less the same place, and it's the same procedure. + </p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + + <h1 id="recovery">Just follow these steps, and then reverse</h1> + + <p> + <img src="../images/x60_keyboard/1.JPG"><br/> + <img src="../images/x60_keyboard/2.JPG"><br/> + <img src="../images/x60_keyboard/3.JPG"><br/> + <img src="../images/x60_keyboard/4.JPG"><br/> + <img src="../images/x60_keyboard/5.JPG"> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hardware/x60_lcd_change.html b/docs/hardware/x60_lcd_change.html new file mode 100644 index 00000000..2bd3f6ad --- /dev/null +++ b/docs/hardware/x60_lcd_change.html @@ -0,0 +1,83 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Libreboot documentation: Unbricking the ThinkPad T60</title> +</head> + +<body> + + <div class="section"> + <h1>Changing the LCD panel on X60</h1> + <p>This tutorial is incomplete, and only pictures for now.</p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + <p> + <img src="../images/x60_lcd_change/0001.JPG" alt="" /> + <img src="../images/x60_lcd_change/0002.JPG" alt="" /> + <img src="../images/x60_lcd_change/0003.JPG" alt="" /> + <img src="../images/x60_lcd_change/0004.JPG" alt="" /> + <img src="../images/x60_lcd_change/0005.JPG" alt="" /> + <img src="../images/x60_lcd_change/0006.JPG" alt="" /> + <img src="../images/x60_lcd_change/0007.JPG" alt="" /> + </p> + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hcl/c201.html b/docs/hcl/c201.html new file mode 100644 index 00000000..17240f1c --- /dev/null +++ b/docs/hcl/c201.html @@ -0,0 +1,262 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ASUS Chromebook C201</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">ASUS Chromebook C201</h1> + + <p> + This is a Chromebook, using the Rockchip RK3288 SoC. It uses + an ARM CPU, and has free EC firmware (unlike some other laptops). + More RK3288-based laptops will be added to libreboot at a later date. + </p> + <p> + Paul Kocialkowski, a <a href="http://www.replicant.us/">Replicant</a> developer, ported this laptop to libreboot. Thank you, Paul! + </p> + + <p> + <b>More info will be added later, including build/installation instructions. + The board is supported in libreboot, however, and has been confirmed to work.</b> + </p> + + <p> + Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + </p> + + <p> + <a href="index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + <ul> + <li><a href="#googlesintent">Google's intent with CrOS devices</a></li> + <li><a href="#os">Considerations about ChromeOS and free operating systems</a></li> + <li><a href="#videoblobs">Caution: Video acceleration requires a non-free blob, software rendering can be used instead.</a></li> + <li><a href="#wifiblobs">Caution: WiFi requires a non-free blob, a USB dongle can be used instead.</a></li> + <li><a href="#ec">EC firmware is free software!</a></li> + <li><a href="#microcode">No microcode!</a></li> + <li><a href="#depthcharge">Depthcharge payload</a></li> + <li><a href="#thescrew">Flash chip write protection: the screw</a></li> + </ul> + </div> + + <div class="section"> + <h1 id="googlesintent">Google's intent with CrOS devices</h1> + <p> + CrOS (Chromium OS/Chrome OS) devices, such as Chromebooks, were not designed with the intent of bringing more freedom to users. + However, they run with a lot of free software at the boot software and embedded controller levels, + since free software gives Google enough flexibility to optimize various aspects such as boot time + and most importantly, to implement the CrOS security system, that involves various aspects of the software. + Google does hire a lot of Coreboot developers, who are generally friendly to the free software movement + and try to be good members of the free software community, by contributing code back. + </p> + <p> + CrOS devices are designed (from the factory) to actually coax the user into using + <a href="https://www.gnu.org/philosophy/who-does-that-server-really-serve.en.html">proprietary web services</a> + (SaaSS) that invade the user's privacy (ChromeOS is literally just the Google Chrome browser when you boot up, itself proprietary + and comes with proprietary add-ons like flash. It's only intended for SaaSS, not actual, real computing). + Google is even a member of the <i>PRISM</i> program, as outlined + by Edward Snowden. See notes about ChromeOS below. The libreboot project recommends + that the user replace the default <i>ChromeOS</i> with a distribution that can be used in freedom, + without invading the user's privacy. + </p> + <p> + We also use a similar argument for the MacBook and the ThinkPads that are supported in libreboot. + Those laptops are supported, in spite of Apple and Lenovo, companies which are actually <i>hostile</i> + to the free software movement. + </p> + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + </div> + + <div class="section"> + <h1 id="os">Considerations about ChromeOS and free operating systems</h1> + <p> + This laptop comes preinstalled (from the factory) with Google ChromeOS. This is a GNU/Linux distribution, but it's not general purpose + and it comes with proprietary software. It's designed for <i><a href="https://www.gnu.org/philosophy/who-does-that-server-really-serve.en.html">SaaSS</a></i>. Libreboot recommends that users of this laptop replace it with another distribution. + </p> + <h2>FSF endorsed distros</h2> + <p> + The FSF has a <a href="https://www.gnu.org/distros/free-distros.html">list of distributions</a> that are 100% free software. + Only one of them is confirmed to work on ARM CrOS devices. Parabola looks hopeful: <a href="https://www.parabola.nu/news/parabola-supports-armv7/">https://www.parabola.nu/news/parabola-supports-armv7/</a>. + </p> + <p> + The libreboot project would like to see all FSF-endorsed distro projects port to these laptops. This includes Trisquel, GuixSD and others. + And ProteanOS. Maybe even LibreCMC. The more the merrier. We need them, badly. + </p> + <p> + <b>We need these distributions to be ported as soon as possible.</b> + </p> + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + </div> + + <div class="section"> + <h1 id="videoblobs">Caution: Video acceleration requires a non-free blob, software rendering can be used instead.</h1> + <p> + The Tamil driver source code for the onboard Mali T GPU is not released. The developer has so-far withheld it. Until that is released, the only way to use video (in freedom) on this laptop is to not have video acceleration, by making sure not to install the relevant blob. Most tasks can still be performed without video acceleration, without any noticeable performance penalty. + </p> + <p> + In practise, this means that certain things like games, blender and GNOME shell (or other fancy desktops) won't work well. + The libreboot project recommends a lightweight desktop which does not need video acceleration, such as <i>XFCE</i> or <i>LXDE</i>. + </p> + <p> + The Tamil developer wrote this blog post, which sheds light on the story: <a href="http://libv.livejournal.com/27461.html">http://libv.livejournal.com/27461.html,http://libv.livejournal.com/27461.html</a>. + </p> + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + </div> + <div class="section"> + <h1 id="wifiblobs">Caution: WiFi requires a non-free blob, a USB dongle can be used instead.</h1> + <p> + These laptops have non-removeable (soldered on) WiFi chips, which require non-free firmware in the Linux kernel + in order to work. + </p> + <p> + The libreboot project recommends using an external USB wifi dongle that works + with free software. See <a href="index.html#recommended_wifi">index.html#recommended_wifi</a>. + </p> + <p> + There are 2 companies (endorsed by the Free Software Foundation, under their <i>Respects your Freedom</i> + guidelines), that sell USB WiFi dongles guaranteed to work with free software (i.e. linux-libre kernel): + </p> + <ul> + <li><a href="https://www.thinkpenguin.com/gnu-linux/penguin-wireless-n-usb-adapter-gnu-linux-tpe-n150usb">ThinkPenguin sells them</a> (company based in USA)</li> + <li><a href="https://tehnoetic.com/tehnoetic-wireless-adapter-gnu-linux-libre-tet-n150">Tehnoetic sells them</a> (company based in Europe)</li> + </ul> + <p> + These wifi dongles use the AR9271 (atheros) chipset, supported by + the free <i>ath9k_htc</i> driver in the Linux kernel. They work in <i>linux-libre</i> too. + </p> + </div> + + <div class="section"> + <h1 id="ec">EC firmware is free software!</h1> + <p> + It's free software. Google provides the source. Build scripts will be added later, with EC sources + provided in libreboot, and builds of the EC firmware. + </p> + <p> + This is unlike the other current libreboot laptops (Intel based). In practise, you can + (if you do without the video/wifi blobs, and replace ChromeOS with a distribution + that respects your freedom) be more free when using one of these laptops. + </p> + <p> + The libreboot FAQ briefly describes what an <i>EC</i> is: + <a href="http://libreboot.org/faq/#firmware-ec">http://libreboot.org/faq/#firmware-ec</a> + </p> + </div> + + <div class="section"> + <h1 id="microcode">No microcode!</h1> + <p> + Unlike x86 (e.g. Intel/AMD) CPUs, ARM CPUs do not use microcode, not even built in. + On the Intel/AMD based libreboot systems, there is still microcode in the CPU + (not considered problematic by the FSF, provided that it is reasonably trusted + to not be malicious, since it's part of the hardware and read-only), but we + exclude microcode updates (volatile updates which are uploaded at boot time by the boot firmware, + if present), which are proprietary software. + </p> + <p> + On ARM CPUs, the instruction set is implemented in circuitry, without microcode. + </p> + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + </div> + + <div class="section"> + <h1 id="depthcharge">Depthcharge payload</h1> + <p> + These systems do not use the GRUB payload. Instead, they use a payload called depthcharge, + which is common on CrOS devices. This is free software, maintained by Google. + </p> + </div> + + <div class="section"> + <h1 id="thescrew">Flash chip write protection: the screw</h1> + <p> + It's next to the flash chip. Unscrew it, and the flash chip is read-write. Screw it back in, and the flash chip is read-only. + It's called the screw. + </p> + <p> + <i>The screw</i> is accessible by removing other screws and gently prying off the upper shell, where the flash chip and the screw + are then directly accessible. User flashing from software is possible, without having to externally re-flash, but the flash chip + is SPI (SOIC-8 form factor) so you can also externally re-flash if you want to. In practise, you only need to externally re-flash + if you brick the laptop; read <a href="../install/bbb_setup.html">../install/bbb_setup.html</a> for an example of how to set up + an SPI programmer. + </p> + <p> + Write protection is useful, because it prevents the firmware from being re-flashed by any malicious software that + might become executed on your GNU/Linux system, as root. In other words, it can prevent a firmware-level <i>evil maid</i> attack. It's + possible to write protect on all current libreboot systems, but CrOS devices make it easy. The screw is such a stupidly + simple idea, which all designs should implement. + </p> + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> + diff --git a/docs/hcl/d510mo.html b/docs/hcl/d510mo.html new file mode 100644 index 00000000..7ed00325 --- /dev/null +++ b/docs/hcl/d510mo.html @@ -0,0 +1,82 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Intel D510MO desktop board</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Intel D510MO desktop board</h1> + + <p> + This is a desktop board using intel hardware (circa ~2009, ICH7 southbridge, similar performance-wise to the Libreboot X200. It can make for quite a nifty desktop. Powered by libreboot. + </p> + <p> + NOTE: This board has a working framebuffer in Grub, but in GNU/Linux in native resolution the display is unusable due to some raminit issues. + This board can however be used for building a headless server. + </p> + <p> + Flashing instructions can be found at <a href="../install/d510mo.html">../install/d510mo.html</a> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> + diff --git a/docs/hcl/ga-g41m-es2l.html b/docs/hcl/ga-g41m-es2l.html new file mode 100644 index 00000000..93af1df2 --- /dev/null +++ b/docs/hcl/ga-g41m-es2l.html @@ -0,0 +1,92 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Gigabyte GA-G41M-ES2L desktop board</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Gigabyte GA-G41M-ES2L desktop board</h1> + + <p> + This is a desktop board using intel hardware (circa ~2009, ICH7 southbridge, similar performance-wise to the Libreboot X200. It can make for quite a nifty desktop. Powered by libreboot. + </p> + <p> + IDE on the board is untested, but it might be possible to use a SATA HDD using an IDE SATA adapter. The SATA ports do work. + </p> + <p> + The pci-express x16 port currently does not work on this board. + </p> + <p> + <strong>NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you must build for it from source using the libreboot git repository.</strong> + </p> + <p> + You need to set a custom MAC address in GNU/Linux for the NIC to work. In /etc/network/interfaces on debian-based systems like Trisquel, + this would be in the entry for your NIC:<br/> + hwaddress ether macaddressgoeshere + </p> + <p> + Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> + diff --git a/docs/hcl/gm45_lcd.html b/docs/hcl/gm45_lcd.html new file mode 100644 index 00000000..32816a89 --- /dev/null +++ b/docs/hcl/gm45_lcd.html @@ -0,0 +1,366 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>LCD compatibility on GM45 laptops</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">LCD compatibility on GM45 laptops</h1> + + <p> + On the T400 and T500 (maybe others), some of the higher resolution panels + (e.g. 1440x900, 1680x1050, 1920x1200) fail in libreboot. + </p> + + <p> + <b>All X200/X200S/X200T LCD panels are believed to be compatible.</b> + </p> + + <p> + <a href="index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + <h1>The problem</h1> + <p> + In some cases, backlight turns on during boot, sometimes not. In all cases, + no display is shown in GRUB, nor in GNU/Linux. + </p> + <h1> + Current workaround: + </h1> + <p> + Libreboot (git, and releases after 20150518) now automatically detect whether + to use single or dual link LVDS configuration. If you're using an older version, + use the instructions below. In practise, this means that you'll get a visual + display when booting GNU/Linux, but not in GRUB (payload). + </p> + + <p> + The i915 module in the Linux kernel also provides an option to set the LVDS link configuration. + i915.lvds_channel_mode:Specify LVDS channel mode (0=probe BIOS [default], 1=single-channel, 2=dual-channel) (int) + - from /sbin/modinfo i915 - use <b>i915.lvds_channel_mode=2</b> as a kernel option in grub.cfg. + </p> + </div> + + <div class="section"> + <h1>Differences in dmesg (kernel parameter added: )</h1> + <p> + <a href="https://01.org/linuxgraphics/documentation/how-report-bugs">https://01.org/linuxgraphics/documentation/how-report-bugs</a> + </p> + <p> + These panels all work in the original firmware, so the idea is to see what differences there are in how coreboot handles them. + </p> + <p> + <a href="http://www.coreboot.org/pipermail/coreboot/attachments/20150712/d2e214bb/attachment-0002.txt">dmesg with coreboot-libre</a> (coreboot) - + See: <i>[drm:intel_lvds_init] detected single-link lvds configuration</i> + </p> + <p> + <a href="http://www.coreboot.org/pipermail/coreboot/attachments/20150712/d2e214bb/attachment-0003.txt">dmesg with lenovobios</a> (lenovobios) - + For the same line, it says dual-channel lvds configuration. + </p> + </div> + + <div class="section"> + + <h2 id="edid">EDID</h2> + + <p> + One T500 had a screen (1920x1200) that is currently incompatible. Working to fix it. EDID: + </p> +<pre> +user@user-ThinkPad-T500:~/Desktop$ sudo i2cdump -y 2 0x50 +No size specified (using byte-data access) + 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef +00: XX ff ff ff ff ff ff 00 30 ae 55 40 00 00 00 00 X.......0?U@.... +10: 00 11 01 03 80 21 15 78 ea ba 70 98 59 52 8c 28 .????!?x??p?YR?( +20: 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 %PT...?????????? +30: 01 01 01 01 01 01 e7 3a 80 8c 70 b0 14 40 1e 50 ???????:??p??@?P +40: 24 00 4b cf 10 00 00 19 16 31 80 8c 70 b0 14 40 $.K??..??1??p??@ +50: 1e 50 24 00 4b cf 10 00 00 19 00 00 00 0f 00 d1 ?P$.K??..?...?.? +60: 0a 32 d1 0a 28 11 01 00 32 0c 00 00 00 00 00 fe ?2??(??.2?.....? +70: 00 4c 50 31 35 34 57 55 31 2d 54 4c 42 31 00 9a .LP154WU1-TLB1.? +80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +</pre> + <p> + What happens: backlight turns on at boot, then turns off. At no point is there + a working visual display. + </p> + + <p> + Another incompatible screen (EDID) 1680 x 1050 with the same issue: + </p> +<pre> +EDID: +00 ff ff ff ff ff ff 00 30 ae 53 40 00 00 00 00 +00 11 01 03 80 21 15 78 ea cd 75 91 55 4f 8b 26 +21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 +01 01 01 01 01 01 a8 2f 90 e0 60 1a 10 40 20 40 +13 00 4b cf 10 00 00 19 b7 27 90 e0 60 1a 10 40 +20 40 13 00 4b cf 10 00 00 19 00 00 00 0f 00 b3 +0a 32 b3 0a 28 14 01 00 4c a3 50 33 00 00 00 fe +00 4c 54 4e 31 35 34 50 33 2d 4c 30 32 0a 00 7e +Extracted contents: +header: 00 ff ff ff ff ff ff 00 +serial number: 30 ae 53 40 00 00 00 00 00 11 +version: 01 03 +basic params: 80 21 15 78 ea +chroma info: cd 75 91 55 4f 8b 26 21 50 54 +established: 00 00 00 +standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 +descriptor 1: a8 2f 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 +descriptor 2: b7 27 90 e0 60 1a 10 40 20 40 13 00 4b cf 10 00 00 19 +descriptor 3: 00 00 00 0f 00 b3 0a 32 b3 0a 28 14 01 00 4c a3 50 33 +descriptor 4: 00 00 00 fe 00 4c 54 4e 31 35 34 50 33 2d 4c 30 32 0a +extensions: 00 +checksum: 7e + +Manufacturer: LEN Model 4053 Serial Number 0 +Made week 0 of 2007 +EDID version: 1.3 +Digital display +Maximum image size: 33 cm x 21 cm +Gamma: 220% +Check DPMS levels +DPMS levels: Standby Suspend Off +Supported color formats: RGB 4:4:4, YCrCb 4:2:2 +First detailed timing is preferred timing +Established timings supported: +Standard timings supported: +Detailed timings +Hex of detail: a82f90e0601a1040204013004bcf10000019 +Did detailed timing +Detailed mode (IN HEX): Clock 122000 KHz, 14b mm x cf mm + 0690 06b0 06f0 0770 hborder 0 + 041a 041b 041e 042a vborder 0 + -hsync -vsync +Hex of detail: b72790e0601a1040204013004bcf10000019 +Detailed mode (IN HEX): Clock 122000 KHz, 14b mm x cf mm + 0690 06b0 06f0 0770 hborder 0 + 041a 041b 041e 042a vborder 0 + -hsync -vsync +Hex of detail: 0000000f00b30a32b30a281401004ca35033 +Manufacturer-specified data, tag 15 +Hex of detail: 000000fe004c544e31353450332d4c30320a +ASCII string: LTN154P3-L02 +Checksum +Checksum: 0x7e (valid) +WARNING: EDID block does NOT fully conform to EDID 1.3. + Missing name descriptor + Missing monitor ranges +bringing up panel at resolution 1680 x 1050 +Borders 0 x 0 +Blank 224 x 16 +Sync 64 x 3 +Front porch 32 x 1 +Spread spectrum clock +Single channel +Polarities 1, 1 +Data M1=2132104, N1=8388608 +Link frequency 270000 kHz +Link M1=236900, N1=524288 +Pixel N=9, M1=24, M2=8, P1=1 +Pixel clock 243809 kHz +waiting for panel powerup +panel powered up +</pre> + + <p> + Another incompatible (T400) screen: + </p> +<pre> +No size specified (using byte-data access) + 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef +00: XX ff ff ff ff ff ff 00 30 ae 33 40 00 00 00 00 X.......0?3@.... +10: 00 0f 01 03 80 1e 13 78 ea cd 75 91 55 4f 8b 26 .??????x??u?UO?& +20: 21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 !PT...?????????? +30: 01 01 01 01 01 01 b0 27 a0 60 51 84 2d 30 30 20 ???????'?`Q?-00 +40: 36 00 2f be 10 00 00 19 d5 1f a0 40 51 84 1a 30 6./??..????@Q??0 +50: 30 20 36 00 2f be 10 00 00 19 00 00 00 0f 00 90 0 6./??..?...?.? +60: 0a 32 90 0a 28 14 01 00 4c a3 42 44 00 00 00 fe ?2??(??.L?BD...? +70: 00 4c 54 4e 31 34 31 57 44 2d 4c 30 35 0a 00 32 .LTN141WD-L05?.2 +80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ + +</pre> + + <p> + For comparison, here is a working display (T400 screen, but was + connected to a T500. Some T500 displays also work, but no EDID + available on this page yet): + </p> +<pre> +EDID: +00 ff ff ff ff ff ff 00 30 ae 31 40 00 00 00 00 +00 12 01 03 80 1e 13 78 ea b3 85 95 58 53 8a 28 +25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 +01 01 01 01 01 01 26 1b 00 7d 50 20 16 30 30 20 +36 00 30 be 10 00 00 18 8b 16 00 7d 50 20 16 30 +30 20 36 00 30 be 10 00 00 18 00 00 00 0f 00 81 +0a 32 81 0a 28 14 01 00 30 e4 28 01 00 00 00 fe +00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 00 d8 +Extracted contents: +header: 00 ff ff ff ff ff ff 00 +serial number: 30 ae 31 40 00 00 00 00 00 12 +version: 01 03 +basic params: 80 1e 13 78 ea +chroma info: b3 85 95 58 53 8a 28 25 50 54 +established: 00 00 00 +standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 +descriptor 1: 26 1b 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 +descriptor 2: 8b 16 00 7d 50 20 16 30 30 20 36 00 30 be 10 00 00 18 +descriptor 3: 00 00 00 0f 00 81 0a 32 81 0a 28 14 01 00 30 e4 28 01 +descriptor 4: 00 00 00 fe 00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 +extensions: 00 +checksum: d8 + +Manufacturer: LEN Model 4031 Serial Number 0 +Made week 0 of 2008 +EDID version: 1.3 +Digital display +Maximum image size: 30 cm x 19 cm +Gamma: 220% +Check DPMS levels +DPMS levels: Standby Suspend Off +Supported color formats: RGB 4:4:4, YCrCb 4:2:2 +First detailed timing is preferred timing +Established timings supported: +Standard timings supported: +Detailed timings +Hex of detail: 261b007d502016303020360030be10000018 +Did detailed timing +Detailed mode (IN HEX): Clock 69500 KHz, 130 mm x be mm + 0500 0530 0550 057d hborder 0 + 0320 0323 0329 0336 vborder 0 + -hsync -vsync +Hex of detail: 8b16007d502016303020360030be10000018 +Detailed mode (IN HEX): Clock 69500 KHz, 130 mm x be mm + 0500 0530 0550 057d hborder 0 + 0320 0323 0329 0336 vborder 0 + -hsync -vsync +Hex of detail: 0000000f00810a32810a2814010030e42801 +Manufacturer-specified data, tag 15 +Hex of detail: 000000fe004c503134315758332d544c5231 +ASCII string: LP141WX3-TLR1 +Checksum +Checksum: 0xd8 (valid) +WARNING: EDID block does NOT fully conform to EDID 1.3. + Missing name descriptor + Missing monitor ranges +bringing up panel at resolution 1280 x 800 +Borders 0 x 0 +Blank 125 x 22 +Sync 32 x 6 +Front porch 48 x 3 +Spread spectrum clock +Single channel +Polarities 1, 1 +Data M1=1214600, N1=8388608 +Link frequency 270000 kHz +Link M1=134955, N1=524288 +Pixel N=10, M1=14, M2=11, P1=1 +Pixel clock 138857 kHz +waiting for panel powerup +panel powered up +</pre> + + <p> + Another compatible T400 screen: + </p> +<pre> +trisquel@trisquel:~$ sudo i2cdump -y 2 0x50 +No size specified (using byte-data access) + 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef +00: 00 ff ff ff ff ff ff 00 30 ae 31 40 00 00 00 00 ........0?1@.... +10: 00 12 01 03 80 1e 13 78 ea b3 85 95 58 53 8a 28 .??????x????XS?( +20: 25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 %PT...?????????? +30: 01 01 01 01 01 01 26 1b 00 7d 50 20 16 30 30 20 ??????&?.}P ?00 +40: 36 00 30 be 10 00 00 18 8b 16 00 7d 50 20 16 30 6.0??..???.}P ?0 +50: 30 20 36 00 30 be 10 00 00 18 00 00 00 0f 00 81 0 6.0??..?...?.? +60: 0a 32 81 0a 28 14 01 00 30 e4 28 01 00 00 00 fe ?2??(??.0?(?...? +70: 00 4c 50 31 34 31 57 58 33 2d 54 4c 52 31 00 d8 .LP141WX3-TLR1.? +80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ +</pre> + + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hcl/gm45_remove_me.html b/docs/hcl/gm45_remove_me.html new file mode 100644 index 00000000..68469113 --- /dev/null +++ b/docs/hcl/gm45_remove_me.html @@ -0,0 +1,693 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>GM45 chipsets: remove the ME (manageability engine)</title> +</head> + +<body> + + <div class="section"> + + <h1 id="pagetop">GM45 chipsets: remove the ME (manageability engine)</h1> + <p> + This sections relates to disabling and removing the ME (Intel <b>M</b>anagement <b>E</b>ngine) on + GM45. This was originally done on the ThinkPad X200, and later adapted for the ThinkPad R400/T400/T500. It can + in principle be done on any GM45 or GS45 system. + </p> + <p> + The ME is a blob that typically must be left inside the flash chip (in the ME region, as outlined + by the default descriptor). On GM45, it is possible to remove it without any ill effects. All + other parts of coreboot on GM45 systems (provided GMA MHD4500 / Intel graphics) can be blob-free, + so removing the ME was the last obstacle to + make GM45 a feasible target in libreboot (the systems can also work without the microcode blobs). + </p> + <p> + The ME is removed and disabled in libreboot by modifying the descriptor. More info about + this can be found in the ich9deblob/ich9gen source code in resources/utilities/ich9deblob/ + in libreboot, or more generally on this page. + </p> + <p> + More information about the ME can be found at + <a href="http://www.coreboot.org/Intel_Management_Engine">http://www.coreboot.org/Intel_Management_Engine</a> + and <a href="http://me.bios.io/Main_Page">http://me.bios.io/Main_Page</a>. + </p> + <p> + Another project recently found: + <a href="http://io.smashthestack.org/me/">http://io.smashthestack.org/me/</a> + </p> + <p> + <a href="index.html">Back to previous index</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="ich9gen">ICH9 gen utility</h1> + + <p> + It is no longer necessary to use <a href="#ich9deblob">ich9deblob</a> to generate + a deblobbed descriptor+gbe image for GM45 targets. ich9gen is a small utility within + ich9deblob that can generate them from scratch, without a factory.bin dump. + </p> + + <p> + ich9gen executables can be found under ./ich9deblob/ statically compiled in + libreboot_util. If you are using src or git, build ich9gen from source with:<br/> + $ <b>./build module ich9deblob</b><br/> + The executable will appear under resources/utilities/ich9deblob/ + </p> + + <p> + Run:<br/> + $ <b>./ich9gen</b> + </p> + + <p> + Running ich9gen this way (without any arguments) generates + a default descriptor+gbe image with a generic MAC address. + You probably don't want to use the generic one; the ROM images + in libreboot contain a descriptor+gbe image by default (already + inserted) just to prevent or mitigate the risk of bricking + your laptop, but with the generic MAC address (the libreboot + project does not know what your real MAC address is). + </p> + + <p> + You can find out your MAC address from <b>ip addr</b> or <b>ifconfig</b> in GNU/Linux. + Alternatively, if you are running libreboot already (with the correct MAC address in your + ROM), dump it (flashrom -r) and read the first 6 bytes from position 0x1000 (or 0x2000) in a hex editor + (or, rename it to factory.rom and run it in ich9deblob: in the newly created mkgbe.c + will be the individual bytes of your MAC address). If you are currently running the stock firmware + and haven't installed libreboot yet, you can also run that through ich9deblob to get the mac address. + </p> + + <p> + An even simpler way to get the MAC address would be to read what's on the little sticker on + the bottom/base of the laptop. + </p> + + <p> + On GM45 laptops that use flash descriptors, the MAC address + or the onboard ethernet chipset is flashed (inside the ROM image). + You should generate a descriptor+gbe image with your own MAC address + inside (with the Gbe checksum updated to match). Run:<br/> + $ <b>./ich9gen --macaddress XX:XX:XX:XX:XX:XX</b><br/> + (replace the XX chars with the hexadecimal chars in the MAC address that you want) + </p> + + <p> + Two new files will be created: + </p> + <ul> + <li><b>ich9fdgbe_4m.bin</b>: this is for GM45 laptops with the 4MB flash chip.</li> + <li><b>ich9fdgbe_8m.bin</b>: this is for GM45 laptops with the 8MB flash chip.</li> + <li><b>ich9fdgbe_16m.bin</b>: this is for GM45 laptops with the 16MB flash chip.</li> + </ul> + + <p> + Assuming that your libreboot image is named <b>libreboot.rom</b>, copy + the file to where <b>libreboot.rom</b> is located + and then insert the descriptor+gbe file into the ROM image.<br/> + For 16MiB flash chips:<br/> + $ <b>dd if=ich9fdgbe_16m.bin of=libreboot.rom bs=1 count=12k conv=notrunc</b><br/> + For 8MiB flash chips:<br/> + $ <b>dd if=ich9fdgbe_8m.bin of=libreboot.rom bs=1 count=12k conv=notrunc</b><br/> + For 4MiB flash chips:<br/> + $ <b>dd if=ich9fdgbe_4m.bin of=libreboot.rom bs=1 count=12k conv=notrunc</b><br/> + </p> + + <p> + Your libreboot.rom image is now ready to be flashed on the system. Refer back to + <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + for how to flash it. + </p> + + <h2> + Write-protecting the flash chip + </h2> + <p> + Look in <i>resources/utilities/ich9deblob/src/descriptor/descriptor.c</i> + for the following lines in the <i>descriptorHostRegionsUnlocked</i> function: + </p> +<pre> + descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = 0x1; + descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x1; + descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x1; + descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x1; + descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x1; +</pre> + <p> + Also look in <i>resources/utilities/ich9deblob/src/ich9gen/mkdescriptor.c</i> + for the following lines: + </p> +<pre> + descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ + descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ + descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ + descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ + descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */ +</pre> + + <p style="font-size:2em;"> + NOTE: When you write-protect the flash chip, re-flashing is no longer possible unless you + use dedicated external equipment, which also means disassembling the laptop. The same equipment + can also be used to remove the write-protection later on, if you choose to do so. *Only* write-protect + the chip if you have the right equipment for external flashing later on; for example, see + <a href="../install/bbb_setup.html">../install/bbb_setup.html</a>. + </p> + + <p> + Change them all to 0x0, then re-compile ich9gen. After you have done that, + follow the notes in <a href="#ich9gen">#ich9gen</a> to generate a new + descriptor+gbe image and insert that into your ROM image, then flash it. + The next time you boot, the flash chip will be read-only in software + (hardware re-flashing will still work, which you will need for re-flashing + the chip after write-protecting it, to clear the write protection or + to flash yet another ROM image with write protection set in the descriptor). + </p> + <p> + Flashrom will tell you that you can still forcefully re-flash, using <i>-p internal:ich_spi_force=yes</i> but + this won't actually work; it'll just brick your laptop. + </p> + <p> + For external flashing guides, refer to <a href="../install/index.html">../install/index.html</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="ich9deblob">ICH9 deblob utility</h1> + + <p> + <b>This is no longer strictly necessary. Libreboot ROM images for GM45 systems now + contain the 12KiB descriptor+gbe generated from ich9gen, by default.</b> + </p> + + <p> + This was the tool originally used to disable the ME on X200 (later adapted for other systems that use the + GM45 chipset). <a href="#ich9gen">ich9gen</a> now supersedes it; + ich9gen is better because it does not rely on dumping the factory.rom image (whereas, ich9deblob does). + </p> + + <p> + This is what you will use to generate the deblobbed descriptor+gbe regions for your libreboot ROM image. + </p> + <p> + If you are working with libreboot_src (or git), you can find the source under resources/utilities/ich9deblob/ + and will already be compiled if you ran <b>./build module all</b> or <b>./build module ich9deblob</b> from the main directory (./), + otherwise you can build it like so:<br/> + $ <b>./build module ich9deblob</b><br/> + An executable file named <b>ich9deblob</b> will now appear under resources/utilities/ich9deblob/ + </p> + <p> + If you are working with libreboot_util release archive, you can find the utility included, statically compiled + (for i686 and x86_64 on GNU/Linux) under ./ich9deblob/. + </p> + + <p> + Place the factory.rom from your system + (can be obtained using the external flashing guides for GM45 targets linked <a href="../install/index.html">../install/index.html</a>) in + the directory where you have your ich9deblob executable, then run the tool:<br/> + $ <b>./ich9deblob</b> + </p> + <p> + A 12kiB file named <b>deblobbed_descriptor.bin</b> will now appear. <b>Keep this and the factory.rom stored in a safe location!</b> + The first 4KiB contains the descriptor data region for your system, and the next 8KiB contains the gbe region (config data for your + gigabit NIC). These 2 regions could actually be separate files, but they are joined into 1 file in this case. + </p> + <p> + A 4KiB file named <b>deblobbed_4kdescriptor.bin</b> will alternatively appear, if no GbE region was detected inside the ROM image. + This is usually the case, when a discrete NIC is used (eg Broadcom) instead of Intel. Only the Intel NICs need a GbE region in + the flash chip. + </p> + + <p> + Assuming that your libreboot image is named <b>libreboot.rom</b>, copy + the <b>deblobbed_descriptor.bin</b> file to where <b>libreboot.rom</b> is located + and then run:<br/> + $ <b>dd if=deblobbed_descriptor.bin of=libreboot.rom bs=1 count=12k conv=notrunc</b> + </p> + <p> + Alternatively, if you got a the <b>deblobbed_4kdescriptor.bin</b> file (no GbE defined), + do this: + $ <b>dd if=deblobbed_4kdescriptor.bin of=libreboot.rom bs=1 count=4k conv=notrunc</b> + </p> + <p> + + </p> + + <p> + The utility will also generate 4 additional files: + </p> + <ul> + <li>mkdescriptor.c</li> + <li>mkdescriptor.h</li> + <li>mkgbe.c</li> + <li>mkgbe.h</li> + </ul> + <p> + These are C source files that can re-generate the very same Gbe and Descriptor structs + (from ich9deblob/ich9gen). To use these, place them in src/ich9gen/ in ich9deblob, then re-build. + The newly built <b>ich9gen</b> executable will be able to re-create the very same 12KiB file from scratch, + based on the C structs, this time <b>without</b> the need for a factory.rom dump! + </p> + + <p> + You should now have a <b>libreboot.rom</b> image containing the correct 4K descriptor and 8K gbe regions, which + will then be safe to flash. Refer back to <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + for how to flash it. + </p> + + </div> + + <div class="section"> + + <h1 id="demefactory">demefactory utility</h1> + + <p> + This takes a factory.rom dump and disables the ME/TPM, but leaves the region intact. + It also sets all regions read-write. + </p> + + <p> + The ME interferes with flash read/write in flashrom, and the default descriptor + locks some regions. The idea is that doing this will remove all of those restrictions. + </p> + + <p> + Simply run (with factory.rom in the same directory):<br/> + $ <b>./demefactory</b> + </p> + + <p> + It will generate a 4KiB descriptor file (only the descriptor, no GbE). Insert that into + a factory.rom image (NOTE: do this on a copy of it. Keep the original factory.rom stored + safely somewhere):<br/> + $ <b>dd if=demefactory_4kdescriptor.bin of=factory_nome.rom bs=1 count=4k conv=notrunc</b> + </p> + + <p> + TODO: test this.<br/> + TODO: lenovobios (GM45 thinkpads) still write-protects parts of the flash. Modify the assembly code + inside. + Note: the factory.rom (BIOS region) from lenovobios is in a compressed format, which you have to extract. + bios_extract upstream won't work, but the following was said in #coreboot on freenode IRC: + </p> +<pre> +<roxfan> vimuser: try bios_extract with ffv patch <a href="http://patchwork.coreboot.org/patch/3444/">http://patchwork.coreboot.org/patch/3444/</a> +<roxfan> or <a href="https://github.com/coreboot/bios_extract/blob/master/phoenix_extract.py">https://github.com/coreboot/bios_extract/blob/master/phoenix_extract.py</a> +<roxfan> what are you looking for specifically, btw? + +0x74: 0x9fff03e0 PR0: Warning: 0x003e0000-0x01ffffff is read-only. +0x84: 0x81ff81f8 PR4: Warning: 0x001f8000-0x001fffff is locked. +</pre> + + <p> + Use-case: a factory.rom image modified in this way would theoretically have no + flash protections whatsoever, making it easy to quickly switch between factory/libreboot + in software, without ever having to disassemble and re-flash externally unless you brick + the device. + </p> + + <p> + demefactory is part of the ich9deblob src, found at <i>resources/utilities/ich9deblob/</i> + </p> + + </div> + + <div class="section"> + + <p> + The sections below are adapted from (mostly) IRC logs related to early development getting the ME removed on GM45. + They are useful for background information. This could not have been done without sgsit's help. + </p> + + <div class="subsection"> + + <h2 id="early_notes">Early notes</h2> + + <ul> + <li> + <a href="http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-10-family-datasheet.pdf">http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-10-family-datasheet.pdf</a> + page 230 mentions about descriptor and non-descriptor mode (which wipes out gbe and ME/AMT). + </li> + <li> + <s><b>See reference to HDA_SDO (disable descriptor security)</b></s> + strap connected GPIO33 pin is it on ICH9-M (X200). HDA_SDO applies to later chipsets (series 6 or higher). + Disabling descriptor security also disables the ethernet according to sgsit. sgsit's method + involves use of 'soft straps' (see IRC logs below) instead of disabling the descriptor. + </li> + <li> + <b>and the location of GPIO33 on the x200s: (was an external link. Putting it here instead)</b> + <a href="images/x200/gpio33_location.jpg">images/x200/gpio33_location.jpg</a> + - it's above the number 7 on TP37 (which is above the big intel chip at the bottom) + </li> + <li> + The ME datasheet may not be for the mobile chipsets but it doesn't vary that much. + This one gives some detail and covers QM67 which is what the X201 uses: + <a href="http://www.intel.co.uk/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf">http://www.intel.co.uk/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf</a> + </li> + </ul> + + </div> + + </div> + + <div class="section"> + + <div class="subsection"> + + <h2 id="flashchips">Flash chips</h2> + + <ul> + <li> + Schematics for X200 laptop: <a href="http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006075.pdf">http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006075.pdf</a> + <b><s>- Page 20 and page 9 refer to SDA_HDO or SDA_HDOUT</s></b> only on series 6 or higher chipsets. ICH9-M (X200) does it with a strap connected to GPIO33 pin (see IRC notes below)<br/> + - According to page 29, the X200 can have any of the following flash chips: + <ul> + <li>ATMEL AT26DF321-SU 72.26321.A01 - this is a 32Mb (4MiB) chip</li> + <li>MXIC (Macronix?) MX25L3205DM2I-12G 72.25325.A01 - another 32Mb (4MiB) chip</li> + <li>MXIC (Macronix?) MX25L6405DMI-12G 41R0820AA - this is a 64Mb (8MiB) chip</li> + <li>Winbond W25X64VSFIG 41R0820BA - another 64Mb (8MiB) chip</li> + </ul> + sgsit says that the X200s with the 64Mb flash chips are (probably) the ones with AMT (alongside the ME), whereas + the 32Mb chips contain only the ME. + </li> + <li> + Schematics for X200s laptop: <a href="http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006104.pdf">http://pdf.datasheetarchive.com/indexerfiles/Datasheets-USER/DSAUPLD00006104.pdf</a>. + </li> + </ul> + + </div> + + </div> + + <div class="section"> + + <h2 id="early_development_notes">Early development notes</h2> + +<pre> +<i> +Start (hex) End (hex) Length (hex) Area Name +----------- --------- ------------ --------- +00000000 003FFFFF 00400000 Flash Image + +00000000 00000FFF 00001000 Descriptor Region +00000004 0000000F 0000000C Descriptor Map +00000010 0000001B 0000000C Component Section +00000040 0000004F 00000010 Region Section +00000060 0000006B 0000000C Master Access Section +00000060 00000063 00000004 CPU/BIOS +00000064 00000067 00000004 Manageability Engine (ME) +00000068 0000006B 00000004 GbE LAN +00000100 00000103 00000004 ICH Strap 0 +00000104 00000107 00000004 ICH Strap 1 +00000200 00000203 00000004 MCH Strap 0 +00000EFC 00000EFF 00000004 Descriptor Map 2 +00000ED0 00000EF7 00000028 ME VSCC Table +00000ED0 00000ED7 00000008 Flash device 1 +00000ED8 00000EDF 00000008 Flash device 2 +00000EE0 00000EE7 00000008 Flash device 3 +00000EE8 00000EEF 00000008 Flash device 4 +00000EF0 00000EF7 00000008 Flash device 5 +00000F00 00000FFF 00000100 OEM Section +00001000 001F5FFF 001F5000 ME Region +001F6000 001F7FFF 00002000 GbE Region +001F8000 001FFFFF 00008000 PDR Region +00200000 003FFFFF 00200000 BIOS Region + +Start (hex) End (hex) Length (hex) Area Name +----------- --------- ------------ --------- +00000000 003FFFFF 00400000 Flash Image + +00000000 00000FFF 00001000 Descriptor Region +00000004 0000000F 0000000C Descriptor Map +00000010 0000001B 0000000C Component Section +00000040 0000004F 00000010 Region Section +00000060 0000006B 0000000C Master Access Section +00000060 00000063 00000004 CPU/BIOS +00000064 00000067 00000004 Manageability Engine (ME) +00000068 0000006B 00000004 GbE LAN +00000100 00000103 00000004 ICH Strap 0 +00000104 00000107 00000004 ICH Strap 1 +00000200 00000203 00000004 MCH Strap 0 +00000ED0 00000EF7 00000028 ME VSCC Table +00000ED0 00000ED7 00000008 Flash device 1 +00000ED8 00000EDF 00000008 Flash device 2 +00000EE0 00000EE7 00000008 Flash device 3 +00000EE8 00000EEF 00000008 Flash device 4 +00000EF0 00000EF7 00000008 Flash device 5 +00000EFC 00000EFF 00000004 Descriptor Map 2 +00000F00 00000FFF 00000100 OEM Section +00001000 00002FFF 00002000 GbE Region +00003000 00202FFF 00200000 BIOS Region + +Build Settings +-------------- +Flash Erase Size = 0x1000 + +</i> +</pre> + + <p> + It's a utility called 'Flash Image Tool' for ME 4.x that was used for this. You drag a complete + image into in and the utility decomposes the various components, allowing you to set soft straps. + </p> + <p> + This tool is proprietary, for Windows only, but was used to deblob the X200. End justified means, and + the utility is no longer needed since the ich9deblob utility (documented on this page) can now be + used to create deblobbed descriptors. + </p> + + </div> + + <div class="section"> + + <h2 id="gbe_region"> + GBE (gigabit ethernet) region in SPI flash + </h2> + + <p> + Of the 8K, about 95% is 0xFF. + The data is the gbe region is fully documented in this public datasheet: + <a href="http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf">http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf</a> + </p> + + <p> + The only actual content found was: + </p> + +<pre> +<i> +00 1F 1F 1F 1F 1F 00 08 FF FF 83 10 FF FF FF FF +08 10 FF FF C3 10 EE 20 AA 17 F5 10 86 80 00 00 +01 0D 00 00 00 00 05 06 20 30 00 0A 00 00 8B 8D +02 06 40 2B 43 00 00 00 F5 10 AD BA F5 10 BF 10 +AD BA CB 10 AD BA AD BA 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 01 00 40 28 12 07 40 FF FF FF FF FF FF FF FF +FF FF FF FF FF FF FF FF FF FF FF FF FF FF D9 F0 +20 60 1F 00 02 00 13 00 00 80 1D 00 FF 00 16 00 +DD CC 18 00 11 20 17 00 DD DD 18 00 12 20 17 00 +00 80 1D 00 00 00 1F +</i> +</pre> + + <p> + The first part is the MAC address set to all 0x1F. It's repeated haly way through + the 8K area, and the rest is all 0xFF. This is all documented in the datasheet. + </p> + + <p> + The GBe region starts at 0x20A000 bytes from the *end* of a factory image and is 0x2000 bytes long. + In libreboot (deblobbed) the descriptor is set to put gbe directly after the initial 4K flash descriptor. + So the first 4K of the ROM is the descriptor, and then the next 8K is the gbe region. + </p> + + <div class="subsection"> + + <h3 id="gbe_region_changemacaddress">GBE region: change MAC address</h3> + + <p> + According to the datasheet, it's supposed to add up to 0xBABA but can actually be others on the X200. + <a href="https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums">https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums</a> + </p> + <p> + <i>"One of those engineers loves classic rock music, so they selected 0xBABA"</i> + </p> + <p>In honour of the song <i>Baba O'Reilly</i> by <i>The Who</i> apparently. We're not making this stuff up...</p> + + <p> + 0x3ABA, 0x34BA, 0x40BA and more have been observed in the main Gbe regions on the X200 factory.rom dumps. + The checksums of the backup regions match BABA, however. + </p> + + <p> + By default, the X200 (as shipped by Lenovo) actually has an invalid main gbe checksum. The backup gbe region is correct, + and is what these systems default to. Basically, you should do what you need on the *backup* gbe region, and + then correct the main one by copying from the backup. + </p> + + <p> + Look at resources/utilities/ich9deblob/ich9deblob.c. + </p> + <ul> + <li>Add the first 0x3F 16bit numbers (unsigned) of the GBe descriptor together (this includes the checksum value) + and that has to add up to 0xBABA. In other words, the checksum is 0xBABA minus the total of the first + 0x3E 16bit numbers (unsigned), ignoring any overflow.</li> + </ul> + + </div> + + </div> + + <div class="section"> + + <h2 id="flash_descriptor_region">Flash descriptor region</h2> + + <p> + <a href="http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf">http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf</a> + from page 850 onwards. This explains everything that is in the flash descriptor, which can be used to understand what libreboot + is doing about modifying it. + </p> + + <p> + How to deblob: + </p> + <ul> + <li>patch the number of regions present in the descriptor from 5 - 3</li> + <li>originally descriptor + bios + me + gbe + platform</li> + <li>modified = descriptor + bios + gbe</li> + <li>the next stage is to patch the part of the descriptor which defines the start and end point of each section</li> + <li>then cut out the gbe region and insert it just after the region</li> + <li>all this can be substantiated with public docs (ICH9 datasheet)</li> + <li>the final part is flipping 2 bits. Halting the ME via 1 MCH soft strap and 1 ICH soft strap</li> + <li>the part of the descriptor described there gives the base address and length of each region (bits 12:24 of each address)</li> + <li>to disable a region, you set the base address to 0xFFF and the length to 0</li> + <li>and you change the number of regions from 4 (zero based) to 2</li> + </ul> + + <p> + There's an interesting parameter called 'ME Alternate disable', which allows the ME to only handle hardware errata in the southbridge, + but disables any other functionality. This is similar to the 'ignition' in the 5 series and higher but using the standard firmware + instead of a small 128K version. Useless for libreboot, though. + </p> + + <p> + To deblob GM45, you chop out the platform and ME regions and correct the addresses in flReg1-4. + Then you set meDisable to 1 in ICHSTRAP0 and MCHSTRAP0. + </p> + + <p>How to patch the descriptor from the factory.rom dump</p> + <ul> + <li>map the first 4k into the struct (minus the gbe region)</li> + <li>set NR in FLMAP0 to 2 (from 4)</li> + <li>adjust BASE and LIMIT in flReg1,2,3,4 to reflect the new location of each region (or remove them in the case of Platform and ME)</li> + <li>set meDisable to 1/true in ICHSTRAP0 and MCHSTRAP0</li> + <li>extract the 8k GBe region and append that to the end of the 4k descriptor</li> + <li>output the 12k concatenated chunk</li> + <li>Then it can be dd'd into the first 12K part of a coreboot image.</li> + <li>the GBe region always starts 0x20A000 bytes from the end of the ROM</li> + </ul> + + <p> + This means that libreboot's descriptor region will simply define the following regions: + </p> + <ul> + <li>descriptor (4K)</li> + <li>gbe (8K)</li> + <li>bios (rest of flash chip. CBFS also set to occupy this whole size)</li> + </ul> + + <p> + The data in the descriptor region is little endian, and it represents bits 24:12 of the address + (bits 12-24, written this way since bit 24 is nearer to left than bit 12 in the binary representation). + </p> + <p> + So, <i>x << 12 = address</i> + </p> + <p> + If it's in descriptor mode, then the first 4 bytes will be 5A A5 F0 0F. + </p> + + </div> + + + <div class="section"> + + <h2 id="platform_data_region">platform data partition in boot flash (factory.rom / lenovo bios)</h2> + + <p> + Basically useless for libreboot, since it appears to be a blob. + Removing it didn't cause any issues in libreboot. + </p> + <p> + This is a 32K region from the factory image. It could be data + (non-functional) that the original Lenovo BIOS used, but we don't know. + </p> + + <p> + It has only a 448 byte fragment different from 0x00 or 0xFF. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hcl/hwdumps/x200/biosdecode.err.log b/docs/hcl/hwdumps/x200/biosdecode.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/biosdecode.err.log diff --git a/docs/hcl/hwdumps/x200/biosdecode.log b/docs/hcl/hwdumps/x200/biosdecode.log new file mode 100644 index 00000000..bfeaba39 --- /dev/null +++ b/docs/hcl/hwdumps/x200/biosdecode.log @@ -0,0 +1,24 @@ +# biosdecode 2.12 +VPD present. + BIOS Build ID: 6DET65WW + Box Serial Number: L3AAR0B + Motherboard Serial Number: 1ZFDS89N4DD + Machine Type/Model: 7459GW4 +SMBIOS 2.4 present. + Structure Table Length: 2464 bytes + Structure Table Address: 0x000E0010 + Number Of Structures: 68 + Maximum Structure Size: 120 bytes +BIOS32 Service Directory present. + Revision: 0 + Calling Interface Address: 0x000FDC80 +ACPI 2.0 present. + OEM Identifier: LENOVO + RSD Table 32-bit Address: 0x79B5B843 + XSD Table 64-bit Address: 0x0000000079B5B8AB +PNP BIOS 1.0 present. + Event Notification: Not Supported + Real Mode 16-bit Code Address: E2CA:1868 + Real Mode 16-bit Data Address: 0040:0000 + 16-bit Protected Mode Code Address: 0x000F97BD + 16-bit Protected Mode Data Address: 0x00000400 diff --git a/docs/hcl/hwdumps/x200/codec#0 b/docs/hcl/hwdumps/x200/codec#0 new file mode 100644 index 00000000..2b9d6f35 --- /dev/null +++ b/docs/hcl/hwdumps/x200/codec#0 @@ -0,0 +1,208 @@ +Codec: Conexant CX20561 (Hermosa) +Address: 0 +AFG Function Id: 0x1 (unsol 1) +MFG Function Id: 0x2 (unsol 1) +Vendor Id: 0x14f15051 +Subsystem Id: 0x17aa20ff +Revision Id: 0x100000 +Modem Function Group: 0x2 +Default PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM +Default Amp-In caps: N/A +Default Amp-Out caps: N/A +State of AFG node 0x01: + Power states: D0 D1 D2 D3 CLKSTOP + Power: setting=D0, actual=D0 +GPIO: io=4, o=0, i=0, unsolicited=1, wake=0 + IO[0]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[1]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[2]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 + IO[3]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 +Node 0x10 [Audio Output] wcaps 0xc1d: Stereo Amp-Out R/L + Control: name="Speaker Playback Volume", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Control: name="Speaker Playback Switch", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Device: name="CX20561 Analog", type="Audio", device=0 + Amp-Out caps: ofs=0x4a, nsteps=0x4a, stepsize=0x03, mute=0 + Amp-Out vals: [0x4a 0x4a] + Converter: stream=8, channel=0 + PCM: + rates [0x560]: 44100 48000 96000 192000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x11 [Audio Output] wcaps 0xc1d: Stereo Amp-Out R/L + Control: name="Headphone Playback Volume", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Control: name="Headphone Playback Switch", index=0, device=0 + ControlAmp: chs=3, dir=Out, idx=0, ofs=0 + Amp-Out caps: ofs=0x4a, nsteps=0x4a, stepsize=0x03, mute=0 + Amp-Out vals: [0x4a 0x4a] + Converter: stream=8, channel=0 + PCM: + rates [0x560]: 44100 48000 96000 192000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x12 [Audio Output] wcaps 0x211: Stereo Digital + Control: name="IEC958 Playback Con Mask", index=0, device=0 + Control: name="IEC958 Playback Pro Mask", index=0, device=0 + Control: name="IEC958 Playback Default", index=0, device=0 + Control: name="IEC958 Playback Switch", index=0, device=0 + Control: name="IEC958 Default PCM Playback Switch", index=0, device=0 + Device: name="CX20561 Digital", type="SPDIF", device=1 + Converter: stream=8, channel=0 + Digital: + Digital category: 0x0 + IEC Coding Type: 0x0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x5]: PCM AC3 +Node 0x13 [Beep Generator Widget] wcaps 0x70000c: Mono Amp-Out + Control: name="Beep Playback Volume", index=0, device=0 + ControlAmp: chs=1, dir=Out, idx=0, ofs=0 + Control: name="Beep Playback Switch", index=0, device=0 + ControlAmp: chs=1, dir=Out, idx=0, ofs=0 + Amp-Out caps: ofs=0x03, nsteps=0x03, stepsize=0x17, mute=0 + Amp-Out vals: [0x00] +Node 0x14 [Audio Input] wcaps 0x100d1b: Stereo Amp-In R/L + Device: name="CX20561 Analog", type="Audio", device=0 + Amp-In caps: ofs=0x4a, nsteps=0x50, stepsize=0x03, mute=0 + Amp-In vals: [0x50 0x50] [0x50 0x50] + Converter: stream=4, channel=0 + SDI-Select: 0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x1d* 0x17 +Node 0x15 [Audio Input] wcaps 0x100d1b: Stereo Amp-In R/L + Control: name="Capture Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=1, ofs=0 + Amp-In caps: ofs=0x4a, nsteps=0x50, stepsize=0x03, mute=0 + Amp-In vals: [0x50 0x50] + Converter: stream=0, channel=0 + SDI-Select: 0 + PCM: + rates [0x160]: 44100 48000 96000 + bits [0xe]: 16 20 24 + formats [0x1]: PCM + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 1 + 0x18 +Node 0x16 [Pin Complex] wcaps 0x400581: Stereo + Control: name="Headphone Jack", index=0, device=0 + Pincap 0x0000001c: OUT HP Detect + Pin Default 0x042140f0: [Jack] HP Out at Ext Right + Conn = 1/8, Color = Green + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0xc0: OUT HP + Unsolicited: tag=02, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10 0x11* +Node 0x17 [Pin Complex] wcaps 0x40048b: Stereo Amp-In + Control: name="Dock Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Dock Mic Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x27, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00001224: IN Detect + Vref caps: 50 80 + Pin Default 0x61a190f0: [N/A] Mic at Sep Rear + Conn = 1/8, Color = Pink + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x24: IN VREF_80 + Unsolicited: tag=03, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x18 [Pin Complex] wcaps 0x40048b: Stereo Amp-In + Control: name="Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Mic Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x27, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00001224: IN Detect + Vref caps: 50 80 + Pin Default 0x04a190f0: [Jack] Mic at Ext Right + Conn = 1/8, Color = Pink + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x24: IN VREF_80 + Unsolicited: tag=04, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x19 [Pin Complex] wcaps 0x400581: Stereo + Control: name="Dock Headphone Jack", index=0, device=0 + Pincap 0x00000014: OUT Detect + Pin Default 0x612140f0: [N/A] HP Out at Sep Rear + Conn = 1/8, Color = Green + DefAssociation = 0xf, Sequence = 0x0 + Pin-ctls: 0x40: OUT + Unsolicited: tag=01, enabled=1 + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10 0x11* +Node 0x1a [Pin Complex] wcaps 0x400501: Stereo + Control: name="Speaker Phantom Jack", index=0, device=0 + Pincap 0x00010010: OUT EAPD + EAPD 0x2: EAPD + Pin Default 0x901701f0: [Fixed] Speaker at Int N/A + Conn = Analog, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10* 0x11 +Node 0x1b [Pin Complex] wcaps 0x400500: Mono + Pincap 0x00010010: OUT EAPD + EAPD 0x2: EAPD + Pin Default 0x40f001f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 2 + 0x10* 0x11 +Node 0x1c [Pin Complex] wcaps 0x400701: Stereo Digital + Control: name="SPDIF Phantom Jack", index=0, device=0 + Pincap 0x00000010: OUT + Pin Default 0x40f001f0: [N/A] Other at Ext N/A + Conn = Unknown, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x40: OUT + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 + Connection: 1 + 0x12 +Node 0x1d [Pin Complex] wcaps 0x40040b: Stereo Amp-In + Control: name="Internal Mic Boost Volume", index=0, device=0 + ControlAmp: chs=3, dir=In, idx=0, ofs=0 + Control: name="Internal Mic Phantom Jack", index=0, device=0 + Amp-In caps: ofs=0x00, nsteps=0x04, stepsize=0x2f, mute=0 + Amp-In vals: [0x00 0x00] + Pincap 0x00000020: IN + Pin Default 0x90a601f0: [Fixed] Mic at Int N/A + Conn = Digital, Color = Unknown + DefAssociation = 0xf, Sequence = 0x0 + Misc = NO_PRESENCE + Pin-ctls: 0x20: IN + Power states: D0 D1 D2 D3 + Power: setting=D0, actual=D0 +Node 0x1e [Vendor Defined Widget] wcaps 0xf00000: Mono diff --git a/docs/hcl/hwdumps/x200/cpuinfo.err.log b/docs/hcl/hwdumps/x200/cpuinfo.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/cpuinfo.err.log diff --git a/docs/hcl/hwdumps/x200/cpuinfo.log b/docs/hcl/hwdumps/x200/cpuinfo.log new file mode 100644 index 00000000..8b01059e --- /dev/null +++ b/docs/hcl/hwdumps/x200/cpuinfo.log @@ -0,0 +1,52 @@ +processor : 0 +vendor_id : GenuineIntel +cpu family : 6 +model : 23 +model name : Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz +stepping : 6 +microcode : 0x60c +cpu MHz : 800.000 +cache size : 3072 KB +physical id : 0 +siblings : 2 +core id : 0 +cpu cores : 2 +apicid : 0 +initial apicid : 0 +fpu : yes +fpu_exception : yes +cpuid level : 10 +wp : yes +flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts nopl aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 lahf_lm dtherm tpr_shadow vnmi flexpriority +bogomips : 4787.97 +clflush size : 64 +cache_alignment : 64 +address sizes : 36 bits physical, 48 bits virtual +power management: + +processor : 1 +vendor_id : GenuineIntel +cpu family : 6 +model : 23 +model name : Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz +stepping : 6 +microcode : 0x60c +cpu MHz : 1600.000 +cache size : 3072 KB +physical id : 0 +siblings : 2 +core id : 1 +cpu cores : 2 +apicid : 1 +initial apicid : 1 +fpu : yes +fpu_exception : yes +cpuid level : 10 +wp : yes +flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts nopl aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 lahf_lm dtherm tpr_shadow vnmi flexpriority +bogomips : 4787.97 +clflush size : 64 +cache_alignment : 64 +address sizes : 36 bits physical, 48 bits virtual +power management: + diff --git a/docs/hcl/hwdumps/x200/dmesg.err.log b/docs/hcl/hwdumps/x200/dmesg.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/dmesg.err.log diff --git a/docs/hcl/hwdumps/x200/dmesg.log b/docs/hcl/hwdumps/x200/dmesg.log new file mode 100644 index 00000000..64eb5805 --- /dev/null +++ b/docs/hcl/hwdumps/x200/dmesg.log @@ -0,0 +1,1066 @@ +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 3.13.0-39-lowlatency (root@devel.trisquel.info) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #66+7.0trisquel2 SMP PREEMPT Wed Oct 29 17:10:10 UTC 2014 (Ubuntu 3.13.0-39.66+7.0trisquel2-lowlatency 3.13.11.8-gnu) +[ 0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-3.13.0-39-lowlatency root=UUID=097336a2-7389-4897-a7e8-1f43e91aae96 ro nomdmonddf nomdmonisw nomdmonddf nomdmonisw +[ 0.000000] KERNEL supported cpus: +[ 0.000000] Intel GenuineIntel +[ 0.000000] AMD AuthenticAMD +[ 0.000000] Centaur CentaurHauls +[ 0.000000] Disabled fast string operations +[ 0.000000] e820: BIOS-provided physical RAM map: +[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009ebff] usable +[ 0.000000] BIOS-e820: [mem 0x000000000009ec00-0x000000000009ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000000dc000-0x00000000000fffff] reserved +[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000796a0fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000796a1000-0x00000000796a6fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000796a7000-0x00000000797b6fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000797b7000-0x000000007980efff] reserved +[ 0.000000] BIOS-e820: [mem 0x000000007980f000-0x00000000798c6fff] usable +[ 0.000000] BIOS-e820: [mem 0x00000000798c7000-0x00000000798d1fff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000798d2000-0x00000000798d4fff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x00000000798d5000-0x00000000798d8fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000798d9000-0x00000000798dcfff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x00000000798dd000-0x00000000798dffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000798e0000-0x0000000079906fff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x0000000079907000-0x0000000079907fff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x0000000079908000-0x0000000079b0efff] reserved +[ 0.000000] BIOS-e820: [mem 0x0000000079b0f000-0x0000000079b9efff] ACPI NVS +[ 0.000000] BIOS-e820: [mem 0x0000000079b9f000-0x0000000079bfefff] ACPI data +[ 0.000000] BIOS-e820: [mem 0x0000000079bff000-0x0000000079bfffff] usable +[ 0.000000] BIOS-e820: [mem 0x0000000079c00000-0x000000007bffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec0ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed003ff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed10000-0x00000000fed13fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed18000-0x00000000fed19fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed8ffff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved +[ 0.000000] BIOS-e820: [mem 0x00000000ff800000-0x00000000ffffffff] reserved +[ 0.000000] NX (Execute Disable) protection: active +[ 0.000000] SMBIOS 2.4 present. +[ 0.000000] DMI: LENOVO 7459GW4/7459GW4, BIOS 6DET65WW (3.15 ) 08/24/2010 +[ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved +[ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable +[ 0.000000] No AGP bridge found +[ 0.000000] e820: last_pfn = 0x79c00 max_arch_pfn = 0x400000000 +[ 0.000000] MTRR default type: uncachable +[ 0.000000] MTRR fixed ranges enabled: +[ 0.000000] 00000-9FFFF write-back +[ 0.000000] A0000-BFFFF uncachable +[ 0.000000] C0000-D3FFF write-protect +[ 0.000000] D4000-DBFFF uncachable +[ 0.000000] DC000-FFFFF write-protect +[ 0.000000] MTRR variable ranges enabled: +[ 0.000000] 0 base 07D000000 mask FFF000000 uncachable +[ 0.000000] 1 base 07E000000 mask FFE000000 uncachable +[ 0.000000] 2 base 000000000 mask F80000000 write-back +[ 0.000000] 3 base 079E00000 mask FFFE00000 uncachable +[ 0.000000] 4 disabled +[ 0.000000] 5 disabled +[ 0.000000] 6 disabled +[ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 +[ 0.000000] original variable MTRRs +[ 0.000000] reg 0, base: 2000MB, range: 16MB, type UC +[ 0.000000] reg 1, base: 2016MB, range: 32MB, type UC +[ 0.000000] reg 2, base: 0GB, range: 2GB, type WB +[ 0.000000] reg 3, base: 1950MB, range: 2MB, type UC +[ 0.000000] total RAM covered: 1998M +[ 0.000000] gran_size: 64K chunk_size: 64K num_reg: 7 lose cover RAM: 50M +[ 0.000000] gran_size: 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lose cover RAM: 14M +[ 0.000000] gran_size: 32M chunk_size: 32M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 64M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 128M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 256M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 512M num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 1G num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 32M chunk_size: 2G num_reg: 5 lose cover RAM: 46M +[ 0.000000] gran_size: 64M chunk_size: 64M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 128M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 256M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 512M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 1G num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 64M chunk_size: 2G num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 128M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 256M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 512M num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 1G num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 128M chunk_size: 2G num_reg: 4 lose cover RAM: 78M +[ 0.000000] gran_size: 256M chunk_size: 256M num_reg: 3 lose cover RAM: 206M +[ 0.000000] gran_size: 256M chunk_size: 512M num_reg: 3 lose cover RAM: 206M +[ 0.000000] gran_size: 256M chunk_size: 1G num_reg: 3 lose cover RAM: 206M +[ 0.000000] gran_size: 256M chunk_size: 2G num_reg: 3 lose cover RAM: 206M +[ 0.000000] gran_size: 512M chunk_size: 512M num_reg: 2 lose cover RAM: 462M +[ 0.000000] gran_size: 512M chunk_size: 1G num_reg: 2 lose cover RAM: 462M +[ 0.000000] gran_size: 512M chunk_size: 2G num_reg: 2 lose cover RAM: 462M +[ 0.000000] gran_size: 1G chunk_size: 1G num_reg: 1 lose cover RAM: 974M +[ 0.000000] gran_size: 1G chunk_size: 2G num_reg: 1 lose cover RAM: 974M +[ 0.000000] gran_size: 2G chunk_size: 2G num_reg: 0 lose cover RAM: 1998M +[ 0.000000] mtrr_cleanup: can not find optimal value +[ 0.000000] please specify mtrr_gran_size/mtrr_chunk_size +[ 0.000000] e820: update [mem 0x79e00000-0x79ffffff] usable ==> reserved +[ 0.000000] found SMP MP-table at [mem 0x000f72d0-0x000f72df] mapped at [ffff8800000f72d0] +[ 0.000000] Scanning 1 areas for low memory corruption +[ 0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576 +[ 0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff] +[ 0.000000] [mem 0x00000000-0x000fffff] page 4k +[ 0.000000] BRK [0x01fd9000, 0x01fd9fff] PGTABLE +[ 0.000000] BRK [0x01fda000, 0x01fdafff] PGTABLE +[ 0.000000] BRK [0x01fdb000, 0x01fdbfff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x79400000-0x795fffff] +[ 0.000000] [mem 0x79400000-0x795fffff] page 2M +[ 0.000000] BRK [0x01fdc000, 0x01fdcfff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x78000000-0x793fffff] +[ 0.000000] [mem 0x78000000-0x793fffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x00100000-0x77ffffff] +[ 0.000000] [mem 0x00100000-0x001fffff] page 4k +[ 0.000000] [mem 0x00200000-0x77ffffff] page 2M +[ 0.000000] init_memory_mapping: [mem 0x79600000-0x796a0fff] +[ 0.000000] [mem 0x79600000-0x796a0fff] page 4k +[ 0.000000] BRK [0x01fdd000, 0x01fddfff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x796a7000-0x797b6fff] +[ 0.000000] [mem 0x796a7000-0x797b6fff] page 4k +[ 0.000000] init_memory_mapping: [mem 0x7980f000-0x798c6fff] +[ 0.000000] [mem 0x7980f000-0x798c6fff] page 4k +[ 0.000000] BRK [0x01fde000, 0x01fdefff] PGTABLE +[ 0.000000] init_memory_mapping: [mem 0x79bff000-0x79bfffff] +[ 0.000000] [mem 0x79bff000-0x79bfffff] page 4k +[ 0.000000] RAMDISK: [mem 0x35314000-0x36981fff] +[ 0.000000] ACPI: RSDP 00000000000f7290 000024 (v02 LENOVO) +[ 0.000000] ACPI: XSDT 0000000079b5b8ab 00008C (v01 LENOVO TP-6D 00003150 LTP 00000000) +[ 0.000000] ACPI: FACP 0000000079b5ba00 0000F4 (v03 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: DSDT 0000000079b5bdf4 00DF28 (v01 LENOVO TP-6D 00003150 MSFT 03000000) +[ 0.000000] ACPI: FACS 0000000079b8e000 000040 +[ 0.000000] ACPI: SSDT 0000000079b5bbb4 000240 (v01 LENOVO TP-6D 00003150 MSFT 03000000) +[ 0.000000] ACPI: ECDT 0000000079b69d1c 000052 (v01 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: APIC 0000000079b69d6e 000078 (v01 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: MCFG 0000000079b69de6 00003C (v01 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: HPET 0000000079b69e22 000038 (v01 LENOVO TP-6D 00003150 LNVO 00000001) +[ 0.000000] ACPI: BOOT 0000000079b69f38 000028 (v01 LENOVO TP-6D 00003150 LTP 00000001) +[ 0.000000] ACPI: ASF! 0000000079b69f60 0000A0 (v16 LENOVO TP-6D 00003150 PTL 00000001) +[ 0.000000] ACPI: SSDT 0000000079b8d1ea 000578 (v01 LENOVO TP-6D 00003150 INTL 20050513) +[ 0.000000] ACPI: TCPA 0000000079907000 000032 (v00 00000000 00000000) +[ 0.000000] ACPI: SSDT 00000000798d4000 000655 (v01 PmRef CpuPm 00003000 INTL 20050624) +[ 0.000000] ACPI: SSDT 00000000798d3000 000274 (v01 PmRef Cpu0Tst 00003000 INTL 20050624) +[ 0.000000] ACPI: SSDT 00000000798d2000 000242 (v01 PmRef ApTst 00003000 INTL 20050624) +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] No NUMA configuration found +[ 0.000000] Faking a node at [mem 0x0000000000000000-0x0000000079bfffff] +[ 0.000000] Initmem setup node 0 [mem 0x00000000-0x79bfffff] +[ 0.000000] NODE_DATA [mem 0x798c1000-0x798c5fff] +[ 0.000000] [ffffea0000000000-ffffea0001ffffff] PMD -> [ffff880076e00000-ffff880078dfffff] on node 0 +[ 0.000000] Zone ranges: +[ 0.000000] DMA [mem 0x00001000-0x00ffffff] +[ 0.000000] DMA32 [mem 0x01000000-0xffffffff] +[ 0.000000] Normal empty +[ 0.000000] Movable zone start for each node +[ 0.000000] Early memory node ranges +[ 0.000000] node 0: [mem 0x00001000-0x0009dfff] +[ 0.000000] node 0: [mem 0x00100000-0x796a0fff] +[ 0.000000] node 0: [mem 0x796a7000-0x797b6fff] +[ 0.000000] node 0: [mem 0x7980f000-0x798c6fff] +[ 0.000000] node 0: [mem 0x79bff000-0x79bfffff] +[ 0.000000] On node 0 totalpages: 497671 +[ 0.000000] DMA zone: 64 pages used for memmap +[ 0.000000] DMA zone: 21 pages reserved +[ 0.000000] DMA zone: 3997 pages, LIFO batch:0 +[ 0.000000] DMA32 zone: 7728 pages used for memmap +[ 0.000000] DMA32 zone: 493674 pages, LIFO batch:31 +[ 0.000000] ACPI: PM-Timer IO Port: 0x1008 +[ 0.000000] ACPI: Local APIC address 0xfee00000 +[ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] disabled) +[ 0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x03] disabled) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) +[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) +[ 0.000000] ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0]) +[ 0.000000] IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-23 +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) +[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) +[ 0.000000] ACPI: IRQ0 used by override. +[ 0.000000] ACPI: IRQ2 used by override. +[ 0.000000] ACPI: IRQ9 used by override. +[ 0.000000] Using ACPI (MADT) for SMP configuration information +[ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000 +[ 0.000000] smpboot: Allowing 4 CPUs, 2 hotplug CPUs +[ 0.000000] nr_irqs_gsi: 40 +[ 0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x0009f000-0x0009ffff] +[ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000dbfff] +[ 0.000000] PM: Registered nosave memory: [mem 0x000dc000-0x000fffff] +[ 0.000000] PM: Registered nosave memory: [mem 0x796a1000-0x796a6fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x797b7000-0x7980efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798c7000-0x798d1fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798d2000-0x798d4fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798d5000-0x798d8fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798d9000-0x798dcfff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798dd000-0x798dffff] +[ 0.000000] PM: Registered nosave memory: [mem 0x798e0000-0x79906fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x79907000-0x79907fff] +[ 0.000000] PM: Registered nosave memory: [mem 0x79908000-0x79b0efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x79b0f000-0x79b9efff] +[ 0.000000] PM: Registered nosave memory: [mem 0x79b9f000-0x79bfefff] +[ 0.000000] e820: [mem 0x7c000000-0xdfffffff] available for PCI devices +[ 0.000000] Booting paravirtualized kernel on bare hardware +[ 0.000000] setup_percpu: NR_CPUS:256 nr_cpumask_bits:256 nr_cpu_ids:4 nr_node_ids:1 +[ 0.000000] PERCPU: Embedded 29 pages/cpu @ffff880079400000 s86848 r8192 d23744 u524288 +[ 0.000000] pcpu-alloc: s86848 r8192 d23744 u524288 alloc=1*2097152 +[ 0.000000] pcpu-alloc: [0] 0 1 2 3 +[ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 489858 +[ 0.000000] Policy zone: DMA32 +[ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-3.13.0-39-lowlatency root=UUID=097336a2-7389-4897-a7e8-1f43e91aae96 ro nomdmonddf nomdmonisw nomdmonddf nomdmonisw +[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.000000] Checking aperture... +[ 0.000000] No AGP bridge found +[ 0.000000] Calgary: detecting Calgary via BIOS EBDA area +[ 0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing! +[ 0.000000] Memory: 1917872K/1990684K available (7418K kernel code, 1135K rwdata, 3420K rodata, 1324K init, 1444K bss, 72812K reserved) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] RCU dyntick-idle grace-period acceleration is enabled. +[ 0.000000] Dump stacks of tasks blocking RCU-preempt GP. +[ 0.000000] RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=4. +[ 0.000000] Offload RCU callbacks from all CPUs +[ 0.000000] Offload RCU callbacks from CPUs: 0-3. +[ 0.000000] NR_IRQS:16640 nr_irqs:712 16 +[ 0.000000] Console: colour VGA+ 80x25 +[ 0.000000] console [tty0] enabled +[ 0.000000] allocated 8388608 bytes of page_cgroup +[ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups +[ 0.000000] hpet clockevent registered +[ 0.000000] tsc: Fast TSC calibration using PIT +[ 0.000000] tsc: Detected 2393.987 MHz processor +[ 0.001004] Calibrating delay loop (skipped), value calculated using timer frequency.. 4787.97 BogoMIPS (lpj=2393987) +[ 0.001099] pid_max: default: 32768 minimum: 301 +[ 0.001179] Security Framework initialized +[ 0.001251] AppArmor: AppArmor initialized +[ 0.001296] Yama: becoming mindful. +[ 0.001557] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes) +[ 0.002848] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes) +[ 0.003415] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.003468] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.003789] Initializing cgroup subsys memory +[ 0.003844] Initializing cgroup subsys devices +[ 0.003891] Initializing cgroup subsys freezer +[ 0.003939] Initializing cgroup subsys blkio +[ 0.003986] Initializing cgroup subsys bfqio +[ 0.004005] Initializing cgroup subsys perf_event +[ 0.004053] Initializing cgroup subsys hugetlb +[ 0.004120] Disabled fast string operations +[ 0.004170] CPU: Physical Processor ID: 0 +[ 0.004216] CPU: Processor Core ID: 0 +[ 0.004262] mce: CPU supports 6 MCE banks +[ 0.004312] CPU0: Thermal monitoring enabled (TM2) +[ 0.004366] Last level iTLB entries: 4KB 128, 2MB 4, 4MB 4 +[ 0.004366] Last level dTLB entries: 4KB 256, 2MB 0, 4MB 32 +[ 0.004366] tlb_flushall_shift: -1 +[ 0.004516] Freeing SMP alternatives memory: 24K (ffffffff81e68000 - ffffffff81e6e000) +[ 0.006138] ACPI: Core revision 20131115 +[ 0.012497] ACPI: All ACPI Tables successfully acquired +[ 0.013011] ftrace: allocating 28647 entries in 112 pages +[ 0.022461] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 +[ 0.032521] smpboot: CPU0: Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz (fam: 06, model: 17, stepping: 06) +[ 0.033000] Performance Events: PEBS fmt0+, 4-deep LBR, Core2 events, Intel PMU driver. +[ 0.033000] ... version: 2 +[ 0.033000] ... bit width: 40 +[ 0.033000] ... generic registers: 2 +[ 0.033000] ... value mask: 000000ffffffffff +[ 0.033000] ... max period: 000000007fffffff +[ 0.033000] ... fixed-purpose events: 3 +[ 0.033000] ... event mask: 0000000700000003 +[ 0.041071] x86: Booting SMP configuration: +[ 0.039030] Disabled fast string operations +[ 0.053119] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter. +[ 0.041119] .... node #0, CPUs: #1 +[ 0.053279] x86: Booted up 1 node, 2 CPUs +[ 0.053366] smpboot: Total of 2 processors activated (9575.94 BogoMIPS) +[ 0.054131] devtmpfs: initialized +[ 0.057653] EVM: security.selinux +[ 0.057699] EVM: security.SMACK64 +[ 0.057744] EVM: security.ima +[ 0.057788] EVM: security.capability +[ 0.058036] PM: Registering ACPI NVS region [mem 0x798c7000-0x798d1fff] (45056 bytes) +[ 0.058098] PM: Registering ACPI NVS region [mem 0x798d9000-0x798dcfff] (16384 bytes) +[ 0.058098] PM: Registering ACPI NVS region [mem 0x798e0000-0x79906fff] (159744 bytes) +[ 0.058098] PM: Registering ACPI NVS region [mem 0x79b0f000-0x79b9efff] (589824 bytes) +[ 0.059097] pinctrl core: initialized pinctrl subsystem +[ 0.059220] regulator-dummy: no parameters +[ 0.059299] RTC time: 6:48:55, date: 08/30/15 +[ 0.059386] NET: Registered protocol family 16 +[ 0.059557] cpuidle: using governor ladder +[ 0.059604] cpuidle: using governor menu +[ 0.059697] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it +[ 0.059758] ACPI: bus type PCI registered +[ 0.059805] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 +[ 0.059912] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xe0000000-0xe3ffffff] (base 0xe0000000) +[ 0.059976] PCI: MMCONFIG at [mem 0xe0000000-0xe3ffffff] reserved in E820 +[ 0.067547] PCI: Using configuration type 1 for base access +[ 0.067698] mtrr: your CPUs had inconsistent variable MTRR settings +[ 0.067747] mtrr: probably your BIOS does not setup all CPUs. +[ 0.067795] mtrr: corrected configuration. +[ 0.069011] bio: create slab <bio-0> at 0 +[ 0.069081] ACPI: Added _OSI(Module Device) +[ 0.069129] ACPI: Added _OSI(Processor Device) +[ 0.069176] ACPI: Added _OSI(3.0 _SCP Extensions) +[ 0.069176] ACPI: Added _OSI(Processor Aggregator Device) +[ 0.071018] ACPI : EC: EC description table is found, configuring boot EC +[ 0.075408] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored +[ 0.082370] ACPI: SSDT 00000000798d7c20 0002C8 (v01 PmRef Cpu0Ist 00003000 INTL 20050624) +[ 0.083085] ACPI: Dynamic OEM Table Load: +[ 0.083193] ACPI: SSDT (null) 0002C8 (v01 PmRef Cpu0Ist 00003000 INTL 20050624) +[ 0.083433] ACPI: SSDT 00000000798d5020 00087A (v01 PmRef Cpu0Cst 00003001 INTL 20050624) +[ 0.083951] ACPI: Dynamic OEM Table Load: +[ 0.084045] ACPI: SSDT (null) 00087A (v01 PmRef Cpu0Cst 00003001 INTL 20050624) +[ 0.087198] ACPI: SSDT 00000000798d6ca0 0001CF (v01 PmRef ApIst 00003000 INTL 20050624) +[ 0.088064] ACPI: Dynamic OEM Table Load: +[ 0.088171] ACPI: SSDT (null) 0001CF (v01 PmRef ApIst 00003000 INTL 20050624) +[ 0.089066] ACPI: SSDT 00000000798d6f20 00008D (v01 PmRef ApCst 00003000 INTL 20050624) +[ 0.089562] ACPI: Dynamic OEM Table Load: +[ 0.090005] ACPI: SSDT (null) 00008D (v01 PmRef ApCst 00003000 INTL 20050624) +[ 0.092138] ACPI: Interpreter enabled +[ 0.092190] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20131115/hwxface-580) +[ 0.092315] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20131115/hwxface-580) +[ 0.092449] ACPI: (supports S0 S3 S4 S5) +[ 0.092496] ACPI: Using IOAPIC for interrupt routing +[ 0.092565] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug +[ 0.093465] ACPI: ACPI Dock Station Driver: 3 docks/bays found +[ 0.103102] ACPI: Power Resource [PUBS] (on) +[ 0.108348] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.108789] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.109225] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.109664] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.110091] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.110528] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.110966] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.111407] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 7 9 10 *11) +[ 0.111809] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff]) +[ 0.111863] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] +[ 0.112338] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability] +[ 0.112429] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge +[ 0.112651] PCI host bridge to bus 0000:00 +[ 0.112699] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.112748] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7] +[ 0.112797] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff] +[ 0.112847] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff] +[ 0.112897] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff] +[ 0.112947] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff] +[ 0.112997] pci_bus 0000:00: root bus resource [mem 0x7c000000-0xfebfffff] +[ 0.113013] pci 0000:00:00.0: [8086:2a40] type 00 class 0x060000 +[ 0.113033] DMAR: Forcing write-buffer flush capability +[ 0.113081] DMAR: Disabling IOMMU for graphics on this chipset +[ 0.113196] pci 0000:00:02.0: [8086:2a42] type 00 class 0x030000 +[ 0.113209] pci 0000:00:02.0: reg 0x10: [mem 0xf2000000-0xf23fffff 64bit] +[ 0.113216] pci 0000:00:02.0: reg 0x18: [mem 0xd0000000-0xdfffffff 64bit pref] +[ 0.113222] pci 0000:00:02.0: reg 0x20: [io 0x1800-0x1807] +[ 0.113301] pci 0000:00:02.1: [8086:2a43] type 00 class 0x038000 +[ 0.113311] pci 0000:00:02.1: reg 0x10: [mem 0xf2400000-0xf24fffff 64bit] +[ 0.113403] pci 0000:00:03.0: [8086:2a44] type 00 class 0x078000 +[ 0.113419] pci 0000:00:03.0: reg 0x10: [mem 0xf2826800-0xf282680f 64bit] +[ 0.113469] pci 0000:00:03.0: PME# supported from D0 D3hot D3cold +[ 0.113534] pci 0000:00:03.3: [8086:2a47] type 00 class 0x070002 +[ 0.113548] pci 0000:00:03.3: reg 0x10: [io 0x1830-0x1837] +[ 0.113555] pci 0000:00:03.3: reg 0x14: [mem 0xf2624000-0xf2624fff] +[ 0.113704] pci 0000:00:19.0: [8086:10f5] type 00 class 0x020000 +[ 0.113729] pci 0000:00:19.0: reg 0x10: [mem 0xf2600000-0xf261ffff] +[ 0.113740] pci 0000:00:19.0: reg 0x14: [mem 0xf2625000-0xf2625fff] +[ 0.113751] pci 0000:00:19.0: reg 0x18: [io 0x1840-0x185f] +[ 0.113839] pci 0000:00:19.0: PME# supported from D0 D3hot D3cold +[ 0.113882] pci 0000:00:19.0: System wakeup disabled by ACPI +[ 0.114019] pci 0000:00:1a.0: [8086:2937] type 00 class 0x0c0300 +[ 0.114075] pci 0000:00:1a.0: reg 0x20: [io 0x1860-0x187f] +[ 0.114173] pci 0000:00:1a.0: System wakeup disabled by ACPI +[ 0.114259] pci 0000:00:1a.1: [8086:2938] type 00 class 0x0c0300 +[ 0.114315] pci 0000:00:1a.1: reg 0x20: [io 0x1880-0x189f] +[ 0.114427] pci 0000:00:1a.2: [8086:2939] type 00 class 0x0c0300 +[ 0.114483] pci 0000:00:1a.2: reg 0x20: [io 0x18a0-0x18bf] +[ 0.114579] pci 0000:00:1a.2: System wakeup disabled by ACPI +[ 0.114674] pci 0000:00:1a.7: [8086:293c] type 00 class 0x0c0320 +[ 0.114700] pci 0000:00:1a.7: reg 0x10: [mem 0xf2826c00-0xf2826fff] +[ 0.114810] pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold +[ 0.114854] pci 0000:00:1a.7: System wakeup disabled by ACPI +[ 0.114944] pci 0000:00:1b.0: [8086:293e] type 00 class 0x040300 +[ 0.114964] pci 0000:00:1b.0: reg 0x10: [mem 0xf2620000-0xf2623fff 64bit] +[ 0.115066] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold +[ 0.115120] pci 0000:00:1b.0: System wakeup disabled by ACPI +[ 0.115204] pci 0000:00:1c.0: [8086:2940] type 01 class 0x060400 +[ 0.115305] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold +[ 0.115352] pci 0000:00:1c.0: System wakeup disabled by ACPI +[ 0.115436] pci 0000:00:1c.1: [8086:2942] type 01 class 0x060400 +[ 0.115536] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold +[ 0.115584] pci 0000:00:1c.1: System wakeup disabled by ACPI +[ 0.115669] pci 0000:00:1c.3: [8086:2946] type 01 class 0x060400 +[ 0.115769] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold +[ 0.115816] pci 0000:00:1c.3: System wakeup disabled by ACPI +[ 0.115906] pci 0000:00:1d.0: [8086:2934] type 00 class 0x0c0300 +[ 0.115962] pci 0000:00:1d.0: reg 0x20: [io 0x18c0-0x18df] +[ 0.116067] pci 0000:00:1d.0: System wakeup disabled by ACPI +[ 0.116153] pci 0000:00:1d.1: [8086:2935] type 00 class 0x0c0300 +[ 0.116209] pci 0000:00:1d.1: reg 0x20: [io 0x18e0-0x18ff] +[ 0.116320] pci 0000:00:1d.2: [8086:2936] type 00 class 0x0c0300 +[ 0.116376] pci 0000:00:1d.2: reg 0x20: [io 0x1c00-0x1c1f] +[ 0.116498] pci 0000:00:1d.7: [8086:293a] type 00 class 0x0c0320 +[ 0.116523] pci 0000:00:1d.7: reg 0x10: [mem 0xf2827000-0xf28273ff] +[ 0.116632] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold +[ 0.116678] pci 0000:00:1d.7: System wakeup disabled by ACPI +[ 0.116764] pci 0000:00:1e.0: [8086:2448] type 01 class 0x060401 +[ 0.116898] pci 0000:00:1f.0: [8086:2917] type 00 class 0x060100 +[ 0.117115] pci 0000:00:1f.2: [8086:2929] type 00 class 0x010601 +[ 0.117142] pci 0000:00:1f.2: reg 0x10: [io 0x1c48-0x1c4f] +[ 0.117153] pci 0000:00:1f.2: reg 0x14: [io 0x183c-0x183f] +[ 0.117164] pci 0000:00:1f.2: reg 0x18: [io 0x1c40-0x1c47] +[ 0.117175] pci 0000:00:1f.2: reg 0x1c: [io 0x1838-0x183b] +[ 0.117186] pci 0000:00:1f.2: reg 0x20: [io 0x1c20-0x1c3f] +[ 0.117197] pci 0000:00:1f.2: reg 0x24: [mem 0xf2826000-0xf28267ff] +[ 0.117265] pci 0000:00:1f.2: PME# supported from D3hot +[ 0.117338] pci 0000:00:1f.3: [8086:2930] type 00 class 0x0c0500 +[ 0.117359] pci 0000:00:1f.3: reg 0x10: [mem 0xf2827400-0xf28274ff 64bit] +[ 0.117388] pci 0000:00:1f.3: reg 0x20: [io 0x1c60-0x1c7f] +[ 0.117535] pci 0000:00:1c.0: PCI bridge to [bus 02] +[ 0.117690] pci 0000:03:00.0: [8086:4237] type 00 class 0x028000 +[ 0.117730] pci 0000:03:00.0: reg 0x10: [mem 0xf2500000-0xf2501fff 64bit] +[ 0.117924] pci 0000:03:00.0: PME# supported from D0 D3hot D3cold +[ 0.119021] pci 0000:00:1c.1: PCI bridge to [bus 03] +[ 0.119076] pci 0000:00:1c.1: bridge window [mem 0xf2500000-0xf25fffff] +[ 0.119155] pci 0000:00:1c.3: PCI bridge to [bus 05-0c] +[ 0.119207] pci 0000:00:1c.3: bridge window [io 0x2000-0x2fff] +[ 0.119211] pci 0000:00:1c.3: bridge window [mem 0xf0000000-0xf1ffffff] +[ 0.119219] pci 0000:00:1c.3: bridge window [mem 0xf2900000-0xf29fffff 64bit pref] +[ 0.119318] pci 0000:00:1e.0: PCI bridge to [bus 0d] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode) +[ 0.119318] pci 0000:00:1e.0: bridge window [mem 0x7c000000-0xfebfffff] (subtractive decode) +[ 0.119318] acpi PNP0A08:00: Disabling ASPM (FADT indicates it is unsupported) +[ 0.121307] ACPI: Enabled 3 GPEs in block 00 to 3F +[ 0.121425] ACPI: \_SB_.PCI0: notify handler is installed +[ 0.121469] Found 1 acpi root devices +[ 0.121543] ACPI : EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62 +[ 0.121671] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none +[ 0.121671] vgaarb: loaded +[ 0.121671] vgaarb: bridge control possible 0000:00:02.0 +[ 0.122188] SCSI subsystem initialized +[ 0.122251] libata version 3.00 loaded. +[ 0.122251] ACPI: bus type USB registered +[ 0.122251] usbcore: registered new interface driver usbfs +[ 0.122251] usbcore: registered new interface driver hub +[ 0.122251] usbcore: registered new device driver usb +[ 0.123053] PCI: Using ACPI for IRQ routing +[ 0.125422] PCI: pci_cache_line_size set to 64 bytes +[ 0.125494] e820: reserve RAM buffer [mem 0x0009ec00-0x0009ffff] +[ 0.125496] e820: reserve RAM buffer [mem 0x796a1000-0x7bffffff] +[ 0.125498] e820: reserve RAM buffer [mem 0x797b7000-0x7bffffff] +[ 0.125500] e820: reserve RAM buffer [mem 0x798c7000-0x7bffffff] +[ 0.125503] e820: reserve RAM buffer [mem 0x79c00000-0x7bffffff] +[ 0.125588] NetLabel: Initializing +[ 0.125634] NetLabel: domain hash size = 128 +[ 0.125680] NetLabel: protocols = UNLABELED CIPSOv4 +[ 0.125737] NetLabel: unlabeled traffic allowed by default +[ 0.125795] HPET: 4 timers in total, 0 timers will be used for per-cpu timer +[ 0.125795] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0 +[ 0.126107] hpet0: 4 comparators, 64-bit 14.318180 MHz counter +[ 0.128030] Switched to clocksource hpet +[ 0.134288] AppArmor: AppArmor Filesystem Enabled +[ 0.134388] pnp: PnP ACPI init +[ 0.134450] ACPI: bus type PNP registered +[ 0.154864] system 00:00: [mem 0x00000000-0x0009ffff] could not be reserved +[ 0.154916] system 00:00: [mem 0x000c0000-0x000c3fff] could not be reserved +[ 0.154967] system 00:00: [mem 0x000c4000-0x000c7fff] could not be reserved +[ 0.155029] system 00:00: [mem 0x000c8000-0x000cbfff] has been reserved +[ 0.155080] system 00:00: [mem 0x000cc000-0x000cffff] has been reserved +[ 0.155130] system 00:00: [mem 0x000d0000-0x000d3fff] could not be reserved +[ 0.155181] system 00:00: [mem 0x000dc000-0x000dffff] could not be reserved +[ 0.155231] system 00:00: [mem 0x000e0000-0x000e3fff] could not be reserved +[ 0.155282] system 00:00: [mem 0x000e4000-0x000e7fff] could not be reserved +[ 0.155332] system 00:00: [mem 0x000e8000-0x000ebfff] could not be reserved +[ 0.155383] system 00:00: [mem 0x000ec000-0x000effff] could not be reserved +[ 0.155433] system 00:00: [mem 0x000f0000-0x000fffff] could not be reserved +[ 0.155484] system 00:00: [mem 0x00100000-0x7bffffff] could not be reserved +[ 0.155535] system 00:00: [mem 0xfec00000-0xfed3ffff] could not be reserved +[ 0.155585] system 00:00: [mem 0xfed4c000-0xffffffff] could not be reserved +[ 0.155638] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active) +[ 0.175625] system 00:01: [io 0x1000-0x107f] could not be reserved +[ 0.175676] system 00:01: [io 0x1180-0x11ff] has been reserved +[ 0.175726] system 00:01: [io 0x0800-0x080f] has been reserved +[ 0.175775] system 00:01: [io 0x15e0-0x15ef] has been reserved +[ 0.175825] system 00:01: [io 0x1600-0x167f] has been reserved +[ 0.175874] system 00:01: [io 0x1680-0x169f] has been reserved +[ 0.175923] system 00:01: [mem 0xe0000000-0xefffffff] has been reserved +[ 0.175974] system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved +[ 0.176035] system 00:01: [mem 0xfed10000-0xfed13fff] has been reserved +[ 0.176086] system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved +[ 0.176136] system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved +[ 0.176187] system 00:01: [mem 0xfed45000-0xfed4bfff] has been reserved +[ 0.176238] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active) +[ 0.176291] pnp 00:02: Plug and Play ACPI device, IDs PNP0103 (active) +[ 0.176300] pnp 00:03: [dma 4] +[ 0.176318] pnp 00:03: Plug and Play ACPI device, IDs PNP0200 (active) +[ 0.176344] pnp 00:04: Plug and Play ACPI device, IDs PNP0800 (active) +[ 0.176381] pnp 00:05: Plug and Play ACPI device, IDs PNP0c04 (active) +[ 0.176413] pnp 00:06: Plug and Play ACPI device, IDs PNP0b00 (active) +[ 0.176441] pnp 00:07: Plug and Play ACPI device, IDs PNP0303 (active) +[ 0.176472] pnp 00:08: Plug and Play ACPI device, IDs IBM3780 PNP0f13 (active) +[ 0.196442] pnp 00:09: Plug and Play ACPI device, IDs PNP0c31 (active) +[ 0.196872] pnp: PnP ACPI: found 10 devices +[ 0.196919] ACPI: bus type PNP unregistered +[ 0.203744] pci 0000:00:1c.0: bridge window [io 0x1000-0x0fff] to [bus 02] add_size 1000 +[ 0.203748] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 02] add_size 200000 +[ 0.203751] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 02] add_size 200000 +[ 0.203761] pci 0000:00:1c.1: bridge window [io 0x1000-0x0fff] to [bus 03] add_size 1000 +[ 0.203764] pci 0000:00:1c.1: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 03] add_size 200000 +[ 0.203790] pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x000fffff] get_res_add_size add_size 200000 +[ 0.203792] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 +[ 0.203794] pci 0000:00:1c.1: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 +[ 0.203797] pci 0000:00:1c.0: res[13]=[io 0x1000-0x0fff] get_res_add_size add_size 1000 +[ 0.203799] pci 0000:00:1c.1: res[13]=[io 0x1000-0x0fff] get_res_add_size add_size 1000 +[ 0.203803] pci 0000:00:1c.0: BAR 14: assigned [mem 0x7c000000-0x7c1fffff] +[ 0.203855] pci 0000:00:1c.0: BAR 15: assigned [mem 0x7c200000-0x7c3fffff 64bit pref] +[ 0.203917] pci 0000:00:1c.1: BAR 15: assigned [mem 0x7c400000-0x7c5fffff 64bit pref] +[ 0.203979] pci 0000:00:1c.0: BAR 13: assigned [io 0x3000-0x3fff] +[ 0.204040] pci 0000:00:1c.1: BAR 13: assigned [io 0x4000-0x4fff] +[ 0.204091] pci 0000:00:1c.0: PCI bridge to [bus 02] +[ 0.204141] pci 0000:00:1c.0: bridge window [io 0x3000-0x3fff] +[ 0.204194] pci 0000:00:1c.0: bridge window [mem 0x7c000000-0x7c1fffff] +[ 0.204247] pci 0000:00:1c.0: bridge window [mem 0x7c200000-0x7c3fffff 64bit pref] +[ 0.204313] pci 0000:00:1c.1: PCI bridge to [bus 03] +[ 0.204362] pci 0000:00:1c.1: bridge window [io 0x4000-0x4fff] +[ 0.204415] pci 0000:00:1c.1: bridge window [mem 0xf2500000-0xf25fffff] +[ 0.204468] pci 0000:00:1c.1: bridge window [mem 0x7c400000-0x7c5fffff 64bit pref] +[ 0.204534] pci 0000:00:1c.3: PCI bridge to [bus 05-0c] +[ 0.204583] pci 0000:00:1c.3: bridge window [io 0x2000-0x2fff] +[ 0.204636] pci 0000:00:1c.3: bridge window [mem 0xf0000000-0xf1ffffff] +[ 0.204689] pci 0000:00:1c.3: bridge window [mem 0xf2900000-0xf29fffff 64bit pref] +[ 0.204755] pci 0000:00:1e.0: PCI bridge to [bus 0d] +[ 0.204815] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7] +[ 0.204817] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff] +[ 0.204819] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.204821] pci_bus 0000:00: resource 7 [mem 0x000d4000-0x000d7fff] +[ 0.204823] pci_bus 0000:00: resource 8 [mem 0x000d8000-0x000dbfff] +[ 0.204824] pci_bus 0000:00: resource 9 [mem 0x7c000000-0xfebfffff] +[ 0.204827] pci_bus 0000:02: resource 0 [io 0x3000-0x3fff] +[ 0.204828] pci_bus 0000:02: resource 1 [mem 0x7c000000-0x7c1fffff] +[ 0.204830] pci_bus 0000:02: resource 2 [mem 0x7c200000-0x7c3fffff 64bit pref] +[ 0.204832] pci_bus 0000:03: resource 0 [io 0x4000-0x4fff] +[ 0.204834] pci_bus 0000:03: resource 1 [mem 0xf2500000-0xf25fffff] +[ 0.204836] pci_bus 0000:03: resource 2 [mem 0x7c400000-0x7c5fffff 64bit pref] +[ 0.204838] pci_bus 0000:05: resource 0 [io 0x2000-0x2fff] +[ 0.204840] pci_bus 0000:05: resource 1 [mem 0xf0000000-0xf1ffffff] +[ 0.204842] pci_bus 0000:05: resource 2 [mem 0xf2900000-0xf29fffff 64bit pref] +[ 0.204844] pci_bus 0000:0d: resource 4 [io 0x0000-0x0cf7] +[ 0.204846] pci_bus 0000:0d: resource 5 [io 0x0d00-0xffff] +[ 0.204848] pci_bus 0000:0d: resource 6 [mem 0x000a0000-0x000bffff] +[ 0.204850] pci_bus 0000:0d: resource 7 [mem 0x000d4000-0x000d7fff] +[ 0.204852] pci_bus 0000:0d: resource 8 [mem 0x000d8000-0x000dbfff] +[ 0.204853] pci_bus 0000:0d: resource 9 [mem 0x7c000000-0xfebfffff] +[ 0.204887] NET: Registered protocol family 2 +[ 0.205147] TCP established hash table entries: 16384 (order: 5, 131072 bytes) +[ 0.205279] TCP bind hash table entries: 16384 (order: 6, 262144 bytes) +[ 0.205428] TCP: Hash tables configured (established 16384 bind 16384) +[ 0.205529] TCP: reno registered +[ 0.205578] UDP hash table entries: 1024 (order: 3, 32768 bytes) +[ 0.205641] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes) +[ 0.205757] NET: Registered protocol family 1 +[ 0.205816] pci 0000:00:02.0: Boot video device +[ 0.206766] PCI: CLS 64 bytes, default 64 +[ 0.206828] Trying to unpack rootfs image as initramfs... +[ 0.654139] Freeing initrd memory: 22968K (ffff880035314000 - ffff880036982000) +[ 0.654271] Simple Boot Flag at 0x35 set to 0x1 +[ 0.654472] microcode: CPU0 sig=0x10676, pf=0x80, revision=0x60c +[ 0.654527] microcode: CPU1 sig=0x10676, pf=0x80, revision=0x60c +[ 0.654675] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba +[ 0.654738] Scanning for low memory corruption every 60 seconds +[ 0.655070] Initialise system trusted keyring +[ 0.655166] audit: initializing netlink socket (disabled) +[ 0.655228] type=2000 audit(1440917335.654:1): initialized +[ 0.677686] HugeTLB registered 2 MB page size, pre-allocated 0 pages +[ 0.678936] zbud: loaded +[ 0.679129] VFS: Disk quotas dquot_6.5.2 +[ 0.679222] Dquot-cache hash table entries: 512 (order 0, 4096 bytes) +[ 0.679760] fuse init (API version 7.22) +[ 0.679888] msgmni has been set to 3790 +[ 0.679992] Key type big_key registered +[ 0.680581] Key type asymmetric registered +[ 0.680630] Asymmetric key parser 'x509' registered +[ 0.680708] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) +[ 0.680805] io scheduler noop registered +[ 0.680854] io scheduler deadline registered +[ 0.680926] io scheduler cfq registered +[ 0.680975] io scheduler bfq registered (default) +[ 0.681033] BFQ I/O-scheduler version: v7r5 +[ 0.681277] pcieport 0000:00:1c.0: irq 40 for MSI/MSI-X +[ 0.681485] pcieport 0000:00:1c.1: irq 41 for MSI/MSI-X +[ 0.681648] pcieport 0000:00:1c.3: irq 42 for MSI/MSI-X +[ 0.681801] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt +[ 0.681856] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded +[ 0.681914] pcieport 0000:00:1c.1: Signaling PME through PCIe PME interrupt +[ 0.681967] pci 0000:03:00.0: Signaling PME through PCIe PME interrupt +[ 0.682032] pcie_pme 0000:00:1c.1:pcie01: service driver pcie_pme loaded +[ 0.682086] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt +[ 0.682140] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded +[ 0.682156] pci_hotplug: PCI Hot Plug PCI Core version: 0.5 +[ 0.682263] pciehp 0000:00:1c.0:pcie04: HPC vendor_id 8086 device_id 2940 ss_vid 17aa ss_did 20f3 +[ 0.682387] pciehp 0000:00:1c.0:pcie04: service driver pciehp loaded +[ 0.682402] pciehp 0000:00:1c.1:pcie04: HPC vendor_id 8086 device_id 2942 ss_vid 17aa ss_did 20f3 +[ 0.682519] pciehp 0000:00:1c.1:pcie04: service driver pciehp loaded +[ 0.682533] pciehp 0000:00:1c.3:pcie04: HPC vendor_id 8086 device_id 2946 ss_vid 17aa ss_did 20f3 +[ 0.682653] pciehp 0000:00:1c.3:pcie04: service driver pciehp loaded +[ 0.682659] pciehp: PCI Express Hot Plug Controller Driver version: 0.4 +[ 0.682755] intel_idle: does not run on family 6 model 23 +[ 0.682764] ipmi message handler version 39.2 +[ 0.682977] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.683222] ACPI: AC Adapter [AC] (on-line) +[ 0.683362] input: Lid Switch as /devices/LNXSYSTM:00/device:00/PNP0C0D:00/input/input0 +[ 0.683702] ACPI: Lid Switch [LID] +[ 0.683781] input: Sleep Button as /devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1 +[ 0.683844] ACPI: Sleep Button [SLPB] +[ 0.683929] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 +[ 0.683991] ACPI: Power Button [PWRF] +[ 0.685432] Monitor-Mwait will be used to enter C-1 state +[ 0.685438] Monitor-Mwait will be used to enter C-2 state +[ 0.685441] Monitor-Mwait will be used to enter C-3 state +[ 0.685444] tsc: Marking TSC unstable due to TSC halts in idle +[ 0.685502] ACPI: acpi_idle registered with cpuidle +[ 0.687967] thermal LNXTHERM:00: registered as thermal_zone0 +[ 0.688045] ACPI: Thermal Zone [THM0] (56 C) +[ 0.689472] thermal LNXTHERM:01: registered as thermal_zone1 +[ 0.689527] ACPI: Thermal Zone [THM1] (55 C) +[ 0.689603] GHES: HEST is not enabled! +[ 0.689793] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared +[ 0.689861] ACPI: Battery Slot [BAT0] (battery absent) +[ 0.689943] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled +[ 0.712208] 0000:00:03.3: ttyS4 at I/O 0x1830 (irq = 17, base_baud = 115200) is a 16550A +[ 0.712544] Linux agpgart interface v0.103 +[ 0.712661] agpgart-intel 0000:00:00.0: Intel GM45 Chipset +[ 0.712794] agpgart-intel 0000:00:00.0: detected gtt size: 2097152K total, 262144K mappable +[ 0.713914] agpgart-intel 0000:00:00.0: detected 32768K stolen memory +[ 0.714136] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000 +[ 0.720051] tpm_tis 00:09: 1.2 TPM (device-id 0x1020, rev-id 6) +[ 0.720104] tpm_tis 00:09: Intel iTPM workaround enabled +[ 0.792118] tpm_tis 00:09: TPM is disabled/deactivated (0x6) +[ 0.793802] brd: module loaded +[ 0.794673] loop: module loaded +[ 0.795114] libphy: Fixed MDIO Bus: probed +[ 0.795245] tun: Universal TUN/TAP device driver, 1.6 +[ 0.795292] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> +[ 0.795389] PPP generic driver version 2.4.2 +[ 0.795505] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver +[ 0.795557] ehci-pci: EHCI PCI platform driver +[ 0.795729] ehci-pci 0000:00:1a.7: EHCI Host Controller +[ 0.795781] ehci-pci 0000:00:1a.7: new USB bus registered, assigned bus number 1 +[ 0.795855] ehci-pci 0000:00:1a.7: debug port 1 +[ 0.799819] ehci-pci 0000:00:1a.7: cache line size of 64 is not supported +[ 0.799914] ehci-pci 0000:00:1a.7: irq 23, io mem 0xf2826c00 +[ 0.806055] ehci-pci 0000:00:1a.7: USB 2.0 started, EHCI 1.00 +[ 0.806198] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.806249] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.806309] usb usb1: Product: EHCI Host Controller +[ 0.806356] usb usb1: Manufacturer: Linux 3.13.0-39-lowlatency ehci_hcd +[ 0.806406] usb usb1: SerialNumber: 0000:00:1a.7 +[ 0.806572] hub 1-0:1.0: USB hub found +[ 0.806625] hub 1-0:1.0: 6 ports detected +[ 0.806964] ehci-pci 0000:00:1d.7: EHCI Host Controller +[ 0.807027] ehci-pci 0000:00:1d.7: new USB bus registered, assigned bus number 2 +[ 0.807102] ehci-pci 0000:00:1d.7: debug port 1 +[ 0.811047] ehci-pci 0000:00:1d.7: cache line size of 64 is not supported +[ 0.811128] ehci-pci 0000:00:1d.7: irq 19, io mem 0xf2827000 +[ 0.817124] ehci-pci 0000:00:1d.7: USB 2.0 started, EHCI 1.00 +[ 0.817761] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.817811] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.817871] usb usb2: Product: EHCI Host Controller +[ 0.817919] usb usb2: Manufacturer: Linux 3.13.0-39-lowlatency ehci_hcd +[ 0.817968] usb usb2: SerialNumber: 0000:00:1d.7 +[ 0.818141] hub 2-0:1.0: USB hub found +[ 0.818192] hub 2-0:1.0: 6 ports detected +[ 0.818460] ehci-platform: EHCI generic platform driver +[ 0.818515] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver +[ 0.818986] ohci-pci: OHCI PCI platform driver +[ 0.819056] ohci-platform: OHCI generic platform driver +[ 0.819118] uhci_hcd: USB Universal Host Controller Interface driver +[ 0.819235] uhci_hcd 0000:00:1a.0: UHCI Host Controller +[ 0.819286] uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 3 +[ 0.819442] uhci_hcd 0000:00:1a.0: irq 20, io base 0x00001860 +[ 0.819539] usb usb3: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.819590] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.819651] usb usb3: Product: UHCI Host Controller +[ 0.819698] usb usb3: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.819748] usb usb3: SerialNumber: 0000:00:1a.0 +[ 0.819903] hub 3-0:1.0: USB hub found +[ 0.819962] hub 3-0:1.0: 2 ports detected +[ 0.820186] uhci_hcd 0000:00:1a.1: UHCI Host Controller +[ 0.820237] uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4 +[ 0.820407] uhci_hcd 0000:00:1a.1: irq 21, io base 0x00001880 +[ 0.820506] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.820557] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.820617] usb usb4: Product: UHCI Host Controller +[ 0.820665] usb usb4: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.820714] usb usb4: SerialNumber: 0000:00:1a.1 +[ 0.820868] hub 4-0:1.0: USB hub found +[ 0.820930] hub 4-0:1.0: 2 ports detected +[ 0.821160] uhci_hcd 0000:00:1a.2: UHCI Host Controller +[ 0.821212] uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5 +[ 0.821367] uhci_hcd 0000:00:1a.2: irq 22, io base 0x000018a0 +[ 0.821465] usb usb5: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.821516] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.821577] usb usb5: Product: UHCI Host Controller +[ 0.821624] usb usb5: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.821674] usb usb5: SerialNumber: 0000:00:1a.2 +[ 0.821836] hub 5-0:1.0: USB hub found +[ 0.821893] hub 5-0:1.0: 2 ports detected +[ 0.822114] uhci_hcd 0000:00:1d.0: UHCI Host Controller +[ 0.822166] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6 +[ 0.822323] uhci_hcd 0000:00:1d.0: irq 16, io base 0x000018c0 +[ 0.822435] usb usb6: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.822486] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.822552] usb usb6: Product: UHCI Host Controller +[ 0.822599] usb usb6: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.822649] usb usb6: SerialNumber: 0000:00:1d.0 +[ 0.822816] hub 6-0:1.0: USB hub found +[ 0.822867] hub 6-0:1.0: 2 ports detected +[ 0.823088] uhci_hcd 0000:00:1d.1: UHCI Host Controller +[ 0.823139] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7 +[ 0.823297] uhci_hcd 0000:00:1d.1: irq 17, io base 0x000018e0 +[ 0.823398] usb usb7: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.823449] usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.823509] usb usb7: Product: UHCI Host Controller +[ 0.823557] usb usb7: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.823607] usb usb7: SerialNumber: 0000:00:1d.1 +[ 0.823765] hub 7-0:1.0: USB hub found +[ 0.823816] hub 7-0:1.0: 2 ports detected +[ 0.824045] uhci_hcd 0000:00:1d.2: UHCI Host Controller +[ 0.824097] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8 +[ 0.824267] uhci_hcd 0000:00:1d.2: irq 18, io base 0x00001c00 +[ 0.824365] usb usb8: New USB device found, idVendor=1d6b, idProduct=0001 +[ 0.824415] usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.824476] usb usb8: Product: UHCI Host Controller +[ 0.824524] usb usb8: Manufacturer: Linux 3.13.0-39-lowlatency uhci_hcd +[ 0.824573] usb usb8: SerialNumber: 0000:00:1d.2 +[ 0.824732] hub 8-0:1.0: USB hub found +[ 0.824784] hub 8-0:1.0: 2 ports detected +[ 0.824974] i8042: PNP: PS/2 Controller [PNP0303:KBD,PNP0f13:MOU] at 0x60,0x64 irq 1,12 +[ 0.835273] serio: i8042 KBD port at 0x60,0x64 irq 1 +[ 0.835347] serio: i8042 AUX port at 0x60,0x64 irq 12 +[ 0.835524] mousedev: PS/2 mouse device common for all mice +[ 0.835806] rtc_cmos 00:06: RTC can wake from S4 +[ 0.835996] rtc_cmos 00:06: rtc core: registered rtc_cmos as rtc0 +[ 0.836163] rtc_cmos 00:06: alarms up to one month, y3k, 114 bytes nvram, hpet irqs +[ 0.836291] device-mapper: uevent: version 1.0.3 +[ 0.836409] device-mapper: ioctl: 4.27.0-ioctl (2013-10-30) initialised: dm-devel@redhat.com +[ 0.836476] ledtrig-cpu: registered to indicate activity on CPUs +[ 0.836624] TCP: cubic registered +[ 0.836776] NET: Registered protocol family 10 +[ 0.837000] NET: Registered protocol family 17 +[ 0.837068] Key type dns_resolver registered +[ 0.837424] Loading compiled-in X.509 certificates +[ 0.838592] Loaded X.509 cert 'Magrathea: Glacier signing key: a7171335f18ca6131c1947ca87d46fb662317fa6' +[ 0.838684] registered taskstats version 1 +[ 0.841129] Key type trusted registered +[ 0.843261] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3 +[ 0.843344] Key type encrypted registered +[ 0.845402] AppArmor: AppArmor sha1 policy hashing enabled +[ 0.863122] tpm_tis 00:09: A TPM error (6) occurred attempting to read a pcr value +[ 0.863186] IMA: No TPM chip found, activating TPM-bypass! +[ 0.863533] regulator-dummy: disabling +[ 0.863620] Magic number: 11:688:823 +[ 0.863809] rtc_cmos 00:06: setting system clock to 2015-08-30 06:48:56 UTC (1440917336) +[ 0.866119] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found +[ 0.866172] EDD information not available. +[ 0.866304] PM: Hibernation image not present or could not be loaded. +[ 0.868348] Freeing unused kernel memory: 1324K (ffffffff81d1d000 - ffffffff81e68000) +[ 0.868413] Write protecting the kernel read-only data: 12288k +[ 0.872016] Freeing unused kernel memory: 764K (ffff880001741000 - ffff880001800000) +[ 0.875110] Freeing unused kernel memory: 676K (ffff880001b57000 - ffff880001c00000) +[ 0.894972] systemd-udevd[126]: starting version 204 +[ 0.928980] pps_core: LinuxPPS API ver. 1 registered +[ 0.930015] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> +[ 0.934247] PTP clock support registered +[ 0.940925] [drm] Initialized drm 1.1.0 20060810 +[ 0.948317] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k +[ 0.948333] wmi: Mapper loaded +[ 0.949020] e1000e: Copyright(c) 1999 - 2013 Intel Corporation. +[ 0.949310] e1000e 0000:00:19.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode +[ 0.949407] e1000e 0000:00:19.0: irq 43 for MSI/MSI-X +[ 1.143351] e1000e 0000:00:19.0 eth0: (PCI Express:2.5GT/s:Width x1) 00:1f:16:0b:4d:8c +[ 1.143422] e1000e 0000:00:19.0 eth0: Intel(R) PRO/1000 Network Connection +[ 1.143503] e1000e 0000:00:19.0 eth0: MAC: 7, PHY: 8, PBA No: 1008FF-0FF +[ 1.143581] ahci 0000:00:1f.2: version 3.0 +[ 1.143759] ahci 0000:00:1f.2: irq 44 for MSI/MSI-X +[ 1.143807] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled +[ 1.143886] ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 4 ports 3 Gbps 0x3 impl SATA mode +[ 1.143952] ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pio slum part ccc sxs +[ 1.144931] scsi0 : ahci +[ 1.145135] scsi1 : ahci +[ 1.145511] scsi2 : ahci +[ 1.145741] scsi3 : ahci +[ 1.145851] ata1: SATA max UDMA/133 abar m2048@0xf2826000 port 0xf2826100 irq 44 +[ 1.145924] ata2: SATA max UDMA/133 abar m2048@0xf2826000 port 0xf2826180 irq 44 +[ 1.145987] ata3: DUMMY +[ 1.146051] ata4: DUMMY +[ 1.146776] [drm] Memory usable by graphics device = 2048M +[ 1.211100] i915 0000:00:02.0: irq 45 for MSI/MSI-X +[ 1.211112] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.211164] [drm] Driver supports precise vblank timestamp query. +[ 1.211360] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem +[ 1.356901] fbcon: inteldrmfb (fb0) is primary device +[ 1.429783] psmouse serio1: alps: Unknown ALPS touchpad: E7=10 00 64, EC=10 00 64 +[ 1.451120] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300) +[ 1.452184] ata1.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.452187] ata1.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out +[ 1.452301] ata1.00: ACPI cmd ef/5f:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.452303] ata1.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.464094] usb 4-2: new full-speed USB device number 2 using uhci_hcd +[ 1.498665] ata1.00: ATA-8: WDC WD1600BEVS-08VAT2, 14.01A14, max UDMA/133 +[ 1.498667] ata1.00: 312581808 sectors, multi 16: LBA48 NCQ (depth 31/32), AA +[ 1.500316] ata1.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.500319] ata1.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out +[ 1.500465] ata1.00: ACPI cmd ef/5f:00:00:00:00:a0 (SET FEATURES) succeeded +[ 1.500467] ata1.00: ACPI cmd ef/10:03:00:00:00:a0 (SET FEATURES) filtered out +[ 1.502270] ata1.00: configured for UDMA/133 +[ 1.502467] scsi 0:0:0:0: Direct-Access ATA WDC WD1600BEVS-0 14.0 PQ: 0 ANSI: 5 +[ 1.502651] sd 0:0:0:0: [sda] 312581808 512-byte logical blocks: (160 GB/149 GiB) +[ 1.502695] sd 0:0:0:0: Attached scsi generic sg0 type 0 +[ 1.502732] sd 0:0:0:0: [sda] Write Protect is off +[ 1.502734] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00 +[ 1.502774] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA +[ 1.537914] sda: sda1 sda2 < sda5 sda6 > +[ 1.538544] sd 0:0:0:0: [sda] Attached SCSI disk +[ 1.618541] usb 4-2: New USB device found, idVendor=0a5c, idProduct=2145 +[ 1.618544] usb 4-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0 +[ 1.618546] usb 4-2: Product: ThinkPad Bluetooth with Enhanced Data Rate II +[ 1.618547] usb 4-2: Manufacturer: Lenovo Computer Corp +[ 1.796484] psmouse serio1: trackpoint: IBM TrackPoint firmware: 0x0e, buttons: 3/3 +[ 1.807121] ata2: SATA link down (SStatus 0 SControl 300) +[ 1.814662] input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio1/input/input5 +[ 1.894282] Console: switching to colour frame buffer device 160x50 +[ 1.901135] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device +[ 1.902865] i915 0000:00:02.0: registered panic notifier +[ 1.907397] ACPI: Video Device [VID] (multi-head: yes rom: no post: no) +[ 1.916101] acpi device:02: registered as cooling_device2 +[ 1.917970] input: Video Bus as /devices/LNXSYSTM:00/device:00/PNP0A08:00/LNXVIDEO:00/input/input6 +[ 1.919867] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0 +[ 2.603154] md: linear personality registered for level -1 +[ 2.607184] md: multipath personality registered for level -4 +[ 2.611208] md: raid0 personality registered for level 0 +[ 2.615754] md: raid1 personality registered for level 1 +[ 2.637037] raid6: sse2x1 2871 MB/s +[ 2.654032] raid6: sse2x2 3125 MB/s +[ 2.671029] raid6: sse2x4 4628 MB/s +[ 2.671057] raid6: using algorithm sse2x4 (4628 MB/s) +[ 2.671090] raid6: using ssse3x2 recovery algorithm +[ 2.673224] xor: measuring software checksum speed +[ 2.683030] prefetch64-sse: 6432.000 MB/sec +[ 2.693030] generic_sse: 5720.000 MB/sec +[ 2.693061] xor: using function: prefetch64-sse (6432.000 MB/sec) +[ 2.695037] async_tx: api initialized (async) +[ 2.706535] md: raid6 personality registered for level 6 +[ 2.706574] md: raid5 personality registered for level 5 +[ 2.706609] md: raid4 personality registered for level 4 +[ 2.715477] md: raid10 personality registered for level 10 +[ 2.777351] random: nonblocking pool is initialized +[ 2.912964] bio: create slab <bio-1> at 1 +[ 2.914076] Btrfs loaded +[ 3.142639] EXT4-fs (sda1): mounted filesystem with ordered data mode. Opts: (null) +[ 13.257389] Adding 4230140k swap on /dev/sda5. Priority:-1 extents:1 across:4230140k FS +[ 13.348717] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 13.512598] systemd-udevd[410]: starting version 204 +[ 13.698475] lp: driver loaded but no devices found +[ 13.718842] ppdev: user-space parallel port driver +[ 13.888756] Bluetooth: Core ver 2.17 +[ 13.888782] NET: Registered protocol family 31 +[ 13.888785] Bluetooth: HCI device and connection manager initialized +[ 13.888797] Bluetooth: HCI socket layer initialized +[ 13.888801] Bluetooth: L2CAP socket layer initialized +[ 13.888807] Bluetooth: SCO socket layer initialized +[ 13.902331] usbcore: registered new interface driver btusb +[ 13.909756] ACPI Warning: 0x0000000000001028-0x000000000000102f SystemIO conflicts with Region \_SB_.PCI0.LPC_.PMIO 1 (20131115/utaddress-251) +[ 13.909766] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 13.909772] ACPI Warning: 0x00000000000011b0-0x00000000000011bf SystemIO conflicts with Region \_SB_.PCI0.LPC_.LPIO 1 (20131115/utaddress-251) +[ 13.909777] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 13.909779] ACPI Warning: 0x0000000000001180-0x00000000000011af SystemIO conflicts with Region \_SB_.PCI0.LPC_.LPIO 1 (20131115/utaddress-251) +[ 13.909783] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver +[ 13.909785] lpc_ich: Resource conflict(s) found affecting gpio_ich +[ 13.924585] EXT4-fs (sda1): re-mounted. Opts: errors=remount-ro +[ 13.962851] Non-volatile memory driver v1.3 +[ 14.000898] thinkpad_acpi: ThinkPad ACPI Extras v0.25 +[ 14.000903] thinkpad_acpi: http://ibm-acpi.sf.net/ +[ 14.000905] thinkpad_acpi: ThinkPad BIOS 6DET65WW (3.15 ), EC 7XHT24WW-1.06 +[ 14.000907] thinkpad_acpi: Lenovo ThinkPad X200, model 7459GW4 +[ 14.023348] thinkpad_acpi: detected a 16-level brightness capable ThinkPad +[ 14.023562] thinkpad_acpi: radio switch found; radios are enabled +[ 14.023579] thinkpad_acpi: This ThinkPad has standard ACPI backlight brightness control, supported by the ACPI video driver +[ 14.023581] thinkpad_acpi: Disabling thinkpad-acpi brightness events by default... +[ 14.027716] thinkpad_acpi: rfkill switch tpacpi_bluetooth_sw: radio is unblocked +[ 14.033143] thinkpad_acpi: Standard ACPI backlight interface available, not loading native one +[ 14.033423] thinkpad_acpi: Console audio control enabled, mode: monitor (read only) +[ 14.037967] input: ThinkPad Extra Buttons as /devices/platform/thinkpad_acpi/input/input7 +[ 14.094334] snd_hda_intel 0000:00:1b.0: irq 46 for MSI/MSI-X +[ 14.117123] hda_codec: CX20561 (Hermosa): BIOS auto-probing. +[ 14.117573] autoconfig: line_outs=1 (0x1a/0x0/0x0/0x0/0x0) type:speaker +[ 14.117576] speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) +[ 14.117578] hp_outs=2 (0x19/0x16/0x0/0x0/0x0) +[ 14.117580] mono: mono_out=0x0 +[ 14.117582] dig-out=0x1c/0x0 +[ 14.117583] inputs: +[ 14.117585] Mic=0x18 +[ 14.117587] Internal Mic=0x1d +[ 14.117589] Dock Mic=0x17 +[ 14.118587] hda_codec: Enable sync_write for stable communication +[ 14.121304] input: HDA Intel Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input11 +[ 14.121403] input: HDA Intel Dock Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input10 +[ 14.121491] input: HDA Intel Dock Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input9 +[ 14.121572] input: HDA Intel Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input8 +[ 14.141178] device-mapper: multipath: version 1.6.0 loaded +[ 14.154949] kvm: disabled by bios +[ 14.165173] kvm: disabled by bios +[ 14.310307] mei_me 0000:00:03.0: irq 47 for MSI/MSI-X +[ 14.401058] cfg80211: Calling CRDA to update world regulatory domain +[ 14.440429] Intel(R) Wireless WiFi driver for Linux, in-tree: +[ 14.440433] Copyright(c) 2003-2013 Intel Corporation +[ 14.440762] iwlwifi 0000:03:00.0: can't disable ASPM; OS doesn't have ASPM control +[ 14.440834] iwlwifi 0000:03:00.0: irq 48 for MSI/MSI-X +[ 14.441053] 0000:03:00.0: Missing Free firmware +[ 14.441095] iwlwifi 0000:03:00.0: Couldn't request the fw +[ 14.442753] iwlwifi: probe of 0000:03:00.0 failed with error -22 +[ 14.514047] pci 0000:03:00.0: Direct firmware load failed with error -2 +[ 14.514052] pci 0000:03:00.0: Falling back to user helper +[ 14.519440] type=1400 audit(1440917350.154:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/sbin/dhclient" pid=569 comm="apparmor_parser" +[ 14.519450] type=1400 audit(1440917350.154:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=569 comm="apparmor_parser" +[ 14.519457] type=1400 audit(1440917350.154:4): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=569 comm="apparmor_parser" +[ 14.520174] systemd-udevd[425]: renamed network interface eth0 to eth4 +[ 14.520232] type=1400 audit(1440917350.155:5): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=569 comm="apparmor_parser" +[ 14.520241] type=1400 audit(1440917350.155:6): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=569 comm="apparmor_parser" +[ 14.520582] type=1400 audit(1440917350.155:7): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=569 comm="apparmor_parser" +[ 15.055767] SGI XFS with ACLs, security attributes, realtime, large block/inode numbers, no debug enabled +[ 15.119824] XFS (sda6): Mounting Filesystem +[ 15.569603] XFS (sda6): Ending clean mount +[ 15.844338] init: failsafe main process (725) killed by TERM signal +[ 16.170233] type=1400 audit(1440917351.805:8): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/sbin/dhclient" pid=831 comm="apparmor_parser" +[ 16.170245] type=1400 audit(1440917351.805:9): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=831 comm="apparmor_parser" +[ 16.170252] type=1400 audit(1440917351.805:10): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=831 comm="apparmor_parser" +[ 16.170906] type=1400 audit(1440917351.805:11): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=831 comm="apparmor_parser" +[ 16.548278] Bluetooth: RFCOMM TTY layer initialized +[ 16.548295] Bluetooth: RFCOMM socket layer initialized +[ 16.548303] Bluetooth: RFCOMM ver 1.11 +[ 16.702630] init: cups main process (887) killed by HUP signal +[ 16.702645] init: cups main process ended, respawning +[ 16.717535] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 +[ 16.717540] Bluetooth: BNEP filters: protocol multicast +[ 16.717552] Bluetooth: BNEP socket layer initialized +[ 18.798586] init: plymouth-upstart-bridge main process ended, respawning +[ 19.246364] e1000e 0000:00:19.0: irq 43 for MSI/MSI-X +[ 19.347188] e1000e 0000:00:19.0: irq 43 for MSI/MSI-X +[ 19.347386] IPv6: ADDRCONF(NETDEV_UP): eth4: link is not ready +[ 19.347784] IPv6: ADDRCONF(NETDEV_UP): eth4: link is not ready +[ 22.755913] e1000e: eth4 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx +[ 22.756058] IPv6: ADDRCONF(NETDEV_CHANGE): eth4: link becomes ready +[ 46.558282] audit_printk_skb: 96 callbacks suppressed +[ 46.558287] type=1400 audit(1440913378.392:44): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/lib/cups/backend/cups-pdf" pid=2159 comm="apparmor_parser" +[ 46.558298] type=1400 audit(1440913378.392:45): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=2159 comm="apparmor_parser" +[ 46.558959] type=1400 audit(1440913378.392:46): apparmor="STATUS" operation="profile_replace" profile="unconfined" name="/usr/sbin/cupsd" pid=2159 comm="apparmor_parser" diff --git a/docs/hcl/hwdumps/x200/dmidecode.err.log b/docs/hcl/hwdumps/x200/dmidecode.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/dmidecode.err.log diff --git a/docs/hcl/hwdumps/x200/dmidecode.log b/docs/hcl/hwdumps/x200/dmidecode.log new file mode 100644 index 00000000..a5a19616 --- /dev/null +++ b/docs/hcl/hwdumps/x200/dmidecode.log @@ -0,0 +1,587 @@ +# dmidecode 2.12 +SMBIOS 2.4 present. +68 structures occupying 2464 bytes. +Table at 0x000E0010. + +Handle 0x0000, DMI type 0, 24 bytes +BIOS Information + Vendor: LENOVO + Version: 6DET65WW (3.15 ) + Release Date: 08/24/2010 + Address: 0xE0000 + Runtime Size: 128 kB + ROM Size: 8192 kB + Characteristics: + PCI is supported + PC Card (PCMCIA) is supported + PNP is supported + BIOS is upgradeable + BIOS shadowing is allowed + ESCD support is available + Boot from CD is supported + Selectable boot is supported + BIOS ROM is socketed + EDD is supported + ACPI is supported + USB legacy is supported + BIOS boot specification is supported + Targeted content distribution is supported + BIOS Revision: 3.21 + Firmware Revision: 1.6 + +Handle 0x0001, DMI type 1, 27 bytes +System Information + Manufacturer: LENOVO + Product Name: 7459GW4 + Version: ThinkPad X200 + Serial Number: L3AAR0B + UUID: 93861E01-4A15-11CB-8F2C-D4BC407E0839 + Wake-up Type: Power Switch + SKU Number: Not Specified + Family: ThinkPad X200 + +Handle 0x0002, DMI type 2, 8 bytes +Base Board Information + Manufacturer: LENOVO + Product Name: 7459GW4 + Version: Not Available + Serial Number: 1ZFDS89N4DD + +Handle 0x0003, DMI type 3, 13 bytes +Chassis Information + Manufacturer: LENOVO + Type: Notebook + Lock: Not Present + Version: Not Available + Serial Number: Not Available + Asset Tag: 1S7459GW4L3AAR0B + Boot-up State: Unknown + Power Supply State: Unknown + Thermal State: Unknown + Security Status: Unknown + +Handle 0x0004, DMI type 126, 13 bytes +Inactive + +Handle 0x0005, DMI type 126, 13 bytes +Inactive + +Handle 0x0006, DMI type 4, 35 bytes +Processor Information + Socket Designation: None + Type: Central Processor + Family: Other + Manufacturer: GenuineIntel + ID: 76 06 01 00 FF FB EB BF + Signature: Type 0, Family 6, Model 23, Stepping 6 + Flags: + FPU (Floating-point unit on-chip) + VME (Virtual mode extension) + DE (Debugging extension) + PSE (Page size extension) + TSC (Time stamp counter) + MSR (Model specific registers) + PAE (Physical address extension) + MCE (Machine check exception) + CX8 (CMPXCHG8 instruction supported) + APIC (On-chip APIC hardware supported) + SEP (Fast system call) + MTRR (Memory type range registers) + PGE (Page global enable) + MCA (Machine check architecture) + CMOV (Conditional move instruction supported) + PAT (Page attribute table) + PSE-36 (36-bit page size extension) + CLFSH (CLFLUSH instruction supported) + DS (Debug store) + ACPI (ACPI supported) + MMX (MMX technology supported) + FXSR (FXSAVE and FXSTOR instructions supported) + SSE (Streaming SIMD extensions) + SSE2 (Streaming SIMD extensions 2) + SS (Self-snoop) + HTT (Multi-threading) + TM (Thermal monitor supported) + PBE (Pending break enabled) + Version: Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz + Voltage: 1.2 V + External Clock: 266 MHz + Max Speed: 2400 MHz + Current Speed: 2400 MHz + Status: Populated, Enabled + Upgrade: None + L1 Cache Handle: 0x000A + L2 Cache Handle: 0x000C + L3 Cache Handle: Not Provided + Serial Number: Not Specified + Asset Tag: Not Specified + Part Number: Not Specified + +Handle 0x0007, DMI type 5, 20 bytes +Memory Controller Information + Error Detecting Method: None + Error Correcting Capabilities: + None + Supported Interleave: One-way Interleave + Current Interleave: One-way Interleave + Maximum Memory Module Size: 4096 MB + Maximum Total Memory Size: 8192 MB + Supported Speeds: + Other + Supported Memory Types: + DIMM + SDRAM + Memory Module Voltage: 2.9 V + Associated Memory Slots: 2 + 0x0008 + 0x0009 + Enabled Error Correcting Capabilities: + Unknown + +Handle 0x0008, DMI type 6, 12 bytes +Memory Module Information + Socket Designation: DIMM Slot 1 + Bank Connections: 0 1 + Current Speed: 42 ns + Type: DIMM SDRAM + Installed Size: 2048 MB (Double-bank Connection) + Enabled Size: 2048 MB (Double-bank Connection) + Error Status: OK + +Handle 0x0009, DMI type 6, 12 bytes +Memory Module Information + Socket Designation: DIMM Slot 2 + Bank Connections: 2 3 + Current Speed: 42 ns + Type: DIMM SDRAM + Installed Size: Not Installed + Enabled Size: Not Installed + Error Status: OK + +Handle 0x000A, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L1 Cache + Configuration: Enabled, Socketed, Level 1 + Operational Mode: Write Back + Location: Internal + Installed Size: 64 kB + Maximum Size: 64 kB + Supported SRAM Types: + Synchronous + Installed SRAM Type: Synchronous + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Instruction + Associativity: 8-way Set-associative + +Handle 0x000B, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L1 Cache + Configuration: Enabled, Socketed, Level 1 + Operational Mode: Write Back + Location: Internal + Installed Size: 64 kB + Maximum Size: 64 kB + Supported SRAM Types: + Synchronous + Installed SRAM Type: Synchronous + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Data + Associativity: 8-way Set-associative + +Handle 0x000C, DMI type 7, 19 bytes +Cache Information + Socket Designation: Internal L2 Cache + Configuration: Enabled, Socketed, Level 2 + Operational Mode: Write Back + Location: Internal + Installed Size: 3072 kB + Maximum Size: 3072 kB + Supported SRAM Types: + Burst + Installed SRAM Type: Burst + Speed: Unknown + Error Correction Type: Single-bit ECC + System Type: Unified + Associativity: 8-way Set-associative + +Handle 0x000D, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: External Monitor + External Connector Type: DB-15 female + Port Type: Video Port + +Handle 0x000E, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Microphone Jack + External Connector Type: Mini Jack (headphones) + Port Type: Audio Port + +Handle 0x000F, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Headphone Jack + External Connector Type: Mini Jack (headphones) + Port Type: Audio Port + +Handle 0x0010, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Modem + External Connector Type: RJ-11 + Port Type: Modem Port + +Handle 0x0011, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: Ethernet + External Connector Type: RJ-45 + Port Type: Network Port + +Handle 0x0012, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 1 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0013, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 2 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0014, DMI type 8, 9 bytes +Port Connector Information + Internal Reference Designator: Not Available + Internal Connector Type: None + External Reference Designator: USB 3 + External Connector Type: Access Bus (USB) + Port Type: USB + +Handle 0x0015, DMI type 126, 9 bytes +Inactive + +Handle 0x0016, DMI type 126, 9 bytes +Inactive + +Handle 0x0017, DMI type 126, 9 bytes +Inactive + +Handle 0x0018, DMI type 126, 9 bytes +Inactive + +Handle 0x0019, DMI type 126, 9 bytes +Inactive + +Handle 0x001A, DMI type 126, 9 bytes +Inactive + +Handle 0x001B, DMI type 126, 13 bytes +Inactive + +Handle 0x001C, DMI type 10, 6 bytes +On Board Device Information + Type: Other + Status: Disabled + Description: IBM Embedded Security hardware + +Handle 0x001D, DMI type 11, 5 bytes +OEM Strings + String 1: IBM ThinkPad Embedded Controller -[7XHT24WW-1.06 ]- + +Handle 0x001E, DMI type 13, 22 bytes +BIOS Language Information + Language Description Format: Abbreviated + Installable Languages: 1 + enUS + Currently Installed Language: enUS + +Handle 0x001F, DMI type 15, 25 bytes +System Event Log + Area Length: 0 bytes + Header Start Offset: 0x0000 + Header Length: 16 bytes + Data Start Offset: 0x0010 + Access Method: General-purpose non-volatile data functions + Access Address: 0x0000 + Status: Valid, Not Full + Change Token: 0x000000FC + Header Format: Type 1 + Supported Log Type Descriptors: 1 + Descriptor 1: POST error + Data Format 1: POST results bitmap + +Handle 0x0020, DMI type 16, 15 bytes +Physical Memory Array + Location: System Board Or Motherboard + Use: System Memory + Error Correction Type: None + Maximum Capacity: 4 GB + Error Information Handle: Not Provided + Number Of Devices: 2 + +Handle 0x0021, DMI type 17, 27 bytes +Memory Device + Array Handle: 0x0020 + Error Information Handle: No Error + Total Width: 64 bits + Data Width: 64 bits + Size: 2048 MB + Form Factor: SODIMM + Set: None + Locator: DIMM 1 + Bank Locator: Bank 0/1 + Type: DDR3 + Type Detail: Synchronous + Speed: 1066 MHz + Manufacturer: 02FE + Serial Number: F4BB7CA2 + Asset Tag: 0839 + Part Number: EBJ21UE8BASA-AE-E + +Handle 0x0022, DMI type 17, 27 bytes +Memory Device + Array Handle: 0x0020 + Error Information Handle: No Error + Total Width: Unknown + Data Width: Unknown + Size: No Module Installed + Form Factor: SODIMM + Set: None + Locator: DIMM 2 + Bank Locator: Bank 2/3 + Type: DDR2 + Type Detail: Synchronous + Speed: 1066 MHz + Manufacturer: + Serial Number: + Asset Tag: + Part Number: + +Handle 0x0023, DMI type 18, 23 bytes +32-bit Memory Error Information + Type: OK + Granularity: Unknown + Operation: Unknown + Vendor Syndrome: Unknown + Memory Array Address: Unknown + Device Address: Unknown + Resolution: Unknown + +Handle 0x0024, DMI type 19, 15 bytes +Memory Array Mapped Address + Starting Address: 0x00000000000 + Ending Address: 0x0007FFFFFFF + Range Size: 2 GB + Physical Array Handle: 0x0020 + Partition Width: 2 + +Handle 0x0025, DMI type 20, 19 bytes +Memory Device Mapped Address + Starting Address: 0x00000000000 + Ending Address: 0x0007FFFFFFF + Range Size: 2 GB + Physical Device Handle: 0x0021 + Memory Array Mapped Address Handle: 0x0024 + Partition Row Position: 1 + +Handle 0x0026, DMI type 20, 19 bytes +Memory Device Mapped Address + Starting Address: 0x0007FFFFC00 + Ending Address: 0x0007FFFFFFF + Range Size: 1 kB + Physical Device Handle: 0x0022 + Memory Array Mapped Address Handle: 0x0024 + Partition Row Position: 1 + +Handle 0x0027, DMI type 21, 7 bytes +Built-in Pointing Device + Type: Track Point + Interface: PS/2 + Buttons: 3 + +Handle 0x0028, DMI type 126, 26 bytes +Inactive + +Handle 0x0029, DMI type 126, 26 bytes +Inactive + +Handle 0x002A, DMI type 24, 5 bytes +Hardware Security + Power-On Password Status: Disabled + Keyboard Password Status: Disabled + Administrator Password Status: Disabled + Front Panel Reset Status: Unknown + +Handle 0x002B, DMI type 32, 11 bytes +System Boot Information + Status: No errors detected + +Handle 0x002C, DMI type 131, 17 bytes +OEM-specific Type + Header and Data: + 83 11 2C 00 01 02 03 FF FF 1F 00 00 00 00 00 02 + 00 + Strings: + BOOTINF 20h + BOOTDEV 21h + KEYPTRS 23h + +Handle 0x002D, DMI type 131, 22 bytes +OEM-specific Type + Header and Data: + 83 16 2D 00 01 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 01 + Strings: + TVT-Enablement + +Handle 0x002E, DMI type 132, 7 bytes +OEM-specific Type + Header and Data: + 84 07 2E 00 02 D8 36 + +Handle 0x002F, DMI type 133, 5 bytes +OEM-specific Type + Header and Data: + 85 05 2F 00 01 + Strings: + KHOIHGIUCCHHII + +Handle 0x0030, DMI type 134, 13 bytes +OEM-specific Type + Header and Data: + 86 0D 30 00 30 10 08 20 00 00 00 00 00 + +Handle 0x0031, DMI type 134, 16 bytes +OEM-specific Type + Header and Data: + 86 10 31 00 00 49 4E 54 43 01 01 00 00 02 01 02 + Strings: + TPM INFO + System Reserved + +Handle 0x0032, DMI type 135, 13 bytes +OEM-specific Type + Header and Data: + 87 0D 32 00 54 50 07 00 01 00 00 00 00 + +Handle 0x0033, DMI type 135, 18 bytes +OEM-specific Type + Header and Data: + 87 12 33 00 54 50 07 01 01 B9 05 00 00 00 00 00 + 00 00 + +Handle 0x0034, DMI type 135, 35 bytes +OEM-specific Type + Header and Data: + 87 23 34 00 54 50 07 02 42 41 59 20 49 2F 4F 20 + 01 00 02 00 00 0B 00 48 1C 3E 18 02 00 0B 00 40 + 1C 3A 18 + +Handle 0x0035, DMI type 135, 34 bytes +OEM-specific Type + Header and Data: + 87 22 35 00 54 50 07 04 01 06 01 01 02 00 02 01 + 02 00 03 01 02 00 04 01 02 00 05 01 02 00 06 01 + 02 00 + +Handle 0x0036, DMI type 135, 10 bytes +OEM-specific Type + Header and Data: + 87 0A 36 00 54 50 07 03 01 0A + +Handle 0x0037, DMI type 136, 6 bytes +OEM-specific Type + Header and Data: + 88 06 37 00 5A 5A + +Handle 0x0038, DMI type 126, 28 bytes +Inactive + +Handle 0x0039, DMI type 138, 40 bytes +OEM-specific Type + Header and Data: + 8A 28 39 00 14 01 02 01 40 02 01 40 02 01 40 02 + 01 40 01 40 42 49 4F 53 20 50 61 73 73 77 6F 72 + 64 20 46 6F 72 6D 61 74 + +Handle 0x003A, DMI type 139, 37 bytes +OEM-specific Type + Header and Data: + 8B 25 3A 00 11 01 0A 00 00 00 00 00 00 00 00 00 + 00 50 57 4D 53 20 4B 65 79 20 49 6E 66 6F 72 6D + 61 74 69 6F 6E + +Handle 0x003B, DMI type 140, 67 bytes +OEM-specific Type + Header and Data: + 8C 43 3B 00 4C 45 4E 4F 56 4F 0B 00 01 9A 13 CD + C4 7A 2A 8E 76 C3 C4 4E B9 B1 DD 4E 7C 01 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 + +Handle 0x003C, DMI type 140, 47 bytes +OEM-specific Type + Header and Data: + 8C 2F 3C 00 4C 45 4E 4F 56 4F 0B 01 01 08 00 BF + DA 3C 04 5C 72 D9 7D 0D 79 DE 46 98 23 10 B1 00 + 00 00 00 10 00 10 00 10 01 D0 00 20 01 00 01 + +Handle 0x003D, DMI type 140, 63 bytes +OEM-specific Type + Header and Data: + 8C 3F 3D 00 4C 45 4E 4F 56 4F 0B 02 01 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +Handle 0x003E, DMI type 140, 17 bytes +OEM-specific Type + Header and Data: + 8C 11 3E 00 4C 45 4E 4F 56 4F 0B 03 01 00 00 00 + 00 + +Handle 0x003F, DMI type 140, 19 bytes +OEM-specific Type + Header and Data: + 8C 13 3F 00 4C 45 4E 4F 56 4F 0B 04 01 B2 00 53 + 4D 20 00 + +Handle 0x0040, DMI type 129, 8 bytes +OEM-specific Type + Header and Data: + 81 08 40 00 01 01 02 01 + Strings: + Intel_ASF + Intel_ASF_001 + +Handle 0x0041, DMI type 130, 20 bytes +OEM-specific Type + Header and Data: + 82 14 41 00 24 41 4D 54 01 01 01 01 01 A5 0B 04 + 00 00 00 00 + +Handle 0x0042, DMI type 131, 64 bytes +OEM-specific Type + Header and Data: + 83 40 42 00 14 00 00 00 00 00 40 2A 00 00 00 00 + F8 00 17 29 00 00 00 00 2D 00 00 00 00 00 04 00 + 64 04 03 00 01 00 01 15 C8 00 F5 10 00 00 00 00 + 00 00 00 00 07 00 00 00 76 50 72 6F 00 00 00 00 + +Handle 0x0043, DMI type 127, 4 bytes +End Of Table + diff --git a/docs/hcl/hwdumps/x200/ectool.err.log b/docs/hcl/hwdumps/x200/ectool.err.log new file mode 100644 index 00000000..452503e5 --- /dev/null +++ b/docs/hcl/hwdumps/x200/ectool.err.log @@ -0,0 +1 @@ +bash: ectool: command not found diff --git a/docs/hcl/hwdumps/x200/ectool.log b/docs/hcl/hwdumps/x200/ectool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/ectool.log diff --git a/docs/hcl/hwdumps/x200/flashrom_info.err.log b/docs/hcl/hwdumps/x200/flashrom_info.err.log new file mode 100644 index 00000000..933ac573 --- /dev/null +++ b/docs/hcl/hwdumps/x200/flashrom_info.err.log @@ -0,0 +1,14 @@ +======================================================================== +WARNING! You seem to be running flashrom on an unsupported laptop. +Laptops, notebooks and netbooks are difficult to support and we +recommend to use the vendor flashing utility. The embedded controller +(EC) in these machines often interacts badly with flashing. +See http://www.flashrom.org/Laptops for details. + +If flash is shared with the EC, erase is guaranteed to brick your laptop +and write may brick your laptop. +Read and probe may irritate your EC and cause fan failure, backlight +failure and sudden poweroff. +You have been warned. +======================================================================== +Proceeding anyway because user forced us to. diff --git a/docs/hcl/hwdumps/x200/flashrom_info.log b/docs/hcl/hwdumps/x200/flashrom_info.log new file mode 100644 index 00000000..d9a82f8b --- /dev/null +++ b/docs/hcl/hwdumps/x200/flashrom_info.log @@ -0,0 +1,289 @@ +flashrom v0.9.6.1-r1563 on Linux 3.13.0-39-lowlatency (x86_64) +flashrom is free software, get the source code at http://www.flashrom.org + +flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian +Command line (3 args): flashrom -V -p internal:laptop=force_I_want_a_brick +Calibrating delay loop... OS timer resolution is 1 usecs, 1578M loops per second, 10 myus = 11 us, 100 myus = 114 us, 1000 myus = 1002 us, 10000 myus = 10004 us, 4 myus = 5 us, OK. +Initializing internal programmer +No coreboot table found. +DMI string system-manufacturer: "LENOVO" +DMI string system-product-name: "7459GW4" +DMI string system-version: "ThinkPad X200" +DMI string baseboard-manufacturer: "LENOVO" +DMI string baseboard-product-name: "7459GW4" +DMI string baseboard-version: "Not Available" +DMI string chassis-type: "Notebook" +Laptop detected via DMI. +Found chipset "Intel ICH9M-E" with PCI ID 8086:2917. Enabling flash write... +0xfff80000/0xffb80000 FWH IDSEL: 0x0 +0xfff00000/0xffb00000 FWH IDSEL: 0x0 +0xffe80000/0xffa80000 FWH IDSEL: 0x0 +0xffe00000/0xffa00000 FWH IDSEL: 0x0 +0xffd80000/0xff980000 FWH IDSEL: 0x0 +0xffd00000/0xff900000 FWH IDSEL: 0x0 +0xffc80000/0xff880000 FWH IDSEL: 0x0 +0xffc00000/0xff800000 FWH IDSEL: 0x0 +0xff700000/0xff300000 FWH IDSEL: 0x4 +0xff600000/0xff200000 FWH IDSEL: 0x5 +0xff500000/0xff100000 FWH IDSEL: 0x6 +0xff400000/0xff000000 FWH IDSEL: 0x7 +0xfff80000/0xffb80000 FWH decode enabled +0xfff00000/0xffb00000 FWH decode enabled +0xffe80000/0xffa80000 FWH decode enabled +0xffe00000/0xffa00000 FWH decode enabled +0xffd80000/0xff980000 FWH decode enabled +0xffd00000/0xff900000 FWH decode enabled +0xffc80000/0xff880000 FWH decode enabled +0xffc00000/0xff800000 FWH decode enabled +0xff700000/0xff300000 FWH decode disabled +0xff600000/0xff200000 FWH decode disabled +0xff500000/0xff100000 FWH decode disabled +0xff400000/0xff000000 FWH decode disabled +Maximum FWH chip size: 0x400000 bytes +BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 +Root Complex Register Block address = 0xfed1c000 +GCS = 0x7b0461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI) +Top Swap : not enabled +SPIBAR = 0xfed1c000 + 0x3800 +0x04: 0xe008 (HSFS) +HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 +WARNING: SPI Configuration Lockdown activated. +Reading OPCODES... done +0x06: 0x3f04 (HSFC) +HSFC: FGO=0, FCYCLE=2, FDBC=63, SME=0 +0x08: 0x00001000 (FADDR) +0x50: 0x00001a1b (FRAP) +BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b +0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. +0x58: 0x07ff0600 FREG1: BIOS region (0x00600000-0x007fffff) is read-write. +0x5C: 0x05f50001 FREG2: WARNING: Management Engine region (0x00001000-0x005f5fff) is locked. +0x60: 0x05f705f6 FREG3: Gigabit Ethernet region (0x005f6000-0x005f7fff) is read-write. +0x64: 0x05ff05f8 FREG4: Platform Data region (0x005f8000-0x005fffff) is read-write. +0x74: 0x9fff07e0 PR0: WARNING: 0x007e0000-0x01ffffff is read-only. +0x84: 0x85ff85f8 PR4: WARNING: 0x005f8000-0x005fffff is locked. +Please send a verbose log to flashrom@flashrom.org if this board is not listed on +http://flashrom.org/Supported_hardware#Supported_mainboards yet. +Writes have been disabled. You can enforce write support with the +ich_spi_force programmer option, but it will most likely harm your hardware! +If you force flashrom you will get no support if something breaks. +0x90: 0x04 (SSFS) +SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 +0x91: 0x000000 (SSFC) +SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0 +0x94: 0x5006 (PREOP) +0x96: 0x143b (OPTYPE) +0x98: 0x05200302 (OPMENU) +0x9C: 0x0601209f (OPMENU+4) +0xA0: 0x00000000 (BBAR) +0xC4: 0x00002005 (LVSCC) +LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xC8: 0x00002005 (UVSCC) +UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xD0: 0x00000000 (FPB) + +SPI Read Configuration: prefetching disabled, caching enabled, OK. +The following protocols are supported: FWH, SPI. +Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Chip status register is 00 +Chip status register: Status Register Write Disable (SRWD) is not set +Chip status register: Bit 6 is not set +Chip status register: Block Protect 3 (BP3) is not set +Chip status register: Block Protect 2 (BP2) is not set +Chip status register: Block Protect 1 (BP1) is not set +Chip status register: Block Protect 0 (BP0) is not set +Chip status register: Write Enable Latch (WEL) is not set +Chip status register: Write In Progress (WIP/BUSY) is not set +Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000. +Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. +Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute. +Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. +Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. +Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. +Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not execute. +Receiving SFDP signature failed. +Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. +Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x0a, id2 0xce, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Found Macronix flash chip "MX25L6405" (8192 kB, SPI). +No operations were specified. +Restoring MMIO space at 0x7f9c951da8a0 +Restoring PCI config space for 00:1f:0 reg 0xdc diff --git a/docs/hcl/hwdumps/x200/flashrom_read.err.log b/docs/hcl/hwdumps/x200/flashrom_read.err.log new file mode 100644 index 00000000..0a7925d7 --- /dev/null +++ b/docs/hcl/hwdumps/x200/flashrom_read.err.log @@ -0,0 +1,16 @@ +======================================================================== +WARNING! You seem to be running flashrom on an unsupported laptop. +Laptops, notebooks and netbooks are difficult to support and we +recommend to use the vendor flashing utility. The embedded controller +(EC) in these machines often interacts badly with flashing. +See http://www.flashrom.org/Laptops for details. + +If flash is shared with the EC, erase is guaranteed to brick your laptop +and write may brick your laptop. +Read and probe may irritate your EC and cause fan failure, backlight +failure and sudden poweroff. +You have been warned. +======================================================================== +Proceeding anyway because user forced us to. +Transaction error! +Read operation failed! diff --git a/docs/hcl/hwdumps/x200/flashrom_read.log b/docs/hcl/hwdumps/x200/flashrom_read.log new file mode 100644 index 00000000..0c78c81c --- /dev/null +++ b/docs/hcl/hwdumps/x200/flashrom_read.log @@ -0,0 +1,292 @@ +flashrom v0.9.6.1-r1563 on Linux 3.13.0-39-lowlatency (x86_64) +flashrom is free software, get the source code at http://www.flashrom.org + +flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian +Command line (5 args): flashrom -V -p internal:laptop=force_I_want_a_brick -r rom.bin +Calibrating delay loop... OS timer resolution is 2 usecs, 1579M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1004 us, 10000 myus = 10014 us, 8 myus = 9 us, OK. +Initializing internal programmer +No coreboot table found. +DMI string system-manufacturer: "LENOVO" +DMI string system-product-name: "7459GW4" +DMI string system-version: "ThinkPad X200" +DMI string baseboard-manufacturer: "LENOVO" +DMI string baseboard-product-name: "7459GW4" +DMI string baseboard-version: "Not Available" +DMI string chassis-type: "Notebook" +Laptop detected via DMI. +Found chipset "Intel ICH9M-E" with PCI ID 8086:2917. Enabling flash write... +0xfff80000/0xffb80000 FWH IDSEL: 0x0 +0xfff00000/0xffb00000 FWH IDSEL: 0x0 +0xffe80000/0xffa80000 FWH IDSEL: 0x0 +0xffe00000/0xffa00000 FWH IDSEL: 0x0 +0xffd80000/0xff980000 FWH IDSEL: 0x0 +0xffd00000/0xff900000 FWH IDSEL: 0x0 +0xffc80000/0xff880000 FWH IDSEL: 0x0 +0xffc00000/0xff800000 FWH IDSEL: 0x0 +0xff700000/0xff300000 FWH IDSEL: 0x4 +0xff600000/0xff200000 FWH IDSEL: 0x5 +0xff500000/0xff100000 FWH IDSEL: 0x6 +0xff400000/0xff000000 FWH IDSEL: 0x7 +0xfff80000/0xffb80000 FWH decode enabled +0xfff00000/0xffb00000 FWH decode enabled +0xffe80000/0xffa80000 FWH decode enabled +0xffe00000/0xffa00000 FWH decode enabled +0xffd80000/0xff980000 FWH decode enabled +0xffd00000/0xff900000 FWH decode enabled +0xffc80000/0xff880000 FWH decode enabled +0xffc00000/0xff800000 FWH decode enabled +0xff700000/0xff300000 FWH decode disabled +0xff600000/0xff200000 FWH decode disabled +0xff500000/0xff100000 FWH decode disabled +0xff400000/0xff000000 FWH decode disabled +Maximum FWH chip size: 0x400000 bytes +BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 +Root Complex Register Block address = 0xfed1c000 +GCS = 0x7b0461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI) +Top Swap : not enabled +SPIBAR = 0xfed1c000 + 0x3800 +0x04: 0xe008 (HSFS) +HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 +WARNING: SPI Configuration Lockdown activated. +Reading OPCODES... done +0x06: 0x3f04 (HSFC) +HSFC: FGO=0, FCYCLE=2, FDBC=63, SME=0 +0x08: 0x00000000 (FADDR) +0x50: 0x00001a1b (FRAP) +BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b +0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. +0x58: 0x07ff0600 FREG1: BIOS region (0x00600000-0x007fffff) is read-write. +0x5C: 0x05f50001 FREG2: WARNING: Management Engine region (0x00001000-0x005f5fff) is locked. +0x60: 0x05f705f6 FREG3: Gigabit Ethernet region (0x005f6000-0x005f7fff) is read-write. +0x64: 0x05ff05f8 FREG4: Platform Data region (0x005f8000-0x005fffff) is read-write. +0x74: 0x9fff07e0 PR0: WARNING: 0x007e0000-0x01ffffff is read-only. +0x84: 0x85ff85f8 PR4: WARNING: 0x005f8000-0x005fffff is locked. +Please send a verbose log to flashrom@flashrom.org if this board is not listed on +http://flashrom.org/Supported_hardware#Supported_mainboards yet. +Writes have been disabled. You can enforce write support with the +ich_spi_force programmer option, but it will most likely harm your hardware! +If you force flashrom you will get no support if something breaks. +0x90: 0x04 (SSFS) +SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 +0x91: 0x004240 (SSFC) +SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=2, SME=0, SCF=0 +0x94: 0x5006 (PREOP) +0x96: 0x143b (OPTYPE) +0x98: 0x05200302 (OPMENU) +0x9C: 0x0601209f (OPMENU+4) +0xA0: 0x00000000 (BBAR) +0xC4: 0x00002005 (LVSCC) +LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xC8: 0x00002005 (UVSCC) +UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 +0xD0: 0x00000000 (FPB) + +SPI Read Configuration: prefetching disabled, caching enabled, OK. +The following protocols are supported: FWH, SPI. +Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Chip status register is 00 +Chip status register: Status Register Write Disable (SRWD) is not set +Chip status register: Bit 6 is not set +Chip status register: Block Protect 3 (BP3) is not set +Chip status register: Block Protect 2 (BP2) is not set +Chip status register: Block Protect 1 (BP1) is not set +Chip status register: Block Protect 0 (BP0) is not set +Chip status register: Write Enable Latch (WEL) is not set +Chip status register: Write In Progress (WIP/BUSY) is not set +Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000. +Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. +Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute. +Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. +Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. +Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. +Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. +Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not execute. +Receiving SFDP signature failed. +Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 +Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. +Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x0a, id2 0xce, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xba, id2 0x8e, id1 is normal flash content, id2 is normal flash content +Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x50, id2 0x09, id1 parity violation, id1 is normal flash content, id2 is normal flash content +Found Macronix flash chip "MX25L6405" (8192 kB, SPI). +Reading flash... SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 +SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 +Running OPCODE 0x03 failed at address 0x001000 (payload length was 64). +FAILED. +Restoring MMIO space at 0x7f53b721c8a0 +Restoring PCI config space for 00:1f:0 reg 0xdc diff --git a/docs/hcl/hwdumps/x200/input_bustypes.log b/docs/hcl/hwdumps/x200/input_bustypes.log new file mode 100644 index 00000000..ebce5d5b --- /dev/null +++ b/docs/hcl/hwdumps/x200/input_bustypes.log @@ -0,0 +1,11 @@ +0019 +0000 +0000 +0019 +0019 +0011 +0011 +0019 +0019 +0000 +0000 diff --git a/docs/hcl/hwdumps/x200/inteltool.err.log b/docs/hcl/hwdumps/x200/inteltool.err.log new file mode 100644 index 00000000..b192da99 --- /dev/null +++ b/docs/hcl/hwdumps/x200/inteltool.err.log @@ -0,0 +1 @@ +bash: inteltool: command not found diff --git a/docs/hcl/hwdumps/x200/inteltool.log b/docs/hcl/hwdumps/x200/inteltool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/inteltool.log diff --git a/docs/hcl/hwdumps/x200/ioports.err.log b/docs/hcl/hwdumps/x200/ioports.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/ioports.err.log diff --git a/docs/hcl/hwdumps/x200/ioports.log b/docs/hcl/hwdumps/x200/ioports.log new file mode 100644 index 00000000..54e3a06a --- /dev/null +++ b/docs/hcl/hwdumps/x200/ioports.log @@ -0,0 +1,60 @@ +0000-0cf7 : PCI Bus 0000:00 + 0000-001f : dma1 + 0020-0021 : pic1 + 0040-0043 : timer0 + 0050-0053 : timer1 + 0060-0060 : keyboard + 0062-0062 : EC data + 0064-0064 : keyboard + 0066-0066 : EC cmd + 0070-0071 : rtc0 + 0080-008f : dma page reg + 00a0-00a1 : pic2 + 00c0-00df : dma2 + 00f0-00ff : fpu + 03c0-03df : vga+ + 0800-080f : pnp 00:01 +0cf8-0cff : PCI conf1 +0d00-ffff : PCI Bus 0000:00 + 1000-1003 : ACPI PM1a_EVT_BLK + 1004-1005 : ACPI PM1a_CNT_BLK + 1008-100b : ACPI PM_TMR + 1010-1015 : ACPI CPU throttle + 1020-102f : ACPI GPE0_BLK + 1030-1033 : iTCO_wdt + 1050-1050 : ACPI PM2_CNT_BLK + 1060-107f : iTCO_wdt + 1180-11ff : pnp 00:01 + 15e0-15ef : pnp 00:01 + 1600-167f : pnp 00:01 + 1680-169f : pnp 00:01 + 1800-1807 : 0000:00:02.0 + 1830-1837 : 0000:00:03.3 + 1830-1837 : serial + 1838-183b : 0000:00:1f.2 + 1838-183b : ahci + 183c-183f : 0000:00:1f.2 + 183c-183f : ahci + 1840-185f : 0000:00:19.0 + 1860-187f : 0000:00:1a.0 + 1860-187f : uhci_hcd + 1880-189f : 0000:00:1a.1 + 1880-189f : uhci_hcd + 18a0-18bf : 0000:00:1a.2 + 18a0-18bf : uhci_hcd + 18c0-18df : 0000:00:1d.0 + 18c0-18df : uhci_hcd + 18e0-18ff : 0000:00:1d.1 + 18e0-18ff : uhci_hcd + 1c00-1c1f : 0000:00:1d.2 + 1c00-1c1f : uhci_hcd + 1c20-1c3f : 0000:00:1f.2 + 1c20-1c3f : ahci + 1c40-1c47 : 0000:00:1f.2 + 1c40-1c47 : ahci + 1c48-1c4f : 0000:00:1f.2 + 1c48-1c4f : ahci + 1c60-1c7f : 0000:00:1f.3 + 2000-2fff : PCI Bus 0000:05 + 3000-3fff : PCI Bus 0000:02 + 4000-4fff : PCI Bus 0000:03 diff --git a/docs/hcl/hwdumps/x200/lspci.err.log b/docs/hcl/hwdumps/x200/lspci.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/lspci.err.log diff --git a/docs/hcl/hwdumps/x200/lspci.log b/docs/hcl/hwdumps/x200/lspci.log new file mode 100644 index 00000000..df6b6ccd --- /dev/null +++ b/docs/hcl/hwdumps/x200/lspci.log @@ -0,0 +1,2287 @@ +00:00.0 Host bridge [0600]: Intel Corporation Mobile 4 Series Chipset Memory Controller Hub [8086:2a40] (rev 07) + Subsystem: Lenovo Device [17aa:20e0] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0a <?> + Kernel driver in use: agpgart-intel +00: 86 80 40 2a 06 01 90 20 07 00 00 06 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e0 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 90 d1 fe 00 00 00 00 01 00 d1 fe 00 00 00 00 +50: 00 00 50 03 59 02 00 00 00 00 00 00 00 00 00 00 +60: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00 +70: 01 00 60 7c 00 00 00 00 01 10 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 10 11 11 01 30 11 11 00 ff 03 00 00 00 1a 3b 00 +a0: 10 00 f0 07 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 7c 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 91 02 00 00 +e0: 09 00 0a 11 88 64 00 1c 01 00 00 00 00 00 00 00 +f0: 01 00 00 00 00 00 00 00 a0 0f 07 00 00 00 00 00 +100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +200: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +210: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +220: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +230: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +240: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +250: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +260: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +270: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +280: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +290: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +2a0: 00 00 00 00 00 00 00 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00 00 00 00 00 00 00 00 00 +e40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ea0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +eb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ec0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ed0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ee0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ef0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller [8086:2a42] (rev 07) (prog-if 00 [VGA controller]) + Subsystem: Lenovo Device [17aa:20e4] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 45 + Region 0: Memory at f2000000 (64-bit, non-prefetchable) [size=4M] + Region 2: Memory at d0000000 (64-bit, prefetchable) [size=256M] + Region 4: I/O ports at 1800 [size=8] + Expansion ROM at <unassigned> [disabled] + Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 4152 + Capabilities: [d0] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Kernel driver in use: i915 +00: 86 80 42 2a 07 04 90 00 07 00 00 03 00 00 80 00 +10: 04 00 00 f2 00 00 00 00 0c 00 00 d0 00 00 00 00 +20: 01 18 00 00 00 00 00 00 00 00 00 00 aa 17 e4 20 +30: 00 00 00 00 90 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 48 00 00 00 09 00 0a 11 88 64 00 1c +50: 01 00 50 03 19 00 00 00 00 00 00 00 00 00 00 7a +60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 05 d0 01 00 0c 30 e0 fe 52 41 00 00 00 00 00 00 +a0: 00 00 00 00 09 00 06 20 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 40 01 00 00 +d0: 01 00 23 00 00 00 00 00 00 00 00 00 34 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 80 00 1a 41 20 00 00 +f0: 0d 1c 34 07 eb 00 00 00 a0 0f 07 00 ea b0 b6 79 + +00:02.1 Display controller [0380]: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller [8086:2a43] (rev 07) + Subsystem: Lenovo Device [17aa:20e4] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Region 0: Memory at f2400000 (64-bit, non-prefetchable) [size=1M] + Capabilities: [d0] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- +00: 86 80 43 2a 07 00 90 00 07 00 80 03 00 00 80 00 +10: 04 00 40 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e4 20 +30: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 +40: 00 00 00 00 48 00 00 00 09 00 0a 11 88 64 00 1c +50: 01 00 50 03 19 00 00 00 00 00 00 00 00 00 00 7a +60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 40 01 00 00 +d0: 01 00 23 00 00 00 00 00 00 00 00 00 34 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 0d 1c 34 07 eb 00 00 00 a0 0f 07 00 00 00 00 00 + +00:03.0 Communication controller [0780]: Intel Corporation Mobile 4 Series Chipset MEI Controller [8086:2a44] (rev 07) + Subsystem: Lenovo Device [17aa:20e6] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 47 + Region 0: Memory at f2826800 (64-bit, non-prefetchable) [size=16] + Capabilities: [50] Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4172 + Kernel driver in use: mei_me +00: 86 80 44 2a 06 04 10 00 07 00 80 07 00 00 80 00 +10: 04 68 82 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 e6 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 4a 0e 0a 30 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 8c 03 c8 08 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 05 00 81 00 +90: 0c 30 e0 fe 00 00 00 00 72 41 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:03.3 Serial controller [0700]: Intel Corporation Mobile 4 Series Chipset AMT SOL Redirection [8086:2a47] (rev 07) (prog-if 02 [16550]) + Subsystem: Lenovo Device [17aa:20ec] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 17 + Region 0: I/O ports at 1830 [size=8] + Region 1: Memory at f2624000 (32-bit, non-prefetchable) [size=4K] + Capabilities: [c8] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [d0] MSI: Enable- Count=1/1 Maskable- 64bit+ + Address: 0000000000000000 Data: 0000 + Kernel driver in use: serial +00: 86 80 47 2a 07 00 b0 00 07 02 00 07 00 00 00 00 +10: 31 18 00 00 00 40 62 f2 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 ec 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 23 00 08 00 00 00 +d0: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:19.0 Ethernet controller [0200]: Intel Corporation 82567LM Gigabit Network Connection [8086:10f5] (rev 03) + Subsystem: Lenovo Device [17aa:20ee] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 43 + Region 0: Memory at f2600000 (32-bit, non-prefetchable) [size=128K] + Region 1: Memory at f2625000 (32-bit, non-prefetchable) [size=4K] + Region 2: I/O ports at 1840 [size=32] + Capabilities: [c8] Power Management version 2 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- + Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 41a2 + Capabilities: [e0] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: e1000e +00: 86 80 f5 10 07 05 10 00 03 00 00 02 00 00 00 00 +10: 00 00 60 f2 00 50 62 f2 41 18 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 ee 20 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 01 d0 22 c8 00 20 00 0d +d0: 05 e0 81 00 0c 30 e0 fe 00 00 00 00 a2 41 00 00 +e0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1a.0 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #4 [8086:2937] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 20 + Region 4: I/O ports at 1860 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 37 29 05 00 90 02 03 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1a.1 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #5 [8086:2938] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 21 + Region 4: I/O ports at 1880 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 38 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 81 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1a.2 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #6 [8086:2939] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin C routed to IRQ 22 + Region 4: I/O ports at 18a0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 39 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: a1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1a.7 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #2 [8086:293c] (rev 03) (prog-if 20 [EHCI]) + Subsystem: Lenovo Device [17aa:20f1] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 23 + Region 0: Memory at f2826c00 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Capabilities: [98] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ehci-pci +00: 86 80 3c 29 06 01 90 02 03 20 03 0c 00 00 00 00 +10: 00 6c 82 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f1 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 +60: 20 20 ff 00 00 00 00 00 01 00 00 01 00 00 00 c0 +70: 40 00 9f 0f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 88 85 40 00 86 0f 03 00 06 17 02 20 + +00:1b.0 Audio device [0403]: Intel Corporation 82801I (ICH9 Family) HD Audio Controller [8086:293e] (rev 03) + Subsystem: Lenovo Device [17aa:20f2] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Interrupt: pin B routed to IRQ 46 + Region 0: Memory at f2620000 (64-bit, non-prefetchable) [size=16K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4162 + Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed- WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 + Status: NegoPending- InProgress- + Capabilities: [130 v1] Root Complex Link + Desc: PortNumber=0f ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: snd_hda_intel +00: 86 80 3e 29 06 05 10 00 03 00 03 04 10 00 00 00 +10: 04 00 62 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f2 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 01 00 00 07 00 00 00 00 00 00 00 00 00 80 00 00 +50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 +60: 05 70 81 00 0c 30 e0 fe 00 00 00 00 62 41 00 00 +70: 10 00 91 00 00 00 00 10 00 08 10 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 04 00 01 00 00 00 00 31 00 a3 02 00 00 00 00 +d0: 61 00 a3 02 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 +100: 02 00 01 13 01 00 00 00 00 00 00 00 00 00 00 00 +110: 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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.0 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 1 [8086:2940] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 + I/O behind bridge: 00003000-00003fff + Memory behind bridge: 7c000000-7c1fffff + Prefetchable memory behind bridge: 000000007c200000-000000007c3fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #0, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41c1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=01 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 40 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 02 02 00 30 30 00 00 +20: 00 7c 10 7c 21 7c 31 7c 00 00 00 00 00 00 00 00 +30: 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00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.1 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 2 [8086:2942] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 + I/O behind bridge: 00004000-00004fff + Memory behind bridge: f2500000-f25fffff + Prefetchable memory behind bridge: 000000007c400000-000000007c5fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #1, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- + Changed: MRL- PresDet- LinkState+ + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41d1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=02 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 42 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 03 03 00 40 40 00 00 +20: 50 f2 50 f2 41 7c 51 7c 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 02 04 00 +40: 10 80 41 01 00 80 00 00 00 00 10 00 11 2c 11 02 +50: 40 00 11 30 e0 a0 08 00 38 00 40 01 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 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00 00 00 00 +e60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ea0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +eb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ec0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ed0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ee0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ef0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1c.3 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 4 [8086:2946] (rev 03) (prog-if 00 [Normal decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0, Cache Line Size: 64 bytes + Bus: primary=00, secondary=05, subordinate=0c, sec-latency=0 + I/O behind bridge: 00002000-00002fff + Memory behind bridge: f0000000-f1ffffff + Prefetchable memory behind bridge: 00000000f2900000-00000000f29fffff + Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0 + ExtTag- RBE+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- + LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <4us + ClockPM- Surprise- LLActRep+ BwNot- + LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ + Slot #3, PowerLimit 6.500W; Interlock- NoCompl- + SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- + Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- + SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- + Changed: MRL- PresDet- LinkState- + RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- + RootCap: CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- + Address: fee0300c Data: 41e1 + Capabilities: [90] Subsystem: Lenovo Device [17aa:20f3] + Capabilities: [a0] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [100 v1] Virtual Channel + Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 + Arb: Fixed+ WRR32- WRR64- WRR128- + Ctrl: ArbSelect=Fixed + Status: InProgress- + VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- + Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- + Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 + Status: NegoPending- InProgress- + Capabilities: [180 v1] Root Complex Link + Desc: PortNumber=04 ComponentID=02 EltType=Config + Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ + Addr: 00000000fed1c000 + Kernel driver in use: pcieport +00: 86 80 46 29 07 05 10 00 03 00 04 06 10 00 81 00 +10: 00 00 00 00 00 00 00 00 00 05 0c 00 20 20 00 00 +20: 00 f0 f0 f1 91 f2 91 f2 00 00 00 00 00 00 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 04 04 00 +40: 10 80 41 01 00 80 00 00 00 00 10 00 11 4c 11 04 +50: 03 00 01 10 e0 a0 18 00 38 00 00 00 08 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 05 90 01 00 0c 30 e0 fe e1 41 00 00 00 00 00 00 +90: 0d a0 00 00 aa 17 f3 20 00 00 00 00 00 00 00 00 +a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 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+ea0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +eb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ec0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ed0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ee0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ef0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +00:1d.0 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 [8086:2934] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin A routed to IRQ 16 + Region 4: I/O ports at 18c0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 34 29 05 00 90 02 03 00 03 0c 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: c1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1d.1 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 [8086:2935] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 17 + Region 4: I/O ports at 18e0 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 35 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: e1 18 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1d.2 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 [8086:2936] (rev 03) (prog-if 00 [UHCI]) + Subsystem: Lenovo Device [17aa:20f0] + Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin C routed to IRQ 18 + Region 4: I/O ports at 1c00 [size=32] + Capabilities: [50] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: uhci_hcd +00: 86 80 36 29 05 00 90 02 03 00 03 0c 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 01 1c 00 00 00 00 00 00 00 00 00 00 aa 17 f0 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 03 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1d.7 USB controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 [8086:293a] (rev 03) (prog-if 20 [EHCI]) + Subsystem: Lenovo Device [17aa:20f1] + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin D routed to IRQ 19 + Region 0: Memory at f2827000 (32-bit, non-prefetchable) [size=1K] + Capabilities: [50] Power Management version 2 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [58] Debug port: BAR=1 offset=00a0 + Capabilities: [98] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ehci-pci +00: 86 80 3a 29 06 01 90 02 03 20 03 0c 00 00 00 00 +10: 00 70 82 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f1 20 +30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 +60: 20 20 9f 00 00 00 00 00 01 00 00 01 00 00 00 c0 +70: c0 00 1f 0f 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 88 85 40 00 86 0f 03 00 06 17 02 20 + +00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev 93) (prog-if 01 [Subtractive decode]) + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Bus: primary=00, secondary=0d, subordinate=0d, sec-latency=0 + I/O behind bridge: 0000f000-00000fff + Memory behind bridge: fff00000-000fffff + Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff + Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- + BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- + PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- + Capabilities: [50] Subsystem: Lenovo Device [17aa:20f4] +00: 86 80 48 24 07 01 10 00 93 01 04 06 00 00 01 00 +10: 00 00 00 00 00 00 00 00 00 0d 0d 00 f0 00 80 22 +20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 +30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 04 00 +40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 +50: 0d 00 00 00 aa 17 f4 20 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1f.0 ISA bridge [0601]: Intel Corporation ICH9M-E LPC Interface Controller [8086:2917] (rev 03) + Subsystem: Lenovo Device [17aa:20f5] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Capabilities: [e0] Vendor Specific Information: Len=0c <?> + Kernel driver in use: lpc_ich +00: 86 80 17 29 07 00 10 02 03 00 01 06 00 00 80 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 f5 20 +30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 +40: 01 10 00 00 80 00 00 00 81 11 00 00 10 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 8b 8b 8b 8b 90 00 00 00 8b 8b 8b 8b f8 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 10 00 0f 3f 01 16 7c 00 e1 15 0c 00 81 16 1c 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 24 0a 00 00 39 00 80 00 2b 1c 0a 00 00 03 00 c0 +b0: 00 00 f0 00 00 00 00 00 08 00 02 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 67 45 00 00 00 ff 00 00 00 00 00 00 +e0: 09 00 0c 10 00 02 c4 03 04 00 00 00 00 00 00 00 +f0: 01 c0 d1 fe 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1f.2 SATA controller [0106]: Intel Corporation 82801IBM/IEM (ICH9M/ICH9M-E) 4 port SATA Controller [AHCI mode] [8086:2929] (rev 03) (prog-if 01 [AHCI 1.0]) + Subsystem: Lenovo Device [17aa:20f8] + Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Latency: 0 + Interrupt: pin B routed to IRQ 44 + Region 0: I/O ports at 1c48 [size=8] + Region 1: I/O ports at 183c [size=4] + Region 2: I/O ports at 1c40 [size=8] + Region 3: I/O ports at 1838 [size=4] + Region 4: I/O ports at 1c20 [size=32] + Region 5: Memory at f2826000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit- + Address: fee0300c Data: 4142 + Capabilities: [70] Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004 + Capabilities: [b0] PCI Advanced Features + AFCap: TP+ FLR+ + AFCtrl: FLR- + AFStatus: TP- + Kernel driver in use: ahci +00: 86 80 29 29 07 04 b0 02 03 01 06 01 00 00 00 00 +10: 49 1c 00 00 3d 18 00 00 41 1c 00 00 39 18 00 00 +20: 21 1c 00 00 00 60 82 f2 00 00 00 00 aa 17 f8 20 +30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 +40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 +80: 05 70 09 00 0c 30 e0 fe 42 41 00 00 00 00 00 00 +90: 60 0c 03 81 93 01 00 4c 00 00 00 00 0c 00 00 00 +a0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00 +b0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +00:1f.3 SMBus [0c05]: Intel Corporation 82801I (ICH9 Family) SMBus Controller [8086:2930] (rev 03) + Subsystem: Lenovo Device [17aa:20f9] + Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 11 + Region 0: Memory at f2827400 (64-bit, non-prefetchable) [size=256] + Region 4: I/O ports at 1c60 [size=32] +00: 86 80 30 29 03 01 80 02 03 00 05 0c 00 00 00 00 +10: 04 74 82 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 61 1c 00 00 00 00 00 00 00 00 00 00 aa 17 f9 20 +30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 +40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 02 04 04 00 f0 00 08 08 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 + +03:00.0 Network controller [0280]: Intel Corporation PRO/Wireless 5100 AGN [Shiloh] Network Connection [8086:4237] + Subsystem: Intel Corporation WiFi Link 5100 AGN [8086:1211] + Physical Slot: 1 + Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 17 + Region 0: Memory at f2500000 (64-bit, non-prefetchable) [size=8K] + Capabilities: [c8] Power Management version 3 + Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [d0] MSI: Enable- Count=1/1 Maskable- 64bit+ + Address: 00000000fee0300c Data: 4182 + Capabilities: [e0] Express (v1) Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 unlimited + ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- + LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <128ns, L1 <32us + ClockPM+ Surprise- LLActRep- BwNot- + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + Capabilities: [100 v1] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn- + Capabilities: [140 v1] Device Serial Number 00-21-5d-ff-ff-b3-e0-86 +00: 86 80 37 42 02 01 10 00 00 00 80 02 10 00 00 00 +10: 04 00 50 f2 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 11 12 +30: 00 00 00 00 c8 00 00 00 00 00 00 00 0b 01 00 00 +40: 00 00 00 00 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b/docs/hcl/hwdumps/x200/lspnp.log diff --git a/docs/hcl/hwdumps/x200/lsusb.err.log b/docs/hcl/hwdumps/x200/lsusb.err.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/lsusb.err.log diff --git a/docs/hcl/hwdumps/x200/lsusb.log b/docs/hcl/hwdumps/x200/lsusb.log new file mode 100644 index 00000000..e64c87dd --- /dev/null +++ b/docs/hcl/hwdumps/x200/lsusb.log @@ -0,0 +1,820 @@ + +Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0002 2.0 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency ehci_hcd + iProduct 2 EHCI Host Controller + iSerial 1 0000:00:1d.7 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0004 1x 4 bytes + bInterval 12 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 6 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 10 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x38 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power + Port 3: 0000.0100 power + Port 4: 0000.0100 power + Port 5: 0000.0100 power + Port 6: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 008 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.2 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x02 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 007 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.1 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x06 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 006 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1d.0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0002 2.0 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency ehci_hcd + iProduct 2 EHCI Host Controller + iSerial 1 0000:00:1a.7 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0004 1x 4 bytes + bInterval 12 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 6 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 10 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x58 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power + Port 3: 0000.0100 power + Port 4: 0000.0100 power + Port 5: 0000.0100 power + Port 6: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 005 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.2 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x04 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered + +Bus 004 Device 002: ID 0a5c:2145 Broadcom Corp. BCM2045B (BDC-2.1) [Bluetooth Controller] +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 224 Wireless + bDeviceSubClass 1 Radio Frequency + bDeviceProtocol 1 Bluetooth + bMaxPacketSize0 64 + idVendor 0x0a5c Broadcom Corp. + idProduct 0x2145 BCM2045B (BDC-2.1) [Bluetooth Controller] + bcdDevice 3.52 + iManufacturer 1 Lenovo Computer Corp + iProduct 2 ThinkPad Bluetooth with Enhanced Data Rate II + iSerial 0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 216 + bNumInterfaces 4 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 100mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 3 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0010 1x 16 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x82 EP 2 IN + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x02 EP 2 OUT + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 0 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0000 1x 0 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0000 1x 0 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 1 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0009 1x 9 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0009 1x 9 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 2 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0011 1x 17 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0011 1x 17 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 3 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 4 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 5 + bNumEndpoints 2 + bInterfaceClass 224 Wireless + bInterfaceSubClass 1 Radio Frequency + bInterfaceProtocol 1 Bluetooth + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x03 EP 3 OUT + bmAttributes 1 + Transfer Type Isochronous + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 2 + bAlternateSetting 0 + bNumEndpoints 2 + bInterfaceClass 255 Vendor Specific Class + bInterfaceSubClass 255 Vendor Specific Subclass + bInterfaceProtocol 255 Vendor Specific Protocol + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x84 EP 4 IN + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x04 EP 4 OUT + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0020 1x 32 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 3 + bAlternateSetting 0 + bNumEndpoints 0 + bInterfaceClass 254 Application Specific Interface + bInterfaceSubClass 1 Device Firmware Update + bInterfaceProtocol 0 + iInterface 0 + Device Firmware Upgrade Interface Descriptor: + bLength 7 + bDescriptorType 33 + bmAttributes 7 + Will Not Detach + Manifestation Tolerant + Upload Supported + Download Supported + wDetachTimeout 5000 milliseconds + wTransferSize 64 bytes +Device Status: 0x0001 + Self Powered + +Bus 004 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.1 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x06 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0103 power enable connect +Device Status: 0x0001 + Self Powered + +Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 1.10 + bDeviceClass 9 Hub + bDeviceSubClass 0 Unused + bDeviceProtocol 0 Full speed (or root) hub + bMaxPacketSize0 64 + idVendor 0x1d6b Linux Foundation + idProduct 0x0001 1.1 root hub + bcdDevice 3.13 + iManufacturer 3 Linux 3.13.0-39-lowlatency uhci_hcd + iProduct 2 UHCI Host Controller + iSerial 1 0000:00:1a.0 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 25 + bNumInterfaces 1 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xe0 + Self Powered + Remote Wakeup + MaxPower 0mA + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 9 Hub + bInterfaceSubClass 0 Unused + bInterfaceProtocol 0 Full speed (or root) hub + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0002 1x 2 bytes + bInterval 255 +Hub Descriptor: + bLength 9 + bDescriptorType 41 + nNbrPorts 2 + wHubCharacteristic 0x000a + No power switching (usb 1.0) + Per-port overcurrent protection + bPwrOn2PwrGood 1 * 2 milli seconds + bHubContrCurrent 0 milli Ampere + DeviceRemovable 0x00 + PortPwrCtrlMask 0xff + Hub Port Status: + Port 1: 0000.0100 power + Port 2: 0000.0100 power +Device Status: 0x0001 + Self Powered diff --git a/docs/hcl/hwdumps/x200/msrtool.err.log b/docs/hcl/hwdumps/x200/msrtool.err.log new file mode 100644 index 00000000..14418aae --- /dev/null +++ b/docs/hcl/hwdumps/x200/msrtool.err.log @@ -0,0 +1 @@ +bash: msrtool: command not found diff --git a/docs/hcl/hwdumps/x200/msrtool.log b/docs/hcl/hwdumps/x200/msrtool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/msrtool.log diff --git a/docs/hcl/hwdumps/x200/nvramtool.err.log b/docs/hcl/hwdumps/x200/nvramtool.err.log new file mode 100644 index 00000000..fb45ec80 --- /dev/null +++ b/docs/hcl/hwdumps/x200/nvramtool.err.log @@ -0,0 +1 @@ +bash: nvramtool: command not found diff --git a/docs/hcl/hwdumps/x200/nvramtool.log b/docs/hcl/hwdumps/x200/nvramtool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/nvramtool.log diff --git a/docs/hcl/hwdumps/x200/pin_hwC0D0 b/docs/hcl/hwdumps/x200/pin_hwC0D0 new file mode 100644 index 00000000..7a212707 --- /dev/null +++ b/docs/hcl/hwdumps/x200/pin_hwC0D0 @@ -0,0 +1,8 @@ +0x16 0x042140f0 +0x17 0x61a190f0 +0x18 0x04a190f0 +0x19 0x612140f0 +0x1a 0x901701f0 +0x1b 0x40f001f0 +0x1c 0x40f001f0 +0x1d 0x90a601f0 diff --git a/docs/hcl/hwdumps/x200/superiotool.err.log b/docs/hcl/hwdumps/x200/superiotool.err.log new file mode 100644 index 00000000..a45039d4 --- /dev/null +++ b/docs/hcl/hwdumps/x200/superiotool.err.log @@ -0,0 +1 @@ +bash: superiotool: command not found diff --git a/docs/hcl/hwdumps/x200/superiotool.log b/docs/hcl/hwdumps/x200/superiotool.log new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/docs/hcl/hwdumps/x200/superiotool.log diff --git a/docs/hcl/images/x200/gpio33_location.jpg b/docs/hcl/images/x200/gpio33_location.jpg Binary files differnew file mode 100644 index 00000000..2f36bda8 --- /dev/null +++ b/docs/hcl/images/x200/gpio33_location.jpg diff --git a/docs/hcl/index.html b/docs/hcl/index.html new file mode 100644 index 00000000..6747cc6d --- /dev/null +++ b/docs/hcl/index.html @@ -0,0 +1,682 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Hardware compatibility list</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Hardware compatibility list</h1> + <p> + This sections relates to known hardware compatibility in libreboot. + </p> + <ul> + <li> + <a href="#supported_list">List of supported hardware</a> + <ul> + <li><a href="#supported_desktops_x86amdintel">Desktops (x86, AMD and Intel)</a></li> + <li><a href="#supported_workstations_x86amd">Servers/workstations</a></li> + <li><a href="#supported_laptops_arm">Laptops (ARM)</a></li> + <li><a href="#supported_laptops_x86intel">Laptops (Intel, x86)</a></li> + </ul> + </li> + <li><a href="#recommended_wifi">Recommended wifi chipsets</a></li> + </ul> + <p> + <a href="../index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + + <h2 id="supported_list">List of supported hardware</h2> + + <p> + Libreboot supports the following systems in this release: + </p> + <h3 id="supported_desktops_x86amdintel">Desktops (AMD, Intel, x86)</h3> + <ul> + <li><a href="ga-g41m-es2l.html">Gigabyte GA-G41M-ES2L motherboard</a></li> + <li><a href="d510mo.html">Intel D510MO motherboard</a></li> + <li><a href="kcma-d8.html">ASUS KCMA-D8 motherboard</a></li> + </ul> + <h3 id="supported_workstations_x86amd">Servers/workstations (AMD, x86)</h3> + <ul> + <li><a href="kfsn4-dre.html">ASUS KFSN4-DRE motherboard</a></li> + <li><a href="kgpe-d16.html">ASUS KGPE-D16 motherboard</a></li> + </ul> + <h3 id="supported_laptops_arm">Laptops (ARM)</h3> + <ul> + <li><a href="c201.html">ASUS Chromebook C201</a></li> + </ul> + <h3 id="supported_laptops_x86intel">Laptops (Intel, x86)</h3> + <ul> + <li><a href="#supported_x60_list">Lenovo ThinkPad X60/X60s</a></li> + <li><a href="#supported_x60t_list">Lenovo ThinkPad X60 Tablet</a></li> + <li><a href="#supported_t60_list">Lenovo ThinkPad T60</a> (there are exceptions. see link)</li> + <li><a href="x200.html">Lenovo ThinkPad X200</a></li> + <li><a href="r400.html">Lenovo ThinkPad R400</a></li> + <li><a href="t400.html">Lenovo ThinkPad T400</a></li> + <li><a href="t500.html">Lenovo ThinkPad T500</a></li> + <li><a href="#macbook11">Apple MacBook1,1</a></li> + <li><a href="#macbook21">Apple MacBook2,1</a></li> + </ul> + + <p> + 'Supported' means that the build scripts know how to build ROM images for these systems, + and that the systems have been tested (confirmed working). There may be exceptions; + in other words, this is a list of 'officially' supported systems. + </p> + + <p> + It is also possible to build ROM images (from source) for other systems (and virtual systems, e.g. QEMU). + </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h2 id="recommended_wifi">Recommended wifi chipsets</h2> + <p> + The following are known to work well: + </p> + <ul> + <li><a href="http://h-node.org/search/results/en/1/search/wifi/ar9285">Atheros AR5B95</a> (chipset: Atheros AR9285); mini PCI-E. Most of these are half-height, so you will need a half>full height mini PCI express adapter/bracket.</li> + <li><a href="http://h-node.org/wifi/view/en/116/Atheros-Communications-Inc--AR928X-Wireless-Network-Adapter--PCI-Express---rev-01-">Atheros AR928X</a> chipset; mini PCI-E. Most of these are half-height, so you will need a half>full height mini PCI express adapter/bracket</li> + <li>Unex DNUA-93F (chipset: <a href="http://h-node.org/search/results/en/1/search/wifi/ar9271">Atheros AR9271</a>); USB.</li> + <li>Any of the chipsets listed at <a href="https://www.fsf.org/resources/hw/endorsement/respects-your-freedom">https://www.fsf.org/resources/hw/endorsement/respects-your-freedom</a></li> + <li>Any of the chipsets listed at <a href="http://h-node.org/wifi/catalogue/en/1/1/undef/undef/yes?">http://h-node.org/wifi/catalogue/en/1/1/undef/undef/yes?</a> + </ul> + <p> + The following was mentioned (on IRC), but it's unknown to the libreboot project if these work with linux-libre kernel (TODO: test): + </p> + <ul> + <li>ar5bhb116 ar9382 ABGN</li> + <li>[0200]: Qualcomm Atheros AR242x / AR542x Wireless Network Adapter (PCI-Express) [168c:001c]</li> + </ul> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h2 id="supported_x60_list">List of supported ThinkPad X60s</h2> + + <p> + Native gpu initialization ('native graphics') which replaces the proprietary VGA Option ROM + ('<a href="https://en.wikipedia.org/wiki/Video_BIOS">Video BIOS</a>' or 'VBIOS'), + all known LCD panels are currently compatible: + </p> + + <p> + To find what LCD panel you have, see: <a href="../misc/index.html#get_edid_panelname">../misc/index.html#get_edid_panelname</a>. + </p> + + <ul> + <li>TMD-Toshiba LTD121ECHB: #</li> + <li>CMO N121X5-L06: #</li> + <li>Samsung LTN121XJ-L07: #</li> + <li>BOE-Hydis HT121X01-101: #</li> + </ul> + + <p> + You can remove an X61/X61s motherboard from the chassis and install an X60/X60s motherboard in it's place (for flashing libreboot). The chassis is mostly identical + and the motherboards are the same shape/size. + </p> + + <p> + The X60 typically comes with an Intel wifi chipset which does not work at all without proprietary firmware, and while Lenovo BIOS is running + the system will refuse to boot if you replace the card. Fortunately it is very easily replaced; + just remove the card and install another one <b>after</b> libreboot is installed. See <a href="#recommended_wifi">#recommended_wifi</a> for replacements. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h2 id="supported_x60t_list">List of supported ThinkPad X60 Tablets</h2> + + <p> + Native gpu initialization ('native graphics') which replaces the proprietary VGA Option ROM + ('<a href="https://en.wikipedia.org/wiki/Video_BIOS">Video BIOS</a>' or 'VBIOS'). + </p> + + <p> + To find what LCD panel you have, see: <a href="../misc/index.html#get_edid_panelname">../misc/index.html#get_edid_panelname</a>. + </p> + + <p> + There are 5 known LCD panels for the X60 Tablet: + </p> + <ul> + <li> + <b>X60T XGA (1024x768):</b> + <ul> + <li>BOE-Hydis HV121X03-100 (works)</li> + <li>Samsung LTN121XP01 (does not work. blank screen)</li> + <li>BOE-Hydis HT12X21-351 (does not work. blank screen)</li> + </ul> + </li> + <li> + <b>X60T SXGA+ (1400x1050):</b> + <ul> + <li>BOE-Hydis HV121P01-100 (works)</li> + <li>BOE-Hydis HV121P01-101 (works)</li> + </ul> + </li> + </ul> + + <p> + Most X60Ts only have digitizer (pen), but some have finger (touch) aswell as pen; finger/multitouch doesn't work, only digitizer (pen) does. + </p> + + <p> + You can remove an X61/X61s motherboard from the chassis and install an X60/X60s motherboard in its place (for flashing libreboot). The chassis is mostly identical + and the motherboards are the same shape/size. <b>It is unknown if the same applies between the X60 Tablet and the X61 Tablet</b>. + </p> + + <p> + The X60 Tablet typically comes with an Intel wifi chipset which does not work at all without proprietary firmware, and while Lenovo BIOS is running + the system will refuse to boot if you replace the card. Fortunately it is very easily replaced; + just remove the card and install another one <b>after</b> libreboot is installed. See <a href="#recommended_wifi">#recommended_wifi</a> for replacements. + </p> + + <p> + A user with a X60T that has digitizer+finger support, reported that they could get finger input working. They + used linuxwacom at git tag 0.25.99.2 and had the following in their xorg.conf: + </p> + +<pre> +# Now, for some reason (probably a bug in linuxwacom), +# the 'Touch=on' directive gets reset to 'off'. +# So you'll need to do +# $ xsetwacom --set WTouch Touch on +# +# tested with linuxwacom git 42a42b2a8636abc9e105559e5dea467163499de7 + +Section "Monitor" + Identifier "<default monitor>" + DisplaySize 245 184 +EndSection + +Section "Screen" + Identifier "Default Screen Section" + Monitor "<default monitor<" +EndSection + +Section "InputDevice" + Identifier "WTouch" + Driver "wacom" + Option "Device" "/dev/ttyS0" +# Option "DebugLevel" "12" + Option "BaudRate" "38400" + Option "Type" "touch" + Option "Touch" "on" + Option "Gesture" "on" + Option "ForceDevice" "ISDV4" +# Option "KeepShape" "on" + Option "Mode" "Absolute" + Option "RawSample" "2" +# Option "TPCButton" "off" + Option "TopX" "17" + Option "TopY" "53" + Option "BottomX" "961" + Option "BottomY" "985" +EndSection + +Section "ServerLayout" + Identifier "Default Layout" + Screen "Default Screen Section" + InputDevice "WTouch" "SendCoreEvents" +EndSection + +</pre> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h2 id="supported_t60_list">Supported T60 list</h2> + + <p> + Native gpu initialization ('native graphics') which replaces the proprietary VGA Option ROM + ('<a href="https://en.wikipedia.org/wiki/Video_BIOS">Video BIOS</a>' or 'VBIOS'). + </p> + + <p> + To find what LCD panel you have, see: <a href="../misc/index.html#get_edid_panelname">../misc/index.html#get_edid_panelname</a>. + </p> + + <p> + <b> + Some T60s have ATI GPUs, and all T60P laptops have ATI GPUs These are incompatible! See <a href="#t60_ati_intel">#t60_ati_intel</a> for how to remedy this. + </b> + </p> + + <p> + How to dump the EDID:<br/> + + </p> + + <p> + Tested LCD panels: <b>working(compatible)</b> + </p> + <ul> + <li>TMD-Toshiba LTD141EN9B (14.1" 1400x1050) (FRU P/N 41W1478 recommended for the inverter board)</li> + <li>Samsung LTN141P4-L02 (14.1" 1400x1050) (FRU P/N 41W1478 recommended for the inverter board)</li> + <li>LG-Philips LP150E05-A2K1 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board)</li> + <li>Samsung LTN150P4-L01 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board) (not a T60 screen afaik, but it works)</li> + <li>BOE-Hydis HV150UX1-100 (15.1" 1600x1200) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board)</li> + </ul> + + <div class="subsection"> + + <p> + Tested LCD panels: <b>not working yet (incompatible; see <a href="../future/index.html#lcd_i945_incompatibility">../future/index.html#lcd_i945_incompatibility</a>)</b> + </p> + <ul> + <li>Samsung LTN141XA-L01 (14.1" 1024x768)</li> + <li>LG-Philips LP150X09 (15.1" 1024x768)</li> + <li>Samsung LTN150XG (15.1" 1024x768)</li> + <li>LG-Philips LP150E06-A5K4 (15.1" 1400x1050) (also, not an official T60 screen)</li> + <li>Samsung LTN154X3-L0A (15.4" 1280x800)</li> + <li>IDtech IAQX10N (15.1" 2048x1536) (no display in GRUB, display in GNU/Linux is temperamental) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board)</li> + <li>IDtech N150U3-L01 (15.1" 1600x1200) (no display in GRUB, display in GNU/Linux works) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board)</li> + </ul> + + </div> + + <div class="subsection"> + + <p> + <u><i>The following LCD panels are <b>UNTESTED</b>. If you have one of these panels + then please submit a report!</i></u>: + </p> + <ul> + <li>CMO(IDtech?) N141XC (14.1" 1024x768)</li> + <li>BOE-Hydis HT14X14 (14.1" 1024x768)</li> + <li>TMD-Toshiba LTD141ECMB (14.1" 1024x768)</li> + <li>Boe-Hydis HT14P12 (14.1" 1400x1050) (FRU P/N 41W1478 recommended for the inverter board)</li> + <li>CMO (IDtech?) 13N7068 (15.1" 1024x768)</li> + <li>CMO (IDtech?) 13N7069 (15.1" 1024x768)</li> + <li>BOE-Hydis HV150P01-100 (15.1" 1400x1050) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board)</li> + <li>BOE-Hydis HV150UX1-102 (15.1" 1600x1200) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board)</li> + <li>IDtech IAQX10S (15.1" 2048x1536) (P/N 42T0078 FRU 42T0079 or P/N 41W1338 recommended for the inverter board)</li> + <li>Samsung LTN154P2-L05 (42X4641 42T0329) (15.4" 1680x1050)</li> + <li>LG-Philips LP154W02-TL10 (13N7020 42T0423) (15.4" 1680x1050)</li> + <li>LG-Philips LP154WU1-TLB1 (42T0361) (15.4" 1920x1200) <b>(for T61p but it might work in T60. Unknown!)</b></li> + <li>Samsung LTN154U2-L05 (42T0408 42T0574) (15.4" 1920x1200) <b>(for T61p but it might work in T60. Unknown!)</b></li> + </ul> + + <p> + It is unknown whether the 1680x1050 (15.4") and 1920x1200 (15.4") panels use a different inverter board than the 1280x800 panels. + </p> + + <p> + The T60 typically comes with an Intel wifi chipset which does not work at all without proprietary firmware, and while Lenovo BIOS is running + the system will refuse to boot if you replace the card. Fortunately it is very easily replaced; + just remove the card and install another one <b>after</b> libreboot is installed. See <a href="#recommended_wifi">#recommended_wifi</a> for replacements. + </p> + + </div> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h2 id="t60_ati_intel">ThinkPad T60 (ATI GPU) and ThinkPad T60 (Intel GPU) differences.</h2> + + <p> + If your T60 is a 14.1" or 15.1" model with an ATI GPU, it won't work with libreboot by default but + you can replace the motherboard with another T60 motherboard that has an Intel GPU, and then libreboot should work. + </p> + + <p> + As far as I know, 14.1" (Intel GPU) and 15.1" (Intel GPU) T60 motherboards are the same, where + 'spacers' are used on the 15.1" T60. In any case, it makes sense to find one that is guaranteed to fit in your chassis. + </p> + + <p> + There is also a 15.4" T60 with Intel GPU. + </p> + + <p> + Note: the T60<b>p</b> laptops all have ATI graphics. + The T60p laptops cannot be used with libreboot under any circumstances. + </p> + + <p> + The following T60 motherboard (see area highlighted in white) shows an empty space where the ATI GPU would be (this particular motherboard has an Intel GPU):<br/><br/> + <img src="../images/t60_dev/t60_unbrick.jpg" alt="" /> + </p> + + <p> + The reason that the ATI GPU on T60 is unsupported is due to the VBIOS (Video BIOS) which is non-free. + The VBIOS for the Intel GPU on X60/T60 has been reverse engineered, and replaced with Free Software and + so will work in libreboot. + </p> + + <p> + The 'Video BIOS' is what initializes graphics. + </p> + + <p> + See: <a href="https://en.wikipedia.org/wiki/Video_BIOS">https://en.wikipedia.org/wiki/Video_BIOS</a>.<br/> + In fact, lack of free VBIOS in general is a big problem in coreboot, and is one reason (among others) why many ports for coreboot are + unsuitable for libreboot's purpose. + </p> + + <p> + Theoretically, the ThinkPad T60 with ATI GPU can work with libreboot and have ROM images compiled for it, however + in practise it would not be usable as a laptop because there would be no visual display at all. That being said, + such a configuration is acceptable for use in a 'headless' server setup (with serial and/or ssh console as the display). + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h2 id="macbook11">Information about the macbook1,1</h2> + + <p> + There is an Apple laptop called the macbook1,1 from 2006 which uses the same i945 chipset as the ThinkPad X60/T60. + A developer ported the <a href="#macbook21">MacBook2,1</a> to coreboot, the ROM images also work on the macbook1,1. + </p> + + <p> + You can refer to <a href="#macbook21">#macbook21</a> for most of this. Macbook2,1 laptops come with Core 2 Duo processors + which support 64-bit operating systems (and 32-bit). The MacBook1,1 uses Core Duo processors (supports 32-bit OS but not 64-bit), + and it is believed that this is the only difference. + </p> + + <p> + It is believed that all models are compatible, listed here: + </p> + <ul> + <li><a href="http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook1,1">http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook1,1</a></li> + </ul> + + <div class="subsection"> + <h3> + Compatible models + </h3> + <p> + Specifically (Order No. / Model No. / CPU): + </p> + <ul> + <li>MA255LL/A / A1181 (EMC 2092) / Core Duo T2500 <b>(tested - working)</b></li> + <li>MA254LL/A / A1181 (EMC 2092) / Core Duo T2400 <b>(tested - working)</b></li> + <li>MA472LL/A / A1181 (EMC 2092) / Core Duo T2500 (untested)</li> + </ul> + </div> + + <p> + Also of interest: <a href="../git/index.html#config_macbook21">../git/index.html#config_macbook21</a>. + </p> + + <p> + Unbricking: <a href="https://www.ifixit.com/Device/MacBook_Core_2_Duo">this page shows disassembly guides</a> and mono's page (see <a href="#macbook21">#macbook21</a>) + shows the location of the SPI flash chip on the motherboard. <a href="https://www.ifixit.com/Guide/MacBook+Core+2+Duo+PRAM+Battery+Replacement/529">How to remove the motherboard</a>. + </p> + + <p> + No method is yet known for flashing in GNU/Linux while the Apple firmware is running. You will need to disassemble the system and flash externally. + Reading from flash seems to work. For external flashing, refer to <a href="../install/bbb_setup.html">../install/bbb_setup.html</a>. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h2 id="macbook21">Information about the macbook2,1</h2> + + <p> + There is an Apple laptop called the macbook2,1 from late 2006 or early 2007 that uses the same i945 chipset + as the ThinkPad X60 and ThinkPad T60. A developer ported coreboot to their macbook2,1, and now libreboot can run on it. + </p> + <p> + Mono Moosbart is the person who wrote the port for macbook2,1. Referenced below are copies (up to date at the time of writing, 20140630) + of the pages that this person wrote when porting coreboot to the macbook2,1. They are included here in case the main site goes down for + whatever reason, since they include a lot of useful information. + </p> + <p> + Backups created using wget:<br/> + <b>$ wget -m -p -E -k -K -np http://macbook.donderklumpen.de/</b><br/> + <b>$ wget -m -p -E -k -K -np http://macbook.donderklumpen.de/coreboot/</b><br/> + Use <b>-e robots=off</b> if using this trick for other sites and the site restricts using robots.txt + </p> + + <p> + <b>Links to wget backups (and the backups themselves) of Mono's pages (see above) removed temporarily. Mono has given me permission to distribute them, but I need to ask + this person to tell me what license these works fall under first. Otherwise, the above URLs should be fine. NOTE TO SELF: REMOVE THIS WHEN DONE</b> + </p> + + <div class="subsection"> + <h3> + Installing GNU/Linux distributions (on Apple EFI firmware) + </h3> + <ul> + <li><a href="#">Parabola GNU/Linux installation on a macbook2,1 with Apple EFI firmware</a> (this is a copy of Mono's page, see above)</li> + </ul> + <p> + How to boot an ISO: burn it to a CD (like you would normally) and hold down the Alt/Control key while booting. + The bootloader will detect the GNU/Linux CD as 'Windows' (because Apple doesn't think GNU/Linux exists). Install it like you normally would. + When you boot up again, hold Alt/Control once more. The installation (on the HDD) will once again be seen as 'Windows'. (it's not actually Windows, + but Apple likes to think that Apple and Microsoft are all that exist.) + Now to install libreboot, follow <a href="../install/index.html#flashrom_macbook21">../install/index.html#flashrom_macbook21</a>. + </p> + </div> + + <div class="subsection"> + <h3> + Information about coreboot + </h3> + <ul> + <li><a href="#">Coreboot on the macbook2,1</a> (this is a copy of Mono's page, see above)</li> + </ul> + </div> + + <div class="subsection"> + <h3> + coreboot wiki page + </h3> + <ul> + <li><a href="http://www.coreboot.org/Board:apple/macbook21">http://www.coreboot.org/Board:apple/macbook21</a></li> + </ul> + </div> + + <div class="subsection"> + <h3> + Compatible models + </h3> + <p> + It is believed that all models are compatible, listed here: + </p> + <ul> + <li><a href="http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook2,1">http://www.everymac.com/ultimate-mac-lookup/?search_keywords=MacBook2,1</a></li> + </ul> + <p> + Specifically (Order No. / Model No. / CPU): + </p> + <ul> + <li>MA699LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T5600 <b>(tested - working)</b></li> + <li>MA701LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T7200 <b>(tested - working)</b></li> + <li>MB061LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7200 (untested)</li> + <li>MA700LL/A / A1181 (EMC 2121) / Intel Core 2 Duo T7200 <b>(tested - working)</b></li> + <li>MB063LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7400 (works)</li> + <li>MB062LL/A / A1181 (EMC 2139) / Intel Core 2 Duo T7400 <b>(tested - working)</b></li> + </ul> + </div> + + <p> + Also of interest: <a href="../git/index.html#config_macbook21">../git/index.html#config_macbook21</a>. + </p> + + <p> + Unbricking: <a href="https://www.ifixit.com/Device/MacBook_Core_2_Duo">this page shows disassembly guides</a> and mono's page (see above) + shows the location of the SPI flash chip on the motherboard. <a href="https://www.ifixit.com/Guide/MacBook+Core+2+Duo+PRAM+Battery+Replacement/529">How to remove the motherboard</a>. + </p> + + <p> + For external flashing, refer to <a href="../install/bbb_setup.html">../install/bbb_setup.html</a>. + </p> + + <p> + You need to replace OS X with GNU/Linux before flashing libreboot. (OSX won't run at all in libreboot). + </p> + + <p> + There are some issues with this system (compared to other computers that libreboot supports): + </p> + + <p> + This is an apple laptop, so it comes with OS X: it has an Apple keyboard, which means that certain keys are missing: + insert, del, home, end, pgup, pgdown. There is also one mouse button only. Battery life is poor compared to X60/T60 (for now). + It also has other issues: for example, the Apple logo on the back is a hole, exposing the backlight, which means that it glows. You should cover it up. + </p> + + <p> + The system does get a bit hotter compared to when running the original firmware. It is certainly hotter + than an X60/T60. The heat issues have been partially fixed by the following patch (now merged in libreboot): + <a href="http://review.coreboot.org/#/c/7923/">http://review.coreboot.org/#/c/7923/</a>. + </p> + + <p> + <b> + The MacBook2,1 comes with a webcam, which does not work without proprietary software. Also, webcams are a security risk; cover it up! Or remove it. + </b> + </p> + + <p> + A user reported that they could get better response from the touchpad with the following in their xorg.conf: + </p> + +<pre> +Section "InputClass" + Identifier "Synaptics Touchpad" + Driver "synaptics" + MatchIsTouchpad "on" + MatchDevicePath "/dev/input/event*" + Driver "synaptics" +# The next two values determine how much pressure one needs +# for tapping, moving the cursor and other events. + Option "FingerLow" "10" + Option "FingerHigh" "15" +# Do not emulate mouse buttons in the touchpad corners. + Option "RTCornerButton" "0" + Option "RBCornerButton" "0" + Option "LTCornerButton" "0" + Option "LBCornerButton" "0" +# One finger tap = left-click + Option "TapButton1" "1" +# Two fingers tap = right-click + Option "TapButton2" "3" +# Three fingers tap = middle-mouse + Option "TapButton3" "2" +# Try to not count the palm of the hand landing on the touchpad +# as a tap. Not sure if helps. + Option "PalmDetect" "1" +# The following modifies how long and how fast scrolling continues +# after lifting the finger when scrolling + Option "CoastingSpeed" "20" + Option "CoastingFriction" "200" +# Smaller number means that the finger has to travel less distance +# for it to count as cursor movement. Larger number prevents cursor +# shaking. + Option "HorizHysteresis" "10" + Option "VertHysteresis" "10" +# Prevent two-finger scrolling. Very jerky movement + Option "HorizTwoFingerScroll" "0" + Option "VertTwoFingerScroll" "0" +# Use edge scrolling + Option "HorizEdgeScroll" "1" + Option "VertEdgeScroll" "1" +EndSection +</pre> + <p> + A user reported that the above is only for linux kernel 3.15 or lower. For newer kernels, + the touchpad works fine out of the box, except middle tapping. + </p> + + <p> + A user submitted a utility to enable 3-finger tap on this laptop. It's + available at <i>resources/utilities/macbook21-three-finger-tap</i> in + the libreboot git repository. The script is for GNOME, confirmed to + work in Trisquel 7. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hcl/kcma-d8.html b/docs/hcl/kcma-d8.html new file mode 100644 index 00000000..00d07ff7 --- /dev/null +++ b/docs/hcl/kcma-d8.html @@ -0,0 +1,186 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ASUS KCMA-D8 desktop/workstation board</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">ASUS KCMA-D8 desktop/workstation board</h1> + + <p> + This is a desktop board using AMD hardware (Fam10h <b>and Fam15h</b> CPUs available). It can also be used + for building a high-powered workstation. Powered by libreboot. The coreboot port was done by + Timothy Pearson of <a href="https://raptorengineeringinc.com/">Raptor Engineering Inc.</a> and, + working with Timothy (and sponsoring the work) merged into libreboot. + </p> + + <p> + <b>Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules.</b> + </p> + + <p> + Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + - note that external flashing is required (e.g. BBB), if the proprietary (ASUS) firmware is currently installed. + If you already have libreboot, by default it is possible to re-flash using software running in GNU/Linux + on the kcma-d8, without using external hardware. + </p> + + <p> + <a href="index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + <h1 id="cpu-compatibility">CPU compatibility</h1> + <p> + <strong>Use Opteron 4200 series (works without microcode updates, including hw virt).</strong> + 4300 series needs microcode updates, so avoid those CPUs. 4100 series is too old, and mostly untested. + </p> + </div> + + <div class="section"> + <h1 id="boardstatus">Board status (compatibility)</h1> + <p> + See <a href="https://raptorengineeringinc.com/coreboot/kcma-d8-status.php">https://raptorengineeringinc.com/coreboot/kcma-d8-status.php</a>. + </p> + </div> + + <div class="section"> + <h1 id="formfactor">Form factor</h1> + <p> + These boards use the SSI EEB 3.61 form factor; make sure + that your case supports this. This form factor is similar + to E-ATX in that the size is identical, but the position of + the screws are different. + </p> + </div> + + <div class="section"> + <h1 id="ipmi">IPMI iKVM module add-on</h1> + <p> + Don't use it. It uses proprietary firmware and adds a backdoor (remote out-of-band management chip, + similar to the <a href="http://libreboot.org/faq/#intelme">Intel Management Engine</a>. Fortunately, + the firmware is unsigned (possibly to replace) and physically separate from the mainboard since it's + on the add-on module, which you don't have to install. + </p> + </div> + + <div class="section"> + <h1 id="flashchips">Flash chips</h1> + <p> + 2MiB flash chips are included by default, on these boards. It's on a P-DIP 8 slot (SPI chip). + The flash chip can be upgraded to higher sizes: 4MiB, 8MiB or 16MiB. With at least 8MiB, + you could feasibly fit a compressed linux+initramfs image (BusyBox+Linux system) into CBFS + and boot that, loading it into memory. + </p> + <p> + Libreboot has configs for 2, 4, 8 and 16 MiB flash chip sizes (default flash chip is 2MiB). + </p> + <p> + <b> + DO NOT hot-swap the chip with your bare hands. Use a P-DIP 8 + chip extractor. These can be found online. + See <a href="http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools">http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools</a> + </b> + </p> + </div> + + <div class="section"> + <h1 id="graphics">Native graphics initialization</h1> + <p> + Only text-mode is known to work, but linux(kernel) can initialize + the framebuffer display (if it has KMS - kernel mode setting). + </p> + </div> + + <div class="section"> + <h1 id="issues">Current issues</h1> + <ul> + <li>LRDIMM memory modules are currently incompatible</li> + <li> + SAS (via PIKE 2008 module) requires non-free option ROM (and SeaBIOS) to boot from it + (theoretically possible to replace, but you can put a kernel in CBFS or on SATA + and use that to boot GNU, which can be on a SAS drive. The linux kernel can use + those SAS drives (via PIKE module) without an option ROM). + </li> + <li> + IPMI iKVM module (optional add-on card) uses proprietary firmware. Since it's for + remote out-of-band management, it's theoretically a backdoor similar to the Intel + Management Engine. Fortunately, unlike the ME, this firmware is unsigned which + means that a free replacement is theoretically possible. For now, the libreboot project + recommends not installing the module. <a href="https://github.com/facebook/openbmc">This project</a> + might be interesting to derive from, for those who want to work on a free replacement. + In practise, out-of-band management isn't very useful anyway (or at the very least, + it's not a major inconvenience to not have it). + </li> + <li>Graphics: only text-mode works. See <a href="#graphics">#graphics</a></li> + </ul> + </div> + + <div class="section"> + <h2 id="specifications">Hardware specifications</h2> + <p> + Check the ASUS website. + </p> + </div> + + <div class="section"> + + <p> + Copyright © 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> + diff --git a/docs/hcl/kfsn4-dre.html b/docs/hcl/kfsn4-dre.html new file mode 100644 index 00000000..f9af9cdc --- /dev/null +++ b/docs/hcl/kfsn4-dre.html @@ -0,0 +1,164 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ASUS KFSN4-DRE server/workstation board</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">ASUS KFSN4-DRE server/workstation board</h1> + + <p> + This is a server board using AMD hardware (Fam10h). It can also be used + for building a high-powered workstation. Powered by libreboot. + </p> + + <p> + Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + </p> + + <p> + <a href="index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + <h1 id="formfactor">Form factor</h1> + <p> + These boards use the SSI EEB 3.61 form factor; make sure + that your case supports this. This form factor is similar + to E-ATX in that the size is identical, but the position of + the screws are different. + </p> + </div> + + <div class="section"> + <h1 id="flashchips">Flash chips</h1> + <p> + These boards use LPC flash (not SPI), in a PLCC socket. The default flash size + 1MiB (8Mbits), and can be upgraded to 2MiB (16Mbits). + SST49LF080A is the default that the board uses. + SST49LF016C is an example of a 2MiB (16Mbits) chip, which might work. + It is believed that 2MiB (16Mbits) is the maximum size available for the flash chip. + </p> + <p> + <b> + DO NOT hot-swap the chip with your bare hands. Use a PLCC + chip extractor. These can be found online. + See <a href="http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools">http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools</a> + </b> + </p> + </div> + + <div class="section"> + <h1 id="graphics">Native graphics initialization</h1> + <p> + Native graphics initialization exists (XGI Z9s) for this board. + Framebuffer- and text-mode both work. A serial port is also + available. + </p> + </div> + + <div class="section"> + <h1>Memory</h1> + <p> + DDR2 533/667 Registered ECC. 16 slots. Total capacity up to 64GiB. + </p> + </div> + + <div class="section"> + <h1 id="hexcore">Hex-core CPUs</h1> + <p> + PCB revision 1.05G is the best version of this board (the + revision number will be printed on the board), because it + can use dual hex-core CPUs (Opteron 2400/8400 series). Other + revisions are believed to only support dual quad-core CPUs. + </p> + </div> + + <div class="section"> + <h1 id="issues">Current issues</h1> + <ul> + <li> + There seems to be a 30 second bootblock delay (observed by tpearson); + the system otherwise boots and works as expected. + See <a href="text/kfsn4-dre/bootlog.txt">text/kfsn4-dre/bootlog.txt</a> + - this uses the 'simple' bootblock, while tpearson uses the 'normal' + bootblock, which tpearson suspects may be a possible cause. + This person says that they will look into it. + <a href="http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asus/kfsn4-dre/4.0-10101-g039edeb/2015-06-27T03:59:16Z/config.txt;h=4742905c185a93fbda8eb14322dd82c70641aef0;hb=055f5df4e000a97453dfad6c91c2d06ea22b8545">This config</a> doesn't have the issue. + </li> + <li> + Text-mode is a bit jittery (but still usable). (the jitter disappears + if using KMS, once the kernel starts. The jitter will remain, if + booting the kernel in text-mode). + </li> + </ul> + </div> + + <div class="section"> + <h1>Other information</h1> + <p> + <a href="ftp://ftp.sgi.com/public/Technical%20Support/Pdf%20files/Asus/kfsn4-dre.pdf">specifications</a> + </p> + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> + diff --git a/docs/hcl/kgpe-d16.html b/docs/hcl/kgpe-d16.html new file mode 100644 index 00000000..995f1503 --- /dev/null +++ b/docs/hcl/kgpe-d16.html @@ -0,0 +1,310 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ASUS KGPE-D16 server/workstation board</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">ASUS KGPE-D16 server/workstation board</h1> + + <p> + This is a server board using AMD hardware (Fam10h <b>and Fam15h</b> CPUs available). It can also be used + for building a high-powered workstation. Powered by libreboot. The coreboot port was done by + Timothy Pearson of <a href="https://raptorengineeringinc.com/">Raptor Engineering Inc.</a> and, + working with Timothy (and sponsoring the work) merged into libreboot. + </p> + + + <p> + <b>Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules.</b> + </p> + + <p> + Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + - note that external flashing is required (e.g. BBB), if the proprietary (ASUS) firmware is currently installed. + If you already have libreboot, by default it is possible to re-flash using software running in GNU/Linux + on the KGPE-D16, without using external hardware. + </p> + + <p> + <a href="index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + <h1 id="cpu-compatibility">CPU compatibility</h1> + <p> + <strong>Use Opteron 6200 series (works without microcode updates, including hw virt).</strong> + 6300 series needs microcode updates, so avoid those CPUs. 6100 series is too old, and mostly untested. + </p> + </div> + + <div class="section"> + <h1 id="boardstatus">Board status (compatibility)</h1> + <p> + See <a href="https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php">https://raptorengineeringinc.com/coreboot/kgpe-d16-status.php</a>. + </p> + </div> + + <div class="section"> + <h1 id="formfactor">Form factor</h1> + <p> + These boards use the SSI EEB 3.61 form factor; make sure + that your case supports this. This form factor is similar + to E-ATX in that the size is identical, but the position of + the screws are different. + </p> + </div> + + <div class="section"> + <h1 id="ipmi">IPMI iKVM module add-on</h1> + <p> + Don't use it. It uses proprietary firmware and adds a backdoor (remote out-of-band management chip, + similar to the <a href="http://libreboot.org/faq/#intelme">Intel Management Engine</a>. Fortunately, + the firmware is unsigned (possibly to replace) and physically separate from the mainboard since it's + on the add-on module, which you don't have to install. + </p> + </div> + + <div class="section"> + <h1 id="flashchips">Flash chips</h1> + <p> + 2MiB flash chips are included by default, on these boards. It's on a P-DIP 8 slot (SPI chip). + The flash chip can be upgraded to higher sizes: 4MiB, 8MiB or 16MiB. With at least 8MiB, + you could feasibly fit a compressed linux+initramfs image (BusyBox+Linux system) into CBFS + and boot that, loading it into memory. + </p> + <p> + Libreboot has configs for 2, 4, 8 and 16 MiB flash chip sizes (default flash chip is 2MiB). + </p> + <p> + <b> + DO NOT hot-swap the chip with your bare hands. Use a P-DIP 8 + chip extractor. These can be found online. + See <a href="http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools">http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools</a> + </b> + </p> + </div> + + <div class="section"> + <h1 id="graphics">Native graphics initialization</h1> + <p> + Only text-mode is known to work, but linux(kernel) can initialize + the framebuffer display (if it has KMS - kernel mode setting). + </p> + </div> + + <div class="section"> + <h1 id="issues">Current issues</h1> + <ul> + <li>LRDIMM memory modules are currently incompatible</li> + <li> + SAS (via PIKE 2008 module) requires non-free option ROM (and SeaBIOS) to boot from it + (theoretically possible to replace, but you can put a kernel in CBFS or on SATA + and use that to boot GNU, which can be on a SAS drive. The linux kernel can use + those SAS drives (via PIKE module) without an option ROM). + </li> + <li> + IPMI iKVM module (optional add-on card) uses proprietary firmware. Since it's for + remote out-of-band management, it's theoretically a backdoor similar to the Intel + Management Engine. Fortunately, unlike the ME, this firmware is unsigned which + means that a free replacement is theoretically possible. For now, the libreboot project + recommends not installing the module. <a href="https://github.com/facebook/openbmc">This project</a> + might be interesting to derive from, for those who want to work on a free replacement. + In practise, out-of-band management isn't very useful anyway (or at the very least, + it's not a major inconvenience to not have it). + </li> + <li>Graphics: only text-mode works. See <a href="#graphics">#graphics</a></li> + </ul> + </div> + + <div class="section"> + <h2 id="specifications">Hardware specifications</h2> + <p> + The information here is adapted, from the ASUS website. + </p> + <h3>Processor / system bus</h3> + <ul> + <li>2 CPU sockets (G34 compatible)</li> + <li>HyperTransport™ Technology 3.0</li> + <li> + CPUs supported: + <ul> + <li>AMD Opteron 6100 series (Fam10h. No IOMMU support. <b>Not</b> recommended - old. View errata datasheet here: <a href="http://support.amd.com/TechDocs/41322_10h_Rev_Gd.pdf">http://support.amd.com/TechDocs/41322_10h_Rev_Gd.pdf</a>)</li> + <li>AMD Opteron 6200 series (Fam15h, with full IOMMU support in libreboot - <strong>highly recommended - fast, and works well without microcode updates, including virtualization</strong>)</li> + <li>AMD Opteron 6300 series (Fam15h, with full IOMMU support in libreboot. <b>AVOID LIKE THE PLAGUE - virtualization is broken without microcode updates.</b></li> + <li> + NOTE: 6300 series CPUs have buggy microcode built-in, and libreboot recommends avoiding the updates. The 6200 series CPUs have more reliable microcode. + Look at this errata datasheet: <a href="http://support.amd.com/TechDocs/48063_15h_Mod_00h-0Fh_Rev_Guide.pdf">http://support.amd.com/TechDocs/48063_15h_Mod_00h-0Fh_Rev_Guide.pdf</a> + (see Errata 734 - this is what kills the 6300 series) + </li> + </ul> + </li> + <li>6.4 GT/s per link (triple link)</li> + </ul> + <h3>Core logic</h3> + <ul> + <li>AMD SR5690</li> + <li>AMD SP5100</li> + </ul> + <h3>Memory compatibility (with libreboot)</h3> + <ul> + <li><b>Total Slots:</b> 16 (4-channel per CPU, 8 DIMM per CPU), ECC</li> + <li><b>Capacity:</b> Maximum up to 256GB RDIMM</li> + <li> + <b>Memory Type that is compatible:</b> + <ul> + <li>DDR3 1600/1333/1066/800 UDIMM*</li> + <li>DDR3 1600/1333/1066/800 RDIMM*</li> + </ul> + </li> + <li> + <b>Compatible sizes per memory module:</b> + <ul> + <li>16GB, 8GB, 4GB, 3GB, 2GB, 1GB RDIMM</li> + <li>8GB, 4GB, 2GB, 1GB UDIMM</li> + </ul> + </li> + </ul> + <h3>Expansion slots</h3> + <ul> + <li><b>Total slot:</b> 6</li> + <li><b>Slot Location 1:</b> PCI 32bit/33MHz</li> + <li><b>Slot Location 2:</b> PCI-E x16 (Gen2 X8 Link)</li> + <li><b>Slot Location 3:</b> PCI-E x16 (Gen2 X16 Link), Auto switch to x8 link if slot 2 is occupied</li> + <li><b>Slot Location 4:</b> PCI-E x8 (Gen2 X4 Link)</li> + <li><b>Slot Location 5:</b> PCI-E x16 (Gen2 X16 Link)</li> + <li><b>Slot Location 6:</b> PCI-E x16 (Gen2 X16 Link), Auto turn off if slot 5 is occupied, For 1U FH/FL Card, MIO supported</li> + <li><b>Additional Slot 1:</b> PIKE slot (for SAS drives. See notes above)</li> + <li>Follow SSI Location#</li> + </ul> + <h3>Form factor</h3> + <ul> + <li>SSI EEB 3.61 (12"x13")</li> + </ul> + <h3>ASUS features</h3> + <ul> + <li>Fan Speed Control</li> + <li>Rack Ready (Rack and Pedestal dual use)</li> + </ul> + <h3>Storage</h3> + <ul> + <li> + <b>SATA controller:</b> + <ul> + <li>AMD SP5100</li> + <li>6 x SATA2 300MB/s</li> + </ul> + </li> + <li> + <b>SAS/SATA Controller:</b> + <ul> + <li>ASUS PIKE2008 3Gbps 8-port SAS card included</li> + </ul> + </li> + </ul> + <h3>Networking</h3> + <ul> + <li>2 x Intel® 82574L + 1 x Mgmt LAN</li> + </ul> + <h3>Graphics</h3> + <ul> + <li>Aspeed AST2050 with 8MB VRAM</li> + </ul> + <h3>On board I/O</h3> + <ul> + <li>1 x PSU Power Connector (24-pin SSI power connector + 8-pin SSI 12V + 8-pin SSI 12V power connector)</li> + <li>1 x Management Connector , Onboard socket for management card</li> + <li>3 x USB pin header , Up to 6 Devices</li> + <li>1 x Internal A Type USB Port</li> + <li>8 x Fan Header , 4pin (3pin/4pin fan dual support)</li> + <li>2 x SMBus</li> + <li>1 x Serial Port Header</li> + <li>1 x TPM header</li> + <li>1 x PS/2 KB/MS port</li> + </ul> + <h3>Back I/O ports</h3> + <ul> + <li>1 x External Serial Port</li> + <li>2 x External USB Port</li> + <li>1 x VGA Port</li> + <li>2 x RJ-45</li> + <li>1 x PS/2 KB/Mouse</li> + </ul> + <h3>Environment</h3> + <ul> + <li><b>Operation temperature:</b> 10C ~ 35C</li> + <li><b>Non operation temperature:</b> -40C ~ 70C</li> + <li><b>Non operation humidity:</b> 20% ~ 90% ( Non condensing)</li> + </ul> + <h3>Monitoring</h3> + <ul> + <li>CPU temperatures</li> + <li>Fan speed (RPM)</li> + </ul> + <h3>Note:</h3> + <ul> + <li>* DDR3 1600 can only be supported with AMD Opteron 6300/6200 series processor</li> + </ul> + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> + diff --git a/docs/hcl/r400.html b/docs/hcl/r400.html new file mode 100644 index 00000000..678a610a --- /dev/null +++ b/docs/hcl/r400.html @@ -0,0 +1,140 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad R400</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">ThinkPad R400</h1> + + <p> + It is believed that all or most R400 laptops are compatible. + See notes about <a href="../install/r400_external.html#cpu_compatibility">CPU compatibility</a> for + potential incompatibilities. + </p> + + <p> + There are two possible flash chip sizes for the R400: 4MiB (32Mbit) or 8MiB (64Mbit). + This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB + is SOIC-16. + </p> + + <p> + <b>The R400 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it + by using a modified descriptor: see <a href="gm45_remove_me.html">gm45_remove_me.html</a></b> (contains notes, plus + instructions) + </p> + + <p> + Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + </p> + + <p> + <a href="index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + + <h2 id="compatibility_noblobs">Compatibility (without blobs)</h2> + + <div class="subsection"> + <h3 id="hwvirt">Hardware virtualization (vt-x)</h3> + <p> + The R400, when run without CPU microcode updates in coreboot, currently kernel panics + if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled + for the guest, the guest panics (but the host is fine). Working around this in QEMU + might be possible; if not, software virtualization should work fine (it's just slower). + </p> + <p> + On GM45 hardware (with libreboot), make sure that the <i>kvm</i> and <i>kvm_intel</i> kernel modules + are not loaded, when using QEMU. + </p> + <p> + The following errata datasheet from Intel might help with investigation: + <a href="http://download.intel.com/design/mobile/specupdt/320121.pdf">http://download.intel.com/design/mobile/specupdt/320121.pdf</a> + </p> + </div> + + </div> + + <div class="section"> + + <p> + The R400 is almost identical to the X200, code-wise. See <a href="x200.html">x200.html</a>. + </p> + + <p> + TODO: put hardware register logs here like on the <a href="x200.html">X200</a> and <a href="t400.html">T400</a> page. + </p> + + </div> + + <div class="section"> + + <h1 id="lcd_compatibility">LCD compatibly</h1> + <p> + Not all LCD panels are compatible yet. See <a href="gm45_lcd.html">gm45_lcd.html</a>. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hcl/t400.html b/docs/hcl/t400.html new file mode 100644 index 00000000..531f79a6 --- /dev/null +++ b/docs/hcl/t400.html @@ -0,0 +1,161 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad T400</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">ThinkPad T400</h1> + + <p> + It is believed that all or most T400 laptops are compatible. + See notes about <a href="../install/t400_external.html#cpu_compatibility">CPU compatibility</a> + for potential incompatibilities. + </p> + + <p> + There are two possible flash chip sizes for the T400: 4MiB (32Mbit) or 8MiB (64Mbit). + This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB + is SOIC-16. + </p> + + <p> + <b>The T400 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it + by using a modified descriptor: see <a href="gm45_remove_me.html">gm45_remove_me.html</a></b> (contains notes, plus + instructions) + </p> + + <p> + Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + </p> + + <p> + <a href="index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + + <h2 id="compatibility_noblobs">Compatibility (without blobs)</h2> + + <div class="subsection"> + <h3 id="hwvirt">Hardware virtualization (vt-x)</h3> + <p> + The T400, when run without CPU microcode updates in coreboot, currently kernel panics + if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled + for the guest, the guest panics (but the host is fine). Working around this in QEMU + might be possible; if not, software virtualization should work fine (it's just slower). + </p> + <p> + On GM45 hardware (with libreboot), make sure that the <i>kvm</i> and <i>kvm_intel</i> kernel modules + are not loaded, when using QEMU. + </p> + <p> + The following errata datasheet from Intel might help with investigation: + <a href="http://download.intel.com/design/mobile/specupdt/320121.pdf">http://download.intel.com/design/mobile/specupdt/320121.pdf</a> + </p> + </div> + + </div> + + <div class="section"> + + <p> + The T400 is almost identical to the X200, code-wise. See <a href="x200.html">x200.html</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="lcd_compatibility">LCD compatibly</h1> + <p> + Not all LCD panels are compatible yet. See <a href="gm45_lcd.html">gm45_lcd.html</a>. + </p> + + </div> + + <div class="section"> + + <h2 id="regdumps">Hardware register dumps</h2> + + <p> + The coreboot wiki <a href="http://www.coreboot.org/Motherboard_Porting_Guide">shows</a> + how to collect various logs useful in porting to new + boards. Following are outputs from the T400: + </p> + + <ul> + <li> + T400 with <b>Winbond W25X64</b> flash chip (8MiB, SOIC-16) + and Lenovo BIOS 2.02 (EC firmware 1.01): + <ul> + <li><a href="../future/dumps/logs-t400-bios2.02-ec1.01/">../future/dumps/logs-t400-bios2.02-ec1.01/</a></li> + </ul> + </li> + <li> + Version of flashrom used for the external flashing/reading logs is the one that libreboot git revision c164960 uses. + </li> + </ul> + + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hcl/t500.html b/docs/hcl/t500.html new file mode 100644 index 00000000..186a25d8 --- /dev/null +++ b/docs/hcl/t500.html @@ -0,0 +1,191 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad T500</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">ThinkPad T500</h1> + + <p> + It is believed that all or most T500 laptops are compatible. + See notes about <a href="../install/t500_external.html#cpu_compatibility">CPU compatibility</a> + for potential incompatibilities. + </p> + + <p> + There are two possible flash chip sizes for the T500: 4MiB (32Mbit) or 8MiB (64Mbit). + This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB + is SOIC-16. + </p> + + <p> + <b>The T500 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it + by using a modified descriptor: see <a href="gm45_remove_me.html">gm45_remove_me.html</a></b> (contains notes, plus + instructions) + </p> + + <p> + Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + </p> + + <p> + <a href="index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + + <h2 id="compatibility_noblobs">Compatibility (without blobs)</h2> + + <div class="subsection"> + <h3 id="hwvirt">Hardware virtualization (vt-x)</h3> + <p> + The T500, when run without CPU microcode updates in coreboot, currently kernel panics + if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled + for the guest, the guest panics (but the host is fine). Working around this in QEMU + might be possible; if not, software virtualization should work fine (it's just slower). + </p> + <p> + On GM45 hardware (with libreboot), make sure that the <i>kvm</i> and <i>kvm_intel</i> kernel modules + are not loaded, when using QEMU. + </p> + <p> + The following errata datasheet from Intel might help with investigation: + <a href="http://download.intel.com/design/mobile/specupdt/320121.pdf">http://download.intel.com/design/mobile/specupdt/320121.pdf</a> + </p> + </div> + + </div> + + <div class="section"> + + <p> + The T500 is almost identical to the X200, code-wise. See <a href="x200.html">x200.html</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="lcd_compatibility">LCD compatibly</h1> + <p> + Not all LCD panels are compatible yet. See <a href="gm45_lcd.html">gm45_lcd.html</a>. + </p> + + </div> + + <div class="section"> + + <h2 id="descriptor_difference"> + Descriptor and Gbe differences + </h2> + + <p> + See + <a href="../future/dumps/t500_x200_descriptor/descriptor_diff_t500_x200.txt">../future/dumps/t500_x200_descriptor/descriptor_diff_t500_x200.txt</a> + and + <a href="../future/dumps/t500_x200_descriptor/gbe_diff_t500_x200.txt">../future/dumps/t500_x200_descriptor/gbe_diff_t500_x200.txt</a> + </p> + + <p> + The patches above are based on the output from ich9deblob on a factory.rom image dumped from the T500 + with a SOIC-8 4MiB flash chip. The patch re-creates the X200 descriptor/gbe source, so the commands were + something like:<br/> + $ <b>diff -u t500gbe x200gbe</b><br/> + $ <b>diff -u t500descriptor x200descriptor</b> + </p> + + <p> + ME VSCC table is in a different place and a different size on the T500. Libreboot disables and removes the ME + anyway, so it doesn't matter. + </p> + + <p> + The very same descriptor/gbe used on the X200 (generated by <a href="gm45_remove_me.html#ich9gen">ich9gen</a>) + was re-used on the T500, and it still worked. + </p> + + </div> + + <div class="section"> + + <h2 id="regdumps">Hardware register dumps</h2> + + <p> + The coreboot wiki <a href="http://www.coreboot.org/Motherboard_Porting_Guide">shows</a> + how to collect various logs useful in porting to new + boards. Following are outputs from the T500: + </p> + + <ul> + <li> + T500 with <b>Macronix MX25L3205D</b> flash chip (4MiB, SOIC-8) + and Lenovo BIOS 3.13 7VET83WW (EC firmware 1.06): + <ul> + <li><a href="../future/dumps/t500log/">../future/dumps/t500log/</a></li> + </ul> + </li> + </ul> + + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/hcl/text/kfsn4-dre/bootlog.txt b/docs/hcl/text/kfsn4-dre/bootlog.txt new file mode 100644 index 00000000..ea6722d8 --- /dev/null +++ b/docs/hcl/text/kfsn4-dre/bootlog.txt @@ -0,0 +1,3871 @@ +*****TEXT MODE ROM IMAGE***** + +<hangs here for 30 seconds or more> + +coreboot-4.0 Fri Jun 26 20:19:07 UTC 2015 romstage starting... +BSP Family_Model: 00100f21 +*sysinfo range: [000c4000,000c6899] +bsp_apicid = 00 +cpu_init_detectedx = 00000000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cpu_microcode_blob.bin' +CBFS: 'cpu_microcode_blob.bin' not found. +[microcode] microcode file not found. Skipping updates. +cpuSetAMDMSR done +Enter amd_ht_init() +AMD_CB_EventNotify() + event class: 05 + event: 1004 + data: 04 00 00 01 +AMD_CB_EventNotify() + event class: 05 + event: 2006 + data: 04 00 01 00 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Exit amd_ht_init() +cpuSetAMDPCI 00 done +cpuSetAMDPCI 01 done +Prep FID/VID Node:00 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f23 + F3xD8: 03001c14 + F3xDC: 00005428 +Prep FID/VID Node:01 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f23 + F3xD8: 03001c14 + F3xDC: 00005428 +setup_remote_node: 01 done +Start node 01 done. +core0 started: 01 + +Begin FIDVID MSR 0xc0010071 0x20a600e4 0x38045044 +FIDVID on BSP, APIC_id: 00 +BSP fid = 10400 +Wait for AP stage 1: ap_apicid = 1 +init_fidvid_bsp_stage1: timed out reading from ap 01 +Wait for AP stage 1: ap_apicid = 2 +init_fidvid_bsp_stage1: timed out reading from ap 02 +Wait for AP stage 1: ap_apicid = 3 +init_fidvid_bsp_stage1: timed out reading from ap 03 +Wait for AP stage 1: ap_apicid = 4 + readback = 4010401 + common_fid(packed) = 10400 +Wait for AP stage 1: ap_apicid = 5 +init_fidvid_bsp_stage1: timed out reading from ap 05 +Wait for AP stage 1: ap_apicid = 6 +init_fidvid_bsp_stage1: timed out reading from ap 06 +Wait for AP stage 1: ap_apicid = 7 +init_fidvid_bsp_stage1: timed out reading from ap 07 +common_fid = 10400 +FID Change Node:00, F3xD4: c3310f24 +FID Change Node:01, F3xD4: c3310f24 +End FIDVIDMSR 0xc0010071 0x20a600e4 0x38005044 +start_other_cores() +init node: 00 cores: 03 +Start other core - nodeid: 00 cores: 03 +init node: 01 cores: 03 +Start other core - nodeid: 01 cores: 03 +started ap apicid: * AP 01started +* AP 02started +* AP 03started +* AP 05started +* AP 06started +* AP 07started + +set_ck804_base_unit_id() +...WARM RESET... + + + + +coreboot-4.0 Fri Jun 26 20:19:07 UTC 2015 romstage starting... +BSP Family_Model: 00100f21 +*sysinfo range: [000c4000,000c6899] +bsp_apicid = 00 +cpu_init_detectedx = 00000000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cpu_microcode_blob.bin' +CBFS: 'cpu_microcode_blob.bin' not found. +[microcode] microcode file not found. Skipping updates. +cpuSetAMDMSR done +Enter amd_ht_init() +AMD_CB_EventNotify() + event class: 05 + event: 1004 + data: 04 00 00 01 +AMD_CB_EventNotify() + event class: 05 + event: 2006 + data: 04 00 01 00 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Exit amd_ht_init() +cpuSetAMDPCI 00 done +cpuSetAMDPCI 01 done +Prep FID/VID Node:00 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f24 + F3xD8: 03001c14 + F3xDC: 00005428 +Prep FID/VID Node:01 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f24 + F3xD8: 03001c14 + F3xDC: 00005428 +setup_remote_node: 01 done +Start node 01 done. +core0 started: 01 + +Begin FIDVID MSR 0xc0010071 0x20a600e4 0x38005044 +End FIDVIDMSR 0xc0010071 0x20a600e4 0x38003803 +start_other_cores() +init node: 00 cores: 03 +Start other core - nodeid: 00 cores: 03 +init node: 01 cores: 03 +Start other core - nodeid: 01 cores: 03 +started ap apicid: * AP 01started +* AP 02started +* AP 03started +* AP 05started +* AP 06started +* AP 07started + +set_ck804_base_unit_id() +fill_mem_ctrl() +enable_smbus() +SMBus controller enabled +raminit_amdmct() +raminit_amdmct begin: +activate_spd_rom() for node 00 +enable_spd_node0() +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +activate_spd_rom() for node 01 +enable_spd_node1() +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + Node: 00 base: 00 limit: ffffff BottomIO: c00000 + Node: 01 base: 1400000 limit: 17fffff BottomIO: c00000 + Copy dram map from Node 0 to Node 01 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +raminit_amdmct end: +CBMEM: +IMD: root @ bffff000 254 entries. +IMD: root @ bfffec00 62 entries. +amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +disable_spd() +enable_msi_mapping() +Prepare CAR migration and stack regions... Fill [003fd000-003fffff] ... Done +Copying data from cache to RAM... Copy [000c4000-000c693f] to [003fd6c0 - 003fffff] ... Done +Switching to use RAM as stack... Top about 003fd6ac ... Done +Disabling cache as ram now +Prepare ramstage memory region... Fill [00000000-003fcfff] ... Done +CBFS provider active. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/ramstage' +CBFS: Found @ offset 15440 size 147e1 +'fallback/ramstage' located at offset: 15478 size: 147e1 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Capability: type 0x0a @ 0x44 + + +coreboot-4.0 Fri Jun 26 20:19:07 UTC 2015 ramstage starting... +Moving GDT to bfffe980...ok +BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0 +BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 +Enumerating buses... +Show all devs... Before device enumeration. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:18.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:01.0: enabled 1 +PNP: 002e.0: enabled 1 +PNP: 002e.1: enabled 0 +PNP: 002e.2: enabled 1 +PNP: 002e.3: enabled 1 +PNP: 002e.5: enabled 1 +PNP: 002e.7: enabled 0 +PNP: 002e.8: enabled 0 +PNP: 002e.9: enabled 1 +PNP: 002e.a: enabled 0 +PNP: 002e.b: enabled 1 +PCI: 00:01.1: enabled 1 +I2C: 00:50: enabled 1 +I2C: 00:51: enabled 1 +I2C: 00:52: enabled 1 +I2C: 00:53: enabled 1 +I2C: 00:54: enabled 1 +I2C: 00:55: enabled 1 +I2C: 00:56: enabled 1 +I2C: 00:57: enabled 1 +I2C: 00:2f: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:04.0: enabled 0 +PCI: 00:04.1: enabled 0 +PCI: 00:06.0: enabled 1 +PCI: 00:07.0: enabled 1 +PCI: 00:08.0: enabled 1 +PCI: 00:09.0: enabled 1 +PCI: 00:04.0: enabled 1 +PCI: 00:0a.0: enabled 0 +PCI: 00:0b.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0c.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0d.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0e.0: enabled 1 +PCI: 00:0f.0: enabled 0 +PCI: 00:18.1: enabled 1 +PCI: 00:18.2: enabled 1 +PCI: 00:18.3: enabled 1 +PCI: 00:18.4: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:19.1: enabled 1 +PCI: 00:19.2: enabled 1 +PCI: 00:19.3: enabled 1 +PCI: 00:19.4: enabled 1 +Compare with tree... +Root Device: enabled 1 + CPU_CLUSTER: 0: enabled 1 + APIC: 00: enabled 1 + DOMAIN: 0000: enabled 1 + PCI: 00:18.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:01.0: enabled 1 + PNP: 002e.0: enabled 1 + PNP: 002e.1: enabled 0 + PNP: 002e.2: enabled 1 + PNP: 002e.3: enabled 1 + PNP: 002e.5: enabled 1 + PNP: 002e.7: enabled 0 + PNP: 002e.8: enabled 0 + PNP: 002e.9: enabled 1 + PNP: 002e.a: enabled 0 + PNP: 002e.b: enabled 1 + PCI: 00:01.1: enabled 1 + I2C: 00:50: enabled 1 + I2C: 00:51: enabled 1 + I2C: 00:52: enabled 1 + I2C: 00:53: enabled 1 + I2C: 00:54: enabled 1 + I2C: 00:55: enabled 1 + I2C: 00:56: enabled 1 + I2C: 00:57: enabled 1 + I2C: 00:2f: enabled 1 + PCI: 00:02.0: enabled 1 + PCI: 00:02.1: enabled 1 + PCI: 00:04.0: enabled 0 + PCI: 00:04.1: enabled 0 + PCI: 00:06.0: enabled 1 + PCI: 00:07.0: enabled 1 + PCI: 00:08.0: enabled 1 + PCI: 00:09.0: enabled 1 + PCI: 00:04.0: enabled 1 + PCI: 00:0a.0: enabled 0 + PCI: 00:0b.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0c.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0d.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0e.0: enabled 1 + PCI: 00:0f.0: enabled 0 + PCI: 00:18.1: enabled 1 + PCI: 00:18.2: enabled 1 + PCI: 00:18.3: enabled 1 + PCI: 00:18.4: enabled 1 + PCI: 00:19.0: enabled 1 + PCI: 00:19.1: enabled 1 + PCI: 00:19.2: enabled 1 + PCI: 00:19.3: enabled 1 + PCI: 00:19.4: enabled 1 +Root Device scanning... +root_dev_scan_bus for Root Device +setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 +setup_bsp_ramtop, TOP MEM2: msr.lo = 0x80000000, msr.hi = 0x00000001 +CPU_CLUSTER: 0 enabled +DOMAIN: 0000 enabled +CPU_CLUSTER: 0 scanning... +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + PCI: 00:18.3 siblings=3 +CPU: APIC: 00 enabled +CPU: APIC: 01 enabled +CPU: APIC: 02 enabled +CPU: APIC: 03 enabled + PCI: 00:19.3 siblings=3 +CPU: APIC: 04 enabled +CPU: APIC: 05 enabled +CPU: APIC: 06 enabled +CPU: APIC: 07 enabled +DOMAIN: 0000 scanning... +PCI: pci_scan_bus for bus 00 +PCI: 00:18.0 [1022/1200] bus ops +PCI: 00:18.0 [1022/1200] enabled +PCI: 00:18.1 [1022/1201] enabled +PCI: 00:18.2 [1022/1202] enabled +PCI: 00:18.3 [1022/1203] ops +PCI: 00:18.3 [1022/1203] enabled +PCI: 00:18.4 [1022/1204] enabled +PCI: 00:19.0 [1022/1200] bus ops +PCI: 00:19.0 [1022/1200] enabled +PCI: 00:19.1 [1022/1201] enabled +PCI: 00:19.2 [1022/1202] enabled +PCI: 00:19.3 [1022/1203] ops +PCI: 00:19.3 [1022/1203] enabled +PCI: 00:19.4 [1022/1204] enabled +PCI: 00:18.0 scanning... +PCI: 00:00.0 [10de/005e] ops +PCI: 00:00.0 [10de/005e] enabled +Capability: type 0x08 @ 0x44 +flags: 0x01e0 +PCI: 00:00.0 count: 000f static_count: 0010 +PCI: 00:00.0 [10de/005e] enabled next_unitid: 0010 +PCI: pci_scan_bus for bus 00 +PCI: 00:00.0 [10de/005e] enabled +PCI: 00:01.0 [10de/0051] bus ops +PCI: 00:01.0 [10de/0051] enabled +PCI: 00:01.1 [10de/0052] bus ops +PCI: 00:01.1 [10de/0052] enabled +PCI: 00:02.0 [10de/005a] ops +PCI: 00:02.0 [10de/005a] enabled +PCI: 00:02.1 [10de/005b] ops +PCI: 00:02.1 [10de/005b] enabled +PCI: 00:04.0 [10de/0059] ops +PCI: 00:04.0 [10de/0059] disabled +PCI: 00:04.1 [10de/0058] ops +PCI: 00:04.1 [10de/0058] disabled +PCI: 00:06.0 [10de/0053] ops +PCI: 00:06.0 [10de/0053] enabled +PCI: 00:07.0 [10de/0054] ops +PCI: 00:07.0 [10de/0054] enabled +PCI: 00:08.0 [10de/0055] ops +PCI: 00:08.0 [10de/0055] enabled +PCI: 00:09.0 [10de/005c] bus ops +PCI: 00:09.0 [10de/005c] enabled +PCI: 00:0b.0 [10de/005d] bus ops +PCI: 00:0b.0 [10de/005d] enabled +PCI: 00:0c.0 [10de/005d] bus ops +PCI: 00:0c.0 [10de/005d] enabled +PCI: 00:0d.0 [10de/005d] bus ops +PCI: 00:0d.0 [10de/005d] enabled +PCI: 00:0e.0 [10de/005d] bus ops +PCI: 00:0e.0 [10de/005d] enabled +PCI: 00:01.0 scanning... +scan_lpc_bus for PCI: 00:01.0 +PNP: 002e.0 enabled +PNP: 002e.1 disabled +PNP: 002e.2 enabled +PNP: 002e.3 enabled +PNP: 002e.5 enabled +PNP: 002e.7 disabled +PNP: 002e.8 disabled +PNP: 002e.9 enabled +PNP: 002e.a disabled +PNP: 002e.b enabled +scan_lpc_bus for PCI: 00:01.0 done +PCI: 00:01.1 scanning... +scan_smbus for PCI: 00:01.1 +smbus: PCI: 00:01.1[0]->I2C: 01:50 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:51 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:52 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:53 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:54 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:55 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:56 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:57 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:2f enabled +scan_smbus for PCI: 00:01.1 done +PCI: 00:09.0 scanning... +do_pci_scan_bridge for PCI: 00:09.0 +PCI: pci_scan_bus for bus 01 +PCI: 01:04.0 [18ca/0020] ops +PCI: 01:04.0 [18ca/0020] enabled +PCI: 00:0b.0 scanning... +do_pci_scan_bridge for PCI: 00:0b.0 +PCI: pci_scan_bus for bus 02 +PCI: 02:00.0 [14e4/1659] enabled +PCI: 00:0c.0 scanning... +do_pci_scan_bridge for PCI: 00:0c.0 +PCI: pci_scan_bus for bus 03 +PCI: 03:00.0 [14e4/1659] enabled +PCI: 00:0d.0 scanning... +do_pci_scan_bridge for PCI: 00:0d.0 +PCI: pci_scan_bus for bus 04 +PCI: Static device PCI: 04:00.0 not found, disabling it. +PCI: 00:0e.0 scanning... +do_pci_scan_bridge for PCI: 00:0e.0 +PCI: pci_scan_bus for bus 05 +PCI: 00:19.0 scanning... +DOMAIN: 0000 passpw: enabled +DOMAIN: 0000 passpw: enabled +root_dev_scan_bus for Root Device done +done +BS: BS_DEV_ENUMERATE times (us): entry 0 run 598152 exit 0 +found VGA at PCI: 01:04.0 +Setting up VGA for PCI: 01:04.0 +Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:09.0 +Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 +Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 +Setting PCI_BRIDGE_CTL_VGA for bridge Root Device +Allocating resources... +Reading resources... +Root Device read_resources bus 0 link: 0 +CPU_CLUSTER: 0 read_resources bus 0 link: 0 +APIC: 00 missing read_resources +APIC: 01 missing read_resources +APIC: 02 missing read_resources +APIC: 03 missing read_resources +APIC: 04 missing read_resources +APIC: 05 missing read_resources +APIC: 06 missing read_resources +APIC: 07 missing read_resources +CPU_CLUSTER: 0 read_resources bus 0 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 +PCI: 00:18.0 read_resources bus 0 link: 1 +PCI: 00:01.0 read_resources bus 0 link: 0 +PCI: 00:01.0 read_resources bus 0 link: 0 done +PCI: 00:01.1 read_resources bus 1 link: 0 +I2C: 01:50 missing read_resources +I2C: 01:51 missing read_resources +I2C: 01:52 missing read_resources +I2C: 01:53 missing read_resources +I2C: 01:54 missing read_resources +I2C: 01:55 missing read_resources +I2C: 01:56 missing read_resources +I2C: 01:57 missing read_resources +PCI: 00:01.1 read_resources bus 1 link: 0 done +PCI: 00:01.1 read_resources bus 2 link: 1 +PCI: 00:01.1 read_resources bus 2 link: 1 done +PCI: 00:09.0 read_resources bus 1 link: 0 +PCI: 00:09.0 read_resources bus 1 link: 0 done +PCI: 00:0b.0 read_resources bus 2 link: 0 +PCI: 00:0b.0 read_resources bus 2 link: 0 done +PCI: 00:0c.0 read_resources bus 3 link: 0 +PCI: 00:0c.0 read_resources bus 3 link: 0 done +PCI: 00:0d.0 read_resources bus 4 link: 0 +PCI: 00:0d.0 read_resources bus 4 link: 0 done +PCI: 00:0e.0 read_resources bus 5 link: 0 +PCI: 00:0e.0 read_resources bus 5 link: 0 done +PCI: 00:18.0 read_resources bus 0 link: 1 done +PCI: 00:18.0 read_resources bus 0 link: 0 +PCI: 00:18.0 read_resources bus 0 link: 0 done +PCI: 00:18.0 read_resources bus 0 link: 2 +PCI: 00:18.0 read_resources bus 0 link: 2 done +PCI: 00:18.0 read_resources bus 0 link: 3 +PCI: 00:18.0 read_resources bus 0 link: 3 done +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +PCI: 00:18.4 read_resources bus 0 link: 0 +PCI: 00:18.4 read_resources bus 0 link: 0 done +PCI: 00:18.4 read_resources bus 0 link: 1 +PCI: 00:18.4 read_resources bus 0 link: 1 done +PCI: 00:18.4 read_resources bus 0 link: 2 +PCI: 00:18.4 read_resources bus 0 link: 2 done +PCI: 00:18.4 read_resources bus 0 link: 3 +PCI: 00:18.4 read_resources bus 0 link: 3 done +PCI: 00:19.0 read_resources bus 0 link: 0 +PCI: 00:19.0 read_resources bus 0 link: 0 done +PCI: 00:19.0 read_resources bus 0 link: 1 +PCI: 00:19.0 read_resources bus 0 link: 1 done +PCI: 00:19.0 read_resources bus 0 link: 2 +PCI: 00:19.0 read_resources bus 0 link: 2 done +PCI: 00:19.0 read_resources bus 0 link: 3 +PCI: 00:19.0 read_resources bus 0 link: 3 done +PCI: 00:19.4 read_resources bus 0 link: 0 +PCI: 00:19.4 read_resources bus 0 link: 0 done +PCI: 00:19.4 read_resources bus 0 link: 1 +PCI: 00:19.4 read_resources bus 0 link: 1 done +PCI: 00:19.4 read_resources bus 0 link: 2 +PCI: 00:19.4 read_resources bus 0 link: 2 done +PCI: 00:19.4 read_resources bus 0 link: 3 +PCI: 00:19.4 read_resources bus 0 link: 3 done +DOMAIN: 0000 read_resources bus 0 link: 0 done +Root Device read_resources bus 0 link: 0 done +Done reading resources. +Show resources in subtree (Root Device)...After reading. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: 01 + APIC: 02 + APIC: 03 + APIC: 04 + APIC: 05 + APIC: 06 + APIC: 07 + DOMAIN: 0000 child on link 0 PCI: 00:18.0 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 + DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 + PCI: 00:18.0 child on link 0 PCI: 00:00.0 + PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8 + PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b8 + PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b0 + PCI: 00:00.0 + PCI: 00:01.0 child on link 0 PNP: 002e.0 + PCI: 00:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10 + PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 14 + PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 44 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 60 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 64 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 68 + PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PNP: 002e.0 + PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.3 + PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000500 index f1 + PNP: 002e.5 + PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 + PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 + PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 + PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.7 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 + PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.8 + PNP: 002e.9 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 + PNP: 002e.a + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.b + PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60 + PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PCI: 00:01.1 child on link 0 I2C: 01:50 + PCI: 00:01.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10 + PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 + PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 24 + I2C: 01:50 + I2C: 01:51 + I2C: 01:52 + I2C: 01:53 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:2f + PCI: 00:02.0 + PCI: 00:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 + PCI: 00:02.1 + PCI: 00:02.1 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 00:04.0 + PCI: 00:04.1 + PCI: 00:06.0 + PCI: 00:06.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:07.0 + PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:07.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:07.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 00:08.0 + PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:08.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 00:09.0 child on link 0 PCI: 01:04.0 + PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 + PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 01:04.0 + PCI: 01:04.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 1200 index 10 + PCI: 01:04.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 14 + PCI: 01:04.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18 + PCI: 00:0a.0 + PCI: 00:0b.0 child on link 0 PCI: 02:00.0 + PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:0c.0 child on link 0 PCI: 03:00.0 + PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 03:00.0 + PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:0d.0 child on link 0 PCI: 04:00.0 + PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 04:00.0 + PCI: 00:0e.0 + PCI: 00:0e.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:0f.0 + PCI: 00:18.1 + PCI: 00:18.2 + PCI: 00:18.3 + PCI: 00:18.4 + PCI: 00:19.0 + PCI: 00:19.1 + PCI: 00:19.2 + PCI: 00:19.3 + PCI: 00:19.4 +DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff +PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 01:04.0 18 * [0x0 - 0x7f] io +PCI: 00:09.0 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done +PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:09.0 1c * [0x0 - 0xfff] io +PCI: 00:01.0 60 * [0x1000 - 0x10ff] io +PCI: 00:01.0 64 * [0x1400 - 0x14ff] io +PCI: 00:01.0 68 * [0x1800 - 0x18ff] io +PCI: 00:01.0 10 * [0x1c00 - 0x1c7f] io +PCI: 00:01.1 20 * [0x1c80 - 0x1cbf] io +PCI: 00:01.1 24 * [0x1cc0 - 0x1cff] io +PCI: 00:01.1 10 * [0x2000 - 0x201f] io +PCI: 00:06.0 20 * [0x2020 - 0x202f] io +PCI: 00:07.0 20 * [0x2030 - 0x203f] io +PCI: 00:08.0 20 * [0x2040 - 0x204f] io +PCI: 00:07.0 10 * [0x2050 - 0x2057] io +PCI: 00:07.0 18 * [0x2058 - 0x205f] io +PCI: 00:08.0 10 * [0x2060 - 0x2067] io +PCI: 00:08.0 18 * [0x2068 - 0x206f] io +PCI: 00:07.0 14 * [0x2070 - 0x2073] io +PCI: 00:07.0 1c * [0x2074 - 0x2077] io +PCI: 00:08.0 14 * [0x2078 - 0x207b] io +PCI: 00:08.0 1c * [0x207c - 0x207f] io +PCI: 00:18.0 io: base: 2080 size: 3000 align: 12 gran: 12 limit: ffff done +PCI: 00:18.0 110d8 * [0x0 - 0x2fff] io +DOMAIN: 0000 io: base: 3000 size: 3000 align: 12 gran: 0 limit: ffff done +DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff +PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff +PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:04.0 10 * [0x0 - 0x3ffffff] prefmem +PCI: 00:09.0 prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done +PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:09.0 24 * [0x0 - 0x3ffffff] prefmem +PCI: 00:18.0 prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done +PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff +PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:04.0 14 * [0x0 - 0x3ffff] mem +PCI: 00:09.0 mem: base: 40000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 02:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:0b.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 03:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:0c.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:09.0 20 * [0x0 - 0xfffff] mem +PCI: 00:0b.0 20 * [0x100000 - 0x1fffff] mem +PCI: 00:0c.0 20 * [0x200000 - 0x2fffff] mem +PCI: 00:02.0 10 * [0x300000 - 0x300fff] mem +PCI: 00:07.0 24 * [0x301000 - 0x301fff] mem +PCI: 00:08.0 24 * [0x302000 - 0x302fff] mem +PCI: 00:02.1 10 * [0x303000 - 0x3030ff] mem +PCI: 00:18.0 mem: base: 303100 size: 400000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:18.0 110b8 * [0x0 - 0x3ffffff] prefmem +PCI: 00:18.0 110b0 * [0x4000000 - 0x43fffff] mem +DOMAIN: 0000 mem: base: 4400000 size: 4400000 align: 26 gran: 0 limit: ffffffff done +avoid_fixed_resources: DOMAIN: 0000 +avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff +constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed) +constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed) +constrain_resources: PCI: 00:01.0 14 base fec00000 limit fec00fff mem (fixed) +constrain_resources: PCI: 00:01.0 10000000 base 00000000 limit 00000fff io (fixed) +avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 base f8000000 limit febfffff +Setting resources... +DOMAIN: 0000 io: base:1000 size:3000 align:12 gran:0 limit:ffff +PCI: 00:18.0 110d8 * [0x1000 - 0x3fff] io +DOMAIN: 0000 io: next_base: 4000 size: 3000 align: 12 gran: 0 done +PCI: 00:18.0 io: base:1000 size:3000 align:12 gran:12 limit:3fff +PCI: 00:09.0 1c * [0x1000 - 0x1fff] io +PCI: 00:01.0 60 * [0x2000 - 0x20ff] io +PCI: 00:01.0 64 * [0x2400 - 0x24ff] io +PCI: 00:01.0 68 * [0x2800 - 0x28ff] io +PCI: 00:01.0 10 * [0x2c00 - 0x2c7f] io +PCI: 00:01.1 20 * [0x2c80 - 0x2cbf] io +PCI: 00:01.1 24 * [0x2cc0 - 0x2cff] io +PCI: 00:01.1 10 * [0x3000 - 0x301f] io +PCI: 00:06.0 20 * [0x3020 - 0x302f] io +PCI: 00:07.0 20 * [0x3030 - 0x303f] io +PCI: 00:08.0 20 * [0x3040 - 0x304f] io +PCI: 00:07.0 10 * [0x3050 - 0x3057] io +PCI: 00:07.0 18 * [0x3058 - 0x305f] io +PCI: 00:08.0 10 * [0x3060 - 0x3067] io +PCI: 00:08.0 18 * [0x3068 - 0x306f] io +PCI: 00:07.0 14 * [0x3070 - 0x3073] io +PCI: 00:07.0 1c * [0x3074 - 0x3077] io +PCI: 00:08.0 14 * [0x3078 - 0x307b] io +PCI: 00:08.0 1c * [0x307c - 0x307f] io +PCI: 00:18.0 io: next_base: 3080 size: 3000 align: 12 gran: 12 done +PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff +PCI: 01:04.0 18 * [0x1000 - 0x107f] io +PCI: 00:09.0 io: next_base: 1080 size: 1000 align: 12 gran: 12 done +PCI: 00:0b.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0b.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0c.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0c.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0d.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0d.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0e.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0e.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +DOMAIN: 0000 mem: base:f8000000 size:4400000 align:26 gran:0 limit:febfffff +PCI: 00:18.0 110b8 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:18.0 110b0 * [0xfc000000 - 0xfc3fffff] mem +DOMAIN: 0000 mem: next_base: fc400000 size: 4400000 align: 26 gran: 0 done +PCI: 00:18.0 prefmem: base:f8000000 size:4000000 align:26 gran:20 limit:fbffffff +PCI: 00:09.0 24 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:18.0 prefmem: next_base: fc000000 size: 4000000 align: 26 gran: 20 done +PCI: 00:09.0 prefmem: base:f8000000 size:4000000 align:26 gran:20 limit:fbffffff +PCI: 01:04.0 10 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:09.0 prefmem: next_base: fc000000 size: 4000000 align: 26 gran: 20 done +PCI: 00:0b.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0b.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0c.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0c.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0d.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0d.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0e.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0e.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:18.0 mem: base:fc000000 size:400000 align:20 gran:20 limit:fc3fffff +PCI: 00:09.0 20 * [0xfc000000 - 0xfc0fffff] mem +PCI: 00:0b.0 20 * [0xfc100000 - 0xfc1fffff] mem +PCI: 00:0c.0 20 * [0xfc200000 - 0xfc2fffff] mem +PCI: 00:02.0 10 * [0xfc300000 - 0xfc300fff] mem +PCI: 00:07.0 24 * [0xfc301000 - 0xfc301fff] mem +PCI: 00:08.0 24 * [0xfc302000 - 0xfc302fff] mem +PCI: 00:02.1 10 * [0xfc303000 - 0xfc3030ff] mem +PCI: 00:18.0 mem: next_base: fc303100 size: 400000 align: 20 gran: 20 done +PCI: 00:09.0 mem: base:fc000000 size:100000 align:20 gran:20 limit:fc0fffff +PCI: 01:04.0 14 * [0xfc000000 - 0xfc03ffff] mem +PCI: 00:09.0 mem: next_base: fc040000 size: 100000 align: 20 gran: 20 done +PCI: 00:0b.0 mem: base:fc100000 size:100000 align:20 gran:20 limit:fc1fffff +PCI: 02:00.0 10 * [0xfc100000 - 0xfc10ffff] mem +PCI: 00:0b.0 mem: next_base: fc110000 size: 100000 align: 20 gran: 20 done +PCI: 00:0c.0 mem: base:fc200000 size:100000 align:20 gran:20 limit:fc2fffff +PCI: 03:00.0 10 * [0xfc200000 - 0xfc20ffff] mem +PCI: 00:0c.0 mem: next_base: fc210000 size: 100000 align: 20 gran: 20 done +PCI: 00:0d.0 mem: base:fc3fffff size:0 align:20 gran:20 limit:fc3fffff +PCI: 00:0d.0 mem: next_base: fc3fffff size: 0 align: 20 gran: 20 done +PCI: 00:0e.0 mem: base:fc3fffff size:0 align:20 gran:20 limit:fc3fffff +PCI: 00:0e.0 mem: next_base: fc3fffff size: 0 align: 20 gran: 20 done +Root Device assign_resources, bus 0 link: 0 +0: mmio_basek=00300000, basek=00400000, limitk=00500000 +1: mmio_basek=00300000, basek=00500000, limitk=00600000 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device +PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io <node 0 link 1> +PCI: 00:18.0 110b8 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x14 prefmem <node 0 link 1> +PCI: 00:18.0 110b0 <- [0x00fc000000 - 0x00fc3fffff] size 0x00400000 gran 0x14 mem <node 0 link 1> +PCI: 00:18.0 assign_resources, bus 0 link: 1 +PCI: 00:01.0 10 <- [0x0000002c00 - 0x0000002c7f] size 0x00000080 gran 0x07 io +PCI: 00:01.0 60 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 64 <- [0x0000002400 - 0x00000024ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 68 <- [0x0000002800 - 0x00000028ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 assign_resources, bus 0 link: 0 +PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io +PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq +PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq +PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io +PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq +PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io +PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq +PNP: 002e.3 f1 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 io +PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io +PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io +PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq +PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq +ERROR: PNP: 002e.5 f0 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 30 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 f0 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 f1 irq size: 0x0000000001 not assigned +PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io +PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq +PCI: 00:01.0 assign_resources, bus 0 link: 0 +PCI: 00:01.0 14 <- [0x00fec00000 - 0x00fec00fff] size 0x00001000 gran 0x0c mem +PCI: 00:01.0 44 <- [0x00fed00000 - 0x00fed00fff] size 0x00001000 gran 0x0c mem +PCI: 00:01.1 10 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io +PCI: 00:01.1 20 <- [0x0000002c80 - 0x0000002cbf] size 0x00000040 gran 0x06 io +PCI: 00:01.1 24 <- [0x0000002cc0 - 0x0000002cff] size 0x00000040 gran 0x06 io +PCI: 00:01.1 assign_resources, bus 1 link: 0 +PCI: 00:01.1 assign_resources, bus 1 link: 0 +PCI: 00:02.0 10 <- [0x00fc300000 - 0x00fc300fff] size 0x00001000 gran 0x0c mem +PCI: 00:02.1 10 <- [0x00fc303000 - 0x00fc3030ff] size 0x00000100 gran 0x08 mem +PCI: 00:06.0 20 <- [0x0000003020 - 0x000000302f] size 0x00000010 gran 0x04 io +PCI: 00:07.0 10 <- [0x0000003050 - 0x0000003057] size 0x00000008 gran 0x03 io +PCI: 00:07.0 14 <- [0x0000003070 - 0x0000003073] size 0x00000004 gran 0x02 io +PCI: 00:07.0 18 <- [0x0000003058 - 0x000000305f] size 0x00000008 gran 0x03 io +PCI: 00:07.0 1c <- [0x0000003074 - 0x0000003077] size 0x00000004 gran 0x02 io +PCI: 00:07.0 20 <- [0x0000003030 - 0x000000303f] size 0x00000010 gran 0x04 io +PCI: 00:07.0 24 <- [0x00fc301000 - 0x00fc301fff] size 0x00001000 gran 0x0c mem +PCI: 00:08.0 10 <- [0x0000003060 - 0x0000003067] size 0x00000008 gran 0x03 io +PCI: 00:08.0 14 <- [0x0000003078 - 0x000000307b] size 0x00000004 gran 0x02 io +PCI: 00:08.0 18 <- [0x0000003068 - 0x000000306f] size 0x00000008 gran 0x03 io +PCI: 00:08.0 1c <- [0x000000307c - 0x000000307f] size 0x00000004 gran 0x02 io +PCI: 00:08.0 20 <- [0x0000003040 - 0x000000304f] size 0x00000010 gran 0x04 io +PCI: 00:08.0 24 <- [0x00fc302000 - 0x00fc302fff] size 0x00001000 gran 0x0c mem +PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io +PCI: 00:09.0 24 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x14 bus 01 prefmem +PCI: 00:09.0 20 <- [0x00fc000000 - 0x00fc0fffff] size 0x00100000 gran 0x14 bus 01 mem +PCI: 00:09.0 assign_resources, bus 1 link: 0 +PCI: 01:04.0 10 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a prefmem +PCI: 01:04.0 14 <- [0x00fc000000 - 0x00fc03ffff] size 0x00040000 gran 0x12 mem +PCI: 01:04.0 18 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran 0x07 io +PCI: 00:09.0 assign_resources, bus 1 link: 0 +PCI: 00:0b.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 02 io +PCI: 00:0b.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 02 prefmem +PCI: 00:0b.0 20 <- [0x00fc100000 - 0x00fc1fffff] size 0x00100000 gran 0x14 bus 02 mem +PCI: 00:0b.0 assign_resources, bus 2 link: 0 +PCI: 02:00.0 10 <- [0x00fc100000 - 0x00fc10ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:0b.0 assign_resources, bus 2 link: 0 +PCI: 00:0c.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 03 io +PCI: 00:0c.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 03 prefmem +PCI: 00:0c.0 20 <- [0x00fc200000 - 0x00fc2fffff] size 0x00100000 gran 0x14 bus 03 mem +PCI: 00:0c.0 assign_resources, bus 3 link: 0 +PCI: 03:00.0 10 <- [0x00fc200000 - 0x00fc20ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:0c.0 assign_resources, bus 3 link: 0 +PCI: 00:0d.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 04 io +PCI: 00:0d.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 04 prefmem +PCI: 00:0d.0 20 <- [0x00fc3fffff - 0x00fc3ffffe] size 0x00000000 gran 0x14 bus 04 mem +PCI: 00:0d.0 assign_resources, bus 4 link: 0 +PCI: 00:0d.0 assign_resources, bus 4 link: 0 +PCI: 00:0e.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 05 io +PCI: 00:0e.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 05 prefmem +PCI: 00:0e.0 20 <- [0x00fc3fffff - 0x00fc3ffffe] size 0x00000000 gran 0x14 bus 05 mem +PCI: 00:18.0 assign_resources, bus 0 link: 1 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +Root Device assign_resources, bus 0 link: 0 +Done setting resources. +Show resources in subtree (Root Device)...After assigning values. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: 01 + APIC: 02 + APIC: 03 + APIC: 04 + APIC: 05 + APIC: 06 + APIC: 07 + DOMAIN: 0000 child on link 0 PCI: 00:18.0 + DOMAIN: 0000 resource base 1000 size 3000 align 12 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base f8000000 size 4400000 align 26 gran 0 limit febfffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 + DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 + DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20 + DOMAIN: 0000 resource base 100000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 30 + DOMAIN: 0000 resource base 140000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 41 + PCI: 00:18.0 child on link 0 PCI: 00:00.0 + PCI: 00:18.0 resource base 1000 size 3000 align 12 gran 12 limit 3fff flags 60080100 index 110d8 + PCI: 00:18.0 resource base f8000000 size 4000000 align 26 gran 20 limit fbffffff flags 60081200 index 110b8 + PCI: 00:18.0 resource base fc000000 size 400000 align 20 gran 20 limit fc3fffff flags 60080200 index 110b0 + PCI: 00:00.0 + PCI: 00:01.0 child on link 0 PNP: 002e.0 + PCI: 00:01.0 resource base 2c00 size 80 align 7 gran 7 limit 2c7f flags 60000100 index 10 + PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 14 + PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 44 + PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 60 + PCI: 00:01.0 resource base 2400 size 100 align 8 gran 8 limit 24ff flags 60000100 index 64 + PCI: 00:01.0 resource base 2800 size 100 align 8 gran 8 limit 28ff flags 60000100 index 68 + PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PNP: 002e.0 + PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.3 + PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000500 index f1 + PNP: 002e.5 + PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 + PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 + PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 + PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.7 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 + PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.8 + PNP: 002e.9 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 + PNP: 002e.a + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.b + PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60 + PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PCI: 00:01.1 child on link 0 I2C: 01:50 + PCI: 00:01.1 resource base 3000 size 20 align 5 gran 5 limit 301f flags 60000100 index 10 + PCI: 00:01.1 resource base 2c80 size 40 align 6 gran 6 limit 2cbf flags 60000100 index 20 + PCI: 00:01.1 resource base 2cc0 size 40 align 6 gran 6 limit 2cff flags 60000100 index 24 + I2C: 01:50 + I2C: 01:51 + I2C: 01:52 + I2C: 01:53 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:2f + PCI: 00:02.0 + PCI: 00:02.0 resource base fc300000 size 1000 align 12 gran 12 limit fc300fff flags 60000200 index 10 + PCI: 00:02.1 + PCI: 00:02.1 resource base fc303000 size 100 align 8 gran 8 limit fc3030ff flags 60000200 index 10 + PCI: 00:04.0 + PCI: 00:04.1 + PCI: 00:06.0 + PCI: 00:06.0 resource base 3020 size 10 align 4 gran 4 limit 302f flags 60000100 index 20 + PCI: 00:07.0 + PCI: 00:07.0 resource base 3050 size 8 align 3 gran 3 limit 3057 flags 60000100 index 10 + PCI: 00:07.0 resource base 3070 size 4 align 2 gran 2 limit 3073 flags 60000100 index 14 + PCI: 00:07.0 resource base 3058 size 8 align 3 gran 3 limit 305f flags 60000100 index 18 + PCI: 00:07.0 resource base 3074 size 4 align 2 gran 2 limit 3077 flags 60000100 index 1c + PCI: 00:07.0 resource base 3030 size 10 align 4 gran 4 limit 303f flags 60000100 index 20 + PCI: 00:07.0 resource base fc301000 size 1000 align 12 gran 12 limit fc301fff flags 60000200 index 24 + PCI: 00:08.0 + PCI: 00:08.0 resource base 3060 size 8 align 3 gran 3 limit 3067 flags 60000100 index 10 + PCI: 00:08.0 resource base 3078 size 4 align 2 gran 2 limit 307b flags 60000100 index 14 + PCI: 00:08.0 resource base 3068 size 8 align 3 gran 3 limit 306f flags 60000100 index 18 + PCI: 00:08.0 resource base 307c size 4 align 2 gran 2 limit 307f flags 60000100 index 1c + PCI: 00:08.0 resource base 3040 size 10 align 4 gran 4 limit 304f flags 60000100 index 20 + PCI: 00:08.0 resource base fc302000 size 1000 align 12 gran 12 limit fc302fff flags 60000200 index 24 + PCI: 00:09.0 child on link 0 PCI: 01:04.0 + PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c + PCI: 00:09.0 resource base f8000000 size 4000000 align 26 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:09.0 resource base fc000000 size 100000 align 20 gran 20 limit fc0fffff flags 60080202 index 20 + PCI: 01:04.0 + PCI: 01:04.0 resource base f8000000 size 4000000 align 26 gran 26 limit fbffffff flags 60001200 index 10 + PCI: 01:04.0 resource base fc000000 size 40000 align 18 gran 18 limit fc03ffff flags 60000200 index 14 + PCI: 01:04.0 resource base 1000 size 80 align 7 gran 7 limit 107f flags 60000100 index 18 + PCI: 01:04.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3 + PCI: 00:0a.0 + PCI: 00:0b.0 child on link 0 PCI: 02:00.0 + PCI: 00:0b.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0b.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0b.0 resource base fc100000 size 100000 align 20 gran 20 limit fc1fffff flags 60080202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base fc100000 size 10000 align 16 gran 16 limit fc10ffff flags 60000201 index 10 + PCI: 00:0c.0 child on link 0 PCI: 03:00.0 + PCI: 00:0c.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0c.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0c.0 resource base fc200000 size 100000 align 20 gran 20 limit fc2fffff flags 60080202 index 20 + PCI: 03:00.0 + PCI: 03:00.0 resource base fc200000 size 10000 align 16 gran 16 limit fc20ffff flags 60000201 index 10 + PCI: 00:0d.0 child on link 0 PCI: 04:00.0 + PCI: 00:0d.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0d.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0d.0 resource base fc3fffff size 0 align 20 gran 20 limit fc3fffff flags 60080202 index 20 + PCI: 04:00.0 + PCI: 00:0e.0 + PCI: 00:0e.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0e.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0e.0 resource base fc3fffff size 0 align 20 gran 20 limit fc3fffff flags 60080202 index 20 + PCI: 00:0f.0 + PCI: 00:18.1 + PCI: 00:18.2 + PCI: 00:18.3 + PCI: 00:18.4 + PCI: 00:19.0 + PCI: 00:19.1 + PCI: 00:19.2 + PCI: 00:19.3 + PCI: 00:19.4 +Done allocating resources. +BS: BS_DEV_RESOURCES times (us): entry 0 run 3267943 exit 0 +Enabling resources... +PCI: 00:18.0 cmd <- 00 +PCI: 00:18.1 subsystem <- 1043/8162 +PCI: 00:18.1 cmd <- 00 +PCI: 00:18.2 subsystem <- 1043/8162 +PCI: 00:18.2 cmd <- 00 +PCI: 00:18.3 cmd <- 00 +PCI: 00:18.4 subsystem <- 1043/8162 +PCI: 00:18.4 cmd <- 00 +PCI: 00:19.0 cmd <- 00 +PCI: 00:19.1 subsystem <- 1043/8162 +PCI: 00:19.1 cmd <- 00 +PCI: 00:19.2 subsystem <- 1043/8162 +PCI: 00:19.2 cmd <- 00 +PCI: 00:19.3 cmd <- 00 +PCI: 00:19.4 subsystem <- 1043/8162 +PCI: 00:19.4 cmd <- 00 +PCI: 00:00.0 subsystem <- 1043/8162 +PCI: 00:00.0 cmd <- 06 +PCI: 00:01.0 subsystem <- 1043/8162 +PCI: 00:01.0 cmd <- 0f +ck804 lpc decode:PNP: 002e.0, base=0x000003f0, end=0x000003f7 +ck804 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff +ck804 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff +ck804 lpc decode:PNP: 002e.3, base=0x00000004, end=0x00000004 +ck804 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 +ck804 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 +ck804 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000297 +PCI: 00:01.1 subsystem <- 1043/8162 +PCI: 00:01.1 cmd <- 01 +PCI: 00:02.0 subsystem <- 1043/8162 +PCI: 00:02.0 cmd <- 02 +PCI: 00:02.1 subsystem <- 1043/8162 +PCI: 00:02.1 cmd <- 02 +PCI: 00:06.0 subsystem <- 1043/8162 +PCI: 00:06.0 cmd <- 01 +PCI: 00:07.0 subsystem <- 1043/8162 +PCI: 00:07.0 cmd <- 03 +PCI: 00:08.0 subsystem <- 1043/8162 +PCI: 00:08.0 cmd <- 03 +PCI: 00:09.0 bridge ctrl <- 000b +PCI: 00:09.0 cmd <- 07 +PCI: 00:0b.0 bridge ctrl <- 0003 +PCI: 00:0b.0 cmd <- 06 +PCI: 00:0c.0 bridge ctrl <- 0003 +PCI: 00:0c.0 cmd <- 06 +PCI: 00:0d.0 bridge ctrl <- 0003 +PCI: 00:0d.0 cmd <- 00 +PCI: 00:0e.0 bridge ctrl <- 0003 +PCI: 00:0e.0 cmd <- 00 +PCI: 01:04.0 cmd <- 03 +PCI: 02:00.0 subsystem <- 1043/8162 +PCI: 02:00.0 cmd <- 02 +PCI: 03:00.0 subsystem <- 1043/8162 +PCI: 03:00.0 cmd <- 02 +done. +BS: BS_DEV_ENABLE times (us): entry 0 run 162779 exit 0 +Initializing devices... +Root Device init ... +Root Device init finished in 1931 usecs +CPU_CLUSTER: 0 init ... +start_eip=0x00001000, code_size=0x00000031 +CPU1: stack_base 00138000, stack_end 00138ff8 +Asserting INIT. +Waiting for send to finish... ++Deasserting INIT. +Waiting for send to finish... ++#startup loops: 2. +Sending STARTUP #1 to 1. +After apic_write. +Initializing CPU #1 +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Sending STARTUP #2 to 1. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++nodeid = 00, coreid = 01 +After Startup. +CPU2: stack_base 00137000, stack_end 00137ff8 +Enabling cache +Asserting INIT. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Waiting for send to finish... ++MTRR: Physical address space: +0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 +0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 +0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 +0x00000000c0000000 - 0x00000000f8000000 size 0x38000000 type 0 +0x00000000f8000000 - 0x00000000fc000000 size 0x04000000 type 1 +0x00000000fc000000 - 0x0000000100000000 size 0x04000000 type 0 +0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 +Deasserting INIT. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Waiting for send to finish... ++MTRR: default type WB/UC MTRR counts: 5/3. +MTRR: UC selected as default type. +MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6 +MTRR: 2 base 0x00000000f8000000 mask 0x0000fffffc000000 type 1 +#startup loops: 2. +Sending STARTUP #1 to 2. +After apic_write. + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Startup point 1. +Waiting for send to finish... ++Setting up local apic...Sending STARTUP #2 to 2. +After apic_write. + apic_id: 0x01 done. +Startup point 1. +Waiting for send to finish... ++CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Initializing CPU #2 +After Startup. +siblings = 03, CPU3: stack_base 00136000, stack_end 00136ff8 +CPU #1 initialized +Asserting INIT. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Deasserting INIT. +Waiting for send to finish... ++CPU: family 10, model 02, stepping 01 +#startup loops: 2. +Sending STARTUP #1 to 3. +After apic_write. +nodeid = 00, coreid = 02 +Startup point 1. +Waiting for send to finish... ++Initializing CPU #3 +Sending STARTUP #2 to 3. +After apic_write. +Enabling cache +Startup point 1. +Waiting for send to finish... ++CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +After Startup. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU4: stack_base 00135000, stack_end 00135ff8 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Asserting INIT. +Setting up local apic...Waiting for send to finish... ++ apic_id: 0x02 done. +Deasserting INIT. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Waiting for send to finish... ++siblings = 03, #startup loops: 2. +Sending STARTUP #1 to 4. +After apic_write. +CPU #2 initialized +Startup point 1. +Waiting for send to finish... ++Initializing CPU #4 +Sending STARTUP #2 to 4. +After apic_write. +CPU: vendor AMD device 100f21 +Startup point 1. +Waiting for send to finish... ++CPU: family 10, model 02, stepping 01 +After Startup. +CPU5: stack_base 00134000, stack_end 00134ff8 +nodeid = 00, coreid = 03 +Asserting INIT. +Waiting for send to finish... ++Enabling cache +Deasserting INIT. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Waiting for send to finish... ++MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +#startup loops: 2. +Sending STARTUP #1 to 5. +After apic_write. + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Startup point 1. +Waiting for send to finish... ++Setting up local apic...Sending STARTUP #2 to 5. +After apic_write. + apic_id: 0x03 done. +Startup point 1. +Waiting for send to finish... ++CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +After Startup. +siblings = 03, CPU6: stack_base 00133000, stack_end 00133ff8 +CPU #3 initialized +Asserting INIT. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Deasserting INIT. +Waiting for send to finish... ++Initializing CPU #5 +#startup loops: 2. +Sending STARTUP #1 to 6. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Sending STARTUP #2 to 6. +After apic_write. +Initializing CPU #6 +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +After Startup. +CPU7: stack_base 00132000, stack_end 00132ff8 +nodeid = 01, coreid = 00 +Asserting INIT. +Waiting for send to finish... ++CPU: family 10, model 02, stepping 01 +Deasserting INIT. +Waiting for send to finish... ++nodeid = 01, coreid = 01 +#startup loops: 2. +Sending STARTUP #1 to 7. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++Enabling cache +Sending STARTUP #2 to 7. +After apic_write. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Startup point 1. +Waiting for send to finish... ++MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +After Startup. +Initializing CPU #0 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +CPU: vendor AMD device 100f21 +CPU: family 10, model 02, stepping 01 +Setting up local apic...nodeid = 00, coreid = 00 + apic_id: 0x05 done. +Enabling cache +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +siblings = 03, MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU #5 initialized + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Enabling cache +Setting up local apic...CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB + apic_id: 0x00 done. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +siblings = 03, Setting up local apic...CPU #0 initialized + apic_id: 0x04 done. +Waiting for 3 CPUS to stop +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +siblings = 03, nodeid = 01, coreid = 02 +CPU #4 initialized +Enabling cache +Waiting for 2 CPUS to stop +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Initializing CPU #7 +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU: vendor AMD device 100f21 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +CPU: family 10, model 02, stepping 01 +Setting up local apic...nodeid = 01, coreid = 03 + apic_id: 0x06 done. +Enabling cache +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +siblings = 03, MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU #6 initialized + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Waiting for 1 CPUS to stop +Setting up local apic... apic_id: 0x07 done. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +siblings = 03, CPU #7 initialized +All AP CPUs stopped (14884 loops) +CPU1: stack: 00138000 - 00139000, lowest used address 00138c8c, stack used: 884 bytes +CPU2: stack: 00137000 - 00138000, lowest used address 00137cd4, stack used: 812 bytes +CPU3: stack: 00136000 - 00137000, lowest used address 00136cd4, stack used: 812 bytes +CPU4: stack: 00135000 - 00136000, lowest used address 00135cd4, stack used: 812 bytes +CPU5: stack: 00134000 - 00135000, lowest used address 00134cd4, stack used: 812 bytes +CPU6: stack: 00133000 - 00134000, lowest used address 00133cd4, stack used: 812 bytes +CPU7: stack: 00132000 - 00133000, lowest used address 00132cd4, stack used: 812 bytes +CPU_CLUSTER: 0 init finished in 995136 usecs +PCI: 00:18.0 init ... +PCI: 00:18.0 init finished in 2030 usecs +PCI: 00:18.1 init ... +PCI: 00:18.1 init finished in 2027 usecs +PCI: 00:18.2 init ... +PCI: 00:18.2 init finished in 2018 usecs +PCI: 00:18.3 init ... +NB: Function 3 Misc Control.. done. +PCI: 00:18.3 init finished in 5293 usecs +PCI: 00:18.4 init ... +PCI: 00:18.4 init finished in 2018 usecs +PCI: 00:19.0 init ... +PCI: 00:19.0 init finished in 2019 usecs +PCI: 00:19.1 init ... +PCI: 00:19.1 init finished in 2018 usecs +PCI: 00:19.2 init ... +PCI: 00:19.2 init finished in 2017 usecs +PCI: 00:19.3 init ... +NB: Function 3 Misc Control.. done. +PCI: 00:19.3 init finished in 5268 usecs +PCI: 00:19.4 init ... +PCI: 00:19.4 init finished in 2017 usecs +PCI: 00:00.0 init ... +PCI: 00:00.0 init finished in 2028 usecs +PCI: 00:01.0 init ... +IOAPIC: Initializing IOAPIC at 0xfec00000 +IOAPIC: Bootstrap Processor Local APIC = 0x00 +IOAPIC: Dumping registers + reg 0x0000: 0x00000000 + reg 0x0001: 0x00170011 + reg 0x0002: 0x00000000 +IOAPIC: 24 interrupts +IOAPIC: Enabling interrupts on FSB +IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 +IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 +IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 +lpc_init: pm_base = 2000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +set power on after power fail +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +RTC Init +PCI: 00:01.0 init finished in 164685 usecs +PCI: 00:02.0 init ... +PCI: 00:02.0 init finished in 2026 usecs +PCI: 00:02.1 init ... +PCI: 00:02.1 init finished in 2018 usecs +PCI: 00:06.0 init ... +IDE1 IDE0 +PCI: 00:06.0 init finished in 3105 usecs +PCI: 00:07.0 init ... +SATA S SATA P +PCI: 00:07.0 init finished in 3534 usecs +PCI: 00:08.0 init ... +SATA S SATA P +PCI: 00:08.0 init finished in 3517 usecs +PCI: 00:09.0 init ... +PCI DOMAIN mem base = 0x00f8000000 +[0x50] <-- 0xf8000000 +PCI: 00:09.0 init finished in 7192 usecs +PCI: 00:0b.0 init ... +PCI: 00:0b.0 init finished in 2017 usecs +PCI: 00:0c.0 init ... +PCI: 00:0c.0 init finished in 2019 usecs +PCI: 00:0d.0 init ... +PCI: 00:0d.0 init finished in 2019 usecs +PCI: 00:0e.0 init ... +PCI: 00:0e.0 init finished in 2018 usecs +PNP: 002e.0 init ... +PNP: 002e.0 init finished in 1939 usecs +PNP: 002e.2 init ... +PNP: 002e.2 init finished in 1930 usecs +PNP: 002e.3 init ... +PNP: 002e.3 init finished in 1931 usecs +PNP: 002e.5 init ... +Keyboard init... +PNP: 002e.5 init finished in 352042 usecs +PNP: 002e.9 init ... +PNP: 002e.9 init finished in 1928 usecs +PNP: 002e.b init ... +PNP: 002e.b init finished in 1929 usecs +smbus: PCI: 00:01.1[0]->I2C: 01:2f init ... +ID: 5ca3 +I2C: 01:2f init finished in 101140 usecs +PCI: 01:04.0 init ... +XGI Z9s: initializing video device +XGI VGA: Relocate IO address: 1000 [00001030] +XGI VGA: chipid = 31 +XGI VGA: Framebuffer at 0xf8000000, mapped to 0xf8000000, size 16384k +XGI VGA: MMIO at 0xfc000000, mapped to 0xfc000000, size 256k +XGI VGA: No or unknown bridge type detected +XGI VGA: Default mode is 800x600x16 (60Hz) +XGI VGA: Set new mode: 800x600x16-60 +PCI: 01:04.0 init finished in 42544 usecs +PCI: 02:00.0 init ... +PCI: 02:00.0 init finished in 2018 usecs +PCI: 03:00.0 init ... +PCI: 03:00.0 init finished in 2018 usecs +Devices initialized +Show all devs... After init. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:18.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:01.0: enabled 1 +PNP: 002e.0: enabled 1 +PNP: 002e.1: enabled 0 +PNP: 002e.2: enabled 1 +PNP: 002e.3: enabled 1 +PNP: 002e.5: enabled 1 +PNP: 002e.7: enabled 0 +PNP: 002e.8: enabled 0 +PNP: 002e.9: enabled 1 +PNP: 002e.a: enabled 0 +PNP: 002e.b: enabled 1 +PCI: 00:01.1: enabled 1 +I2C: 01:50: enabled 1 +I2C: 01:51: enabled 1 +I2C: 01:52: enabled 1 +I2C: 01:53: enabled 1 +I2C: 01:54: enabled 1 +I2C: 01:55: enabled 1 +I2C: 01:56: enabled 1 +I2C: 01:57: enabled 1 +I2C: 01:2f: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:04.0: enabled 0 +PCI: 00:04.1: enabled 0 +PCI: 00:06.0: enabled 1 +PCI: 00:07.0: enabled 1 +PCI: 00:08.0: enabled 1 +PCI: 00:09.0: enabled 1 +PCI: 01:04.0: enabled 1 +PCI: 00:0a.0: enabled 0 +PCI: 00:0b.0: enabled 1 +PCI: 02:00.0: enabled 1 +PCI: 00:0c.0: enabled 1 +PCI: 03:00.0: enabled 1 +PCI: 00:0d.0: enabled 1 +PCI: 04:00.0: enabled 0 +PCI: 00:0e.0: enabled 1 +PCI: 00:0f.0: enabled 0 +PCI: 00:18.1: enabled 1 +PCI: 00:18.2: enabled 1 +PCI: 00:18.3: enabled 1 +PCI: 00:18.4: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:19.1: enabled 1 +PCI: 00:19.2: enabled 1 +PCI: 00:19.3: enabled 1 +PCI: 00:19.4: enabled 1 +APIC: 01: enabled 1 +APIC: 02: enabled 1 +APIC: 03: enabled 1 +APIC: 04: enabled 1 +APIC: 05: enabled 1 +APIC: 06: enabled 1 +APIC: 07: enabled 1 +BS: BS_DEV_INIT times (us): entry 0 run 1990325 exit 0 +Finalize devices... +Devices finalized +BS: BS_POST_DEVICE times (us): entry 0 run 3526 exit 0 +BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CONFIG_LOGICAL_CPUS==1: apicid_base: 00000001 +Writing IRQ routing tables to 0xf0000...done. +Writing IRQ routing tables to 0xbffd8000...done. +PIRQ table: 224 bytes. +Wrote the mp table end at: 000f0410 - 000f05cc +Wrote the mp table end at: bffd7010 - bffd71cc +MP table: 460 bytes. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/dsdt.aml' +CBFS: Found @ offset c00 size 2644 +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/slic' +CBFS: 'fallback/slic' not found. +ACPI: Writing ACPI tables at bffb3000. +ACPI: * FACS +ACPI: * DSDT +ACPI: * FADT +pm_base: 0x2000 +ACPI: added table 1/32, length now 40 +ACPI: * SSDT +processor_brand=Quad-Core AMD Opteron(tm) Processor 8347 +Pstates algorithm ... +Pstate_freq[0] = 1900MHz Pstate_power[0] = 23040mw +Pstate_latency[0] = 5us +Pstate_freq[1] = 1700MHz Pstate_power[1] = 21385mw +Pstate_latency[1] = 5us +Pstate_freq[2] = 1400MHz Pstate_power[2] = 18787mw +Pstate_latency[2] = 5us +Pstate_freq[3] = 1200MHz Pstate_power[3] = 16770mw +Pstate_latency[3] = 5us +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +ACPI: added table 2/32, length now 44 +ACPI: * MCFG +ACPI: * TCPA +TCPA log created at bffa3000 +ACPI: added table 3/32, length now 48 +ACPI: * MADT +ACPI: added table 4/32, length now 52 +current = bffb6910 +ACPI: * SRAT at bffb6910 +SRAT: lapic cpu_index=00, node_id=00, apic_id=00 +SRAT: lapic cpu_index=01, node_id=00, apic_id=01 +SRAT: lapic cpu_index=02, node_id=00, apic_id=02 +SRAT: lapic cpu_index=03, node_id=00, apic_id=03 +SRAT: lapic cpu_index=04, node_id=01, apic_id=04 +SRAT: lapic cpu_index=05, node_id=01, apic_id=05 +SRAT: lapic cpu_index=06, node_id=01, apic_id=06 +SRAT: lapic cpu_index=07, node_id=01, apic_id=07 +set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 +set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 +set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 +set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00100000 +set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00500000, sizek=00100000 +ACPI: added table 5/32, length now 56 +ACPI: * SLIT at bffb6a88 +ACPI: added table 6/32, length now 60 +ACPI: * HPET +ACPI: added table 7/32, length now 64 +ACPI: * SRAT at bffb6b00 +SRAT: lapic cpu_index=00, node_id=00, apic_id=00 +SRAT: lapic cpu_index=01, node_id=00, apic_id=01 +SRAT: lapic cpu_index=02, node_id=00, apic_id=02 +SRAT: lapic cpu_index=03, node_id=00, apic_id=03 +SRAT: lapic cpu_index=04, node_id=01, apic_id=04 +SRAT: lapic cpu_index=05, node_id=01, apic_id=05 +SRAT: lapic cpu_index=06, node_id=01, apic_id=06 +SRAT: lapic cpu_index=07, node_id=01, apic_id=07 +set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 +set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 +set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 +set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00100000 +set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00500000, sizek=00100000 +ACPI: added table 8/32, length now 68 +ACPI: * SLIT at bffb6c78 +ACPI: added table 9/32, length now 72 +ACPI: done. +ACPI tables: 15536 bytes. +smbios_write_tables: bffa2000 +Root Device (ASUS KFSN4-DRE) +CPU_CLUSTER: 0 (AMD FAM10 Root Complex) +APIC: 00 (unknown) +DOMAIN: 0000 (AMD FAM10 Root Complex) +PCI: 00:18.0 (AMD FAM10 Northbridge) +PCI: 00:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:01.0 (NVIDIA CK804 Southbridge) +PNP: 002e.0 (Winbond W83627THG Super I/O) +PNP: 002e.1 (Winbond W83627THG Super I/O) +PNP: 002e.2 (Winbond W83627THG Super I/O) +PNP: 002e.3 (Winbond W83627THG Super I/O) +PNP: 002e.5 (Winbond W83627THG Super I/O) +PNP: 002e.7 (Winbond W83627THG Super I/O) +PNP: 002e.8 (Winbond W83627THG Super I/O) +PNP: 002e.9 (Winbond W83627THG Super I/O) +PNP: 002e.a (Winbond W83627THG Super I/O) +PNP: 002e.b (Winbond W83627THG Super I/O) +PCI: 00:01.1 (NVIDIA CK804 Southbridge) +I2C: 01:50 (unknown) +I2C: 01:51 (unknown) +I2C: 01:52 (unknown) +I2C: 01:53 (unknown) +I2C: 01:54 (unknown) +I2C: 01:55 (unknown) +I2C: 01:56 (unknown) +I2C: 01:57 (unknown) +I2C: 01:2f (Nuvoton W83793 Hardware Monitor) +PCI: 00:02.0 (NVIDIA CK804 Southbridge) +PCI: 00:02.1 (NVIDIA CK804 Southbridge) +PCI: 00:04.0 (NVIDIA CK804 Southbridge) +PCI: 00:04.1 (NVIDIA CK804 Southbridge) +PCI: 00:06.0 (NVIDIA CK804 Southbridge) +PCI: 00:07.0 (NVIDIA CK804 Southbridge) +PCI: 00:08.0 (NVIDIA CK804 Southbridge) +PCI: 00:09.0 (NVIDIA CK804 Southbridge) +PCI: 01:04.0 (NVIDIA CK804 Southbridge) +PCI: 00:0a.0 (NVIDIA CK804 Southbridge) +PCI: 00:0b.0 (NVIDIA CK804 Southbridge) +PCI: 02:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0c.0 (NVIDIA CK804 Southbridge) +PCI: 03:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0d.0 (NVIDIA CK804 Southbridge) +PCI: 04:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0e.0 (NVIDIA CK804 Southbridge) +PCI: 00:0f.0 (NVIDIA CK804 Southbridge) +PCI: 00:18.1 (AMD FAM10 Northbridge) +PCI: 00:18.2 (AMD FAM10 Northbridge) +PCI: 00:18.3 (AMD FAM10 Northbridge) +PCI: 00:18.4 (AMD FAM10 Northbridge) +PCI: 00:19.0 (AMD FAM10 Northbridge) +PCI: 00:19.1 (AMD FAM10 Northbridge) +PCI: 00:19.2 (AMD FAM10 Northbridge) +PCI: 00:19.3 (AMD FAM10 Northbridge) +PCI: 00:19.4 (AMD FAM10 Northbridge) +APIC: 01 (unknown) +APIC: 02 (unknown) +APIC: 03 (unknown) +APIC: 04 (unknown) +APIC: 05 (unknown) +APIC: 06 (unknown) +APIC: 07 (unknown) +SMBIOS tables: 553 bytes. +Writing table forward entry at 0x00000500 +Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9fe4 +Table forward entry ends at 0x00000528. +... aligned to 0x00001000 +Writing coreboot table at 0xbff9a000 +rom_table_end = 0xbff9a000 +... aligned to 0xbffa0000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES + 1. 0000000000001000-000000000009ffff: RAM + 2. 00000000000a0000-00000000000bffff: RESERVED + 3. 00000000000c0000-00000000bff99fff: RAM + 4. 00000000bff9a000-00000000bfffffff: CONFIGURATION TABLES + 5. 00000000c0000000-00000000cfffffff: RESERVED + 6. 0000000100000000-000000017fffffff: RAM +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Wrote coreboot table at: bff9a000, 0xc08 bytes, checksum 440a +coreboot table: 3104 bytes. +IMD ROOT 0. bffff000 00001000 +IMD SMALL 1. bfffe000 00001000 +CAR GLOBALS 2. bfffb000 0000291c +CONSOLE 3. bffdb000 00020000 +AMDMEM INFO 4. bffd9000 0000172c +IRQ TABLE 5. bffd8000 00001000 +SMP TABLE 6. bffd7000 00001000 +ACPI 7. bffb3000 00024000 +54435041 8. bffa3000 00010000 +SMBIOS 9. bffa2000 00000800 +COREBOOT 10. bff9a000 00008000 +IMD small region: + IMD ROOT 0. bfffec00 00000400 + USBDEBUG 1. bfffeba0 00000058 + ROMSTAGE 2. bfffeb80 00000004 + GDT 3. bfffe980 00000200 +BS: BS_WRITE_TABLES times (us): entry 0 run 759226 exit 0 +CBFS provider active. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/payload' +CBFS: Found @ offset 29c80 size 92b41 +'fallback/payload' located at offset: 29cb8 size: 92b41 +Loading segment from rom address 0xfff29cb8 + code (compression=1) + New segment dstaddr 0x8200 memsize 0x17420 srcaddr 0xfff29d0c filesize 0x8215 +Loading segment from rom address 0xfff29cd4 + code (compression=1) + New segment dstaddr 0x100000 memsize 0x23f9f0 srcaddr 0xfff31f21 filesize 0x8a8d8 +Loading segment from rom address 0xfff29cf0 + Entry Point 0x00008200 +Bounce Buffer at bfc5b000, 3401660 bytes +Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz: 0x0000000000008215 +lb: [0x0000000000100000, 0x00000000001fedcc) +Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz: 0x0000000000008215 +using LZMA +[ 0x00008200, 00017ce3, 0x0001f620) <- fff29d0c +Clearing Segment: addr: 0x0000000000017ce3 memsz: 0x000000000000793d +dest 00008200, end 0001f620, bouncebuffer bfc5b000 +Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000023f9f0 filesz: 0x000000000008a8d8 +lb: [0x0000000000100000, 0x00000000001fedcc) +segment: [0x0000000000100000, 0x000000000018a8d8, 0x000000000033f9f0) + bounce: [0x00000000bfc5b000, 0x00000000bfce58d8, 0x00000000bfe9a9f0) +Post relocation: addr: 0x00000000bfc5b000 memsz: 0x000000000023f9f0 filesz: 0x000000000008a8d8 +using LZMA +[ 0xbfc5b000, bfe9a9f0, 0xbfe9a9f0) <- fff31f21 +dest bfc5b000, end bfe9a9f0, bouncebuffer bfc5b000 +move suffix around: from bfd59dcc, to 1fedcc, amount: 140c24 +Loaded segments +BS: BS_PAYLOAD_LOAD times (us): entry 0 run 781450 exit 0 +Jumping to boot code at 00008200(bff9a000) +CPU0: stack: 00139000 - 0013a000, lowest used address 00139ae0, stack used: 1312 bytes +entry = 0x00008200 +lb_start = 0x00100000 +lb_size = 0x000fedcc +buffer = 0xbfc5b000 +[H[J[1;1H[?25l[m[H[J[1;1H[2;32HFREE AS IN FREEDOM + + +[m[4;2H+----------------------------------------------------------------------------+[5;2H|[5;79H|[6;2H|[6;79H|[7;2H|[7;79H|[8;2H|[8;79H|[9;2H|[9;79H|[10;2H|[10;79H|[11;2H|[11;79H|[12;2H|[12;79H|[13;2H|[13;79H|[14;2H|[14;79H|[15;2H|[15;79H|[16;2H|[16;79H|[17;2H+----------------------------------------------------------------------------+[m[18;2H[19;2H[m Use the ^ and v keys to select which entry is highlighted. + + Press enter to boot the selected OS, `e' to edit the commands + + before booting or `c' for a command-line. [5;80H [7m[5;3H*Load Operating System [m[5;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) [m[6;78H[m[m[7;3H Parse ISOLINUX menu (USB) [m[7;78H[m[m[8;3H Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[m[9;3H Switch to grubtest.cfg [m[9;78H[m[m[10;3H Search for GRUB configuration (grub.cfg) outside of CBFS [m[10;78H[m[m[11;3H Load MemTest86+ [m[11;78H[m[m[12;3H [m[12;78H[m[m[13;3H [m[13;78H[m[m[14;3H [m[14;78H[m[m[15;3H [m[15;78H[m[m[16;3H [m[16;78H[m[16;80H [5;78H[22;1H The highlighted entry will be executed automatically in 1s. [5;78H[22;1H The highlighted entry will be executed automatically in 0s. [5;78H[?25h[H[J[1;1H[H[J[1;1H Booting `Load Operating System' + + + + Failed to boot both default and fallback entries. + + +Press any key to continue... + +[?25l[m[H[J[1;1H[2;32HFREE AS IN FREEDOM + + +[m[4;2H+----------------------------------------------------------------------------+[5;2H|[5;79H|[6;2H|[6;79H|[7;2H|[7;79H|[8;2H|[8;79H|[9;2H|[9;79H|[10;2H|[10;79H|[11;2H|[11;79H|[12;2H|[12;79H|[13;2H|[13;79H|[14;2H|[14;79H|[15;2H|[15;79H|[16;2H|[16;79H|[17;2H+----------------------------------------------------------------------------+[m[18;2H[19;2H[m Use the ^ and v keys to select which entry is highlighted. + + Press enter to boot the selected OS, `e' to edit the commands + + before booting or `c' for a command-line. [5;80H [7m[5;3H*Load Operating System [m[5;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) [m[6;78H[m[m[7;3H Parse ISOLINUX menu (USB) [m[7;78H[m[m[8;3H Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[m[9;3H Switch to grubtest.cfg [m[9;78H[m[m[10;3H Search for GRUB configuration (grub.cfg) outside of CBFS [m[10;78H[m[m[11;3H Load MemTest86+ [m[11;78H[m[m[12;3H [m[12;78H[m[m[13;3H [m[13;78H[m[m[14;3H [m[14;78H[m[m[15;3H [m[15;78H[m[m[16;3H [m[16;78H[m[16;80H [5;78H[22;1H [23;1H [5;78H[m[5;3H Load Operating System [m[5;78H[m[7m[6;3H*Parse ISOLINUX menu (ahci0) [m[6;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) [m[6;78H[m[7m[7;3H*Parse ISOLINUX menu (USB) [m[7;78H[m[m[7;3H Parse ISOLINUX menu (USB) [m[7;78H[m[7m[8;3H*Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[m[8;3H Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[7m[9;3H*Switch to grubtest.cfg [m[9;78H[m ��ޒ���������� + +*****GRAPHICAL FRAMEBUFFER ROM IMAGE***** + +<hangs here for 30 seconds or more> + +coreboot-4.0 Fri Jun 26 20:19:42 UTC 2015 romstage starting... +BSP Family_Model: 00100f21 +*sysinfo range: [000c4000,000c6899] +bsp_apicid = 00 +cpu_init_detectedx = 00000000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cpu_microcode_blob.bin' +CBFS: 'cpu_microcode_blob.bin' not found. +[microcode] microcode file not found. Skipping updates. +cpuSetAMDMSR done +Enter amd_ht_init() +AMD_CB_EventNotify() + event class: 05 + event: 1004 + data: 04 00 00 01 +AMD_CB_EventNotify() + event class: 05 + event: 2006 + data: 04 00 01 00 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Exit amd_ht_init() +cpuSetAMDPCI 00 done +cpuSetAMDPCI 01 done +Prep FID/VID Node:00 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f23 + F3xD8: 03001c14 + F3xDC: 00005428 +Prep FID/VID Node:01 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f23 + F3xD8: 03001c14 + F3xDC: 00005428 +setup_remote_node: 01 done +Start node 01 done. +core0 started: 01 + +Begin FIDVID MSR 0xc0010071 0x20a600e4 0x38045044 +FIDVID on BSP, APIC_id: 00 +BSP fid = 10400 +Wait for AP stage 1: ap_apicid = 1 +init_fidvid_bsp_stage1: timed out reading from ap 01 +Wait for AP stage 1: ap_apicid = 2 +init_fidvid_bsp_stage1: timed out reading from ap 02 +Wait for AP stage 1: ap_apicid = 3 +init_fidvid_bsp_stage1: timed out reading from ap 03 +Wait for AP stage 1: ap_apicid = 4 + readback = 4010401 + common_fid(packed) = 10400 +Wait for AP stage 1: ap_apicid = 5 +init_fidvid_bsp_stage1: timed out reading from ap 05 +Wait for AP stage 1: ap_apicid = 6 +init_fidvid_bsp_stage1: timed out reading from ap 06 +Wait for AP stage 1: ap_apicid = 7 +init_fidvid_bsp_stage1: timed out reading from ap 07 +common_fid = 10400 +FID Change Node:00, F3xD4: c3310f24 +FID Change Node:01, F3xD4: c3310f24 +End FIDVIDMSR 0xc0010071 0x20a600e4 0x38005044 +start_other_cores() +init node: 00 cores: 03 +Start other core - nodeid: 00 cores: 03 +init node: 01 cores: 03 +Start other core - nodeid: 01 cores: 03 +started ap apicid: 01start + +coreboot-4.0 Fri Jun 26 20:19:42 UTC 2015 romstage starting... +BSP Family_Model: 00100f21 +*sysinfo range: [000c4000,000c6899] +bsp_apicid = 00 +cpu_init_detectedx = 00000000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cpu_microcode_blob.bin' +CBFS: 'cpu_microcode_blob.bin' not found. +[microcode] microcode file not found. Skipping updates. +cpuSetAMDMSR done +Enter amd_ht_init() +AMD_CB_EventNotify() + event class: 05 + event: 1004 + data: 04 00 00 01 +AMD_CB_EventNotify() + event class: 05 + event: 2006 + data: 04 00 01 00 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Exit amd_ht_init() +cpuSetAMDPCI 00 done +cpuSetAMDPCI 01 done +Prep FID/VID Node:00 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f24 + F3xD8: 03001c14 + F3xDC: 00005428 +Prep FID/VID Node:01 + F3x80: e600a681 + F3x84: a0e641e6 + F3xD4: c3310f24 + F3xD8: 03001c14 + F3xDC: 00005428 +setup_remote_node: 01 done +Start node 01 done. +core0 started: 01 + +Begin FIDVID MSR 0xc0010071 0x20a600e4 0x38005044 +End FIDVIDMSR 0xc0010071 0x20a600e4 0x38003803 +start_other_cores() +init node: 00 cores: 03 +Start other core - nodeid: 00 cores: 03 +init node: 01 cores: 03 +Start other core - nodeid: 01 cores: 03 +started ap apicid: * AP 01started +* AP 02started +* AP 03started +* AP 05started +* AP 06started +* AP 07started + +set_ck804_base_unit_id() +fill_mem_ctrl() +enable_smbus() +SMBus controller enabled +raminit_amdmct() +raminit_amdmct begin: +activate_spd_rom() for node 00 +enable_spd_node0() +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +activate_spd_rom() for node 01 +enable_spd_node1() +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + Node: 00 base: 00 limit: ffffff BottomIO: c00000 + Node: 01 base: 1400000 limit: 17fffff BottomIO: c00000 + Copy dram map from Node 0 to Node 01 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +raminit_amdmct end: +CBMEM: +IMD: root @ bffff000 254 entries. +IMD: root @ bfffec00 62 entries. +amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +disable_spd() +enable_msi_mapping() +Prepare CAR migration and stack regions... Fill [003fd000-003fffff] ... Done +Copying data from cache to RAM... Copy [000c4000-000c693f] to [003fd6c0 - 003fffff] ... Done +Switching to use RAM as stack... Top about 003fd6ac ... Done +Disabling cache as ram now +Prepare ramstage memory region... Fill [00000000-003fcfff] ... Done +CBFS provider active. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/ramstage' +CBFS: Found @ offset 15440 size 147e1 +'fallback/ramstage' located at offset: 15478 size: 147e1 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Capability: type 0x0a @ 0x44 + +coreboot-4.0 Fri Jun 26 20:19:42 UTC 2015 ramstage starting... +Moving GDT to bfffe980...ok +BS: BS_PRE_DEVICE times (us): entry 0 run 1 exit 0 +BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 +Enumerating buses... +Show all devs... Before device enumeration. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:18.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:01.0: enabled 1 +PNP: 002e.0: enabled 1 +PNP: 002e.1: enabled 0 +PNP: 002e.2: enabled 1 +PNP: 002e.3: enabled 1 +PNP: 002e.5: enabled 1 +PNP: 002e.7: enabled 0 +PNP: 002e.8: enabled 0 +PNP: 002e.9: enabled 1 +PNP: 002e.a: enabled 0 +PNP: 002e.b: enabled 1 +PCI: 00:01.1: enabled 1 +I2C: 00:50: enabled 1 +I2C: 00:51: enabled 1 +I2C: 00:52: enabled 1 +I2C: 00:53: enabled 1 +I2C: 00:54: enabled 1 +I2C: 00:55: enabled 1 +I2C: 00:56: enabled 1 +I2C: 00:57: enabled 1 +I2C: 00:2f: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:04.0: enabled 0 +PCI: 00:04.1: enabled 0 +PCI: 00:06.0: enabled 1 +PCI: 00:07.0: enabled 1 +PCI: 00:08.0: enabled 1 +PCI: 00:09.0: enabled 1 +PCI: 00:04.0: enabled 1 +PCI: 00:0a.0: enabled 0 +PCI: 00:0b.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0c.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0d.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:0e.0: enabled 1 +PCI: 00:0f.0: enabled 0 +PCI: 00:18.1: enabled 1 +PCI: 00:18.2: enabled 1 +PCI: 00:18.3: enabled 1 +PCI: 00:18.4: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:19.1: enabled 1 +PCI: 00:19.2: enabled 1 +PCI: 00:19.3: enabled 1 +PCI: 00:19.4: enabled 1 +Compare with tree... +Root Device: enabled 1 + CPU_CLUSTER: 0: enabled 1 + APIC: 00: enabled 1 + DOMAIN: 0000: enabled 1 + PCI: 00:18.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:01.0: enabled 1 + PNP: 002e.0: enabled 1 + PNP: 002e.1: enabled 0 + PNP: 002e.2: enabled 1 + PNP: 002e.3: enabled 1 + PNP: 002e.5: enabled 1 + PNP: 002e.7: enabled 0 + PNP: 002e.8: enabled 0 + PNP: 002e.9: enabled 1 + PNP: 002e.a: enabled 0 + PNP: 002e.b: enabled 1 + PCI: 00:01.1: enabled 1 + I2C: 00:50: enabled 1 + I2C: 00:51: enabled 1 + I2C: 00:52: enabled 1 + I2C: 00:53: enabled 1 + I2C: 00:54: enabled 1 + I2C: 00:55: enabled 1 + I2C: 00:56: enabled 1 + I2C: 00:57: enabled 1 + I2C: 00:2f: enabled 1 + PCI: 00:02.0: enabled 1 + PCI: 00:02.1: enabled 1 + PCI: 00:04.0: enabled 0 + PCI: 00:04.1: enabled 0 + PCI: 00:06.0: enabled 1 + PCI: 00:07.0: enabled 1 + PCI: 00:08.0: enabled 1 + PCI: 00:09.0: enabled 1 + PCI: 00:04.0: enabled 1 + PCI: 00:0a.0: enabled 0 + PCI: 00:0b.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0c.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0d.0: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:0e.0: enabled 1 + PCI: 00:0f.0: enabled 0 + PCI: 00:18.1: enabled 1 + PCI: 00:18.2: enabled 1 + PCI: 00:18.3: enabled 1 + PCI: 00:18.4: enabled 1 + PCI: 00:19.0: enabled 1 + PCI: 00:19.1: enabled 1 + PCI: 00:19.2: enabled 1 + PCI: 00:19.3: enabled 1 + PCI: 00:19.4: enabled 1 +Root Device scanning... +root_dev_scan_bus for Root Device +setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 +setup_bsp_ramtop, TOP MEM2: msr.lo = 0x80000000, msr.hi = 0x00000001 +CPU_CLUSTER: 0 enabled +DOMAIN: 0000 enabled +CPU_CLUSTER: 0 scanning... +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + PCI: 00:18.3 siblings=3 +CPU: APIC: 00 enabled +CPU: APIC: 01 enabled +CPU: APIC: 02 enabled +CPU: APIC: 03 enabled + PCI: 00:19.3 siblings=3 +CPU: APIC: 04 enabled +CPU: APIC: 05 enabled +CPU: APIC: 06 enabled +CPU: APIC: 07 enabled +DOMAIN: 0000 scanning... +PCI: pci_scan_bus for bus 00 +PCI: 00:18.0 [1022/1200] bus ops +PCI: 00:18.0 [1022/1200] enabled +PCI: 00:18.1 [1022/1201] enabled +PCI: 00:18.2 [1022/1202] enabled +PCI: 00:18.3 [1022/1203] ops +PCI: 00:18.3 [1022/1203] enabled +PCI: 00:18.4 [1022/1204] enabled +PCI: 00:19.0 [1022/1200] bus ops +PCI: 00:19.0 [1022/1200] enabled +PCI: 00:19.1 [1022/1201] enabled +PCI: 00:19.2 [1022/1202] enabled +PCI: 00:19.3 [1022/1203] ops +PCI: 00:19.3 [1022/1203] enabled +PCI: 00:19.4 [1022/1204] enabled +PCI: 00:18.0 scanning... +PCI: 00:00.0 [10de/005e] ops +PCI: 00:00.0 [10de/005e] enabled +Capability: type 0x08 @ 0x44 +flags: 0x01e0 +PCI: 00:00.0 count: 000f static_count: 0010 +PCI: 00:00.0 [10de/005e] enabled next_unitid: 0010 +PCI: pci_scan_bus for bus 00 +PCI: 00:00.0 [10de/005e] enabled +PCI: 00:01.0 [10de/0051] bus ops +PCI: 00:01.0 [10de/0051] enabled +PCI: 00:01.1 [10de/0052] bus ops +PCI: 00:01.1 [10de/0052] enabled +PCI: 00:02.0 [10de/005a] ops +PCI: 00:02.0 [10de/005a] enabled +PCI: 00:02.1 [10de/005b] ops +PCI: 00:02.1 [10de/005b] enabled +PCI: 00:04.0 [10de/0059] ops +PCI: 00:04.0 [10de/0059] disabled +PCI: 00:04.1 [10de/0058] ops +PCI: 00:04.1 [10de/0058] disabled +PCI: 00:06.0 [10de/0053] ops +PCI: 00:06.0 [10de/0053] enabled +PCI: 00:07.0 [10de/0054] ops +PCI: 00:07.0 [10de/0054] enabled +PCI: 00:08.0 [10de/0055] ops +PCI: 00:08.0 [10de/0055] enabled +PCI: 00:09.0 [10de/005c] bus ops +PCI: 00:09.0 [10de/005c] enabled +PCI: 00:0b.0 [10de/005d] bus ops +PCI: 00:0b.0 [10de/005d] enabled +PCI: 00:0c.0 [10de/005d] bus ops +PCI: 00:0c.0 [10de/005d] enabled +PCI: 00:0d.0 [10de/005d] bus ops +PCI: 00:0d.0 [10de/005d] enabled +PCI: 00:0e.0 [10de/005d] bus ops +PCI: 00:0e.0 [10de/005d] enabled +PCI: 00:01.0 scanning... +scan_lpc_bus for PCI: 00:01.0 +PNP: 002e.0 enabled +PNP: 002e.1 disabled +PNP: 002e.2 enabled +PNP: 002e.3 enabled +PNP: 002e.5 enabled +PNP: 002e.7 disabled +PNP: 002e.8 disabled +PNP: 002e.9 enabled +PNP: 002e.a disabled +PNP: 002e.b enabled +scan_lpc_bus for PCI: 00:01.0 done +PCI: 00:01.1 scanning... +scan_smbus for PCI: 00:01.1 +smbus: PCI: 00:01.1[0]->I2C: 01:50 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:51 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:52 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:53 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:54 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:55 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:56 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:57 enabled +smbus: PCI: 00:01.1[0]->I2C: 01:2f enabled +scan_smbus for PCI: 00:01.1 done +PCI: 00:09.0 scanning... +do_pci_scan_bridge for PCI: 00:09.0 +PCI: pci_scan_bus for bus 01 +PCI: 01:04.0 [18ca/0020] ops +PCI: 01:04.0 [18ca/0020] enabled +PCI: 00:0b.0 scanning... +do_pci_scan_bridge for PCI: 00:0b.0 +PCI: pci_scan_bus for bus 02 +PCI: 02:00.0 [14e4/1659] enabled +PCI: 00:0c.0 scanning... +do_pci_scan_bridge for PCI: 00:0c.0 +PCI: pci_scan_bus for bus 03 +PCI: 03:00.0 [14e4/1659] enabled +PCI: 00:0d.0 scanning... +do_pci_scan_bridge for PCI: 00:0d.0 +PCI: pci_scan_bus for bus 04 +PCI: Static device PCI: 04:00.0 not found, disabling it. +PCI: 00:0e.0 scanning... +do_pci_scan_bridge for PCI: 00:0e.0 +PCI: pci_scan_bus for bus 05 +PCI: 00:19.0 scanning... +DOMAIN: 0000 passpw: enabled +DOMAIN: 0000 passpw: enabled +root_dev_scan_bus for Root Device done +done +BS: BS_DEV_ENUMERATE times (us): entry 0 run 598144 exit 0 +found VGA at PCI: 01:04.0 +Setting up VGA for PCI: 01:04.0 +Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:09.0 +Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 +Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 +Setting PCI_BRIDGE_CTL_VGA for bridge Root Device +Allocating resources... +Reading resources... +Root Device read_resources bus 0 link: 0 +CPU_CLUSTER: 0 read_resources bus 0 link: 0 +APIC: 00 missing read_resources +APIC: 01 missing read_resources +APIC: 02 missing read_resources +APIC: 03 missing read_resources +APIC: 04 missing read_resources +APIC: 05 missing read_resources +APIC: 06 missing read_resources +APIC: 07 missing read_resources +CPU_CLUSTER: 0 read_resources bus 0 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 +PCI: 00:18.0 read_resources bus 0 link: 1 +PCI: 00:01.0 read_resources bus 0 link: 0 +PCI: 00:01.0 read_resources bus 0 link: 0 done +PCI: 00:01.1 read_resources bus 1 link: 0 +I2C: 01:50 missing read_resources +I2C: 01:51 missing read_resources +I2C: 01:52 missing read_resources +I2C: 01:53 missing read_resources +I2C: 01:54 missing read_resources +I2C: 01:55 missing read_resources +I2C: 01:56 missing read_resources +I2C: 01:57 missing read_resources +PCI: 00:01.1 read_resources bus 1 link: 0 done +PCI: 00:01.1 read_resources bus 2 link: 1 +PCI: 00:01.1 read_resources bus 2 link: 1 done +PCI: 00:09.0 read_resources bus 1 link: 0 +PCI: 00:09.0 read_resources bus 1 link: 0 done +PCI: 00:0b.0 read_resources bus 2 link: 0 +PCI: 00:0b.0 read_resources bus 2 link: 0 done +PCI: 00:0c.0 read_resources bus 3 link: 0 +PCI: 00:0c.0 read_resources bus 3 link: 0 done +PCI: 00:0d.0 read_resources bus 4 link: 0 +PCI: 00:0d.0 read_resources bus 4 link: 0 done +PCI: 00:0e.0 read_resources bus 5 link: 0 +PCI: 00:0e.0 read_resources bus 5 link: 0 done +PCI: 00:18.0 read_resources bus 0 link: 1 done +PCI: 00:18.0 read_resources bus 0 link: 0 +PCI: 00:18.0 read_resources bus 0 link: 0 done +PCI: 00:18.0 read_resources bus 0 link: 2 +PCI: 00:18.0 read_resources bus 0 link: 2 done +PCI: 00:18.0 read_resources bus 0 link: 3 +PCI: 00:18.0 read_resources bus 0 link: 3 done +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +PCI: 00:18.4 read_resources bus 0 link: 0 +PCI: 00:18.4 read_resources bus 0 link: 0 done +PCI: 00:18.4 read_resources bus 0 link: 1 +PCI: 00:18.4 read_resources bus 0 link: 1 done +PCI: 00:18.4 read_resources bus 0 link: 2 +PCI: 00:18.4 read_resources bus 0 link: 2 done +PCI: 00:18.4 read_resources bus 0 link: 3 +PCI: 00:18.4 read_resources bus 0 link: 3 done +PCI: 00:19.0 read_resources bus 0 link: 0 +PCI: 00:19.0 read_resources bus 0 link: 0 done +PCI: 00:19.0 read_resources bus 0 link: 1 +PCI: 00:19.0 read_resources bus 0 link: 1 done +PCI: 00:19.0 read_resources bus 0 link: 2 +PCI: 00:19.0 read_resources bus 0 link: 2 done +PCI: 00:19.0 read_resources bus 0 link: 3 +PCI: 00:19.0 read_resources bus 0 link: 3 done +PCI: 00:19.4 read_resources bus 0 link: 0 +PCI: 00:19.4 read_resources bus 0 link: 0 done +PCI: 00:19.4 read_resources bus 0 link: 1 +PCI: 00:19.4 read_resources bus 0 link: 1 done +PCI: 00:19.4 read_resources bus 0 link: 2 +PCI: 00:19.4 read_resources bus 0 link: 2 done +PCI: 00:19.4 read_resources bus 0 link: 3 +PCI: 00:19.4 read_resources bus 0 link: 3 done +DOMAIN: 0000 read_resources bus 0 link: 0 done +Root Device read_resources bus 0 link: 0 done +Done reading resources. +Show resources in subtree (Root Device)...After reading. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: 01 + APIC: 02 + APIC: 03 + APIC: 04 + APIC: 05 + APIC: 06 + APIC: 07 + DOMAIN: 0000 child on link 0 PCI: 00:18.0 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 + DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 + PCI: 00:18.0 child on link 0 PCI: 00:00.0 + PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8 + PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b8 + PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b0 + PCI: 00:00.0 + PCI: 00:01.0 child on link 0 PNP: 002e.0 + PCI: 00:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10 + PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 14 + PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 44 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 60 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 64 + PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 68 + PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PNP: 002e.0 + PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.3 + PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 + PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000500 index f1 + PNP: 002e.5 + PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 + PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 + PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 + PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.7 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 + PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.8 + PNP: 002e.9 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 + PNP: 002e.a + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.b + PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60 + PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 + PCI: 00:01.1 child on link 0 I2C: 01:50 + PCI: 00:01.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10 + PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 + PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 24 + I2C: 01:50 + I2C: 01:51 + I2C: 01:52 + I2C: 01:53 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:2f + PCI: 00:02.0 + PCI: 00:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 + PCI: 00:02.1 + PCI: 00:02.1 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 + PCI: 00:04.0 + PCI: 00:04.1 + PCI: 00:06.0 + PCI: 00:06.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:07.0 + PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:07.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:07.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 00:08.0 + PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:08.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 + PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24 + PCI: 00:09.0 child on link 0 PCI: 01:04.0 + PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 + PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 01:04.0 + PCI: 01:04.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 1200 index 10 + PCI: 01:04.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 14 + PCI: 01:04.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18 + PCI: 00:0a.0 + PCI: 00:0b.0 child on link 0 PCI: 02:00.0 + PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:0c.0 child on link 0 PCI: 03:00.0 + PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 03:00.0 + PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 + PCI: 00:0d.0 child on link 0 PCI: 04:00.0 + PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 04:00.0 + PCI: 00:0e.0 + PCI: 00:0e.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c + PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:0f.0 + PCI: 00:18.1 + PCI: 00:18.2 + PCI: 00:18.3 + PCI: 00:18.4 + PCI: 00:19.0 + PCI: 00:19.1 + PCI: 00:19.2 + PCI: 00:19.3 + PCI: 00:19.4 +DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff +PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 01:04.0 18 * [0x0 - 0x7f] io +PCI: 00:09.0 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done +PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff +PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done +PCI: 00:09.0 1c * [0x0 - 0xfff] io +PCI: 00:01.0 60 * [0x1000 - 0x10ff] io +PCI: 00:01.0 64 * [0x1400 - 0x14ff] io +PCI: 00:01.0 68 * [0x1800 - 0x18ff] io +PCI: 00:01.0 10 * [0x1c00 - 0x1c7f] io +PCI: 00:01.1 20 * [0x1c80 - 0x1cbf] io +PCI: 00:01.1 24 * [0x1cc0 - 0x1cff] io +PCI: 00:01.1 10 * [0x2000 - 0x201f] io +PCI: 00:06.0 20 * [0x2020 - 0x202f] io +PCI: 00:07.0 20 * [0x2030 - 0x203f] io +PCI: 00:08.0 20 * [0x2040 - 0x204f] io +PCI: 00:07.0 10 * [0x2050 - 0x2057] io +PCI: 00:07.0 18 * [0x2058 - 0x205f] io +PCI: 00:08.0 10 * [0x2060 - 0x2067] io +PCI: 00:08.0 18 * [0x2068 - 0x206f] io +PCI: 00:07.0 14 * [0x2070 - 0x2073] io +PCI: 00:07.0 1c * [0x2074 - 0x2077] io +PCI: 00:08.0 14 * [0x2078 - 0x207b] io +PCI: 00:08.0 1c * [0x207c - 0x207f] io +PCI: 00:18.0 io: base: 2080 size: 3000 align: 12 gran: 12 limit: ffff done +PCI: 00:18.0 110d8 * [0x0 - 0x2fff] io +DOMAIN: 0000 io: base: 3000 size: 3000 align: 12 gran: 0 limit: ffff done +DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff +PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff +PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:04.0 10 * [0x0 - 0x3ffffff] prefmem +PCI: 00:09.0 prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done +PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:09.0 24 * [0x0 - 0x3ffffff] prefmem +PCI: 00:18.0 prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done +PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff +PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 01:04.0 14 * [0x0 - 0x3ffff] mem +PCI: 00:09.0 mem: base: 40000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 02:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:0b.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 03:00.0 10 * [0x0 - 0xffff] mem +PCI: 00:0c.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:09.0 20 * [0x0 - 0xfffff] mem +PCI: 00:0b.0 20 * [0x100000 - 0x1fffff] mem +PCI: 00:0c.0 20 * [0x200000 - 0x2fffff] mem +PCI: 00:02.0 10 * [0x300000 - 0x300fff] mem +PCI: 00:07.0 24 * [0x301000 - 0x301fff] mem +PCI: 00:08.0 24 * [0x302000 - 0x302fff] mem +PCI: 00:02.1 10 * [0x303000 - 0x3030ff] mem +PCI: 00:18.0 mem: base: 303100 size: 400000 align: 20 gran: 20 limit: ffffffff done +PCI: 00:18.0 110b8 * [0x0 - 0x3ffffff] prefmem +PCI: 00:18.0 110b0 * [0x4000000 - 0x43fffff] mem +DOMAIN: 0000 mem: base: 4400000 size: 4400000 align: 26 gran: 0 limit: ffffffff done +avoid_fixed_resources: DOMAIN: 0000 +avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff +constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed) +constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed) +constrain_resources: PCI: 00:01.0 14 base fec00000 limit fec00fff mem (fixed) +constrain_resources: PCI: 00:01.0 10000000 base 00000000 limit 00000fff io (fixed) +avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 base f8000000 limit febfffff +Setting resources... +DOMAIN: 0000 io: base:1000 size:3000 align:12 gran:0 limit:ffff +PCI: 00:18.0 110d8 * [0x1000 - 0x3fff] io +DOMAIN: 0000 io: next_base: 4000 size: 3000 align: 12 gran: 0 done +PCI: 00:18.0 io: base:1000 size:3000 align:12 gran:12 limit:3fff +PCI: 00:09.0 1c * [0x1000 - 0x1fff] io +PCI: 00:01.0 60 * [0x2000 - 0x20ff] io +PCI: 00:01.0 64 * [0x2400 - 0x24ff] io +PCI: 00:01.0 68 * [0x2800 - 0x28ff] io +PCI: 00:01.0 10 * [0x2c00 - 0x2c7f] io +PCI: 00:01.1 20 * [0x2c80 - 0x2cbf] io +PCI: 00:01.1 24 * [0x2cc0 - 0x2cff] io +PCI: 00:01.1 10 * [0x3000 - 0x301f] io +PCI: 00:06.0 20 * [0x3020 - 0x302f] io +PCI: 00:07.0 20 * [0x3030 - 0x303f] io +PCI: 00:08.0 20 * [0x3040 - 0x304f] io +PCI: 00:07.0 10 * [0x3050 - 0x3057] io +PCI: 00:07.0 18 * [0x3058 - 0x305f] io +PCI: 00:08.0 10 * [0x3060 - 0x3067] io +PCI: 00:08.0 18 * [0x3068 - 0x306f] io +PCI: 00:07.0 14 * [0x3070 - 0x3073] io +PCI: 00:07.0 1c * [0x3074 - 0x3077] io +PCI: 00:08.0 14 * [0x3078 - 0x307b] io +PCI: 00:08.0 1c * [0x307c - 0x307f] io +PCI: 00:18.0 io: next_base: 3080 size: 3000 align: 12 gran: 12 done +PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff +PCI: 01:04.0 18 * [0x1000 - 0x107f] io +PCI: 00:09.0 io: next_base: 1080 size: 1000 align: 12 gran: 12 done +PCI: 00:0b.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0b.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0c.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0c.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0d.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0d.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +PCI: 00:0e.0 io: base:3fff size:0 align:12 gran:12 limit:3fff +PCI: 00:0e.0 io: next_base: 3fff size: 0 align: 12 gran: 12 done +DOMAIN: 0000 mem: base:f8000000 size:4400000 align:26 gran:0 limit:febfffff +PCI: 00:18.0 110b8 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:18.0 110b0 * [0xfc000000 - 0xfc3fffff] mem +DOMAIN: 0000 mem: next_base: fc400000 size: 4400000 align: 26 gran: 0 done +PCI: 00:18.0 prefmem: base:f8000000 size:4000000 align:26 gran:20 limit:fbffffff +PCI: 00:09.0 24 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:18.0 prefmem: next_base: fc000000 size: 4000000 align: 26 gran: 20 done +PCI: 00:09.0 prefmem: base:f8000000 size:4000000 align:26 gran:20 limit:fbffffff +PCI: 01:04.0 10 * [0xf8000000 - 0xfbffffff] prefmem +PCI: 00:09.0 prefmem: next_base: fc000000 size: 4000000 align: 26 gran: 20 done +PCI: 00:0b.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0b.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0c.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0c.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0d.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0d.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:0e.0 prefmem: base:fbffffff size:0 align:20 gran:20 limit:fbffffff +PCI: 00:0e.0 prefmem: next_base: fbffffff size: 0 align: 20 gran: 20 done +PCI: 00:18.0 mem: base:fc000000 size:400000 align:20 gran:20 limit:fc3fffff +PCI: 00:09.0 20 * [0xfc000000 - 0xfc0fffff] mem +PCI: 00:0b.0 20 * [0xfc100000 - 0xfc1fffff] mem +PCI: 00:0c.0 20 * [0xfc200000 - 0xfc2fffff] mem +PCI: 00:02.0 10 * [0xfc300000 - 0xfc300fff] mem +PCI: 00:07.0 24 * [0xfc301000 - 0xfc301fff] mem +PCI: 00:08.0 24 * [0xfc302000 - 0xfc302fff] mem +PCI: 00:02.1 10 * [0xfc303000 - 0xfc3030ff] mem +PCI: 00:18.0 mem: next_base: fc303100 size: 400000 align: 20 gran: 20 done +PCI: 00:09.0 mem: base:fc000000 size:100000 align:20 gran:20 limit:fc0fffff +PCI: 01:04.0 14 * [0xfc000000 - 0xfc03ffff] mem +PCI: 00:09.0 mem: next_base: fc040000 size: 100000 align: 20 gran: 20 done +PCI: 00:0b.0 mem: base:fc100000 size:100000 align:20 gran:20 limit:fc1fffff +PCI: 02:00.0 10 * [0xfc100000 - 0xfc10ffff] mem +PCI: 00:0b.0 mem: next_base: fc110000 size: 100000 align: 20 gran: 20 done +PCI: 00:0c.0 mem: base:fc200000 size:100000 align:20 gran:20 limit:fc2fffff +PCI: 03:00.0 10 * [0xfc200000 - 0xfc20ffff] mem +PCI: 00:0c.0 mem: next_base: fc210000 size: 100000 align: 20 gran: 20 done +PCI: 00:0d.0 mem: base:fc3fffff size:0 align:20 gran:20 limit:fc3fffff +PCI: 00:0d.0 mem: next_base: fc3fffff size: 0 align: 20 gran: 20 done +PCI: 00:0e.0 mem: base:fc3fffff size:0 align:20 gran:20 limit:fc3fffff +PCI: 00:0e.0 mem: next_base: fc3fffff size: 0 align: 20 gran: 20 done +Root Device assign_resources, bus 0 link: 0 +0: mmio_basek=00300000, basek=00400000, limitk=00500000 +1: mmio_basek=00300000, basek=00500000, limitk=00600000 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device +PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io <node 0 link 1> +PCI: 00:18.0 110b8 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x14 prefmem <node 0 link 1> +PCI: 00:18.0 110b0 <- [0x00fc000000 - 0x00fc3fffff] size 0x00400000 gran 0x14 mem <node 0 link 1> +PCI: 00:18.0 assign_resources, bus 0 link: 1 +PCI: 00:01.0 10 <- [0x0000002c00 - 0x0000002c7f] size 0x00000080 gran 0x07 io +PCI: 00:01.0 60 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 64 <- [0x0000002400 - 0x00000024ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 68 <- [0x0000002800 - 0x00000028ff] size 0x00000100 gran 0x08 io +PCI: 00:01.0 assign_resources, bus 0 link: 0 +PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io +PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq +PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq +PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io +PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq +PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io +PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq +PNP: 002e.3 f1 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 io +PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io +PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io +PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq +PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq +ERROR: PNP: 002e.5 f0 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 30 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 f0 irq size: 0x0000000001 not assigned +ERROR: PNP: 002e.9 f1 irq size: 0x0000000001 not assigned +PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io +PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq +PCI: 00:01.0 assign_resources, bus 0 link: 0 +PCI: 00:01.0 14 <- [0x00fec00000 - 0x00fec00fff] size 0x00001000 gran 0x0c mem +PCI: 00:01.0 44 <- [0x00fed00000 - 0x00fed00fff] size 0x00001000 gran 0x0c mem +PCI: 00:01.1 10 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io +PCI: 00:01.1 20 <- [0x0000002c80 - 0x0000002cbf] size 0x00000040 gran 0x06 io +PCI: 00:01.1 24 <- [0x0000002cc0 - 0x0000002cff] size 0x00000040 gran 0x06 io +PCI: 00:01.1 assign_resources, bus 1 link: 0 +PCI: 00:01.1 assign_resources, bus 1 link: 0 +PCI: 00:02.0 10 <- [0x00fc300000 - 0x00fc300fff] size 0x00001000 gran 0x0c mem +PCI: 00:02.1 10 <- [0x00fc303000 - 0x00fc3030ff] size 0x00000100 gran 0x08 mem +PCI: 00:06.0 20 <- [0x0000003020 - 0x000000302f] size 0x00000010 gran 0x04 io +PCI: 00:07.0 10 <- [0x0000003050 - 0x0000003057] size 0x00000008 gran 0x03 io +PCI: 00:07.0 14 <- [0x0000003070 - 0x0000003073] size 0x00000004 gran 0x02 io +PCI: 00:07.0 18 <- [0x0000003058 - 0x000000305f] size 0x00000008 gran 0x03 io +PCI: 00:07.0 1c <- [0x0000003074 - 0x0000003077] size 0x00000004 gran 0x02 io +PCI: 00:07.0 20 <- [0x0000003030 - 0x000000303f] size 0x00000010 gran 0x04 io +PCI: 00:07.0 24 <- [0x00fc301000 - 0x00fc301fff] size 0x00001000 gran 0x0c mem +PCI: 00:08.0 10 <- [0x0000003060 - 0x0000003067] size 0x00000008 gran 0x03 io +PCI: 00:08.0 14 <- [0x0000003078 - 0x000000307b] size 0x00000004 gran 0x02 io +PCI: 00:08.0 18 <- [0x0000003068 - 0x000000306f] size 0x00000008 gran 0x03 io +PCI: 00:08.0 1c <- [0x000000307c - 0x000000307f] size 0x00000004 gran 0x02 io +PCI: 00:08.0 20 <- [0x0000003040 - 0x000000304f] size 0x00000010 gran 0x04 io +PCI: 00:08.0 24 <- [0x00fc302000 - 0x00fc302fff] size 0x00001000 gran 0x0c mem +PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io +PCI: 00:09.0 24 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x14 bus 01 prefmem +PCI: 00:09.0 20 <- [0x00fc000000 - 0x00fc0fffff] size 0x00100000 gran 0x14 bus 01 mem +PCI: 00:09.0 assign_resources, bus 1 link: 0 +PCI: 01:04.0 10 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a prefmem +PCI: 01:04.0 14 <- [0x00fc000000 - 0x00fc03ffff] size 0x00040000 gran 0x12 mem +PCI: 01:04.0 18 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran 0x07 io +PCI: 00:09.0 assign_resources, bus 1 link: 0 +PCI: 00:0b.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 02 io +PCI: 00:0b.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 02 prefmem +PCI: 00:0b.0 20 <- [0x00fc100000 - 0x00fc1fffff] size 0x00100000 gran 0x14 bus 02 mem +PCI: 00:0b.0 assign_resources, bus 2 link: 0 +PCI: 02:00.0 10 <- [0x00fc100000 - 0x00fc10ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:0b.0 assign_resources, bus 2 link: 0 +PCI: 00:0c.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 03 io +PCI: 00:0c.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 03 prefmem +PCI: 00:0c.0 20 <- [0x00fc200000 - 0x00fc2fffff] size 0x00100000 gran 0x14 bus 03 mem +PCI: 00:0c.0 assign_resources, bus 3 link: 0 +PCI: 03:00.0 10 <- [0x00fc200000 - 0x00fc20ffff] size 0x00010000 gran 0x10 mem64 +PCI: 00:0c.0 assign_resources, bus 3 link: 0 +PCI: 00:0d.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 04 io +PCI: 00:0d.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 04 prefmem +PCI: 00:0d.0 20 <- [0x00fc3fffff - 0x00fc3ffffe] size 0x00000000 gran 0x14 bus 04 mem +PCI: 00:0d.0 assign_resources, bus 4 link: 0 +PCI: 00:0d.0 assign_resources, bus 4 link: 0 +PCI: 00:0e.0 1c <- [0x0000003fff - 0x0000003ffe] size 0x00000000 gran 0x0c bus 05 io +PCI: 00:0e.0 24 <- [0x00fbffffff - 0x00fbfffffe] size 0x00000000 gran 0x14 bus 05 prefmem +PCI: 00:0e.0 20 <- [0x00fc3fffff - 0x00fc3ffffe] size 0x00000000 gran 0x14 bus 05 mem +PCI: 00:18.0 assign_resources, bus 0 link: 1 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +Root Device assign_resources, bus 0 link: 0 +Done setting resources. +Show resources in subtree (Root Device)...After assigning values. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: 01 + APIC: 02 + APIC: 03 + APIC: 04 + APIC: 05 + APIC: 06 + APIC: 07 + DOMAIN: 0000 child on link 0 PCI: 00:18.0 + DOMAIN: 0000 resource base 1000 size 3000 align 12 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base f8000000 size 4400000 align 26 gran 0 limit febfffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 + DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 + DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20 + DOMAIN: 0000 resource base 100000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 30 + DOMAIN: 0000 resource base 140000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 41 + PCI: 00:18.0 child on link 0 PCI: 00:00.0 + PCI: 00:18.0 resource base 1000 size 3000 align 12 gran 12 limit 3fff flags 60080100 index 110d8 + PCI: 00:18.0 resource base f8000000 size 4000000 align 26 gran 20 limit fbffffff flags 60081200 index 110b8 + PCI: 00:18.0 resource base fc000000 size 400000 align 20 gran 20 limit fc3fffff flags 60080200 index 110b0 + PCI: 00:00.0 + PCI: 00:01.0 child on link 0 PNP: 002e.0 + PCI: 00:01.0 resource base 2c00 size 80 align 7 gran 7 limit 2c7f flags 60000100 index 10 + PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 14 + PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 44 + PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 60 + PCI: 00:01.0 resource base 2400 size 100 align 8 gran 8 limit 24ff flags 60000100 index 64 + PCI: 00:01.0 resource base 2800 size 100 align 8 gran 8 limit 28ff flags 60000100 index 68 + PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PNP: 002e.0 + PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74 + PNP: 002e.1 + PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 + PNP: 002e.2 + PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.3 + PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 + PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000500 index f1 + PNP: 002e.5 + PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 + PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 + PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 + PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.7 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 + PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 + PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.8 + PNP: 002e.9 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0 + PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1 + PNP: 002e.a + PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 + PNP: 002e.b + PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60 + PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 + PCI: 00:01.1 child on link 0 I2C: 01:50 + PCI: 00:01.1 resource base 3000 size 20 align 5 gran 5 limit 301f flags 60000100 index 10 + PCI: 00:01.1 resource base 2c80 size 40 align 6 gran 6 limit 2cbf flags 60000100 index 20 + PCI: 00:01.1 resource base 2cc0 size 40 align 6 gran 6 limit 2cff flags 60000100 index 24 + I2C: 01:50 + I2C: 01:51 + I2C: 01:52 + I2C: 01:53 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:2f + PCI: 00:02.0 + PCI: 00:02.0 resource base fc300000 size 1000 align 12 gran 12 limit fc300fff flags 60000200 index 10 + PCI: 00:02.1 + PCI: 00:02.1 resource base fc303000 size 100 align 8 gran 8 limit fc3030ff flags 60000200 index 10 + PCI: 00:04.0 + PCI: 00:04.1 + PCI: 00:06.0 + PCI: 00:06.0 resource base 3020 size 10 align 4 gran 4 limit 302f flags 60000100 index 20 + PCI: 00:07.0 + PCI: 00:07.0 resource base 3050 size 8 align 3 gran 3 limit 3057 flags 60000100 index 10 + PCI: 00:07.0 resource base 3070 size 4 align 2 gran 2 limit 3073 flags 60000100 index 14 + PCI: 00:07.0 resource base 3058 size 8 align 3 gran 3 limit 305f flags 60000100 index 18 + PCI: 00:07.0 resource base 3074 size 4 align 2 gran 2 limit 3077 flags 60000100 index 1c + PCI: 00:07.0 resource base 3030 size 10 align 4 gran 4 limit 303f flags 60000100 index 20 + PCI: 00:07.0 resource base fc301000 size 1000 align 12 gran 12 limit fc301fff flags 60000200 index 24 + PCI: 00:08.0 + PCI: 00:08.0 resource base 3060 size 8 align 3 gran 3 limit 3067 flags 60000100 index 10 + PCI: 00:08.0 resource base 3078 size 4 align 2 gran 2 limit 307b flags 60000100 index 14 + PCI: 00:08.0 resource base 3068 size 8 align 3 gran 3 limit 306f flags 60000100 index 18 + PCI: 00:08.0 resource base 307c size 4 align 2 gran 2 limit 307f flags 60000100 index 1c + PCI: 00:08.0 resource base 3040 size 10 align 4 gran 4 limit 304f flags 60000100 index 20 + PCI: 00:08.0 resource base fc302000 size 1000 align 12 gran 12 limit fc302fff flags 60000200 index 24 + PCI: 00:09.0 child on link 0 PCI: 01:04.0 + PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c + PCI: 00:09.0 resource base f8000000 size 4000000 align 26 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:09.0 resource base fc000000 size 100000 align 20 gran 20 limit fc0fffff flags 60080202 index 20 + PCI: 01:04.0 + PCI: 01:04.0 resource base f8000000 size 4000000 align 26 gran 26 limit fbffffff flags 60001200 index 10 + PCI: 01:04.0 resource base fc000000 size 40000 align 18 gran 18 limit fc03ffff flags 60000200 index 14 + PCI: 01:04.0 resource base 1000 size 80 align 7 gran 7 limit 107f flags 60000100 index 18 + PCI: 01:04.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3 + PCI: 00:0a.0 + PCI: 00:0b.0 child on link 0 PCI: 02:00.0 + PCI: 00:0b.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0b.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0b.0 resource base fc100000 size 100000 align 20 gran 20 limit fc1fffff flags 60080202 index 20 + PCI: 02:00.0 + PCI: 02:00.0 resource base fc100000 size 10000 align 16 gran 16 limit fc10ffff flags 60000201 index 10 + PCI: 00:0c.0 child on link 0 PCI: 03:00.0 + PCI: 00:0c.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0c.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0c.0 resource base fc200000 size 100000 align 20 gran 20 limit fc2fffff flags 60080202 index 20 + PCI: 03:00.0 + PCI: 03:00.0 resource base fc200000 size 10000 align 16 gran 16 limit fc20ffff flags 60000201 index 10 + PCI: 00:0d.0 child on link 0 PCI: 04:00.0 + PCI: 00:0d.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0d.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0d.0 resource base fc3fffff size 0 align 20 gran 20 limit fc3fffff flags 60080202 index 20 + PCI: 04:00.0 + PCI: 00:0e.0 + PCI: 00:0e.0 resource base 3fff size 0 align 12 gran 12 limit 3fff flags 60080102 index 1c + PCI: 00:0e.0 resource base fbffffff size 0 align 20 gran 20 limit fbffffff flags 60081202 index 24 + PCI: 00:0e.0 resource base fc3fffff size 0 align 20 gran 20 limit fc3fffff flags 60080202 index 20 + PCI: 00:0f.0 + PCI: 00:18.1 + PCI: 00:18.2 + PCI: 00:18.3 + PCI: 00:18.4 + PCI: 00:19.0 + PCI: 00:19.1 + PCI: 00:19.2 + PCI: 00:19.3 + PCI: 00:19.4 +Done allocating resources. +BS: BS_DEV_RESOURCES times (us): entry 0 run 3268064 exit 0 +Enabling resources... +PCI: 00:18.0 cmd <- 00 +PCI: 00:18.1 subsystem <- 1043/8162 +PCI: 00:18.1 cmd <- 00 +PCI: 00:18.2 subsystem <- 1043/8162 +PCI: 00:18.2 cmd <- 00 +PCI: 00:18.3 cmd <- 00 +PCI: 00:18.4 subsystem <- 1043/8162 +PCI: 00:18.4 cmd <- 00 +PCI: 00:19.0 cmd <- 00 +PCI: 00:19.1 subsystem <- 1043/8162 +PCI: 00:19.1 cmd <- 00 +PCI: 00:19.2 subsystem <- 1043/8162 +PCI: 00:19.2 cmd <- 00 +PCI: 00:19.3 cmd <- 00 +PCI: 00:19.4 subsystem <- 1043/8162 +PCI: 00:19.4 cmd <- 00 +PCI: 00:00.0 subsystem <- 1043/8162 +PCI: 00:00.0 cmd <- 06 +PCI: 00:01.0 subsystem <- 1043/8162 +PCI: 00:01.0 cmd <- 0f +ck804 lpc decode:PNP: 002e.0, base=0x000003f0, end=0x000003f7 +ck804 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff +ck804 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff +ck804 lpc decode:PNP: 002e.3, base=0x00000004, end=0x00000004 +ck804 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 +ck804 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 +ck804 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000297 +PCI: 00:01.1 subsystem <- 1043/8162 +PCI: 00:01.1 cmd <- 01 +PCI: 00:02.0 subsystem <- 1043/8162 +PCI: 00:02.0 cmd <- 02 +PCI: 00:02.1 subsystem <- 1043/8162 +PCI: 00:02.1 cmd <- 02 +PCI: 00:06.0 subsystem <- 1043/8162 +PCI: 00:06.0 cmd <- 01 +PCI: 00:07.0 subsystem <- 1043/8162 +PCI: 00:07.0 cmd <- 03 +PCI: 00:08.0 subsystem <- 1043/8162 +PCI: 00:08.0 cmd <- 03 +PCI: 00:09.0 bridge ctrl <- 000b +PCI: 00:09.0 cmd <- 07 +PCI: 00:0b.0 bridge ctrl <- 0003 +PCI: 00:0b.0 cmd <- 06 +PCI: 00:0c.0 bridge ctrl <- 0003 +PCI: 00:0c.0 cmd <- 06 +PCI: 00:0d.0 bridge ctrl <- 0003 +PCI: 00:0d.0 cmd <- 00 +PCI: 00:0e.0 bridge ctrl <- 0003 +PCI: 00:0e.0 cmd <- 00 +PCI: 01:04.0 cmd <- 03 +PCI: 02:00.0 subsystem <- 1043/8162 +PCI: 02:00.0 cmd <- 02 +PCI: 03:00.0 subsystem <- 1043/8162 +PCI: 03:00.0 cmd <- 02 +done. +BS: BS_DEV_ENABLE times (us): entry 0 run 162780 exit 0 +Initializing devices... +Root Device init ... +Root Device init finished in 1931 usecs +CPU_CLUSTER: 0 init ... +start_eip=0x00001000, code_size=0x00000031 +CPU1: stack_base 00138000, stack_end 00138ff8 +Asserting INIT. +Waiting for send to finish... ++Deasserting INIT. +Waiting for send to finish... ++#startup loops: 2. +Sending STARTUP #1 to 1. +After apic_write. +Initializing CPU #1 +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +Sending STARTUP #2 to 1. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++nodeid = 00, coreid = 01 +After Startup. +CPU2: stack_base 00137000, stack_end 00137ff8 +Enabling cache +Asserting INIT. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Waiting for send to finish... ++MTRR: Physical address space: +0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 +0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 +0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 +0x00000000c0000000 - 0x00000000f8000000 size 0x38000000 type 0 +0x00000000f8000000 - 0x00000000fc000000 size 0x04000000 type 1 +0x00000000fc000000 - 0x0000000100000000 size 0x04000000 type 0 +0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 +Deasserting INIT. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Waiting for send to finish... ++MTRR: default type WB/UC MTRR counts: 5/3. +MTRR: UC selected as default type. +MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6 +MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6 +MTRR: 2 base 0x00000000f8000000 mask 0x0000fffffc000000 type 1 +#startup loops: 2. +Sending STARTUP #1 to 2. +After apic_write. + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Startup point 1. +Waiting for send to finish... ++Setting up local apic...Sending STARTUP #2 to 2. +After apic_write. + apic_id: 0x01 done. +Startup point 1. +Waiting for send to finish... ++CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +After Startup. +siblings = 03, CPU3: stack_base 00136000, stack_end 00136ff8 +CPU #1 initialized +Asserting INIT. +Waiting for send to finish... ++Initializing CPU #2 +Deasserting INIT. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +#startup loops: 2. +Sending STARTUP #1 to 3. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++nodeid = 00, coreid = 02 +Sending STARTUP #2 to 3. +After apic_write. +Enabling cache +Startup point 1. +Waiting for send to finish... ++CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +After Startup. +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU4: stack_base 00135000, stack_end 00135ff8 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Asserting INIT. +Setting up local apic...Waiting for send to finish... ++ apic_id: 0x02 done. +Deasserting INIT. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Waiting for send to finish... ++siblings = 03, #startup loops: 2. +Sending STARTUP #1 to 4. +After apic_write. +CPU #2 initialized +Startup point 1. +Waiting for send to finish... ++Initializing CPU #3 +Sending STARTUP #2 to 4. +After apic_write. +CPU: vendor AMD device 100f21 +Startup point 1. +Waiting for send to finish... ++Initializing CPU #4 +After Startup. +CPU5: stack_base 00134000, stack_end 00134ff8 +CPU: vendor AMD device 100f21 +Asserting INIT. +Waiting for send to finish... ++CPU: family 10, model 02, stepping 01 +Deasserting INIT. +Waiting for send to finish... ++nodeid = 01, coreid = 00 +#startup loops: 2. +Sending STARTUP #1 to 5. +After apic_write. +CPU: family 10, model 02, stepping 01 +Startup point 1. +Waiting for send to finish... ++Enabling cache +Sending STARTUP #2 to 5. +After apic_write. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Startup point 1. +Waiting for send to finish... ++MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +After Startup. +CPU6: stack_base 00133000, stack_end 00133ff8 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Asserting INIT. +Setting up local apic...Waiting for send to finish... ++ apic_id: 0x04 done. +Deasserting INIT. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Waiting for send to finish... ++siblings = 03, #startup loops: 2. +Sending STARTUP #1 to 6. +After apic_write. +CPU #4 initialized +Startup point 1. +Waiting for send to finish... ++nodeid = 00, coreid = 03 +Sending STARTUP #2 to 6. +After apic_write. +Initializing CPU #6 +Startup point 1. +Waiting for send to finish... ++Enabling cache +After Startup. +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +CPU7: stack_base 00132000, stack_end 00132ff8 +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Asserting INIT. +Waiting for send to finish... ++ +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Deasserting INIT. +Setting up local apic...Waiting for send to finish... ++ apic_id: 0x03 done. +#startup loops: 2. +Sending STARTUP #1 to 7. +After apic_write. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +Startup point 1. +Waiting for send to finish... ++siblings = 03, Sending STARTUP #2 to 7. +After apic_write. +CPU #3 initialized +Startup point 1. +Waiting for send to finish... ++CPU: vendor AMD device 100f21 +After Startup. +Initializing CPU #0 +Initializing CPU #5 +CPU: vendor AMD device 100f21 +CPU: family 10, model 02, stepping 01 +nodeid = 00, coreid = 00 +Enabling cache +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +Initializing CPU #7 +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU: vendor AMD device 100f21 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +CPU: family 10, model 02, stepping 01 +Setting up local apic...nodeid = 01, coreid = 02 + apic_id: 0x00 done. +CPU: family 10, model 02, stepping 01 +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +siblings = 03, CPU: vendor AMD device 100f21 +CPU #0 initialized +Waiting for 3 CPUS to stop +Enabling cache +CPU: family 10, model 02, stepping 01 +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +nodeid = 01, coreid = 01 +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Enabling cache +nodeid = 01, coreid = 03 +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +Setting up local apic... +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + + apic_id: 0x06 done. +Setting up local apic...CPU model: Quad-Core AMD Opteron(tm) Processor 8347 + apic_id: 0x05 done. +siblings = 03, Enabling cache +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +CPU #6 initialized +CPU ID 0x80000001: 100f21 +CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB +siblings = 03, MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e +MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e +CPU #5 initialized + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Waiting for 2 CPUS to stop +Setting up local apic...Waiting for 1 CPUS to stop + apic_id: 0x07 done. +CPU model: Quad-Core AMD Opteron(tm) Processor 8347 +siblings = 03, CPU #7 initialized +All AP CPUs stopped (15172 loops) +CPU1: stack: 00138000 - 00139000, lowest used address 00138c8c, stack used: 884 bytes +CPU2: stack: 00137000 - 00138000, lowest used address 00137cd4, stack used: 812 bytes +CPU3: stack: 00136000 - 00137000, lowest used address 00136cd4, stack used: 812 bytes +CPU4: stack: 00135000 - 00136000, lowest used address 00135cd4, stack used: 812 bytes +CPU5: stack: 00134000 - 00135000, lowest used address 00134cd4, stack used: 812 bytes +CPU6: stack: 00133000 - 00134000, lowest used address 00133cd4, stack used: 812 bytes +CPU7: stack: 00132000 - 00133000, lowest used address 00132cd4, stack used: 812 bytes +CPU_CLUSTER: 0 init finished in 995136 usecs +PCI: 00:18.0 init ... +PCI: 00:18.0 init finished in 2028 usecs +PCI: 00:18.1 init ... +PCI: 00:18.1 init finished in 2027 usecs +PCI: 00:18.2 init ... +PCI: 00:18.2 init finished in 2018 usecs +PCI: 00:18.3 init ... +NB: Function 3 Misc Control.. done. +PCI: 00:18.3 init finished in 5294 usecs +PCI: 00:18.4 init ... +PCI: 00:18.4 init finished in 2018 usecs +PCI: 00:19.0 init ... +PCI: 00:19.0 init finished in 2018 usecs +PCI: 00:19.1 init ... +PCI: 00:19.1 init finished in 2018 usecs +PCI: 00:19.2 init ... +PCI: 00:19.2 init finished in 2019 usecs +PCI: 00:19.3 init ... +NB: Function 3 Misc Control.. done. +PCI: 00:19.3 init finished in 5277 usecs +PCI: 00:19.4 init ... +PCI: 00:19.4 init finished in 2017 usecs +PCI: 00:00.0 init ... +PCI: 00:00.0 init finished in 2028 usecs +PCI: 00:01.0 init ... +IOAPIC: Initializing IOAPIC at 0xfec00000 +IOAPIC: Bootstrap Processor Local APIC = 0x00 +IOAPIC: Dumping registers + reg 0x0000: 0x00000000 + reg 0x0001: 0x00170011 + reg 0x0002: 0x00000000 +IOAPIC: 24 interrupts +IOAPIC: Enabling interrupts on FSB +IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 +IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 +IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 +lpc_init: pm_base = 2000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +set power on after power fail +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +RTC Init +PCI: 00:01.0 init finished in 164771 usecs +PCI: 00:02.0 init ... +PCI: 00:02.0 init finished in 2026 usecs +PCI: 00:02.1 init ... +PCI: 00:02.1 init finished in 2018 usecs +PCI: 00:06.0 init ... +IDE1 IDE0 +PCI: 00:06.0 init finished in 3096 usecs +PCI: 00:07.0 init ... +SATA S SATA P +PCI: 00:07.0 init finished in 3535 usecs +PCI: 00:08.0 init ... +SATA S SATA P +PCI: 00:08.0 init finished in 3526 usecs +PCI: 00:09.0 init ... +PCI DOMAIN mem base = 0x00f8000000 +[0x50] <-- 0xf8000000 +PCI: 00:09.0 init finished in 7192 usecs +PCI: 00:0b.0 init ... +PCI: 00:0b.0 init finished in 2018 usecs +PCI: 00:0c.0 init ... +PCI: 00:0c.0 init finished in 2019 usecs +PCI: 00:0d.0 init ... +PCI: 00:0d.0 init finished in 2019 usecs +PCI: 00:0e.0 init ... +PCI: 00:0e.0 init finished in 2019 usecs +PNP: 002e.0 init ... +PNP: 002e.0 init finished in 1939 usecs +PNP: 002e.2 init ... +PNP: 002e.2 init finished in 1929 usecs +PNP: 002e.3 init ... +PNP: 002e.3 init finished in 1930 usecs +PNP: 002e.5 init ... +Keyboard init... +PNP: 002e.5 init finished in 351037 usecs +PNP: 002e.9 init ... +PNP: 002e.9 init finished in 1928 usecs +PNP: 002e.b init ... +PNP: 002e.b init finished in 1930 usecs +smbus: PCI: 00:01.1[0]->I2C: 01:2f init ... +ID: 5ca3 +I2C: 01:2f init finished in 101155 usecs +PCI: 01:04.0 init ... +XGI Z9s: initializing video device +XGI VGA: Relocate IO address: 1000 [00001030] +XGI VGA: chipid = 31 +XGI VGA: Framebuffer at 0xf8000000, mapped to 0xf8000000, size 16384k +XGI VGA: MMIO at 0xfc000000, mapped to 0xfc000000, size 256k +XGI VGA: No or unknown bridge type detected +XGI VGA: Default mode is 800x600x16 (60Hz) +XGI VGA: Set new mode: 800x600x16-60 +PCI: 01:04.0 init finished in 42560 usecs +PCI: 02:00.0 init ... +PCI: 02:00.0 init finished in 2017 usecs +PCI: 03:00.0 init ... +PCI: 03:00.0 init finished in 2018 usecs +Devices initialized +Show all devs... After init. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +DOMAIN: 0000: enabled 1 +PCI: 00:18.0: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:01.0: enabled 1 +PNP: 002e.0: enabled 1 +PNP: 002e.1: enabled 0 +PNP: 002e.2: enabled 1 +PNP: 002e.3: enabled 1 +PNP: 002e.5: enabled 1 +PNP: 002e.7: enabled 0 +PNP: 002e.8: enabled 0 +PNP: 002e.9: enabled 1 +PNP: 002e.a: enabled 0 +PNP: 002e.b: enabled 1 +PCI: 00:01.1: enabled 1 +I2C: 01:50: enabled 1 +I2C: 01:51: enabled 1 +I2C: 01:52: enabled 1 +I2C: 01:53: enabled 1 +I2C: 01:54: enabled 1 +I2C: 01:55: enabled 1 +I2C: 01:56: enabled 1 +I2C: 01:57: enabled 1 +I2C: 01:2f: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:04.0: enabled 0 +PCI: 00:04.1: enabled 0 +PCI: 00:06.0: enabled 1 +PCI: 00:07.0: enabled 1 +PCI: 00:08.0: enabled 1 +PCI: 00:09.0: enabled 1 +PCI: 01:04.0: enabled 1 +PCI: 00:0a.0: enabled 0 +PCI: 00:0b.0: enabled 1 +PCI: 02:00.0: enabled 1 +PCI: 00:0c.0: enabled 1 +PCI: 03:00.0: enabled 1 +PCI: 00:0d.0: enabled 1 +PCI: 04:00.0: enabled 0 +PCI: 00:0e.0: enabled 1 +PCI: 00:0f.0: enabled 0 +PCI: 00:18.1: enabled 1 +PCI: 00:18.2: enabled 1 +PCI: 00:18.3: enabled 1 +PCI: 00:18.4: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:19.1: enabled 1 +PCI: 00:19.2: enabled 1 +PCI: 00:19.3: enabled 1 +PCI: 00:19.4: enabled 1 +APIC: 01: enabled 1 +APIC: 02: enabled 1 +APIC: 03: enabled 1 +APIC: 04: enabled 1 +APIC: 05: enabled 1 +APIC: 06: enabled 1 +APIC: 07: enabled 1 +BS: BS_DEV_INIT times (us): entry 0 run 1989467 exit 0 +Finalize devices... +Devices finalized +BS: BS_POST_DEVICE times (us): entry 0 run 3526 exit 0 +BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +CONFIG_LOGICAL_CPUS==1: apicid_base: 00000001 +Writing IRQ routing tables to 0xf0000...done. +Writing IRQ routing tables to 0xbffd8000...done. +PIRQ table: 224 bytes. +Wrote the mp table end at: 000f0410 - 000f05cc +Wrote the mp table end at: bffd7010 - bffd71cc +MP table: 460 bytes. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/dsdt.aml' +CBFS: Found @ offset c00 size 2644 +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/slic' +CBFS: 'fallback/slic' not found. +ACPI: Writing ACPI tables at bffb3000. +ACPI: * FACS +ACPI: * DSDT +ACPI: * FADT +pm_base: 0x2000 +ACPI: added table 1/32, length now 40 +ACPI: * SSDT +processor_brand=Quad-Core AMD Opteron(tm) Processor 8347 +Pstates algorithm ... +Pstate_freq[0] = 1900MHz Pstate_power[0] = 23040mw +Pstate_latency[0] = 5us +Pstate_freq[1] = 1700MHz Pstate_power[1] = 21385mw +Pstate_latency[1] = 5us +Pstate_freq[2] = 1400MHz Pstate_power[2] = 18787mw +Pstate_latency[2] = 5us +Pstate_freq[3] = 1200MHz Pstate_power[3] = 16770mw +Pstate_latency[3] = 5us +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +l 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +PSS: 1900MHz power 23040 control 0x0 status 0x0 +PSS: 1700MHz power 21385 control 0x1 status 0x1 +PSS: 1400MHz power 18787 control 0x2 status 0x2 +PSS: 1200MHz power 16770 control 0x3 status 0x3 +ACPI: added table 2/32, length now 44 +ACPI: * MCFG +ACPI: * TCPA +TCPA log created at bffa3000 +ACPI: added table 3/32, length now 48 +ACPI: * MADT +ACPI: added table 4/32, length now 52 +current = bffb6910 +ACPI: * SRAT at bffb6910 +SRAT: lapic cpu_index=00, node_id=00, apic_id=00 +SRAT: lapic cpu_index=01, node_id=00, apic_id=01 +SRAT: lapic cpu_index=02, node_id=00, apic_id=02 +SRAT: lapic cpu_index=03, node_id=00, apic_id=03 +SRAT: lapic cpu_index=04, node_id=01, apic_id=04 +SRAT: lapic cpu_index=05, node_id=01, apic_id=05 +SRAT: lapic cpu_index=06, node_id=01, apic_id=06 +SRAT: lapic cpu_index=07, node_id=01, apic_id=07 +set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 +set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 +set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 +set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00100000 +set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00500000, sizek=00100000 +ACPI: added table 5/32, length now 56 +ACPI: * SLIT at bffb6a88 +ACPI: added table 6/32, length now 60 +ACPI: * HPET +ACPI: added table 7/32, length now 64 +ACPI: * SRAT at bffb6b00 +SRAT: lapic cpu_index=00, node_id=00, apic_id=00 +SRAT: lapic cpu_index=01, node_id=00, apic_id=01 +SRAT: lapic cpu_index=02, node_id=00, apic_id=02 +SRAT: lapic cpu_index=03, node_id=00, apic_id=03 +SRAT: lapic cpu_index=04, node_id=01, apic_id=04 +SRAT: lapic cpu_index=05, node_id=01, apic_id=05 +SRAT: lapic cpu_index=06, node_id=01, apic_id=06 +SRAT: lapic cpu_index=07, node_id=01, apic_id=07 +set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000 +set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 +set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 +set_srat_mem: dev DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00100000 +set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00500000, sizek=00100000 +ACPI: added table 8/32, length now 68 +ACPI: * SLIT at bffb6c78 +ACPI: added table 9/32, length now 72 +ACPI: done. +ACPI tables: 15536 bytes. +smbios_write_tables: bffa2000 +Root Device (ASUS KFSN4-DRE) +CPU_CLUSTER: 0 (AMD FAM10 Root Complex) +APIC: 00 (unknown) +DOMAIN: 0000 (AMD FAM10 Root Complex) +PCI: 00:18.0 (AMD FAM10 Northbridge) +PCI: 00:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:01.0 (NVIDIA CK804 Southbridge) +PNP: 002e.0 (Winbond W83627THG Super I/O) +PNP: 002e.1 (Winbond W83627THG Super I/O) +PNP: 002e.2 (Winbond W83627THG Super I/O) +PNP: 002e.3 (Winbond W83627THG Super I/O) +PNP: 002e.5 (Winbond W83627THG Super I/O) +PNP: 002e.7 (Winbond W83627THG Super I/O) +PNP: 002e.8 (Winbond W83627THG Super I/O) +PNP: 002e.9 (Winbond W83627THG Super I/O) +PNP: 002e.a (Winbond W83627THG Super I/O) +PNP: 002e.b (Winbond W83627THG Super I/O) +PCI: 00:01.1 (NVIDIA CK804 Southbridge) +I2C: 01:50 (unknown) +I2C: 01:51 (unknown) +I2C: 01:52 (unknown) +I2C: 01:53 (unknown) +I2C: 01:54 (unknown) +I2C: 01:55 (unknown) +I2C: 01:56 (unknown) +I2C: 01:57 (unknown) +I2C: 01:2f (Nuvoton W83793 Hardware Monitor) +PCI: 00:02.0 (NVIDIA CK804 Southbridge) +PCI: 00:02.1 (NVIDIA CK804 Southbridge) +PCI: 00:04.0 (NVIDIA CK804 Southbridge) +PCI: 00:04.1 (NVIDIA CK804 Southbridge) +PCI: 00:06.0 (NVIDIA CK804 Southbridge) +PCI: 00:07.0 (NVIDIA CK804 Southbridge) +PCI: 00:08.0 (NVIDIA CK804 Southbridge) +PCI: 00:09.0 (NVIDIA CK804 Southbridge) +PCI: 01:04.0 (NVIDIA CK804 Southbridge) +PCI: 00:0a.0 (NVIDIA CK804 Southbridge) +PCI: 00:0b.0 (NVIDIA CK804 Southbridge) +PCI: 02:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0c.0 (NVIDIA CK804 Southbridge) +PCI: 03:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0d.0 (NVIDIA CK804 Southbridge) +PCI: 04:00.0 (NVIDIA CK804 Southbridge) +PCI: 00:0e.0 (NVIDIA CK804 Southbridge) +PCI: 00:0f.0 (NVIDIA CK804 Southbridge) +PCI: 00:18.1 (AMD FAM10 Northbridge) +PCI: 00:18.2 (AMD FAM10 Northbridge) +PCI: 00:18.3 (AMD FAM10 Northbridge) +PCI: 00:18.4 (AMD FAM10 Northbridge) +PCI: 00:19.0 (AMD FAM10 Northbridge) +PCI: 00:19.1 (AMD FAM10 Northbridge) +PCI: 00:19.2 (AMD FAM10 Northbridge) +PCI: 00:19.3 (AMD FAM10 Northbridge) +PCI: 00:19.4 (AMD FAM10 Northbridge) +APIC: 01 (unknown) +APIC: 02 (unknown) +APIC: 03 (unknown) +APIC: 04 (unknown) +APIC: 05 (unknown) +APIC: 06 (unknown) +APIC: 07 (unknown) +SMBIOS tables: 553 bytes. +Writing table forward entry at 0x00000500 +Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9fe4 +Table forward entry ends at 0x00000528. +... aligned to 0x00001000 +Writing coreboot table at 0xbff9a000 +rom_table_end = 0xbff9a000 +... aligned to 0xbffa0000 +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 + 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES + 1. 0000000000001000-000000000009ffff: RAM + 2. 00000000000a0000-00000000000bffff: RESERVED + 3. 00000000000c0000-00000000bff99fff: RAM + 4. 00000000bff9a000-00000000bfffffff: CONFIGURATION TABLES + 5. 00000000c0000000-00000000cfffffff: RESERVED + 6. 0000000100000000-000000017fffffff: RAM +CBFS @ 0 size ff8c0 +CBFS: Locating 'cmos_layout.bin' +CBFS: Found @ offset 140 size a90 +Wrote coreboot table at: bff9a000, 0xc08 bytes, checksum 44e8 +coreboot table: 3104 bytes. +IMD ROOT 0. bffff000 00001000 +IMD SMALL 1. bfffe000 00001000 +CAR GLOBALS 2. bfffb000 0000291c +CONSOLE 3. bffdb000 00020000 +AMDMEM INFO 4. bffd9000 0000172c +IRQ TABLE 5. bffd8000 00001000 +SMP TABLE 6. bffd7000 00001000 +ACPI 7. bffb3000 00024000 +54435041 8. bffa3000 00010000 +SMBIOS 9. bffa2000 00000800 +COREBOOT 10. bff9a000 00008000 +IMD small region: + IMD ROOT 0. bfffec00 00000400 + USBDEBUG 1. bfffeba0 00000058 + ROMSTAGE 2. bfffeb80 00000004 + GDT 3. bfffe980 00000200 +BS: BS_WRITE_TABLES times (us): entry 0 run 760427 exit 0 +CBFS provider active. +CBFS @ 0 size ff8c0 +CBFS: Locating 'fallback/payload' +CBFS: Found @ offset 29c80 size 8f395 +'fallback/payload' located at offset: 29cb8 size: 8f395 +Loading segment from rom address 0xfff29cb8 + code (compression=1) + New segment dstaddr 0x8200 memsize 0x17420 srcaddr 0xfff29d0c filesize 0x8215 +Loading segment from rom address 0xfff29cd4 + code (compression=1) + New segment dstaddr 0x100000 memsize 0x2213f0 srcaddr 0xfff31f21 filesize 0x8712c +Loading segment from rom address 0xfff29cf0 + Entry Point 0x00008200 +Bounce Buffer at bfc79000, 3277244 bytes +Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz: 0x0000000000008215 +lb: [0x0000000000100000, 0x00000000001fedcc) +Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017420 filesz: 0x0000000000008215 +using LZMA +[ 0x00008200, 00017ce3, 0x0001f620) <- fff29d0c +Clearing Segment: addr: 0x0000000000017ce3 memsz: 0x000000000000793d +dest 00008200, end 0001f620, bouncebuffer bfc79000 +Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000002213f0 filesz: 0x000000000008712c +lb: [0x0000000000100000, 0x00000000001fedcc) +segment: [0x0000000000100000, 0x000000000018712c, 0x00000000003213f0) + bounce: [0x00000000bfc79000, 0x00000000bfd0012c, 0x00000000bfe9a3f0) +Post relocation: addr: 0x00000000bfc79000 memsz: 0x00000000002213f0 filesz: 0x000000000008712c +using LZMA +[ 0xbfc79000, bfe9a3f0, 0xbfe9a3f0) <- fff31f21 +dest bfc79000, end bfe9a3f0, bouncebuffer bfc79000 +move suffix around: from bfd77dcc, to 1fedcc, amount: 122624 +Loaded segments +BS: BS_PAYLOAD_LOAD times (us): entry 0 run 819203 exit 0 +Jumping to boot code at 00008200(bff9a000) +CPU0: stack: 00139000 - 0013a000, lowest used address 00139ae0, stack used: 1312 bytes +entry = 0x00008200 +lb_start = 0x00100000 +lb_size = 0x000fedcc +buffer = 0xbfc79000 +[H[J[1;1H[?25l[m[H[J[1;1H[2;32HFREE AS IN FREEDOM + + +[m[4;2H+----------------------------------------------------------------------------+[5;2H|[5;79H|[6;2H|[6;79H|[7;2H|[7;79H|[8;2H|[8;79H|[9;2H|[9;79H|[10;2H|[10;79H|[11;2H|[11;79H|[12;2H|[12;79H|[13;2H|[13;79H|[14;2H|[14;79H|[15;2H|[15;79H|[16;2H|[16;79H|[17;2H+----------------------------------------------------------------------------+[m[18;2H[19;2H[m Use the ^ and v keys to select which entry is highlighted. + + Press enter to boot the selected OS, `e' to edit the commands + + before booting or `c' for a command-line. [5;80H [7m[5;3H*Load Operating System [m[5;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) [m[6;78H[m[m[7;3H Parse ISOLINUX menu (USB) [m[7;78H[m[m[8;3H Parse ISOLINUX menu (CD/DVD) [m[8;78H[m[m[9;3H Switch to grubtest.cfg [m[9;78H[m[m[10;3H Search for GRUB configuration (grub.cfg) outside of CBFS [m[10;78H[m[m[11;3H [m[11;78H[m[m[12;3H [m[12;78H[m[m[13;3H [m[13;78H[m[m[14;3H [m[14;78H[m[m[15;3H [m[15;78H[m[m[16;3H [m[16;78H[m[16;80H [5;78H[22;1H The highlighted entry will be executed automatically in 1s. [5;78H[22;1H The highlighted entry will be executed automatically in 0s. [5;78H[?25h[H[J[1;1H[H[J[1;1H Booting `Load Operating System' + + + + Failed to boot both default and fallback entries. + + +Press any key to continue... + +[?25l[m[H[J[1;1H[2;32HFREE AS IN FREEDOM + + +[m[4;2H+----------------------------------------------------------------------------+[5;2H|[5;79H|[6;2H|[6;79H|[7;2H|[7;79H|[8;2H|[8;79H|[9;2H|[9;79H|[10;2H|[10;79H|[11;2H|[11;79H|[12;2H|[12;79H|[13;2H|[13;79H|[14;2H|[14;79H|[15;2H|[15;79H|[16;2H|[16;79H|[17;2H+----------------------------------------------------------------------------+[m[18;2H[19;2H[m Use the ^ and v keys to select which entry is highlighted. + + Press enter to boot the selected OS, `e' to edit the commands + + before booting or `c' for a command-line. [5;80H [7m[5;3H*Load Operating System [m[5;78H[m[m[6;3H Parse ISOLINUX menu (ahci0) diff --git a/docs/hcl/text/x200s/cblog00.txt b/docs/hcl/text/x200s/cblog00.txt new file mode 100644 index 00000000..331cb643 --- /dev/null +++ b/docs/hcl/text/x200s/cblog00.txt @@ -0,0 +1,196 @@ +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +WARNING: Ignoring S4-assertion-width violation. +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using low power mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 14 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 15 + Max clock: 533 MHz + CAS: 0x01c0 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +SFF platform unsupported in RCOMP initialization. +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +Interrupted RAM init, reset required. +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using low power mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 14 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 15 + Max clock: 533 MHz + CAS: 0x01c0 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +SFF platform unsupported in RCOMP initialization. +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +Interrupted RAM init, reset required. +USB + + +coreboot-4.0-7318-g129462d Mon Dec 8 22:08:18 GMT 2014 starting... +running main(bist = 0) +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using low power mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 14 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 15 + Max clock: 533 MHz + CAS: 0x01c0 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +SFF platform unsupported in RCOMP initialization. diff --git a/docs/hcl/text/x200s/cblog01.txt b/docs/hcl/text/x200s/cblog01.txt new file mode 100644 index 00000000..afad2fed --- /dev/null +++ b/docs/hcl/text/x200s/cblog01.txt @@ -0,0 +1,1569 @@ +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +WARNING: Ignoring S4-assertion-width violation. +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using high performance mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Bank 1 populated: + Raw card type: F + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +DIMMs support 666 MHz, but chipset only runs at up to 533. Limiting... +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +Memory configured in dual-channel assymetric mode. +Memory map: +TOM = 512MB +TOLUD = 512MB +TOUUD = 512MB +REMAP: base = 65535MB + limit = 0MB +usedMEsize: 0MB +Performing Jedec initialization at address 0x00000000. +Performing Jedec initialization at address 0x08000000. +Performing Jedec initialization at address 0x10000000. +Performing Jedec initialization at address 0x18000000. +Final timings for group 0 on channel 0: 6.1.0.2.2 +Final timings for group 1 on channel 0: 6.0.2.6.1 +Final timings for group 2 on channel 0: 6.1.0.8.7 +Final timings for group 3 on channel 0: 6.1.0.7.1 +Final timings for group 0 on channel 1: 6.1.0.0.6 +Final timings for group 1 on channel 1: 6.0.2.3.4 +Final timings for group 2 on channel 1: 6.1.0.6.6 +Final timings for group 3 on channel 1: 6.1.0.3.6 +Lower bound for byte lane 0 on channel 0: 0.0 +Upper bound for byte lane 0 on channel 0: 10.1 +Final timings for byte lane 0 on channel 0: 5.0 +Lower bound for byte lane 1 on channel 0: 0.0 +Upper bound for byte lane 1 on channel 0: 11.1 +Final timings for byte lane 1 on channel 0: 5.4 +Lower bound for byte lane 2 on channel 0: 0.0 +Upper bound for byte lane 2 on channel 0: 11.3 +Final timings for byte lane 2 on channel 0: 5.5 +Lower bound for byte lane 3 on channel 0: 0.0 +Upper bound for byte lane 3 on channel 0: 10.2 +Final timings for byte lane 3 on channel 0: 5.1 +Lower bound for byte lane 4 on channel 0: 0.0 +Upper bound for byte lane 4 on channel 0: 10.2 +Final timings for byte lane 4 on channel 0: 5.1 +Lower bound for byte lane 5 on channel 0: 0.0 +Upper bound for byte lane 5 on channel 0: 8.6 +Final timings for byte lane 5 on channel 0: 4.3 +Lower bound for byte lane 6 on channel 0: 0.0 +Upper bound for byte lane 6 on channel 0: 11.2 +Final timings for byte lane 6 on channel 0: 5.5 +Lower bound for byte lane 7 on channel 0: 0.0 +Upper bound for byte lane 7 on channel 0: 9.3 +Final timings for byte lane 7 on channel 0: 4.5 +Lower bound for byte lane 0 on channel 1: 0.0 +Upper bound for byte lane 0 on channel 1: 10.0 +Final timings for byte lane 0 on channel 1: 5.0 +Lower bound for byte lane 1 on channel 1: 0.0 +Upper bound for byte lane 1 on channel 1: 11.2 +Final timings for byte lane 1 on channel 1: 5.5 +Lower bound for byte lane 2 on channel 1: 0.0 +Upper bound for byte lane 2 on channel 1: 10.3 +Final timings for byte lane 2 on channel 1: 5.1 +Lower bound for byte lane 3 on channel 1: 0.0 +Upper bound for byte lane 3 on channel 1: 9.6 +Final timings for byte lane 3 on channel 1: 4.7 +Lower bound for byte lane 4 on channel 1: 0.0 +Upper bound for byte lane 4 on channel 1: 11.3 +Final timings for byte lane 4 on channel 1: 5.5 +Lower bound for byte lane 5 on channel 1: 0.0 +Upper bound for byte lane 5 on channel 1: 8.4 +Final timings for byte lane 5 on channel 1: 4.2 +Lower bound for byte lane 6 on channel 1: 0.0 +Upper bound for byte lane 6 on channel 1: 11.2 +Final timings for byte lane 6 on channel 1: 5.5 +Lower bound for byte lane 7 on channel 1: 0.0 +Upper bound for byte lane 7 on channel 1: 9.4 +Final timings for byte lane 7 on channel 1: 4.6 +Lower bound for group 0 on channel 0: 1.6.3 +Upper bound for group 0 on channel 0: 2.2.7 +Final timings for group 0 on channel 0: 1.10.5 +Lower bound for group 1 on channel 0: 1.5.5 +Upper bound for group 1 on channel 0: 2.1.6 +Final timings for group 1 on channel 0: 1.9.5 +Lower bound for group 2 on channel 0: 2.0.0 +Upper bound for group 2 on channel 0: 2.8.7 +Final timings for group 2 on channel 0: 2.4.3 +Lower bound for group 3 on channel 0: 2.4.2 +Upper bound for group 3 on channel 0: 3.0.4 +Final timings for group 3 on channel 0: 2.8.3 +IGD decoded, subtracting 32M UMA and 4M GTT +Memory configured in dual-channel interleaved mode. +Memory map: +TOM = 8192MB +TOLUD = 3072MB +TOUUD = 9216MB +REMAP: base = 8192MB + limit = 9152MB +usedMEsize: 0MB +Enabling IGD. +Finally disabling PEG in favor of IGD. +PEG x1 disabled, SDVO disabled +ICH9 waits for VC1 negotiation... done. +ICH9 waits for port arbitration table update... done. +CBMEM: root @ bdbff000 254 entries. +exit main() +Trying CBFS ramstage loader. +CBFS: loading stage fallback/ramstage @ 0x100000 (290876 bytes), entry @ 0x100000 +EHCI debug port found in CBMEM. +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 booting... +BS: Entering BS_PRE_DEVICE state. +CBMEM: recovering 6/254 entries from root @ bdbff000 +Moving GDT to bdbda000...ok +BS: Exiting BS_PRE_DEVICE state. +BS: Entering BS_DEV_INIT_CHIPS state. +Initializing i82801ix southbridge... +BS: Exiting BS_DEV_INIT_CHIPS state. +BS: Entering BS_DEV_ENUMERATE state. +Enumerating buses... +Show all devs...Before device enumeration. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +APIC: acac: enabled 0 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:03.0: enabled 1 +PCI: 00:03.1: enabled 0 +PCI: 00:03.2: enabled 0 +PCI: 00:03.3: enabled 0 +IOAPIC: 02: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:1a.0: enabled 1 +PCI: 00:1a.1: enabled 1 +PCI: 00:1a.2: enabled 1 +PCI: 00:1a.7: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1c.2: enabled 1 +PCI: 00:1c.3: enabled 1 +PCI: 00:1c.4: enabled 0 +PCI: 00:1c.5: enabled 0 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1e.0: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 00:54: enabled 1 +I2C: 00:55: enabled 1 +I2C: 00:56: enabled 1 +I2C: 00:57: enabled 1 +I2C: 00:5c: enabled 1 +I2C: 00:5d: enabled 1 +I2C: 00:5e: enabled 1 +I2C: 00:5f: enabled 1 +PCI: 00:1f.5: enabled 0 +PCI: 00:1f.6: enabled 0 +Compare with tree... +Root Device: enabled 1 + CPU_CLUSTER: 0: enabled 1 + APIC: 00: enabled 1 + APIC: acac: enabled 0 + DOMAIN: 0000: enabled 1 + PCI: 00:00.0: enabled 1 + PCI: 00:02.0: enabled 1 + PCI: 00:02.1: enabled 1 + PCI: 00:03.0: enabled 1 + PCI: 00:03.1: enabled 0 + PCI: 00:03.2: enabled 0 + PCI: 00:03.3: enabled 0 + IOAPIC: 02: enabled 1 + PCI: 00:19.0: enabled 1 + PCI: 00:1a.0: enabled 1 + PCI: 00:1a.1: enabled 1 + PCI: 00:1a.2: enabled 1 + PCI: 00:1a.7: enabled 1 + PCI: 00:1b.0: enabled 1 + PCI: 00:1c.0: enabled 1 + PCI: 00:1c.1: enabled 1 + PCI: 00:1c.2: enabled 1 + PCI: 00:1c.3: enabled 1 + PCI: 00:1c.4: enabled 0 + PCI: 00:1c.5: enabled 0 + PCI: 00:1d.0: enabled 1 + PCI: 00:1d.1: enabled 1 + PCI: 00:1d.2: enabled 1 + PCI: 00:1d.7: enabled 1 + PCI: 00:1e.0: enabled 1 + PCI: 00:1f.0: enabled 1 + PNP: 00ff.1: enabled 1 + PNP: 00ff.2: enabled 1 + PCI: 00:1f.2: enabled 1 + PCI: 00:1f.3: enabled 1 + I2C: 00:54: enabled 1 + I2C: 00:55: enabled 1 + I2C: 00:56: enabled 1 + I2C: 00:57: enabled 1 + I2C: 00:5c: enabled 1 + I2C: 00:5d: enabled 1 + I2C: 00:5e: enabled 1 + I2C: 00:5f: enabled 1 + PCI: 00:1f.5: enabled 0 + PCI: 00:1f.6: enabled 0 +scan_static_bus for Root Device +CPU_CLUSTER: 0 enabled +Normal boot. +DOMAIN: 0000 enabled +DOMAIN: 0000 scanning... +PCI: pci_scan_bus for bus 00 +PCI: 00:00.0 [8086/2a40] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:02.0 [8086/0000] ops +PCI: 00:02.0 [8086/2a42] enabled +PCI: 00:02.1 [8086/2a43] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: Static device PCI: 00:03.0 not found, disabling it. +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:19.0 [8086/10f5] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1a.0 [8086/2937] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1a.1 [8086/2938] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1a.2 [8086/2939] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:1a.7 [8086/0000] ops +PCI: 00:1a.7 [8086/293c] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1b.0 [8086/293e] ops +PCI: 00:1b.0 [8086/293e] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1c.0 [8086/0000] bus ops +PCI: 00:1c.0 [8086/2940] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1c.1 [8086/0000] bus ops +PCI: 00:1c.1 [8086/2942] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1c.2 [8086/0000] bus ops +PCI: 00:1c.2 [8086/2944] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1c.3 [8086/0000] bus ops +PCI: 00:1c.3 [8086/2946] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:1d.0 [8086/2934] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1d.1 [8086/2935] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1d.2 [8086/2936] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:1d.7 [8086/0000] ops +PCI: 00:1d.7 [8086/293a] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1e.0 [8086/0000] bus ops +PCI: 00:1e.0 [8086/2448] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1f.0 [8086/0000] bus ops +PCI: 00:1f.0 [8086/2917] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: 00:1f.2 [8086/0000] ops +PCI: 00:1f.2 [8086/2928] enabled +child IOAPIC: 02 not a PCI device +PCI: 00:1f.3 [8086/0000] bus ops +PCI: 00:1f.3 [8086/2930] enabled +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +child IOAPIC: 02 not a PCI device +PCI: Left over static devices: +IOAPIC: 02 +PCI: Check your devicetree.cb. +do_pci_scan_bridge for PCI: 00:1c.0 +PCI: pci_scan_bus for bus 01 +PCI: pci_scan_bus returning with max=001 +do_pci_scan_bridge returns max 1 +do_pci_scan_bridge for PCI: 00:1c.1 +PCI: pci_scan_bus for bus 02 +PCI: pci_scan_bus returning with max=002 +do_pci_scan_bridge returns max 2 +do_pci_scan_bridge for PCI: 00:1c.2 +PCI: pci_scan_bus for bus 03 +PCI: pci_scan_bus returning with max=003 +do_pci_scan_bridge returns max 3 +do_pci_scan_bridge for PCI: 00:1c.3 +PCI: pci_scan_bus for bus 04 +PCI: pci_scan_bus returning with max=004 +do_pci_scan_bridge returns max 4 +do_pci_scan_bridge for PCI: 00:1e.0 +PCI: pci_scan_bus for bus 05 +PCI: pci_scan_bus returning with max=005 +do_pci_scan_bridge returns max 5 +scan_static_bus for PCI: 00:1f.0 +WARNING: No CMOS option 'touchpad'. +PNP: 00ff.1 enabled +recv_ec_data: 0x37 +recv_ec_data: 0x58 +recv_ec_data: 0x48 +recv_ec_data: 0x54 +recv_ec_data: 0x32 +recv_ec_data: 0x32 +recv_ec_data: 0x57 +recv_ec_data: 0x57 +recv_ec_data: 0x06 +recv_ec_data: 0x03 +recv_ec_data: 0x40 +recv_ec_data: 0x10 +EC Firmware ID 7XHT22WW-3.6, Version 4.01A +recv_ec_data: 0x00 +recv_ec_data: 0x10 +recv_ec_data: 0x20 +recv_ec_data: 0x30 +recv_ec_data: 0x00 +recv_ec_data: 0x00 +recv_ec_data: 0xa6 +recv_ec_data: 0x01 +recv_ec_data: 0x70 +dock is not connected +PNP: 00ff.2 enabled +scan_static_bus for PCI: 00:1f.0 done +scan_static_bus for PCI: 00:1f.3 +smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled +smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled +scan_static_bus for PCI: 00:1f.3 done +PCI: pci_scan_bus returning with max=005 +scan_static_bus for Root Device done +done +BS: Exiting BS_DEV_ENUMERATE state. +BS: Entering BS_DEV_RESOURCES state. +found VGA at PCI: 00:02.0 +Setting up VGA for PCI: 00:02.0 +Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 +Setting PCI_BRIDGE_CTL_VGA for bridge Root Device +Allocating resources... +Reading resources... +Root Device read_resources bus 0 link: 0 +CPU_CLUSTER: 0 read_resources bus 0 link: 0 +APIC: 00 missing read_resources +CPU_CLUSTER: 0 read_resources bus 0 link: 0 done +TOUUD 0x240000000 TOLUD 0xc0000000 TOM 0x200000000 +IGD decoded, subtracting 32M UMA and 4M GTT +Available memory below 4GB: 3036M +Available memory above 4GB: 5120M +Adding UMA memory area base=0xbdc00000 size=0x2400000 +Adding PCIe config bar base=0xf0000000 size=0x4000000 +DOMAIN: 0000 read_resources bus 0 link: 0 +More than one caller of pci_ehci_read_resources from PCI: 00:1a.7 +PCI: 00:1c.0 read_resources bus 1 link: 0 +PCI: 00:1c.0 read_resources bus 1 link: 0 done +PCI: 00:1c.1 read_resources bus 2 link: 0 +PCI: 00:1c.1 read_resources bus 2 link: 0 done +PCI: 00:1c.2 read_resources bus 3 link: 0 +PCI: 00:1c.2 read_resources bus 3 link: 0 done +PCI: 00:1c.3 read_resources bus 4 link: 0 +PCI: 00:1c.3 read_resources bus 4 link: 0 done +PCI: 00:1d.7 EHCI BAR hook registered +PCI: 00:1e.0 read_resources bus 5 link: 0 +PCI: 00:1e.0 read_resources bus 5 link: 0 done +PCI: 00:1f.0 read_resources bus 0 link: 0 +PNP: 00ff.1 missing read_resources +PNP: 00ff.2 missing read_resources +PCI: 00:1f.0 read_resources bus 0 link: 0 done +PCI: 00:1f.3 read_resources bus 1 link: 0 +PCI: 00:1f.3 read_resources bus 1 link: 0 done +DOMAIN: 0000 read_resources bus 0 link: 0 done +Root Device read_resources bus 0 link: 0 done +Done reading resources. +Show resources in subtree (Root Device)...After reading. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: acac + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 + DOMAIN: 0000 resource base c0000 size bdb40000 align 0 gran 0 limit 0 flags e0004200 index 4 + DOMAIN: 0000 resource base 100000000 size 140000000 align 0 gran 0 limit 0 flags e0004200 index 5 + DOMAIN: 0000 resource base bdc00000 size 2400000 align 0 gran 0 limit 0 flags f0000200 index 6 + DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7 + PCI: 00:00.0 + PCI: 00:02.0 + PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 + PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 + PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 20 + PCI: 00:02.1 + PCI: 00:02.1 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10 + PCI: 00:03.0 + PCI: 00:03.1 + PCI: 00:03.2 + PCI: 00:03.3 + PCI: 00:19.0 + PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 + PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 + PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 + PCI: 00:1a.0 + PCI: 00:1a.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1a.1 + PCI: 00:1a.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1a.2 + PCI: 00:1a.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1a.7 + PCI: 00:1a.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 + PCI: 00:1c.0 + PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1c.1 + PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1c.3Unknown device path type: 0 + child on link 0 + PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 +Unknown device path type: 0 + +Unknown device path type: 0 + resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 +Unknown device path type: 0 + resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 +Unknown device path type: 0 + resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 + PCI: 00:1c.4 + PCI: 00:1c.5 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10 + PCI: 00:1e.0 + PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 + PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 + PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 + PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c + PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 + PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:54 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f + PCI: 00:1f.5 + PCI: 00:1f.6 +DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff +PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +Unknown device path type: 0 + 18 * [0x0 - 0xfff] io +PCI: 00:1c.3 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done +PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff +PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done +PCI: 00:1c.3 1c * [0x0 - 0xfff] io +PCI: 00:19.0 18 * [0x1000 - 0x101f] io +PCI: 00:1a.0 20 * [0x1020 - 0x103f] io +PCI: 00:1a.1 20 * [0x1040 - 0x105f] io +PCI: 00:1a.2 20 * [0x1060 - 0x107f] io +PCI: 00:1d.0 20 * [0x1080 - 0x109f] io +PCI: 00:1d.1 20 * [0x10a0 - 0x10bf] io +PCI: 00:1d.2 20 * [0x10c0 - 0x10df] io +PCI: 00:1f.2 20 * [0x10e0 - 0x10ff] io +PCI: 00:02.0 20 * [0x1400 - 0x1407] io +PCI: 00:1f.2 10 * [0x1408 - 0x140f] io +PCI: 00:1f.2 18 * [0x1410 - 0x1417] io +PCI: 00:1f.2 14 * [0x1418 - 0x141b] io +PCI: 00:1f.2 1c * [0x141c - 0x141f] io +DOMAIN: 0000 compute_resources_io: base: 1420 size: 1420 align: 12 gran: 0 limit: ffff done +DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +Unknown device path type: 0 + 14 * [0x0 - 0x7fffff] prefmem +PCI: 00:1c.3 compute_resources_prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done +PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +Unknown device path type: 0 + 10 * [0x0 - 0x7fffff] mem +PCI: 00:1c.3 compute_resources_mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done +PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff +PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done +PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff +PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done +PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem +PCI: 00:1c.3 24 * [0x10000000 - 0x107fffff] prefmem +PCI: 00:1c.3 20 * [0x10800000 - 0x10ffffff] mem +PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem +PCI: 00:02.1 10 * [0x11400000 - 0x114fffff] mem +PCI: 00:19.0 10 * [0x11500000 - 0x1151ffff] mem +PCI: 00:1b.0 10 * [0x11520000 - 0x11523fff] mem +PCI: 00:19.0 14 * [0x11524000 - 0x11524fff] mem +PCI: 00:1f.2 24 * [0x11525000 - 0x115257ff] mem +PCI: 00:1a.7 10 * [0x11525800 - 0x11525bff] mem +PCI: 00:1d.7 10 * [0x11525c00 - 0x11525fff] mem +PCI: 00:1f.3 10 * [0x11526000 - 0x115260ff] mem +DOMAIN: 0000 compute_resources_mem: base: 11526100 size: 11526100 align: 28 gran: 0 limit: ffffffff done +avoid_fixed_resources: DOMAIN: 0000 +avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff +avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff +constrain_resources: DOMAIN: 0000 +constrain_resources: PCI: 00:00.0 +constrain_resources: PCI: 00:02.0 +constrain_resources: PCI: 00:02.1 +constrain_resources: PCI: 00:19.0 +constrain_resources: PCI: 00:1a.0 +constrain_resources: PCI: 00:1a.1 +constrain_resources: PCI: 00:1a.2 +constrain_resources: PCI: 00:1a.7 +constrain_resources: PCI: 00:1b.0 +constrain_resources: PCI: 00:1c.0 +constrain_resources: PCI: 00:1c.1 +constrain_resources: PCI: 00:1c.2 +constrain_resources: PCI: 00:1c.3 +Unknown device path type: 0 +constrain_resources: +constrain_resources: PCI: 00:1d.0 +constrain_resources: PCI: 00:1d.1 +constrain_resources: PCI: 00:1d.2 +constrain_resources: PCI: 00:1d.7 +constrain_resources: PCI: 00:1e.0 +constrain_resources: PCI: 00:1f.0 +constrain_resources: PNP: 00ff.1 +constrain_resources: PNP: 00ff.2 +skipping PNP: 00ff.2@60 fixed resource, size=0! +skipping PNP: 00ff.2@62 fixed resource, size=0! +skipping PNP: 00ff.2@64 fixed resource, size=0! +skipping PNP: 00ff.2@66 fixed resource, size=0! +constrain_resources: PCI: 00:1f.2 +constrain_resources: PCI: 00:1f.3 +constrain_resources: I2C: 01:54 +constrain_resources: I2C: 01:55 +constrain_resources: I2C: 01:56 +constrain_resources: I2C: 01:57 +constrain_resources: I2C: 01:5c +constrain_resources: I2C: 01:5d +constrain_resources: I2C: 01:5e +constrain_resources: I2C: 01:5f +avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff + lim->base 000015f0 lim->limit 0000ffff +avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff + lim->base c0000000 lim->limit efffffff +Setting resources... +DOMAIN: 0000 allocate_resources_io: base:15f0 size:1420 align:12 gran:0 limit:ffff +Assigned: PCI: 00:1c.3 1c * [0x2000 - 0x2fff] io +Assigned: PCI: 00:19.0 18 * [0x3000 - 0x301f] io +Assigned: PCI: 00:1a.0 20 * [0x3020 - 0x303f] io +Assigned: PCI: 00:1a.1 20 * [0x3040 - 0x305f] io +Assigned: PCI: 00:1a.2 20 * [0x3060 - 0x307f] io +Assigned: PCI: 00:1d.0 20 * [0x3080 - 0x309f] io +Assigned: PCI: 00:1d.1 20 * [0x30a0 - 0x30bf] io +Assigned: PCI: 00:1d.2 20 * [0x30c0 - 0x30df] io +Assigned: PCI: 00:1f.2 20 * [0x30e0 - 0x30ff] io +Assigned: PCI: 00:02.0 20 * [0x3400 - 0x3407] io +Assigned: PCI: 00:1f.2 10 * [0x3408 - 0x340f] io +Assigned: PCI: 00:1f.2 18 * [0x3410 - 0x3417] io +Assigned: PCI: 00:1f.2 14 * [0x3418 - 0x341b] io +Assigned: PCI: 00:1f.2 1c * [0x341c - 0x341f] io +DOMAIN: 0000 allocate_resources_io: next_base: 3420 size: 1420 align: 12 gran: 0 done +PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +PCI: 00:1c.3 allocate_resources_io: base:2000 size:1000 align:12 gran:12 limit:ffff +Unknown device path type: 0 +Assigned: 18 * [0x2000 - 0x2fff] io +PCI: 00:1c.3 allocate_resources_io: next_base: 3000 size: 1000 align: 12 gran: 12 done +PCI: 00:1e.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff +PCI: 00:1e.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done +DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:11526100 align:28 gran:0 limit:efffffff +Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem +Assigned: PCI: 00:1c.3 24 * [0xe0000000 - 0xe07fffff] prefmem +Assigned: PCI: 00:1c.3 20 * [0xe0800000 - 0xe0ffffff] mem +Assigned: PCI: 00:02.0 10 * [0xe1000000 - 0xe13fffff] mem +Assigned: PCI: 00:02.1 10 * [0xe1400000 - 0xe14fffff] mem +Assigned: PCI: 00:19.0 10 * [0xe1500000 - 0xe151ffff] mem +Assigned: PCI: 00:1b.0 10 * [0xe1520000 - 0xe1523fff] mem +Assigned: PCI: 00:19.0 14 * [0xe1524000 - 0xe1524fff] mem +Assigned: PCI: 00:1f.2 24 * [0xe1525000 - 0xe15257ff] mem +Assigned: PCI: 00:1a.7 10 * [0xe1525800 - 0xe1525bff] mem +Assigned: PCI: 00:1d.7 10 * [0xe1525c00 - 0xe1525fff] mem +Assigned: PCI: 00:1f.3 10 * [0xe1526000 - 0xe15260ff] mem +DOMAIN: 0000 allocate_resources_mem: next_base: e1526100 size: 11526100 align: 28 gran: 0 done +PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.0 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.0 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.1 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.1 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.2 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1c.2 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1c.3 allocate_resources_prefmem: base:e0000000 size:800000 align:22 gran:20 limit:efffffff +Unknown device path type: 0 +Assigned: 14 * [0xe0000000 - 0xe07fffff] prefmem +PCI: 00:1c.3 allocate_resources_prefmem: next_base: e0800000 size: 800000 align: 22 gran: 20 done +PCI: 00:1c.3 allocate_resources_mem: base:e0800000 size:800000 align:22 gran:20 limit:efffffff +Unknown device path type: 0 +Assigned: 10 * [0xe0800000 - 0xe0ffffff] mem +PCI: 00:1c.3 allocate_resources_mem: next_base: e1000000 size: 800000 align: 22 gran: 20 done +PCI: 00:1e.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1e.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done +PCI: 00:1e.0 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff +PCI: 00:1e.0 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done +Root Device assign_resources, bus 0 link: 0 +DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem +DOMAIN: 0000 04 <- [0x00000c0000 - 0x00bdbfffff] size 0xbdb40000 gran 0x00 mem +DOMAIN: 0000 05 <- [0x0100000000 - 0x023fffffff] size 0x140000000 gran 0x00 mem +DOMAIN: 0000 06 <- [0x00bdc00000 - 0x00bfffffff] size 0x02400000 gran 0x00 mem +DOMAIN: 0000 07 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem +DOMAIN: 0000 assign_resources, bus 0 link: 0 +PCI: 00:02.0 10 <- [0x00e1000000 - 0x00e13fffff] size 0x00400000 gran 0x16 mem64 +PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 +PCI: 00:02.0 20 <- [0x0000003400 - 0x0000003407] size 0x00000008 gran 0x03 io +PCI: 00:02.1 10 <- [0x00e1400000 - 0x00e14fffff] size 0x00100000 gran 0x14 mem64 +PCI: 00:19.0 10 <- [0x00e1500000 - 0x00e151ffff] size 0x00020000 gran 0x11 mem +PCI: 00:19.0 14 <- [0x00e1524000 - 0x00e1524fff] size 0x00001000 gran 0x0c mem +PCI: 00:19.0 18 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io +PCI: 00:1a.0 20 <- [0x0000003020 - 0x000000303f] size 0x00000020 gran 0x05 io +PCI: 00:1a.1 20 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io +PCI: 00:1a.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io +PCI: 00:1a.7 10 <- [0x00e1525800 - 0x00e1525bff] size 0x00000400 gran 0x0a mem +PCI: 00:1b.0 10 <- [0x00e1520000 - 0x00e1523fff] size 0x00004000 gran 0x0e mem64 +PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io +PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem +PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem +PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io +PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem +PCI: 00:1c.1 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 mem +PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io +PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem +PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem +PCI: 00:1c.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io +PCI: 00:1c.3 24 <- [0x00e0000000 - 0x00e07fffff] size 0x00800000 gran 0x14 bus 04 prefmem +PCI: 00:1c.3 20 <- [0x00e0800000 - 0x00e0ffffff] size 0x00800000 gran 0x14 bus 04 mem +PCI: 00:1c.3 assign_resources, bus 4 link: 0 +Unknown device path type: 0 + missing set_resources +PCI: 00:1c.3 assign_resources, bus 4 link: 0 +PCI: 00:1d.0 20 <- [0x0000003080 - 0x000000309f] size 0x00000020 gran 0x05 io +PCI: 00:1d.1 20 <- [0x00000030a0 - 0x00000030bf] size 0x00000020 gran 0x05 io +PCI: 00:1d.2 20 <- [0x00000030c0 - 0x00000030df] size 0x00000020 gran 0x05 io +PCI: 00:1d.7 EHCI Debug Port hook triggered +PCI: 00:1d.7 10 <- [0x00e1525c00 - 0x00e1525fff] size 0x00000400 gran 0x0a mem +PCI: 00:1d.7 EHCI Debug Port relocated +PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io +PCI: 00:1e.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 05 prefmem +PCI: 00:1e.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 05 mem +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PNP: 00ff.1 missing set_resources +PNP: 00ff.2 missing set_resources +PCI: 00:1f.0 assign_resources, bus 0 link: 0 +PCI: 00:1f.2 10 <- [0x0000003408 - 0x000000340f] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 14 <- [0x0000003418 - 0x000000341b] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 18 <- [0x0000003410 - 0x0000003417] size 0x00000008 gran 0x03 io +PCI: 00:1f.2 1c <- [0x000000341c - 0x000000341f] size 0x00000004 gran 0x02 io +PCI: 00:1f.2 20 <- [0x00000030e0 - 0x00000030ff] size 0x00000020 gran 0x05 io +PCI: 00:1f.2 24 <- [0x00e1525000 - 0x00e15257ff] size 0x00000800 gran 0x0b mem +PCI: 00:1f.3 10 <- [0x00e1526000 - 0x00e15260ff] size 0x00000100 gran 0x08 mem64 +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +PCI: 00:1f.3 assign_resources, bus 1 link: 0 +DOMAIN: 0000 assign_resources, bus 0 link: 0 +Root Device assign_resources, bus 0 link: 0 +Done setting resources. +Show resources in subtree (Root Device)...After assigning values. + Root Device child on link 0 CPU_CLUSTER: 0 + CPU_CLUSTER: 0 child on link 0 APIC: 00 + APIC: 00 + APIC: acac + DOMAIN: 0000 child on link 0 PCI: 00:00.0 + DOMAIN: 0000 resource base 15f0 size 1420 align 12 gran 0 limit ffff flags 40040100 index 10000000 + DOMAIN: 0000 resource base d0000000 size 11526100 align 28 gran 0 limit efffffff flags 40040200 index 10000100 + DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 + DOMAIN: 0000 resource base c0000 size bdb40000 align 0 gran 0 limit 0 flags e0004200 index 4 + DOMAIN: 0000 resource base 100000000 size 140000000 align 0 gran 0 limit 0 flags e0004200 index 5 + DOMAIN: 0000 resource base bdc00000 size 2400000 align 0 gran 0 limit 0 flags f0000200 index 6 + DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7 + PCI: 00:00.0 + PCI: 00:02.0 + PCI: 00:02.0 resource base e1000000 size 400000 align 22 gran 22 limit efffffff flags 60000201 index 10 + PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 + PCI: 00:02.0 resource base 3400 size 8 align 3 gran 3 limit ffff flags 60000100 index 20 + PCI: 00:02.1 + PCI: 00:02.1 resource base e1400000 size 100000 align 20 gran 20 limit efffffff flags 60000201 index 10 + PCI: 00:03.0 + PCI: 00:03.1 + PCI: 00:03.2 + PCI: 00:03.3 + PCI: 00:19.0 + PCI: 00:19.0 resource base e1500000 size 20000 align 17 gran 17 limit efffffff flags 60000200 index 10 + PCI: 00:19.0 resource base e1524000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 + PCI: 00:19.0 resource base 3000 size 20 align 5 gran 5 limit ffff flags 60000100 index 18 + PCI: 00:1a.0 + PCI: 00:1a.0 resource base 3020 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1a.1 + PCI: 00:1a.1 resource base 3040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1a.2 + PCI: 00:1a.2 resource base 3060 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1a.7 + PCI: 00:1a.7 resource base e1525800 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10 + PCI: 00:1b.0 + PCI: 00:1b.0 resource base e1520000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10 + PCI: 00:1c.0 + PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1c.1 + PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1c.2 + PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1c.3Unknown device path type: 0 + child on link 0 + PCI: 00:1c.3 resource base 2000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1c.3 resource base e0000000 size 800000 align 22 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1c.3 resource base e0800000 size 800000 align 22 gran 20 limit efffffff flags 60080202 index 20 +Unknown device path type: 0 + +Unknown device path type: 0 + resource base e0800000 size 800000 align 22 gran 22 limit efffffff flags 40000200 index 10 +Unknown device path type: 0 + resource base e0000000 size 800000 align 22 gran 22 limit efffffff flags 40001200 index 14 +Unknown device path type: 0 + resource base 2000 size 1000 align 12 gran 12 limit ffff flags 40000100 index 18 + PCI: 00:1c.4 + PCI: 00:1c.5 + PCI: 00:1d.0 + PCI: 00:1d.0 resource base 3080 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.1 + PCI: 00:1d.1 resource base 30a0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.2 + PCI: 00:1d.2 resource base 30c0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1d.7 + PCI: 00:1d.7 resource base e1525c00 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10 + PCI: 00:1e.0 + PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c + PCI: 00:1e.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 + PCI: 00:1e.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 + PCI: 00:1f.0 child on link 0 PNP: 00ff.1 + PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 + PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 + PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 + PNP: 00ff.1 + PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 + PNP: 00ff.2 + PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 + PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 + PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 + PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 + PCI: 00:1f.2 + PCI: 00:1f.2 resource base 3408 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 + PCI: 00:1f.2 resource base 3418 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 + PCI: 00:1f.2 resource base 3410 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 + PCI: 00:1f.2 resource base 341c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c + PCI: 00:1f.2 resource base 30e0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 + PCI: 00:1f.2 resource base e1525000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 24 + PCI: 00:1f.3 child on link 0 I2C: 01:54 + PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 + PCI: 00:1f.3 resource base e1526000 size 100 align 8 gran 8 limit efffffff flags 60000201 index 10 + I2C: 01:54 + I2C: 01:55 + I2C: 01:56 + I2C: 01:57 + I2C: 01:5c + I2C: 01:5d + I2C: 01:5e + I2C: 01:5f + PCI: 00:1f.5 + PCI: 00:1f.6 +Done allocating resources. +BS: Exiting BS_DEV_RESOURCES state. +BS: Entering BS_DEV_ENABLE state. +Enabling resources... +PCI: 00:00.0 subsystem <- 17aa/20e0 +PCI: 00:00.0 cmd <- 06 +PCI: 00:02.0 subsystem <- 17aa/20e4 +PCI: 00:02.0 cmd <- 03 +PCI: 00:02.1 subsystem <- 17aa/20e4 +PCI: 00:02.1 cmd <- 02 +PCI: 00:19.0 subsystem <- 0000/0000 +PCI: 00:19.0 cmd <- 103 +PCI: 00:1a.0 subsystem <- 17aa/20f0 +PCI: 00:1a.0 cmd <- 01 +PCI: 00:1a.1 subsystem <- 17aa/20f0 +PCI: 00:1a.1 cmd <- 01 +PCI: 00:1a.2 subsystem <- 17aa/20f0 +PCI: 00:1a.2 cmd <- 01 +PCI: 00:1a.7 subsystem <- 17aa/20f1 +PCI: 00:1a.7 cmd <- 102 +PCI: 00:1b.0 subsystem <- 17aa/20f2 +PCI: 00:1b.0 cmd <- 102 +PCI: 00:1c.0 bridge ctrl <- 0003 +PCI: 00:1c.0 subsystem <- 17aa/20f3 +PCI: 00:1c.0 cmd <- 100 +PCI: 00:1c.1 bridge ctrl <- 0003 +PCI: 00:1c.1 subsystem <- 17aa/20f3 +PCI: 00:1c.1 cmd <- 100 +PCI: 00:1c.2 bridge ctrl <- 0003 +PCI: 00:1c.2 subsystem <- 17aa/20f3 +PCI: 00:1c.2 cmd <- 100 +PCI: 00:1c.3 bridge ctrl <- 0003 +PCI: 00:1c.3 subsystem <- 17aa/20f3 +PCI: 00:1c.3 cmd <- 107 +PCI: 00:1d.0 subsystem <- 17aa/20f0 +PCI: 00:1d.0 cmd <- 01 +PCI: 00:1d.1 subsystem <- 17aa/20f0 +PCI: 00:1d.1 cmd <- 01 +PCI: 00:1d.2 subsystem <- 17aa/20f0 +PCI: 00:1d.2 cmd <- 01 +PCI: 00:1d.7 subsystem <- 17aa/20f1 +PCI: 00:1d.7 cmd <- 102 +PCI: 00:1e.0 bridge ctrl <- 0003 +PCI: 00:1e.0 subsystem <- 17aa/20f4 +PCI: 00:1e.0 cmd <- 100 +PCI: 00:1f.0 subsystem <- 17aa/20f5 +PCI: 00:1f.0 cmd <- 107 +PCI: 00:1f.2 subsystem <- 17aa/20f8 +PCI: 00:1f.2 cmd <- 03 +PCI: 00:1f.3 subsystem <- 17aa/20f9 +PCI: 00:1f.3 cmd <- 103 +done. +BS: Exiting BS_DEV_ENABLE state. +BS: Entering BS_DEV_INIT state. +Initializing devices... +Root Device init +Keyboard init... +No PS/2 keyboard detected. +CPU_CLUSTER: 0 init +start_eip=0x00001000, code_size=0x00000031 +Initializing SMM handler... ... pmbase = 0x0600 + +SMI_STS: MCSMI +PM1_STS: +GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 +ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 +TCO_STS: + ... raise SMI# +Initializing CPU #0 +CPU: vendor Intel device 1067a +CPU: family 06, model 17, stepping 0a +Enabling cache +microcode: sig=0x1067a pf=0x80 revision=0x0 +microcode: updated to revision 0xa0b date=2010-09-28 +CPU: Intel(R) Core(TM)2 Duo CPU L9400 @ 1.86GHz. +MTRR: Physical address space: +0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 +0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 +0x00000000000c0000 - 0x00000000bdc00000 size 0xbdb40000 type 6 +0x00000000bdc00000 - 0x00000000d0000000 size 0x12400000 type 0 +0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 +0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 +0x0000000100000000 - 0x0000000240000000 size 0x140000000 type 6 +MTRR addr 0x0-0x10 set to 6 type @ 0 +MTRR addr 0x10-0x20 set to 6 type @ 1 +MTRR addr 0x20-0x30 set to 6 type @ 2 +MTRR addr 0x30-0x40 set to 6 type @ 3 +MTRR addr 0x40-0x50 set to 6 type @ 4 +MTRR addr 0x50-0x60 set to 6 type @ 5 +MTRR addr 0x60-0x70 set to 6 type @ 6 +MTRR addr 0x70-0x80 set to 6 type @ 7 +MTRR addr 0x80-0x84 set to 6 type @ 8 +MTRR addr 0x84-0x88 set to 6 type @ 9 +MTRR addr 0x88-0x8c set to 6 type @ 10 +MTRR addr 0x8c-0x90 set to 6 type @ 11 +MTRR addr 0x90-0x94 set to 6 type @ 12 +MTRR addr 0x94-0x98 set to 6 type @ 13 +MTRR addr 0x98-0x9c set to 6 type @ 14 +MTRR addr 0x9c-0xa0 set to 6 type @ 15 +MTRR addr 0xa0-0xa4 set to 0 type @ 16 +MTRR addr 0xa4-0xa8 set to 0 type @ 17 +MTRR addr 0xa8-0xac set to 0 type @ 18 +MTRR addr 0xac-0xb0 set to 0 type @ 19 +MTRR addr 0xb0-0xb4 set to 0 type @ 20 +MTRR addr 0xb4-0xb8 set to 0 type @ 21 +MTRR addr 0xb8-0xbc set to 0 type @ 22 +MTRR addr 0xbc-0xc0 set to 0 type @ 23 +MTRR addr 0xc0-0xc1 set to 6 type @ 24 +MTRR addr 0xc1-0xc2 set to 6 type @ 25 +MTRR addr 0xc2-0xc3 set to 6 type @ 26 +MTRR addr 0xc3-0xc4 set to 6 type @ 27 +MTRR addr 0xc4-0xc5 set to 6 type @ 28 +MTRR addr 0xc5-0xc6 set to 6 type @ 29 +MTRR addr 0xc6-0xc7 set to 6 type @ 30 +MTRR addr 0xc7-0xc8 set to 6 type @ 31 +MTRR addr 0xc8-0xc9 set to 6 type @ 32 +MTRR addr 0xc9-0xca set to 6 type @ 33 +MTRR addr 0xca-0xcb set to 6 type @ 34 +MTRR addr 0xcb-0xcc set to 6 type @ 35 +MTRR addr 0xcc-0xcd set to 6 type @ 36 +MTRR addr 0xcd-0xce set to 6 type @ 37 +MTRR addr 0xce-0xcf set to 6 type @ 38 +MTRR addr 0xcf-0xd0 set to 6 type @ 39 +MTRR addr 0xd0-0xd1 set to 6 type @ 40 +MTRR addr 0xd1-0xd2 set to 6 type @ 41 +MTRR addr 0xd2-0xd3 set to 6 type @ 42 +MTRR addr 0xd3-0xd4 set to 6 type @ 43 +MTRR addr 0xd4-0xd5 set to 6 type @ 44 +MTRR addr 0xd5-0xd6 set to 6 type @ 45 +MTRR addr 0xd6-0xd7 set to 6 type @ 46 +MTRR addr 0xd7-0xd8 set to 6 type @ 47 +MTRR addr 0xd8-0xd9 set to 6 type @ 48 +MTRR addr 0xd9-0xda set to 6 type @ 49 +MTRR addr 0xda-0xdb set to 6 type @ 50 +MTRR addr 0xdb-0xdc set to 6 type @ 51 +MTRR addr 0xdc-0xdd set to 6 type @ 52 +MTRR addr 0xdd-0xde set to 6 type @ 53 +MTRR addr 0xde-0xdf set to 6 type @ 54 +MTRR addr 0xdf-0xe0 set to 6 type @ 55 +MTRR addr 0xe0-0xe1 set to 6 type @ 56 +MTRR addr 0xe1-0xe2 set to 6 type @ 57 +MTRR addr 0xe2-0xe3 set to 6 type @ 58 +MTRR addr 0xe3-0xe4 set to 6 type @ 59 +MTRR addr 0xe4-0xe5 set to 6 type @ 60 +MTRR addr 0xe5-0xe6 set to 6 type @ 61 +MTRR addr 0xe6-0xe7 set to 6 type @ 62 +MTRR addr 0xe7-0xe8 set to 6 type @ 63 +MTRR addr 0xe8-0xe9 set to 6 type @ 64 +MTRR addr 0xe9-0xea set to 6 type @ 65 +MTRR addr 0xea-0xeb set to 6 type @ 66 +MTRR addr 0xeb-0xec set to 6 type @ 67 +MTRR addr 0xec-0xed set to 6 type @ 68 +MTRR addr 0xed-0xee set to 6 type @ 69 +MTRR addr 0xee-0xef set to 6 type @ 70 +MTRR addr 0xef-0xf0 set to 6 type @ 71 +MTRR addr 0xf0-0xf1 set to 6 type @ 72 +MTRR addr 0xf1-0xf2 set to 6 type @ 73 +MTRR addr 0xf2-0xf3 set to 6 type @ 74 +MTRR addr 0xf3-0xf4 set to 6 type @ 75 +MTRR addr 0xf4-0xf5 set to 6 type @ 76 +MTRR addr 0xf5-0xf6 set to 6 type @ 77 +MTRR addr 0xf6-0xf7 set to 6 type @ 78 +MTRR addr 0xf7-0xf8 set to 6 type @ 79 +MTRR addr 0xf8-0xf9 set to 6 type @ 80 +MTRR addr 0xf9-0xfa set to 6 type @ 81 +MTRR addr 0xfa-0xfb set to 6 type @ 82 +MTRR addr 0xfb-0xfc set to 6 type @ 83 +MTRR addr 0xfc-0xfd set to 6 type @ 84 +MTRR addr 0xfd-0xfe set to 6 type @ 85 +MTRR addr 0xfe-0xff set to 6 type @ 86 +MTRR addr 0xff-0x100 set to 6 type @ 87 +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 36 bits +MTRR: default type WB/UC MTRR counts: 5/7. +MTRR: WB selected as default type. +MTRR: 0 base 0x00000000bdc00000 mask 0x0000000fffc00000 type 0 +MTRR: 1 base 0x00000000be000000 mask 0x0000000ffe000000 type 0 +MTRR: 2 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0 +MTRR: 3 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 +MTRR: 4 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0 + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x00 done. +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 0: 0, 0, 7, 0x21, 35000; encoded: 0x0721 +WARNING: No CMOS option 'hyper_threading'. +CPU: 0 2 siblings +CPU: 0 has sibling 1 +CPU #0 initialized +CPU1: stack_base 00141000, stack_end 00141ff8 +Asserting INIT. +Waiting for send to finish... ++Deasserting INIT. +Waiting for send to finish... ++#startup loops: 2. +Sending STARTUP #1 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++Sending STARTUP #2 to 1. +After apic_write. +Startup point 1. +Waiting for send to finish... ++After Startup. +Initializing CPU #1 +Waiting for 1 CPUS to stop +CPU: vendor Intel device 1067a +CPU: family 06, model 17, stepping 0a +Enabling cache +microcode: sig=0x1067a pf=0x80 revision=0x0 +microcode: updated to revision 0xa0b date=2010-09-28 +CPU: Intel(R) Core(TM)2 Duo CPU L9400 @ 1.86GHz. +MTRR: Fixed MSR 0x250 0x0606060606060606 +MTRR: Fixed MSR 0x258 0x0606060606060606 +MTRR: Fixed MSR 0x259 0x0000000000000000 +MTRR: Fixed MSR 0x268 0x0606060606060606 +MTRR: Fixed MSR 0x269 0x0606060606060606 +MTRR: Fixed MSR 0x26a 0x0606060606060606 +MTRR: Fixed MSR 0x26b 0x0606060606060606 +MTRR: Fixed MSR 0x26c 0x0606060606060606 +MTRR: Fixed MSR 0x26d 0x0606060606060606 +MTRR: Fixed MSR 0x26e 0x0606060606060606 +MTRR: Fixed MSR 0x26f 0x0606060606060606 +call enable_fixed_mtrr() +CPU physical address size: 36 bits + +MTRR check +Fixed MTRRs : Enabled +Variable MTRRs: Enabled + +Setting up local apic... apic_id: 0x01 done. +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 2: 0, 0, 6, 0x17, 15000; encoded: 0x0617 +writing P-State 1: 0, 0, 7, 0x21, 35000; encoded: 0x0721 +CPU: 1 2 siblings +CPU #1 initialized +All AP CPUs stopped (4540 loops) +CPU1: stack: 00141000 - 00142000, lowest used address 00141b6c, stack used: 1172 bytes +DOMAIN: 0000 init +PCI: 00:00.0 init +PCI: 00:02.0 init +Initializing VGA without OPROM. MMIO 0xe1000000 +EDID: +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +Extracted contents: +header: 00 00 00 00 00 00 00 00 +serial number: 00 00 00 00 00 00 00 00 00 00 +version: 00 00 +basic params: 00 00 00 00 00 +chroma info: 00 00 00 00 00 00 00 00 00 00 +established: 00 00 00 +standard: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +descriptor 1: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +descriptor 3: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +descriptor 4: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +extensions: 00 +checksum: 00 + +No header found +Couldn't find GFX clock divisors +PCI: 00:02.1 init +PCI: 00:19.0 init +PCI: 00:1a.0 init +PCI: 00:1a.1 init +PCI: 00:1a.2 init +PCI: 00:1a.7 init +EHCI: Setting up controller.. done. +PCI: 00:1b.0 init +Azalia: base = e1520000 +Azalia: No codec! +PCI: 00:1c.0 init +Initializing ICH9 PCIe root port. +PCI: 00:1c.1 init +Initializing ICH9 PCIe root port. +PCI: 00:1c.2 init +Initializing ICH9 PCIe root port. +PCI: 00:1c.3 init +Initializing ICH9 PCIe root port. +PCI: 00:1d.0 init +PCI: 00:1d.1 init +PCI: 00:1d.2 init +PCI: 00:1d.7 init +EHCI: Setting up controller.. done. +PCI: 00:1e.0 init +PCI: 00:1f.0 init +i82801ix: lpc_init +IOAPIC: Initializing IOAPIC at 0xfec00000 +IOAPIC: Bootstrap Processor Local APIC = 0x00 +IOAPIC: ID = 0x02 +IOAPIC: Dumping registers + reg 0x0000: 0x02000000 + reg 0x0001: 0x00170020 + reg 0x0002: 0x00170020 +IOAPIC: 24 interrupts +IOAPIC: Enabling interrupts on FSB +IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 +IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 +IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 +IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 +IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 +WARNING: No CMOS option 'power_on_after_fail'. +Set power on after power failure. +WARNING: No CMOS option 'nmi'. +NMI sources disabled. +rtc_failed = 0x4 +RTC Init +RTC: Clear requested +Disabling ACPI via APMC: +done. +Locking SMM. +PCI: 00:1f.2 init +i82801ix_sata: initializing... +SATA controller in AHCI mode. +ABAR: E1525000 +PCI: 00:1f.3 init +smbus: PCI: 00:1f.3[0]->I2C: 01:54 init +smbus: PCI: 00:1f.3[0]->I2C: 01:55 init +smbus: PCI: 00:1f.3[0]->I2C: 01:56 init +smbus: PCI: 00:1f.3[0]->I2C: 01:57 init +smbus: PCI: 00:1f.3[0]->I2C: 01:5c init +Locking EEPROM RFID +init EEPROM done +smbus: PCI: 00:1f.3[0]->I2C: 01:5d init +smbus: PCI: 00:1f.3[0]->I2C: 01:5e init +smbus: PCI: 00:1f.3[0]->I2C: 01:5f init +Devices initialized +Show all devs...After init. +Root Device: enabled 1 +CPU_CLUSTER: 0: enabled 1 +APIC: 00: enabled 1 +APIC: acac: enabled 0 +DOMAIN: 0000: enabled 1 +PCI: 00:00.0: enabled 1 +PCI: 00:02.0: enabled 1 +PCI: 00:02.1: enabled 1 +PCI: 00:03.0: enabled 0 +PCI: 00:03.1: enabled 0 +PCI: 00:03.2: enabled 0 +PCI: 00:03.3: enabled 0 +IOAPIC: 02: enabled 1 +PCI: 00:19.0: enabled 1 +PCI: 00:1a.0: enabled 1 +PCI: 00:1a.1: enabled 1 +PCI: 00:1a.2: enabled 1 +PCI: 00:1a.7: enabled 1 +PCI: 00:1b.0: enabled 1 +PCI: 00:1c.0: enabled 1 +PCI: 00:1c.1: enabled 1 +PCI: 00:1c.2: enabled 1 +PCI: 00:1c.3: enabled 1 +PCI: 00:1c.4: enabled 0 +PCI: 00:1c.5: enabled 0 +PCI: 00:1d.0: enabled 1 +PCI: 00:1d.1: enabled 1 +PCI: 00:1d.2: enabled 1 +PCI: 00:1d.7: enabled 1 +PCI: 00:1e.0: enabled 1 +PCI: 00:1f.0: enabled 1 +PNP: 00ff.1: enabled 1 +PNP: 00ff.2: enabled 1 +PCI: 00:1f.2: enabled 1 +PCI: 00:1f.3: enabled 1 +I2C: 01:54: enabled 1 +I2C: 01:55: enabled 1 +I2C: 01:56: enabled 1 +I2C: 01:57: enabled 1 +I2C: 01:5c: enabled 1 +I2C: 01:5d: enabled 1 +I2C: 01:5e: enabled 1 +I2C: 01:5f: enabled 1 +PCI: 00:1f.5: enabled 0 +PCI: 00:1f.6: enabled 0 +Unknown device path type: 0 +: enabled 1 +APIC: 01: enabled 1 +BS: Exiting BS_DEV_INIT state. +BS: Entering BS_POST_DEVICE state. +Finalize devices... +Devices finalized +BS: Exiting BS_POST_DEVICE state. +BS: Entering BS_OS_RESUME_CHECK state. +BS: Exiting BS_OS_RESUME_CHECK state. +BS: Entering BS_WRITE_TABLES state. +Writing ISA IRQs +no IRQ found for PCI: 00:00.0 +fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:02.1 +no IRQ found for PCI: 00:19.0 +fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1a.1: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1a.2: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1a.7: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1c.0: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:1c.1 +no IRQ found for PCI: 00:1c.2 +no IRQ found for PCI: 00:1c.3 +fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:1e.0 +no IRQ found for PCI: 00:1f.0 +fixed IRQ entry for: PCI: 00:1f.2: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 2 PIN 18 +Wrote the mp table end at: 000f0010 - 000f0194 +MPTABLE len: 404 +Writing ISA IRQs +no IRQ found for PCI: 00:00.0 +fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:02.1 +no IRQ found for PCI: 00:19.0 +fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1a.1: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1a.2: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1a.7: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1c.0: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:1c.1 +no IRQ found for PCI: 00:1c.2 +no IRQ found for PCI: 00:1c.3 +fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16 +fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18 +fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16 +no IRQ found for PCI: 00:1e.0 +no IRQ found for PCI: 00:1f.0 +fixed IRQ entry for: PCI: 00:1f.2: INTB# -> IOAPIC 2 PIN 17 +fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 2 PIN 18 +Wrote the mp table end at: bdad9010 - bdad9194 +MPTABLE len: 404 +MP table: 404 bytes. +ACPI: Writing ACPI tables at bdab5000. +ACPI: * FACS +ACPI: * DSDT +ACPI: * FADT +ACPI: added table 1/32, length now 40 +ACPI: * SSDT +Found 1 CPU(s) with 2 core(s) each. +clocks between 800 and 2133 MHz. +adding 4 P-States between busratio 6 and 8, incl. P0 +PSS: 1867MHz power 35000 control 0x829 status 0x829 +PSS: 1866MHz power 35000 control 0x721 status 0x721 +PSS: 1600MHz power 15000 control 0x617 status 0x617 +PSS: 800MHz power 12000 control 0x8611 status 0x8611 +clocks between 800 and 2133 MHz. +adding 4 P-States between busratio 6 and 8, incl. P0 +PSS: 1867MHz power 35000 control 0x829 status 0x829 +PSS: 1866MHz power 35000 control 0x721 status 0x721 +PSS: 1600MHz power 15000 control 0x617 status 0x617 +PSS: 800MHz power 12000 control 0x8611 status 0x8611 +ACPI: added table 2/32, length now 44 +ACPI: * MCFG +ACPI: added table 3/32, length now 48 +ACPI: * MADT +ACPI: added table 4/32, length now 52 +current = bdab8e40 +ACPI: * DMAR +ACPI: added table 5/32, length now 56 +current = bdab8ef0 +ACPI: * HPET +ACPI: added table 6/32, length now 60 +ACPI: done. +ACPI tables: 16176 bytes. +smbios_write_tables: bdab3000 +recv_ec_data: 0x37 +recv_ec_data: 0x58 +recv_ec_data: 0x48 +recv_ec_data: 0x54 +recv_ec_data: 0x32 +recv_ec_data: 0x32 +recv_ec_data: 0x57 +recv_ec_data: 0x57 +recv_ec_data: 0x06 +recv_ec_data: 0x03 +Root Device (LENOVO ThinkPad X200) +CPU_CLUSTER: 0 (Intel GM45 Northbridge) +APIC: 00 (Socket BGA956 CPU) +APIC: acac (Intel Penryn CPU) +DOMAIN: 0000 (Intel GM45 Northbridge) +PCI: 00:00.0 (Intel GM45 Northbridge) +PCI: 00:02.0 (Intel GM45 Northbridge) +PCI: 00:02.1 (Intel GM45 Northbridge) +PCI: 00:03.0 (Intel GM45 Northbridge) +PCI: 00:03.1 (Intel GM45 Northbridge) +PCI: 00:03.2 (Intel GM45 Northbridge) +PCI: 00:03.3 (Intel GM45 Northbridge) +IOAPIC: 02 (IOAPIC) +PCI: 00:19.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1a.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1a.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1a.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1a.7 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1b.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.3 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.4 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1c.5 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1d.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1d.1 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1d.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1d.7 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1e.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1f.0 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) +PNP: 00ff.2 (Lenovo H8 EC) +PCI: 00:1f.2 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1f.3 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +I2C: 01:54 (AT24RF08C) +I2C: 01:55 (AT24RF08C) +I2C: 01:56 (AT24RF08C) +I2C: 01:57 (AT24RF08C) +I2C: 01:5c (AT24RF08C) +I2C: 01:5d (AT24RF08C) +I2C: 01:5e (AT24RF08C) +I2C: 01:5f (AT24RF08C) +PCI: 00:1f.5 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +PCI: 00:1f.6 (Intel ICH9/ICH9-M (82801Ix) Series Southbridge) +Unknown device path type: 0 + (unknown) +APIC: 01 (unknown) +SMBIOS tables: 436 bytes. +Writing table forward entry at 0x00000500 +Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9233 +Table forward entry ends at 0x00000528. +... aligned to 0x00001000 +Writing coreboot table at 0xbdaab000 +rom_table_end = 0xbdaab000 +... aligned to 0xbdab0000 + 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES + 1. 0000000000001000-000000000009ffff: RAM + 2. 00000000000c0000-00000000bdaaafff: RAM + 3. 00000000bdaab000-00000000bdbfffff: CONFIGURATION TABLES + 4. 00000000bdc00000-00000000bfffffff: RESERVED + 5. 00000000f0000000-00000000f3ffffff: RESERVED + 6. 0000000100000000-000000023fffffff: RAM +Wrote coreboot table at: bdaab000, 0x8c8 bytes, checksum f79a +coreboot table: 2272 bytes. +CBMEM ROOT 0. bdbff000 00001000 +CAR GLOBALS 1. bdbfe000 00001000 +USBDEBUG 2. bdbfd000 00001000 +CONSOLE 3. bdbdd000 00020000 +TIME STAMP 4. bdbdc000 00001000 +ROMSTAGE 5. bdbdb000 00001000 +GDT 6. bdbda000 00001000 +ACPI RESUME 7. bdada000 00100000 +SMP TABLE 8. bdad9000 00001000 +ACPI 9. bdab5000 00024000 +ACPI GNVS 10. bdab4000 00001000 +SMBIOS 11. bdab3000 00001000 +COREBOOT 12. bdaab000 00008000 +BS: Exiting BS_WRITE_TABLES state. +BS: Entering BS_PAYLOAD_LOAD state. +CBFS: located payload @ ff8341b8, 542448 bytes. +Loading segment from rom address 0xff8341b8 + code (compression=1) + New segment dstaddr 0x8200 memsize 0x17e48 srcaddr 0xff83420c filesize 0x83fc + (cleaned up) New segment addr 0x8200 size 0x17e48 offset 0xff83420c filesize 0x83fc +Loading segment from rom address 0xff8341d4 + code (compression=1) + New segment dstaddr 0x100000 memsize 0x201538 srcaddr 0xff83c608 filesize 0x7c2a0 + (cleaned up) New segment addr 0x100000 size 0x201538 offset 0xff83c608 filesize 0x7c2a0 +Loading segment from rom address 0xff8341f0 + Entry Point 0x00008200 +Bounce Buffer at bd862000, 2393460 bytes +Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017e48 filesz: 0x00000000000083fc +lb: [0x0000000000100000, 0x000000000014703c) +Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017e48 filesz: 0x00000000000083fc +using LZMA +[ 0x00008200, 00018717, 0x00020048) <- ff83420c +Clearing Segment: addr: 0x0000000000018717 memsz: 0x0000000000007931 +dest 00008200, end 00020048, bouncebuffer bd862000 +Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000201538 filesz: 0x000000000007c2a0 +lb: [0x0000000000100000, 0x000000000014703c) +segment: [0x0000000000100000, 0x000000000017c2a0, 0x0000000000301538) + bounce: [0x00000000bd862000, 0x00000000bd8de2a0, 0x00000000bda63538) +Post relocation: addr: 0x00000000bd862000 memsz: 0x0000000000201538 filesz: 0x000000000007c2a0 +using LZMA +[ 0xbd862000, bda63538, 0xbda63538) <- ff83c608 +dest bd862000, end bda63538, bouncebuffer bd862000 +move suffix around: from bd8a903c, to 14703c, amount: 1ba4fc +Loaded segments +BS: Exiting BS_PAYLOAD_LOAD state. +BS: Entering BS_PAYLOAD_BOOT state. +ICH7 watchdog disabled +Jumping to boot code at 00008200 +CPU0: stack: 00142000 - 00143000, lowest used address 00142a28, stack used: 1496 bytes +entry = 0x00008200 +lb_start = 0x00100000 +lb_size = 0x0004703c +buffer = 0xbd862000 diff --git a/docs/hcl/text/x200s/cblog02.txt b/docs/hcl/text/x200s/cblog02.txt new file mode 100644 index 00000000..3a590dc2 --- /dev/null +++ b/docs/hcl/text/x200s/cblog02.txt @@ -0,0 +1,77 @@ +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +WARNING: Ignoring S4-assertion-width violation. +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using high performance mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:b +2:51:b +DDR mask 5, DDR 3 +Bank 0 populated: + Raw card type: F + Row addr bits: 14 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 2 + tAAmin: 105 + tCKmin: 15 + Max clock: 533 MHz + CAS: 0x01c0 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +Memory configured in dual-channel assymetric mode. +Memory map: +TOM = 384MB +TOLUD = 384MB +TOUUD = 384MB +REMAP: base = 65535MB + limit = 0MB +usedMEsize: 0MB +Performing Jedec initialization at address 0x00000000. +Performing Jedec initialization at address 0x08000000. +Performing Jedec initialization at address 0x10000000. +Final timings for group 0 on channel 0: 6.1.0.3.2 +Final timings for group 1 on channel 0: 6.0.2.6.3 +Final timings for group 2 on channel 0: 6.1.2.0.1 +Final timings for group 3 on channel 0: 6.1.0.7.3 +Timing under-/overflow during receive-enable calibration. diff --git a/docs/hcl/text/x200s/cblog03.txt b/docs/hcl/text/x200s/cblog03.txt new file mode 100644 index 00000000..d078a48a --- /dev/null +++ b/docs/hcl/text/x200s/cblog03.txt @@ -0,0 +1,158 @@ +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +WARNING: Ignoring S4-assertion-width violation. +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using high performance mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:ff +2:51:b +DDR mask 4, DDR 3 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +DIMMs support 666 MHz, but chipset only runs at up to 533. Limiting... +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Changing memory frequency: old 3, new 6. +Setting IGD memory frequencies for VCO #1. +Memory configured in single-channel mode. +Memory map: +TOM = 128MB +TOLUD = 128MB +TOUUD = 128MB +REMAP: base = 65535MB + limit = 0MB +usedMEsize: 0MB +Performing Jedec initialization at address 0x00000000. +Final timings for group 0 on channel 1: 6.0.2.6.4 +Final timings for group 1 on channel 1: 6.0.2.6.4 +Final timings for group 2 on channel 1: 6.0.2.8.3 +Final timings for group 3 on channel 1: 6.0.2.8.6 +Lower bound for byte lane 0 on channel 1: 0.0 +Upper bound for byte lane 0 on channel 1: 10.4 +Final timings for byte lane 0 on channel 1: 5.2 +Lower bound for byte lane 1 on channel 1: 0.0 +Upper bound for byte lane 1 on channel 1: 11.2 +Final timings for byte lane 1 on channel 1: 5.5 +Lower bound for byte lane 2 on channel 1: 0.0 +Upper bound for byte lane 2 on channel 1: 10.5 +Final timings for byte lane 2 on channel 1: 5.2 +Lower bound for byte lane 3 on channel 1: 0.0 +Upper bound for byte lane 3 on channel 1: 9.7 +Final timings for byte lane 3 on channel 1: 4.7 +Timing overflow during read training. +Read training failure: lower bound. +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +Interrupted RAM init, reset required. +USB + + +coreboot-4.0-7551-ge420139-dirty Wed Dec 10 16:34:05 GMT 2014 starting... +running main(bist = 0) +Stepping B3 +2 CPU cores +AMT enabled +capable of DDR2 of 800 MHz or lower +VT-d enabled +GMCH: GS45, using high performance mode by default +TXT enabled +Render frequency: 533 MHz +IGD enabled +PCIe-to-GMCH enabled +GMCH supports DDR3 with 1067 MT or less +GMCH supports FSB with up to 1067 MHz +SMBus controller enabled. +0:50:ff +2:51:b +DDR mask 4, DDR 3 +Bank 1 populated: + Raw card type: B + Row addr bits: 15 + Col addr bits: 10 + byte width: 1 + page size: 1024 + banks: 8 + ranks: 1 + tAAmin: 105 + tCKmin: 12 + Max clock: 666 MHz + CAS: 0x07e0 +DIMMs support 666 MHz, but chipset only runs at up to 533. Limiting... +Trying CAS 7, tCK 15. +Found compatible clock / CAS pair: 533 / 7. +Timing values: + tCLK: 15 + tRAS: 20 + tRP: 7 + tRCD: 7 + tRFC: 104 + tWR: 8 + tRD: 11 + tRRD: 4 + tFAW: 20 + tWL: 6 +Setting IGD memory frequencies for VCO #1. +Memory configured in single-channel mode. +Memory map: +TOM = 128MB +TOLUD = 128MB +TOUUD = 128MB +REMAP: base = 65535MB + limit = 0MB +usedMEsize: 0MB +Performing Jedec initialization at address 0x00000000. +Final timings for group 0 on channel 1: 6.0.2.7.6 +Final timings for group 1 on channel 1: 6.0.2.6.6 +Final timings for group 2 on channel 1: 6.0.2.8.7 +Final timings for group 3 on channel 1: 6.1.0.2.5 +Lower bound for byte lane 0 on channel 1: 0.0 +Upper bound for byte lane 0 on channel 1: 10.3 +Final timings for byte lane 0 on channel 1: 5.1 +Lower bound for byte lane 1 on channel 1: 0.0 +Upper bound for byte lane 1 on channel 1: 11.3 +Final timings for byte lane 1 on channel 1: 5.5 +Lower bound for byte lane 2 on channel 1: 0.0 +Upper bound for byte lane 2 on channel 1: 10.5 +Final timings for byte lane 2 on channel 1: 5.2 +Lower bound for byte lane 3 on channel 1: 0.0 +Upper bound for byte lane 3 on channel 1: 9.6 +Final timings for byte lane 3 on channel 1: 4.7 +Timing overflow during read training. +Read training failure: lower bound. diff --git a/docs/hcl/x200.html b/docs/hcl/x200.html new file mode 100644 index 00000000..51484889 --- /dev/null +++ b/docs/hcl/x200.html @@ -0,0 +1,391 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad X200</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">ThinkPad X200</h1> + + <p> + It is believed that all X200 laptops are compatible. X200S and X200 Tablet will + also work, <a href="#x200s">depending on the configuration</a>. + </p> + <p> + It *might* be possible to put an X200 motherboard in an X201 chassis, though this is currently untested + by the libreboot project. The same may also apply between X200S and X201S; again, this is untested. + <b>It's most likely true.</b> + </p> + + <p> + There are two possible flash chip sizes for the X200: 4MiB (32Mbit) or 8MiB (64Mbit). + This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB + is SOIC-16. + </p> + + <p> + <b>The X200 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it + by using a modified descriptor: see <a href="gm45_remove_me.html">gm45_remove_me.html</a></b> (contains notes, plus + instructions) + </p> + + <p> + Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a> + </p> + + <p> + <a href="index.html">Back to previous index</a>. + </p> + </div> + + <div class="section"> + + <h2 id="compatibility_noblobs">Compatibility (without blobs)</h2> + + <div class="subsection"> + <h3 id="hwvirt">Hardware virtualization (vt-x)</h3> + <p> + The X200, when run without CPU microcode updates in coreboot, currently kernel panics + if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled + for the guest, the guest panics (but the host is fine). Working around this in QEMU + might be possible; if not, software virtualization should work fine (it's just slower). + </p> + <p> + On GM45 hardware (with libreboot), make sure that the <i>kvm</i> and <i>kvm_intel</i> kernel modules + are not loaded, when using QEMU. + </p> + <p> + The following errata datasheet from Intel might help with investigation: + <a href="http://download.intel.com/design/mobile/specupdt/320121.pdf">http://download.intel.com/design/mobile/specupdt/320121.pdf</a> + </p> + <p> + Anecdotal reports from at least 1 user suggests that some models with CPU microcode 1067a (on the CPU itself) might work with vt-x in libreboot. + </p> + </div> + + </div> + + <div class="section"> + + <h2 id="x200s">X200S and X200 Tablet.</h2> + + <p> + X200S and X200 Tablet have raminit issues at the time of writing + (GS45 chipset. X200 uses GM45). + </p> + + <p> + X200S and X200 Tablet are known to work, but only with certain CPU+RAM configurations. + The current stumbling block is RCOMP and SFF, mentioned in + <a href="https://www.cs.cmu.edu/~410/doc/minimal_boot.pdf">https://www.cs.cmu.edu/~410/doc/minimal_boot.pdf</a>. + </p> + <p> + The issues mostly relate to raminit (memory initialization). With an + unpatched coreboot, you get the following: <a href="text/x200s/cblog00.txt">text/x200s/cblog00.txt</a>. + No SODIMM combination that was tested would work. At first glance, it looks + like GS45 (chipset that X200S uses. X200 uses GM45) is unsupported, but + there is a workaround that can be used to make certain models of the X200S + work, depending on the RAM. + </p> + <p> + The datasheet for GS45 describes two modes: low-performance and + high-performance. Low performance uses the SU range of ultra-low + voltage procesors (SU9400, for example), and high-performance uses the + SL range of processors (SL9400, for example). According to datasheets, + GS45 behaves very similarly to GM45 when operating in high-performance + mode. + </p> + <p> + The theory then was that you could simply remove + the checks in coreboot and make it pass GS45 off as GM45; the idea is + that, with a high-performance mode CPU (SL9400, for example) it would + just boot up and work. + </p> + <p> + This suspicion was confirmed with the following log: + <a href="text/x200s/cblog01.txt">text/x200s/cblog01.txt</a>. + The memory modules in this case are 2x4GB. <s><b>However, not all + configurations work: <a href="text/x200s/cblog02.txt">text/x200s/cblog02.txt</a> (2x2GB) + and <a href="text/x200s/cblog03.txt">text/x200s/cblog03.txt</a> (1x2GB) + show a failed bootup.</b></s> <i>False alarm. The modules were mixed (non-matching). X200S + with high-performance mode CPU will work so long as you use matching memory modules + (doesn't matter what size).</i> + </p> + <p> + This was then pushed as a patch for coreboot, which can be found at + <a href="http://review.coreboot.org/#/c/7786/">http://review.coreboot.org/#/c/7786/</a> + (libreboot merges this patch in coreboot-libre now. Check the 'getcb' script in + src or git). + </p> + + <div class="subsection"> + <h3 id="x200s_raminit">Proper GS45 raminit</h3> + <p> + A new northbridge gs45 should be added to coreboot, based on gm45, + and a new port x200st (X200S and X200T) should be added based on + the x200 port. + </p> + <p> + This port would have proper raminit. Alternatively, gs45 (if + raminit is taken to be the only issue with it) can be part of + gm45 northbridge support (and X200S/Tablet being part of the X200 + port) with conditional checks in the raminit that make raminit + work differently (as required) for GS45. nico_h and pgeorgi/patrickg + in the coreboot IRC channel should know more about raminit on gm45 + and likely gs45. + </p> + <p> + pgeorgi recommends to run SerialICE on the factory BIOS (for X200S), + comparing it with X200 (factory BIOS) and X200 (gm45 raminit code + in coreboot), to see what the differences are. Then tweak raminit + code based on that. + </p> + </div> + + </div> + + <div class="section"> + + <h2>Trouble undocking (button doesn't work)</h2> + + <p> + This person seems to have a workaround: + <a href="https://github.com/the-unconventional/libreboot-undock">https://github.com/the-unconventional/libreboot-undock</a> + </p> + + </div> + + <div class="section"> + + <h2 id="lcd_supported_list">LCD compatibility list</h2> + + <p> + LCD panel list (X200 panels listed there): + <a href="http://www.thinkwiki.org/wiki/TFT_display">http://www.thinkwiki.org/wiki/TFT_display</a> + </p> + + <p> + All LCD panels for the X200, X200S and X200 Tablet are known to work. + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + <div class="subsection"> + <h3 id="ips"> + AFFS/IPS panels + </h3> + <h4>X200</h4> + <p> + Adapted from <a href="https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X200">https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X200</a> + </p> + <p> + Look at wikipedia for difference between TN and IPS panels. IPS have much better colour/contrast than + a regular TN, and will typically have good viewing angles. + </p> + <p> + These seem to be from the X200 tablet. You need to find one without the glass touchscreen protection on it + (might be able to remove it, though). It also must not have a digitizer on it (again, might be possible to + just simply remove the digitizer). + </p> + <ul> + <li>BOE-Hydis HV121WX4-120, HV121WX4-110 or HV121WX4-100 - cheap-ish, might be hard to find</li> + <li>Samsung LTN121AP02-001 - common to find, cheap</li> + </ul> + <p> + <b>If your X200 has an LED backlit panel in it, then you also need to get an inverter and harness cable + that is compatible with the CCFL panels. To see which panel type you have, see + <a href="#led_howtotell">#led_howtotell</a>. If you need the inverter/cable, here are part numbers: + 44C9909 for CCFL LVDS cable with bluetooth and camera connections, and 42W8009 or 42W8010 for the + inverter.</b> + </p> + <p> + There are glossy and matte versions of these. Matte means anti-glare, which is what you want (in this authors opinion). + </p> + <p> + Refer to the HMM (hardware maintenance manual) for how to replace the screen. + </p> + <p>Sources:</p> + <ul> + <li><a href="http://forum.thinkpads.com/viewtopic.php?f=2&t=84941">ThinkPad Forums - Matte AFFS Panel on X200</a></li> + <li><a href="http://forum.thinkpads.com/viewtopic.php?p=660662#p660662">ThinkPad Forums - Parts for X200 AFFS Mod</a></li> + <li><a href="http://thinkwiki.de/X200_Displayumbau">ThinkWiki.de - X200 Displayumbau</a> (achtung: du musst lesen und/oder spreche deutsch; + oder ein freund fur hilfe)</li> + </ul> + </div> + <div class="subsection"> + <h3>X200S</h3> + <p> + <a href="http://forum.thinkpads.com/viewtopic.php?p=618928#p618928">http://forum.thinkpads.com/viewtopic.php?p=618928#p618928</a> + explains that the X200S screens/assemblies are thinner. You need to replace the whole lid with one from a normal X200/X201. + </p> + </div> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + <h2 id="led_howtotell">How to tell if it has an LED or CCFL?</h2> + + <p> + Some X200s have a CCFL backlight and some have an LED backlight, in their LCD panel. This + also means that the inverters will vary, so you must be careful if ever replacing either + the panel and/or inverter. (a CCFL inverter is high-voltage and will destroy an LED backlit panel). + </p> + <p> + CCFLs contain mercury. An X200 with a CCFL backlight will (<b></b>unless it has been changed to an LED, + with the correct inverter. Check with your supplier!</b>) the following: <i>"This product + contains Lithium Ion Battery, Lithium Battery and a lamp which contains mercury; dispose according to + local, state or federal laws"</i> (one with an LED backlit panel will say something different). + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + </div> + + <div class="section"> + + <h2 id="regdumps">Hardware register dumps</h2> + + <p> + The coreboot wiki <a href="http://www.coreboot.org/Motherboard_Porting_Guide">shows</a> + how to collect various logs useful in porting to new + boards. Following are outputs from the X200: + </p> + + <ul> + <li> + BIOS 3.15, EC 1.06 + <ul> + <li><a href="hwdumps/x200/">hwdumps/x200/</a></li> + </ul> + </li> + </ul> + + </div> + + <div class="section"> + + <h1 id="ram_s3_microcode">RAM, S3 and microcode updates</h1> + + <p> + Not all memory modules work. Most of the default ones do, but you have to be careful + when upgrading to 8GiB; some modules work, some don't. + </p> + + <p> + <a href="http://www.forum.thinkpads.com/viewtopic.php?p=760721">This page</a> might be useful for RAM compatibility info + (note: coreboot raminit is different, so this page might be BS) + </p> + + <p> + pehjota started collecting some steppings for different CPUs on several X200 laptops. + You can get the CPUID by running: <br/> + $ <b>dmesg | sed -n 's/^.* microcode: CPU0 sig=0x\([^,]*\),.*$/\1/p'</b> + </p> + + <p> + What pehjota wrote: + The laptops that have issues resuming from suspend, as well as a laptop that (as I mentioned earlier in #libreboot) won't boot with any Samsung DIMMs, all have CPUID 0x10676 (stepping M0). + </p> + + <p> + What pehjota wrote: + Laptops with CPUID 0x167A (stepping R0) resume properly every time and work with Samsung DIMMs. I'll + need to do more testing on more units to better confirm these trends, but it looks like the M0 microcode + is very buggy. That would also explain why I didn't have issues with Samsung DIMMs with the Lenovo BIOS + (which would have microcode updates). I wonder if VT-x works on R0. + </p> + + <p> + What pehjota wrote: + As I said, 10676 is M0 and 1067A is R0; those are the two CPUIDs and steppings for Intel Core 2 Duo P8xxx CPUs with factory microcode. (1067 is the family and model, and 6 or A is the stepping ID.) + </p> + + <p> + <b> + TODO: check the CPUIDs and test S3 resume and/or KVM on any C2D systems (including non-P8xxx ones, which I don't have here) you have available. I'd be curious if you could confirm these results. + </b> + It might not be coreboot that's buggy with raminit/S3; it might just be down to the microcode updates. + </p> + + </div> + + <div class="section"> + + <h2 id="unsorted">Unsorted notes</h2> + +<pre> +<sgsit> do you know if it's possible to flash thinkpads over the LPC debug connector at the front edge? +<sgsit> that would make life much easier for systems like this +<sgsit> all the Wistron manufactured systems have this thing called a "golden finger", normally at the front edge of the board +<sgsit> you can plug a board in which gives diagnostic codes but i'm wondering whether it is capable of more +<sgsit> <a href="http://www.endeer.cz/bios.tools/bios.html">http://www.endeer.cz/bios.tools/bios.html</a> +</pre> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. 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+</head> + +<body> + + <div class="section"> + <h1 id="pagetop">GNU Libreboot documentation</h1> + <p> + Information about this release can be found at <a href="release.html">release.html</a>. + Always check <a href="http://libreboot.org">libreboot.org</a> for updates. + </p> + <p> + <a href="#why">What is libreboot?</a> + </p> + <p> + <a href="#version">How do I know what version I'm running?</a> + </p> + </div> + + <div class="section"> + + <h1>Table of contents</h1> + <ul> + <li><a href="hcl/index.html">Hardware compatibility list</a> - <a href="https://www.gnu.org/distros/">GNU/Linux</a> is expected to be running on your device.</li> + <li><a href="install/index.html">How to install libreboot</a></li> + <li><a href="gnulinux/index.html">How to install GNU/Linux on a libreboot system</a></li> + <li> + <a href="git/index.html">How to use the git repository and build libreboot from source</a> + <ul> + <li><a href="maintain/index.html">Maintaining libreboot</a></li> + </ul> + </li> + <li><a href="security/index.html">Hardware security</a></li> + <li><a href="hardware/index.html">Hardware maintenance</a></li> + <li><a href="depthcharge/index.html">Depthcharge payload</a></li> + <li><a href="grub/index.html">GRUB payload</a></li> + <li><a href="misc/index.html">Miscellaneous</a></li> + </ul> + + </div> + + <div class="section" id="why"> + + <h1>About the libreboot project</h1> + + <p> + GNU Libreboot is a free BIOS or UEFI replacement (<a href="https://www.gnu.org/philosophy/free-sw.html">free as in freedom</a>); + libre <em>boot firmware</em> that initializes the hardware and starts a bootloader for your operating + system. + It's also an open source BIOS, but open source <a href="https://www.gnu.org/philosophy/open-source-misses-the-point.html">fails</a> to + promote freedom; <em>please call libreboot <strong><a href="https://www.gnu.org/philosophy/free-sw.html">free software</a></strong></em>. + Since 14 May 2016, Libreboot is part of the <a href="https://www.gnu.org/">GNU project</a>. + </p> + + <p> + Libreboot originally began during December 2013, as a commercial effort + by the <a href="https://minifree.org">Ministry of Freedom</a> to achieve + <a href="https://www.fsf.org/resources/hw/endorsement/respects-your-freedom">RYF</a> endorsement for a modified ThinkPad X60 + (the first system to ever be added to libreboot). + </p> + + <p> + Back then, the name <i>libreboot</i> didn't exist; the project was nameless, + referring to itself as a <i>deblobbed version of coreboot</i>. The project named + itself libreboot at some point during early 2014, and has since rapidly expanded + to support more hardware and become more user-friendly. + </p> + + <p> + Libreboot is a <a href="http://coreboot.org/">coreboot</a> distribution (distro) with proprietary software removed, + intended to be a <a href="https://www.fsf.org/about/what-is-free-software">free</a> + (libre) 'BIOS' replacement for your computer. The project is aimed at users, attempting to make + coreboot as easy to use as possible. + Read the full <a href="https://www.gnu.org/philosophy/free-sw.html">Free Software definition</a>. + </p> + + <p> + Libreboot has many practical advantages over <a href="https://gnu.org/philosophy/proprietary/">proprietary</a> boot firmware, + such as faster boot speeds and better security. You can + <a href="gnulinux/index.html">install GNU/Linux with encrypted /boot/</a>, + <a href="http://www.coreboot.org/GRUB2#signed_kernels">verify GPG signatures on your kernel</a>, + put a kernel in the flash chip and more. + </p> + + <h2> + The libreboot project has three main goals: + </h2> + <ul> + <li> + <i><u><b>Recommend and distribute only free software</b></u></i>. + Coreboot distributes certain pieces of proprietary software which is needed on some systems. + Examples can include things like CPU microcode updates, memory initialization blobs and so on. + The coreboot project sometimes recommends adding more blobs which it does not distribute, such + as the Video BIOS or Intel's <i>Management Engine</i>. However, a lot of dedicated and talented + individuals in coreboot work hard to replace these blobs whenever possible. + </li> + <li> + <i><u><b>Support as much hardware as possible!</b></u></i> + Libreboot supports less hardware than coreboot, because most systems from coreboot still require + certain proprietary software to work properly. Libreboot is an attempt to support as much + hardware as possible, without any proprietary software. + </li> + <li> + <i><u><b>Make coreboot easy to use</b></u></i>. + Coreboot is notoriously difficult to install, due to an overall lack of user-focussed + documentation and support. Most people will simply give up before attempting to install coreboot.<br/><br/> + + Libreboot attempts to bridge this divide, making sure that everything from building + to installing coreboot is automated, as much as is feasibly possible. Secondly, the project + produces documentation aimed at non-technical users. Thirdly, the project attempts + to provide excellent user support via mailing lists and IRC.<br/><br/> + + Libreboot already comes with a payload (GRUB), flashrom and other needed parts. Everything + is fully integrated, in a way where most of the complicated steps that are otherwise required, + are instead done for the user in advance.<br/><br/> + + You can download ROM images for your libreboot system and install them, without having + to build anything from source. The build system is also fully automated, so building + from source is easy if you wanted to do that (for whatever reason). + </li> + </ul> + + <h2> + Libreboot is a coreboot distribution, not a coreboot fork + </h2> + + <p> + Libreboot is not a fork of coreboot. Every so often, the project re-bases on the latest + version of coreboot, with the number of custom patches in use minimized. + </p> + + <p> + All new coreboot development should be done in coreboot (upstream), not libreboot! + Libreboot is about deblobbing and packaging coreboot in a user-friendly way, where most work + is already done for the user. + </p> + + <p> + For example, if you wanted to add a new board to libreboot, you should add it to coreboot first. + Libreboot will automatically receive your code at a later date, when it updates itself. + </p> + + <p> + The deblobbed coreboot tree used in libreboot is referred to as <i>coreboot-libre</i>, + to distinguish it as a component of <i>libreboot</i>. + </p> + + <h2> + Libreboot is a 'stable' version of coreboot + </h2> + <ul> + <li> + Coreboot uses the <a href="https://en.wikipedia.org/wiki/Rolling_release">rolling release</a> model, + which means that it is not guaranteed to be stable, or to even work at all on a given day. + Coreboot does have a strict code review process, but being such a large project with so many contributors, regressions + are always possible. + </li> + <li> + Libreboot freezes on a particular revision of coreboot, making sure that everything works properly, + making fixes on top of that and repeating this during each subsequent update to a later version + of coreboot. By doing this, it provides a stronger guarantee to the user that the firmware + will be reliable, and not break their system. + </li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section" id="version"> + + <h1>How do I know what version I'm running?</h1> + <p> + See <a href="https://libreboot.org/faq/#version">https://libreboot.org/faq/#version</a> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="gfdl-1.3.txt">gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> + + diff --git a/docs/install/bbb_ehci.html b/docs/install/bbb_ehci.html new file mode 100644 index 00000000..3cdda48a --- /dev/null +++ b/docs/install/bbb_ehci.html @@ -0,0 +1,514 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>EHCI debugging on the BeagleBone Black</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">EHCI debugging on the BeagleBone Black</h1> + + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + <h1>EHCI debugging</h1> + <ol class="toc"> + <li><a href="#FindUSBportonthetargetthatsupportsEHCIdebug">Find + USB port on the target that supports EHCI debug</a></li> + <li><a href="#InitialsetupofBBBtoactasEHCIdebugdongle">Initial + setup of BBB to act as EHCI debug dongle</a></li> + <li><a href="#PatchBBBsgdbgpmoduleoptionalbuthighlyrecommended">Patch + BBB's <tt>g_dbgp</tt> module (optional, but highly recommended)</a></li> + <li><a href="#ConfigurelibrebootwithEHCIdebug">Configure + libreboot with EHCI debug</a> + <ol> + <li><a href="#SelectingHCDIndexandUSBDebugport">Selecting + <tt>HCD Index</tt> and <tt>USB Debug port</tt></a></li> + </ol></li> + <li><a href="#Howtogetthedebuglogs">How to get the debug + logs</a></li> + <li><a + href="#EnebleEHCIDebugonthetargetskerneloptionalrecommended">Eneble + EHCI Debug on the target's kernel (optional, recommended)</a></li> + <li><a href="#References">References</a></li> + </ol> + <p>If your computer does not boot after installing libreboot, it is + very useful to get debug logs from it, from the payload (grub) and/or + the kernel (if gets to there). All of them stream debug logs on the + available serial (RS-232) by default. However, most of todays laptops + lack RS-232 port. The other option is to stream the logs to USB EHCI + debug port.</p> + <p>This section explains step-by-step how to setup BBB as a + “USB EHCI debug dongle” and configure libreboot and the + linux kernel to stream logs to it (TODO: grub).</p> + <p>I will refer to three computers:</p> + <ul> + <li><b>host</b> - this is the computer you use, have + tools, compiler, Internet, etc</li> + <li><b>BBB</b> - Beaglebone Black (rev. B or higher, i + use rev. C)</li> + <li><b>target</b> - the computer you are trying to + install liberboot</li> + </ul> + <h3 id="FindUSBportonthetargetthatsupportsEHCIdebug">Find USB port + on the target that supports EHCI debug</h3> + <p> + Not all USB controllers support EHCI debug (see: <a + href="http://www.coreboot.org/EHCI_Debug_Port#Hardware_capability">EHCI + Debug Port</a> ). Even more, if a USB controller supports EHCI debug, it + is available only <b>on a single port</b> that might or might + not be exposed externally. + </p> + <ul> + <li>You need running OS (GNU/Linux) on your target for this step + (If you’ve flashed libreboot and it does not boot, you have to + flush back the stock bios)</li> + <li>You need USB memory stick (the data on it will not be + touched).</li> + <li>The EHCI debugging can not be done through external hub, BBB + must be connected directly to the debug port of the controller (so, no + hubs)</li> + </ul> + <ul> + <li>Download<sup class="footnote"><a href="#___fn1">1</a></sup> <a + href="http://www.coreboot.org/pipermail/coreboot/attachments/20080909/ae11c291/attachment.sh">this</a> + shell script. + </li> + </ul> + <ol> + <li>Plug the usb stick in the first available usb port</li> + <li>Run the script, you will get output similar to following:</li> +<pre>The following PCI devices support a USB debug port (says lspci): 0000:00:1a.0 0000:00:1d.0 +The following PCI devices support a USB debug port (says the kernel): 0000:00:1a.0 0000:00:1d.0 +*PCI device 0000:00:1a.0, USB bus 3, USB physical port 1* +*PCI device 0000:00:1d.0, USB bus 4, USB physical port 2* +Currently connected high-speed devices: +/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/2p, 480M + |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/8p, 480M + |__ Port 7: Dev 14, If 0, Class=Hub, Driver=hub/4p, 480M + |__ Port 1: Dev 15, If 0, Class=Hub, Driver=hub/4p, 480M + |__ Port 3: Dev 17, If 0, Class=Hub, Driver=hub/2p, 480M + |__ Port 4: Dev 18, If 0, Class=Hub, Driver=hub/4p, 480M +/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/2p, 480M + |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/6p, 480M +/: *Bus 01*.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/4p, 480M + |__ *Port 3: Dev 31, If 0, Class=Mass Storage, Driver=usb-storage, 480M* +</pre> + <li>The buses the support debug are Bus 3 (0000:00:1a.0) on Port 1 + and Bus 4 (0000:00:1d.0) on port 2. Your usb stick is plugged on Bus + 1, Port 3</li> + <li>Repeat the steps, plugging the USB stick in the next available + port</li> + <li>Go through all available ports and remember(write down) those + for which bus/port of the usb stick matches one of the bus/port that + support debug (bold).</li> + </ol> + <p>Remember (write down) for each port (external plug) you found + that supports debug: <b>PCI device id, the bus id, the port number, and + the physical location of the usb plug.</b></p> + <p>If you do not find a match, you can not get debug over EHCI. + Sorry.</p> + <p id="___fn1" class="footnote"> + <sup>1</sup> The guys from coreboot were talking about including the + script in coreboot distribution (check the status). + </p> + <h3 id="InitialsetupofBBBtoactasEHCIdebugdongle">Initial setup of + BBB to act as EHCI debug dongle</h3> + <p>BBB must be powered with a barrel power connector since the + mini-B USB plug will be used for the EHCI debug stream. So you will + need:</p> + <ul> + <li>power supply (5V, 2A(10W) is sufficient).</li> + <li>an extra usb cable: A to mini-B</li> + </ul> + <p> + (On BBB) The linux kernel includes module (g_dbgp that enables one of the usb ports on a computer to behave as EHCI + debug dongle. Make sure you have this module available on your BBB + (Debian 7.8 that comes with BBB should have it), if not, you should + compile it yourself (see next section): + </p> +<pre>ls /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget/g_dbgp.ko</pre> + <p> + Unload all other + g_* + modules: + </p> +<pre># lsmod +# rmmod g_multi +... +</pre> + <p> + Then load + g_dbgp + : + </p> +<pre># modprobe g_dbgp +# lsmod # should show that g_dbgp is loaded, and no other g_* +</pre> + <p> + Plug the mini-B side of the USB cable in your BBB and the A side in + your target. Then one of the usb devices on your target (with + lsusb + ) should be: + </p> +<pre>Bus 001 Device 024: ID 0525:c0de Netchip Technology, Inc.</pre> + <p>If you see the device on the target, you are good to continue to + the next step.</p> + <h3 id="PatchBBBsgdbgpmoduleoptionalbuthighlyrecommended"> + Patch BBB’s + g_dbgp + module (optional, but highly recommended) + </h3> + <p> + For the reasons why you need this, see: <a + href="http://www.coreboot.org/EHCI_Gadget_Debug">EHCI Gadget Debug</a>.<br />Make + sure that you have cross compiling environment for + arm-linux-gnueabihf + setup on your <em>host</em>. + </p> + <ul> + <li>On BBB: uname -r - this will give you version + number like 3.8.13-bone70 (I will refer to this as: $mav.$miv-$lv: + where mav=3.8, miv=13, lv=bone70 + </li> + <li>Get the BBB kernel ready on your host for cross-compiling:</li> + </ul> +<pre>$ cd $work_dir +$ git clone https://github.com/beagleboard/kernel.git +$ cd kernel +$ git checkout $mav (see above) +$ ./patch.sh +$ wget http://arago-project.org/git/projects/?p=am33x-cm3.git\;a=blob_plain\;f=bin/am335x-pm-firmware.bin\;hb=HEAD -O kernel/firmware/am335x-pm-firmware.bin +$ cp configs/beaglebone kernel/arch/arm/configs/beaglebone_defconfig +</pre> + <ul> + <li>Download the patch from <a + href="http://www.coreboot.org/images/8/88/Ehci-debug-gadget-patches.tar.gz">here</a></li> + <li>tar -xf Ehci-debug-gadget-patches.tar.gz (will + create dir: usbdebug-gadget)</li> + <li>Note that there are two patches (patch_1 and patch_2) for each + of the two different version of the kernel (3.8 and 3.10). I will use + 3.8. (If using kernel 3.12 patch_1 is not needed)</li> + <li>cd kernel (note that this is one more level: you + should be in $work_dir/kernel/kernel)</li> + <li>Apply the patches:</li> + </ul> +<pre> +git apply ../usbdebug-gadget/v3.8-debug-gadget/0001-usb-dbgp-gadget-Fix-re-connecting-after-USB-disconne.patch +git apply ../usbdebug-gadget/v3.8-debug-gadget/0002-usb-serial-gadget-no-TTY-hangup-on-USB-disconnect-WI.patch +; +make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- beaglebone_defconfig -j4@ +</pre> + <ul> + <li> + You should also apply the linux-libre <i>deblob</i> script to turn it into linux-libre + (deletes all the blobs from the linux kernel). + <a href="http://www.fsfla.org/ikiwiki/selibre/linux-libre/">fsfla website</a> + - see <a href="http://www.fsfla.org/svn/fsfla/software/linux-libre/scripts/">scripts</a>. + </li> + <li>Get your current BBB kernel config (from: /boot/config-<ver>) + and copy it to your host as $work_dir/kernel/kernel/.config</li> +<pre> +make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- oldconfig - all default answers</pre> + <li>Set proper version number: + <ul> + <li>On your host, edit $work_dir/kernel/kernel/.config + (the one you’ve just copied from BBB), find the line CONFIG_LOCALVERSION="<something + or empty>" and change it to CONFIG_LOCALVERSION="-$lv", + so it will look something like: CONFIG_LOCALVERSION="-bone70"</li> + </ul> + </li> + <li>Also, make sure that: CONFIG_USB_G_DBGP=m (If + not, make menuconfig, and set @Device Drivers-> USB + Support -> USB Gadget Support -> EHCI Debug Device Gadget=m</li> + <li>Build the module:</li> + </ul> +<pre> +$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4 (is it possoble to build only the gadget modules) +$ mkdir ../tmp && make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- INSTALL_MOD_PATH=../tmp modules_install +</pre> + <ul> + <li>on BBB, backup /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget + (i.e. mv + /lib/modules/3.8.13-bone70/kernel/drivers/usb/gadget $HOME) + </li> + <li>copy the freshly compiled usb/gadget dir to /lib/modules/3.8.13-bone70/kernel/drivers/usb</li> + <li>restart BBB</li> + <li>Remove all g_* modules (rmmod + g_<>) + </li> + <li>modprobpe g_dbgp</li> + </ul> + <h3 id="ConfigurelibrebootwithEHCIdebug">Configure libreboot with + EHCI debug</h3> + <p> + Libreboot(coreboot) should be configured with debug turned on and to + push debug messages to the EHCI debug port.<br />If you’ve + downloaded the binary distribution, you can check if it is properly + configured in the following way: + </p> + <ul> + <li>Go to the libreboot dist root directory cd + $libreboot_bin</li> + <li>Locate the rom image for your target (I will call it: $img_path) + </li> + <li>Running the following command will extract the config in a + file ./my_config: + </li> + </ul> +<pre> +./cbfstool/i686/cbfstool $img_path extract -n config -f ./my_config +</pre> + <ul> + <li>Make sure that the following params in the config are set as + following:</li> + </ul> +<pre> +CONFIG_USBDEBUG=y (Generic Drivers -> USB 2.0 EHCI debug dongle support) +CONFIG_USBDEBUG_IN_ROMSTAGE=y (Generic Drivers -> Enable early (pre-RAM) usbdebug) +CONFIG_USBDEBUG_HCD_INDEX=<HCD Index of usb controller - see below> (Generic Drivers -> Index for EHCI controller to use with usbdebug) +CONFIG_USBDEBUG_DEFAULT_PORT=<USB Debug port - see below> (Generic Drivers -> Default USB port to use as Debug Port) +</pre> + <p> + The following three are behind radio button in the menu. Only the first + one<sup class="footnote"><a href="#___fn2">2</a></sup> should be = y + </p> +<pre> +USBDEBUG_DONGLE_STD=y (Generic Drivers -> Type of dongle (Net20DC or compatible) -> Net20DC or compatible) +CONFIG_USBDEBUG_DONGLE_BEAGLEBONE=n (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone) +CONFIG_USBDEBUG_DONGLE_BEAGLEBONE_BLACK=n (Generic Drivers -> Type of dongle (Net20DC or compatible) -> BeagleBone Black) +</pre> + <p id="___fn2" class="footnote"> + <sup>2</sup> The g_dbgp module on BeagleBone Black (Rev. C) reports it self as Net20DC, the + other options are for older BB(B) - ver1. This is documented <a + href="https://johnlewis.ie/coreboot-ehci-debug-gadget-demonstration/">here</a> + (also tested/verified). + </p> + <p> + Then:<br /> +<pre> +CONFIG_CONSOLE_USB=y (Console -> USB dongle console output) +</pre> + </p> + <p> + Also + Debugging ---> Output verbose XYZ + ) (<b>FIXME</b> somebody verify these): + </p> +<pre> +CONFIG_DEBUG_CBFS=y (Output verbose CBFS debug messages ) +CONFIG_HAVE_DEBUG_RAM_SETUP=y (??? What/where is this) +CONFIG_DEBUG_RAM_SETUP=y (Output verbose RAM init debug messages) +CONFIG_DEBUG_SMI=y (Output verbose SMI debug messages) +CONFIG_DEBUG_ACPI=y (Output verbose ACPI debug messages ) +CONFIG_DEBUG_USBDEBUG=y (Output verbose USB 2.0 EHCI debug dongle messages) +</pre> + <p>If some of the above mentioned configuration options are not as + specified, you have to configure and compile libreboot yourself. Please + refer to the doc(<b>FIXME: link</b> about compiling libreboot.</p> + <h4 id="SelectingHCDIndexandUSBDebugport"> + Selecting + HCD Index + and + USB Debug port + </h4> + <p> + This applies (and works) only if the USB controller that supports debug + (found in the first section) is from Intel.<br />If the PCI ID of the + port you found in the first section is + 0000:00:1a.0 + or + 0000:00:1d.0 + , you are ok. Otherwise you have to try without guarantee that will + work. + </p> + <p> + If the externally exposed port is on a bus with + PCI ID == 0000:00:1a.0 + then for + CONFIG_USBDEBUG_HCD_INDEX + choose 2, otherwise choose 0 + . + </p> + <p> + For + CONFIG_USBDEBUG_DEFAULT_PORT + choose the port from the first section that correspond to the + PCI ID + </p> + <p> + Notes:<br />The above is based on the implementation of + coreboot/src/southbridge/intel/common/usb_debug.c : pci_ehci_dbg_dev() + .<br />This is enough as it applies for the supported GM45/G45 + Thinkpads. coreboot support some other contollers too, but they are + irellevent for libreboot (for now). + </p> + <ul> + <li>On T500 (with switchable GPU) the debug ports for both intel + controllers is exposed.</li> + <li>On x200t the debug ports for both intel controllers is + exposed.</li> + </ul> + <h3 id="Howtogetthedebuglogs">How to get the debug logs</h3> + <ul> + <li>Plug the USB cable in the target’s debug port (the one + you found in step 1) and BBB’s mini-B USB</li> + <li>Make sure no other then g_dbgp of the g_* + modules is loaded on your BBB + </li> + <li>On the BBB:</li> + </ul> +<pre> +stty -icrnl -inlcr -F /dev/ttyGS0 +cat /dev/ttyGS0 +</pre> + <ul> + <li>Power on the target with libreboot</li> + <li>You should see debug logs comming on your BBB console</li> + </ul> + <p> + Note that this is not permanent on BBB, if you reboot it, you have to + rmmod g_* + and + modprobe g_dbgp + </p> + <h3 id="EnebleEHCIDebugonthetargetskerneloptionalrecommended">Eneble + EHCI Debug on the target’s kernel (optional, recommended)</h3> + <p>You have to know how to compile kernel for your target.</p> + <ol> + <li>Check if early debugging is already enabled: grep + CONFIG_EARLY_PRINTK_DBGP /boot/config-<ver></li> + <li>If enabled, you do not have to compile the kernel (skip this + step). Otherwise, prepare kernel source for your distribution and + select (Kernel hacking -> Early printk via EHCI debug + port). Compile and install the new kernel. + </li> + <li>Edit your grub configuration and add following to the kenel + parameters<sup class="footnote"><a href="#___fn20">20</a></sup><sup + class="footnote"><a href="#___fn21">21</a></sup>: earlyprintk=dbgp,keep. + Also, try: earlyprintk=dbgp<N>,keep where N + is the debug port id if the first does not work. + </li> + </ol> + <h3 id="References">References</h3> + <p id="___fn10" class="footnote"> + <sup>10</sup> <a href="http://www.coreboot.org/EHCI_Debug_Port">EHCI + Debug Port</a> + </p> + <p id="___fn11" class="footnote"> + <sup>11</sup> <a + href="https://johnlewis.ie/coreboot-ehci-debug-gadget-demonstration/">coreboot + EHCI debug gadget demonstration</a> + </p> + <p id="___fn12" class="footnote"> + <sup>12</sup> <a href="http://www.coreboot.org/EHCI_Gadget_Debug">EHCI + Gadget Debug</a> + </p> + <p id="___fn13" class="footnote"> + <sup>13</sup> <a + href="http://www.coreboot.org/images/8/88/Ehci-debug-gadget-patches.tar.gz">Ehci-debug-gadget-patches.tar.gz</a> + </p> + <p id="___fn14" class="footnote"> + <sup>14</sup> <a + href="http://wiki.beyondlogic.org/index.php/BeagleBoneBlack_Building_Kernel">Compiling + the BeagleBone Black Kernel</a> + </p> + <p id="___fn15" class="footnote"> + <sup>15</sup> + http://dumb-looks-free.blogspot.ca/2014/06/beaglebone-black-bbb-compile-kernel.html + </p> + <p id="___fn16" class="footnote"> + <sup>16</sup> + http://dumb-looks-free.blogspot.fr/2014/06/beaglebone-black-bbb-kernal-headers.html + </p> + <p id="___fn17" class="footnote"> + <sup>17</sup> <a href="http://elinux.org/Building_BBB_Kernel">Building + BBB Kernel</a> + </p> + <p id="___fn18" class="footnote"> + <sup>18</sup> + http://komposter.com.ua/documents/USB-2.0-Debug-Port%28John-Keys%29.pdf + </p> + <p id="___fn19" class="footnote"> + <sup>19</sup> <a href="http://cs.usfca.edu/~cruse/cs698s10/">Exploring + USB at the Hardware/Software Interface</a> + </p> + <p id="___fn20" class="footnote"> + <sup>20</sup> + https://www.kernel.org/doc/Documentation/x86/earlyprintk.txt + </p> + <p id="___fn21" class="footnote"> + <sup>21</sup> https://wiki.ubuntu.com/Kernel/Debugging/USBearlyprintk + </p> + <p> + <b>TODO</b>: + </p> + <ol> + <li>grub does not send messages to EHCI debug. Investigate.</li> + <li>The section “Configure libreboot with EHCI debug” + can be skipped/simplified if a common configuration works for all + relevant targets is selected as defualt</li> + <li>Patch and compule g_dbgp on BBB instead cross-compile</li> + <li>Find a simple way to send debug messages from targets userland</li> + </ol> + </div> + + <div class="section"> + + <p> + Copyright © 2015 Alex David <opdecirkel@gmail.com><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/bbb_setup.html b/docs/install/bbb_setup.html new file mode 100644 index 00000000..7eea1e6f --- /dev/null +++ b/docs/install/bbb_setup.html @@ -0,0 +1,464 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>How to program an SPI flash chip with the BeagleBone Black or Teensy 3.1</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">How to program an SPI flash chip with the BeagleBone Black or Teensy 3.1</h1> + <p> + This document exists as a guide for reading from or writing to an SPI flash chip with the BeagleBone Black, + using the <a href="http://flashrom.org/Flashrom">flashrom</a> software. + A BeagleBone Black, rev. C was used when creating this guide, but earlier revisions + may also work. + </p> + + <p> + There was no justification for a further section for the Teensy. Simply refer to <a href="https://www.flashrom.org/Teensy_3.1_SPI_%2B_LPC/FWH_Flasher#ISP_Usage">this page on flashrom.org</a> for information about how to set it up, and correlate that with the pins on the SPI flash chip as per other guides in the libreboot documentation for each board. At the time of writing, the teensy is tested for flashing on the ThinkPad X200, but it should work for other targets. here is a photo of the setup for the teensy: <a href="http://h5ai.swiftgeek.net/IMG_20160601_120855.jpg">http://h5ai.swiftgeek.net/IMG_20160601_120855.jpg</a></p> + <p> + Onto the Beaglebone black... + </p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section" id="hardware_requirements"> + + <h1>Hardware requirements</h1> + + <p> + Shopping list (pictures of this hardware is shown later): + </p> + <ul> + <li> + A <a href="http://flashrom.org">Flashrom</a>-compatible external SPI programmer: + <strong>BeagleBone Black</strong>, sometimes referred to as 'BBB', (rev. C) is highly recommended. + You can buy one from <a href="https://www.adafruit.com">Adafruit</a> (USA), <a href="http://electrokit.com">ElectroKit</a> (Sweden) + or any of the distributors listed <a href="http://beagleboard.org/black">here</a> (look below 'Purchase'). + We recommend this product because we know that it works well for our purposes and doesn't require any non-free software. + </li> + <li> + Electrical/insulative tape: cover the entire bottom surface of the BBB (the part that rests on a surface). + This is important, when placing the BBB on top of a board so that nothing shorts. + Most hardware/electronics stores have this. Optionally, you can use the bottom half of a + <a href="http://www.hammondmfg.com/1593HAM.htm#BeagleBoneBlack">hammond plastic enclosure</a>. + </li> + <li> + Clip for connecting to the flash chip: if you have a SOIC-16 flash chip (16 pins), you will need the + <strong>Pomona 5252</strong> or equivalent. For SOIC-8 flash chips (8 pins), you will need the <strong>Pomona 5250</strong> + or equivalent. Do check which chip you have, before ordering a clip. Also, you might as well buy two clips or more since they break easily. + <a href="http://farnell.com/">Farnell element 14</a> sells these and ships to many countries. Some people find these clips difficult to + get hold of, especially in South America. If you know of any good suppliers, please contact the libreboot project with the relevant information. + <strong>If you can't get hold of a pomona clip, some other clips might work, e.g. 3M, but they are not always reliable. + You can also directly solder the wires to the chip, if that suits you; the clip is just for convenience, really.</strong> + </li> + <li> + <strong>External 3.3V DC power supply</strong>, for powering the flash chip: an ATX power supply / PSU (common on Intel/AMD desktop + computers) will work for this. A lab PSU (DC) will also work (adjusted to 3.3V). + <ul> + <li>Getting a multimeter might be worthwhile, to verify that it's supplying 3.3V.</li> + </ul> + </li> + <li> + <strong>External 5V DC power supply</strong> (barrel connector), for powering the BBB: + the latter can have power supplied via USB, but a dedicated power supply is recommended. + These should be easy to find in most places that sell electronics. <strong>OPTIONAL. + Only needed if not powering with the USB cable, or if you want to use <a href="bbb_ehci.html">EHCI debug</a></strong>. + </li> + <li> + <strong>Pin header / jumper cables</strong> (2.54mm / 0.1" headers): you should get male--male, + male--female and female--female cables in 10cm size. Just get a load of them. + Other possible names for these cables/wires/leads are as follows: + <ul> + <li>flying leads</li> + <li>breadboard cables (since they are often used on breadboards).</li> + <li>You might also be able to make these cables yourself.</li> + </ul> + <a href="https://www.adafruit.com">Adafruit</a> sell them, as do many others. + <strong>Some people find them difficult to buy. Please contact the libreboot project if you know of any good sellers.</strong> + You might also be able to make these cables yourself. For PSU connections, using long cables, e.g. 20cm, is fine, and you can extend them longer than that if needed. + </li> + <li> + <b>Mini USB A-B cable</b> (the BeagleBone probably already comes + with one.) - <b>OPTIONAL - only needed for <a href="bbb_ehci.html">EHCI debug</a> or for serial/ssh access without ethernet cable (g_multi kernel module)</b> + + <strong>Mini USB A-B cable</strong>: the BBB probably already comes with one. <strong>OPTIONAL---only needed for + <a href="bbb_ehci.html">EHCI debug</a> or for serial/SSH access without ethernet cable (g_multi kernel module)</strong>. + </li> + <li> + <strong>FTDI TTL cable or debug board</strong>: used for accessing the serial console on the BBB. + <a href="http://elinux.org/Beagleboard:BeagleBone_Black_Serial">This page</a> contains a list. + <strong>OPTIONAL---only needed for serial console on the BBB, if not using SSH via ethernet cable.</strong> + </li> + </ul> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section" id="psu33"> + + <h1>Setting up the 3.3V DC PSU</h1> + + <p> + ATX PSU pinouts can be read on <a href="https://en.wikipedia.org/wiki/Power_supply_unit_%28computer%29#Wiring_diagrams">this Wikipedia page</a>. + </p> + <p> + You can use pin 1 or 2 (orange wire) on a 20-pin or 24-pin ATX PSU for 3.3V, and any of the ground/earth sources (black cables) for ground. + Short PS_ON# / Power on (green wire; pin 16 on 24-pin ATX PSU, or pin 14 on a 20-pin ATX PSU) to a ground + (black; there is one right next to it) using a wire/paperclip/jumper, then power on the PSU by grounding PS_ON# + (this is also how an ATX motherboard turns on a PSU). + </p> + <p> + <strong>DO **NOT** use pin 4, 6, do **NOT** use pin 19 or 20 (on a 20-pin ATX PSU), and DO **NOT** use pin + 21, 22 or 23 (on a 24-pin ATX PSU). Those wires (the red ones) are 5V, and they **WILL** kill your flash chip. + ***NEVER*** supply more than 3.3V to your flash chip (that is, if it's a 3.3V flash chip; 5V and 1.8V SPI + flash chips do exist, but they are rare. Always check what voltage your chip takes. Most of them take 3.3V).</strong> + </p> + <p> + You only need one 3.3V supply and one ground for the flash chip, after grounding PS_ON#. + </p> + + <p> + The male end of a 0.1" or 2.54mm header cable is not thick enough to remain permanently + connected to the ATX PSU on its own. + When connecting header cables to the connector on the ATX PSU, use a female end attached to + a thicker piece of wire (you could use a paper clip), or wedge the male end of the jumper cable + into the sides of the hole in the connector, instead of going through the centre. + </p> + + <p> + Here is an example set up:<br/> + <img src="images/x200/psu33.jpg" alt="" title="Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net> see license notice at the end of this document" /> + </p> + + </div> + + <div class="section" id="bbb_access"> + + <h1>Accessing the operating system on the BBB</h1> + <p> + The operating system on your BBB will probably have an SSH daemon + running where the root account has no password. Use SSH to access + the operating system and set a root password. By default, the OS + on your BBB will most likely use DHCP, so it should already have an IP + address. + </p> + <p> + You will also be using the OS on your BBB for programming an SPI flash chip. + </p> + <h2>Alternatives to SSH (in case SSH fails)</h2> + <p> + You can also use a serial FTDI debug board with GNU Screen, to access the serial console.<br/> + # <b>screen /dev/ttyUSB0 115200</b><br/> + Here are some example photos:<br/> + <img src="images/x200/ftdi.jpg" alt="" /> + <img src="images/x200/ftdi_port.jpg" alt="" /><br/> + </p> + <p> + You can also connect the USB cable from the BBB to another computer and a new network interface will appear, + with its own IP address. This is directly accessible from SSH, or screen:<br/> + # <b>screen /dev/ttyACM0 115200</b> + </p> + <p> + You can also access the uboot console, using the serial method + instead of SSH. + </p> + + </div> + + <div class="section" id="spidev"> + + <h1>Setting up spidev on the BBB</h1> + + <p> + Log on as root on the BBB, using either SSH or a serial console as defined in + <a href="#bbb_access">#bbb_access</a>. Make sure that you have internet access + on your BBB. + </p> + + <p> + Follow the instructions at <a href="http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0">http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0</a> + up to (and excluding) the point where it tells you to modify uEnv.txt + </p> + <p> + You need to update the software on the BBB first. If you have an + element14 brand BBB (sold by Premier Farnell plc. stores like + Farnell element14, Newark element14, and Embest), you may need + to <a href="https://groups.google.com/forum/?_escaped_fragment_=msg/beagleboard/LPjCn4LEY2I/alozBGsbTJMJ#!msg/beagleboard/LPjCn4LEY2I/alozBGsbTJMJ">work around a bug</a> + in the LED aging init script before you can update your + software. If you don't have a file named + /etc/init.d/led_aging.sh, you can skip this step and update your + software as described below. Otherwise, replace the contents of + this file with: + </p> +<pre> +#!/bin/sh -e +### BEGIN INIT INFO +# Provides: led_aging.sh +# Required-Start: $local_fs +# Required-Stop: $local_fs +# Default-Start: 2 3 4 5 +# Default-Stop: 0 1 6 +# Short-Description: Start LED aging +# Description: Starts LED aging (whatever that is) +### END INIT INFO + +x=$(/bin/ps -ef | /bin/grep "[l]ed_acc") +if [ ! -n "$x" -a -x /usr/bin/led_acc ]; then + /usr/bin/led_acc & +fi +</pre> + </p> + Run <b>apt-get update</b> and <b>apt-get upgrade</b> then reboot the BBB, before continuing. + </p> + + <p> + Check that the firmware exists:<br/> + # <b>ls /lib/firmware/BB-SPI0-01-00A0.*</b><br/> + Output: + </p> +<pre> +/lib/firmware/BB-SPI0-01-00A0.dtbo +</pre> + <p> + Then:<br/> + # <b>echo BB-SPI0-01 > /sys/devices/bone_capemgr.*/slots</b><br/> + # <b>cat /sys/devices/bone_capemgr.*/slots</b><br/> + Output: + </p> +<pre> + 0: 54:PF--- + 1: 55:PF--- + 2: 56:PF--- + 3: 57:PF--- + 4: ff:P-O-L Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G + 5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI + 7: ff:P-O-L Override Board Name,00A0,Override Manuf,BB-SPI0-01 +</pre> + + <p> + Verify that the spidev device now exists:<br/> + # <b>ls -al /dev/spid*</b><br/> + Output: + </p> +<pre> +crw-rw---T 1 root spi 153, 0 Nov 19 21:07 /dev/spidev1.0 +</pre> + <p> + Now the BBB is ready to be used for flashing. Make this persist + across reboots:<br/> + In /etc/default/capemgr add <b>CAPE=BB-SPI0-01</b> at the end + (or change the existing <b>CAPE=</b> entry to say that, if an + entry already exists. + </p> + <p> + Get flashrom from the libreboot_util release archive, or build it from libreboot_src/git if you need to. + An ARM binary (statically compiled) for flashrom exists in libreboot_util releases. Put the flashrom binary + on your BBB. + </p> + <p> + You may also need ich9gen, if you will be flashing an ICH9-M laptop (such as the X200). Get it from libreboot_util, + or build it from libreboot_src, and put the ARM binary for it on your BBB. + </p> + <p> + Finally, get the ROM image that you would like to flash and put that on your BBB. + </p> + + <p> + Now test flashrom:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512</b><br/> + Output: + </p> +<pre> +Calibrating delay loop... OK. +No EEPROM/flash device found. +Note: flashrom can never write if the flash chip isn't found automatically. +</pre> + + <p> + This means that it's working (the clip isn't connected to any flash chip, + so the error is fine). + </p> + + </div> + + <div class="section" id="clip"> + + <h1> + Connecting the Pomona 5250/5252 + </h1> + <p> + Use this image for reference when connecting the pomona to the BBB: + <a href="http://beagleboard.org/Support/bone101#headers">http://beagleboard.org/Support/bone101#headers</a> + (D0 = MISO or connects to MISO). + </p> + + <p> + The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): + </p> +<pre> + NC - - 21 + 1 - - 17 + NC - - NC + NC - - NC + NC - - NC + NC - - NC + 18 - - 3.3V (PSU) + 22 - - NC - this is pin 1 on the flash chip +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i> + +You may also need to connect pins 1 and 9 (tie to 3.3V supply). These are HOLD# and WP#. +On some systems they are held high, if the flash chip is attached to the board. +If you're flashing a chip that isn't connected to a board, you'll almost certainly +have to connect them. + +SOIC16 pinout (more info available online, or in the datasheet for your flash chip): +HOLD 1-16 SCK +VDD 2-15 MOSI +N/C 3-14 N/C +N/C 4-13 N/C +N/C 5-12 N/C +N/C 6-11 N/C +SS 7-10 GND +MISO 8-9 WP +</pre> + <p> + The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): + </p> +<pre> + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i> + +You may also need to connect pins 3 and 7 (tie to 3.3V supply). These are HOLD# and WP#. +On some systems they are held high, if the flash chip is attached to the board. +If you're flashing a chip that isn't connected to a board, you'll almost certainly +have to connect them. + +SOIC8 pinout (more info available online, or in the datasheet for your flash chip): +SS 1-8 VDD +MISO 2-7 HOLD +WP 3-6 SCK +GND 4-5 MOSI +</pre> + <p> + <b>NC = no connection</b> + </p> + <p> + <b><u>DO NOT</u> connect 3.3V (PSU) yet. ONLY connect this once the pomona is connected to the flash chip.</b> + </p> + <p> + <b>You also need to connect the BLACK wire (ground/earth) from the 3.3V PSU to pin 2 on the BBB (P9 header). + It is safe to install this now + (that is, before you connect the pomona to the flash chip); in fact, you should.</b> + </p> + <p> + if you need to extend the 3.3v psu leads, just use the same colour M-F leads, <b>but</b> keep all other + leads short (10cm or less) + </p> + + <p> + You should now have something that looks like this:<br/> + <img src="images/x200/5252_bbb0.jpg" alt="" /> + <img src="images/x200/5252_bbb1.jpg" alt="" /> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h1 id="stability">Notes about stability</h1> + + <p> + <a href="http://flashrom.org/ISP">http://flashrom.org/ISP</a> + is what we typically do in libreboot, though not always. That page + has some notes about using resistors to affect stability. Currently, + we use spispeed=512 (512kHz) but it is possible to use higher speeds while + maintaining stability. + </p> + + <p> + tty0_ in #libreboot was able to get better flashing speeds with the following configuration: + </p> + <ul> + <li>"coax" with 0.1 mm core and aluminum foley (from my kitchen), add 100 Ohm resistors (serial)</li> + <li>put heatshrink above the foley, for: CS, CLK, D0, D1</li> + <li>Twisted pair used as core (in case more capacitors are needed)</li> + <li> + See this image: + <a href="http://i.imgur.com/qHGxKpj.jpg">http://i.imgur.com/qHGxKpj.jpg</a> + </li> + <li>He was able to flash at 50MHz (lower speeds are also fine).</li> + </ul> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net><br/> + Copyright © 2015 Albin Söderqvist<br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/c201.html b/docs/install/c201.html new file mode 100644 index 00000000..59972108 --- /dev/null +++ b/docs/install/c201.html @@ -0,0 +1,320 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ASUS Chromebook C201 installation guide</title> +</head> + +<body> + + <div class="section"> + + <h1 id="pagetop">ASUS Chromebook C201 installation guide</h1> + + <p> + These instructions are for installing Libreboot to the ASUS Chromebook C201. + Since the device ships with Coreboot, the installation instructions are the same before and after flashing Libreboot for the first time. + </p> + + <div class="important"> + + <p> + <b>If you are using libreboot_src or git, then make sure that you built the sources first (see <a href="../git/index.html#build">../git/index.html#build</a>).</b> + </p> + + </div> + + <p> + Look at the <a href="#rom">list of ROM images</a> to see which image is compatible with your device. + </p> + + <p> + Libreboot can be installed internally from the device, with sufficient privileges. + The installation process requires using <b>Google's modified version of flashrom</b>, + that has support for reflashing the Chromebook's SPI flash. + Otherwise, flashing externally will work with the upstream flashrom version. + </p> + + <p> + <b>Google's modified version of flashrom</b> is free software and its source code is made available by Google: <a href="https://chromium.googlesource.com/chromiumos/third_party/flashrom/">flashrom</a>.<br /> + It is not distributed along with Libreboot yet. However, it is preinstalled on the device, with ChromeOS. + </p> + + <p> + Installing Libreboot internally requires sufficient privileges on the system installed on the device.<br /> + When the device has ChromeOS installed (as it does initially), it is necessary to gain root privileges in ChromeOS, + to be able to access a root shell. + </p> + + <ul> + <li><a href="#root_chromeos">Gaining root privileges on ChromeOS</a></li> + <li><a href="#preparing_device">Preparing the device for the installation</a> + <ul> + <li><a href="#configuring_verified_boot_parameters">Configuring verified boot parameters</a></li> + <li><a href="#removing_write_protect_screw">Removing the write protect screw</a></li> + </ul> + </li> + <li><a href="">Installing Libreboot to the SPI flash</a> + <ul> + <li><a href="#installing_libreboot_internally">Installing Libreboot internally, from the device</a></li> + <li><a href="#installing_libreboot_externally">Installing Libreboot externally, with a SPI flash programmer</a></li> + </ul> + </li> + </ul> + + <p> + <a href="../index.html">Back to main index</a> + </p> + + </div> + + <div class="section"> + + <h1 id="root_chromeos">Gaining root privileges on ChromeOS</h2> + + <p> + In order to gain root privileges on ChromeOS, developer mode has to be enabled from the recovery mode screen and debugging features have to be enabled in ChromeOS. + </p> + + <div class="important"> + + <p> + Instructions to access the <a href="../depthcharge/index.html#recovery_mode_screen">recovery mode screen</a> and <a href="../depthcharge/index.html#enabling_developer_mode">enabling developer mode</a> are available on the page dedicated to <a href="../depthcharge/index.html">depthcharge</a>. + </p> + + <p> + Once developer mode is enabled, the device will boot to the <a href="../depthcharge/index.html#developer_mode_screen">developer mode screen</a>. ChromeOS can be booted by waiting for 30 seconds (the delay is shortened in Libreboot) or by pressing <b>Ctrl + D</b> + </p> + + <p> + After the system has booted, root access can be enabled by clicking on the <b>Enable debugging features</b> link. A confirmation dialog will ask whether to proceed.<br /> + After confirming by clicking <b>Proceed</b>, the device will reboot and ask for the root password to set. Finally, the operation has to be confirmed by clicking <b>Enable</b>. + </p> + + <p> + After setting the root password, it becomes possible to log-in as root. + A tty prompt can be obtained by pressing <strong>Ctrl + Alt + Next</strong>. + The <strong>Next</strong> key is the one on the top left of the keyboard. + </p> + + </div> + + </div> + + <div class="section"> + + <h1 id="preparing_device">Preparing the device for the installation</h2> + + <p> + Before installing Libreboot on the device, both its software and hardware has to be prepared to allow the installation procedure and to ensure that security features don't get in the way. + </p> + + <div class="subsection"> + + <h2 id="configuring_verified_boot_parameters">Configuring verified boot parameters</h2> + + <p> + It is recommended to have access to the <a href="../depthcharge/index.html#developer_mode_screen">developer mode screen</a> and to <a href="../depthcharge/index.html#configuring_verified_boot_parameters">configure the following verified boot parameters</a>: + <ul> + <li>Kernels signature verification: <i>disabled</i></li> + <li>External media boot: <i>enabled</i></li> + </ul> + Those changes can be reverted later, when the device is known to be in a working state. + </p> + + </div> + + <div class="subsection"> + + <h2 id="removing_write_protect_screw">Removing the write protect screw</h2> + + <p> + Since part of the SPI flash is write-protected by a screw, it is necessary to remove the screw to remove the write protection and allow writing Libreboot to the <i>read-only</i> part of the flash. + </p> + + <p> + To access the screw, the device has to be opened. There are 8 screws to remove from the bottom of the device, as shown on the picture below. Two are hidden under the top pads. After removing the screws, the keyboard plastic part can be carefully detached from the rest. <strong>Beware: there are cables attached to it!</strong> It is advised to flip the keyboard plastic part over, as shown on the picture below. The write protect screw is located next to the SPI flash chip, circled in red in the picture below. It has to be removed. + </p> + + <p> + <a href="images/c201/screws.jpg"><img src="images/c201/screws.jpg" alt="Screws" style="width: 400px;"/></a> + <a href="images/c201/wp-screw.jpg"><img src="images/c201/wp-screw.jpg" alt="WP screw" style="width: 400px;"/></a> + </p> + + <p> + The write protect screw can be put back in place later, when the device is known to be in a working state. + </p> + + </div> + + </div> + + <div class="section"> + + <h1 id="installing_libreboot_spi_flash">Installing Libreboot to the SPI flash</h1> + + <p> + The SPI flash (that holds Libreboot) is divided into various partitions that are used to implement parts of the CrOS security system. + Libreboot is installed in the <i>read-only</i> coreboot partition, that becomes writable after removing the write-protect screw. + </p> + + <div class="subsection"> + + <h2 id="installing_libreboot_internally">Installing Libreboot internally, from the device</h2> + + <p> + Before installing Libreboot to the SPI flash internally, the device has to be reassembled. + </p> + + <p> + All the files from the <b>veyron_speedy</b> release (or build) have to be transferred to the device. + </p> + + <p> + The following operations have to be executed with root privileges on the device (e.g. using the <em>root</em> account). + In addition, the <b>cros-flash-replace</b> script has to be made executable:<br /> + # <b>chmod a+x cros-flash-replace</b><br /> + </p> + + <p> + The SPI flash has to be read first:<br /> + # <b>flashrom -p host -r flash.img</b><br /> + <b>Note: it might be a good idea to copy the produced flash.img file at this point and store it outside of the device for backup purposes.</b> + </p> + + <p> + Then, the <b>cros-flash-replace</b> script has to be executed as such:<br /> + # <b>./cros-flash-replace flash.img coreboot ro-frid</b><br /> + If any error is shown, it is definitely a bad idea to go further than this point. + </p> + + <p> + The resulting flash image can then be flashed back:<br /> + # <b>flashrom -p host -w flash.img</b><br /> + </p> + + <p> + You should also see within the output the following:<br/> + <b>"Verifying flash... VERIFIED."</b> + </p> + + <p> + Shut down. The device will now boot to Libreboot. + </p> + + </div> + + <div class="subsection"> + + <h2 id="installing_libreboot_externally">Installing Libreboot externally, with a SPI flash programmer</h2> + + <p> + Before installing Libreboot to the SPI flash internally, the device has to be opened. + </p> + + <p> + The SPI flash is located next to the write protect screw. Its layout is indicated in the picture below. Note that it is not necessary to connect <b>WP#</b> since removing the screw already connects it to ground. Before writing to the chip externally, the battery connector has to be detached. It is located under the heat spreader, that has to be unscrewed from the rest of the case. The battery connector is located on the right and has colorful cables, as shown on the picture below. + </p> + + <p> + <a href="images/c201/spi-flash-layout.jpg"><img src="images/c201/spi-flash-layout.jpg" alt="SPI flash layout" style="width: 400px;"/></a> + <a href="images/c201/battery-connector.jpg"><img src="images/c201/battery-connector.jpg" alt="Battery connector" style="width: 400px;"/></a> + </p> + + <p> + All the files from the <b>veyron_speedy</b> release (or build) have to be transferred to the host. + </p> + + <p> + The following operations have to be executed with root privileges on the host (e.g. using the <em>root</em> account). + In addition, the <b>cros-flash-replace</b> script has to be made executable:<br /> + # <b>chmod a+x cros-flash-replace</b><br /> + </p> + + <p> + The SPI flash has to be read first (using the right spi programmer):<br /> + # <b>flashrom -p <i>programmer</i> -r flash.img</b><br /> + <b>Note: it might be a good idea to copy the produced flash.img file at this point and store it outside of the device for backup purposes.</b> + </p> + + <p> + Then, the <b>cros-flash-replace</b> script has to be executed as such:<br /> + # <b>./cros-flash-replace flash.img coreboot ro-frid</b><br /> + If any error is shown, it is definitely a bad idea to go further than this point. + </p> + + <p> + The resulting flash image can then be flashed back (using the right spi programmer):<br /> + # <b>flashrom -p <i>programmer</i> -w flash.img</b><br /> + </p> + + <p> + You should also see within the output the following:<br/> + <b>"Verifying flash... VERIFIED."</b> + </p> + + <p> + The device will now boot to Libreboot. + </p> + + </div> + + <p><a href="#pagetop">Back to top of page.</a></p> + </div> + + <div class="section"> + + <p> + Copyright © 2015 Paul Kocialkowski <contact@paulk.fr><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/d510mo.html b/docs/install/d510mo.html new file mode 100644 index 00000000..16c3e768 --- /dev/null +++ b/docs/install/d510mo.html @@ -0,0 +1,107 @@ + +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>D510MO flashing tutorial</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">D510MO flashing tutorial</h1> + <p> + This guide is for those who want libreboot on their Intel D510MO + motherboard while they still have the original BIOS present. + </p> + <p> + <a href="index.html">Back to main index</a> + </p> + </div> + + <div class="section"> + + <h1 id="flashchips">Flash chip size</h1> + + <p> + Use this to find out:<br/> + # <b>dmidecode | grep ROM\ Size</b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h1 id="clip">Flashing instructions</h1> + + <p> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to + set up the BBB for flashing. + </p> + <p> + This is an image of the flash chip, for reference:<br/> + <img src="../images/d510mo/d510mo.jpg" alt="" /> + </p> + </div> + + + <div class="section"> + + <p> + Copyright © 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/ga-g41m-es2l.html b/docs/install/ga-g41m-es2l.html new file mode 100644 index 00000000..0b0c7315 --- /dev/null +++ b/docs/install/ga-g41m-es2l.html @@ -0,0 +1,129 @@ + +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>GA-G41M-ES2L flashing tutorial</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">GA-G41M-ES2L flashing tutorial</h1> + <p> + This guide is for those who want libreboot on their Intel GA-G41M-ES2L + motherboard while they still have the original BIOS present. + </p> + <p> + <a href="index.html">Back to main index</a> + </p> + </div> + + <div class="section"> + + <h1 id="flashchips">Flash chip size</h1> + + <p> + Use this to find out:<br/> + # <b>dmidecode | grep ROM\ Size</b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h1 id="clip">Flashing instructions</h1> + + <p> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to + set up the BBB for external flashing. + </p> + <p> + Here is an image of the flash chip:<br/> + <img alt="" src="../images/ga-g41m-es2l/ga-g41m-es2l.jpg" /> + </p> + <p> + Internal flashing is possible. Boot with the proprietary BIOS + and GNU/Linux. There are 2 flash chips (one is backup). + </p> + <p> + Flash the first chip: + <br/> + <strong>./flashrom -p internal:dualbiosindex=0 -w libreboot.rom</strong> + </p> + <p> + Flash the second chip: + <br/> + <strong>./flashrom -p internal:dualbiosindex=1 -w libreboot.rom</strong> + </p> + <p> + NOTE: You need the latest flashrom. Just get it on flashrom.org from + their SVN or Git repos. + </p> + <p> + NOTE: due to a bug in the hardware, the MAC address is hardcoded in coreboot-libre. + Therefore, you must set your own MAC address in your operating system. + </p> + </div> + + + <div class="section"> + + <p> + Copyright © 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/images/c201/battery-connector.jpg b/docs/install/images/c201/battery-connector.jpg Binary files differnew file mode 100644 index 00000000..85f0e631 --- /dev/null +++ b/docs/install/images/c201/battery-connector.jpg diff --git a/docs/install/images/c201/screws.jpg b/docs/install/images/c201/screws.jpg Binary files differnew file mode 100644 index 00000000..58585d5a --- /dev/null +++ b/docs/install/images/c201/screws.jpg diff --git a/docs/install/images/c201/spi-flash-layout.jpg b/docs/install/images/c201/spi-flash-layout.jpg Binary files differnew file mode 100644 index 00000000..9968ca71 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content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Installing libreboot</title> +</head> + +<body> + + <div class="section"> + + <h1 id="pagetop">Installing libreboot</h1> + <p> + This section relates to installing libreboot on supported targets. + </p> + <p> + NOTE: if running flashrom -p internal for software based flashing, and you + get an error related to /dev/mem access, you should reboot with iomem=relaxed + kernel parameter before running flashrom, or use a kernel that has + CONFIG_STRICT_DEVMEM not enabled. + </p> + <p> + <a href="../index.html">Back to previous index</a> + </p> + + </div> + + <div class="section"> + + <h2>Software methods</h2> + <ul> + <li><a href="#rom">List of ROM images in libreboot</a></li> + <li><a href="#flashrom">How to update or install libreboot (if you are already running libreboot or coreboot)</a></li> + <li><a href="#flashrom">KFSN4-DRE: initial installation guide (if running the proprietary firmware or libreboot)</a></li> + <li><a href="#flashrom_lenovobios">ThinkPad X60/T60: Initial installation guide (if running the proprietary firmware)</a></li> + <li><a href="#flashrom_macbook21">MacBook2,1: Initial installation guide (if running the proprietary firmware)</a></li> + <li><a href="c201.html">ASUS Chromebook C201 installation guide</a> (Installing Libreboot internally, from the device)</li> + </ul> + + <h2>Hardware methods</h2> + <ul> + <li><a href="bbb_setup.html">How to program an SPI flash chip with the BeagleBone Black</a></li> + <li><a href="ga-g41m-es2l.html">Flashing the Gigabyte GA-G41M-ES2L (has 2 SOIC-8 chips, one is backup)</a></li> + <li><a href="d510mo.html">Flashing the Intel D510MO</a></li> + <li><a href="bbb_ehci.html">How to configure EHCI debugging on the BeagleBone Black</a></li> + <li><a href="kgpe-d16.html">KGPE-D16 (needed if running the proprietary firmware, or to unbrick)</a></li> + <li><a href="kcma-d8.html">KCMA-D8 (needed if running the proprietary firmware, or to unbrick)</a></li> + <li><a href="x60_unbrick.html">ThinkPad X60: Recovery guide</a></li> + <li><a href="x60tablet_unbrick.html">ThinkPad X60 Tablet: Recovery guide</a></li> + <li><a href="t60_unbrick.html">ThinkPad T60: Recovery guide</a></li> + <li><a href="x200_external.html">ThinkPad X200/X200S/X200T (needed if running the proprietary firmware, or to unbrick)</a></li> + <li><a href="r400_external.html">ThinkPad R400 (needed if running the proprietary firmware, or to unbrick)</a></li> + <li><a href="t400_external.html">ThinkPad T400 (needed if running the proprietary firmware, or to unbrick)</a></li> + <li><a href="t500_external.html">ThinkPad T500 (needed if running the proprietary firmware, or to unbrick)</a></li> + <li><a href="c201.html">ASUS Chromebook C201 installation guide</a> (Installing Libreboot externally, with a SPI flash programmer)</li> + </ul> + + </div> + + <div class="section"> + + <h1 id="rom">List of ROM images in libreboot</h1> + + <p> + Libreboot distributes pre-compiled ROM images, built from the libreboot source code. + These images are provided for user convenience, so that they don't have + to build anything from source on their own. + </p> + + <p> + The ROM images in each archive use the following at the end of the file name, + if they are built with the GRUB payload: <b>_<i>keymap</i>_<i>mode</i>.rom</b> + </p> + <p> + Available <i>modes</i>: <b>vesafb</b> or <b>txtmode</b>. The <i>vesafb</i> ROM images are recommended, in most cases; + <i>txtmode</i> ROM images come with MemTest86+, which requires text-mode instead of the usual framebuffer used + by coreboot native graphics initialization. + </p> + <p> + <i>keymap</i> can be one of several keymaps that keyboard supports (there are quite a few), + which affects the keyboard layout configuration that is used in GRUB. It doesn't matter + which ROM image you choose here, as far as the keymap in GNU/Linux is concerned. + </p> + <p> + Keymaps are named appropriately according to each keyboard layout + support in GRUB. To learn how these keymaps are created, see + <a href="../grub/index.html#grub_keyboard">../grub/index.html#grub_keyboard</a> + </p> + + <h2 id="qemu">QEMU</h2> + + <p> + Libreboot comes with ROM images built for QEMU, by default: + </p> + + <p> + Examples of how to use libreboot ROM images in QEMU: + </p> + <ul> + <li>$ <b>qemu-system-i386 -M q35 -m 512 -bios qemu_q35_ich9_keymap_mode.rom</b></li> + <li>$ <b>qemu-system-i386 -M pc -m 512 -bios qemu_i440fx_piix4_keymap_mode.rom</b></li> + </ul> + <p> + You can optionally specify the <b>-serial stdio</b> argument, so that QEMU will emulate + a serial terminal on the standard input/output (most likely your terminal emulator or TTY). + </p> + <p> + Other arguments are available for QEMU. The manual will contain more information. + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h1 id="flashrom">How to update or install libreboot (if you are already running libreboot or coreboot)</h1> + + <p> + On all current targets, updating libreboot can be accomplished without disassembly and, + therefore, without having to externally re-flash using any dedicated hardware. In other words, + you can do everything entirely in software, directly from the OS that is running on your libreboot + system. + </p> + + <div class="important"> + <p> + <b>If you are using libreboot_src or git, then make sure that you built the sources first (see <a href="../git/index.html#build">../git/index.html#build</a>).</b> + </p> + </div> + + <p> + Look at the <a href="#rom">list of ROM images</a> to see which image is compatible with your device. + </p> + + <h2>Are you currently running the original, proprietary firmware?</h2> + + <p> + If you are currently running the proprietary firmware (not libreboot or coreboot), + then the flashing instructions for your system are going to be different. + </p> + <p> + X60/T60 users running the proprietary firmware should refer to <a href="#flashrom_lenovobios">#flashrom_lenovobios</a>. + MacBook2,1 users running Apple EFI should refer to <a href="#flashrom_macbook21">#flashrom_macbook21</a> + </p> + <p> + X200 users, refer to <a href="x200_external.html">x200_external.html</a>, + R400 users refer to <a href="r400_external.html">r400_external.html</a>, + T400 users refer to <a href="t400_external.html">t400_external.html</a>, + T500 users refer to <a href="t500_external.html">t500_external.html</a> + </p> + + <h2>ASUS KFSN4-DRE?</h2> + + <p> + Internal flashing should work just fine, even if you are + currently booting the proprietary firmware. + </p> + + <p> + Libreboot currently lacks documentation for externally + re-flashing an LPC flash chip. However, these boards have + the flash chip inside of a PLCC socket, and it is possible + to hot-swap the chips. If you want to back up your + known-working image, simply hot-swap the chip for one that + is the same capacity, after having dumped a copy of the + current firmware (flashrom -p internal -r yourchosenname.rom), + and then flash that chip with the known-working image. + Check whether the system still boots, and if it does, then + it should be safe to flash the new image (because you now + have a backup of the old image). + </p> + + <p> + Keeping at least one spare LPC PLCC chip with working firmware + on it is highly recommended, in case of bricks. + </p> + + <p> + <b> + DO NOT hot-swap the chip with your bare hands. Use a PLCC + chip extractor. These can be found online. + See <a href="http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools">http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools</a> + </b> + </p> + + <p> + Do check the HCL entry: <a href="../hcl/kfsn4-dre.html">../hcl/kfsn4-dre.html</a> + </p> + + <h2>ASUS KGPE-D16?</h2> + + <p> + If you have the proprietary BIOS, you need to flash libreboot externally. + See <a href="kgpe-d16.html">kgpe-d16.html</a>. + </p> + <p> + If you already have coreboot or libreboot installed, without write protection on the flash + chip, then you can do it in software (otherwise, see link above). + </p> + + <p> + <b> + DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 + chip extractor. These can be found online. + See <a href="http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools">http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools</a> + </b> + </p> + + <p> + Do check the HCL entry: <a href="../hcl/kgpe-d16.html">../hcl/kgpe-d16.html</a> + </p> + + <h2>ASUS KCMA-D8?</h2> + + <p> + If you have the proprietary BIOS, you need to flash libreboot externally. + See <a href="kgpe-d16.html">kcma-d8.html</a>. + </p> + <p> + If you already have coreboot or libreboot installed, without write protection on the flash + chip, then you can do it in software (otherwise, see link above). + </p> + + <p> + <b> + DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 + chip extractor. These can be found online. + See <a href="http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools">http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools</a> + </b> + </p> + + <p> + Do check the HCL entry: <a href="../hcl/kcma-d8.html">../hcl/kcma-d8.html</a> + </p> + + <h2>Are you currently running libreboot (or coreboot)?</h2> + + <p> + X60/T60 users should be fine with this guide. If you write-protected the flash chip, please refer to + <a href="x60_unbrick.html">x60_unbrick.html</a>, <a href="x60tablet_unbrick.html">x60tablet_unbrick.html</a> + or <a href="t60_unbrick.html">t60_unbrick.html</a>. <i>This probably does not apply to you. Most people + do not write-protect the flash chip, so you probably didn't either.</i> + </p> + <p> + Similarly, it is possible to write-protect the flash chip in coreboot or libreboot on GM45 laptops + (X200/R400/T400/T500). If you did this, then you will need to use the links above for flashing, + treating your laptop as though it currently has the proprietary firmware (because write-protected SPI flash + requires external re-flashing, as is also the case when running the proprietary firmware). + </p> + + <p> + If you did not write-protect the flash chip, or it came to you without any write-protection + (<b><i>libreboot does not write-protect the flash chip by default, so this probably applies to you</i></b>), + read on! + </p> + + <h2>MAC address on GM45 (X200/R400/T400/T500)</h2> + + <p> + <b>Users of the X200/R400/T400/T500 take note:</b> The MAC address for the onboard ethernet chipset + is located inside the flash chip. Libreboot ROM images for these laptops contain a generic MAC + address by default (00:F5:F0:40:71:FE), but this is not what you want. + <i>Make sure to change the MAC address inside the ROM image, before flashing it. + The instructions on <a href="../hcl/gm45_remove_me.html#ich9gen">../hcl/gm45_remove_me.html#ich9gen</a> + show how to do this.</i> + </p> + + <p> + It is important that you change the default MAC address, before flashing. It will be printed on a sticker + at the bottom of the laptop, or it will be printed on a sticker next to or underneath the RAM. Alternatively, + and assuming that your current firmware has the correct MAC address in it, you can get it from your OS. + </p> + + <h2>Flash chip size</h2> + + <p> + Use this to find out:<br/> + # <b>dmidecode | grep ROM\ Size</b> + </p> + + <h2>All good?</h2> + + <p>Excellent! Moving on...</p> + + <p> + Download the <i>libreboot_util.tar.xz</i> archive, and extract it. Inside, you will find + a directory called <i>flashrom</i>. This contains statically compiled executable files of + the <i>flashrom</i> utility, which you will use to re-flash your libreboot system. + </p> + + <p> + Simply use <i>cd</i> on your terminal, to switch to the <i>libreboot_util</i> directory. Inside, + there is a script called <i>flash</i>, which will detect what CPU architecture you have + (e.g. i686, x86_64) and use the appropriate executable. It is also possible for you to + build these executables from the libreboot source code archives. + </p> + + <div class="important"> + <p> + How to update the flash chip contents:<br/> + $ <b>sudo ./flash update <a href="#rom">yourrom.rom</a></b> + </p> + </div> + <div class="important"> + <p> + Ocassionally, coreboot changes the name of a given board. If flashrom complains about a board mismatch, but + you are sure that you chose the correct ROM image, then run this alternative command:<br/> + $ <b>sudo ./flash forceupdate <a href="#rom">yourrom.rom</a></b> + </p> + </div> + + <div class="important"> + + <p> + You should see <b>"Verifying flash... VERIFIED."</b> written at the end of the flashrom output. <b>Shut down</b> + after you see this, and then boot up again after a few seconds. + </p> + + </div> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="flashrom_lenovobios">ThinkPad X60/T60: Initial installation guide (if running the proprietary firmware)</h1> + + <p><b>This is for the ThinkPad X60 and T60 while running Lenovo BIOS. If you already have coreboot or libreboot running, + then go to <a href="#flashrom">#flashrom</a> instead!</b></p> + + <p><b>If you are flashing a Lenovo ThinkPad T60, be sure to read <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a></b></p> + + <div class="important"> + <p> + <b>If you are using libreboot_src or git, then make sure that you built the sources first (see <a href="../git/index.html#build">../git/index.html#build</a>).</b> + </p> + </div> + + <p> + <b> + Warning: this guide will not instruct the user how to backup the original Lenovo BIOS firmware. These backups + are tied to each system, and will not work on any other. + For that, please refer to <a href="http://www.coreboot.org/Board:lenovo/x60/Installation">http://www.coreboot.org/Board:lenovo/x60/Installation</a>. + </b> + </p> + + <div class="important"> + + <p> + <b> + If you're using libreboot 20150518, note that there is a mistake in the flashing script. + do this: <em>rm -f patch && wget -O flash http://git.savannah.gnu.org/cgit/libreboot.git/plain/flash?id=910b212e90c6f9c57025e1c7b0c08897af787496 && chmod +x flash</em> + </b> + </p> + + <p> + The first half of the procedure is as follows:<br/> + $ <b>sudo ./flash i945lenovo_firstflash <a href="#rom">yourrom.rom</a>.</b> + </p> + + </div> + + <div class="important"> + + <p> + You should see within the output the following:<br/> + <b>"Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000 are swapped"</b>. + </p> + + <p> + You should also see within the output the following:<br/> + <b>"Your flash chip is in an unknown state"</b>, <b>"FAILED"</b> and <b>"DO NOT REBOOT OR POWEROFF"</b><br/> + Seeing this means that the operation was a <b>resounding</b> success! <b>DON'T PANIC</b>. + </p> + + <p> + See this link for more details: + <a href="http://thread.gmane.org/gmane.linux.bios.flashrom/575">http://thread.gmane.org/gmane.linux.bios.flashrom/575</a>. + </p> + + <p> + If the above is what you see, then <b>SHUT DOWN</b>. Wait a few seconds, and then boot; libreboot is running, but there is a 2nd procedure <b>*needed*</b> (see below). + </p> + + </div> + + <div class="important"> + <p> + When you have booted up again, you must also do this:<br/> + $ <b>sudo ./flash i945lenovo_secondflash <a href="#rom">yourrom.rom</a></b> + </p> + <p> + If flashing fails at this stage, try the following:<br/> + $ <b>sudo ./flashrom/i686/flashrom -p internal:laptop=force_I_want_a_brick -w <a href="#rom">yourrom.rom</a></b> + </p> + </div> + + <div class="important"> + + <p> + You should see within the output the following:<br/> + <b>"Updated BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is untranslated"</b> + </p> + + <p> + You should also see within the output the following:<br/> + <b>"Verifying flash... VERIFIED."</b> + </p> + + </div> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="flashrom_macbook21">MacBook2,1: Initial installation guide (if running the proprietary firmware)</h1> + + <div class="important"> + + <p> + <b>If you have a MacBook1,1, refer to <a href="../hcl/index.html#macbook11">../hcl/index.html#macbook11</a> for flashing instructions.</b> + </p> + + </div> + + <p> + <b> + This is for the MacBook2,1 while running Apple EFI firmware. If you already have + coreboot or libreboot running, then go to <a href="#flashrom">#flashrom</a> instead! + </b> + </p> + + <p> + Be sure to read the information in <a href="../hcl/index.html#macbook21">../hcl/index.html#macbook21</a>. + </p> + + <p> + <b> + Warning: this guide will not instruct the user how to backup the original Apple EFI firmware. + For that, please refer to <a href="http://www.coreboot.org/Board:apple/macbook21">http://www.coreboot.org/Board:apple/macbook21</a>. + </b> + </p> + + <div class="important"> + <p> + <b>If you are using libreboot_src or git, then make sure that you built the sources first (see <a href="../git/index.html#build">../git/index.html#build</a>).</b> + </p> + </div> + + <p> + Look at the <a href="#rom">list of ROM images</a> to see which image is compatible with your device. + </p> + + <div class="important"> + <p> + Use this flashing script, to install libreboot:<br/> + $ <b>sudo ./flash i945apple_firstflash <a href="#rom">yourrom.rom</a></b> + </p> + </div> + + <div class="important"> + + <p> + You should also see within the output the following:<br/> + <b>"Verifying flash... VERIFIED."</b> + </p> + + <p> + Shut down. + </p> + + </div> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/kcma-d8.html b/docs/install/kcma-d8.html new file mode 100644 index 00000000..13041778 --- /dev/null +++ b/docs/install/kcma-d8.html @@ -0,0 +1,109 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>KCMA-D8 external flashing instructions</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">KCMA-D8 external flashing instructions</h1> + <p>Initial flashing instructions for kcma-d8.</p> + <p> + This guide is for those who want libreboot on their ASUS kcma-d8 + motherboard, while they still have the proprietary ASUS BIOS present. + This guide can also be followed (adapted) if you brick you board, to know + how to recover. + </p> + + + <p> + <b>Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules.</b> + </p> + <p> + For more general information about this board, refer to + <a href="../hcl/kcma-d8.html">../hcl/kcma-d8.html</a>. + </p> + + <p> + TODO: show photos here, and other info. + </p> + + <ul> + <li><a href="#preinstall">kcma-d8 boards (and full systems) with libreboot preinstalled</a></li> + <li><a href="#programmer">External programmer</a></li> + </ul> + + <p><a href="index.html">Back to main index</a></p> + </div> + + <div class="section"> + <h1 id="programmer">External programmer</h1> + <p> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for a guide on + how to set up an external SPI programmer. + </p> + <p> + The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, + which you take out and then re-flash with libreboot, using the programmer. + <b>DO NOT</b> remove the chip with your hands. Use a chip extractor tool. + </p> + </div> + + <div class="section"> + + <p> + Copyright © 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/kgpe-d16.html b/docs/install/kgpe-d16.html new file mode 100644 index 00000000..8249dead --- /dev/null +++ b/docs/install/kgpe-d16.html @@ -0,0 +1,124 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>KGPE-D16 external flashing instructions</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">KGPE-D16 external flashing instructions</h1> + <p>Initial flashing instructions for KGPE-D16.</p> + <p> + This guide is for those who want libreboot on their ASUS KGPE-D16 + motherboard, while they still have the proprietary ASUS BIOS present. + This guide can also be followed (adapted) if you brick you board, to know + how to recover. + </p> + + + <p> + <b>Memory initialization is still problematic, for some modules. We recommend avoiding Kingston modules.</b> + </p> + + <p> + For more general information about this board, refer to + <a href="../hcl/kgpe-d16.html">../hcl/kgpe-d16.html</a>. + </p> + + <p> + TODO: show photos here, and other info. + </p> + + <ul> + <li><a href="#preinstall">KGPE-D16 boards (and full systems) with libreboot preinstalled</a></li> + <li><a href="#programmer">External programmer</a></li> + </ul> + + <p><a href="index.html">Back to main index</a></p> + </div> + + <div class="section"> + + <h1 id="preinstall">KGPE-D16 boards (and full systems) with libreboot preinstalled</h1> + + <p> + If you don't want to install libreboot yourself, companies exist that sell these boards + with libreboot pre-installed, along with a free GNU/Linux distribution. + </p> + <p> + Check the <a href="../../suppliers">suppliers</a> page for more information. + </p> + + </div> + + <div class="section"> + <h1 id="programmer">External programmer</h1> + <p> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for a guide on + how to set up an external SPI programmer. + </p> + <p> + The flash chip is in a PDIP 8 socket (SPI flash chip) on the motherboard, + which you take out and then re-flash with libreboot, using the programmer. + <b>DO NOT</b> remove the chip with your hands. Use a chip extractor tool. + </p> + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/r400_external.html b/docs/install/r400_external.html new file mode 100644 index 00000000..ee274e5a --- /dev/null +++ b/docs/install/r400_external.html @@ -0,0 +1,596 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad R400: flashing tutorial (BeagleBone Black)</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Flashing the R400 with a BeagleBone Black</h1> + <p>Initial flashing instructions for R400.</p> + <p> + This guide is for those who want libreboot on their ThinkPad R400 + while they still have the original Lenovo BIOS present. This guide + can also be followed (adapted) if you brick your R400, to know how + to recover. + </p> + <p> + Before following this section, please make sure to setup your libreboot ROM properly first. + Although ROM images are provided pre-built in libreboot, there are some modifications that + you need to make to the one you chose before flashing. (instructions referenced later in + this guide) + </p> + + <p><a href="index.html">Back to main index</a></p> + </div> + + <div class="section"> + + <h1 id="t400">Libreboot T400</h1> + <p> + You may also be interested in the smaller, more portable <a href="t400_external.html">Libreboot T400</a>. + </p> + + </div> + + <div class="section"> + + <h2 id="serial_port">Serial port</h2> + + <p> + EHCI debug might not be needed. It has been reported that the docking station + for this laptop has a serial port, so it might be possible to use that instead. + </p> + + </div> + + <div class="section"> + + <h1 id="lcd_compatibility">LCD compatibly</h1> + <p> + Not all LCD panels are compatible yet. See <a href="../hcl/gm45_lcd.html">../hcl/gm45_lcd.html</a>. + </p> + + </div> + + <div class="section" id="cpu_compatibility"> + + <h1>A note about CPUs</h1> + <p> + <a href="http://www.thinkwiki.org/wiki/Category:R400">ThinkWiki</a> has a list of CPUs + for this system. The Core 2 Duo P8400 and P8600 are believed to work in libreboot. + The Core 2 Duo T9600 was confirmed to work, so the T9400 probably also works. + <b>The Core 2 Duo T5870/5670 and Celeron M 575/585 are untested!</b> + </p> + + <h2>Quad-core CPUs</h2> + + <p> + Incompatible. Do not use. + </p> + + </div> + + <div class="section" id="switchable_graphics"> + + <h1>A note about GPUs</h1> + + <p> + Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this + is referred to as "switchable graphics". In the <i>BIOS setup</i> program + for lenovobios, you can specify that the system will use one or the other (but not both). + </p> + + <p> + Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization. + On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so + native graphics initialization works all the same. + </p> + + <h1>CPU paste required</h1> + + <p> + See <a href="#paste">#paste</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="flashchips">Flash chip size</h1> + + <p> + Use this to find out:<br> + # <b>dmidecode | grep ROM\ Size</b><br> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section photos"> + + <h1 id="macaddress">MAC address</h1> + + <p> + On the R400, the MAC address for the onboard + gigabit ethernet chipset is stored inside the flash chip, + along with other configuration data. + </p> + <p> + Keep a note of the MAC address before disassembly; this is + very important, because you will need to insert this into + the libreboot ROM image before flashing it. + It will be written in one of these locations: + </p> + + <p> + <img src="images/t400/macaddress0.jpg" alt="" /> + <img src="images/t400/macaddress1.jpg" alt="" /> + <img src="images/x200/disassembly/0001.jpg" alt="" /> + </p> + + </div> + + <div class="section photos"> + + <h1>Initial BBB configuration</h1> + + <p> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to + setup the BBB for flashing. + </p> + + <p> + The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): + </p> +<pre> +POMONA 5252 (correlate with the BBB guide) +=== ethernet jack and VGA port ==== + NC - - 21 + 1 - - 17 + NC - - NC + NC - - NC + NC - - NC + NC - - NC + 18 - - 3.3V (PSU) + 22 - - NC - this is pin 1 on the flash chip +=== SATA port === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i><br/> +<img src="images/t400/0065.jpg" alt="" /> +</pre> + <p> + The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): + </p> +<pre> +POMONA 5250 (correlate with the BBB guide) +=== RAM slots ==== + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip +=== slot where the AC jack is connected === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i><br/> +<img src="images/r400/0051.jpg" alt="" /> +</pre> + + <h2 id="disassembly">Disassembly</h2> + + <p> + Remove all screws:<br/> + <img src="images/r400/0000.jpg" alt="" /><br/> + Remove the HDD and optical drive:<br/> + <img src="images/r400/0001.jpg" alt="" /><br/> + Remove the hinge screws:<br/> + <img src="images/r400/0002.jpg" alt="" /> + <img src="images/r400/0003.jpg" alt="" /> + </p> + + <p> + Remove the palm rest and keyboard:<br/> + <img src="images/r400/0004.jpg" alt="" /> + <img src="images/r400/0005.jpg" alt="" /> + </p> + + <p> + Remove these screws, and then remove the bezel:<br/> + <img src="images/r400/0006.jpg" alt="" /> + <img src="images/r400/0007.jpg" alt="" /> + </p> + + <p> + Remove the speaker screws, but don't remove the speakers yet + (just set them loose):<br/> + <img src="images/r400/0008.jpg" alt="" /> + <img src="images/r400/0009.jpg" alt="" /> + <img src="images/r400/0010.jpg" alt="" /> + </p> + + <p> + Remove these screws, and then remove the metal plate:<br/> + <img src="images/r400/0011.jpg" alt="" /> + <img src="images/r400/0012.jpg" alt="" /> + <img src="images/r400/0013.jpg" alt="" /> + </p> + + <p> + Remove the antennas from the wifi card, and then + start unrouting them:<br/> + <img src="images/r400/0014.jpg" alt="" /> + <img src="images/r400/0015.jpg" alt="" /> + <img src="images/r400/0016.jpg" alt="" /> + <img src="images/r400/0017.jpg" alt="" /> + <img src="images/r400/0018.jpg" alt="" /> + <img src="images/r400/0019.jpg" alt="" /> + </p> + + <p> + Disconnect the LCD cable from the motherboard:<br/> + <img src="images/r400/0020.jpg" alt="" /> + <img src="images/r400/0021.jpg" alt="" /> + <img src="images/r400/0022.jpg" alt="" /> + <img src="images/r400/0023.jpg" alt="" /> + </p> + + <p> + Remove the hinge screws, and then remove the LCD panel:<br/> + <img src="images/r400/0024.jpg" alt="" /> + <img src="images/r400/0025.jpg" alt="" /> + <img src="images/r400/0026.jpg" alt="" /> + <img src="images/r400/0027.jpg" alt="" /> + </p> + + <p> + Remove this:<br/> + <img src="images/r400/0028.jpg" alt="" /> + <img src="images/r400/0029.jpg" alt="" /> + </p> + + <p> + Remove this long cable (there are 3 connections):<br/> + <img src="images/r400/0030.jpg" alt="" /> + <img src="images/r400/0031.jpg" alt="" /> + <img src="images/r400/0032.jpg" alt="" /> + <img src="images/r400/0033.jpg" alt="" /> + </p> + + <p> + Disconnect the speaker cable, and remove the speakers:<br/> + <img src="images/r400/0034.jpg" alt="" /> + </p> + + <p> + Remove the heatsink screws, remove the fan + and then remove the heatsink/fan:<br/> + <img src="images/r400/0035.jpg" alt="" /> + <img src="images/r400/0036.jpg" alt="" /> + <img src="images/r400/0037.jpg" alt="" /> + <img src="images/r400/0038.jpg" alt="" /> + </p> + + <p> + Remove the NVRAM battery:<br/> + <img src="images/r400/0039.jpg" alt="" /> + <img src="images/r400/0040.jpg" alt="" /> + </p> + + <p> + Remove this screw:<br/> + <img src="images/r400/0041.jpg" alt="" /> + <img src="images/r400/0042.jpg" alt="" /> + </p> + + <p> + Disconnect the AC jack:<br/> + <img src="images/r400/0043.jpg" alt="" /> + <img src="images/r400/0044.jpg" alt="" /> + </p> + + <p> + Remove this screw and then remove what is under it:<br/> + <img src="images/r400/0045.jpg" alt="" /> + </p> + + <p> + Remove this:<br/> + <img src="images/r400/0046.jpg" alt="" /> + </p> + + <p> + Lift the motherboard (which is still inside the cage) + from the side on the right, removing it completely:<br/> + <img src="images/r400/0047.jpg" alt="" /> + <img src="images/r400/0048.jpg" alt="" /> + </p> + + <p> + Remove all screws, marking each hole so that you know + where to re-insert them. You should place the screws in + a layout corresponding to the order that they were in + before removal: + <img src="images/r400/0049.jpg" alt="" /> + <img src="images/r400/0050.jpg" alt="" /> + </p> + + <p> + Remove the motherboard from the cage, and the SPI flash + chip will be next to the memory slots:<br/> + <img src="images/r400/0051.jpg" alt="" /> + <img src="images/r400/0052.jpg" alt="" /> + </p> + + <p> + Connect your programmer, then connect GND and 3.3V<br/> + <img src="images/t400/0065.jpg" alt="" /> + <img src="images/t400/0066.jpg" alt="" /> + <img src="images/t400/0067.jpg" alt="" /> + <img src="images/t400/0069.jpg" alt="" /> + <img src="images/t400/0070.jpg" alt="" /> + <img src="images/t400/0071.jpg" alt="" /> + </p> + <p> + A dedicated 3.3V PSU was used to create this guide, but + at ATX PSU is also fine:<br/> + <img src="images/t400/0072.jpg" alt="" /> + </p> + + <p> + Of course, make sure to turn on your PSU:<br/> + <img src="images/x200/disassembly/0013.jpg" alt="" /> + </p> + + <p> + Now, you should be ready to install libreboot. + </p> + + <p> + Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. + </p> + <p> + Log in as root on your BBB, using the instructions in <a href="bbb_setup.html#bbb_access">bbb_setup.html#bbb_access</a>. + </p> + <p> + Test that flashrom works:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512</b><br/> + In this case, the output was: + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. +Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" +Please specify which chip definition to use with the -c <chipname> option. +</pre> + <p> + How to backup factory.rom (change the -c option as neeed, for your flash chip):<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom</b><br/> + Note: the <b>-c</b> option is not required in libreboot's patched flashrom, because + the redundant flash chip definitions in <i>flashchips.c</i> have been removed.<br/> + Now compare the 3 images:<br/> + # <b>sha512sum factory*.rom</b><br/> + If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not + the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware + that could be replicated in coreboot and libreboot. + </p> + <p> + Follow the instructions at <a href="../hcl/gm45_remove_me.html#ich9gen">../hcl/gm45_remove_me.html#ich9gen</a> + to change the MAC address inside the libreboot ROM image, before flashing it. + Although there is a default MAC address inside the ROM image, this is not what you want. <b>Make sure + to always change the MAC address to one that is correct for your system.</b> + </p> + <p> + Now flash it:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V</b> + </p> + <p> + <img src="images/x200/disassembly/0015.jpg" alt="" /> + </p> + <p> + You might see errors, but if it says <b>Verifying flash... VERIFIED</b> at the end, then it's flashed and should boot. + If you see errors, try again (and again, and again); the message <b>Chip content is identical to the requested image</b> + is also an indication of a successful installation. + </p> + <p> + Example output from running the command (see above): + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Reading old flash chip contents... done. +Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 +ERASE FAILED! +Reading current flash chip contents... done. Looking for another erase function. +Erase/write done. +Verifying flash... VERIFIED. +</pre> + + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section photos" id="paste"> + + <h1>Thermal paste (IMPORTANT)</h1> + + <p> + Because part of this procedure involved removing the heatsink, you will need to apply new paste. + Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. + </p> + + <p> + When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. + Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems. + </p> + + <p> + <img src="images/t400/paste.jpg" alt="" /> + </p> + + <p> + NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. + Other guides online detail the proper application procedure. + </p> + + </div> + + <div class="section"> + + <h1 id="wifi">Wifi</h1> + + <p> + The R400 typically comes with an Intel wifi chipset, which does not + work without proprietary software. For a list of wifi chipsets that + work without proprietary software, see + <a href="../hcl/index.html#recommended_wifi">../hcl/index.html#recommended_wifi</a>. + </p> + + <p> + Some R400 laptops might come with an Atheros chipset, but this is 802.11g only. + </p> + + <p> + It is recommended that you install a new wifi chipset. This can only + be done after installing libreboot, because the original firmware has + a whitelist of approved chips, and it will refuse to boot if you + use an 'unauthorized' wifi card. + </p> + + <p> + The following photos show an Atheros AR5B95 being installed, to + replace the Intel chip that this R400 came with:<br/> + <img src="images/t400/0012.jpg" alt="" /> + <img src="images/t400/ar5b95.jpg" alt="" /> + </p> + + </div> + + <div class="section"> + + <h1 id="wwan">WWAN</h1> + <p> + If you have a WWAN/3G card and/or sim card reader, remove them permanently. + The WWAN-3G card has proprietary firmware inside; the technology is + identical to what is used in mobile phones, so it can also track your movements. + </p> + <p> + Not to be confused with wifi (wifi is fine). + </p> + + </div> + + <div class="section photos"> + + <h1 id="memory">Memory</h1> + + <p> + You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs + (speed/size). Non-matching pairs won't work. You can also install a + single module (meaning, one of the slots will be empty) in slot 0. + </p> + + <p> + Make sure that the RAM you buy is the 2Rx8 density. + </p> + + <p> + <a href="http://www.forum.thinkpads.com/viewtopic.php?p=760721">This page</a> might be useful for RAM compatibility info + (note: coreboot raminit is different, so this page might be BS) + </p> + + <p> + The following photo shows 8GiB (2x4GiB) of RAM installed:<br/> + <img src="images/t400/memory.jpg" alt="" /> + </p> + + </div> + + <div class="section photos"> + + <h2> + Boot it! + </h2> + <p> + You should see something like this: + </p> + <p> + <img src="images/t400/boot0.jpg" alt="" /> + <img src="images/t400/boot1.jpg" alt="" /> + </p> + + <p> + Now <a href="../gnulinux/index.html">install GNU/Linux</a>. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/t400_external.html b/docs/install/t400_external.html new file mode 100644 index 00000000..74b4f0f0 --- /dev/null +++ b/docs/install/t400_external.html @@ -0,0 +1,579 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad T400: flashing tutorial (BeagleBone Black)</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Flashing the T400 with a BeagleBone Black</h1> + + <p>Initial flashing instructions for T400.</p> + <p> + This guide is for those who want libreboot on their ThinkPad T400 + while they still have the original Lenovo BIOS present. This guide + can also be followed (adapted) if you brick your T400, to know how + to recover. + </p> + + <p><a href="index.html">Back to main index</a></p> + </div> + + <div class="section"> + + <h1 id="preinstall">T400 laptops with libreboot pre-installed</h1> + + <p> + If you don't want to install libreboot yourself, companies exist that sell these laptops + with libreboot pre-installed, along with a free GNU/Linux distribution. + </p> + <p> + Check the <a href="../../suppliers">suppliers</a> page for more information. + </p> + + </div> + + <div class="section"> + + <h2 id="serial_port">Serial port</h2> + + <p> + EHCI debug might not be needed. It has been reported that the docking station + for this laptop has a serial port, so it might be possible to use that instead. + </p> + + </div> + + <div class="section"> + + <h1 id="lcd_compatibility">LCD compatibly</h1> + <p> + Not all LCD panels are compatible yet. See <a href="../hcl/gm45_lcd.html">../hcl/gm45_lcd.html</a>. + </p> + + </div> + + <div class="section" id="cpu_compatibility"> + + <h1>A note about CPUs</h1> + <p> + <a href="http://www.thinkwiki.org/wiki/Category:T400">ThinkWiki</a> has a list of CPUs + for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in libreboot. + The T9600 was confirmed to work, so the T9500/T9550 probably also work. + </p> + + <h2>Quad-core CPUs</h2> + + <p> + Incompatible. Do not use. + </p> + + </div> + + <div class="section" id="switchable_graphics"> + + <h1>A note about GPUs</h1> + + <p> + Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this + is referred to as "switchable graphics". In the <i>BIOS setup</i> program + for lenovobios, you can specify that the system will use one or the other (but not both). + </p> + + <p> + Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization. + On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so + native graphics initialization works all the same. + </p> + + <h1>CPU paste required</h1> + + <p> + See <a href="#paste">#paste</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="flashchips">Flash chip size</h1> + + <p> + Use this to find out:<br> + # <b>dmidecode | grep ROM\ Size</b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section photos"> + + <h1 id="macaddress">MAC address</h1> + + <p> + On the T400, the MAC address for the onboard + gigabit ethernet chipset is stored inside the flash chip, + along with other configuration data. + </p> + <p> + Keep a note of the MAC address before disassembly; this is + very important, because you will need to insert this into + the libreboot ROM image before flashing it. + It will be written in one of these locations: + </p> + + <p> + <img src="images/t400/macaddress0.jpg" alt="" /> + <img src="images/t400/macaddress1.jpg" alt="" /> + <img src="images/x200/disassembly/0001.jpg" alt="" /> + </p> + + </div> + + <div class="section photos"> + + <h1>Initial BBB configuration</h1> + + <p> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to + configure the BBB for flashing. + </p> + + <p> + The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): + </p> +<pre> +POMONA 5252 (correlate with the BBB guide) +=== ethernet jack and VGA port ==== + NC - - 21 + 1 - - 17 + NC - - NC + NC - - NC + NC - - NC + NC - - NC + 18 - - 3.3V (PSU) + 22 - - NC - this is pin 1 on the flash chip +=== SATA port === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i><br/> +<img src="images/t400/0065.jpg" alt="" /> +</pre> + <p> + The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): + </p> +<pre> +POMONA 5250 (correlate with the BBB guide) +=== RAM slots ==== + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip +=== slot where the AC jack is connected ===<br/> +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i><br/> +<img src="images/t500/0060.jpg" alt="" /> +</pre> + + <h2> + The procedure + </h2> + + <p> + Remove <i>all</i> screws, placing them in the order that you removed them:<br/> + <img src="images/t400/0001.jpg" alt="" /> + <img src="images/t400/0002.jpg" alt="" /> + </p> + <p> + Remove those three screws then remove the rear bezel:<br/> + <img src="images/t400/0003.jpg" alt="" /> + <img src="images/t400/0004.jpg" alt="" /> + <img src="images/t400/0005.jpg" alt="" /> + <img src="images/t400/0006.jpg" alt="" /> + </p> + <p> + Remove the speakers:<br/> + <img src="images/t400/0007.jpg" alt="" /> + <img src="images/t400/0008.jpg" alt="" /> + <img src="images/t400/0009.jpg" alt="" /> + <img src="images/t400/0010.jpg" alt="" /> + <img src="images/t400/0011.jpg" alt="" /> + </p> + <p> + Remove the wifi:<br/> + <img src="images/t400/0012.jpg" alt="" /> + <img src="images/t400/0013.jpg" alt="" /> + </p> + <p> + Remove this cable:<br/> + <img src="images/t400/0014.jpg" alt="" /> + <img src="images/t400/0015.jpg" alt="" /> + <img src="images/t400/0016.jpg" alt="" /> + <img src="images/t400/0017.jpg" alt="" /> + <img src="images/t400/0018.jpg" alt="" /> + </p> + <p> + Unroute those antenna wires:<br/> + <img src="images/t400/0019.jpg" alt="" /> + <img src="images/t400/0020.jpg" alt="" /> + <img src="images/t400/0021.jpg" alt="" /> + <img src="images/t400/0022.jpg" alt="" /> + <img src="images/t400/0023.jpg" alt="" /> + </p> + <p> + Remove the LCD assembly:<br/> + <img src="images/t400/0024.jpg" alt="" /> + <img src="images/t400/0025.jpg" alt="" /> + <img src="images/t400/0026.jpg" alt="" /> + <img src="images/t400/0027.jpg" alt="" /> + <img src="images/t400/0028.jpg" alt="" /> + <img src="images/t400/0029.jpg" alt="" /> + <img src="images/t400/0030.jpg" alt="" /> + <img src="images/t400/0031.jpg" alt="" /> + </p> + <p> + Disconnect the NVRAM battery:<br/> + <img src="images/t400/0033.jpg" alt="" /> + </p> + <p> + Disconnect the fan:<br/> + <img src="images/t400/0034.jpg" alt="" /> + </p> + <p> + Unscrew these:<br/> + <img src="images/t400/0035.jpg" alt="" /> + <img src="images/t400/0036.jpg" alt="" /> + <img src="images/t400/0037.jpg" alt="" /> + <img src="images/t400/0038.jpg" alt="" /> + </p> + <p> + Unscrew the heatsink, then lift it off:<br/> + <img src="images/t400/0039.jpg" alt="" /> + <img src="images/t400/0040.jpg" alt="" /> + </p> + <p> + Disconnect the power jack:<br/> + <img src="images/t400/0041.jpg" alt="" /> + <img src="images/t400/0042.jpg" alt="" /> + </p> + <p> + Loosen this:<br/> + <img src="images/t400/0043.jpg" alt="" /> + </p> + <p> + Remove this:<br/> + <img src="images/t400/0044.jpg" alt="" /> + <img src="images/t400/0045.jpg" alt="" /> + <img src="images/t400/0046.jpg" alt="" /> + <img src="images/t400/0047.jpg" alt="" /> + <img src="images/t400/0048.jpg" alt="" /> + </p> + <p> + Unscrew these:<br/> + <img src="images/t400/0049.jpg" alt="" /> + <img src="images/t400/0050.jpg" alt="" /> + </p> + <p> + Remove this:<br/> + <img src="images/t400/0051.jpg" alt="" /> + <img src="images/t400/0052.jpg" alt="" /> + </p> + <p> + Unscrew this:<br/> + <img src="images/t400/0053.jpg" alt="" /> + </p> + <p> + Remove the motherboard (the cage is still attached) from + the right hand side, then lift it out:<br/> + <img src="images/t400/0054.jpg" alt="" /> + <img src="images/t400/0055.jpg" alt="" /> + <img src="images/t400/0056.jpg" alt="" /> + </p> + <p> + Remove these screws, placing the screws in the same layout + and marking each screw hole (so that you know what ones + to put the screws back into later): + <img src="images/t400/0057.jpg" alt="" /> + <img src="images/t400/0058.jpg" alt="" /> + <img src="images/t400/0059.jpg" alt="" /> + <img src="images/t400/0060.jpg" alt="" /> + <img src="images/t400/0061.jpg" alt="" /> + <img src="images/t400/0062.jpg" alt="" /> + </p> + <p> + Separate the motherboard:<br/> + <img src="images/t400/0063.jpg" alt="" /> + <img src="images/t400/0064.jpg" alt="" /> + </p> + <p> + Connect your programmer, then connect GND and 3.3V<br/> + <img src="images/t400/0065.jpg" alt="" /> + <img src="images/t400/0066.jpg" alt="" /> + <img src="images/t400/0067.jpg" alt="" /> + <img src="images/t400/0069.jpg" alt="" /> + <img src="images/t400/0070.jpg" alt="" /> + <img src="images/t400/0071.jpg" alt="" /> + </p> + <p> + A dedicated 3.3V PSU was used to create this guide, but + at ATX PSU is also fine:<br/> + <img src="images/t400/0072.jpg" alt="" /> + </p> + + <p> + Of course, make sure to turn on your PSU:<br/> + <img src="images/x200/disassembly/0013.jpg" alt="" /> + </p> + + <p> + Now, you should be ready to install libreboot. + </p> + + <p> + Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. + </p> + <p> + Log in as root on your BBB, using the instructions in <a href="bbb_setup.html#bbb_access">bbb_setup.html#bbb_access</a>. + </p> + <p> + Test that flashrom works:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512</b><br/> + In this case, the output was: + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. +Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" +Please specify which chip definition to use with the -c <chipname> option. +</pre> + <p> + How to backup factory.rom (change the -c option as neeed, for your flash chip):<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom</b><br/> + Note: the <b>-c</b> option is not required in libreboot's patched flashrom, because + the redundant flash chip definitions in <i>flashchips.c</i> have been removed.<br/> + Now compare the 3 images:<br/> + # <b>sha512sum factory*.rom</b><br/> + If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not + the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware + that could be replicated in coreboot and libreboot. + </p> + <p> + Follow the instructions at <a href="../hcl/gm45_remove_me.html#ich9gen">../hcl/gm45_remove_me.html#ich9gen</a> + to change the MAC address inside the libreboot ROM image, before flashing it. + Although there is a default MAC address inside the ROM image, this is not what you want. <b>Make sure + to always change the MAC address to one that is correct for your system.</b> + </p> + <p> + Now flash it:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V</b> + </p> + <p> + <img src="images/x200/disassembly/0015.jpg" alt="" /> + </p> + <p> + You might see errors, but if it says <b>Verifying flash... VERIFIED</b> at the end, then it's flashed and should boot. + If you see errors, try again (and again, and again); the message <b>Chip content is identical to the requested image</b> + is also an indication of a successful installation. + </p> + <p> + Example output from running the command (see above): + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Reading old flash chip contents... done. +Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 +ERASE FAILED! +Reading current flash chip contents... done. Looking for another erase function. +Erase/write done. +Verifying flash... VERIFIED. +</pre> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section photos" id="paste"> + + <h1>Thermal paste (IMPORTANT)</h1> + + <p> + Because part of this procedure involved removing the heatsink, you will need to apply new paste. + Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. + </p> + + <p> + When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. + Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems. + </p> + + <p> + <img src="images/t400/paste.jpg" alt="" /> + </p> + + <p> + NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. + Other guides online detail the proper application procedure. + </p> + + </div> + + <div class="section"> + + <h1 id="wifi">Wifi</h1> + + <p> + The T400 typically comes with an Intel wifi chipset, which does not + work without proprietary software. For a list of wifi chipsets that + work without proprietary software, see + <a href="../hcl/index.html#recommended_wifi">../hcl/index.html#recommended_wifi</a>. + </p> + + <p> + Some T400 laptops might come with an Atheros chipset, but this is 802.11g only. + </p> + + <p> + It is recommended that you install a new wifi chipset. This can only + be done after installing libreboot, because the original firmware has + a whitelist of approved chips, and it will refuse to boot if you + use an 'unauthorized' wifi card. + </p> + + <p> + The following photos show an Atheros AR5B95 being installed, to + replace the Intel chip that this T400 came with:<br/> + <img src="images/t400/0012.jpg" alt="" /> + <img src="images/t400/ar5b95.jpg" alt="" /> + </p> + + </div> + + <div class="section"> + + <h1 id="wwan">WWAN</h1> + <p> + If you have a WWAN/3G card and/or sim card reader, remove them permanently. + The WWAN-3G card has proprietary firmware inside; the technology is + identical to what is used in mobile phones, so it can also track your movements. + </p> + <p> + Not to be confused with wifi (wifi is fine). + </p> + + </div> + + <div class="section photos"> + + <h1 id="memory">Memory</h1> + + <p> + You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs + (speed/size). Non-matching pairs won't work. You can also install a + single module (meaning, one of the slots will be empty) in slot 0. + </p> + + <p> + Make sure that the RAM you buy is the 2Rx8 density. + </p> + + <p> + <a href="http://www.forum.thinkpads.com/viewtopic.php?p=760721">This page</a> might be useful for RAM compatibility info + (note: coreboot raminit is different, so this page might be BS) + </p> + + <p> + The following photo shows 8GiB (2x4GiB) of RAM installed:<br/> + <img src="images/t400/memory.jpg" alt="" /> + </p> + + </div> + + <div class="section photos"> + + <h2> + Boot it! + </h2> + <p> + You should see something like this: + </p> + <p> + <img src="images/t400/boot0.jpg" alt="" /> + <img src="images/t400/boot1.jpg" alt="" /> + </p> + + <p> + Now <a href="../gnulinux/index.html">install GNU/Linux</a>. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/t500_external.html b/docs/install/t500_external.html new file mode 100644 index 00000000..f83934b2 --- /dev/null +++ b/docs/install/t500_external.html @@ -0,0 +1,589 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad T500: flashing tutorial (BeagleBone Black)</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Flashing the T500 with a BeagleBone Black</h1> + + <p>Initial flashing instructions for T500.</p> + <p> + This guide is for those who want libreboot on their ThinkPad T500 + while they still have the original Lenovo BIOS present. This guide + can also be followed (adapted) if you brick your T500, to know how + to recover. + </p> + + <p><a href="index.html">Back to main index</a></p> + </div> + + <div class="section"> + + <h1 id="t400">Libreboot T400</h1> + <p> + You may also be interested in the smaller, more portable <a href="t400_external.html">Libreboot T400</a>. + </p> + + </div> + + <div class="section"> + + <h2 id="serial_port">Serial port</h2> + + <p> + EHCI debug might not be needed. It has been reported that the docking station + for this laptop has a serial port, so it might be possible to use that instead. + </p> + + </div> + + <div class="section"> + + <h1 id="lcd_compatibility">LCD compatibly</h1> + <p> + Not all LCD panels are compatible yet. See <a href="../hcl/gm45_lcd.html">../hcl/gm45_lcd.html</a>. + </p> + + </div> + + <div class="section" id="cpu_compatibility"> + + <h1>A note about CPUs</h1> + <p> + <a href="http://www.thinkwiki.org/wiki/Category:T500">ThinkWiki</a> has a list of CPUs + for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in libreboot. + The T9600 was also tested on the T400 and confirmed working, so the T9400/T9500/T9550 probably + also work, but they are untested. + </p> + + <h2>Quad-core CPUs</h2> + + <p> + Incompatible. Do not use. + </p> + + </div> + + <div class="section" id="switchable_graphics"> + + <h1>A note about GPUs</h1> + + <p> + Some models have an Intel GPU, while others have both an ATI and an Intel GPU; this + is referred to as "switchable graphics". In the <i>BIOS setup</i> program + for lenovobios, you can specify that the system will use one or the other (but not both). + </p> + + <p> + Libreboot is known to work on systems with only the Intel GPU, using native graphics initialization. + On systems with switchable graphics, the Intel GPU is used and the ATI GPU is disabled, so + native graphics initialization works all the same. + </p> + + <h1>CPU paste required</h1> + + <p> + See <a href="#paste">#paste</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="flashchips">Flash chip size</h1> + + <p> + Use this to find out:<br/> + # <b>dmidecode | grep ROM\ Size</b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section photos"> + + <h1 id="macaddress">MAC address</h1> + + <p> + On the T500, the MAC address for the onboard + gigabit ethernet chipset is stored inside the flash chip, + along with other configuration data. + </p> + <p> + Keep a note of the MAC address before disassembly; this is + very important, because you will need to insert this into + the libreboot ROM image before flashing it. + It will be written in one of these locations: + </p> + + <p> + <img src="images/t400/macaddress0.jpg" alt="" /> + <img src="images/t400/macaddress1.jpg" alt="" /> + <img src="images/x200/disassembly/0001.jpg" alt="" /> + </p> + + </div> + + <div class="section photos"> + + <h1>Initial BBB configuration</h1> + + <p> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to + configure the BBB for flashing. + </p> + + <p> + The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): + </p> +<pre> +POMONA 5252 (correlate with the BBB guide) +=== ethernet jack and VGA port ==== + NC - - 21 + 1 - - 17 + NC - - NC + NC - - NC + NC - - NC + NC - - NC + 18 - - 3.3V (PSU) + 22 - - NC - this is pin 1 on the flash chip +=== SATA port === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i><br/> +<img src="images/t400/0065.jpg" alt="" /> +</pre> + <p> + The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): + </p> +<pre> +POMONA 5250 (correlate with the BBB guide) +=== RAM slots ==== + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip +=== slot where the AC jack is connected ===<br/> +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i><br/> +<img src="images/t500/0060.jpg" alt="" /> +</pre> + + <h2> + The procedure + </h2> + + <p> + Remove all screws:<br/> + <img src="images/t500/0000.jpg" alt="" /><br/> + It is also advisable to, throughout the disassembly, + place any screws and/or components that you removed in + the same layout or arrangement. The follow photos demonstrate + this:<br/> + <img src="images/t500/0001.jpg" alt="" /> + <img src="images/t500/0002.jpg" alt="" /> + </p> + <p> + Remove the HDD/SSD and optical drive:<br/> + <img src="images/t500/0003.jpg" alt="" /> + <img src="images/t500/0004.jpg" alt="" /> + </p> + <p> + Remove the palm rest:<br/> + <img src="images/t500/0005.jpg" alt="" /> + <img src="images/t500/0006.jpg" alt="" /> + </p> + <p> + Remove the keyboard and rear bezel:<br/> + <img src="images/t500/0007.jpg" alt="" /> + <img src="images/t500/0008.jpg" alt="" /> + <img src="images/t500/0009.jpg" alt="" /> + <img src="images/t500/0010.jpg" alt="" /> + <img src="images/t500/0011.jpg" alt="" /> + <img src="images/t500/0012.jpg" alt="" /> + </p> + <p> + If you have a WWAN/3G card and/or sim card reader, + remove them permanently. The WWAN-3G card has proprietary firmware inside; the technology is identical + to what is used in mobile phones, so it can also track + your movements:<br/> + <img src="images/t500/0013.jpg" alt="" /> + <img src="images/t500/0017.jpg" alt="" /> + <img src="images/t500/0018.jpg" alt="" /> + </p> + <p> + Remove this frame, and then remove the wifi chip:<br/> + <img src="images/t500/0014.jpg" alt="" /> + <img src="images/t500/0015.jpg" alt="" /> + <img src="images/t500/0016.jpg" alt="" /> + </p> + <p> + Remove the speakers:<br/> + <img src="images/t500/0019.jpg" alt="" /> + <img src="images/t500/0020.jpg" alt="" /> + <img src="images/t500/0021.jpg" alt="" /> + <img src="images/t500/0022.jpg" alt="" /> + <img src="images/t500/0023.jpg" alt="" /> + <img src="images/t500/0024.jpg" alt="" /> + <img src="images/t500/0025.jpg" alt="" /> + </p> + <p> + Remove the NVRAM battery (already removed in this photo):<br/> + <img src="images/t500/0026.jpg" alt="" /> + </p> + <p> + When you re-assemble, you will be replacing the wifi chip + with another. These two screws don't hold anything together, + but they are included in your system because the screw + holes for half-height cards are a different size, so + use these if you will be installing a half-height card:<br/> + <img src="images/t500/0027.jpg" alt="" /> + </p> + <p> + Unroute the antenna wires:<br/> + <img src="images/t500/0028.jpg" alt="" /> + <img src="images/t500/0029.jpg" alt="" /> + <img src="images/t500/0030.jpg" alt="" /> + <img src="images/t500/0031.jpg" alt="" /> + </p> + <p> + Disconnect the LCD cable from the motherboard:<br/> + <img src="images/t500/0032.jpg" alt="" /> + <img src="images/t500/0033.jpg" alt="" /> + </p> + <p> + Remove the LCD assembly hinge screws, and then remove the LCD + assembly:<br/> + <img src="images/t500/0034.jpg" alt="" /> + <img src="images/t500/0035.jpg" alt="" /> + <img src="images/t500/0036.jpg" alt="" /> + </p> + <p> + Remove the fan and heatsink:<br/> + <img src="images/t500/0037.jpg" alt="" /> + <img src="images/t500/0038.jpg" alt="" /> + <img src="images/t500/0039.jpg" alt="" /> + </p> + <p> + Remove this screw:<br/> + <img src="images/t500/0040.jpg" alt="" /> + </p> + <p> + Remove these cables, keeping note of how and in what + arrangement they are connected:<br/> + <img src="images/t500/0041.jpg" alt="" /> + <img src="images/t500/0042.jpg" alt="" /> + <img src="images/t500/0043.jpg" alt="" /> + <img src="images/t500/0044.jpg" alt="" /> + <img src="images/t500/0045.jpg" alt="" /> + <img src="images/t500/0046.jpg" alt="" /> + <img src="images/t500/0047.jpg" alt="" /> + <img src="images/t500/0048.jpg" alt="" /> + <img src="images/t500/0049.jpg" alt="" /> + </p> + <p> + Disconnect the power jack:<br/> + <img src="images/t500/0050.jpg" alt="" /> + <img src="images/t500/0051.jpg" alt="" /> + </p> + <p> + Remove the motherboard and cage from the base + (the marked hole is where those cables were routed through):<br/> + <img src="images/t500/0052.jpg" alt="" /> + <img src="images/t500/0053.jpg" alt="" /> + </p> + <p> + Remove all screws, arranging them in the same layout + when placing the screws on a surface and marking each screw + hole (this is to reduce the possibility of putting them + back in the wrong holes):<br/> + <img src="images/t500/0054.jpg" alt="" /> + <img src="images/t500/0055.jpg" alt="" /> + </p> + <p> + Also remove this:<br/> + <img src="images/t500/0056.jpg" alt="" /> + <img src="images/t500/0057.jpg" alt="" /> + </p> + <p> + Separate the motherboard from the cage:<br/> + <img src="images/t500/0058.jpg" alt="" /> + <img src="images/t500/0059.jpg" alt="" /> + </p> + <p> + The flash chip is next to the memory slots. On this + system, it was a SOIC-8 (4MiB or 32Mb) flash chip:<br/> + <img src="images/t500/0060.jpg" alt="" /> + </p> + <p> + Connect your programmer, then connect GND and 3.3V<br/> + <img src="images/t500/0061.jpg" alt="" /><br/> + <img src="images/t400/0067.jpg" alt="" /> + <img src="images/t400/0069.jpg" alt="" /> + <img src="images/t400/0070.jpg" alt="" /> + <img src="images/t400/0071.jpg" alt="" /> + </p> + <p> + A dedicated 3.3V PSU was used to create this guide, but + at ATX PSU is also fine:<br/> + <img src="images/t400/0072.jpg" alt="" /> + </p> + + <p> + Of course, make sure to turn on your PSU:<br/> + <img src="images/x200/disassembly/0013.jpg" alt="" /> + </p> + + <p> + Now, you should be ready to install libreboot. + </p> + + <p> + Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. + </p> + <p> + Log in as root on your BBB, using the instructions in <a href="bbb_setup.html#bbb_access">bbb_setup.html#bbb_access</a>. + </p> + <p> + Test that flashrom works:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512</b><br/> + In this case, the output was: + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. +Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" +Please specify which chip definition to use with the -c <chipname> option. +</pre> + <p> + How to backup factory.rom (change the -c option as neeed, for your flash chip):<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom</b><br/> + Note: the <b>-c</b> option is not required in libreboot's patched flashrom, because + the redundant flash chip definitions in <i>flashchips.c</i> have been removed.<br/> + Now compare the 3 images:<br/> + # <b>sha512sum factory*.rom</b><br/> + If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not + the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware + that could be replicated in coreboot and libreboot. + </p> + <p> + Follow the instructions at <a href="../hcl/gm45_remove_me.html#ich9gen">../hcl/gm45_remove_me.html#ich9gen</a> + to change the MAC address inside the libreboot ROM image, before flashing it. + Although there is a default MAC address inside the ROM image, this is not what you want. <b>Make sure + to always change the MAC address to one that is correct for your system.</b> + </p> + <p> + Now flash it:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V</b> + </p> + <p> + <img src="images/x200/disassembly/0015.jpg" alt="" /> + </p> + <p> + You might see errors, but if it says <b>Verifying flash... VERIFIED</b> at the end, then it's flashed and should boot. + If you see errors, try again (and again, and again); the message <b>Chip content is identical to the requested image</b> + is also an indication of a successful installation. + </p> + <p> + Example output from running the command (see above): + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Reading old flash chip contents... done. +Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 +ERASE FAILED! +Reading current flash chip contents... done. Looking for another erase function. +Erase/write done. +Verifying flash... VERIFIED. +</pre> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section photos" id="paste"> + + <h1>Thermal paste (IMPORTANT)</h1> + + <p> + Because part of this procedure involved removing the heatsink, you will need to apply new paste. + Arctic MX-4 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. + </p> + + <p> + When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. + Then apply new paste. Arctic MX-4 is also much better than the default paste used on these systems. + </p> + + <p> + <img src="images/t400/paste.jpg" alt="" /> + </p> + + <p> + NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. + Other guides online detail the proper application procedure. + </p> + + </div> + + <div class="section"> + + <h1 id="wifi">Wifi</h1> + + <p> + The T500 typically comes with an Intel wifi chipset, which does not + work without proprietary software. For a list of wifi chipsets that + work without proprietary software, see + <a href="../hcl/index.html#recommended_wifi">../hcl/index.html#recommended_wifi</a>. + </p> + + <p> + Some T500 laptops might come with an Atheros chipset, but this is 802.11g only. + </p> + + <p> + It is recommended that you install a new wifi chipset. This can only + be done after installing libreboot, because the original firmware has + a whitelist of approved chips, and it will refuse to boot if you + use an 'unauthorized' wifi card. + </p> + + <p> + The following photos show an Atheros AR5B95 being installed, to + replace the Intel chip that this T500 came with:<br/> + <img src="images/t400/0012.jpg" alt="" /> + <img src="images/t400/ar5b95.jpg" alt="" /> + </p> + + </div> + + <div class="section"> + + <h1 id="wwan">WWAN</h1> + <p> + If you have a WWAN/3G card and/or sim card reader, remove them permanently. + The WWAN-3G card has DMA, and proprietary firmware inside; the technology is + identical to what is used in mobile phones, so it can also track your movements. + </p> + <p> + Not to be confused with wifi (wifi is fine). + </p> + + </div> + + <div class="section photos"> + + <h1 id="memory">Memory</h1> + + <p> + You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs + (speed/size). Non-matching pairs won't work. You can also install a + single module (meaning, one of the slots will be empty) in slot 0. + </p> + + <p> + Make sure that the RAM you buy is the 2Rx8 density. + </p> + + <p> + <a href="http://www.forum.thinkpads.com/viewtopic.php?p=760721">This page</a> might be useful for RAM compatibility info + (note: coreboot raminit is different, so this page might be BS) + </p> + + <p> + The following photo shows 8GiB (2x4GiB) of RAM installed:<br/> + <img src="images/t400/memory.jpg" alt="" /> + </p> + + </div> + + <div class="section photos"> + + <h2> + Boot it! + </h2> + <p> + You should see something like this: + </p> + <p> + <img src="images/t500/0062.jpg" alt="" /> + </p> + + <p> + Now <a href="../gnulinux/index.html">install GNU/Linux</a>. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/t60_unbrick.html b/docs/install/t60_unbrick.html new file mode 100644 index 00000000..a6a55cbe --- /dev/null +++ b/docs/install/t60_unbrick.html @@ -0,0 +1,322 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad T60: Recovery guide</title> +</head> + +<body> + + <div class="section"> + <h1>ThinkPad T60: Recovery guide</h1> + <p>This section documents how to recover from a bad flash that prevents your ThinkPad T60 from booting.</p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + <h2>Table of Contents</h2> + <ul> + <li> + Types of brick: + <ul> + <li><a href="#bucts_brick">Brick type 1: bucts not reset</a></li> + <li><a href="#recovery">Brick type 2: bad rom (or user error), system won't boot</a></li> + </ul> + </li> + </ul> + </div> + + <div class="section"> + <h1 id="bucts_brick">Brick type 1: bucts not reset.</h1> + <p> + You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and + the ROM wasn't dd'd.* or if Lenovo BIOS was present and libreboot wasn't flashed.<br/><br/> + + In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:<br/> + <img src="../images/t60_dev/0006.JPG" alt="" /><br/><br/> + + *Those dd commands should be applied to all newly compiled T60 ROM images (the ROM images in libreboot binary archives already have this applied!):<br/> + dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k<br/> + dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump<br/> + dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc<br/> + (doing this makes the ROM suitable for use when flashing a system that still has Lenovo BIOS running, + using those instructions: <a href="http://www.coreboot.org/Board:lenovo/x60/Installation">http://www.coreboot.org/Board:lenovo/x60/Installation</a>. + (it says x60, but instructions for t60 are identical) + </p> + </div> + + <div class="section"> + + <h1 id="recovery">bad rom (or user error), system won't boot</h1> + + <p> + In this scenario, you compiled a ROM that had an incorrect configuration, or there is an actual bug preventing your system from + booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS was running. In any case, your system is bricked and will not boot at all. + </p> + <p> + "Unbricking" means flashing a known-good (working) ROM. The problem: you can't boot the system, making this difficult. In this situation, external hardware (see hardware requirements above) is needed which can flash the SPI chip (where libreboot resides). + </p> + + <p> + Remove those screws and remove the HDD:<br/> + <img src="../images/t60_dev/0001.JPG" alt="" /> <img src="../images/t60_dev/0002.JPG" alt="" /> + </p> + + <p> + Lift off the palm rest:<br/> + <img src="../images/t60_dev/0003.JPG" alt="" /> + </p> + + <p> + Lift up the keyboard, pull it back a bit, flip it over like that and then disconnect it from the board:<br/> + <img src="../images/t60_dev/0004.JPG" alt="" /> <img src="../images/t60_dev/0005.JPG" alt="" /> <img src="../images/t60_dev/0006.JPG" alt="" /> + </p> + + <p> + Gently wedge both sides loose:<br/> + <img src="../images/t60_dev/0007.JPG" alt="" /> <img src="../images/t60_dev/0008.JPG" alt="" /> + </p> + + <p> + Remove that cable from the position:<br/> + <img src="../images/t60_dev/0009.JPG" alt="" /> <img src="../images/t60_dev/0010.JPG" alt="" /> + </p> + + <p> + Now remove that bezel. Remove wifi, nvram battery and speaker connector (also remove 56k modem, on the left of wifi):<br/> + <img src="../images/t60_dev/0011.JPG" alt="" /> + </p> + + <p> + Remove those screws:<br/> + <img src="../images/t60_dev/0012.JPG" alt="" /> + </p> + + <p> + Disconnect the power jack:<br/> + <img src="../images/t60_dev/0013.JPG" alt="" /> + </p> + + <p> + Remove nvram battery:<br/> + <img src="../images/t60_dev/0014.JPG" alt="" /> + </p> + + <p> + Disconnect cable (for 56k modem) and disconnect the other cable:<br/> + <img src="../images/t60_dev/0015.JPG" alt="" /> <img src="../images/t60_dev/0016.JPG" alt="" /> + </p> + + <p> + Disconnect speaker cable:<br/> + <img src="../images/t60_dev/0017.JPG" alt="" /> + </p> + + <p> + Disconnect the other end of the 56k modem cable:<br/> + <img src="../images/t60_dev/0018.JPG" alt="" /> + </p> + + <p> + Make sure you removed it:<br/> + <img src="../images/t60_dev/0019.JPG" alt="" /> + </p> + + <p> + Unscrew those:<br/> + <img src="../images/t60_dev/0020.JPG" alt="" /> + </p> + + <p> + Make sure you removed those:<br/> + <img src="../images/t60_dev/0021.JPG" alt="" /> + </p> + + <p> + Disconnect LCD cable from board:<br/> + <img src="../images/t60_dev/0022.JPG" alt="" /> + </p> + + <p> + Remove those screws then remove the LCD assembly:<br/> + <img src="../images/t60_dev/0023.JPG" alt="" /> <img src="../images/t60_dev/0024.JPG" alt="" /> <img src="../images/t60_dev/0025.JPG" alt="" /> + </p> + + <p> + Once again, make sure you removed those:<br/> + <img src="../images/t60_dev/0026.JPG" alt="" /> + </p> + + <p> + Remove the shielding containing the motherboard, then flip it over. Remove these screws, placing them on a steady + surface in the same layout as they were in before you removed them. Also, you should mark each screw hole after removing the + screw (a permanent marker pen will do), this is so that you have a point of reference when re-assembling the system:<br/> + <img src="../images/t60_dev/0027.JPG" alt="" /> <img src="../images/t60_dev/0028.JPG" alt="" /> <img src="../images/t60_dev/0029.JPG" alt="" /> + <img src="../images/t60_dev/0031.JPG" alt="" /> <img src="../images/t60_dev/0032.JPG" alt="" /> <img src="../images/t60_dev/0033.JPG" alt="" /> + </p> + + <p> + Now wire up the BBB and the Pomona with your PSU.<br/> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to setup + the BBB for flashing.<br/> + <b>Note, the guide mentions a 3.3v DC PSU but you don't need this on the T60: + if you don't have or don't want to use an external PSU, then make + sure not to connect the 3.3v leads mentioned in the guide; + instead, connect the AC adapter (the one that normally charges your + battery) so that the board has power (but don't boot it up)</b><br/> + <img src="../images/t60_dev/0030.JPG" alt="" /><br/> + Correlate the following with the BBB guide linked above: + </p> +<pre> +POMONA 5250: +=== DVD drive ==== + 18 - - 1 + 22 - - NC ---- RAM is on this end + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip +=== audio jacks === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i> +</pre> + + <p> + Connect the pomona from the BBB to the flash chip. No pics unfortunately. (use the text diagram above). + </p> + + <p> + Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. + </p> + + <p> + SSH'd into the BBB:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom</b> + </p> + <p> + It should be <b>Verifying flash... VERIFIED</b> at the end. If flashrom complains about multiple flash chip + definitions detected, then choose one of them following the instructions in the output. + </p> + + <p> + Put those screws back:<br/> + <img src="../images/t60_dev/0047.JPG" alt="" /> + </p> + + <p> + Put it back into lower chassis:<br/> + <img src="../images/t60_dev/0048.JPG" alt="" /> + </p> + + <p> + Attach LCD and insert screws (also, attach the lcd cable to the board):<br/> + <img src="../images/t60_dev/0049.JPG" alt="" /> + </p> + + <p> + Insert those screws:<br/> + <img src="../images/t60_dev/0050.JPG" alt="" /> + </p> + + <p> + On the CPU (and there is another chip south-east to it, sorry forgot to take pic) + clean off the old thermal paste (with the alcohol) and apply new (Artic Silver 5 is good, others are good too) + you should also clean the heatsink the same way<br/> + <img src="../images/t60_dev/0051.JPG" alt="" /> + </p> + + <p> + Attach the heatsink and install the screws (also, make sure to install the AC jack as highlighted):<br/> + <img src="../images/t60_dev/0052.JPG" alt="" /> + </p> + + <p> + Reinstall that upper bezel:<br/> + <img src="../images/t60_dev/0053.JPG" alt="" /> + </p> + + <p> + Do that:<br/> + <img src="../images/t60_dev/0054.JPG" alt="" /> <img src="../images/t60_dev/0055.JPG" alt="" /> + </p> + + <p> + Re-attach modem, wifi, (wwan?), and all necessary cables. Sorry, forgot to take pics. Look at previous removal steps to see where they go back to. + </p> + + <p> + Attach keyboard and install nvram battery:<br/> + <img src="../images/t60_dev/0056.JPG" alt="" /> <img src="../images/t60_dev/0057.JPG" alt="" /> + </p> + + <p> + Place keyboard and (sorry, forgot to take pics) reinstall the palmrest and insert screws on the underside:<br/> + <img src="../images/t60_dev/0058.JPG" alt="" /> + </p> + + <p> + It lives!<br/> + <img src="../images/t60_dev/0071.JPG" alt="" /> <img src="../images/t60_dev/0072.JPG" alt="" /> <img src="../images/t60_dev/0073.JPG" alt="" /> + </p> + + <p> + Always stress test ('stress -c 2' and xsensors. below 90C is ok) when replacing cpu paste/heatsink:<br/> + <img src="../images/t60_dev/0074.JPG" alt="" /> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/x200_external.html b/docs/install/x200_external.html new file mode 100644 index 00000000..a47d3ba5 --- /dev/null +++ b/docs/install/x200_external.html @@ -0,0 +1,477 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad X200: flashing tutorial (BeagleBone Black)</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Flashing the X200 with a BeagleBone Black</h1> + <p>Initial flashing instructions for X200.</p> + <p> + This guide is for those who want libreboot on their ThinkPad X200 + while they still have the original Lenovo BIOS present. This guide + can also be followed (adapted) if you brick your X200, to know how + to recover. + </p> + + <ul> + <li><a href="#preinstall">X200 laptops with libreboot pre-installed</a></li> + <li><a href="#flashchips">Flash chips</a></li> + <li><a href="#macaddress">MAC address</a></li> + <li><a href="#clip">Initial BBB configuration and installation procedure</a></li> + <li><a href="#boot">Boot it!</a></li> + <li><a href="#wifi">Wifi</a></li> + <li><a href="#wwan">wwan</a></li> + <li><a href="#memory">Memory</a></li> + <li><a href="#gpio33">X200S and X200 Tablet users: GPIO33 trick will not work.</a></li> + </ul> + + <p><a href="index.html">Back to main index</a></p> + </div> + + <div class="section"> + + <h1 id="preinstall">X200 laptops with libreboot pre-installed</h1> + + <p> + If you don't want to install libreboot yourself, companies exist that sell these laptops + with libreboot pre-installed, along with a free GNU/Linux distribution. + </p> + <p> + Check the <a href="../../suppliers">suppliers</a> page for more information. + </p> + + </div> + + <div class="section"> + + <h1 id="flashchips">Flash chip size</h1> + + <p> + Use this to find out:<br/> + # <b>dmidecode | grep ROM\ Size</b> + </p> + + <p> + The X200S and X200 Tablet will use a WSON-8 flash chip, on the + bottom of the motherboard (this requires removal of the + motherboard). <b>Not all X200S/X200T are supported; + see <a href="../hcl/x200.html#x200s">../hcl/x200.html#x200s</a>.</b> + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h1 id="macaddress">MAC address</h1> + + <p> + On the X200/X200S/X200T, the MAC address for the onboard + gigabit ethernet chipset is stored inside the flash chip, + along with other configuration data. + </p> + <p> + Keep a note of the MAC address before disassembly; this is + very important, because you will need to insert this into + the libreboot ROM image before flashing it. + It will be written in one of these locations: + </p> + + <p> + <img src="images/x200/disassembly/0002.jpg" alt="" /> + <img src="images/x200/disassembly/0001.jpg" alt="" /> + </p> + + </div> + + <div class="section"> + + <h1 id="clip">Initial BBB configuration</h1> + + <p> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to + set up the BBB for flashing. + </p> + + <p> + The following shows how to connect the clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): + </p> +<pre> +POMONA 5252 (correlate with the BBB guide) +=== front (display) on your X200 ==== + NC - - 21 + 1 - - 17 + NC - - NC + NC - - NC + NC - - NC + NC - - NC + 18 - - 3.3V (PSU) + 22 - - NC - this is pin 1 on the flash chip +=== back (palmrest) on your X200 === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i> +Here is a photo of the SOIC-16 flash chip. Pins are labelled:<br/> +<img src="images/x200/x200_pomona.jpg" alt="" /> +</pre> + <p> + The following shows how to connect the clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): + </p> +<pre> +POMONA 5250 (correlate with the BBB guide) +=== left side of the X200 (where the VGA port is) ==== + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip. in front of it is the screen. +=== right side of the X200 (where the audio jacks are) === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i> +Here is a photo of the SOIC-8 flash chip. The pins are labelled:<br/> +<img title="Copyright 2015 Patrick "P. J." McDermott <pj@pehjota.net>, see license notice at the end of this document" src="images/x200/soic8.jpg" /> + +Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16 +chip on those pins? +</pre> + <p> + <b>On the X200S and X200 Tablet the flash chip is underneath the board, in a WSON package. + The pinout is very much the same as a SOIC-8, except you need to solder (there are no clips available).<br/> + The following image shows how this is done:</b><br/> + <img src="images/x200/wson_soldered.jpg" title="Copyright 2014 Steve Shenton <sgsit@libreboot.org> see license notice at the end of this document" alt="" /> + <br/> + In this image, a pin header was soldered onto the WSON. Another solution might be to de-solder the WSON-8 chip and put a SOIC-8 there instead. + Check the list of SOIC-8 flash chips at <a href="../hcl/gm45_remove_me.html#flashchips">../hcl/gm45_remove_me.html#flashchips</a> but + do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case, + the X201 SOIC-8 flash chip (Macronix 25L6445E) might work. + </p> + + <h2> + The procedure + </h2> + <p> + This section is for the X200. This does not apply to the X200S or X200 Tablet + (for those systems, you have to remove the motherboard completely, since + the flash chip is on the other side of the board). + </p> + <p> + Remove these screws:<br/> + <img src="images/x200/disassembly/0003.jpg" alt="" /> + </p> + <p> + Push the keyboard forward, gently, then lift it off and + disconnect it from the board:<br/> + <img src="images/x200/disassembly/0004.jpg" alt="" /> + <img src="images/x200/disassembly/0005.jpg" alt="" /> + </p> + <p> + Pull the palm rest off, lifting from the left and right side at the back of the + palm rest:<br/> + <img src="images/x200/disassembly/0006.jpg" alt="" /> + </p> + <p> + Lift back the tape that covers a part of the flash chip, and + then connect the clip:<br/> + <img src="images/x200/disassembly/0007.jpg" alt="" /> + <img src="images/x200/disassembly/0008.jpg" alt="" /> + </p> + <p> + On pin 2 of the BBB, where you have the ground (GND), connect the + ground to your PSU:<br/> + <img src="images/x200/disassembly/0009.jpg" alt="" /> + <img src="images/x200/disassembly/0010.jpg" alt="" /> + </p> + <p> + Connect the 3.3V supply from your PSU to the flash chip (via + the clip):<br/> + <img src="images/x200/disassembly/0011.jpg" alt="" /> + <img src="images/x200/disassembly/0012.jpg" alt="" /> + </p> + <p> + Of course, make sure that your PSU is also plugged in and + turn on:<br/> + <img src="images/x200/disassembly/0013.jpg" alt="" /> + </p> + <p> + This tutorial tells you to use an ATX PSU, for the 3.3V DC + supply. The PSU used when taking these photos is actually + not an ATX PSU, but a PSU that is designed specifically + for providing 3.3V DC (an ATX PSU will also work):<br/> + <img src="images/x200/disassembly/0014.jpg" alt="" /> + </p> + <p> + Now, you should be ready to install libreboot. + </p> + <p> + Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. + </p> + <p> + Log in as root on your BBB, using the instructions in + <a href="bbb_setup.html#bbb_access">bbb_setup.html#bbb_access</a>. + </p> + + <p> + Test that flashrom works:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512</b><br/> + In this case, the output was: + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. +Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" +Please specify which chip definition to use with the -c <chipname> option. +</pre> + <p> + How to backup factory.rom (change the -c option as neeed, for your flash chip):<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom</b><br/> + Note: the <b>-c</b> option is not required in libreboot's patched flashrom, because + the redundant flash chip definitions in <i>flashchips.c</i> have been removed.<br/> + Now compare the 3 images:<br/> + # <b>sha512sum factory*.rom</b><br/> + If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not + the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware + that could be replicated in coreboot and libreboot. + </p> + <p> + Follow the instructions at <a href="../hcl/gm45_remove_me.html#ich9gen">../hcl/gm45_remove_me.html#ich9gen</a> + to change the MAC address inside the libreboot ROM image, before flashing it. + Although there is a default MAC address inside the ROM image, this is not what you want. <b>Make sure + to always change the MAC address to one that is correct for your system.</b> + </p> + <p> + Now flash it:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V</b> + </p> + <p> + <img src="images/x200/disassembly/0015.jpg" alt="" /> + </p> + <p> + You might see errors, but if it says <b>Verifying flash... VERIFIED</b> at the end, then it's flashed and should boot. + If you see errors, try again (and again, and again); the message <b>Chip content is identical to the requested image</b> + is also an indication of a successful installation. + </p> + <p> + Example output from running the command (see above): + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Reading old flash chip contents... done. +Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 +ERASE FAILED! +Reading current flash chip contents... done. Looking for another erase function. +Erase/write done. +Verifying flash... VERIFIED. +</pre> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h1 id="wifi">Wifi</h1> + + <p> + The X200 typically comes with an Intel wifi chipset, which does not + work without proprietary software. For a list of wifi chipsets that + work without proprietary software, see + <a href="../hcl/index.html#recommended_wifi">../hcl/index.html#recommended_wifi</a>. + </p> + + <p> + Some X200 laptops come with an Atheros chipset, but this is 802.11g only. + </p> + + <p> + It is recommended that you install a new wifi chipset. This can only + be done after installing libreboot, because the original firmware has + a whitelist of approved chips, and it will refuse to boot if you + use an 'unauthorized' wifi card. + </p> + + <p> + The following photos show an Atheros AR5B95 being installed, to + replace the Intel chip that this X200 came with:<br/> + <img src="images/x200/disassembly/0016.jpg" alt="" /> + <img src="images/x200/disassembly/0017.jpg" alt="" /> + </p> + + </div> + + <div class="section"> + + <h1 id="wwan">WWAN</h1> + <p> + If you have a WWAN/3G card and/or sim card reader, remove them permanently. + The WWAN-3G card has proprietary firmware inside; the technology is + identical to what is used in mobile phones, so it can also track your movements. + </p> + <p> + Not to be confused with wifi (wifi is fine). + </p> + + </div> + + <div class="section"> + + <h1 id="memory">Memory</h1> + + <p> + You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs + (speed/size). Non-matching pairs won't work. You can also install a + single module (meaning, one of the slots will be empty) in slot 0. + </p> + <p> + NOTE: according to users repors, non matching pairs (e.g. 1+2 GiB) might work in some cases. + </p> + <p> + Make sure that the RAM you buy is the 2Rx8 density. + </p> + + <p> + In this photo, 8GiB of RAM (2x4GiB) is installed:<br/> + <img src="images/x200/disassembly/0018.jpg" alt="" /> + </p> + + </div> + + <div class="section"> + + <h2 id="boot"> + Boot it! + </h2> + <p> + You should see something like this: + </p> + <p> + <img src="images/x200/disassembly/0019.jpg" alt="" /> + </p> + + <p> + Now <a href="../gnulinux/index.html">install GNU/Linux</a>. + </p> + + </div> + + <div class="section"> + <h2 id="gpio33"> + X200S and X200 Tablet users: GPIO33 trick will not work. + </h2> + <p> + sgsit found out about a pin called GPIO33, which can be grounded to disable the flashing protections + by the descriptor and stop the ME from starting (which itself interferes with flashing attempts). + The theory was proven correct; however, it is still useless in practise. + </p> + <p> + Look just above the 7 in TP37 (that's GPIO33):<br/> + <img src="../hcl/images/x200/gpio33_location.jpg" alt="" /> + </p> + <p> + By default we would see this in lenovobios, when trying flashrom -p internal -w rom.rom: + </p> +<pre> +FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. +FREG2: Warning: Management Engine region (0x00001000-0x005f5fff) is locked. +</pre> + <p> + With GPIO33 grounded during boot, this disabled the flash protections as set + by descriptor, and stopped the ME from starting. The output changed to: + </p> +<pre> +The Flash Descriptor Override Strap-Pin is set. Restrictions implied by +the Master Section of the flash descriptor are NOT in effect. Please note +that <b>Protected Range (PR) restrictions still apply.</b> +</pre> + <p> + The part in bold is what got us. This was still observed: + </p> +<pre> +PR0: Warning: 0x007e0000-0x01ffffff is read-only. +PR4: Warning: 0x005f8000-0x005fffff is locked. +</pre> + + <p> + It is actually possible to disable these protections. Lenovobios does, + when updating the BIOS (proprietary one). One possible way to go about this + would be to debug the BIOS update utility from Lenovo, to find out + how it's disabling these protections. Some more research is available here: + <a href="http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research">http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research</a> + </p> + + <p> + On a related note, libreboot has a utility that could help with investigating this: + <a href="../hcl/gm45_remove_me.html#demefactory">../hcl/gm45_remove_me.html#demefactory</a> + </p> + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/x60_unbrick.html b/docs/install/x60_unbrick.html new file mode 100644 index 00000000..f8e969a8 --- /dev/null +++ b/docs/install/x60_unbrick.html @@ -0,0 +1,318 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad X60: Recovery guide</title> +</head> + +<body> + + <div class="section"> + <h1>ThinkPad X60: Recovery guide</h1> + <p>This section documents how to recover from a bad flash that prevents your ThinkPad X60 from booting.</p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + <h1>Table of Contents</h1> + <ul> + <li> + Types of brick: + <ul> + <li><a href="#bucts_brick">Brick type 1: bucts not reset</a></li> + <li><a href="#recovery">Brick type 2: bad rom (or user error), system won't boot</a></li> + </ul> + </li> + </ul> + </div> + + <div class="section"> + <h1 id="bucts_brick">Brick type 1: bucts not reset.</h1> + <p> + You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and + the ROM wasn't dd'd.* or if Lenovo BIOS was present and libreboot wasn't flashed.<br/><br/> + + In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:<br/> + <img src="../images/x60_unbrick/0004.jpg" alt="" /><br/><br/> + + *Those dd commands should be applied to all newly compiled X60 ROM images (the ROM images in libreboot binary archives already have this applied!):<br/> + dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k<br/> + dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump<br/> + dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc<br/> + (doing this makes the ROM suitable for use when flashing a system that still has Lenovo BIOS running, + using those instructions: <a href="http://www.coreboot.org/Board:lenovo/x60/Installation">http://www.coreboot.org/Board:lenovo/x60/Installation</a>. + </p> + </div> + + <div class="section"> + + <h1 id="recovery">bad rom (or user error), system won't boot</h1> + <p> + In this scenario, you compiled a ROM that had an incorrect configuration, or there is an actual bug preventing your system from + booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS was running. In any case, your system is bricked and will not boot at all. + </p> + <p> + "Unbricking" means flashing a known-good (working) ROM. The problem: you can't boot the system, making this difficult. In this situation, external hardware (see hardware requirements above) is needed which can flash the SPI chip (where libreboot resides). + </p> + <p> + Remove those screws:<br/> + <img src="../images/x60_unbrick/0000.jpg" alt="" /> + </p> + <p> + Push the keyboard forward (carefully):<br/> + <img src="../images/x60_unbrick/0001.jpg" alt="" /> + </p> + <p> + Lift the keyboard up and disconnect it from the board:<br/> + <img src="../images/x60_unbrick/0002.jpg" alt="" /> + </p> + <p> + Grab the right-hand side of the chassis and force it off (gently) and pry up the rest of the chassis:<br/> + <img src="../images/x60_unbrick/0003.jpg" alt="" /> + </p> + <p> + You should now have this:<br/> + <img src="../images/x60_unbrick/0004.jpg" alt="" /> + </p> + <p> + Disconnect the wifi antenna cables, the modem cable and the speaker:<br/> + <img src="../images/x60_unbrick/0005.jpg" alt="" /> + </p> + <p> + Unroute the cables along their path, carefully lifting the tape that holds them in place. Then, disconnect the modem + cable (other end) and power connection and unroute all the cables so that they dangle by the monitor hinge on the right-hand + side:<br/> + <img src="../images/x60_unbrick/0006.jpg" alt="" /> + </p> + <p> + Disconnect the monitor from the motherboard, and unroute the grey antenna cable, carefully lifting the tape + that holds it into place:<br/> + <img src="../images/x60_unbrick/0008.jpg" alt="" /> + </p> + <p> + Carefully lift the remaining tape and unroute the left antenna cable so that it is loose:<br/> + <img src="../images/x60_unbrick/0009.jpg" alt="" /> + </p> + <p> + Remove the screw that is highlighted (do NOT remove the other one; it holds part of the heatsink (other side) into place):<br/> + <img src="../images/x60_unbrick/0011.jpg" alt="" /> + </p> + <p> + Remove those screws:<br/> + <img src="../images/x60_unbrick/0012.jpg" alt="" /> + </p> + <p> + Carefully remove the plate, like so:<br/> + <img src="../images/x60_unbrick/0013.jpg" alt="" /> + </p> + <p> + Remove the SATA connector:<br/> + <img src="../images/x60_unbrick/0014.jpg" alt="" /> + </p> + <p> + Now remove the motherboard (gently) and cast the lcd/chassis aside:<br/> + <img src="../images/x60_unbrick/0015.jpg" alt="" /> + </p> + <p> + Lift back that tape and hold it with something. Highlighted is the SPI flash chip:<br/> + <img src="../images/x60_unbrick/0016.jpg" alt="" /> + </p> + <p> + Now wire up the BBB and the Pomona with your PSU.<br/> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to setup + the BBB for flashing.<br/> + <b>Note, the guide mentions a 3.3v DC PSU but you don't need this on the X60: + if you don't have or don't want to use an external PSU, then make + sure not to connect the 3.3v leads mentioned in the guide; + instead, connect the AC adapter (the one that normally charges your + battery) so that the board has power (but don't boot it up)</b> + <img src="../images/x60_unbrick/0017.jpg" alt="" /><br/> + Correlate the following with the BBB guide linked above: + </p> +<pre> +POMONA 5250: +=== golden finger and wifi switch ==== + 18 - - 1 + 22 - - NC ---------- audio jacks are on this end + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip +=== CPU fan === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i> +</pre> + + <p> + Connecting the BBB and pomona (in this image, an external 3.3v DC PSU was used):<br/> + <img src="images/x60/th_bbb_flashing.jpg" alt="" /> + </p> + + <p> + Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. + </p> + + <p> + SSH'd into the BBB:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom</b> + </p> + <p> + It should be <b>Verifying flash... VERIFIED</b> at the end. If flashrom complains about multiple flash chip + definitions detected, then choose one of them following the instructions in the output. + </p> + + <p> + Remove the programmer and put it away somewhere. Put back the tape and press firmly over it:<br/> + <img src="../images/x60_unbrick/0026.jpg" alt="" /> + </p> + <p> + Your empty chassis:<br/> + <img src="../images/x60_unbrick/0027.jpg" alt="" /> + </p> + <p> + Put the motherboard back in:<br/> + <img src="../images/x60_unbrick/0028.jpg" alt="" /> + </p> + <p> + Reconnect SATA:<br/> + <img src="../images/x60_unbrick/0029.jpg" alt="" /> + </p> + <p> + Put the plate back and re-insert those screws:<br/> + <img src="../images/x60_unbrick/0030.jpg" alt="" /> + </p> + <p> + Re-route that antenna cable around the fan and apply the tape:<br/> + <img src="../images/x60_unbrick/0031.jpg" alt="" /> + </p> + <p> + Route the cable here and then (not shown, due to error on my part) reconnect the monitor cable to the motherboard + and re-insert the screws:<br/> + <img src="../images/x60_unbrick/0032.jpg" alt="" /> + </p> + <p> + Re-insert that screw:<br/> + <img src="../images/x60_unbrick/0033.jpg" alt="" /> + </p> + <p> + Route the black antenna cable like so:<br/> + <img src="../images/x60_unbrick/0034.jpg" alt="" /> + </p> + <p> + Tuck it in neatly like so:<br/> + <img src="../images/x60_unbrick/0035.jpg" alt="" /> + </p> + <p> + Route the modem cable like so:<br/> + <img src="../images/x60_unbrick/0036.jpg" alt="" /> + </p> + <p> + Connect modem cable to board and tuck it in neatly like so:<br/> + <img src="../images/x60_unbrick/0037.jpg" alt="" /> + </p> + <p> + Route the power connection and connect it to the board like so:<br/> + <img src="../images/x60_unbrick/0038.jpg" alt="" /> + </p> + <p> + Route the antenna and modem cables neatly like so:<br/> + <img src="../images/x60_unbrick/0039.jpg" alt="" /> + </p> + <p> + Connect the wifi antenna cables. At the start of the tutorial, this system had an Intel wifi chip. Here you see I've replaced it with an + Atheros AR5B95 (supports 802.11n and can be used without blobs):<br/> + <img src="../images/x60_unbrick/0040.jpg" alt="" /> + </p> + <p> + Connect the modem cable:<br/> + <img src="../images/x60_unbrick/0041.jpg" alt="" /> + </p> + <p> + Connect the speaker:<br/> + <img src="../images/x60_unbrick/0042.jpg" alt="" /> + </p> + <p> + You should now have this:<br/> + <img src="../images/x60_unbrick/0043.jpg" alt="" /> + </p> + <p> + Re-connect the upper chassis:<br/> + <img src="../images/x60_unbrick/0044.jpg" alt="" /> + </p> + <p> + Re-connect the keyboard:<br/> + <img src="../images/x60_unbrick/0045.jpg" alt="" /> + </p> + <p> + Re-insert the screws that you removed earlier:<br/> + <img src="../images/x60_unbrick/0046.jpg" alt="" /> + </p> + <p> + Power on!<br/> + <img src="../images/x60_unbrick/0047.jpg" alt="" /> + </p> + <p> + Trisquel live USB menu (using the GRUB ISOLINUX parser):<br/> + <img src="../images/x60_unbrick/0048.jpg" alt="" /> + </p> + <p> + Trisquel live desktop:<br/> + <img src="../images/x60_unbrick/0049.jpg" alt="" /> + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/install/x60flashscript.patch b/docs/install/x60flashscript.patch new file mode 100644 index 00000000..7f4c8307 --- /dev/null +++ b/docs/install/x60flashscript.patch @@ -0,0 +1,27 @@ +From 34270811fce1ecf0bcf3b1363b0dc3dbf284ab09 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 10 Jun 2015 22:53:28 +0000 +Subject: flash script: fix a really really really dumb mistake + +--- +diff --git a/flash b/flash +index c96b915..04fd274 100755 +--- a/flash ++++ b/flash +@@ -95,12 +95,12 @@ if [ "$mode" = "i945lenovo_firstflash" ] || [ "$mode" = "i945lenovo_secondflash" + # git or libreboot_src + bucts="./bucts/bucts" + flashrom_lenovobios_sst="./flashrom/flashrom_lenovobios_sst" +- flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_sst" ++ flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_macronix" + else + # libreboot_util + bucts="./bucts/$arch/bucts" + flashrom_lenovobios_sst="./flashrom/$arch/flashrom_lenovobios_sst" +- flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_sst" ++ flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_macronix" + fi + + # anti-bricking precaution +-- +cgit v0.9.0.2 diff --git a/docs/install/x60tablet_unbrick.html b/docs/install/x60tablet_unbrick.html new file mode 100644 index 00000000..8da9d2f9 --- /dev/null +++ b/docs/install/x60tablet_unbrick.html @@ -0,0 +1,215 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad X60 Tablet: Recovery guide</title> +</head> + +<body> + + <div class="section"> + <h1>ThinkPad X60 Tablet: Recovery guide</h1> + <p>This section documents how to recover from a bad flash that prevents your ThinkPad X60 Tablet from booting.</p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + <h2>Table of Contents</h2> + <ul> + <li> + Types of brick: + <ul> + <li><a href="#bucts_brick">Brick type 1: bucts not reset</a></li> + <li><a href="#recovery">Brick type 2: bad rom (or user error), system won't boot</a></li> + </ul> + </li> + </ul> + </div> + + <div class="section"> + <h1 id="bucts_brick">Brick type 1: bucts not reset.</h1> + <p> + You still have Lenovo BIOS, or you had libreboot running and you flashed another ROM; and you had bucts 1 set and + the ROM wasn't dd'd.* or if Lenovo BIOS was present and libreboot wasn't flashed.<br/><br/> + + In this case, unbricking is easy: reset BUC.TS to 0 by removing that yellow cmos coin (it's a battery) and putting it back after a minute or two:<br/> + <img src="../images/x60t_unbrick/0008.JPG" alt="" /><br/><br/> + + *Those dd commands should be applied to all newly compiled X60 ROM images (the ROM images in libreboot binary archives already have this applied!):<br/> + dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k<br/> + dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump<br/> + dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc<br/> + (doing this makes the ROM suitable for use when flashing a system that still has Lenovo BIOS running, + using those instructions: <a href="http://www.coreboot.org/Board:lenovo/x60/Installation">http://www.coreboot.org/Board:lenovo/x60/Installation</a>. + </p> + </div> + + <div class="section"> + + <h1 id="recovery">bad rom (or user error), system won't boot</h1> + <p> + In this scenario, you compiled a ROM that had an incorrect configuration, or there is an actual bug preventing your system from + booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash while Lenovo BIOS was running. In any case, your system is bricked and will not boot at all. + </p> + <p> + "Unbricking" means flashing a known-good (working) ROM. The problem: you can't boot the system, making this difficult. In this situation, external hardware (see hardware requirements above) is needed which can flash the SPI chip (where libreboot resides). + </p> + + <p> + <img src="../images/x60t_unbrick/0000.JPG" alt="" /> + </p> + + <p> + Remove those screws:<br/> + <img src="../images/x60t_unbrick/0001.JPG" alt="" /> + </p> + + <p> + Remove the HDD:<br/> + <img src="../images/x60t_unbrick/0002.JPG" alt="" /> + </p> + + <p> + Push keyboard forward to loosen it:<br/> + <img src="../images/x60t_unbrick/0003.JPG" alt="" /> + </p> + + <p> + Lift:<br/> + <img src="../images/x60t_unbrick/0004.JPG" alt="" /> + </p> + + <p> + Remove those:<br/> + <img src="../images/x60t_unbrick/0005.JPG" alt="" /> + </p> + + <p> + + <img src="../images/x60t_unbrick/0006.JPG" alt="" /> + </p> + + <p> + Also remove that (marked) and unroute the antenna cables:<br/> + <img src="../images/x60t_unbrick/0007.JPG" alt="" /> + </p> + + <p> + For some X60T laptops, you have to unroute those too:<br/> + <img src="../images/x60t_unbrick/0010.JPG" alt="" /> + </p> + + <p> + Remove the LCD extend board screws. Also remove those screws (see blue marks) and remove/unroute the cables and remove the metal plate:<br/> + <img src="../images/x60t_unbrick/0008.JPG" alt="" /> + </p> + + <p> + Remove that screw and then remove the board:<br/> + <img src="../images/x60t_unbrick/0009.JPG" alt="" /> + </p> + + <p> + Now wire up the BBB and the Pomona with your PSU.<br/> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to setup + the BBB for flashing.<br/> + <b>Note, the guide mentions a 3.3v DC PSU but you don't need this on the X60 Tablet: + if you don't have or don't want to use an external PSU, then make + sure not to connect the 3.3v leads mentioned in the guide; + instead, connect the AC adapter (the one that normally charges your + battery) so that the board has power (but don't boot it up)</b> + <img src="../images/x60t_unbrick/0011.JPG" alt="" /><br/> + Correlate the following with the BBB guide linked above: + </p> +<pre> +POMONA 5250: +=== golden finger and wifi switch ==== + 18 - - 1 + 22 - - NC ---------- audio jacks are on this end + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip +=== CPU fan === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i> +</pre> + + <p> + Connecting the BBB and pomona (in this image, an external 3.3v DC PSU was used):<br/> + <img src="images/x60/th_bbb_flashing.jpg" alt="" /> + </p> + + <p> + Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. + </p> + + <p> + SSH'd into the BBB:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w yourrom.rom</b> + </p> + <p> + It should be <b>Verifying flash... VERIFIED</b> at the end. If flashrom complains about multiple flash chip + definitions detected, then choose one of them following the instructions in the output. + </p> + + <p> + Reverse the steps to re-assemble your system. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/maintain/index.html b/docs/maintain/index.html new file mode 100644 index 00000000..81f7e56a --- /dev/null +++ b/docs/maintain/index.html @@ -0,0 +1,656 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Maintaining libreboot</title> +</head> + +<body> + + <div class="section"> + + <h1 id="pagetop">Maintaining libreboot</h1> + + <p> + This section relates to maintaining libreboot. + </p> + <p> + Do not follow anything here to the letter; is it only a rough guide + representing how libreboot is maintained (for reference). + </p> + <p> + This section of the documentation applies mainly to the + development version of libreboot, which is hosted in a git + repository. It is not intended for the release versions of + libreboot. + </p> + + <ul> + <li><a href="#overview">Overview</a></li> + <li> + <a href="#updating_coreboot">Updating coreboot-libre</a> + <ul> + <li><a href="#newboard_libreboot">Adding a new board to libreboot</a></li> + <li><a href="#newpatch_libreboot">Add/remove/modify patches in coreboot-libre</a></li> + </ul> + </li> + <li> + <a href="#updating_grub">Updating GRUB</a> + <ul> + <li><a href="#altbuild_grub_payload">Change how the GRUB payload (grub.elf) is built (utility: grub-assemble)</a></li> + <li><a href="#newconfig_grub">Modify the configuration used in GRUB</a></li> + <li><a href="../grub/index.html">Other maintenance-related tasks in GRUB</a></li> + </ul> + </li> + <li> + <a href="#updating_depthcharge">Updating depthcharge</a> + </li> + <li> + <a href="#updating_flashrom">Updating flashrom</a> + </li> + <li> + <a href="#updating_bucts">Updating bucts</a> + </li> + <li> + <a href="#updating_memtest86plus">Updating MemTest86+</a> + </li> + </ul> + + <p> + Or <a href="../index.html">Back to main index</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="overview">Overview</h1> + + <p> + The way the libreboot project is run is very similar to how + a GNU/Linux distribution project is run (but for the boot + firmware, not your operating system). Thus, libreboot is + a <i>coreboot distribution</i>. + </p> + <p> + This page demonstrates on a high level how + libreboot is maintained, how the project is run, how everything + goes together, etc. For a more detailed guide, refer to each + subsection for the various components/modules used in libreboot. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="updating_coreboot">Updating coreboot-libre</h1> + + <p> + NOTE: it helps to own all libreboot-compatible systems here, + or have reliable (and fast) access to a team of testers. + </p> + + <p> + Coreboot-libre is the name of the deblobbed coreboot sources + used in libreboot. It is also the name of the collection + of scripts used for deblobbing coreboot, on each new update. + </p> + + <p> + This section shows an example of how to update (re-base) to + the latest version of coreboot, how to update the deblobbing + scripts, and so on. <b>This does not teach you how to + change what custom patches are used, nor does it tell + you how to add new boards to libreboot. It assumes that you + simply want to re-base to the latest version (for instance, + there could be bug fixes that you want). For those things + not listed in this section, you can refer to other sections + on this page instead.</b> + </p> + + <p> + Open these files in your editor (you will most likely be editing them): + </p> + <ul> + <li>resources/scripts/helpers/download/coreboot</li> + <li>resources/scripts/helpers/build/module/coreboot</li> + <li>resources/utilities/coreboot-libre/deblob</li> + <li>resources/utilities/coreboot-libre/nonblobs</li> + <li>resources/utilities/coreboot-libre/nonblobs_notes</li> + <li>resources/scripts/helpers/build/roms/helper</li> + <li>resources/scripts/helpers/build/roms/withgrub</li> + </ul> + + <p> + If you already had a coreboot/ directory in your libreboot + tree, delete it:<br/> + $ <b>rm -Rf coreboot/</b> + </p> + + <p> + Firstly, download coreboot. Do <b>not</b> use <b>./download coreboot</b> + for this, just clone coreboot, as it does in that script, like so:<br/> + $ <b>git clone http://review.coreboot.org/coreboot</b> + </p> + + <p> + $ <b>cd coreboot/</b><br/> + Get the ID of the latest commit in this clone, by reading the commit ID using + e.g.:<br/> + $ <b>git log</b><br/> + In <i>resources/scripts/helpers/download/coreboot</i> you will + find a line that says <i><b>git reset --hard</b></i> and then + a commit ID next to it. Replace this with the commit ID of the latest + commit from the coreboot version that you just downloaded. + </p> + <p> + You must also checkout the <i>vboot</i> submodule:<br/> + $ <b>git submodule update --init --checkout -- 3rdparty/vboot/</b> + </p> + <p> + Delete the .git* resources. For example:<br/> + $ <b>rm -Rf .git* 3rdparty/*/.git*</b><br/> + ...this is to avoid the deblobbing script from picking up files + in there as blobs, which would be only false positives and + increase the amount of time taken. Now come out of coreboot:<br/> + $ <b>cd ../</b> + </p> + + <p> + Check all coreboot file names/paths in <i>deblob</i>; if any + of them no longer exist at that name/path in the coreboot tree that you downloaded, + delete the reference(s) in <i>deblob</i>. + </p> + + <p> + Check all coreboot file names/paths in <i>nonblobs</i>; if + any of them no longer exist at that name/path in the coreboot tree that you downloaded, + delete the reference in <i>nonblobs</i>. + </p> + + <p> + Now, back in the main root directory of libreboot (git repository), + run the deblob script. This is to prevent the <i>findblobs</i> + scripts from finding the blobs that are already deleted + when running the <i>deblob</i> script. Like so:<br/> + $ <b>./resources/utilities/coreboot-libre/deblob</b> + </p> + + <p> + Now search for new blobs:<br/> + $ <b>cd resources/utilities/coreboot-libre/</b><br/> + $ <b>./findblobs</b><br/> + WARNING: this will take a <b>*long*</b> time. Be patient! + What this will do is look through the coreboot source directory, + looking for blobs. It will not find the blobs that you deleted + before (because they no longer exist), and it will ignore any + files listed in <i>nonblobs</i>. + </p> + + <p> + Once the <i>findblobs</i> script has finished, check the file + <i>tocheck</i> (from the root, this will be <i>resources/utilities/coreboot-libre/tocheck</i>). + These are the files detected as blobs; some might be blobs, some not. + The <i>findblobs</i> script doesn't know how to determine between blobs + and non-blobs, it only knows patterns. Distinguishing between blobs and + non-blobs must be performed by you, the human being. + </p> + <ul> + <li> + Files in <i>tocheck</i> that you identify as blobs, + should be added appropriately to <i>resources/utilities/coreboot-libre/deblob</i> + </li> + <li> + Files in <i>tocheck</i> that you identify as non-blobs, + should be added appropriately to <i>resources/utilities/coreboot-libre/nonblobs</i> - + also, if you feel it necessary, add an explanation of it in + <i>resources/utilities/coreboot-libre/nonblobs_notes</i> + </li> + </ul> + + <p> + Now come back to the main libreboot root directory (root + of the git clone). If you are still in resources/utilities/coreboot-libre/ + for instance, you would do something like:<br/> + $ <b>cd ../../../</b> + </p> + + <p> + Now delete the coreboot directory:<br/> + $ <b>rm -Rf coreboot/</b> + </p> + + <p> + Download coreboot again, only this time, using the download + script. The download script also applies custom patches + to coreboot (see resources/scripts/helpers/download/coreboot); + if they do not apply anymore, you will have to re-base them + and then update <i>resources/scripts/helpers/download/coreboot</i> + accordingly. Anyway, download coreboot like so:<br/> + $ <b>./download coreboot</b> + </p> + + <p> + If the custom patches no longer apply, and you have to re-base + (or replace?) some patches, please do this in coreboot upstream, + not in libreboot. Then re-include new patches from upstream, + into libreboot. Here is coreboot's guide for contributing + patches:<br/> + <a href="http://www.coreboot.org/Git">http://www.coreboot.org/Git</a>. + </p> + + <p> + Update all configs:<br/> + $ <b>./build config grubupdate</b><br/> + $ <b>./build config dcupdate</b><br/> + This simply takes all of the coreboot <b>.config</b> files from + <i>resources/libreboot/config/</i> and does <b>make oldconfig</b> + on them. It usually works. If it doesn't, you'll need to recreate + those configs from scratch using <b>./build config grubreplace</b> + or <b>./build config dcreplace</b> (optionally + add a config name), or <b>./build config grubmodify</b> + or <b>./build config dcmodify</b> (ditto) + (see <a href="../git/index.html#config">../git/index.html#config</a>) + </p> + + <p> + Finally, build *all* ROM images using the instructions at + <a href="../git/index.html">../git/index.html</a>, to verify + that everything still builds. + </p> + + <p> + Once you've verified that building isn't broken, test *all* + boards (you don't need to test all ROM images, only one + vesafb and one txtmode image for each configuration). If you + do not have all systems supported in libreboot, then you will + need to get other testers for those boards. + </p> + + <p> + If you have established a build issue, or a board no longer + works (booting issues, bugs during/after boot, etc), you'll + need to fix it upstream: + <a href="http://www.coreboot.org/Git">http://www.coreboot.org/Git</a> + and then re-update coreboot (or apply patches from upstream). + </p> + + <p> + You should also test the resulting ROM images from building + with the new or modified coreboot revision. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="newboard_libreboot">Adding a new board to libreboot</h1> + + <p> + Make sure that the board is supported, and that the patches + are included (if there are custom patches that you need). + Add configs for it like so (for GRUB payload):<br/> + $ <b>./build config grubreplace <i>payload</i>/<i>boardname</i></b><br/> + Alternatively, for depthcharge payload:<br/> + $ <b>./build config dcreplace <i>payload</i>/<i>boardname</i></b> + </p> + + <p> + This can also be used for replacing an existing config. + </p> + + <p> + Configure the board. Make sure to add the steps to the config section + in <a href="../git/index.html">../git/index.html</a>. + </p> + + <p> + When you're done, the config will be stored in <i>resources/libreboot/config/</i>. + Now build-test it and then check that it actually works. + </p> + + <p> + The following scripts may also need to be modified before building: + <i>resources/scripts/helpers/build/roms/withgrub</i> and + <i>resources/scripts/helpers/build/roms/helper</i> + </p> + + <p> + The following can be used when updating coreboot-libre (GRUB payload):<br/> + $ <b>./build config grubupdate</b><br/> + You must also do this for boards that use the depthcharge payload:<br/> + $ <b>./build config dcupdate</b><br/> + (adding a board name on the end is optional, for either of these) + </p> + + <p> + The following can be used if you want to modify an existing + configuration (GRUB payload):<br/> + $ <b>./build config grubmodify</b><br/> + For those boards which use the depthcharge payload:<br/> + $ <b>./build config dcmodify</b><br/> + (adding a board name on the end is optional) + </p> + + <p> + Examples (GRUB payload):<br/> + $ <b>./build config grubmodify x60</b><br/> + $ <b>./build config grubreplace x60</b><br/> + $ <b>./build config grubupdate x60</b><br/> + $ <b>./build config grubmodify kfsn4-dre</b><br/> + $ <b>./build config grubreplace kfsn4-dre</b><br/> + $ <b>./build config grubupdate kfsn4-dre</b><br/> + </p> + <p> + Examples (depthcharge payload):<br/> + $ <b>./build config dcmodify veyron_speedy</b><br/> + $ <b>./build config dcreplace veyron_speedy</b><br/> + $ <b>./build config dcupdate veyron_speedy</b> + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="newpatch_libreboot">Add/remove/modify patches in coreboot-libre</h1> + + <p> + Under <b>resources/scripts/helpers/download/coreboot</b> you can find + the instructions used for patching coreboot. + </p> + + <p> + Modify the commit ID on the <i>git reset --hard</i> line accordingly, + and update the list of patches used accordingly. Do not cherry-pick + from review.coreboot.org directly; instead, include the diff in + resources/libreboot/patch/ and use <i>git am</i> + (you can get the diff by using git-format-patch). + </p> + + <p> + When you're done, simply download coreboot again:<br/> + $ <b>./download coreboot</b> + </p> + + <p> + Finally, re-build the parts from coreboot that are used + by the build system (also builds GCC):<br/> + $ <b>./build module coreboot</b> + </p> + + <p> + Before running the above command, you can save time + by copying out the crossgcc that you compiled before + (from coreboot/util/crossgcc/) and then putting it back. + After you've done that, run everything in + <i>resources/scripts/helpers/build/module/coreboot</i> + except for the part that builds GCC. + <b>Only do this if the version is correct.</b> + </p> + + <p> + You should also test the resulting ROM images from building + with the new or modified coreboot revision. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="updating_grub">Updating GRUB</h1> + + <p> + $ <b>rm -Rf grub/</b><br/> + $ <b>git clone git://git.savannah.gnu.org/grub.git</b><br/> + $ <b>cd grub/</b><br/> + $ <b>git log</b> + </p> + + <p> + Open the file <i>resources/scripts/helpers/download/grub</i> and + replace the commit ID on the line that performs <i>git reset --hard</i> + with the commit ID of the GRUB revision that you just downloaded. + </p> + + <p> + $ <b>cd ../</b><br/> + $ <b>./download grub</b> + </p> + + <p> + If it fails because of merge conflicts, you'll need to re-base + or (as appropriate) remove the offending patch(es) in + <i>resources/scripts/helpers/download/grub</i>. + </p> + + <p> + Finally, verify that it will build:<br/> + $ <b>./build module grub</b> + </p> + + <p> + Since GRUB is the payload in libreboot, you should also + build the ROM images and test them, with this different + GRUB version that you have prepared. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="altbuild_grub_payload">Change how the GRUB payload (grub.elf) is built (utility: grub-assemble)</h1> + + <p> + Look in <i>resources/utilities/grub-assemble/</i>. + </p> + + <p> + <i>gen.sh</i> creates ELF executables of GRUB with different configurations: + text-mode or framebuffer mode in coreboot. Essentially, + the text-mode version has no background nor any custom fonts, + and contains MemTest86+. You probably don't need to modify these + files at all. + </p> + + <p> + <i>modules.conf</i> defines which modules will be included in the GRUB + ELF executable. + </p> + + <p> + Since GRUB is the payload in libreboot, you should also + build the ROM images and test them, with this different + GRUB version that you have prepared. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="newconfig_grub">Modify the configuration used in GRUB</h1> + + <p> + Look in <i>resources/scripts/helpers/build/roms/withgrub</i> to + see how the GRUB configuration files are generated. + </p> + + <p> + You might need to modify this. You can also modify the + default configuration by making changes to the files + under <i>resources/grub/config/</i> + </p> + + <p> + Since GRUB is the payload in libreboot, you should also + build the ROM images and test them, with this different + GRUB version that you have prepared. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="updating_depthcharge">Updating depthcharge</h1> + + <p> + The script to download depthcharge is: <i>resources/scripts/helpers/download/depthcharge</i>. + </p> + + <p> + Patches are in <i>resources/depthcharge/patch/</i>. + </p> + + <p> + The configuration used for depthcharge is located in <i>depthcharge/board</i>. + Each board has a <i>defconfig</i> Kconfig configuration and a </i>fmap.dts</i> FMAP device-tree configuration. + Those shouldn't need much attention, but when needed, it's best to modify them in the depthcharge tree (with patches) to keep things in one place. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="updating_flashrom">Updating flashrom</h1> + + <p> + Modify these files: <i>resources/scripts/helpers/download/flashrom</i> + and <i>resources/scripts/helpers/build/module/flashrom</i>. + </p> + + <p> + Patches are in <i>resources/flashrom/patch/</i> + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="updating_bucts">Updating bucts</h1> + + <p> + bucts doesn't really need updating, but the patches are + in <i>resources/bucts/patch</i>, the download script + is <i>resources/scripts/helpers/download/bucts</i> and + the build script is <i>resources/scripts/helpers/build/module/bucts</i>. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="updating_memtest86plus">Updating MemTest86+</h1> + + <p> + MemTest86+ doesn't really need updating, but the patches are + in <i>resources/memtest86plus/patch</i>, the download script + is <i>resources/scripts/helpers/download/memtest86plus</i> and + the build script is <i>resources/scripts/helpers/build/module/memtest86plus</i>. + </p> + + <p> + In the download script for memtest86plus, make sure to update the checksum that it matches + for the downloaded source tarball. + </p> + + <p> + <a href="#pagetop">Back to top of page</a>. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/misc/index.html b/docs/misc/index.html new file mode 100644 index 00000000..3efb4866 --- /dev/null +++ b/docs/misc/index.html @@ -0,0 +1,328 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Miscellaneous</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Miscellaneous</h1> + <p> + Or <a href="../index.html">Back to main index</a>. + </p> + <ul> + <li><a href="#trisquel7_powertop">High Pitched Whining Noise on Idle (how to remove in Trisquel 7)</a></li> + <li><a href="#high_pitch_parabola">High Pitched Whining Noise on Idle (how to remove in Parabola)</a></li> + <li><a href="#serial">X60/T60: Serial port - how to use (for dock owners)</a></li> + <li><a href="#powerbeeps">Power Management Beeps on Thinkpads</a></li> + <li><a href="patch.html">Using diff and patch</a></li> + <li><a href="#backlight control">Finetune backlight control on intel gpu’s</a></li> + <li><a href="#get_edid_panelname">Get EDID: Find out the name (model) of your LCD panel</a></li> + </ul> + </div> + + <div class="section"> + + <h1 id="trisquel7_powertop">High Pitched Whining Noise on Idle (how to remove in Trisquel 7)</h1> + + <div class="subsection"> + <h2 id="trisquel7_powertop_autostart">Start powertop automatically at boot time</h2> + + <p>Included with libreboot is a script called 'powertop.trisquel7'. Run this as root and it will setup powertop to run with --auto-tune + at boot time. Load the file in your text editor to see how it does that.</p> + + <p>$ <b>sudo ./resources/scripts/misc/powertop.trisquel7</b></p> + <p> + Might want to run with --calibrate first + </p> + <p> + If powertop doesn't work, another way (reduces battery life slightly) is + to add <i>processor.max_cstate=2</i> to the <i>linux</i> line in grub.cfg, + using <a href="../gnulinux/grub_cbfs.html">this guide</a>. + </p> + </div> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="high_pitch_parabola">High Pitched Whining Noise on Idle (how to remove in Parabola)</h1> + + <p>The following removes most of the noise. It reduces what is a high frequency whine + (that not everyone can hear) to a slight buzz (which most people can't hear or doesn't bother most people).</p> + + <p>This is not perfect! The full solution is still not discovered but this is a step towards that. + Also, in some instances you will need to run 'sudo powertop --auto-tune' again. + This needs to be implemented properly in coreboot itself!</p> + + <p>On the X60 with coreboot or libreboot, there is a high pitched sound when idle. + So far we have use processor.max_cstate=2 or idle=halt in GRUB. + These consume power. Stop using them! </p> + + <p>Be root<br/> + <b>$ su -</b></p> + + <p>Installed powertop:<br/> + <b># pacman -S powertop</b></p> + + <p>and added the following to /etc/systemd/system/powertop.service :</p> + +<pre><i> +[Unit] +Description=Powertop tunings + +[Service] +Type=oneshot +RemainAfterExit=no +ExecStart=/usr/bin/powertop --auto-tune +# "powertop --auto-tune" still needs a terminal for some reason. Possibly a bug? +Environment="TERM=xterm" + +[Install] +WantedBy=multi-user.target +</i></pre> + + + <p>Finally, as root do that:<br/> + <b># systemctl enable powertop</b><br/> + <b># systemctl start powertop</b></p> + + <p>The next time you boot the system, the buzz will be gone.</p> + + <p> + Might want to run with --calibrate first + </p> + <p> + If powertop doesn't work, another way (reduces battery life slightly) is + to add <i>processor.max_cstate=2</i> to the <i>linux</i> line in grub.cfg, + using <a href="../gnulinux/grub_cbfs.html">this guide</a>. + </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="serial">X60/T60: Serial port - how to use (for dock owners)</h1> + <p> + For the Thinkpad X60 you can use the <b>"UltraBase X6"</b> dock (for the X60 Tablet it is called + X6 Tablet UltraBase). For the ThinkPad T60, + you can use the <b>"Advanced Mini Dock"</b>. + </p> + <p> + If you are using one of the ROM images with 'serial' in the name, then you have serial port enabled in libreboot + and you have memtest86+ included inside the ROM. Connect your null modem cable to the serial port on the dock + and connect the other end to a 2nd system using your USB Serial adapter. + </p> + <p> + On the 2nd system, you can try this (using GNU Screen):<br/> + <b>$ sudo screen /dev/ttyUSB0 115200</b> + </p> + <p> + How to quit GNU Screen: Ctrl+A then release and press K, and then press Y. + </p> + <p>There are also others like Minicom but I like GNU Screen</p> + <p> + By doing this before booting the X60/T60, you will see console output from libreboot. You will also see + GRUB displaying on the serial output, and you will be able to see MemTest86+ on the serial output aswell. + You can also configure your distro so that a terminal (TTY) is accessible from the serial console. + </p> + <p> + The following guide is for Ubuntu, and can be followed for Trisquel 6.0 which is based on Ubuntu 12.04 + (should also work in Trisquel 7, based on Ubuntu 14.04) to enable a serial console using GeTTY:<br/> + <a href="https://help.ubuntu.com/community/SerialConsoleHowto">https://help.ubuntu.com/community/SerialConsoleHowto</a> + </p> + <p> + Note: part of the tutorial above requires changing your grub.cfg. Just change the <b>linux</b> line to add instructions for enabling getty. + See <a href="../gnulinux/grub_cbfs.html">../gnulinux/grub_cbfs.html</a>. + </p> + <p><a href="#pagetop">Back to top of page</a> + + </div> + <div class="section" id="backlight control"> + <h1>Finetune backlight control on intel gpu’s </h1> + <p> + Sometimes the backlight control value (BLC_PWM_CTL) set by libreboot is not ideal. The result is either flicker, which could cause nausea or epilepsy or an uneven backlight and/or coil whine coming from the display. To fix this a different value for the gpu reg BLC_PWM_CTL needs to be set. See p94 of <a href="https://01.org/sites/default/files/documentation/g45_vol_3_register_0_0.pdf">https://01.org/sites/default/files/documentation/g45_vol_3_register_0_0.pdf</a> for more information on this reg. The tool for setting registry values on intel gpu’s is included in intel-gpu-tools. Install intel-gpu-tools: <b>sudo apt-get install intel-gpu-tools</b> + </p> + <p> + You can set values:</br> + <b>sudo intel_reg write 0x00061254 <your_value></b> + </p> + <p> + The value set has the following structure: bits [31:16] is PWM divider. PWM / PWM_divider = frequency bits [15:0] is the duty cycle and determines the portion of the backlight modulation frequency. A value of 0 will mean that the display is off. A value equal to the backlight modulation frequency means full on. The value should not be larger than the backlight modulation frequency. + </p> + <p> + On displays with a CCFL backlight start from: 0x60016001 To verify if all modes work as desired use:</br> + <b>xbacklight -set 10</b> + and gradually increase until 100. Displays with an LED backlight need a lower backlight modulation. Do the same thing but start from 0x01290129 . Try setting different values until you have found a value which presents no issue. + </p> + <p> + It is important to know that there are four failure modes: + <ol> + <li>flickering very fast, which could cause epilepsy (frequency is too low. decrease divider)</li> + <li>randomly flickering in random intervals - driver IC cannot keep up with toggling the mosfet (frequency too fast, increase divider)</li> + <li>frequency is in audible range and causes coils to whine (frequency is too high. increase divider)</li> + <li>backlight is uneven. (CCFL specific, frequency is too high. increase divider)</li> + </ol> + </p> + <p> + To check for flickering try moving your laptop while looking at it. + </p> + <p> + A higher frequency equals higher power consumption. You want to find the highest good working value. + </p> + <p> + Next this value should be set at boot: either add</br> + <pre>intel_reg write 0x00061254 <your_ideal_value></pre> + before exit 0 in /etc/rc.local or create a systemd service file /etc/systemd/system/backlight.service: + <pre> +[Unit] +Description=Set BLC_PWM_CTL to a good value +[Service] +Type=oneshot +RemainAfterExit=no +ExecStart=/usr/bin/intel_reg write 0x00061254 <your_value> +[Install] +WantedBy=multi-user.target + </pre> + Now start and enable it: <b>sudo systemctl start backlight && sudo systemctl enable backlight </b> + </p> + <p> + Special note on i945: + </p> + <p> + i945 behaves differently. Bit 16 needs to be 1 and the duty cycle is not updated when backlight is changed. There are no available datasheets on this target so why it behaves in such a way is not known. So to find a working value BLC_PWM_CTL set bit 16 to 1 and make sure PWM divider == duty cycle. see <a href="https://review.coreboot.org/#/c/10624/">https://review.coreboot.org/#/c/10624/</a> on bit 16. The cause of this issue is that i945, in contrast with to GM45, is set to work in BLM Legacy Mode. This makes backlight more complicated since the duty cycle is derived from 3 instead of 2 registers using the following formula:</br> + <verbatim> + if(BPC[7:0] <> xFF) then BPCR[15:0] * BPC[7:0] Else BPCR[15:0] + </verbatim> + </br> + BPC is LBB - PCI Backlight Control Register, described on <a href="http://www.mouser.com/pdfdocs/945gmedatasheet.pdf">http://www.mouser.com/pdfdocs/945gmedatasheet.pdf</a> on page 315. BPCR is BLC_PWM_CTL described in <a href="https://01.org/sites/default/files/documentation/g45_vol_3_register_0_0.pdf">https://01.org/sites/default/files/documentation/g45_vol_3_register_0_0.pdf</a> on page 94. More research needs to be done on this target so proceed with care. + </p> + </div> + + + <div class="section" id="powerbeeps"> + + <h1>Power Management Beeps on Thinkpads</h1> + + <p> + When disconnecting or connecting the charger, a beep occurs. + When the battery goes to a critically low charge level, + a beep occurs. Nvramtool is included in libreboot, and can + be used to enable or disable this behaviour. + </p> + + <p> + Disable or enable beeps when removing/adding the charger:<br/> + $ <b>sudo ./nvramtool -w power_management_beeps=Enable</b><br/> + $ <b>sudo ./nvramtool -w power_management_beeps=Disable</b> + </p> + + <p> + Disable or enable beeps when battery is low:<br/> + $ <b>sudo ./nvramtool -w low_battery_beep=Enable</b><br/> + $ <b>sudo ./nvramtool -w low_battery_beep=Disable</b> + </p> + + <p> + A reboot is required, for these changes to take effect. + </p> + + </div> + + <div class="section"> + + <h1 id="get_edid_panelname">Get EDID: Find out the name (model) of your LCD panel</h1> + <p> + Get the panel name with <b>sudo get-edid | strings</b><br/> + Or look in <b>/sys/class/drm/card0-LVDS-1/edid</b> + </p> + <p> + Alternatively you can use i2cdump. In Trisquel, this is in the package i2c-tools.<br/> + $ <b>sudo modprobe i2c-dev</b><br/> + $ <b>sudo i2cdump -y 5 0x50</b> (you might have to change the value for -y)<br/> + $ <b>sudo rmmod i2c-dev</b><br/> + You'll see the panel name in the output (from the EDID dump). + </p> + <p> + If neither of these options work (or they are unavailable), physically removing the LCD panel is an option. + Usually, there will be information printed on the back. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="usb_keyboard_gm45">USB keyboard wakeup on GM45 laptops</h1> + <p> + Look at resources/scripts/helpers/misc/libreboot_usb_bugfix + </p> + <p> + Put this script in /etc/init.d/ on debian-based systems. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/misc/patch.html b/docs/misc/patch.html new file mode 100644 index 00000000..f68ebfa9 --- /dev/null +++ b/docs/misc/patch.html @@ -0,0 +1,218 @@ +<!DOCTYPE html> +<html> +<head> + + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title> + Libreboot documentation: using diff and patch + </title> + +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Diff and patch</h1> + <p>This is just a quick guide for reference, use 'man' to know more.</p> + <p> + <a href="index.html">Back to index</a> + </p> + </div> + + <div class="section"> + + <h1> + Apply a patch + </h1> + + <p class="important"> + To apply a patch to a single file, do that in it's directory:<br/> + <b>$ patch < foo.patch</b> + </p> + + <p> + Assuming that the patch is distributed in unified format identifying + the file the patch should be applied to, the above will work. Otherwise:<br/> + <b>$ patch foo.txt < bar.patch</b> + </p> + + <p> + You can apply a patch to an entire directory, but note the "p level". + What this means is that inside patch files will be the files that you + intend to patch, identified by path names that might be different + when the files ane located on your own computer instead of on the computer + where the patch was created. 'p' level instructs the 'patch' utility to + ignore parts of the path name to identify the files correctly. Usually a + p level of 1 will work, so you would use:<br/> + <b>$ patch -p1 < baz.patch</b> + </p> + + <p> + Change to the top level directory before running this. If a patch level + of 1 cannot identify the files to patch, then inspect the patch file for file names. + For example:<br/> + <b>/home/user/do/not/panic/yet.c</b> + </p> + + <p> + and you are working in a directory that contains panic/yet.c, use:<br/> + <b>$ patch -p5 < baz.patch</b> + </p> + + <p> + You usually count one up for each path separator (forward slash) + removed from the beginning of the path, until you are left with a path + that exists in the current working directory. The count is the p level. + </p> + + <p> + Removing a patch using the -R flag<br/> + <b>$ patch -p5 -R < baz.patch</b> + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1> + Create a patch with diff + </h1> + + <p> + Diff can create a patch for a single file:<br/> + <b>$ diff -u original.c new.c > original.patch</b> + </p> + + <p> + For diff'ing a source tree:<br/> + <b>$ cp -R original new</b> + </p> + + <p> + Do whatever you want in new/ and then diff it:<br/> + <b>$ diff -rupN original/ new/ > original.patch</b> + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1> + git diff + </h1> + + <p> + git is something special. + </p> + <p> + Note: this won't show new files created. + </p> + + <p> + Just make whatever changes you want to a git clone and then:<br/> + <b>$ git diff > patch.git</b> + </p> + + <p> + Note the git revision that you did this with:<br/> + <b>$ git log</b> + </p> + + <p> + Alternatively (better yet), commit your changes and then use:<br/> + $ <b>git format-patch -N</b><br/> + Replace N with the number of commits that you want to show. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1> + git apply + </h1> + + <p>it really is.</p> + + <p> + Now to apply that patch in the future, just git clone it again and do + with the git revision you found from above:<br/> + <b>$ git reset --hard REVISIONNUMBER</b> + </p> + + <p> + Now put patch.git in the git clone directory and do:<br/> + <b>$ git apply patch.git</b> + </p> + + <p> + If you use a patch from git format-patch, then use <b>git am patch.git</b> instead of <b>git apply patch.git</b>. git-am + will re-create the commits aswell, instead of just applying the patch. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/release.html b/docs/release.html new file mode 100644 index 00000000..9a823abb --- /dev/null +++ b/docs/release.html @@ -0,0 +1,290 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('css/main.css'); + </style> + + <title>Libreboot release information</title> +</head> +<body> + <div class="section"> + <h1 id="pagetop">Libreboot release information</h1> + <p> + Updated versions of libreboot can be found at <a href="http://libreboot.org/">libreboot.org</a>. + </p> + </div> + + <div class="section"> + + <h2>Old releases</h2> + <p> + See <a href="archive_old.html">archive_old.html</a> for information about older libreboot releases. + </p> + + </div> + + <div class="section"> + + <h1 id="release20160818">GNU Libreboot 20160818</h1> + + <p> + Release date: 18th August 2016. + </p> + + <p> + Installation instructions can be found at <b><i>docs/install/index.html</i></b>. + Building instructions (for source code) can be found at <b><i>docs/git/index.html#build</i></b>. + </p> + + <h2>Machines supported in this release:</h2> + <ul> + <li> + <b>ASUS Chromebook C201</b> + <ul> + <li>Check notes in <b><i>docs/hcl/c201.html</i></b></li> + </ul> + </li> + <li> + <b>Gigabyte GA-G41M-ES2L desktop motherboard</b> + <ul> + <li>Check notes in <b><i>docs/hcl/ga-g41m-es2l.html</i></b></li> + </ul> + </li> + <li> + <b>Intel D510MO desktop motherboard</b> + <ul> + <li>Check notes in <b><i>docs/hcl/d510mo.html</i></b></li> + </ul> + </li> + <li> + <b>ASUS KFSN4-DRE server board</b> + <ul> + <li>PCB revision 1.05G is the best version (can use 6-core CPUs)</li> + <li>Check notes in <b><i>docs/hcl/kfsn4-dre.html</i></b></li> + </ul> + </li> + <li> + <b>ASUS KGPE-D16 server board</b> + <ul> + <li>Check notes in <b><i>docs/hcl/kgpe-d16.html</i></b></li> + </ul> + </li> + <li> + <b>ASUS KCMA-D8 desktop/workstation board</b> + <ul> + <li>Check notes in <b><i>docs/hcl/kcma-d8.html</i></b></li> + </ul> + </li> + <li> + <b>ThinkPad X60/X60s</b> + <ul> + <li> + You can also remove the motherboard from an X61/X61s and replace it with an X60/X60s motherboard. + An X60 Tablet motherboard will also fit inside an X60/X60s. + </li> + </ul> + </li> + <li> + <b>ThinkPad X60 Tablet</b> (1024x768 and 1400x1050) with digitizer support + <ul> + <li>See <b><i>docs/hcl/index.html#supported_x60t_list</i></b> for list of supported LCD panels</li> + <li>It is unknown whether an X61 Tablet can have it's mainboard replaced with an X60 Tablet motherboard.</li> + </ul> + </li> + <li> + <b>ThinkPad T60</b> (Intel GPU) (there are issues; see below): + <ul> + <li>See notes below for exceptions, and <b><i>docs/hcl/index.html#supported_t60_list</i></b> for known working LCD panels.</li> + <li>It is unknown whether a T61 can have it's mainboard replaced with a T60 motherboard.</li> + <li>See <b><i>docs/future/index.html#t60_cpu_microcode</i></b>.</li> + <li>T60P (and T60 laptops with ATI GPU) will likely never be supported: <b><i>docs/hcl/index.html#t60_ati_intel</i></b></li> + </ul> + </li> + <li> + <b>ThinkPad X200</b> + <ul> + <li>X200S and X200 Tablet are also supported, conditionally; see <b><i>docs/hcl/x200.html#x200s</i></b></li> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b><i>docs/hcl/gm45_remove_me.html</i></b></li> + </ul> + </li> + <li> + <b>ThinkPad R400</b> + <ul> + <li>See <b><i>docs/hcl/r400.html</i></b></li> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b><i>docs/hcl/gm45_remove_me.html</i></b></li> + </ul> + </li> + <li> + <b>ThinkPad T400</b> + <ul> + <li>See <b><i>docs/hcl/t400.html</i></b></li> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b><i>docs/hcl/gm45_remove_me.html</i></b></li> + </ul> + </li> + <li> + <b>ThinkPad T500</b> + <ul> + <li>See <b><i>docs/hcl/t500.html</i></b></li> + <li><b>ME/AMT</b>: libreboot removes this, permanently. <b><i>docs/hcl/gm45_remove_me.html</i></b></li> + </ul> + </li> + <li> +<b>Apple MacBook1,1</b> (MA255LL/A, MA254LL/A, MA472LL/A) + <ul> + <li>See <b><i>docs/hcl/index.html#macbook11</i></b>.</li> + </ul> + </li> + <li> +<b>Apple MacBook2,1</b> (MA699LL/A, MA701LL/A, MB061LL/A, MA700LL/A, MB063LL/A, MB062LL/A) + <ul> + <li>See <b><i>docs/hcl/index.html#macbook21</i></b>.</li> + </ul> + </li> + </ul> + + <h2> +Changes for this release, relative to r20150518 (earliest changes last, recent changes first) + </h2> +<p> +This is a brand GNU release. Libreboot joined the GNU project on 14 May 2016. This 18 August 2016 release is the first GNU release of libreboot. +</p> + +<ul> +<li>NEW BOARDS ADDED: +<ul> +<li>ASUS Chromebook C201 (ARM laptop) (thanks to Paul Kocialkowski)</li> +<li>Gigabyte GA-G41M-ES2L motherboard (desktop) (thanks to Damien Zammit)</li> +<li>Intel D510MO motherboard (desktop) (thanks to Damien Zammit)</li> +<li>ASUS KCMA-D8 motherboard (desktop) (thanks to Timothy Pearson)</li> +<li>ASUS KFSN4-DRE motherboard (server) (thanks to Timothy Pearson)</li> +<li>ASUS KGPE-D16 motherboard (server) (thanks to Timothy Pearson)</li> +</ul> +</li> +</ul> +<p> +For details development history on these boards, refer to the git log and documentation. +</p> +<p> +For boards previously supported, many fixes from upstream have been merged. +</p> +<p> +Other changes (compared to libreboot 20150518), for libreboot in general or for previously supported systems: +(this is a summary. For more detailed change list, refer to the git log) +</p> +<p> +256MiB VRAM allocated on GM45 (X200, T400, T500, R400) instead of 32MiB. This is an improvement over both Lenovo BIOS and Libreboot 20150518, allowing video decoding at 1080p to be smoother. (thanks Arthur Heymans) +To clarify, GM45 video performance in libreboot 20160818 is better than on the original BIOS and the previous libreboot release. +</p> +<p> +64MiB VRAM on i945 (X60, T60, MacBook2,1) now supported in coreboot-libre, and used by default (in the previous release, it was 8MiB allocated). Thanks to Arthur Heymans. +</p> +<p> +Higher battery life on GM45 (X200, T400, T500, R400) due to higher cstates now being supported (thanks Arthur Heymans). C4 power states also supported. +</p> +<p> +Higher battery life on i945 (X60, T60, MacBook2,1) due to better CPU C-state settings. (Deep C4, Dynamicl L2 shrinking, C2E). +</p> +<p> +Text mode on GM45 (X200, T400, T500, R400) now works, making it possible to use MemTest86+ comfortably. (thanks to Nick High from coreboot) +</p> +<p> +Dual channel LVDS displays on GM45 (T400, T500) are now automatically detected in coreboot-libre. (thanks Vladimir Serbinenko from coreboot) +</p> +<p> +Partial fix in coreboot-libre for GRUB display on GM45, for dual channel LVDS higher resolution LCD panels (T400, T500). (thanks Arthur Heymans) +</p> +<p> +Massively improved GRUB configuration, making it easier to boot more encrypted systems automatically, and generally a more useful menu for booting the system (thanks go to Klemens Nanni of the autoboot project). +Libreboot now uses the grub.cfg provided by the installed GNU/Linux distribution automatically, if present, switching to that configuration. This is done across many partitions, where libreboot actively searches for a configuration file +(also on LVM volumes and encrypted volumes). This should make libreboot more easy to use for non-technical users, without having to modify the GRUB configuration used in libreboot. +</p> +<p> +Utilities archives is now source only. You will need to compile the packages in there (build scripts included, and a script for installing build dependencies in Trisquel 7). (binary utility archives are planned again in the next release, when the new build system is merged) +</p> +<p> +SeaGRUB is now the default payload on all x86 boards. (SeaBIOS configured to load a compressed GRUB payload from CBFS immediately, without providing an interface in SeaBIOS. This way, GRUB is still used but now BIOS services are available, so you get the best of both worlds). Thanks go to Timothy Pearson of coreboot for this idea. +</p> +<p> +crossgcc is now downloaded and built as a separate module to coreboot-libre, with a universal revision used to build all boards. +</p> +<p> +Individual boards now have their own coreboot revision and patches, independently of each other board. This makes maintenance easier. +</p> +<p> +Updated all utilities, and modules (coreboot, GRUB, etc) to newer versions, with various bugfixes and improvements upstream. +</p> +<p> +RTC century byte issue now fixed on GM45 in coreboot-libre, so the date should now be correctly displayed when running the latest linux kernel, instead of seeing 1970-01-01 when you boot (thanks to Alexander Couzens from coreboot) +</p> +<p> +Build system now uses multiple CPU cores when building, speeding up building for some people. Manually specifying how many cores are needed is also possible, for those using the build system in a chroot environment. (thanks go to Timothy Pearson from coreboot) +</p> +<p> +In the build system (git repository), https:// is now used when cloning coreboot. http:// is used as a fallback for GRUB, if git:// fails. +</p> +<p> +New payload, the depthcharge bootloader (free bootloader maintained by Google) for use on the ASUS Chromebook C201. (thanks go to Paul Kocialkowski) +</p> +<p> +Various fixes to the ich9gen utility (e.g. flash component density is now set correctly in the descriptor, gbe-less descriptors now supported) +</p> +<p> +The official documentation included in the release in provided in texinfo format, instead of HTML; this was one of the requirements for joining GNU. (the other requirement is a new build system, to comply with GNU standards, e.g. Makefiles, and common Makefile entries present in all GNU software. As of Libreboot 20160818, this new build system is not yet merged, but will be in the release afterwards) ChangeLog and NEWS files are included in the release, to comply with GNU standards (they are dumps of the git-log output) +</p> + + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="gfdl-1.3.txt">gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/security/dock.html b/docs/security/dock.html new file mode 100644 index 00000000..9b114ab2 --- /dev/null +++ b/docs/security/dock.html @@ -0,0 +1,190 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Notes about DMA and the docking station (X60/T60)</title> +</head> + +<body> + <div class="section"> + <h1>Notes about DMA and the docking station (X60/T60)</h1> + </div> + + <div class="section"> +<pre> + +Use case: +--------- +Usually when people do full disk encryption, it's not really full disk, +instead they still have a /boot in clear. + +So an evil maid attack can still be done, in two passes: +1) Clone the hdd, Infect the initramfs or the kernel. +2) Wait for the user to enter its password, recover the password, +luksOpen the hdd image. + +I wanted a real full-disk encryption so I've put grub in flash and I +have the following: The HDD has a LUKS rootfs(containing /boot) on an +lvm partition, so no partition is in clear. + +So when the computer boots it executes coreboot, then grub as a payload. +Grub then opens the LUKS partition and loads the kernel and initramfs +from there. + +To prevent hardware level tempering(like reflashing), I used nail +polish with a lot of gilder, that acts like a seal. Then a high +resolution picture of it is taken, to be able to tell the difference. + +The problem: +------------ +But then comes the docking port issue: Some LPC pins are exported +there, such as the CLKRUN and LDRQ#. + +LDRQ# is "Encoded DMA/Bus Master Request": "Only needed by +peripherals that need DMA or bus mastering. Requires an +individual signal per peripheral. Peripherals may not share +an LDRQ# signal." + +So now DMA access is possible trough the dock connector. +So I want to be able to turn that off. + +If I got it right, the X60 has 2 superio, one is in the dock, and the +other one is in the laptop, so we have: + ________________ + _________________ | | +| | | Dock connector:| +|Dock: NSC pc87982|<--LPC--->D_LPC_DREQ0 | +|_________________| |_______^________| + | + | + | + | + ___________________|____ + | v | + | SuperIO: DLDRQ# | + | NSC pc87382 LDRQ# | + |___________________^____| + | + | + | + | + ___________________|___ + | v | + | Southbridge: LDRQ0 | + | ICH7 | + |_______________________| + + +The code: +--------- +Now if I look at the existing code, there is some superio drivers, like +pc87382 in src/superio/nsc, the code is very small. +The only interesting part is the pnp_info pnp_dev_info struct. + +Now if I look inside src/mainboard/lenovo/x60 there is some more +complete dock driver: + +Inside dock.c I see some dock_connect and dock_disconnect functions. + +Such functions are called during the initialisation (romstage.c) and +from the X60 SMI handler (smihandler.c). + +Questions: +---------- +1) Would the following be sufficent to prevent DMA access from the +outside: +> int dock_connect(void) +> { +> int timeout = 1000; +> + int val; +> + +> + if (get_option(&val, "dock") != CB_SUCCESS) +> + val = 1; +> + if (val == 0) +> + return 0; +> [...] +> } +> +> void dock_disconnect(void) { +> + if (dock_present()) +> + return; +> [...] +> } +2) Would an nvram option be ok for that? Should a Kconfig option be +added too? + +> config DOCK_AUTODETECT +> bool "Autodetect" +> help +> The dock is autodetected. If unsure select this option. +> +> config DOCK_DISABLED +> bool "Disabled" +> help +> The dock is always disabled. +> +> config DOCK_NVRAM_ENABLE +> bool "Nvram" +> help +> The dock autodetection is tried only if it is also enabled +> trough nvram. + +</pre> + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/security/index.html b/docs/security/index.html new file mode 100644 index 00000000..a354e43e --- /dev/null +++ b/docs/security/index.html @@ -0,0 +1,76 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Security topics</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Security topics</h1> + <p> + Or <a href="../index.html">Back to main index</a>. + </p> + <ul> + <li><a href="x60_security.html">ThinkPad X60/X60S: hardware security</a></li> + <li><a href="t60_security.html">ThinkPad T60: hardware security</a></li> + </ul> + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/security/t60_security.html b/docs/security/t60_security.html new file mode 100644 index 00000000..5a2d8d55 --- /dev/null +++ b/docs/security/t60_security.html @@ -0,0 +1,484 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Libreboot documentation: Security on the ThinkPad T60</title> +</head> + +<body> + + <div class="section"> + <h1>Security on the ThinkPad T60</h1> + <p>Hardware modifications to enhance security on the ThinkPad T60. This tutorial is <b>incomplete</b> at the time of writing.</p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + <h1>Table of Contents</h1> + <ul> + <li><a href="#hardware_requirements">Hardware Requirements</a></li> + <li><a href="#software_requirements">Software Requirements</a></li> + <li><a href="#procedure">The procedure</a></li> + </ul> + <h1 id="hardware_requirements">Hardware requirements</h1> + <ul> + <li>A T60</li> + <li>screwdriver</li> + <li>Rubbing or isopropyl alcohol, and thermal compound.</li> + <li>(in a later version of this tutorial: soldering iron and scalpel)</li> + </ul> + <h1 id="software_requirements">Software requirements</h1> + <ul> + <li>none (at least in the scope of the article as-is)</li> + <li>You probably want to encrypt your GNU/Linux install using LUKS</li> + </ul> + </div> + + <div class="section"> + <h1> + Rationale + </h1> + <p> + Most people think of security on the software side: the hardware is important aswell. + </p> + <p> + This tutorial deals with reducing the number of devices that have direct memory access that + could communicate with inputs/outputs that could be used to remotely + command the system (or leak data). All of this is purely theoretical for the time being. + </p> + </div> + + <div class="section"> + + <h1 id="procedure">Disassembly</h1> + + <p> + Remove those screws and remove the HDD:<br/> + <img src="../images/t60_dev/0001.JPG" alt="" /> <img src="../images/t60_dev/0002.JPG" alt="" /> + </p> + + <p> + Lift off the palm rest:<br/> + <img src="../images/t60_dev/0003.JPG" alt="" /> + </p> + + <p> + Lift up the keyboard, pull it back a bit, flip it over like that and then disconnect it from the board:<br/> + <img src="../images/t60_dev/0004.JPG" alt="" /> <img src="../images/t60_dev/0005.JPG" alt="" /> <img src="../images/t60_dev/0006.JPG" alt="" /> + </p> + + <p> + Gently wedge both sides loose:<br/> + <img src="../images/t60_dev/0007.JPG" alt="" /> <img src="../images/t60_dev/0008.JPG" alt="" /> + </p> + + <p> + Remove that cable from the position:<br/> + <img src="../images/t60_dev/0009.JPG" alt="" /> <img src="../images/t60_dev/0010.JPG" alt="" /> + </p> + + <p> + Now remove that bezel. Remove wifi, nvram battery and speaker connector (also remove 56k modem, on the left of wifi):<br/> + <img src="../images/t60_dev/0011.JPG" alt="" /><br/> + Reason: has direct (and very fast) memory access, and could (theoretically) leak data over a side-channel.<br/> + <b>Wifi:</b> The ath5k/ath9k cards might not have firmware at all. They might safe but could have + access to the computer's RAM trough DMA. If people have an intel + card(most T60 laptops come with Intel wifi by default, until you change it),then that card runs + a non-free firwamre and has access to the computer's RAM trough DMA! So + the risk-level is very high. + </p> + + <p> + Remove those screws:<br/> + <img src="../images/t60_dev/0012.JPG" alt="" /> + </p> + + <p> + Disconnect the power jack:<br/> + <img src="../images/t60_dev/0013.JPG" alt="" /> + </p> + + <p> + Remove nvram battery (we will put it back later):<br/> + <img src="../images/t60_dev/0014.JPG" alt="" /> + </p> + + <p> + Disconnect cable (for 56k modem) and disconnect the other cable:<br/> + <img src="../images/t60_dev/0015.JPG" alt="" /> <img src="../images/t60_dev/0016.JPG" alt="" /> + </p> + + <p> + Disconnect speaker cable:<br/> + <img src="../images/t60_dev/0017.JPG" alt="" /> + </p> + + <p> + Disconnect the other end of the 56k modem cable:<br/> + <img src="../images/t60_dev/0018.JPG" alt="" /> + </p> + + <p> + Make sure you removed it:<br/> + <img src="../images/t60_dev/0019.JPG" alt="" /> + </p> + + <p> + Unscrew those:<br/> + <img src="../images/t60_dev/0020.JPG" alt="" /> + </p> + + <p> + Make sure you removed those:<br/> + <img src="../images/t60_dev/0021.JPG" alt="" /> + </p> + + <p> + Disconnect LCD cable from board:<br/> + <img src="../images/t60_dev/0022.JPG" alt="" /> + </p> + + <p> + Remove those screws then remove the LCD assembly:<br/> + <img src="../images/t60_dev/0023.JPG" alt="" /> <img src="../images/t60_dev/0024.JPG" alt="" /> <img src="../images/t60_dev/0025.JPG" alt="" /> + </p> + + <p> + Once again, make sure you removed those:<br/> + <img src="../images/t60_dev/0026.JPG" alt="" /> + </p> + + <p> + Remove the shielding containing the motherboard, then flip it over. Remove these screws, placing them on a steady + surface in the same layout as they were in before you removed them. Also, you should mark each screw hole after removing the + screw (a permanent marker pen will do), this is so that you have a point of reference when re-assembling the system:<br/> + <img src="../images/t60_dev/0027.JPG" alt="" /> <img src="../images/t60_dev/0028.JPG" alt="" /> <img src="../images/t60_dev/0029.JPG" alt="" /> + <img src="../images/t60_dev/0031.JPG" alt="" /> <img src="../images/t60_dev/0032.JPG" alt="" /> <img src="../images/t60_dev/0033.JPG" alt="" /> + </p> + + <p> + Remove microphone (soldering iron not needed. Just wedge it out gently):<br/> + <img src="../images/t60_dev/0039.JPG" alt="" /><br/> + <b>Rationale:</b><br/> + Another reason to remove the microphone: If your computer gets<a href="#ref1">[1]</a> compromised, it can + record what you say, and use it to receive data from nearby devices if + they're compromised too. Also, we do not know what the built-in microcode (in the CPU) is doing; it could theoretically + be programmed to accept remote commands from some speaker somewhere (remote security hole). <b>In other words, + the system could already be compromised from the factory.</b> + </p> + + <p> + Remove infrared:<br/> + <img src="../images/t60_dev/0040.JPG" alt="" /> <img src="../images/t60_dev/0042.JPG" alt="" /> + </p> + + <p> + Remove cardbus (it's in a socket, no need to disable. Just remove the port itself):<br/> + <img src="../images/t60_dev/0041.JPG" alt="" /><br/> + <b>Rationale:</b><br/> + It has direct memory access and can be used to extract sensitive details (such as LUKS keys). See + 'GoodBIOS' video linked at the end (speaker is Peter Stuge, a coreboot hacker). The video covers X60 + but the same topics apply to T60. + </p> + + <p> + Before re-installing the upper chassis, remove the speaker:<br/> + <img src="../images/t60_dev/0043.JPG" alt="" /> <img src="../images/t60_dev/0044.JPG" alt="" /><br/> + Reason: combined with the microphone issue, this could be used to leak data.<br/> + If your computer gets<a href="#ref1">[1]</a> compromised, it can be used to + transmit data to nearby compromised devices. It's unknown if it can be + turned into a microphone<a href="#ref2">[2]</a>.<br/> + Replacement: headphones/speakers (line-out) or external DAC (USB). + </p> + + <p> + Remove the wwan:<br/> + <img src="../images/t60_dev/0045.JPG" alt="" /><br/> + <b>Wwan (3g modem):</b> They run proprietary software! It's like AMT but over the GSM network which is + probably even worse.<br/> + Replacement: external USB wifi dongle. (or USB wwan/3g dongle; note, this has all the same privacy issues as mobile phones. wwan not recommended). + </p> + + <p> + This is where the simcard connector is soldered. See notes above about wwan. Remove simcard by removing battery + and then it's accessible (so, remember to do this when you re-assemble. or you could do it now?)<br/> + <img src="../images/t60_dev/0046.JPG" alt="" /> + </p> + + <p> + Put those screws back:<br/> + <img src="../images/t60_dev/0047.JPG" alt="" /> + </p> + + <p> + Put it back into lower chassis:<br/> + <img src="../images/t60_dev/0048.JPG" alt="" /> + </p> + + <p> + Attach LCD and insert screws (also, attach the lcd cable to the board):<br/> + <img src="../images/t60_dev/0049.JPG" alt="" /> + </p> + + <p> + Insert those screws:<br/> + <img src="../images/t60_dev/0050.JPG" alt="" /> + </p> + + <p> + On the CPU (and there is another chip south-east to it, sorry forgot to take pic) + clean off the old thermal paste (with the alcohol) and apply new (Artic Silver 5 is good, others are good too) + you should also clean the heatsink the same way<br/> + <img src="../images/t60_dev/0051.JPG" alt="" /> + </p> + + <p> + Attach the heatsink and install the screws (also, make sure to install the AC jack as highlighted):<br/> + <img src="../images/t60_dev/0052.JPG" alt="" /> + </p> + + <p> + Reinstall that upper bezel:<br/> + <img src="../images/t60_dev/0053.JPG" alt="" /> + </p> + + <p> + Do that:<br/> + <img src="../images/t60_dev/0054.JPG" alt="" /> <img src="../images/t60_dev/0055.JPG" alt="" /> + </p> + + <p> + Attach keyboard and install nvram battery:<br/> + <img src="../images/t60_dev/0056.JPG" alt="" /> <img src="../images/t60_dev/0057.JPG" alt="" /> + </p> + + <p> + Place keyboard and (sorry, forgot to take pics) reinstall the palmrest and insert screws on the underside:<br/> + <img src="../images/t60_dev/0058.JPG" alt="" /> + </p> + + <p> + Remove those covers and unscrew:<br/> + <img src="../images/t60_dev/0059.JPG" alt="" /> <img src="../images/t60_dev/0060.JPG" alt="" /> <img src="../images/t60_dev/0061.JPG" alt="" /> + </p> + + <p> + Gently pry off the front bezel (sorry, forgot to take pics). + </p> + + <p> + Remove bluetooth module:<br/> + <img src="../images/t60_dev/0062.JPG" alt="" /> <img src="../images/t60_dev/0063.JPG" alt="" /> + </p> + + <p> + Re-attach the front bezel and re-insert the screws (sorry, forgot to take pics). + </p> + + <p> + It lives!<br/> + <img src="../images/t60_dev/0071.JPG" alt="" /> <img src="../images/t60_dev/0072.JPG" alt="" /> <img src="../images/t60_dev/0073.JPG" alt="" /> + </p> + + <p> + Always stress test ('stress -c 2' and xsensors. below 90C is ok) when replacing cpu paste/heatsink:<br/> + <img src="../images/t60_dev/0074.JPG" alt="" /> + </p> + + </div> + + <div class="section"> + <h2> + Not covered yet: + </h2> + <ul> + <li>Disable flashing the ethernet firmware</li> + <li>Disable SPI flash writes (can be re-enabled by unsoldering two parts)</li> + <li>Disable use of xrandr/edid on external monitor (cut 2 pins on VGA)</li> + <li>Disable docking station (might be possible to do it in software, in coreboot upstream as a Kconfig option)</li> + </ul> + <p> + Go to <a href="http://media.ccc.de/browse/congress/2013/30C3_-_5529_-_en_-_saal_2_-_201312271830_-_hardening_hardware_and_choosing_a_goodbios_-_peter_stuge.html">http://media.ccc.de/browse/congress/2013/30C3_-_5529_-_en_-_saal_2_-_201312271830_-_hardening_hardware_and_choosing_a_goodbios_-_peter_stuge.html</a> + or directly to the video: <a href="http://mirror.netcologne.de/CCC/congress/2013/webm/30c3-5529-en-Hardening_hardware_and_choosing_a_goodBIOS_webm.webm">http://mirror.netcologne.de/CCC/congress/2013/webm/30c3-5529-en-Hardening_hardware_and_choosing_a_goodBIOS_webm.webm</a>. + </p> + <p> + A lot of this tutorial is based on that video. Look towards the second half of the video to see how to do the above. + </p> + </div> + + <div class="section"> + <h2> + Also not covered yet: + </h2> + <ul> + <li> + Intrusion detection: randomized seal on screws<br/> + Just put nail polish with lot of glider on the important screws, take + some good pictures. Keep the pictueres and make sure of their integrity. + Compare the nail polish with the pictures before powering on the laptop. + </li> + <li> + Tips about preventing/mitigating risk of cold boot attack. + <ul> + <li>soldered RAM?</li> + <li>wipe all RAM at boot/power-off/power-on? (patch in coreboot upstream?)</li> + <li>ask gnutoo about fallback patches (counts number of boots)</li> + </ul> + </li> + <li> + General tips/advice and web links showing how to detect physical intrusions. + </li> + <li> + For example: <a href="http://cs.tau.ac.il/~tromer/acoustic/">http://cs.tau.ac.il/~tromer/acoustic/</a> + or <a href="http://cyber.bgu.ac.il/content/how-leak-sensitive-data-isolated-computer-air-gap-near-mobile-phone-airhopper">http://cyber.bgu.ac.il/content/how-leak-sensitive-data-isolated-computer-air-gap-near-mobile-phone-airhopper</a>. + </li> + <li> + <a href="https://en.wikipedia.org/wiki/Tempest_%28codename%29">https://en.wikipedia.org/wiki/Tempest_%28codename%29</a> + </li> + <li> + https://gitorious.org/gnutoo-for-coreboot/grub-assemble/source/a61f636797777a742f65f4c9c58032aa6a9b23c3: + </li> + </ul> + </div> + + <div class="section"> + <h1> + Extra notes + </h1> + <p> + EC: Cannot be removed but can be mitigated: it contains non-free + non-loadable code, but it has no access to the computer's RAM. + It has access to the on-switch of the wifi, bluetooth, modem and some + other power management features. The issue is that it has access to the + keyboard, however if the software security howto <b>(not yet written)</b> is followed correctly, + it won't be able to leak data to a local attacker. It has no network + access but it may still be able to leak data remotely, but that + requires someone to be nearby to recover the data with the help of an + SDR and some directional antennas<a href="#ref3">[3]</a>. + </p> + <p> + <a href="http://www.coreboot.org/Intel_82573_Ethernet_controller">Intel 82573 Ethernet controller</a> + on the X60 seems safe, according to Denis. + </p> + + <div class="subsection"> + <h2> + Risk level + </h2> + <ul> + <li>Modem (3g/wwan): highest</li> + <li>Intel wifi: Near highest</li> + <li>Atheros PCI wifi: unknown, but lower than intel wifi.</li> + <li>Microphone: only problematic if the computer gets compromised.</li> + <li>Speakers: only problematic if the computer gets compromised.</li> + <li>EC: can be mitigated if following the guide on software security.</li> + </ul> + </div> + </div> + + <div class="section"> + <h1> + Further reading material (software security) + </h1> + <ul> + <li><a href="../gnulinux/encrypted_trisquel.html">Installing Trisquel GNU/Linux with full disk encryption (including /boot)</a></li> + <li><a href="../gnulinux/encrypted_parabola.html">Installing Parabola GNU/Linux with full disk encryption (including /boot)</a></li> + <li><a href="dock.html">Notes about DMA access and the docking station</a></li> + </ul> + </div> + + <div class="section"> + <h1> + References + </h1> + <div class="subsection"> + <h2 id="ref1">[1] physical access</h2> + <p> + Explain that black hats, TAO, and so on might use a 0day to get in, + and explain that in this case it mitigates what the attacker can do. + Also the TAO do some evaluation before launching an attack: they take + the probability of beeing caught into account, along with the kind of + target. A 0day costs a lot of money, I heard that it was from 100000$ + to 400000$, some other websites had prices 10 times lower but that + but it was probably a typo. So if people increase their security it + makes it more risky and more costly to attack people. + </p> + </div> + <div class="subsection"> + <h2 id="ref2">[2] microphone</h2> + <p> + It's possible to turn headphones into a microphone, you could try + yourself, however they don't record loud at all. Also intel cards have + the capability to change a connector's function, for instance the + microphone jack can now become a headphone plug, that's called + retasking. There is some support for it in GNU/Linux but it's not very + well known. + </p> + </div> + <div class="subsection"> + <h2 id="ref3">[3] Video (CCC)</h2> + <p> + 30c3-5356-en-Firmware_Fat_Camp_webm.webm from the 30th CCC. While + their demo is experimental(their hardware also got damaged during the + transport), the spies probably already have that since a long time. + <a href="http://berlin.ftp.media.ccc.de/congress/2013/webm/30c3-5356-en-Firmware_Fat_Camp_webm.webm">http://berlin.ftp.media.ccc.de/congress/2013/webm/30c3-5356-en-Firmware_Fat_Camp_webm.webm</a> + </p> + </div> + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/security/x60_security.html b/docs/security/x60_security.html new file mode 100644 index 00000000..ba82bca9 --- /dev/null +++ b/docs/security/x60_security.html @@ -0,0 +1,344 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>Libreboot documentation: Security on the ThinkPad X60</title> +</head> + +<body> + + <div class="section"> + <h1>Security on the ThinkPad X60</h1> + <p>Hardware modifications to enhance security on the ThinkPad X60. This tutorial is <b>incomplete</b> at the time of writing.</p> + <p><a href="index.html">Back to previous index</a></p> + </div> + + <div class="section"> + <h1>Table of Contents</h1> + <ul> + <li><a href="#hardware_requirements">Hardware Requirements</a></li> + <li><a href="#software_requirements">Software Requirements</a></li> + <li><a href="#procedure">The procedure</a></li> + </ul> + </div> + + <div class="section"> + + <h1 id="hardware_requirements">Hardware requirements</h1> + <ul> + <li>An X60</li> + <li>screwdriver</li> + <li>(in a later version of this tutorial: soldering iron and scalpel)</li> + </ul> + + <h1 id="software_requirements">Software requirements</h1> + <ul> + <li>none (at least in the scope of the article as-is)</li> + <li>You probably want to encrypt your GNU/Linux install using LUKS</li> + </ul> + + </div> + + <div class="section"> + + <h1> + Rationale + </h1> + <p> + Most people think of security on the software side: the hardware is important aswell. + </p> + <p> + This tutorial deals with reducing the number of devices that have direct memory access that + could communicate with inputs/outputs that could be used to remotely + command the system (or leak data). All of this is purely theoretical for the time being. + </p> + + <h1 id="procedure">Disassembly</h1> + + <p> + Firstly remove the bluetooth (if your X60 has this):<br/> + The marked screws are underneath those stickers (marked in those 3 locations at the bottom of the LCD assembly):<br/> + <img src="../images/x60_security/0000_bluetooth0.jpg" alt="" /><br/> + Now gently pry off the bottom part of the front bezel, and the bluetooth module is on the left (easily removable):<br/> + <img src="../images/x60_security/0000_bluetooth.jpg" alt="" /><br/> + </p> + + <p> + If your model was WWAN, remove the simcard (check anyway):<br/> + Uncover those 2 screws at the bottom:<br/> + <img src="../images/x60_security/0000_simcard0.jpg" alt="" /><br/> + SIM card (not present in the picture) is in the marked location:<br/> + <img src="../images/x60_security/0000_simcard1.jpg" alt="" /><br/> + Replacement: USB dongle. + </p> + + <p> + Now get into the motherboard. + </p> + + <p> + Remove those screws:<br/> + <img src="../images/x60_security/0000.jpg" alt="" /> + </p> + <p> + Push the keyboard forward (carefully):<br/> + <img src="../images/x60_security/0001.jpg" alt="" /> + </p> + <p> + Lift the keyboard up and disconnect it from the board:<br/> + <img src="../images/x60_security/0002.jpg" alt="" /> + </p> + <p> + Grab the right-hand side of the chassis and force it off (gently) and pry up the rest of the chassis:<br/> + <img src="../images/x60_security/0003.jpg" alt="" /> + </p> + <p> + You should now have this:<br/> + <img src="../images/x60_security/0004.jpg" alt="" /> + </p> + + <p> + The following is a summary of what you will remove (already done to this system):<br/> + <img src="../images/x60_security/0001_overview.jpg" alt="" /><br/> + Note: the blue lines represent antenna cables and modem cables. You don't need to remove these, but you can if you want + (to make it tidier after removing other parts). I removed the antenna wires, the modem jack, the modem cable and + also (on another model) a device inside the part where the wwan antenna goes (wasn't sure what it was, but I knew it wasn't needed). <b>This is optional</b> + </p> + + <p> + Remove the microphone (can desolder it, but you can also easily pull it off with you hands). Already removed here:<br/> + <img src="../images/x60_security/0001_microphone.jpg" alt="" /><br/> + <b>Rationale:</b><br/> + Another reason to remove the microphone: If your computer gets<a href="#ref1">[1]</a> compromised, it can + record what you say, and use it to receive data from nearby devices if + they're compromised too. Also, we do not know what the built-in microcode (in the CPU) is doing; it could theoretically + be programmed to accept remote commands from some speaker somewhere (remote security hole). <b>In other words, + the system could already be compromised from the factory.</b> + </p> + + <p> + Remove the modem:<br/> + <img src="../images/x60_security/0001_modem.jpg" alt="" /><br/> + (useless, obsolete device) + </p> + + <p> + Remove the speaker:<br/> + <img src="../images/x60_security/0001_speaker.jpg" alt="" /><br/> + Reason: combined with the microphone issue, this could be used to leak data.<br/> + If your computer gets<a href="#ref1">[1]</a> compromised, it can be used to + transmit data to nearby compromised devices. It's unknown if it can be + turned into a microphone<a href="#ref2">[2]</a>.<br/> + Replacement: headphones/speakers (line-out) or external DAC (USB). + </p> + + <p> + Remove the wlan (also remove wwan if you have it):<br/> + <img src="../images/x60_security/0001_wlan_wwan.jpg" alt="" /><br/> + Reason: has direct (and very fast) memory access, and could (theoretically) leak data over a side-channel.<br/> + <b>Wifi:</b> The ath5k/ath9k cards might not have firmware at all. They might safe but could have + access to the computer's RAM trough DMA. If people have an intel + card(most X60s come with Intel wifi by default, until you change it),then that card runs + a non-free firwamre and has access to the computer's RAM trough DMA! So + the risk-level is very high.<br/> + <b>Wwan (3g modem):</b> They run proprietary software! It's like AMT but over the GSM network which is + probably even worse.<br/> + Replacement: external USB wifi dongle. (or USB wwan/3g dongle; note, this has all the same privacy issues as mobile phones. wwan not recommended). + </p> + + <h2> + Not covered yet: + </h2> + <ul> + <li>Disable cardbus (has fast/direct memory access)</li> + <li>Disable firewire (has fast/direct memory access)</li> + <li>Disable flashing the ethernet firmware</li> + <li>Disable SPI flash writes (can be re-enabled by unsoldering two parts)</li> + <li>Disable use of xrandr/edid on external monitor (cut 2 pins on VGA)</li> + <li>Disable docking station (might be possible to do it in software, in coreboot upstream as a Kconfig option)</li> + </ul> + <p> + Go to <a href="http://media.ccc.de/browse/congress/2013/30C3_-_5529_-_en_-_saal_2_-_201312271830_-_hardening_hardware_and_choosing_a_goodbios_-_peter_stuge.html">http://media.ccc.de/browse/congress/2013/30C3_-_5529_-_en_-_saal_2_-_201312271830_-_hardening_hardware_and_choosing_a_goodbios_-_peter_stuge.html</a> + or directly to the video: <a href="http://mirror.netcologne.de/CCC/congress/2013/webm/30c3-5529-en-Hardening_hardware_and_choosing_a_goodBIOS_webm.webm">http://mirror.netcologne.de/CCC/congress/2013/webm/30c3-5529-en-Hardening_hardware_and_choosing_a_goodBIOS_webm.webm</a>. + </p> + <p> + A lot of this tutorial is based on that video. Look towards the second half of the video to see how to do the above. + </p> + + <h2> + Also not covered yet: + </h2> + <ul> + <li> + Intrusion detection: randomized seal on screws<br/> + Just put nail polish with lot of glider on the important screws, take + some good pictures. Keep the pictueres and make sure of their integrity. + Compare the nail polish with the pictures before powering on the laptop. + </li> + <li> + Tips about preventing/mitigating risk of cold boot attack. + <ul> + <li>soldered RAM?</li> + <li>seal RAM door shut (possibly modified lower chassis) so that system has to be disassembled (which has to go through the nail polish)</li> + <li>wipe all RAM at boot/power-off/power-on? (patch in coreboot upstream?)</li> + <li>ask gnutoo about fallback patches (counts number of boots)</li> + </ul> + </li> + <li> + General tips/advice and web links showing how to detect physical intrusions. + </li> + <li> + For example: <a href="http://cs.tau.ac.il/~tromer/acoustic/">http://cs.tau.ac.il/~tromer/acoustic/</a> + or <a href="http://cyber.bgu.ac.il/content/how-leak-sensitive-data-isolated-computer-air-gap-near-mobile-phone-airhopper">http://cyber.bgu.ac.il/content/how-leak-sensitive-data-isolated-computer-air-gap-near-mobile-phone-airhopper</a>. + </li> + <li> + <a href="https://en.wikipedia.org/wiki/Tempest_%28codename%29">https://en.wikipedia.org/wiki/Tempest_%28codename%29</a> + </li> + <li> + https://gitorious.org/gnutoo-for-coreboot/grub-assemble/source/a61f636797777a742f65f4c9c58032aa6a9b23c3: + </li> + </ul> + + </div> + + <div class="section"> + <h1> + Extra notes + </h1> + <p> + EC: Cannot be removed but can be mitigated: it contains non-free + non-loadable code, but it has no access to the computer's RAM. + It has access to the on-switch of the wifi, bluetooth, modem and some + other power management features. The issue is that it has access to the + keyboard, however if the software security howto <b>(not yet written)</b> is followed correctly, + it won't be able to leak data to a local attacker. It has no network + access but it may still be able to leak data remotely, but that + requires someone to be nearby to recover the data with the help of an + SDR and some directional antennas<a href="#ref3">[3]</a>. + </p> + <p> + <a href="http://www.coreboot.org/Intel_82573_Ethernet_controller">Intel 82573 Ethernet controller</a> + on the X60 seems safe, according to Denis. + </p> + + <div class="subsection"> + <h2> + Risk level + </h2> + <ul> + <li>Modem (3g/wwan): highest</li> + <li>Intel wifi: Near highest</li> + <li>Atheros PCI wifi: unknown, but lower than intel wifi.</li> + <li>Microphone: only problematic if the computer gets compromised.</li> + <li>Speakers: only problematic if the computer gets compromised.</li> + <li>EC: can be mitigated if following the guide on software security.</li> + </ul> + </div> + </div> + + <div class="section"> + <h1> + Further reading material (software security) + </h1> + <ul> + <li><a href="../gnulinux/encrypted_trisquel.html">Installing Trisquel GNU/Linux with full disk encryption (including /boot)</a></li> + <li><a href="../gnulinux/encrypted_parabola.html">Installing Parabola GNU/Linux with full disk encryption (including /boot)</a></li> + <li><a href="dock.html">Notes about DMA access and the docking station</a></li> + </ul> + </div> + + <div class="section"> + <h1> + References + </h1> + <div class="subsection"> + <h2 id="ref1">[1] physical access</h2> + <p> + Explain that black hats, TAO, and so on might use a 0day to get in, + and explain that in this case it mitigates what the attacker can do. + Also the TAO do some evaluation before launching an attack: they take + the probability of beeing caught into account, along with the kind of + target. A 0day costs a lot of money, I heard that it was from 100000$ + to 400000$, some other websites had prices 10 times lower but that + but it was probably a typo. So if people increase their security it + makes it more risky and more costly to attack people. + </p> + </div> + <div class="subsection"> + <h2 id="ref2">[2] microphone</h2> + <p> + It's possible to turn headphones into a microphone, you could try + yourself, however they don't record loud at all. Also intel cards have + the capability to change a connector's function, for instance the + microphone jack can now become a headphone plug, that's called + retasking. There is some support for it in GNU/Linux but it's not very + well known. + </p> + </div> + <div class="subsection"> + <h2 id="ref3">[3] Video (CCC)</h2> + <p> + 30c3-5356-en-Firmware_Fat_Camp_webm.webm from the 30th CCC. While + their demo is experimental(their hardware also got damaged during the + transport), the spies probably already have that since a long time. + <a href="http://berlin.ftp.media.ccc.de/congress/2013/webm/30c3-5356-en-Firmware_Fat_Camp_webm.webm">http://berlin.ftp.media.ccc.de/congress/2013/webm/30c3-5356-en-Firmware_Fat_Camp_webm.webm</a> + </p> + </div> + </div> + + <div class="section"> + + <p> + Copyright © 2014, 2015 Leah Rowe <info@minifree.org><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR + IN PART, THIS LIMITATION MAY NOT APPLY TO YOU. + </p> + <p> + The disclaimer of warranties and limitation of liability provided + above shall be interpreted in a manner that, to the extent + possible, most closely approximates an absolute disclaimer and + waiver of all liability. + </p> + + </div> + +</body> +</html> diff --git a/docs/t7200q/.htaccess b/docs/t7200q/.htaccess new file mode 100644 index 00000000..75da6747 --- /dev/null +++ b/docs/t7200q/.htaccess @@ -0,0 +1,2 @@ +Options +Indexes +IndexOptions FancyIndexing FoldersFirst NameWidth=* DescriptionWidth=* diff --git a/docs/t7200q/cbmemc b/docs/t7200q/cbmemc new file mode 100644 index 00000000..e5daef58 --- /dev/null +++ b/docs/t7200q/cbmemc @@ -0,0 +1,1448 @@ +
+
+coreboot-4.0-6185-g7f1f3fb-dirty-79ETE7WW (2.27 ) Wed Jul 16 14:03:30 BST 2014 starting...
+
+Mobile Intel(R) 82945GM/GME Express Chipset
+(G)MCH capable of up to FSB 800 MHz
+(G)MCH capable of up to DDR2-667
+Setting up static southbridge registers... GPIOS... done.
+Disabling Watchdog reboot... done.
+Setting up static northbridge registers... done.
+Waiting for MCHBAR to come up...ok
+PM1_CNT: 00001c00
+SMBus controller enabled.
+Setting up RAM controller.
+This mainboard supports Dual Channel Operation.
+DDR II Channel 0 Socket 0: x8DDS
+DDR II Channel 1 Socket 0: x16SS
+Memory will be driven at 667MHz with CAS=5 clocks
+tRAS = 15 cycles
+tRP = 5 cycles
+tRCD = 5 cycles
+Refresh: 7.8us
+tWR = 5 cycles
+DIMM 0 side 0 = 512 MB
+DIMM 0 side 1 = 512 MB
+DIMM 2 side 0 = 256 MB
+tRFC = 35 cycles
+Setting Graphics Frequency...
+FSB: 667 MHz Voltage: 1.05V Render: 250Mhz Display: 200MHz
+Setting Memory Frequency... CLKCFG=0x00010023, CLKCFG=0x00010043, ok
+Setting mode of operation for memory channels...Dual Channel Assymetric.
+Programming Clock Crossing...MEM=667 FSB=667... ok
+Setting RAM size...
+C0DRB = 0x20202010
+C1DRB = 0x28282828
+TOLUD = 0x0050
+Setting row attributes...
+C0DRA = 0x0033
+C1DRA = 0x0003
+one dimm per channel config..
+Initializing System Memory IO...
+Programming Dual Channel RCOMP
+Table Index: 17
+Programming DLL Timings...
+Enabling System Memory IO...
+jedec enable sequence: bank 0
+jedec enable sequence: bank 1
+bankaddr from bank size of rank 0
+jedec enable sequence: bank 4
+bankaddr from bank size of rank 1
+receive_enable_autoconfig() for channel 0
+ find_strobes_low()
+ set_receive_enable() medium=0x3, coarse=0x5
+ set_receive_enable() medium=0x1, coarse=0x5
+ find_strobes_edge()
+ set_receive_enable() medium=0x1, coarse=0x5
+ set_receive_enable() medium=0x3, coarse=0x5
+ add_quarter_clock() mediumcoarse=17 fine=00
+ find_preamble()
+ set_receive_enable() medium=0x3, coarse=0x4
+ set_receive_enable() medium=0x3, coarse=0x3
+ add_quarter_clock() mediumcoarse=0f fine=80
+ set_receive_enable() medium=0x1, coarse=0x4
+ normalize()
+Weird. No C0WL0REOST
+receive_enable_autoconfig() for channel 1
+ find_strobes_low()
+ set_receive_enable() medium=0x3, coarse=0x5
+ set_receive_enable() medium=0x1, coarse=0x5
+ find_strobes_edge()
+ set_receive_enable() medium=0x1, coarse=0x5
+ add_quarter_clock() mediumcoarse=15 fine=c6
+ set_receive_enable() medium=0x3, coarse=0x5
+ find_preamble()
+ set_receive_enable() medium=0x3, coarse=0x4
+ set_receive_enable() medium=0x3, coarse=0x3
+ add_quarter_clock() mediumcoarse=0f fine=46
+ normalize()
+ set_receive_enable() medium=0x0, coarse=0x4
+RAM initialization finished.
+Setting up Egress Port RCRB
+Loading port arbitration table ...ok
+Wait for VC1 negotiation ...ok
+Setting up DMI RCRB
+Wait for VC1 negotiation ...done..
+Internal graphics: enabled
+Waiting for DMI hardware...ok
+Enabling PCI Express x16
+
+*** Log truncated, 296 characters dropped. ***
+
+Adding CBMEM entry as no. 3
+Trying CBFS ramstage loader.
+CBFS: loading stage fallback/ramstage @ 0x100000 (340024 bytes), entry @ 0x100000
+coreboot-4.0-6185-g7f1f3fb-dirty-79ETE7WW (2.27 ) Wed Jul 16 14:03:30 BST 2014 booting...
+BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
+BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
+Enumerating buses...
+Show all devs...Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:02.1: enabled 1
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.3: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:1f.0: enabled 1
+PNP: 00ff.1: enabled 1
+PNP: 00ff.2: enabled 1
+PNP: 164e.2: enabled 1
+PNP: 164e.3: enabled 0
+PNP: 164e.7: enabled 1
+PNP: 164e.19: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 1
+PNP: 002e.2: enabled 0
+PNP: 002e.3: enabled 1
+PNP: 002e.7: enabled 1
+PNP: 002e.a: enabled 0
+PCI: 00:1f.1: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+I2C: 00:69: enabled 1
+I2C: 00:54: enabled 1
+I2C: 00:55: enabled 1
+I2C: 00:56: enabled 1
+I2C: 00:57: enabled 1
+I2C: 00:5c: enabled 1
+I2C: 00:5d: enabled 1
+I2C: 00:5e: enabled 1
+I2C: 00:5f: enabled 1
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ DOMAIN: 0000: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:01.0: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:02.0: enabled 1
+ PCI: 00:02.1: enabled 1
+ PCI: 00:1b.0: enabled 1
+ PCI: 00:1c.0: enabled 1
+ PCI: 00:1c.1: enabled 1
+ PCI: 00:1d.0: enabled 1
+ PCI: 00:1d.1: enabled 1
+ PCI: 00:1d.2: enabled 1
+ PCI: 00:1d.3: enabled 1
+ PCI: 00:1d.7: enabled 1
+ PCI: 00:1e.0: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:1f.0: enabled 1
+ PNP: 00ff.1: enabled 1
+ PNP: 00ff.2: enabled 1
+ PNP: 164e.2: enabled 1
+ PNP: 164e.3: enabled 0
+ PNP: 164e.7: enabled 1
+ PNP: 164e.19: enabled 1
+ PNP: 002e.0: enabled 0
+ PNP: 002e.1: enabled 1
+ PNP: 002e.2: enabled 0
+ PNP: 002e.3: enabled 1
+ PNP: 002e.7: enabled 1
+ PNP: 002e.a: enabled 0
+ PCI: 00:1f.1: enabled 1
+ PCI: 00:1f.2: enabled 1
+ PCI: 00:1f.3: enabled 1
+ I2C: 00:69: enabled 1
+ I2C: 00:54: enabled 1
+ I2C: 00:55: enabled 1
+ I2C: 00:56: enabled 1
+ I2C: 00:57: enabled 1
+ I2C: 00:5c: enabled 1
+ I2C: 00:5d: enabled 1
+ I2C: 00:5e: enabled 1
+ I2C: 00:5f: enabled 1
+scan_static_bus for Root Device
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+PCI: 00:00.0 [8086/27a0] ops
+PCI: 00:00.0 [8086/27a0] enabled
+PCI: Static device PCI: 00:01.0 not found, disabling it.
+PCI: 00:02.0 [8086/27a2] ops
+PCI: 00:02.0 [8086/27a2] enabled
+PCI: 00:02.1 [8086/27a6] ops
+PCI: 00:02.1 [8086/27a6] enabled
+PCI: 00:1b.0 [8086/27d8] ops
+PCI: 00:1b.0 [8086/27d8] enabled
+PCI: 00:1c.0 [8086/0000] bus ops
+PCI: 00:1c.0 [8086/27d0] enabled
+PCI: 00:1c.1 [8086/0000] bus ops
+PCI: 00:1c.1 [8086/27d2] enabled
+PCI: 00:1c.2 [8086/0000] bus ops
+PCI: 00:1c.2 [8086/27d4] enabled
+PCI: 00:1c.3 [8086/0000] bus ops
+PCI: 00:1c.3 [8086/27d6] enabled
+PCI: 00:1d.0 [8086/27c8] ops
+PCI: 00:1d.0 [8086/27c8] enabled
+PCI: 00:1d.1 [8086/27c9] ops
+PCI: 00:1d.1 [8086/27c9] enabled
+PCI: 00:1d.2 [8086/27ca] ops
+PCI: 00:1d.2 [8086/27ca] enabled
+PCI: 00:1d.3 [8086/27cb] ops
+PCI: 00:1d.3 [8086/27cb] enabled
+PCI: 00:1d.7 [8086/27cc] ops
+PCI: 00:1d.7 [8086/27cc] enabled
+PCI: 00:1e.0 [8086/2448] bus ops
+PCI: 00:1e.0 [8086/2448] enabled
+PCI: 00:1f.0 [8086/27b9] bus ops
+PCI: 00:1f.0 [8086/27b9] enabled
+PCI: 00:1f.1 [8086/27df] ops
+PCI: 00:1f.1 [8086/27df] enabled
+PCI: 00:1f.2 [8086/0000] ops
+PCI: 00:1f.2 [8086/27c4] enabled
+PCI: 00:1f.3 [8086/27da] bus ops
+PCI: 00:1f.3 [8086/27da] enabled
+do_pci_scan_bridge for PCI: 00:1c.0
+PCI: pci_scan_bus for bus 01
+PCI: 01:00.0 [8086/109a] enabled
+PCI: pci_scan_bus returning with max=001
+do_pci_scan_bridge returns max 1
+do_pci_scan_bridge for PCI: 00:1c.1
+PCI: pci_scan_bus for bus 02
+PCI: 02:00.0 [8086/4227] enabled
+PCI: pci_scan_bus returning with max=002
+do_pci_scan_bridge returns max 2
+do_pci_scan_bridge for PCI: 00:1c.2
+PCI: pci_scan_bus for bus 03
+PCI: pci_scan_bus returning with max=003
+do_pci_scan_bridge returns max 3
+do_pci_scan_bridge for PCI: 00:1c.3
+PCI: pci_scan_bus for bus 04
+PCI: pci_scan_bus returning with max=004
+do_pci_scan_bridge returns max 4
+do_pci_scan_bridge for PCI: 00:1e.0
+PCI: pci_scan_bus for bus 05
+PCI: 05:00.0 [104c/ac56] ops
+PCI: 05:00.0 [104c/ac56] enabled
+PCI: pci_scan_bus returning with max=005
+do_pci_scan_bridge returns max 5
+scan_static_bus for PCI: 00:1f.0
+PNP: 00ff.1 enabled
+recv_ec_data: 0x37
+recv_ec_data: 0x39
+recv_ec_data: 0x48
+recv_ec_data: 0x54
+recv_ec_data: 0x35
+recv_ec_data: 0x30
+recv_ec_data: 0x57
+recv_ec_data: 0x57
+recv_ec_data: 0x04
+recv_ec_data: 0x03
+recv_ec_data: 0x70
+recv_ec_data: 0x10
+EC Firmware ID 79HT50WW-3.4, Version 7.01A
+recv_ec_data: 0x00
+recv_ec_data: 0x10
+recv_ec_data: 0x20
+recv_ec_data: 0x30
+recv_ec_data: 0x00
+recv_ec_data: 0xa6
+recv_ec_data: 0x01
+recv_ec_data: 0x70
+PNP: 00ff.2 enabled
+PNP: 164e.2 enabled
+PNP: 164e.3 disabled
+PNP: 164e.7 enabled
+PNP: 164e.19 enabled
+PNP: 002e.0 disabled
+PNP: 002e.1 enabled
+PNP: 002e.2 disabled
+PNP: 002e.3 enabled
+PNP: 002e.7 enabled
+PNP: 002e.a disabled
+scan_static_bus for PCI: 00:1f.0 done
+scan_static_bus for PCI: 00:1f.3
+smbus: PCI: 00:1f.3[0]->I2C: 01:69 enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
+scan_static_bus for PCI: 00:1f.3 done
+PCI: pci_scan_bus returning with max=005
+scan_static_bus for Root Device done
+done
+BS: BS_DEV_ENUMERATE times (us): entry 0 run 34254 exit 0
+found VGA at PCI: 00:02.0
+Setting up VGA for PCI: 00:02.0
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+APIC: 00 missing read_resources
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0
+Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
+PCI: 00:1c.0 read_resources bus 1 link: 0
+PCI: 00:1c.0 read_resources bus 1 link: 0 done
+PCI: 00:1c.1 read_resources bus 2 link: 0
+PCI: 00:1c.1 read_resources bus 2 link: 0 done
+PCI: 00:1c.2 read_resources bus 3 link: 0
+PCI: 00:1c.2 read_resources bus 3 link: 0 done
+PCI: 00:1c.3 read_resources bus 4 link: 0
+PCI: 00:1c.3 read_resources bus 4 link: 0 done
+PCI: 00:1e.0 read_resources bus 5 link: 0
+PCI: 00:1e.0 read_resources bus 5 link: 0 done
+PCI: 00:1f.0 read_resources bus 0 link: 0
+PNP: 00ff.1 missing read_resources
+PNP: 00ff.2 missing read_resources
+PCI: 00:1f.0 read_resources bus 0 link: 0 done
+PCI: 00:1f.3 read_resources bus 1 link: 0
+PCI: 00:1f.3 read_resources bus 1 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
+ PCI: 00:01.0 child on link 0 PCI: 00:00.0
+ PCI: 00:00.0
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
+ PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14
+ PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18
+ PCI: 00:02.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 1c
+ PCI: 00:02.1
+ PCI: 00:02.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:1c.0 child on link 0 PCI: 01:00.0
+ PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
+ PCI: 01:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
+ PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:1c.2
+ PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:1c.3
+ PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.3
+ PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
+ PCI: 00:1e.0 child on link 0 PCI: 05:00.0
+ PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 05:00.0
+ PCI: 05:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffff flags 100 index 2c
+ PCI: 05:00.0 resource base 0 size 1000 align 2 gran 2 limit ffff flags 100 index 34
+ PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 1200 index 1c
+ PCI: 05:00.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 200 index 24
+ PCI: 00:1f.0 child on link 0 PNP: 00ff.1
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 00ff.1
+ PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
+ PNP: 00ff.2
+ PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+ PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
+ PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
+ PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
+ PNP: 164e.2
+ PNP: 164e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 164e.2 resource base b0 size 0 align 0 gran 0 limit 0 flags c0000400 index 29
+ PNP: 164e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 164e.2 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 164e.2 resource base 82 size 0 align 0 gran 0 limit 0 flags c0000400 index f0
+ PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
+ PNP: 164e.3
+ PNP: 164e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 164e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 164e.7
+ PNP: 164e.7 resource base 1680 size 10 align 4 gran 4 limit ffff flags c0000100 index 60
+ PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 164e.19
+ PNP: 164e.19 resource base 164c size 2 align 1 gran 1 limit ffff flags c0000100 index 60
+ PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.0
+ PNP: 002e.1
+ PNP: 002e.1 resource base 3bc size 400 align 10 gran 10 limit 7ff flags c0000100 index 60
+ PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+ PNP: 002e.2
+ PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.7
+ PNP: 002e.7 resource base 1620 size 10 align 4 gran 4 limit ffff flags c0000100 index 60
+ PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.a
+ PCI: 00:1f.1
+ PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:1f.2 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
+ PCI: 00:1f.3 child on link 0 I2C: 01:69
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+ I2C: 01:69
+ I2C: 01:54
+ I2C: 01:55
+ I2C: 01:56
+ I2C: 01:57
+ I2C: 01:5c
+ I2C: 01:5d
+ I2C: 01:5e
+ I2C: 01:5f
+DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 01:00.0 18 * [0x0 - 0x1f] io
+PCI: 00:1c.0 compute_resources_io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 05:00.0 2c * [0x0 - 0xfff] io
+PCI: 05:00.0 34 * [0x1000 - 0x1fff] io
+PCI: 00:1e.0 compute_resources_io: base: 2000 size: 2000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1e.0 1c * [0x0 - 0x1fff] io
+PCI: 00:1c.0 1c * [0x2000 - 0x2fff] io
+PCI: 00:1d.0 20 * [0x3000 - 0x301f] io
+PCI: 00:1d.1 20 * [0x3020 - 0x303f] io
+PCI: 00:1d.2 20 * [0x3040 - 0x305f] io
+PCI: 00:1d.3 20 * [0x3060 - 0x307f] io
+PCI: 00:1f.1 20 * [0x3080 - 0x308f] io
+PCI: 00:1f.2 20 * [0x3090 - 0x309f] io
+PCI: 00:02.0 14 * [0x30a0 - 0x30a7] io
+PCI: 00:1f.1 10 * [0x30a8 - 0x30af] io
+PCI: 00:1f.1 18 * [0x30b0 - 0x30b7] io
+PCI: 00:1f.2 10 * [0x30b8 - 0x30bf] io
+PCI: 00:1f.2 18 * [0x30c0 - 0x30c7] io
+PCI: 00:1f.1 14 * [0x30c8 - 0x30cb] io
+PCI: 00:1f.1 1c * [0x30cc - 0x30cf] io
+PCI: 00:1f.2 14 * [0x30d0 - 0x30d3] io
+PCI: 00:1f.2 1c * [0x30d4 - 0x30d7] io
+DOMAIN: 0000 compute_resources_io: base: 30d8 size: 30d8 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 01:00.0 10 * [0x0 - 0x1ffff] mem
+PCI: 00:1c.0 compute_resources_mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:00.0 10 * [0x0 - 0xfff] mem
+PCI: 00:1c.1 compute_resources_mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 05:00.0 1c * [0x0 - 0x1ffffff] prefmem
+PCI: 00:1e.0 compute_resources_prefmem: base: 2000000 size: 2000000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 05:00.0 24 * [0x0 - 0x1ffffff] mem
+PCI: 05:00.0 10 * [0x2000000 - 0x2000fff] mem
+PCI: 00:1e.0 compute_resources_mem: base: 2001000 size: 2100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
+PCI: 00:1e.0 20 * [0x10000000 - 0x120fffff] mem
+PCI: 00:1e.0 24 * [0x12100000 - 0x140fffff] prefmem
+PCI: 00:1c.0 20 * [0x14100000 - 0x141fffff] mem
+PCI: 00:1c.1 20 * [0x14200000 - 0x142fffff] mem
+PCI: 00:02.0 10 * [0x14300000 - 0x1437ffff] mem
+PCI: 00:02.1 10 * [0x14380000 - 0x143fffff] mem
+PCI: 00:02.0 1c * [0x14400000 - 0x1443ffff] mem
+PCI: 00:1b.0 10 * [0x14440000 - 0x14443fff] mem
+PCI: 00:1d.7 10 * [0x14444000 - 0x144443ff] mem
+PCI: 00:1f.2 24 * [0x14444400 - 0x144447ff] mem
+DOMAIN: 0000 compute_resources_mem: base: 14444800 size: 14444800 align: 28 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: DOMAIN: 0000
+constrain_resources: PCI: 00:00.0
+constrain_resources: PCI: 00:02.0
+constrain_resources: PCI: 00:02.1
+constrain_resources: PCI: 00:1b.0
+constrain_resources: PCI: 00:1c.0
+constrain_resources: PCI: 01:00.0
+constrain_resources: PCI: 00:1c.1
+constrain_resources: PCI: 02:00.0
+constrain_resources: PCI: 00:1c.2
+constrain_resources: PCI: 00:1c.3
+constrain_resources: PCI: 00:1d.0
+constrain_resources: PCI: 00:1d.1
+constrain_resources: PCI: 00:1d.2
+constrain_resources: PCI: 00:1d.3
+constrain_resources: PCI: 00:1d.7
+constrain_resources: PCI: 00:1e.0
+constrain_resources: PCI: 05:00.0
+constrain_resources: PCI: 00:1f.0
+constrain_resources: PNP: 00ff.1
+constrain_resources: PNP: 00ff.2
+skipping PNP: 00ff.2@60 fixed resource, size=0!
+skipping PNP: 00ff.2@62 fixed resource, size=0!
+skipping PNP: 00ff.2@64 fixed resource, size=0!
+skipping PNP: 00ff.2@66 fixed resource, size=0!
+constrain_resources: PNP: 164e.2
+skipping PNP: 164e.2@29 fixed resource, size=0!
+skipping PNP: 164e.2@f0 fixed resource, size=0!
+constrain_resources: PNP: 164e.7
+constrain_resources: PNP: 164e.19
+constrain_resources: PNP: 002e.1
+constrain_resources: PNP: 002e.3
+constrain_resources: PNP: 002e.7
+constrain_resources: PCI: 00:1f.1
+constrain_resources: PCI: 00:1f.2
+constrain_resources: PCI: 00:1f.3
+constrain_resources: I2C: 01:69
+constrain_resources: I2C: 01:54
+constrain_resources: I2C: 01:55
+constrain_resources: I2C: 01:56
+constrain_resources: I2C: 01:57
+constrain_resources: I2C: 01:5c
+constrain_resources: I2C: 01:5d
+constrain_resources: I2C: 01:5e
+constrain_resources: I2C: 01:5f
+avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
+ lim->base 00001690 lim->limit 0000ffff
+avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
+ lim->base 00000000 lim->limit efffffff
+Setting resources...
+DOMAIN: 0000 allocate_resources_io: base:1690 size:30d8 align:12 gran:0 limit:ffff
+Assigned: PCI: 00:1e.0 1c * [0x2000 - 0x3fff] io
+Assigned: PCI: 00:1c.0 1c * [0x4000 - 0x4fff] io
+Assigned: PCI: 00:1d.0 20 * [0x5000 - 0x501f] io
+Assigned: PCI: 00:1d.1 20 * [0x5020 - 0x503f] io
+Assigned: PCI: 00:1d.2 20 * [0x5040 - 0x505f] io
+Assigned: PCI: 00:1d.3 20 * [0x5060 - 0x507f] io
+Assigned: PCI: 00:1f.1 20 * [0x5080 - 0x508f] io
+Assigned: PCI: 00:1f.2 20 * [0x5090 - 0x509f] io
+Assigned: PCI: 00:02.0 14 * [0x50a0 - 0x50a7] io
+Assigned: PCI: 00:1f.1 10 * [0x50a8 - 0x50af] io
+Assigned: PCI: 00:1f.1 18 * [0x50b0 - 0x50b7] io
+Assigned: PCI: 00:1f.2 10 * [0x50b8 - 0x50bf] io
+Assigned: PCI: 00:1f.2 18 * [0x50c0 - 0x50c7] io
+Assigned: PCI: 00:1f.1 14 * [0x50c8 - 0x50cb] io
+Assigned: PCI: 00:1f.1 1c * [0x50cc - 0x50cf] io
+Assigned: PCI: 00:1f.2 14 * [0x50d0 - 0x50d3] io
+Assigned: PCI: 00:1f.2 1c * [0x50d4 - 0x50d7] io
+DOMAIN: 0000 allocate_resources_io: next_base: 50d8 size: 30d8 align: 12 gran: 0 done
+PCI: 00:1c.0 allocate_resources_io: base:4000 size:1000 align:12 gran:12 limit:ffff
+Assigned: PCI: 01:00.0 18 * [0x4000 - 0x401f] io
+PCI: 00:1c.0 allocate_resources_io: next_base: 4020 size: 1000 align: 12 gran: 12 done
+PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.3 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.3 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1e.0 allocate_resources_io: base:2000 size:2000 align:12 gran:12 limit:ffff
+Assigned: PCI: 05:00.0 2c * [0x2000 - 0x2fff] io
+Assigned: PCI: 05:00.0 34 * [0x3000 - 0x3fff] io
+PCI: 00:1e.0 allocate_resources_io: next_base: 4000 size: 2000 align: 12 gran: 12 done
+DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:14444800 align:28 gran:0 limit:efffffff
+Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
+Assigned: PCI: 00:1e.0 20 * [0xe0000000 - 0xe20fffff] mem
+Assigned: PCI: 00:1e.0 24 * [0xe2100000 - 0xe40fffff] prefmem
+Assigned: PCI: 00:1c.0 20 * [0xe4100000 - 0xe41fffff] mem
+Assigned: PCI: 00:1c.1 20 * [0xe4200000 - 0xe42fffff] mem
+Assigned: PCI: 00:02.0 10 * [0xe4300000 - 0xe437ffff] mem
+Assigned: PCI: 00:02.1 10 * [0xe4380000 - 0xe43fffff] mem
+Assigned: PCI: 00:02.0 1c * [0xe4400000 - 0xe443ffff] mem
+Assigned: PCI: 00:1b.0 10 * [0xe4440000 - 0xe4443fff] mem
+Assigned: PCI: 00:1d.7 10 * [0xe4444000 - 0xe44443ff] mem
+Assigned: PCI: 00:1f.2 24 * [0xe4444400 - 0xe44447ff] mem
+DOMAIN: 0000 allocate_resources_mem: next_base: e4444800 size: 14444800 align: 28 gran: 0 done
+PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.0 allocate_resources_mem: base:e4100000 size:100000 align:20 gran:20 limit:efffffff
+Assigned: PCI: 01:00.0 10 * [0xe4100000 - 0xe411ffff] mem
+PCI: 00:1c.0 allocate_resources_mem: next_base: e4120000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.1 allocate_resources_mem: base:e4200000 size:100000 align:20 gran:20 limit:efffffff
+Assigned: PCI: 02:00.0 10 * [0xe4200000 - 0xe4200fff] mem
+PCI: 00:1c.1 allocate_resources_mem: next_base: e4201000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.2 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.2 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.2 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.2 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.3 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.3 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.3 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.3 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1e.0 allocate_resources_prefmem: base:e2100000 size:2000000 align:20 gran:20 limit:efffffff
+Assigned: PCI: 05:00.0 1c * [0xe2100000 - 0xe40fffff] prefmem
+PCI: 00:1e.0 allocate_resources_prefmem: next_base: e4100000 size: 2000000 align: 20 gran: 20 done
+PCI: 00:1e.0 allocate_resources_mem: base:e0000000 size:2100000 align:20 gran:20 limit:efffffff
+Assigned: PCI: 05:00.0 24 * [0xe0000000 - 0xe1ffffff] mem
+Assigned: PCI: 05:00.0 10 * [0xe2000000 - 0xe2000fff] mem
+PCI: 00:1e.0 allocate_resources_mem: next_base: e2001000 size: 2100000 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+pci_tolm: 0xd0000000
+Base of stolen memory: 0x4f800000
+Top of Low Used DRAM: 0x50000000
+IGD decoded, subtracting 8M UMA
+Available memory: 1302528K (1272M)
+Adding PCIe config bar
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig>
+PCI: 00:02.0 10 <- [0x00e4300000 - 0x00e437ffff] size 0x00080000 gran 0x13 mem
+PCI: 00:02.0 14 <- [0x00000050a0 - 0x00000050a7] size 0x00000008 gran 0x03 io
+PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
+PCI: 00:02.0 1c <- [0x00e4400000 - 0x00e443ffff] size 0x00040000 gran 0x12 mem
+PCI: 00:02.1 10 <- [0x00e4380000 - 0x00e43fffff] size 0x00080000 gran 0x13 mem
+PCI: 00:1b.0 10 <- [0x00e4440000 - 0x00e4443fff] size 0x00004000 gran 0x0e mem64
+PCI: 00:1c.0 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus 01 io
+PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:1c.0 20 <- [0x00e4100000 - 0x00e41fffff] size 0x00100000 gran 0x14 bus 01 mem
+PCI: 00:1c.0 assign_resources, bus 1 link: 0
+PCI: 01:00.0 10 <- [0x00e4100000 - 0x00e411ffff] size 0x00020000 gran 0x11 mem
+PCI: 01:00.0 18 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io
+PCI: 00:1c.0 assign_resources, bus 1 link: 0
+PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
+PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:1c.1 20 <- [0x00e4200000 - 0x00e42fffff] size 0x00100000 gran 0x14 bus 02 mem
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 02:00.0 10 <- [0x00e4200000 - 0x00e4200fff] size 0x00001000 gran 0x0c mem
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
+PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
+PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem
+PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
+PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 prefmem
+PCI: 00:1c.3 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 mem
+PCI: 00:1d.0 20 <- [0x0000005000 - 0x000000501f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.1 20 <- [0x0000005020 - 0x000000503f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.2 20 <- [0x0000005040 - 0x000000505f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.3 20 <- [0x0000005060 - 0x000000507f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.7 10 <- [0x00e4444000 - 0x00e44443ff] size 0x00000400 gran 0x0a mem
+PCI: 00:1e.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 05 io
+PCI: 00:1e.0 24 <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x14 bus 05 prefmem
+PCI: 00:1e.0 20 <- [0x00e0000000 - 0x00e20fffff] size 0x02100000 gran 0x14 bus 05 mem
+PCI: 00:1e.0 assign_resources, bus 5 link: 0
+PCI: 05:00.0 10 <- [0x00e2000000 - 0x00e2000fff] size 0x00001000 gran 0x0c mem
+PCI: 05:00.0 2c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x02 io
+PCI: 05:00.0 34 <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x02 io
+PCI: 05:00.0 1c <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x0c prefmem
+PCI: 05:00.0 24 <- [0x00e0000000 - 0x00e1ffffff] size 0x02000000 gran 0x0c mem
+PCI: 00:1e.0 assign_resources, bus 5 link: 0
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PNP: 00ff.1 missing set_resources
+PNP: 00ff.2 missing set_resources
+PNP: 164e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
+PNP: 164e.2 29 <- [0x00000000b0 - 0x00000000af] size 0x00000000 gran 0x00 irq
+PNP: 164e.2 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
+PNP: 164e.2 74 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 drq
+PNP: 164e.2 f0 <- [0x0000000082 - 0x0000000081] size 0x00000000 gran 0x00 irq
+ERROR: PNP: 164e.2 75 drq size: 0x0000000001 not assigned
+PNP: 164e.7 60 <- [0x0000001680 - 0x000000168f] size 0x00000010 gran 0x04 io
+ERROR: PNP: 164e.7 70 irq size: 0x0000000001 not assigned
+PNP: 164e.19 60 <- [0x000000164c - 0x000000164d] size 0x00000002 gran 0x01 io
+ERROR: PNP: 164e.19 70 irq size: 0x0000000001 not assigned
+PNP: 002e.1 60 <- [0x00000003bc - 0x00000007bb] size 0x00000400 gran 0x0a io
+PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
+ERROR: PNP: 002e.1 74 drq size: 0x0000000001 not assigned
+PNP: 002e.3 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 002e.3 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 002e.7 60 <- [0x0000001620 - 0x000000162f] size 0x00000010 gran 0x04 io
+ERROR: PNP: 002e.7 70 irq size: 0x0000000001 not assigned
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PCI: 00:1f.1 10 <- [0x00000050a8 - 0x00000050af] size 0x00000008 gran 0x03 io
+PCI: 00:1f.1 14 <- [0x00000050c8 - 0x00000050cb] size 0x00000004 gran 0x02 io
+PCI: 00:1f.1 18 <- [0x00000050b0 - 0x00000050b7] size 0x00000008 gran 0x03 io
+PCI: 00:1f.1 1c <- [0x00000050cc - 0x00000050cf] size 0x00000004 gran 0x02 io
+PCI: 00:1f.1 20 <- [0x0000005080 - 0x000000508f] size 0x00000010 gran 0x04 io
+PCI: 00:1f.2 10 <- [0x00000050b8 - 0x00000050bf] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 14 <- [0x00000050d0 - 0x00000050d3] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 18 <- [0x00000050c0 - 0x00000050c7] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 1c <- [0x00000050d4 - 0x00000050d7] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 20 <- [0x0000005090 - 0x000000509f] size 0x00000010 gran 0x04 io
+PCI: 00:1f.2 24 <- [0x00e4444400 - 0x00e44447ff] size 0x00000400 gran 0x0a mem
+PCI: 00:1f.3 assign_resources, bus 1 link: 0
+PCI: 00:1f.3 assign_resources, bus 1 link: 0
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+CBMEM region 4f6d0000-4f7fffff (cbmem_late_set_table)
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 1690 size 30d8 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base d0000000 size 14444800 align 28 gran 0 limit efffffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
+ DOMAIN: 0000 resource base c0000 size 4ff40000 align 0 gran 0 limit 0 flags e0004200 index 4
+ DOMAIN: 0000 resource base 4f800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5
+ DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
+ PCI: 00:01.0 child on link 0 PCI: 00:00.0
+ PCI: 00:00.0
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base e4300000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10
+ PCI: 00:02.0 resource base 50a0 size 8 align 3 gran 3 limit ffff flags 60000100 index 14
+ PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 18
+ PCI: 00:02.0 resource base e4400000 size 40000 align 18 gran 18 limit efffffff flags 60000200 index 1c
+ PCI: 00:02.1
+ PCI: 00:02.1 resource base e4380000 size 80000 align 19 gran 19 limit efffffff flags 60000200 index 10
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base e4440000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10
+ PCI: 00:1c.0 child on link 0 PCI: 01:00.0
+ PCI: 00:1c.0 resource base 4000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.0 resource base e4100000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base e4100000 size 20000 align 17 gran 17 limit efffffff flags 60000200 index 10
+ PCI: 01:00.0 resource base 4000 size 20 align 5 gran 5 limit ffff flags 60000100 index 18
+ PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.1 resource base e4200000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base e4200000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10
+ PCI: 00:1c.2
+ PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 00:1c.3
+ PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 5000 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 5020 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 5040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
+ PCI: 00:1d.3
+ PCI: 00:1d.3 resource base 5060 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base e4444000 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
+ PCI: 00:1e.0 child on link 0 PCI: 05:00.0
+ PCI: 00:1e.0 resource base 2000 size 2000 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1e.0 resource base e2100000 size 2000000 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1e.0 resource base e0000000 size 2100000 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 05:00.0
+ PCI: 05:00.0 resource base e2000000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10
+ PCI: 05:00.0 resource base 2000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 2c
+ PCI: 05:00.0 resource base 3000 size 1000 align 2 gran 2 limit ffff flags 60000100 index 34
+ PCI: 05:00.0 resource base e2100000 size 2000000 align 12 gran 12 limit efffffff flags 60001200 index 1c
+ PCI: 05:00.0 resource base e0000000 size 2000000 align 12 gran 12 limit efffffff flags 60000200 index 24
+ PCI: 00:1f.0 child on link 0 PNP: 00ff.1
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 00ff.1
+ PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
+ PNP: 00ff.2
+ PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+ PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
+ PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
+ PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
+ PNP: 164e.2
+ PNP: 164e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 164e.2 resource base b0 size 0 align 0 gran 0 limit 0 flags e0000400 index 29
+ PNP: 164e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 164e.2 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
+ PNP: 164e.2 resource base 82 size 0 align 0 gran 0 limit 0 flags e0000400 index f0
+ PNP: 164e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
+ PNP: 164e.3
+ PNP: 164e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 164e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 164e.7
+ PNP: 164e.7 resource base 1680 size 10 align 4 gran 4 limit ffff flags e0000100 index 60
+ PNP: 164e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 164e.19
+ PNP: 164e.19 resource base 164c size 2 align 1 gran 1 limit ffff flags e0000100 index 60
+ PNP: 164e.19 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.0
+ PNP: 002e.1
+ PNP: 002e.1 resource base 3bc size 400 align 10 gran 10 limit 7ff flags e0000100 index 60
+ PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+ PNP: 002e.2
+ PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.7
+ PNP: 002e.7 resource base 1620 size 10 align 4 gran 4 limit ffff flags e0000100 index 60
+ PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.a
+ PCI: 00:1f.1
+ PCI: 00:1f.1 resource base 50a8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
+ PCI: 00:1f.1 resource base 50c8 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
+ PCI: 00:1f.1 resource base 50b0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
+ PCI: 00:1f.1 resource base 50cc size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
+ PCI: 00:1f.1 resource base 5080 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 50b8 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
+ PCI: 00:1f.2 resource base 50d0 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
+ PCI: 00:1f.2 resource base 50c0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
+ PCI: 00:1f.2 resource base 50d4 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
+ PCI: 00:1f.2 resource base 5090 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
+ PCI: 00:1f.2 resource base e4444400 size 400 align 10 gran 10 limit efffffff flags 60000200 index 24
+ PCI: 00:1f.3 child on link 0 I2C: 01:69
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+ I2C: 01:69
+ I2C: 01:54
+ I2C: 01:55
+ I2C: 01:56
+ I2C: 01:57
+ I2C: 01:5c
+ I2C: 01:5d
+ I2C: 01:5e
+ I2C: 01:5f
+Done allocating resources.
+BS: BS_DEV_RESOURCES times (us): entry 0 run 162457 exit 0
+Enabling resources...
+PCI: 00:00.0 subsystem <- 17aa/2015
+PCI: 00:00.0 cmd <- 06
+PCI: 00:02.0 subsystem <- 17aa/201a
+PCI: 00:02.0 cmd <- 03
+PCI: 00:02.1 subsystem <- 17aa/201a
+PCI: 00:02.1 cmd <- 02
+PCI: 00:1b.0 subsystem <- 17aa/2010
+PCI: 00:1b.0 cmd <- 102
+PCI: 00:1c.0 bridge ctrl <- 0003
+PCI: 00:1c.0 subsystem <- 17aa/2001
+PCI: 00:1c.0 cmd <- 107
+PCI: 00:1c.1 bridge ctrl <- 0003
+PCI: 00:1c.1 subsystem <- 0000/0000
+PCI: 00:1c.1 cmd <- 106
+PCI: 00:1c.2 bridge ctrl <- 0003
+PCI: 00:1c.2 cmd <- 00
+PCI: 00:1c.3 bridge ctrl <- 0003
+PCI: 00:1c.3 cmd <- 00
+PCI: 00:1d.0 subsystem <- 17aa/200a
+PCI: 00:1d.0 cmd <- 01
+PCI: 00:1d.1 subsystem <- 17aa/200a
+PCI: 00:1d.1 cmd <- 01
+PCI: 00:1d.2 subsystem <- 17aa/200a
+PCI: 00:1d.2 cmd <- 01
+PCI: 00:1d.3 subsystem <- 17aa/200a
+PCI: 00:1d.3 cmd <- 01
+PCI: 00:1d.7 subsystem <- 17aa/200b
+PCI: 00:1d.7 cmd <- 102
+PCI: 00:1e.0 bridge ctrl <- 0003
+PCI: 00:1e.0 subsystem <- 0000/0000
+PCI: 00:1e.0 cmd <- 107 (NOT WRITTEN!)
+PCI: 00:1f.0 subsystem <- 17aa/2009
+PCI: 00:1f.0 cmd <- 107
+PCI: 00:1f.1 subsystem <- 17aa/200c
+PCI: 00:1f.1 cmd <- 01
+PCI: 00:1f.2 subsystem <- 17aa/200d
+PCI: 00:1f.2 cmd <- 03
+PCI: 00:1f.3 subsystem <- 17aa/200f
+PCI: 00:1f.3 cmd <- 101
+PCI: 01:00.0 cmd <- 03
+PCI: 02:00.0 cmd <- 02
+PCI: 05:00.0 bridge ctrl <- 0143
+PCI: 05:00.0 subsystem <- 17aa/2012
+PCI: 05:00.0 cmd <- 03
+done.
+BS: BS_DEV_ENABLE times (us): entry 0 run 6329 exit 0
+Initializing devices...
+Root Device init
+recv_ec_data: 0x00
+Root Device init 731 usecs
+CPU_CLUSTER: 0 init
+start_eip=0x00001000, code_size=0x00000031
+Initializing SMM handler... ... pmbase = 0x0500
+
+SMI_STS: MCSMI PM1
+PM1_STS: WAK PWRBTN
+GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
+ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
+TCO_STS: INTRD_DET
+ ... raise SMI#
+Initializing CPU #0
+CPU: vendor Intel device 6f6
+CPU: family 06, model 0f, stepping 06
+Enabling cache
+microcode: sig=0x6f6 pf=0x20 revision=0x0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+vimuser: built-in microcode revision 0x0 date=2010-10-01
+microcode: updated to revision 0xd1 date=2010-10-01
+CPU: Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz.
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
+0x00000000000c0000 - 0x000000004f800000 size 0x4f740000 type 6
+0x000000004f800000 - 0x00000000d0000000 size 0x80800000 type 0
+0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
+0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+MTRR: default type WB/UC MTRR counts: 7/4.
+MTRR: UC selected as default type.
+MTRR: 0 base 0x0000000000000000 mask 0x0000000fc0000000 type 6
+MTRR: 1 base 0x0000000040000000 mask 0x0000000ff0000000 type 6
+MTRR: 2 base 0x000000004f800000 mask 0x0000000fff800000 type 0
+MTRR: 3 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Setting up local apic... apic_id: 0x00 done.
+CPU: 0 2 siblings
+CPU: 0 has sibling 1
+CPU #0 initialized
+CPU1: stack_base 0014d000, stack_end 0014dff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++Sending STARTUP #2 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+Initializing CPU #1
+Waiting for 1 CPUS to stop
+CPU: vendor Intel device 6f6
+CPU: family 06, model 0f, stepping 06
+Enabling cache
+microcode: sig=0x6f6 pf=0x20 revision=0x0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+vimuser: built-in microcode revision 0x0 date=2010-10-01
+microcode: updated to revision 0xd1 date=2010-10-01
+CPU: Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz.
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+MTRR: 0 base 0x0000000000000000 mask 0x0000000fc0000000 type 6
+MTRR: 1 base 0x0000000040000000 mask 0x0000000ff0000000 type 6
+MTRR: 2 base 0x000000004f800000 mask 0x0000000fff800000 type 0
+MTRR: 3 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Setting up local apic... apic_id: 0x01 done.
+CPU: 1 2 siblings
+CPU #1 initialized
+CPU 1 going down...
+All AP CPUs stopped (3090 loops)
+CPU1: stack: 0014d000 - 0014e000, lowest used address 0014dc68, stack used: 920 bytes
+CPU_CLUSTER: 0 init 81155 usecs
+PCI: 00:00.0 init
+Normal boot.
+PCI: 00:00.0 init 140 usecs
+PCI: 00:02.0 init
+Initializing VGA without OPROM.
+GMADR=0xd0000008 GTTADR=0xe4400000
+i915lightup: graphics d0000000 mmio e4300000 addrport 50a0 physbase 4f820000
+EDID:
+00 ff ff ff ff ff ff 00 30 ae 22 40 00 00 00 00
+2f 10 01 03 80 1d 15 78 ea 6f 95 9c 54 4c 87 26
+21 50 54 21 08 00 81 80 01 01 01 01 01 01 01 01
+01 01 01 01 01 01 30 2a 78 20 51 1a 10 40 30 70
+13 00 1f d7 10 00 00 18 25 23 78 20 51 1a 10 40
+30 70 13 00 1f d7 10 00 00 18 00 00 00 0f 00 90
+43 32 90 43 28 0f 01 00 30 64 90 55 00 00 00 fe
+00 4c 54 44 31 34 31 45 4e 39 42 0a 20 20 00 33
+Extracted contents:
+header: 00 ff ff ff ff ff ff 00
+serial number: 30 ae 22 40 00 00 00 00 2f 10
+version: 01 03
+basic params: 80 1d 15 78 ea
+chroma info: 6f 95 9c 54 4c 87 26 21 50 54
+established: 21 08 00
+standard: 81 80 01 01 01 01 01 01 01 01 01 01 01 01 01 01
+descriptor 1: 30 2a 78 20 51 1a 10 40 30 70 13 00 1f d7 10 00 00 18
+descriptor 2: 25 23 78 20 51 1a 10 40 30 70 13 00 1f d7 10 00 00 18
+descriptor 3: 00 00 00 0f 00 90 43 32 90 43 28 0f 01 00 30 64 90 55
+descriptor 4: 00 00 00 fe 00 4c 54 44 31 34 31 45 4e 39 42 0a 20 20
+extensions: 00
+checksum: 33
+
+Manufacturer: LEN Model 4022 Serial Number 0
+Made week 47 of 2006
+EDID version: 1.3
+Digital display
+Maximum image size: 29 cm x 21 cm
+Gamma: 220%
+Check DPMS levels
+DPMS levels: Standby Suspend Off
+Supported color formats: RGB 4:4:4, YCrCb 4:2:2
+First detailed timing is preferred timing
+Established timings supported:
+ 640x480@60Hz
+ 800x600@60Hz
+ 1024x768@60Hz
+Standard timings supported:
+ 1280x1024@60Hz
+Detailed timings
+Hex of detail: 302a7820511a1040307013001fd710000018
+Did detailed timing
+Detailed mode (IN HEX): Clock 108000 KHz, 11f mm x d7 mm
+ 0578 05a8 0618 0698 hborder 0
+ 041a 041b 041e 042a vborder 0
+ -hsync -vsync
+Hex of detail: 25237820511a1040307013001fd710000018
+Detailed mode (IN HEX): Clock 108000 KHz, 11f mm x d7 mm
+ 0578 05a8 0618 0698 hborder 0
+ 041a 041b 041e 042a vborder 0
+ -hsync -vsync
+Hex of detail: 0000000f009043329043280f010030649055
+Manufacturer-specified data, tag 15
+Hex of detail: 000000fe004c5444313431454e39420a2020
+ASCII string: LTD141EN9B
+Checksum
+Checksum: 0x33 (valid)
+
+Unknown extension block
+
+EDID block does NOT conform to EDID 1.3!
+ Missing name descriptor
+ Missing monitor ranges
+EDID block does not conform at all!
+ Detailed blocks filled with garbage
+bringing up panel at resolution 1408 x 1050
+Borders 0 x 0
+Blank 288 x 16
+Sync 112 x 3
+Front porch 48 x 1
+Spread spectrum clock
+Dual channel
+Polarities 1, 1
+Pixel N=10, M1=23, M2=11, P1=2
+Pixel clock 108000 kHz
+waiting for panel powerup
+panel powered up
+gtt_setup is enabled.
+GTT PGETBL_CTL register: 0x4ffc0001
+GTT Enabled
+memset d0000000 to 0x00 for 5913600 bytes
+PCI: 00:02.0 init 37273 usecs
+PCI: 00:02.1 init
+PCI: 00:02.1 init 80 usecs
+PCI: 00:1b.0 init
+Azalia: codec type: Azalia
+Azalia: base = e4440000
+Azalia: codec_mask = 03
+Azalia: Initializing codec #1
+Azalia: codec viddid: 14f12bfa
+Azalia: No verb!
+Azalia: Initializing codec #0
+Azalia: codec viddid: 11d41981
+Azalia: No verb!
+PCI: 00:1b.0 init 4172 usecs
+PCI: 00:1c.0 init
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.0 init 230 usecs
+PCI: 00:1c.1 init
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.1 init 231 usecs
+PCI: 00:1c.2 init
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.2 init 230 usecs
+PCI: 00:1c.3 init
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.3 init 230 usecs
+PCI: 00:1d.0 init
+UHCI: Setting up controller.. done.
+PCI: 00:1d.0 init 239 usecs
+PCI: 00:1d.1 init
+UHCI: Setting up controller.. done.
+PCI: 00:1d.1 init 239 usecs
+PCI: 00:1d.2 init
+UHCI: Setting up controller.. done.
+PCI: 00:1d.2 init 239 usecs
+PCI: 00:1d.3 init
+UHCI: Setting up controller.. done.
+PCI: 00:1d.3 init 238 usecs
+PCI: 00:1d.7 init
+EHCI: Setting up controller.. done.
+PCI: 00:1d.7 init 244 usecs
+PCI: 00:1e.0 init
+PCI: 00:1e.0 init 91 usecs
+PCI: 00:1f.0 init
+i82801gx: lpc_init
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+IOAPIC: Dumping registers
+ reg 0x0000: 0x02000000
+ reg 0x0001: 0x00170020
+ reg 0x0002: 0x00170020
+Set power on after power failure.
+NMI sources disabled.
+rtc_failed = 0x0
+RTC Init
+i8259_configure_irq_trigger: current interrupts are 0x0
+i8259_configure_irq_trigger: try to set interrupts 0x200
+Disabling ACPI via APMC:
+done.
+Locking SMM.
+PCI: 00:1f.0 init 2749 usecs
+PCI: 00:1f.1 init
+i82801gx_ide: initializing... IDE0
+PCI: 00:1f.1 init 246 usecs
+PCI: 00:1f.2 init
+i82801gx_sata: initializing...
+SATA controller in AHCI mode.
+PCI: 00:1f.2 init 366 usecs
+PCI: 01:00.0 init
+PCI: 01:00.0 init 80 usecs
+PCI: 02:00.0 init
+PCI: 02:00.0 init 80 usecs
+PCI: 05:00.0 init
+Init of Texas Instruments PCI1x2x PCMCIA/CardBus controller
+PCI: 05:00.0 init 336 usecs
+PNP: 164e.2 init
+PNP: 164e.2 init 76 usecs
+PNP: 164e.7 init
+PNP: 164e.7 init 75 usecs
+PNP: 164e.19 init
+PNP: 164e.19 init 80 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:69 init
+I2C: 01:69 init 12780 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:54 init
+I2C: 01:54 init 172 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:55 init
+I2C: 01:55 init 172 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:56 init
+I2C: 01:56 init 172 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:57 init
+I2C: 01:57 init 171 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:5c init
+Locking EEPROM RFID
+init EEPROM done
+I2C: 01:5c init 21937 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:5d init
+I2C: 01:5d init 172 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:5e init
+I2C: 01:5e init 172 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:5f init
+I2C: 01:5f init 172 usecs
+Devices initialized
+Show all devs...After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 0
+PCI: 00:00.0: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:02.1: enabled 1
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.3: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 05:00.0: enabled 1
+PCI: 00:1f.0: enabled 1
+PNP: 00ff.1: enabled 1
+PNP: 00ff.2: enabled 1
+PNP: 164e.2: enabled 1
+PNP: 164e.3: enabled 0
+PNP: 164e.7: enabled 1
+PNP: 164e.19: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 1
+PNP: 002e.2: enabled 0
+PNP: 002e.3: enabled 1
+PNP: 002e.7: enabled 1
+PNP: 002e.a: enabled 0
+PCI: 00:1f.1: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+I2C: 01:69: enabled 1
+I2C: 01:54: enabled 1
+I2C: 01:55: enabled 1
+I2C: 01:56: enabled 1
+I2C: 01:57: enabled 1
+I2C: 01:5c: enabled 1
+I2C: 01:5d: enabled 1
+I2C: 01:5e: enabled 1
+I2C: 01:5f: enabled 1
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 1
+PCI: 01:00.0: enabled 1
+PCI: 02:00.0: enabled 1
+APIC: 01: enabled 1
+BS: BS_DEV_INIT times (us): entry 0 run 175093 exit 0
+CBMEM region 4f6d0000-4f7fffff (cbmem_check_toc)
+Adding CBMEM entry as no. 4
+Moving GDT to 4f6e0600...ok
+Finalize devices...
+Devices finalized
+BS: BS_POST_DEVICE times (us): entry 477 run 168 exit 0
+BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
+Copying Interrupt Routing Table to 0x000f0000... done.
+Adding CBMEM entry as no. 5
+Copying Interrupt Routing Table to 0x4f6e0800... done.
+PIRQ table: 272 bytes.
+Wrote the mp table end at: 000f0410 - 000f05b4
+Adding CBMEM entry as no. 6
+Wrote the mp table end at: 4f6e1810 - 4f6e19b4
+MP table: 436 bytes.
+Adding CBMEM entry as no. 7
+ACPI: Writing ACPI tables at 4f6e2800.
+ACPI: * HPET
+ACPI: added table 1/32, length now 40
+ACPI: * MADT
+ACPI: added table 2/32, length now 44
+ACPI: * MCFG
+ACPI: added table 3/32, length now 48
+ACPI: * FACS
+ACPI: Patching up global NVS in DSDT at offset 0x0263 -> 0x4f6e5ca0
+ACPI: * DSDT @ 4f6e2b40 Length 315e
+ACPI: * FADT
+ACPI: added table 4/32, length now 52
+ACPI: * SSDT
+Found 1 CPU(s) with 2 core(s) each.
+clocks between 1000 and 2000 MHz.
+adding 4 P-States between busratio 6 and c, incl. P0
+PSS: 2000MHz power 35000 control 0xc27 status 0xc27
+PSS: 1666MHz power 31666 control 0xa1f status 0xa1f
+PSS: 1333MHz power 28333 control 0x819 status 0x819
+PSS: 1000MHz power 25000 control 0x613 status 0x613
+clocks between 1000 and 2000 MHz.
+adding 4 P-States between busratio 6 and c, incl. P0
+PSS: 2000MHz power 35000 control 0xc27 status 0xc27
+PSS: 1666MHz power 31666 control 0xa1f status 0xa1f
+PSS: 1333MHz power 28333 control 0x819 status 0x819
+PSS: 1000MHz power 25000 control 0x613 status 0x613
+ACPI: added table 5/32, length now 56
+current = 4f6e61e0
+ACPI: done.
+Laptop handling...
+ACPI tables: 14816 bytes.
+Adding CBMEM entry as no. 8
+smbios_write_tables: 4f6edc00
+Root Device (Lenovo ThinkPad T60 / T60p)
+recv_ec_data: 0x37
+recv_ec_data: 0x39
+recv_ec_data: 0x48
+recv_ec_data: 0x54
+recv_ec_data: 0x35
+recv_ec_data: 0x30
+recv_ec_data: 0x57
+recv_ec_data: 0x57
+recv_ec_data: 0x04
+recv_ec_data: 0x03
+CPU_CLUSTER: 0 (Intel i945 Northbridge)
+APIC: 00 (Socket mFCPGA478 CPU)
+DOMAIN: 0000 (Intel i945 Northbridge)
+PCI: 00:00.0 (Intel i945 Northbridge)
+PCI: 00:01.0 (Intel i945 Northbridge)
+PCI: 00:00.0 (Intel i945 Northbridge)
+PCI: 00:02.0 (Intel i945 Northbridge)
+PCI: 00:02.1 (Intel i945 Northbridge)
+PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.7 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1e.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 05:00.0 (TI PCI1x2x Cardbus controller)
+PCI: 00:1f.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7)
+PNP: 00ff.2 (Lenovo H8 EC)
+PNP: 164e.2 (NSC PC87382 Docking LPC Switch)
+PNP: 164e.3 (NSC PC87382 Docking LPC Switch)
+PNP: 164e.7 (NSC PC87382 Docking LPC Switch)
+PNP: 164e.19 (NSC PC87382 Docking LPC Switch)
+PNP: 002e.0 (NSC PC87384 Super I/O)
+PNP: 002e.1 (NSC PC87384 Super I/O)
+PNP: 002e.2 (NSC PC87384 Super I/O)
+PNP: 002e.3 (NSC PC87384 Super I/O)
+PNP: 002e.7 (NSC PC87384 Super I/O)
+PNP: 002e.a (NSC PC87384 Super I/O)
+PCI: 00:1f.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+I2C: 01:69 (ICS 954309 Clock generator)
+I2C: 01:54 (AT24RF08C)
+I2C: 01:55 (AT24RF08C)
+I2C: 01:56 (AT24RF08C)
+I2C: 01:57 (AT24RF08C)
+I2C: 01:5c (AT24RF08C)
+I2C: 01:5d (AT24RF08C)
+I2C: 01:5e (AT24RF08C)
+I2C: 01:5f (AT24RF08C)
+PCI: 00:1c.2 (unknown)
+PCI: 00:1c.3 (unknown)
+PCI: 01:00.0 (unknown)
+PCI: 02:00.0 (unknown)
+APIC: 01 (unknown)
+SMBIOS tables: 425 bytes.
+Adding CBMEM entry as no. 9
+Adding CBMEM entry as no. 10
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum cc5f
+Table forward entry ends at 0x00000528.
+... aligned to 0x00001000
+Writing coreboot table at 0x4f7ee400
+rom_table_end = 0x4f7ee400
+... aligned to 0x4f7f0000
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000c0000-000000004f6cffff: RAM
+ 3. 000000004f6d0000-000000004f7fffff: CONFIGURATION TABLES
+ 4. 000000004f800000-000000004fffffff: RESERVED
+ 5. 00000000f0000000-00000000f3ffffff: RESERVED
+Wrote coreboot table at: 4f7ee400, 0x1b0 bytes, checksum 9ec5
+coreboot table: 456 bytes.
+FREE SPACE 0. 4f7f6400 00009c00
+CAR GLOBALS 1. 4f6d0200 00000200
+CONSOLE 2. 4f6d0400 00010000
+ROMSTAGE 3. 4f6e0400 00000200
+GDT 4. 4f6e0600 00000200
+IRQ TABLE 5. 4f6e0800 00001000
+SMP TABLE 6. 4f6e1800 00001000
+ACPI 7. 4f6e2800 0000b400
+SMBIOS 8. 4f6edc00 00000800
+ACPI RESUME 9. 4f6ee400 00100000
+COREBOOT 10. 4f7ee400 00008000
+BS: BS_WRITE_TABLES times (us): entry 0 run 140264 exit 0
+CBFS: located payload @ ffe3e1f8, 329522 bytes.
+Loading segment from rom address 0xffe3e1f8
+ code (compression=1)
+ New segment dstaddr 0x8200 memsize 0x17e40 srcaddr 0xffe3e24c filesize 0x83ec
+ (cleaned up) New segment addr 0x8200 size 0x17e40 offset 0xffe3e24c filesize 0x83ec
+Loading segment from rom address 0xffe3e214
+ code (compression=1)
+ New segment dstaddr 0x100000 memsize 0x10316c srcaddr 0xffe46638 filesize 0x482f2
+ (cleaned up) New segment addr 0x100000 size 0x10316c offset 0xffe46638 filesize 0x482f2
+Loading segment from rom address 0xffe3e230
+ Entry Point 0x00008200
+Bounce Buffer at 4f579000, 1401252 bytes
+Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000017e40 filesz: 0x00000000000083ec
+lb: [0x0000000000100000, 0x0000000000153038)
+Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000017e40 filesz: 0x00000000000083ec
+using LZMA
+[ 0x00008200, 0001870b, 0x00020040) <- ffe3e24c
+Clearing Segment: addr: 0x000000000001870b memsz: 0x0000000000007935
+dest 00008200, end 00020040, bouncebuffer 4f579000
+Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000010316c filesz: 0x00000000000482f2
+lb: [0x0000000000100000, 0x0000000000153038)
+segment: [0x0000000000100000, 0x00000000001482f2, 0x000000000020316c)
+ bounce: [0x000000004f579000, 0x000000004f5c12f2, 0x000000004f67c16c)
+Post relocation: addr: 0x000000004f579000 memsz: 0x000000000010316c filesz: 0x00000000000482f2
+using LZMA
+[ 0x4f579000, 4f67c16c, 0x4f67c16c) <- ffe46
+432 bytes lost
diff --git a/docs/t7200q/kernel b/docs/t7200q/kernel new file mode 100644 index 00000000..ab2dfac2 --- /dev/null +++ b/docs/t7200q/kernel @@ -0,0 +1,1016 @@ +Jan 1 01:00:21 X60Trisquel kernel: imklog 5.8.6, log source = /proc/kmsg started.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Initializing cgroup subsys cpuset
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Initializing cgroup subsys cpu
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Linux version 3.2.0-64-generic (root@devel.trisquel.info) (gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5) ) #1trisquel1 SMP Fri Jun 6 11:49:52 UTC 2014 (Ubuntu 3.2.0-64.97+6.0.1trisquel1-generic 3.2.59-gnu)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] KERNEL supported cpus:
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Intel GenuineIntel
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] AMD AuthenticAMD
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] NSC Geode by NSC
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Cyrix CyrixInstead
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Centaur CentaurHauls
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Transmeta GenuineTMx86
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Transmeta TransmetaCPU
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] UMC UMC UMC UMC
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] BIOS-provided physical RAM map:
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] BIOS-e820: 0000000000000000 - 0000000000001000 type 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] BIOS-e820: 0000000000001000 - 00000000000a0000 (usable)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] BIOS-e820: 00000000000c0000 - 000000004f6e0000 (usable)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] BIOS-e820: 000000004f6e0000 - 000000004f800000 type 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] BIOS-e820: 000000004f800000 - 0000000050000000 (reserved)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] BIOS-e820: 00000000f0000000 - 00000000f4000000 (reserved)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Notice: NX (Execute Disable) protection cannot be enabled in hardware: non-PAE kernel!
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] NX (Execute Disable) protection: approximated by x86 segment limits
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] SMBIOS 2.7 present.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] DMI: LENOVO 195143U, BIOS t60 05/18/2014
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] e820 update range: 0000000000000000 - 0000000000010000 (usable) ==> (reserved)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] e820 remove range: 00000000000a0000 - 0000000000100000 (usable)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] last_pfn = 0x4f6e0 max_arch_pfn = 0x100000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] MTRR default type: uncachable
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] MTRR fixed ranges enabled:
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 00000-9FFFF write-back
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] A0000-BFFFF uncachable
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] C0000-FFFFF write-back
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] MTRR variable ranges enabled:
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 0 base 000000000 mask FC0000000 write-back
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 1 base 040000000 mask FF0000000 write-back
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 2 base 04F800000 mask FFF800000 uncachable
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 3 base 0D0000000 mask FF0000000 write-combining
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 4 disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 5 disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 6 disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 7 disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] found SMP MP-table at [c00f0400] f0400
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] initial memory mapped : 0 - 01c00000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Base memory trampoline at [c009b000] 9b000 size 16384
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] init_memory_mapping: 0000000000000000-00000000377fe000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 0000000000 - 0000400000 page 4k
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 0000400000 - 0037400000 page 2M
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 0037400000 - 00377fe000 page 4k
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] kernel direct mapping tables up to 377fe000 @ 1bf8000-1c00000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] RAMDISK: 35c14000 - 36e02000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: RSDP 000f0800 00024 (v02 CORE )
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: XSDT 4f6e28e0 0004C (v01 CORE COREBOOT 00000000 CORE 00000000)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: HPET 4f6e2a10 00038 (v01 CORE COREBOOT 00000000 CORE 00000000)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: APIC 4f6e2a50 00068 (v01 CORE COREBOOT 00000000 CORE 00000000)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: MCFG 4f6e2ac0 0003C (v01 CORE COREBOOT 00000000 CORE 00000000)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: FACP 4f6e5d70 000F4 (v03 CORE COREBOOT 00000000 CORE 00000000)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: DSDT 4f6e2b40 03123 (v03 COREv4 COREBOOT 20090419 INTL 20140114)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: FACS 4f6e2b00 00040
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: SSDT 4f6e5e70 00340 (v02 CORE COREBOOT 0000002A CORE 0000002A)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: Local APIC address 0xfee00000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 382MB HIGHMEM available.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 887MB LOWMEM available.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] mapped low ram: 0 - 377fe000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] low ram: 0 - 377fe000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Zone PFN ranges:
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] DMA 0x00000010 -> 0x00001000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Normal 0x00001000 -> 0x000377fe
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] HighMem 0x000377fe -> 0x0004f6e0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Movable zone start PFN for each node
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] early_node_map[2] active PFN ranges
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 0: 0x00000010 -> 0x000000a0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] 0: 0x00000100 -> 0x0004f6e0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] On node 0 totalpages: 325232
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] free_area_init_node: node 0, pgdat c1819ec0, node_mem_map f6e0d200
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] DMA zone: 32 pages used for memmap
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] DMA zone: 0 pages reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] DMA zone: 3952 pages, LIFO batch:0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Normal zone: 1744 pages used for memmap
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Normal zone: 221486 pages, LIFO batch:31
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] HighMem zone: 766 pages used for memmap
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] HighMem zone: 97252 pages, LIFO batch:31
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Using APIC driver default
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: PM-Timer IO Port: 0x508
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: Local APIC address 0xfee00000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1])
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: IRQ0 used by override.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: IRQ2 used by override.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: IRQ9 used by override.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Using ACPI (MADT) for SMP configuration information
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] SMP: Allowing 2 CPUs, 0 hotplug CPUs
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] nr_irqs_gsi: 40
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] PM: Registered nosave memory: 0000000000001000 - 0000000000010000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] PM: Registered nosave memory: 00000000000a0000 - 0000000000100000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Allocating PCI resources starting at 50000000 (gap: 50000000:a0000000)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Booting paravirtualized kernel on bare hardware
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] setup_percpu: NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:2 nr_node_ids:1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] PERCPU: Embedded 13 pages/cpu @f5bfa000 s31616 r0 d21632 u53248
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] pcpu-alloc: s31616 r0 d21632 u53248 alloc=13*4096
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] pcpu-alloc: [0] 0 [0] 1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 322690
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Kernel command line: BOOT_IMAGE=(ahci0,1)/vmlinuz root=/dev/sda1 processor.max_cstate=2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Initializing CPU#0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] allocated 5205248 bytes of page_cgroup
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Initializing HighMem for node 0 (000377fe:0004f6e0)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Memory: 1256388k/1301376k available (5647k kernel code, 44540k reserved, 2697k data, 716k init, 392072k highmem)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] virtual kernel memory layout:
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] fixmap : 0xfff16000 - 0xfffff000 ( 932 kB)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] pkmap : 0xff800000 - 0xffc00000 (4096 kB)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] vmalloc : 0xf7ffe000 - 0xff7fe000 ( 120 MB)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] lowmem : 0xc0000000 - 0xf77fe000 ( 887 MB)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] .init : 0xc1827000 - 0xc18da000 ( 716 kB)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] .data : 0xc1583f04 - 0xc1826600 (2697 kB)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] .text : 0xc1000000 - 0xc1583f04 (5647 kB)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Checking if this processor honours the WP bit even in supervisor mode...Ok.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] SLUB: Genslabs=15, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Hierarchical RCU implementation.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] RCU dyntick-idle grace-period acceleration is enabled.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] NR_IRQS:2304 nr_irqs:512 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] CPU 0 irqstacks, hard=f5008000 soft=f500a000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Extended CMOS year: 12400
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] WARNING: Persistent clock returned invalid value!
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Check your CMOS/BIOS settings.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Console: colour dummy device 80x25
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] console [tty0] enabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] hpet clockevent registered
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Fast TSC calibration using PIT
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.000000] Detected 1995.017 MHz processor.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004002] Calibrating delay loop (skipped), value calculated using timer frequency.. 3990.03 BogoMIPS (lpj=7980068)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004012] pid_max: default: 32768 minimum: 301
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004038] Security Framework initialized
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004057] AppArmor: AppArmor initialized
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004061] Yama: becoming mindful.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004122] Mount-cache hash table entries: 512
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004262] Initializing cgroup subsys cpuacct
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004271] Initializing cgroup subsys memory
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004282] Initializing cgroup subsys devices
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004286] Initializing cgroup subsys freezer
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004291] Initializing cgroup subsys blkio
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004300] Initializing cgroup subsys perf_event
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004330] CPU: Physical Processor ID: 0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004334] CPU: Processor Core ID: 0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004340] mce: CPU supports 6 MCE banks
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004350] CPU0: Thermal monitoring enabled (TM2)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.004356] using mwait in idle threads.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.006568] ACPI: Core revision 20110623
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.011507] ftrace: allocating 25532 entries in 50 pages
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.012053] Enabling APIC mode: Flat. Using 1 I/O APICs
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.012516] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.055668] CPU0: Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz stepping 06
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] Performance Events: PEBS fmt0-, Core2 events, Intel PMU driver.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] PEBS disabled due to CPU errata.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] ... version: 2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] ... bit width: 40
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] ... generic registers: 2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] ... value mask: 000000ffffffffff
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] ... max period: 000000007fffffff
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] ... fixed-purpose events: 3
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] ... event mask: 0000000700000003
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] NMI watchdog enabled, takes one hw-pmu counter.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] CPU 1 irqstacks, hard=f50cc000 soft=f50ce000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] Booting Node 0, Processors #1 Ok.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.056003] smpboot cpu 1: start_ip = 9b000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.008000] Initializing CPU#1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.144046] NMI watchdog enabled, takes one hw-pmu counter.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.144100] Brought up 2 CPUs
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.144105] Total of 2 processors activated (7979.94 BogoMIPS).
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.146309] devtmpfs: initialized
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.146309] EVM: security.selinux
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.146309] EVM: security.SMACK64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.146309] EVM: security.capability
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.146309] print_constraints: dummy:
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.146309] RTC time: 0:48:49, date: 141/25/41
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.146309] NET: Registered protocol family 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.148069] Trying to unpack rootfs image as initramfs...
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.148133] EISA bus registered
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.148171] ACPI: bus type pci registered
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.148242] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf0000000-0xf3ffffff] (base 0xf0000000)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.148251] PCI: MMCONFIG at [mem 0xf0000000-0xf3ffffff] reserved in E820
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.148256] PCI: Using MMCONFIG for extended config space
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.148260] PCI: Using configuration type 1 for base access
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.149700] bio: create slab <bio-0> at 0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.149803] ACPI: Added _OSI(Module Device)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.149809] ACPI: Added _OSI(Processor Device)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.149814] ACPI: Added _OSI(3.0 _SCP Extensions)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.149818] ACPI: Added _OSI(Processor Aggregator Device)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.151084] ACPI: EC: Look up EC in DSDT
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.153408] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.153818] ACPI: Interpreter enabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.153828] ACPI: (supports S0 S3 S4 S5)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.153855] ACPI: Using IOAPIC for interrupt routing
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.158603] ACPI: EC: GPE = 0x1c, I/O: command/status = 0x66, data = 0x62
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160296] ACPI: ACPI Dock Station Driver: 1 docks/bays found
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160303] HEST: Table not found.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160309] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160419] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160572] pci_root PNP0A08:00: host bridge window [io 0x0000-0x0cf7]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160579] pci_root PNP0A08:00: host bridge window [io 0x0d00-0xffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160585] pci_root PNP0A08:00: host bridge window [mem 0x000a0000-0x000bffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160591] pci_root PNP0A08:00: host bridge window [mem 0x000c0000-0x000c3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160598] pci_root PNP0A08:00: host bridge window [mem 0x000c4000-0x000c7fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160604] pci_root PNP0A08:00: host bridge window [mem 0x000c8000-0x000cbfff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160610] pci_root PNP0A08:00: host bridge window [mem 0x000cc000-0x000cffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160617] pci_root PNP0A08:00: host bridge window [mem 0x000d0000-0x000d3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160623] pci_root PNP0A08:00: host bridge window [mem 0x000d4000-0x000d7fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160629] pci_root PNP0A08:00: host bridge window [mem 0x000d8000-0x000dbfff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160636] pci_root PNP0A08:00: host bridge window [mem 0x000dc000-0x000dffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160642] pci_root PNP0A08:00: host bridge window [mem 0x000e0000-0x000e3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160648] pci_root PNP0A08:00: host bridge window [mem 0x000e4000-0x000e7fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160655] pci_root PNP0A08:00: host bridge window [mem 0x000e8000-0x000ebfff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160661] pci_root PNP0A08:00: host bridge window [mem 0x000ec000-0x000effff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160667] pci_root PNP0A08:00: host bridge window [mem 0x000f0000-0x000fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160674] pci_root PNP0A08:00: host bridge window [mem 0x50000000-0xfebfffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160680] pci_root PNP0A08:00: host bridge window [mem 0xfed40000-0xfed44fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160704] pci 0000:00:00.0: [8086:27a0] type 0 class 0x000600
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160765] pci 0000:00:02.0: [8086:27a2] type 0 class 0x000300
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160779] pci 0000:00:02.0: reg 10: [mem 0xe4300000-0xe437ffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160787] pci 0000:00:02.0: reg 14: [io 0x50a0-0x50a7]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160794] pci 0000:00:02.0: reg 18: [mem 0xd0000000-0xdfffffff pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160802] pci 0000:00:02.0: reg 1c: [mem 0xe4400000-0xe443ffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160853] pci 0000:00:02.1: [8086:27a6] type 0 class 0x000380
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160864] pci 0000:00:02.1: reg 10: [mem 0xe4380000-0xe43fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.160982] pci 0000:00:1b.0: [8086:27d8] type 0 class 0x000403
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161007] pci 0000:00:1b.0: reg 10: [mem 0xe4440000-0xe4443fff 64bit]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161120] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161126] pci 0000:00:1b.0: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161157] pci 0000:00:1c.0: [8086:27d0] type 1 class 0x000604
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161274] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161280] pci 0000:00:1c.0: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161314] pci 0000:00:1c.1: [8086:27d2] type 1 class 0x000604
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161431] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161437] pci 0000:00:1c.1: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161471] pci 0000:00:1c.2: [8086:27d4] type 1 class 0x000604
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161586] pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161591] pci 0000:00:1c.2: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161625] pci 0000:00:1c.3: [8086:27d6] type 1 class 0x000604
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161741] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161747] pci 0000:00:1c.3: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161783] pci 0000:00:1d.0: [8086:27c8] type 0 class 0x000c03
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161867] pci 0000:00:1d.0: reg 20: [io 0x5000-0x501f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.161926] pci 0000:00:1d.1: [8086:27c9] type 0 class 0x000c03
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162006] pci 0000:00:1d.1: reg 20: [io 0x5020-0x503f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162053] pci 0000:00:1d.2: [8086:27ca] type 0 class 0x000c03
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162113] pci 0000:00:1d.2: reg 20: [io 0x5040-0x505f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162158] pci 0000:00:1d.3: [8086:27cb] type 0 class 0x000c03
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162218] pci 0000:00:1d.3: reg 20: [io 0x5060-0x507f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162275] pci 0000:00:1d.7: [8086:27cc] type 0 class 0x000c03
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162301] pci 0000:00:1d.7: reg 10: [mem 0xe4444000-0xe44443ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162416] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162423] pci 0000:00:1d.7: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162448] pci 0000:00:1e.0: [8086:2448] type 1 class 0x000604
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162553] pci 0000:00:1f.0: [8086:27b9] type 0 class 0x000601
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162677] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 1600 (mask 007f)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162686] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 2 PIO at 15e0 (mask 000f)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162694] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 3 PIO at 1680 (mask 001f)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162760] pci 0000:00:1f.1: [8086:27df] type 0 class 0x000101
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162779] pci 0000:00:1f.1: reg 10: [io 0x50a8-0x50af]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162792] pci 0000:00:1f.1: reg 14: [io 0x50c8-0x50cb]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162805] pci 0000:00:1f.1: reg 18: [io 0x50b0-0x50b7]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162818] pci 0000:00:1f.1: reg 1c: [io 0x50cc-0x50cf]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162832] pci 0000:00:1f.1: reg 20: [io 0x5080-0x508f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162887] pci 0000:00:1f.2: [8086:27c5] type 0 class 0x000106
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162912] pci 0000:00:1f.2: reg 10: [io 0x50b8-0x50bf]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162925] pci 0000:00:1f.2: reg 14: [io 0x50d0-0x50d3]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162939] pci 0000:00:1f.2: reg 18: [io 0x50c0-0x50c7]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162952] pci 0000:00:1f.2: reg 1c: [io 0x50d4-0x50d7]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162965] pci 0000:00:1f.2: reg 20: [io 0x5090-0x509f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.162979] pci 0000:00:1f.2: reg 24: [mem 0xe4444400-0xe44447ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163038] pci 0000:00:1f.2: PME# supported from D3hot
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163044] pci 0000:00:1f.2: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163066] pci 0000:00:1f.3: [8086:27da] type 0 class 0x000c05
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163145] pci 0000:00:1f.3: reg 20: [io 0x0400-0x041f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163296] pci 0000:01:00.0: [8086:109a] type 0 class 0x000200
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163328] pci 0000:01:00.0: reg 10: [mem 0xe4100000-0xe411ffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163372] pci 0000:01:00.0: reg 18: [io 0x4000-0x401f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163563] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163572] pci 0000:01:00.0: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163607] pci 0000:01:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163633] pci 0000:00:1c.0: PCI bridge to [bus 01-01]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163641] pci 0000:00:1c.0: bridge window [io 0x4000-0x4fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163646] pci 0000:00:1c.0: bridge window [mem 0xe4100000-0xe41fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163782] pci 0000:02:00.0: [8086:4227] type 0 class 0x000280
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.163837] pci 0000:02:00.0: reg 10: [mem 0xe4200000-0xe4200fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164271] pci 0000:02:00.0: PME# supported from D0 D3hot
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164284] pci 0000:02:00.0: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164347] pci 0000:02:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164381] pci 0000:00:1c.1: PCI bridge to [bus 02-02]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164391] pci 0000:00:1c.1: bridge window [mem 0xe4200000-0xe42fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164465] pci 0000:00:1c.2: PCI bridge to [bus 03-03]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164544] pci 0000:00:1c.3: PCI bridge to [bus 04-04]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164607] pci 0000:05:00.0: [104c:ac56] type 2 class 0x000607
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164634] pci 0000:05:00.0: reg 10: [mem 0xe2000000-0xe2000fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164681] pci 0000:05:00.0: supports D1 D2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164684] pci 0000:05:00.0: PME# supported from D0 D1 D2 D3hot D3cold
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164690] pci 0000:05:00.0: PME# disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164760] pci 0000:00:1e.0: PCI bridge to [bus 05-05] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164769] pci 0000:00:1e.0: bridge window [io 0x2000-0x3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164774] pci 0000:00:1e.0: bridge window [mem 0xe0000000-0xe20fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164783] pci 0000:00:1e.0: bridge window [mem 0xe2100000-0xe40fffff 64bit pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164786] pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164789] pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164792] pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164795] pci 0000:00:1e.0: bridge window [mem 0x000c0000-0x000c3fff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164798] pci 0000:00:1e.0: bridge window [mem 0x000c4000-0x000c7fff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164801] pci 0000:00:1e.0: bridge window [mem 0x000c8000-0x000cbfff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164804] pci 0000:00:1e.0: bridge window [mem 0x000cc000-0x000cffff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164807] pci 0000:00:1e.0: bridge window [mem 0x000d0000-0x000d3fff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164810] pci 0000:00:1e.0: bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164813] pci 0000:00:1e.0: bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164816] pci 0000:00:1e.0: bridge window [mem 0x000dc000-0x000dffff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164819] pci 0000:00:1e.0: bridge window [mem 0x000e0000-0x000e3fff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164822] pci 0000:00:1e.0: bridge window [mem 0x000e4000-0x000e7fff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164825] pci 0000:00:1e.0: bridge window [mem 0x000e8000-0x000ebfff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164828] pci 0000:00:1e.0: bridge window [mem 0x000ec000-0x000effff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164831] pci 0000:00:1e.0: bridge window [mem 0x000f0000-0x000fffff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164834] pci 0000:00:1e.0: bridge window [mem 0x50000000-0xfebfffff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164837] pci 0000:00:1e.0: bridge window [mem 0xfed40000-0xfed44fff] (subtractive decode)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164841] pci 0000:05:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164897] pci_bus 0000:06: [bus 06-09] partially hidden behind transparent bridge 0000:05 [bus 05-05]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164938] pci_bus 0000:00: on NUMA node 0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.164943] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.165104] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP01._PRT]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.165158] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP02._PRT]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.165209] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP03._PRT]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.165261] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.RP04._PRT]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.165337] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PCIB._PRT]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.165496] pci0000:00: Requesting ACPI _OSC control (0x1d)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.165557] pci0000:00: ACPI _OSC control (0x1d) granted
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.171939] ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 5 6 7 10 12 14 15) *11
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172017] ACPI: PCI Interrupt Link [LNKB] (IRQs 1 3 4 5 6 7 *11 12 14 15)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172082] ACPI: PCI Interrupt Link [LNKC] (IRQs 1 3 4 5 6 7 10 12 14 15) *11
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172146] ACPI: PCI Interrupt Link [LNKD] (IRQs 1 3 4 5 6 7 *11 12 14 15)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172208] ACPI: PCI Interrupt Link [LNKE] (IRQs 1 3 4 5 6 7 10 12 14 15) *11
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172271] ACPI: PCI Interrupt Link [LNKF] (IRQs 1 3 4 5 6 7 *11 12 14 15)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172334] ACPI: PCI Interrupt Link [LNKG] (IRQs 1 3 4 5 6 7 10 12 14 15) *11
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172398] ACPI: PCI Interrupt Link [LNKH] (IRQs 1 3 4 5 6 7 *11 12 14 15)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172528] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172549] vgaarb: loaded
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172552] vgaarb: bridge control possible 0000:00:02.0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172695] i2c-core: driver [aat2870] using legacy suspend method
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172700] i2c-core: driver [aat2870] using legacy resume method
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.172808] SCSI subsystem initialized
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.176123] libata version 3.00 loaded.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.176123] usbcore: registered new interface driver usbfs
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.176123] usbcore: registered new interface driver hub
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.176139] usbcore: registered new device driver usb
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.176258] PCI: Using ACPI for IRQ routing
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.178840] PCI: pci_cache_line_size set to 64 bytes
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.178967] reserve RAM buffer: 000000004f6e0000 - 000000004fffffff
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.179098] NetLabel: Initializing
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.179103] NetLabel: domain hash size = 128
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.179106] NetLabel: protocols = UNLABELED CIPSOv4
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.179121] NetLabel: unlabeled traffic allowed by default
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.179198] HPET: 3 timers in total, 0 timers will be used for per-cpu timer
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.179209] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.179218] hpet0: 3 comparators, 64-bit 14.318180 MHz counter
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.188071] Switching to clocksource hpet
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.197850] AppArmor: AppArmor Filesystem Enabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.197891] pnp: PnP ACPI init
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.197915] ACPI: bus type pnp registered
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198032] pnp 00:00: [bus 00-ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198036] pnp 00:00: [io 0x0000-0x0cf7 window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198039] pnp 00:00: [io 0x0cf8-0x0cff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198042] pnp 00:00: [io 0x0d00-0xffff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198045] pnp 00:00: [mem 0x000a0000-0x000bffff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198047] pnp 00:00: [mem 0x000c0000-0x000c3fff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198050] pnp 00:00: [mem 0x000c4000-0x000c7fff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198053] pnp 00:00: [mem 0x000c8000-0x000cbfff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198056] pnp 00:00: [mem 0x000cc000-0x000cffff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198059] pnp 00:00: [mem 0x000d0000-0x000d3fff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198061] pnp 00:00: [mem 0x000d4000-0x000d7fff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198064] pnp 00:00: [mem 0x000d8000-0x000dbfff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198067] pnp 00:00: [mem 0x000dc000-0x000dffff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198069] pnp 00:00: [mem 0x000e0000-0x000e3fff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198072] pnp 00:00: [mem 0x000e4000-0x000e7fff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198075] pnp 00:00: [mem 0x000e8000-0x000ebfff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198078] pnp 00:00: [mem 0x000ec000-0x000effff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198081] pnp 00:00: [mem 0x000f0000-0x000fffff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198083] pnp 00:00: [mem 0x50000000-0xfebfffff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198086] pnp 00:00: [mem 0xfed40000-0xfed44fff window]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198171] pnp 00:00: Plug and Play ACPI device, IDs PNP0a08 PNP0a03 (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198195] pnp 00:01: [mem 0xfed1c000-0xfed1ffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198198] pnp 00:01: [mem 0xfed14000-0xfed17fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198200] pnp 00:01: [mem 0xfed18000-0xfed18fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198203] pnp 00:01: [mem 0xfed19000-0xfed19fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198208] pnp 00:01: [mem 0xf0000000-0xf3ffffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198211] pnp 00:01: [mem 0xfed20000-0xfed3ffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198213] pnp 00:01: [mem 0xfed40000-0xfed44fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198216] pnp 00:01: [mem 0xfed45000-0xfed8ffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198285] system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198292] system 00:01: [mem 0xfed14000-0xfed17fff] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198298] system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198304] system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198310] system 00:01: [mem 0xf0000000-0xf3ffffff] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198315] system 00:01: [mem 0xfed20000-0xfed3ffff] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198321] system 00:01: [mem 0xfed40000-0xfed44fff] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198327] system 00:01: [mem 0xfed45000-0xfed8ffff] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198333] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198775] pnp 00:02: [io 0x0000-0x001f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198778] pnp 00:02: [io 0x0081-0x0091]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198780] pnp 00:02: [io 0x0093-0x009f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198782] pnp 00:02: [io 0x00c0-0x00df]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198785] pnp 00:02: [dma 4]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198839] pnp 00:02: Plug and Play ACPI device, IDs PNP0200 (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198850] pnp 00:03: [mem 0xff000000-0xffffffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198901] pnp 00:03: Plug and Play ACPI device, IDs INT0800 (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.198984] pnp 00:04: [mem 0xfed00000-0xfed003ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199065] system 00:04: [mem 0xfed00000-0xfed003ff] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199073] system 00:04: Plug and Play ACPI device, IDs PNP0103 PNP0c01 (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199087] pnp 00:05: [io 0x00f0]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199100] pnp 00:05: [irq 13]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199154] pnp 00:05: Plug and Play ACPI device, IDs PNP0c04 (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199167] pnp 00:06: [io 0x002e-0x002f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199169] pnp 00:06: [io 0x004e-0x004f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199172] pnp 00:06: [io 0x0061]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199174] pnp 00:06: [io 0x0063]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199176] pnp 00:06: [io 0x0065]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199178] pnp 00:06: [io 0x0067]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199180] pnp 00:06: [io 0x0080]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199182] pnp 00:06: [io 0x0092]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199185] pnp 00:06: [io 0x00b2-0x00b3]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199187] pnp 00:06: [io 0x0800-0x080f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199189] pnp 00:06: [io 0x0500-0x057f]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199192] pnp 00:06: [io 0x0480-0x04bf]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199277] system 00:06: [io 0x0800-0x080f] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199284] system 00:06: [io 0x0500-0x057f] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199290] system 00:06: [io 0x0480-0x04bf] has been reserved
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199296] system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199307] pnp 00:07: [io 0x0070-0x0077]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199361] pnp 00:07: Plug and Play ACPI device, IDs PNP0b00 (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199382] pnp 00:08: [io 0x0060]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199384] pnp 00:08: [io 0x0064]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199391] pnp 00:08: [irq 1]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199447] pnp 00:08: Plug and Play ACPI device, IDs PNP0303 PNP030b (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199469] pnp 00:09: [irq 12]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199527] pnp 00:09: Plug and Play ACPI device, IDs PNP0f13 (active)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199570] pnp: PnP ACPI: found 10 devices
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199575] ACPI: ACPI bus type pnp unregistered
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.199581] PnPBIOS: Disabled by ACPI PNP
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236427] PCI: max bus depth: 2 pci_try_num: 3
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236504] pci 0000:00:1c.0: BAR 15: assigned [mem 0x50000000-0x501fffff 64bit pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236515] pci 0000:00:1c.0: PCI bridge to [bus 01-01]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236522] pci 0000:00:1c.0: bridge window [io 0x4000-0x4fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236532] pci 0000:00:1c.0: bridge window [mem 0xe4100000-0xe41fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236541] pci 0000:00:1c.0: bridge window [mem 0x50000000-0x501fffff 64bit pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236553] pci 0000:00:1c.1: PCI bridge to [bus 02-02]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236562] pci 0000:00:1c.1: bridge window [mem 0xe4200000-0xe42fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236576] pci 0000:00:1c.2: PCI bridge to [bus 03-03]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236594] pci 0000:00:1c.3: PCI bridge to [bus 04-04]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236616] pci 0000:05:00.0: BAR 16: assigned [mem 0x54000000-0x57ffffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236625] pci 0000:05:00.0: BAR 15: assigned [mem 0x58000000-0x5bffffff pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236632] pci 0000:05:00.0: BAR 14: assigned [io 0x2000-0x20ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236637] pci 0000:05:00.0: BAR 13: assigned [io 0x2400-0x24ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236643] pci 0000:05:00.0: CardBus bridge to [bus 06-09]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236648] pci 0000:05:00.0: bridge window [io 0x2400-0x24ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236657] pci 0000:05:00.0: bridge window [io 0x2000-0x20ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236665] pci 0000:05:00.0: bridge window [mem 0x58000000-0x5bffffff pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236675] pci 0000:05:00.0: bridge window [mem 0x54000000-0x57ffffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236684] pci 0000:00:1e.0: PCI bridge to [bus 05-05]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236690] pci 0000:00:1e.0: bridge window [io 0x2000-0x3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236700] pci 0000:00:1e.0: bridge window [mem 0xe0000000-0xe20fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236708] pci 0000:00:1e.0: bridge window [mem 0xe2100000-0xe40fffff 64bit pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236748] pci 0000:00:1c.0: PCI INT A -> GSI 20 (level, low) -> IRQ 20
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236761] pci 0000:00:1c.0: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236774] pci 0000:00:1c.1: PCI INT B -> GSI 21 (level, low) -> IRQ 21
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236785] pci 0000:00:1c.1: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236798] pci 0000:00:1c.2: PCI INT C -> GSI 22 (level, low) -> IRQ 22
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236809] pci 0000:00:1c.2: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236820] pci 0000:00:1c.3: PCI INT D -> GSI 23 (level, low) -> IRQ 23
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236832] pci 0000:00:1c.3: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236838] pci 0000:00:1e.0: enabling device (0104 -> 0107)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236849] pci 0000:00:1e.0: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236863] pci 0000:05:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236879] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236882] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236885] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236888] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236890] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236893] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236896] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236899] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236902] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236904] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236907] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236910] pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236913] pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236916] pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236918] pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236921] pci_bus 0000:00: resource 19 [mem 0x000f0000-0x000fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236924] pci_bus 0000:00: resource 20 [mem 0x50000000-0xfebfffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236927] pci_bus 0000:00: resource 21 [mem 0xfed40000-0xfed44fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236930] pci_bus 0000:01: resource 0 [io 0x4000-0x4fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236932] pci_bus 0000:01: resource 1 [mem 0xe4100000-0xe41fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236935] pci_bus 0000:01: resource 2 [mem 0x50000000-0x501fffff 64bit pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236939] pci_bus 0000:02: resource 1 [mem 0xe4200000-0xe42fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236942] pci_bus 0000:05: resource 0 [io 0x2000-0x3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236944] pci_bus 0000:05: resource 1 [mem 0xe0000000-0xe20fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236947] pci_bus 0000:05: resource 2 [mem 0xe2100000-0xe40fffff 64bit pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236950] pci_bus 0000:05: resource 4 [io 0x0000-0x0cf7]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236953] pci_bus 0000:05: resource 5 [io 0x0d00-0xffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236955] pci_bus 0000:05: resource 6 [mem 0x000a0000-0x000bffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236958] pci_bus 0000:05: resource 7 [mem 0x000c0000-0x000c3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236961] pci_bus 0000:05: resource 8 [mem 0x000c4000-0x000c7fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236964] pci_bus 0000:05: resource 9 [mem 0x000c8000-0x000cbfff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236966] pci_bus 0000:05: resource 10 [mem 0x000cc000-0x000cffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236969] pci_bus 0000:05: resource 11 [mem 0x000d0000-0x000d3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236972] pci_bus 0000:05: resource 12 [mem 0x000d4000-0x000d7fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236975] pci_bus 0000:05: resource 13 [mem 0x000d8000-0x000dbfff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236977] pci_bus 0000:05: resource 14 [mem 0x000dc000-0x000dffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236980] pci_bus 0000:05: resource 15 [mem 0x000e0000-0x000e3fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236983] pci_bus 0000:05: resource 16 [mem 0x000e4000-0x000e7fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236986] pci_bus 0000:05: resource 17 [mem 0x000e8000-0x000ebfff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236988] pci_bus 0000:05: resource 18 [mem 0x000ec000-0x000effff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236991] pci_bus 0000:05: resource 19 [mem 0x000f0000-0x000fffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236994] pci_bus 0000:05: resource 20 [mem 0x50000000-0xfebfffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.236997] pci_bus 0000:05: resource 21 [mem 0xfed40000-0xfed44fff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.237000] pci_bus 0000:06: resource 0 [io 0x2400-0x24ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.237002] pci_bus 0000:06: resource 1 [io 0x2000-0x20ff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.237005] pci_bus 0000:06: resource 2 [mem 0x58000000-0x5bffffff pref]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.237008] pci_bus 0000:06: resource 3 [mem 0x54000000-0x57ffffff]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.237062] NET: Registered protocol family 2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.237150] IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.237430] TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.237952] TCP bind hash table entries: 65536 (order: 7, 524288 bytes)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238205] TCP: Hash tables configured (established 131072 bind 65536)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238210] TCP reno registered
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238215] UDP hash table entries: 512 (order: 2, 16384 bytes)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238227] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238326] NET: Registered protocol family 1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238349] pci 0000:00:02.0: Boot video device
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238379] pci 0000:00:1d.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238409] pci 0000:00:1d.0: PCI INT A disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238430] pci 0000:00:1d.1: PCI INT B -> GSI 17 (level, low) -> IRQ 17
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238458] pci 0000:00:1d.1: PCI INT B disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238473] pci 0000:00:1d.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238500] pci 0000:00:1d.2: PCI INT C disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238515] pci 0000:00:1d.3: PCI INT D -> GSI 19 (level, low) -> IRQ 19
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238543] pci 0000:00:1d.3: PCI INT D disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238556] pci 0000:00:1d.7: PCI INT D -> GSI 19 (level, low) -> IRQ 19
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238595] pci 0000:00:1d.7: PCI INT D disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.238634] PCI: CLS 64 bytes, default 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.239096] audit: initializing netlink socket (disabled)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.239111] type=2000 audit(0.232:1): initialized
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.262811] highmem bounce pool size: 64 pages
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.262823] HugeTLB registered 4 MB page size, pre-allocated 0 pages
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.265206] VFS: Disk quotas dquot_6.5.2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.265284] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.265965] fuse init (API version 7.17)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.266087] msgmni has been set to 1688
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.266467] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.266502] io scheduler noop registered
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.266507] io scheduler deadline registered
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.266517] io scheduler cfq registered (default)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.266681] pcieport 0000:00:1c.0: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.266747] pcieport 0000:00:1c.0: irq 40 for MSI/MSI-X
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.266877] pcieport 0000:00:1c.1: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.266935] pcieport 0000:00:1c.1: irq 41 for MSI/MSI-X
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267051] pcieport 0000:00:1c.2: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267109] pcieport 0000:00:1c.2: irq 42 for MSI/MSI-X
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267217] pcieport 0000:00:1c.3: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267275] pcieport 0000:00:1c.3: irq 43 for MSI/MSI-X
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267417] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267423] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267432] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267458] pcieport 0000:00:1c.1: Signaling PME through PCIe PME interrupt
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267463] pci 0000:02:00.0: Signaling PME through PCIe PME interrupt
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267472] pcie_pme 0000:00:1c.1:pcie01: service driver pcie_pme loaded
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267498] pcieport 0000:00:1c.2: Signaling PME through PCIe PME interrupt
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267507] pcie_pme 0000:00:1c.2:pcie01: service driver pcie_pme loaded
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267534] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267542] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267565] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267610] pciehp 0000:00:1c.0:pcie04: HPC vendor_id 8086 device_id 27d0 ss_vid 17aa ss_did 2001
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267646] pciehp 0000:00:1c.0:pcie04: service driver pciehp loaded
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267656] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.267769] efifb: probing for efifb
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.268537] efifb: framebuffer at 0xd0000000, mapped to 0xf8080000, using 5824k, total 5824k
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.268545] efifb: mode is 1408x1050x32, linelength=5632, pages=1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.268549] efifb: scrolling: redraw
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.268554] efifb: Truecolor: size=0:8:8:8, shift=0:16:8:0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.274944] Console: switching to colour frame buffer device 176x65
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.281275] fb0: EFI VGA frame buffer device
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.281330] intel_idle: MWAIT substates: 0x22220
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.281333] intel_idle: does not run on family 6 model 15
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.281498] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.281699] ACPI: AC Adapter [AC] (on-line)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.281870] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:23/PNP0C09:00/PNP0C0E:00/input/input0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.281972] ACPI: Sleep Button [SLPB]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.282057] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:23/PNP0C09:00/PNP0C0D:00/input/input1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.282264] ACPI: Lid Switch [LID]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.282347] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.282405] ACPI: Power Button [PWRF]
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.282571] ACPI: processor limited to max C-state 2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.283553] Monitor-Mwait will be used to enter C-1 state
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.283562] Marking TSC unstable due to TSC halts in idle
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.283613] ACPI: acpi_idle registered with cpuidle
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.293926] thermal LNXTHERM:00: registered as thermal_zone0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.293983] ACPI: Thermal Zone [THM0] (40 C)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.294410] thermal LNXTHERM:01: registered as thermal_zone1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.294454] ACPI: Thermal Zone [THM1] (28 C)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.294523] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.294605] ACPI: Battery Slot [BAT0] (battery present)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.294651] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.294727] ACPI: Battery Slot [BAT1] (battery absent)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.294831] ERST: Table is not found!
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.294861] GHES: HEST is not enabled!
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.294994] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.298487] isapnp: Scanning for PnP cards...
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.316375] ACPI: Battery Slot [BAT0] (battery present)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.391299] ACPI: Battery Slot [BAT1] (battery absent)
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.606404] Freeing initrd memory: 18360k freed
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.653171] isapnp: No Plug & Play device found
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.724574] Linux agpgart interface v0.103
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.724714] agpgart-intel 0000:00:00.0: Intel 945GM Chipset
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.724835] agpgart-intel 0000:00:00.0: detected gtt size: 262144K total, 262144K mappable
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.726674] agpgart-intel 0000:00:00.0: detected 8192K stolen memory
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.726880] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.728923] brd: module loaded
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.729972] loop: module loaded
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.730140] ahci 0000:00:1f.2: version 3.0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.730155] ahci 0000:00:1f.2: PCI INT B -> GSI 16 (level, low) -> IRQ 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.730261] ahci 0000:00:1f.2: irq 44 for MSI/MSI-X
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.730299] ahci: SSS flag set, parallel bus scan disabled
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.730368] ahci 0000:00:1f.2: AHCI 0001.0100 32 slots 4 ports 1.5 Gbps 0x1 impl SATA mode
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.730431] ahci 0000:00:1f.2: flags: 64bit ncq ilck stag pm led clo pmp pio slum part
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.730491] ahci 0000:00:1f.2: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.731030] scsi0 : ahci
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.731178] scsi1 : ahci
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.733794] scsi2 : ahci
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.736368] scsi3 : ahci
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.738931] ata1: SATA max UDMA/133 abar m1024@0xe4444400 port 0xe4444500 irq 44
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.741432] ata2: DUMMY
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.743878] ata3: DUMMY
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.746311] ata4: DUMMY
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.748803] ata_piix 0000:00:1f.1: version 2.13
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.748813] ata_piix 0000:00:1f.1: PCI INT C -> GSI 16 (level, low) -> IRQ 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.751329] ata_piix 0000:00:1f.1: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.751710] scsi4 : ata_piix
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.754256] scsi5 : ata_piix
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.756851] ata5: PATA max UDMA/100 cmd 0x1f0 ctl 0x3f6 bmdma 0x5080 irq 14
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.759309] ata6: PATA max UDMA/100 cmd 0x170 ctl 0x376 bmdma 0x5088 irq 15
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.761937] ata6: port disabled--ignoring
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.762348] Fixed MDIO Bus: probed
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.764801] tun: Universal TUN/TAP device driver, 1.6
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.767248] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.769775] PPP generic driver version 2.4.2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.772354] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.774809] ehci_hcd 0000:00:1d.7: PCI INT D -> GSI 19 (level, low) -> IRQ 19
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.777270] ehci_hcd 0000:00:1d.7: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.777274] ehci_hcd 0000:00:1d.7: EHCI Host Controller
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.779744] ehci_hcd 0000:00:1d.7: new USB bus registered, assigned bus number 1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.782180] ehci_hcd 0000:00:1d.7: using broken periodic workaround
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.784592] ehci_hcd 0000:00:1d.7: debug port 1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.790845] ehci_hcd 0000:00:1d.7: cache line size of 64 is not supported
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.790863] ehci_hcd 0000:00:1d.7: irq 19, io mem 0xe4444000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.808020] ehci_hcd 0000:00:1d.7: USB 2.0 started, EHCI 1.00
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.810576] hub 1-0:1.0: USB hub found
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.812934] hub 1-0:1.0: 8 ports detected
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.815373] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.817708] uhci_hcd: USB Universal Host Controller Interface driver
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.820027] uhci_hcd 0000:00:1d.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.822306] uhci_hcd 0000:00:1d.0: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.822310] uhci_hcd 0000:00:1d.0: UHCI Host Controller
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.824585] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.826815] uhci_hcd 0000:00:1d.0: irq 16, io base 0x00005000
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.829148] hub 2-0:1.0: USB hub found
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.831291] hub 2-0:1.0: 2 ports detected
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.833488] uhci_hcd 0000:00:1d.1: PCI INT B -> GSI 17 (level, low) -> IRQ 17
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.835645] uhci_hcd 0000:00:1d.1: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.835649] uhci_hcd 0000:00:1d.1: UHCI Host Controller
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.837841] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 3
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.840032] uhci_hcd 0000:00:1d.1: irq 17, io base 0x00005020
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.842322] hub 3-0:1.0: USB hub found
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.844458] hub 3-0:1.0: 2 ports detected
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.846642] uhci_hcd 0000:00:1d.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.848776] uhci_hcd 0000:00:1d.2: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.848780] uhci_hcd 0000:00:1d.2: UHCI Host Controller
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.850902] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 4
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.853002] uhci_hcd 0000:00:1d.2: irq 18, io base 0x00005040
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.855177] hub 4-0:1.0: USB hub found
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.857208] hub 4-0:1.0: 2 ports detected
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.859296] uhci_hcd 0000:00:1d.3: PCI INT D -> GSI 19 (level, low) -> IRQ 19
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.861357] uhci_hcd 0000:00:1d.3: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.861362] uhci_hcd 0000:00:1d.3: UHCI Host Controller
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.863426] uhci_hcd 0000:00:1d.3: new USB bus registered, assigned bus number 5
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.865486] uhci_hcd 0000:00:1d.3: irq 19, io base 0x00005060
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.867693] hub 5-0:1.0: USB hub found
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.869747] hub 5-0:1.0: 2 ports detected
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.871905] usbcore: registered new interface driver libusual
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.874020] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.887190] serio: i8042 KBD port at 0x60,0x64 irq 1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.889281] serio: i8042 AUX port at 0x60,0x64 irq 12
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.891506] mousedev: PS/2 mouse device common for all mice
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.893793] rtc_cmos 00:07: RTC can wake from S4
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.895987] rtc_cmos 00:07: rtc core: registered rtc_cmos as rtc0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.898139] rtc0: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.900318] device-mapper: uevent: version 1.0.3
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.902496] device-mapper: ioctl: 4.22.0-ioctl (2011-10-19) initialised: dm-devel@redhat.com
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.904621] EISA: Probing bus 0 at eisa.0
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.906698] EISA: Cannot allocate resource for mainboard
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.908766] Cannot allocate resource for EISA slot 1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.910917] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.913092] Cannot allocate resource for EISA slot 2
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.915644] Cannot allocate resource for EISA slot 3
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.917781] Cannot allocate resource for EISA slot 4
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.919882] Cannot allocate resource for EISA slot 5
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.922780] Cannot allocate resource for EISA slot 6
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.924878] Cannot allocate resource for EISA slot 7
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.926922] Cannot allocate resource for EISA slot 8
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.928944] EISA: Detected 0 cards.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.930972] cpufreq-nforce2: No nForce2 chipset.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.933066] cpuidle: using governor ladder
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.935184] cpuidle: using governor menu
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.937182] EFI Variables Facility v0.08 2004-May-17
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.939481] TCP cubic registered
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.940394] ata5.00: ATAPI: HL-DT-ST DVDRAM GSA-4083N, 1.08, max UDMA/33
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.943623] NET: Registered protocol family 10
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.946335] NET: Registered protocol family 17
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.948310] Registering the dns_resolver key type
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.950288] Using IPI No-Shortcut mode
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.952401] PM: Hibernation image not present or could not be loaded.
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.952414] registered taskstats version 1
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.956293] ata5.00: configured for UDMA/33
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.963685] Magic number: 9:510:811
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.965744] rtc_cmos 00:07: hctosys: invalid date/time
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.968437] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found
+Jan 1 01:00:21 X60Trisquel kernel: [ 0.970411] EDD information not available.
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.244058] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.286258] ata1.00: ATA-8: WDC WD2500BEVT-08A23T1, 02.01A02, max UDMA/133
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.288362] ata1.00: 488397168 sectors, multi 0: LBA48 NCQ (depth 31/32), AA
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.291943] ata1.00: configured for UDMA/133
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.294116] scsi 0:0:0:0: Direct-Access ATA WDC WD2500BEVT-0 02.0 PQ: 0 ANSI: 5
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.296317] sd 0:0:0:0: [sda] 488397168 512-byte logical blocks: (250 GB/232 GiB)
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.296350] sd 0:0:0:0: Attached scsi generic sg0 type 0
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.300527] sd 0:0:0:0: [sda] Write Protect is off
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.302606] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.302631] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.306560] scsi 4:0:0:0: CD-ROM HL-DT-ST DVDRAM GSA-4083N 1.08 PQ: 0 ANSI: 5
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.347158] sda: sda1 sda2 < sda5 >
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.349797] sd 0:0:0:0: [sda] Attached SCSI disk
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.422601] sr0: scsi3-mmc drive: 24x/24x writer dvd-ram cd/rw xa/form2 cdda tray
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.424845] cdrom: Uniform CD-ROM driver Revision: 3.20
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.427113] sr 4:0:0:0: Attached scsi CD-ROM sr0
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.427295] sr 4:0:0:0: Attached scsi generic sg1 type 5
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.429551] Freeing unused kernel memory: 716k freed
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.431913] Write protecting the kernel text: 5648k
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.434083] Write protecting the kernel read-only data: 2256k
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.530584] e1000e: Intel(R) PRO/1000 Network Driver - 1.5.1-k
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.532749] e1000e: Copyright(c) 1999 - 2011 Intel Corporation.
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.537194] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input4
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.545766] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no)
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.549902] e1000e 0000:01:00.0: Disabling ASPM L0s L1
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.566940] e1000e 0000:01:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.571903] e1000e 0000:01:00.0: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.572139] e1000e 0000:01:00.0: irq 45 for MSI/MSI-X
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.580288] [drm] Initialized drm 1.1.0 20060810
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.588073] usb 3-1: new full-speed USB device number 2 using uhci_hcd
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.598435] i915 0000:00:02.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.600603] i915 0000:00:02.0: setting latency timer to 64
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.601011] checking generic (d0000000 5b0000) vs hw (d0000000 10000000)
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.601014] fb: conflicting fb hw usage inteldrmfb vs EFI VGA - removing generic driver
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.603192] Console: switching to colour dummy device 80x25
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.626656] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.626664] [drm] Driver supports precise vblank timestamp query.
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.626676] i915 0000:00:02.0: Invalid ROM contents
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.626681] [drm:intel_parse_bios] *ERROR* VBT signature missing
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.626685] [drm] failed to find VBIOS tables
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.626721] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.696892] e1000e 0000:01:00.0: eth0: (PCI Express:2.5GT/s:Width x1) 00:16:41:12:8b:29
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.696902] e1000e 0000:01:00.0: eth0: Intel(R) PRO/1000 Network Connection
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.696982] e1000e 0000:01:00.0: eth0: MAC: 2, PHY: 2, PBA No: 005301-003
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.875525] [drm] initialized overlay support
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.875556] [drm] capturing error event; look for more information in /debug/dri/0/i915_error_state
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.876336] render error detected, EIR: 0x00000010
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.876341] page table error
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.876344] PGTBL_ER: 0x00000012
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.876350] [drm:i915_report_and_clear_eir] *ERROR* EIR stuck: 0x00000010, masking
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.876361] render error detected, EIR: 0x00000010
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.876365] page table error
+Jan 1 01:00:21 X60Trisquel kernel: [ 1.876368] PGTBL_ER: 0x00000012
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.004061] usb 5-1: new full-speed USB device number 2 using uhci_hcd
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.097438] fbcon: inteldrmfb (fb0) is primary device
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.175114] Console: switching to colour frame buffer device 175x65
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.181718] fb0: inteldrmfb frame buffer device
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.181752] drm: registered panic notifier
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.182937] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.420039] usb 5-2: new full-speed USB device number 3 using uhci_hcd
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.774369] Btrfs loaded
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.780814] xor: automatically using best checksumming function: pIII_sse
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.800017] pIII_sse : 7305.000 MB/sec
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.800047] xor: using function: pIII_sse (7305.000 MB/sec)
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.800767] device-mapper: dm-raid45: initialized v0.2594b
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.802567] md: linear personality registered for level -1
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.804406] md: multipath personality registered for level -4
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.806182] md: raid0 personality registered for level 0
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.808268] md: raid1 personality registered for level 1
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.810069] async_tx: api initialized (async)
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.876067] raid6: int32x1 750 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 2.944104] raid6: int32x2 641 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.012084] raid6: int32x4 589 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.080099] raid6: int32x8 670 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.148037] raid6: mmxx1 2613 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.216018] raid6: mmxx2 2855 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.284033] raid6: sse1x1 1574 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.352020] raid6: sse1x2 2166 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.420024] raid6: sse2x1 2869 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.488018] raid6: sse2x2 3812 MB/s
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.488045] raid6: using algorithm sse2x2 (3812 MB/s)
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.489021] md: raid6 personality registered for level 6
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.489061] md: raid5 personality registered for level 5
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.489098] md: raid4 personality registered for level 4
+Jan 1 01:00:21 X60Trisquel kernel: [ 3.494894] md: raid10 personality registered for level 10
+Jan 1 01:00:21 X60Trisquel kernel: [ 9.071462] EXT4-fs (sda1): INFO: recovery required on readonly filesystem
+Jan 1 01:00:21 X60Trisquel kernel: [ 9.071514] EXT4-fs (sda1): write access will be enabled during recovery
+Jan 1 01:00:21 X60Trisquel kernel: [ 9.397275] EXT4-fs (sda1): recovery complete
+Jan 1 01:00:21 X60Trisquel kernel: [ 9.397872] EXT4-fs (sda1): mounted filesystem with ordered data mode. Opts: (null)
+Jan 1 01:00:21 X60Trisquel kernel: [ 20.812492] EXT4-fs (sda1): re-mounted. Opts: errors=remount-ro
+Jan 1 01:00:21 X60Trisquel kernel: [ 21.723158] ADDRCONF(NETDEV_UP): eth0: link is not ready
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.217119] Bluetooth: Core ver 2.16
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.217143] NET: Registered protocol family 31
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.217145] Bluetooth: HCI device and connection manager initialized
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.217148] Bluetooth: HCI socket layer initialized
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.217150] Bluetooth: L2CAP socket layer initialized
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.217157] Bluetooth: SCO socket layer initialized
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.218911] lp: driver loaded but no devices found
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.270375] ppdev: user-space parallel port driver
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.285697] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.285701] Bluetooth: BNEP filters: protocol multicast
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.309953] Bluetooth: RFCOMM TTY layer initialized
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.309959] Bluetooth: RFCOMM socket layer initialized
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.309961] Bluetooth: RFCOMM ver 1.11
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.355490] Bluetooth: Generic Bluetooth USB driver ver 0.6
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.358365] usbcore: registered new interface driver btusb
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.410130] Non-volatile memory driver v1.3
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.504396] intel_rng: FWH not detected
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.509262] device-mapper: multipath: version 1.3.2 loaded
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.707977] usbcore: registered new interface driver usbserial
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.707993] USB Serial support registered for generic
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.708203] usbcore: registered new interface driver usbserial_generic
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.708206] usbserial: USB Serial Driver core
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.712918] USB Serial support registered for Sierra USB modem
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.712941] sierra 3-1:1.0: Sierra USB modem converter detected
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.714669] usb 3-1: Sierra USB modem converter now attached to ttyUSB0
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.714737] usb 3-1: Sierra USB modem converter now attached to ttyUSB1
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.714799] usb 3-1: Sierra USB modem converter now attached to ttyUSB2
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.714827] usbcore: registered new interface driver sierra
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.714830] sierra: v.1.7.16:USB Driver for Sierra Wireless USB modems
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.715635] leds_ss4200: no LED devices found
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.756344] cfg80211: Calling CRDA to update world regulatory domain
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.782934] yenta_cardbus 0000:05:00.0: CardBus bridge found [0000:0000]
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.782959] yenta_cardbus 0000:05:00.0: Using CSCINT to route CSC interrupts to PCI
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.782962] yenta_cardbus 0000:05:00.0: Routing CardBus interrupts to PCI
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.782969] yenta_cardbus 0000:05:00.0: TI: mfunc 0x01d01002, devctl 0x66
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.904848] cfg80211: World regulatory domain updated:
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.904852] cfg80211: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.904855] cfg80211: (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.904858] cfg80211: (2457000 KHz - 2482000 KHz @ 20000 KHz), (300 mBi, 2000 mBm)
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.904862] cfg80211: (2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm)
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.904864] cfg80211: (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.904867] cfg80211: (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.926292] iwl3945: Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux, in-tree:s
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.926296] iwl3945: Copyright(c) 2003-2011 Intel Corporation
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.926364] iwl3945 0000:02:00.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
+Jan 1 01:00:22 X60Trisquel kernel: [ 22.926396] iwl3945 0000:02:00.0: setting latency timer to 64
+Jan 1 01:00:23 X60Trisquel kernel: [ 22.993993] iwl3945 0000:02:00.0: Tunable channels: 11 802.11bg, 13 802.11a channels
+Jan 1 01:00:23 X60Trisquel kernel: [ 22.993998] iwl3945 0000:02:00.0: Detected Intel Wireless WiFi Link 3945ABG
+Jan 1 01:00:23 X60Trisquel kernel: [ 22.994151] iwl3945 0000:02:00.0: irq 46 for MSI/MSI-X
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.004162] Registered led device: phy0-led
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.004232] cfg80211: Ignoring regulatory request Set by core since the driver uses its own custom regulatory domain
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.016844] yenta_cardbus 0000:05:00.0: ISA IRQ mask 0x0cf8, PCI irq 16
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.016849] yenta_cardbus 0000:05:00.0: Socket status: 30000007
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.016854] pci_bus 0000:05: Raising subordinate bus# of parent bus (#05) from #05 to #09
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.016864] yenta_cardbus 0000:05:00.0: pcmcia: parent PCI bridge window: [io 0x2000-0x3fff]
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.016868] pcmcia_socket pcmcia_socket0: cs: IO port probe 0x2000-0x3fff: excluding 0x2000-0x20ff 0x2400-0x24ff
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.045522] yenta_cardbus 0000:05:00.0: pcmcia: parent PCI bridge window: [mem 0xe0000000-0xe20fffff]
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.045527] pcmcia_socket pcmcia_socket0: cs: memory probe 0xe0000000-0xe20fffff: excluding 0xe1ef0000-0xe20fffff
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.045542] yenta_cardbus 0000:05:00.0: pcmcia: parent PCI bridge window: [mem 0xe2100000-0xe40fffff 64bit pref]
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.045546] pcmcia_socket pcmcia_socket0: cs: memory probe 0xe2100000-0xe40fffff: excluding 0xe2100000-0xe40fffff
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.177380] ieee80211 phy0: Selected rate control algorithm 'iwl-3945-rs'
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.217008] pcmcia_socket pcmcia_socket0: cs: IO port probe 0x100-0x3af: excluding 0x170-0x177 0x1f0-0x1f7 0x370-0x377
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.219015] pcmcia_socket pcmcia_socket0: cs: IO port probe 0x3e0-0x4ff: excluding 0x3f0-0x3f7 0x400-0x41f 0x480-0x4bf 0x4d0-0x4d7
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.219577] pcmcia_socket pcmcia_socket0: cs: IO port probe 0x820-0x8ff: clean.
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.224420] pcmcia_socket pcmcia_socket0: cs: IO port probe 0xc00-0xcf7: clean.
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.225172] pcmcia_socket pcmcia_socket0: cs: memory probe 0x0c0000-0x0fffff: excluding 0xf0000-0xfffff
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.225213] pcmcia_socket pcmcia_socket0: cs: memory probe 0xa0000000-0xa0ffffff: clean.
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.225259] pcmcia_socket pcmcia_socket0: cs: memory probe 0x60000000-0x60ffffff: clean.
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.225305] pcmcia_socket pcmcia_socket0: cs: IO port probe 0xa00-0xaff: clean.
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.281257] type=1400 audit(23.277:2): apparmor="STATUS" operation="profile_load" name="/sbin/dhclient" pid=665 comm="apparmor_parser"
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.281406] type=1400 audit(23.277:3): apparmor="STATUS" operation="profile_load" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=665 comm="apparmor_parser"
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.281499] type=1400 audit(23.277:4): apparmor="STATUS" operation="profile_load" name="/usr/lib/connman/scripts/dhclient-script" pid=665 comm="apparmor_parser"
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.395423] type=1400 audit(23.389:5): apparmor="STATUS" operation="profile_replace" name="/sbin/dhclient" pid=746 comm="apparmor_parser"
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.395575] type=1400 audit(23.389:6): apparmor="STATUS" operation="profile_replace" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=746 comm="apparmor_parser"
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.395673] type=1400 audit(23.389:7): apparmor="STATUS" operation="profile_replace" name="/usr/lib/connman/scripts/dhclient-script" pid=746 comm="apparmor_parser"
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.456805] psmouse serio1: synaptics: Touchpad model: 1, fw: 6.2, id: 0x81a0b1, caps: 0xa04793/0x300000/0x0
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.456812] psmouse serio1: synaptics: serio: Synaptics pass-through port at isa0060/serio1/input0
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.502122] input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio1/input/input5
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.561248] init: failsafe main process (842) killed by TERM signal
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.643895] type=1400 audit(23.637:8): apparmor="STATUS" operation="profile_load" name="/usr/lib/cups/backend/cups-pdf" pid=656 comm="apparmor_parser"
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.644862] type=1400 audit(23.641:9): apparmor="STATUS" operation="profile_load" name="/usr/sbin/cupsd" pid=656 comm="apparmor_parser"
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.752331] e1000e 0000:01:00.0: irq 45 for MSI/MSI-X
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.808134] e1000e 0000:01:00.0: irq 45 for MSI/MSI-X
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.808714] ADDRCONF(NETDEV_UP): eth3: link is not ready
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.809120] ADDRCONF(NETDEV_UP): eth3: link is not ready
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.811292] 0000:02:00.0: Missing Free firmware
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.826370] snd_hda_intel 0000:00:1b.0: PCI INT B -> GSI 17 (level, low) -> IRQ 17
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.826378] hda_intel: probe_mask set to 0x1 for device 17aa:2010
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.826446] snd_hda_intel 0000:00:1b.0: irq 47 for MSI/MSI-X
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.826483] snd_hda_intel 0000:00:1b.0: setting latency timer to 64
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.829518] iwl3945 0000:02:00.0: /*(DEBLOBBED)*/ firmware file req failed: -22
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.829575] iwl3945 0000:02:00.0: Could not read microcode: -22
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.829722] ADDRCONF(NETDEV_UP): wlan8: link is not ready
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.846753] 0000:02:00.0: Missing Free firmware
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.848824] iwl3945 0000:02:00.0: /*(DEBLOBBED)*/ firmware file req failed: -22
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.848879] iwl3945 0000:02:00.0: Could not read microcode: -22
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.851120] 0000:02:00.0: Missing Free firmware
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.854519] iwl3945 0000:02:00.0: /*(DEBLOBBED)*/ firmware file req failed: -22
+Jan 1 01:00:23 X60Trisquel kernel: [ 23.856360] iwl3945 0000:02:00.0: Could not read microcode: -22
+Jan 1 01:00:24 X60Trisquel kernel: [ 24.022103] type=1400 audit(24.017:10): apparmor="STATUS" operation="profile_replace" name="/sbin/dhclient" pid=826 comm="apparmor_parser"
+Jan 1 01:00:24 X60Trisquel kernel: [ 24.022254] type=1400 audit(24.017:11): apparmor="STATUS" operation="profile_replace" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=826 comm="apparmor_parser"
+Jan 1 01:00:24 X60Trisquel kernel: [ 24.987006] init: alsa-restore main process (1021) terminated with status 99
+Jan 1 01:00:25 X60Trisquel kernel: [ 25.154008] [drm:i915_gem_execbuffer2] *ERROR* copy 1 exec entries failed 56
+Jan 1 01:00:26 X60Trisquel kernel: [ 26.329969] init: plymouth-stop pre-start process (1321) terminated with status 1
+Jan 1 01:00:26 X60Trisquel kernel: [ 26.528749] psmouse serio2: hgpk: ID: 10 00 64
+Jan 1 01:00:30 X60Trisquel kernel: [ 30.040699] IBM TrackPoint firmware: 0x0e, buttons: 3/3
+Jan 1 01:00:30 X60Trisquel kernel: [ 30.275522] input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio1/serio2/input/input6
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.753313] BUG: unable to handle kernel paging request at 30000008
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] IP: [<c1109503>] handle_pte_fault+0xa3/0x220
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] *pde = 00000000
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] Oops: 0000 [#1] SMP
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] Modules linked in: kvm_intel dm_crypt kvm snd_hda_codec_analog snd_hda_intel snd_hda_codec snd_hwdep joydev snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event snd_seq pcmcia arc4 snd_timer snd_seq_device iwl3945 iwl_legacy mac80211 snd yenta_socket psmouse cfg80211 pcmcia_rsrc serio_raw pcmcia_core sierra usbserial soundcore mac_hid snd_page_alloc dm_multipath nvram btusb rfcomm bnep parport_pc ppdev bluetooth lp parport raid10 raid456 async_raid6_recov async_pq raid6_pq async_xor async_memcpy async_tx raid1 raid0 multipath linear dm_raid45 xor dm_mirror dm_region_hash dm_log btrfs zlib_deflate libcrc32c i915 drm_kms_helper drm i2c_algo_bit video e1000e
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010]
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] Pid: 1345, comm: udevd Not tainted 3.2.0-64-generic #1trisquel1 LENOVO 195143U
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] EIP: 0060:[<c1109503>] EFLAGS: 00010206 CPU: 0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] EIP is at handle_pte_fault+0xa3/0x220
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] EAX: 30000000 EBX: f2b483c8 ECX: 00ed82f8 EDX: f2b483c8
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] ESI: 00000000 EDI: 00ed82f8 EBP: f212dde8 ESP: f212ddc4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] Process udevd (pid: 1345, ti=f212c000 task=f2bd58d0 task.ti=f212c000)
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] Stack:
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] eaa9eadb f212dde0 c102cf3e fffff000 f257400c f4b8a400 f257400c f4b8a400
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] f2b483c8 f212de18 c11097d7 fffbab60 f257400c 00000028 360f3674 00000000
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] 00ed82f8 0000000c f2b483c8 f212de9c c157ef30 f212de94 c157f088 00000028
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] Call Trace:
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c102cf3e>] ? kmap_atomic_prot+0xde/0x100
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c11097d7>] handle_mm_fault+0x157/0x210
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c157f088>] do_page_fault+0x158/0x4b0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c157c417>] error_code+0x67/0x6c
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c110b7e7>] ? find_vma+0x37/0x60
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c157f04b>] do_page_fault+0x11b/0x4b0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c157c417>] error_code+0x67/0x6c
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c10300d8>] ? xo1_sci_intr+0xc8/0x100
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c12a8f45>] ? __put_user_4+0x11/0x18
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c1045776>] ? schedule_tail+0x56/0xa0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c1582cc6>] ret_from_fork+0x6/0x1c
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] [<c1580000>] ? kprobe_optimizer+0xc0/0xd0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] Code: 01 f0 89 44 24 04 8b 45 f0 89 14 24 89 da e8 d5 c8 ff ff 8b 5d f4 8b 75 f8 8b 7d fc 89 ec 5d c3 8b 42 44 85 c0 0f 84 35 01 00 00 <8b> 48 08 85 c9 0f 84 2a 01 00 00 8b 45 08 89 fe 81 e6 00 f0 ff
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] EIP: [<c1109503>] handle_pte_fault+0xa3/0x220 SS:ESP 0068:f212ddc4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.756010] CR2: 0000000030000008
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863345] ---[ end trace a3dd6a099e80bf23 ]---
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863351] note: udevd[1345] exited with preempt_count 1
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863356] BUG: scheduling while atomic: udevd/1345/0x10000001
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863359] Modules linked in: kvm_intel dm_crypt kvm snd_hda_codec_analog snd_hda_intel snd_hda_codec snd_hwdep joydev snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event snd_seq pcmcia arc4 snd_timer snd_seq_device iwl3945 iwl_legacy mac80211 snd yenta_socket psmouse cfg80211 pcmcia_rsrc serio_raw pcmcia_core sierra usbserial soundcore mac_hid snd_page_alloc dm_multipath nvram btusb rfcomm bnep parport_pc ppdev bluetooth lp parport raid10 raid456 async_raid6_recov async_pq raid6_pq async_xor async_memcpy async_tx raid1 raid0 multipath linear dm_raid45 xor dm_mirror dm_region_hash dm_log btrfs zlib_deflate libcrc32c i915 drm_kms_helper drm i2c_algo_bit video e1000e
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863492] Pid: 1345, comm: udevd Tainted: G D 3.2.0-64-generic #1trisquel1
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863496] Call Trace:
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863502] [<c1566abf>] ? printk+0x2d/0x2f
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863508] [<c1566307>] __schedule_bug+0x5e/0x64
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863514] [<c1579d14>] __schedule+0x614/0x620
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863521] [<c104c02d>] ? console_unlock+0x11d/0x160
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863528] [<c1027858>] ? default_spin_lock_flags+0x8/0x10
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863534] [<c157bbbd>] ? _raw_spin_lock_irqsave+0x2d/0x40
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863541] [<c1044c0b>] __cond_resched+0x1b/0x30
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863546] [<c1579d99>] _cond_resched+0x29/0x30
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863552] [<c157af00>] down_read+0x10/0x1f
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863558] [<c1090ed4>] acct_collect+0x44/0x180
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863564] [<c104fc07>] do_exit+0x2e7/0x3c0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863570] [<c157cc66>] oops_end+0x96/0xd0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863576] [<c156597a>] no_context+0x13c/0x144
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863582] [<c1565aa3>] __bad_area_nosemaphore+0x121/0x129
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863588] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863594] [<c1565ac2>] bad_area_nosemaphore+0x17/0x19
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863599] [<c157f342>] do_page_fault+0x412/0x4b0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863605] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863611] [<c157c417>] error_code+0x67/0x6c
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863617] [<c1109503>] ? handle_pte_fault+0xa3/0x220
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863622] [<c102cf3e>] ? kmap_atomic_prot+0xde/0x100
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863628] [<c11097d7>] handle_mm_fault+0x157/0x210
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863634] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863639] [<c157f088>] do_page_fault+0x158/0x4b0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863645] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863651] [<c157c417>] error_code+0x67/0x6c
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863656] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863662] [<c110b7e7>] ? find_vma+0x37/0x60
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863667] [<c157f04b>] do_page_fault+0x11b/0x4b0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863674] [<c157ef30>] ? vmalloc_fault+0xf4/0xf4
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863680] [<c157c417>] error_code+0x67/0x6c
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863685] [<c10300d8>] ? xo1_sci_intr+0xc8/0x100
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863691] [<c12a8f45>] ? __put_user_4+0x11/0x18
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863697] [<c1045776>] ? schedule_tail+0x56/0xa0
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863703] [<c1582cc6>] ret_from_fork+0x6/0x1c
+Jan 1 01:00:34 X60Trisquel kernel: [ 34.863709] [<c1580000>] ? kprobe_optimizer+0xc0/0xd0
diff --git a/docs/t7200q/t7200_01.jpg b/docs/t7200q/t7200_01.jpg Binary files differnew file mode 100644 index 00000000..ccf86182 --- /dev/null +++ b/docs/t7200q/t7200_01.jpg diff --git a/docs/t7200q/t7200_02.jpg b/docs/t7200q/t7200_02.jpg Binary files differnew file mode 100644 index 00000000..e17279c9 --- /dev/null +++ b/docs/t7200q/t7200_02.jpg |
