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author | Libreboot Contributor <contributor@libreboot.org> | 2020-03-18 17:20:14 +0100 |
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committer | Libreboot Contributor <contributor@libreboot.org> | 2020-03-18 17:20:27 +0100 |
commit | 0f6ea1c9e0a25a9b7546f96f27cef8841f0d09b5 (patch) | |
tree | a28b9403123dd6204eb2dd8cb44eada12c169f4b /i18n/fr_FR/docs/future/dumps/x60_5893_native_crashdump | |
parent | 6e5bdd1271059a9c61c80b21001fd3d14ff25045 (diff) | |
download | librebootfr-0f6ea1c9e0a25a9b7546f96f27cef8841f0d09b5.tar.gz librebootfr-0f6ea1c9e0a25a9b7546f96f27cef8841f0d09b5.zip |
Creation of i18n folder containing translations of the libreboot project. Added french one, not finished.
Diffstat (limited to 'i18n/fr_FR/docs/future/dumps/x60_5893_native_crashdump')
-rw-r--r-- | i18n/fr_FR/docs/future/dumps/x60_5893_native_crashdump | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/i18n/fr_FR/docs/future/dumps/x60_5893_native_crashdump b/i18n/fr_FR/docs/future/dumps/x60_5893_native_crashdump new file mode 100644 index 00000000..a3aedb64 --- /dev/null +++ b/i18n/fr_FR/docs/future/dumps/x60_5893_native_crashdump @@ -0,0 +1,77 @@ +Time: 1401660987 s 272232 us +Kernel: 3.14.4-gnuowen +PCI ID: 0x27a2 +EIR: 0x00000010 +IER: 0x00028053 +PGTBL_ER: 0x00000012 +FORCEWAKE: 0x00000000 +DERRMR: 0x00000000 +CCID: 0x00000000 +Missed interrupts: 0x00000000 + fence[0] = 00000000 + fence[1] = 00000000 + fence[2] = 00000000 + fence[3] = 00000000 + fence[4] = 00000000 + fence[5] = 00000000 + fence[6] = 00000000 + fence[7] = 00000000 + fence[8] = 00000000 + fence[9] = 00000000 + fence[10] = 00000000 + fence[11] = 00000000 + fence[12] = 00000000 + fence[13] = 00000000 + fence[14] = 00000000 + fence[15] = 00000000 + INSTDONE_0: 0x7fffffc0 + INSTDONE_1: 0x00000000 + INSTDONE_2: 0x00000000 + INSTDONE_3: 0x00000000 +Active [0]: +Pinned [0]: +Num Pipes: 2 +Pipe [0]: + Power: off + SRC: 00000000 +Plane [0]: + CNTR: 00000000 + STRIDE: 00000000 + SIZE: 00000000 + POS: 00000000 + ADDR: 00000000 +Cursor [0]: + CNTR: 00000000 + POS: 00000000 + BASE: 00000000 +Pipe [1]: + Power: off + SRC: 00000000 +Plane [1]: + CNTR: 00000000 + STRIDE: 00000000 + SIZE: 00000000 + POS: 00000000 + ADDR: 00000000 +Cursor [1]: + CNTR: 00000000 + POS: 00000000 + BASE: 00000000 +CPU transcoder: A + Power: off + CONF: 00000000 + HTOTAL: 00000000 + HBLANK: 00000000 + HSYNC: 00000000 + VTOTAL: 00000000 + VBLANK: 00000000 + VSYNC: 00000000 +CPU transcoder: A + Power: off + CONF: 00000000 + HTOTAL: 00000000 + HBLANK: 00000000 + HSYNC: 00000000 + VTOTAL: 00000000 + VBLANK: 00000000 + VSYNC: 00000000 |