link to french version of gplv3 at the top of i18n/fr_FR/COPYING . Also, we remove files that we haven't translated yet, it weights a lot.

11 files changed, 0 insertions, 834 deletions

diff --git a/i18n/fr_FR/projects/cros-ec/patches/nyan/0001-use-_DEFAULT_SOURCE-for-newer-glibc.patch b/i18n/fr_FR/projects/cros-ec/patches/nyan/0001-use-_DEFAULT_SOURCE-for-newer-glibc.patch
deleted file mode 100644
index ef3d40dc..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/nyan/0001-use-_DEFAULT_SOURCE-for-newer-glibc.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From b98bd2808f4185970781bd4dcca141cbda9b03c6 Mon Sep 17 00:00:00 2001
-From: Mike Frysinger <vapier@chromium.org>
-Date: Mon, 7 Dec 2015 21:46:13 -0500
-Subject: [PATCH 1/4] use _DEFAULT_SOURCE for newer glibc
-
-Newer versions of glibc have moved to _DEFAULT_SOURCE and away from
-_BSD_SOURCE.  Trying to use the BSD define by itself leads to warnings
-which causes build failures.
-
-BRANCH=none
-BUG=None
-TEST=precq still works
-
-Signed-off-by: Mike Frysinger <vapier@chromium.org>
-Change-Id: Ice24b84dc6a540695fc7b76e8f22a4c85c301976
-Reviewed-on: https://chromium-review.googlesource.com/316730
-Reviewed-by: Bill Richardson <wfrichar@chromium.org>
----
- util/ec_uartd.c | 3 ++-
- util/stm32mon.c | 3 ++-
- 2 files changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/util/ec_uartd.c b/util/ec_uartd.c
-index fbf4a5e..bfd0642 100644
---- a/util/ec_uartd.c
-+++ b/util/ec_uartd.c
-@@ -11,7 +11,8 @@
-  */
- 
- /* Force header files to define grantpt(), posix_openpt(), cfmakeraw() */
--#define _BSD_SOURCE
-+#define _DEFAULT_SOURCE /* Newer glibc */
-+#define _BSD_SOURCE     /* Older glibc */
- #define _XOPEN_SOURCE 600
- /* Force header file to declare ptsname_r(), etc. */
- #ifndef _GNU_SOURCE
-diff --git a/util/stm32mon.c b/util/stm32mon.c
-index 2e73bcf..f65cd64 100644
---- a/util/stm32mon.c
-+++ b/util/stm32mon.c
-@@ -6,7 +6,8 @@
-  */
- 
- /* use cfmakeraw() */
--#define _BSD_SOURCE
-+#define _DEFAULT_SOURCE /* Newer glibc */
-+#define _BSD_SOURCE     /* Older glibc */
- 
- #include <arpa/inet.h>
- #include <errno.h>
--- 
-2.9.0
-
diff --git a/i18n/fr_FR/projects/cros-ec/patches/nyan/0002-Enforce-compilation-without-system-headers.patch b/i18n/fr_FR/projects/cros-ec/patches/nyan/0002-Enforce-compilation-without-system-headers.patch
deleted file mode 100644
index db747ea9..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/nyan/0002-Enforce-compilation-without-system-headers.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From fd77232c8e9789f5556fc6cc3c694924c1546a41 Mon Sep 17 00:00:00 2001
-From: Paul Kocialkowski <contact@paulk.fr>
-Date: Wed, 20 Jul 2016 16:26:32 +0200
-Subject: [PATCH 2/4] Enforce compilation without system headers
-
-This is based on commit bc404c94b4ab1e6a62e607fd7ef034aa31d6388e
-(Enforce compilation without system headers)
----
- Makefile.toolchain | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/Makefile.toolchain b/Makefile.toolchain
-index dd0ebb2..47991e1 100644
---- a/Makefile.toolchain
-+++ b/Makefile.toolchain
-@@ -19,7 +19,7 @@ BUILDCC?=gcc
- HOSTCC?=$(HOST_CROSS_COMPILE)gcc
- 
- CFLAGS_WARN=-Wall -Werror -Wundef -Wstrict-prototypes -Wno-trigraphs      \
--            -fno-strict-aliasing -fno-common                              \
-+            -fno-strict-aliasing -fno-common -ffreestanding -fno-builtin  \
-             -Werror-implicit-function-declaration -Wno-format-security    \
-             -fno-delete-null-pointer-checks -Wdeclaration-after-statement \
-             -Wno-pointer-sign -fno-strict-overflow -fconserve-stack
--- 
-2.9.0
-
diff --git a/i18n/fr_FR/projects/cros-ec/patches/nyan/0003-Don-t-declare-functions-inline-that-aren-t-always-de.patch b/i18n/fr_FR/projects/cros-ec/patches/nyan/0003-Don-t-declare-functions-inline-that-aren-t-always-de.patch
deleted file mode 100644
index 33f714d8..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/nyan/0003-Don-t-declare-functions-inline-that-aren-t-always-de.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 9d747549141e710c324968636522e57fe4ba9445 Mon Sep 17 00:00:00 2001
-From: Paul Kocialkowski <contact@paulk.fr>
-Date: Wed, 20 Jul 2016 16:27:05 +0200
-Subject: [PATCH 3/4] Don't declare functions inline that aren't always defined
- as such
-
-This is based on commit 960cf45b3ffe88e842c27145e7e646d63a89c371
-(Don't declare functions inline that aren't always defined as such)
----
- include/task.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/include/task.h b/include/task.h
-index 00368fb..52827e9 100644
---- a/include/task.h
-+++ b/include/task.h
-@@ -47,7 +47,7 @@ void interrupt_enable(void);
- /**
-  * Return true if we are in interrupt context.
-  */
--inline int in_interrupt_context(void);
-+int in_interrupt_context(void);
- 
- /**
-  * Set a task event.
--- 
-2.9.0
-
diff --git a/i18n/fr_FR/projects/cros-ec/patches/nyan/0004-cortex-m-Use-assembly-exception-handler-and-routine-.patch b/i18n/fr_FR/projects/cros-ec/patches/nyan/0004-cortex-m-Use-assembly-exception-handler-and-routine-.patch
deleted file mode 100644
index 88148eb4..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/nyan/0004-cortex-m-Use-assembly-exception-handler-and-routine-.patch
+++ /dev/null
@@ -1,230 +0,0 @@
-From f7d7b22a9e711783c99be55b2c1c437a6808f24d Mon Sep 17 00:00:00 2001
-From: Paul Kocialkowski <contact@paulk.fr>
-Date: Sat, 23 Jul 2016 15:51:58 +0200
-Subject: [PATCH 4/4] cortex-m: Use assembly exception handler and routine for
- task switching
-
-The way Cortex processors handle exceptions allows writing exception
-routines directly in C, as return from exception is handled by providing
-a special value for the link register.
-
-However, it is not safe to do this when doing context switching. In
-particular, C handlers may push some general-purpose registers that
-are used by the handler and pop them later, even when context switch
-has happened in the meantime. While the processor will restore {r0-r3}
-from the stack when returning from an exception, the C handler code
-may push, use and pop another register, clobbering the value resulting
-from the context switch.
-
-For this reason, it is safer to have assembly routines for exception
-handlers that do context switching.
-
-BUG=chromium:631514
-BRANCH=None
-TEST=Build and run big EC with a recent GCC version
-
-Change-Id: Ia356321021731e6e372af152c962d8f01c065da5
-Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
----
- core/cortex-m/switch.S | 90 +++++++++++++++++++++++++++++++++++---------------
- core/cortex-m/task.c   | 28 ++++------------
- 2 files changed, 69 insertions(+), 49 deletions(-)
-
-diff --git a/core/cortex-m/switch.S b/core/cortex-m/switch.S
-index 92c7e51..80a99c8 100644
---- a/core/cortex-m/switch.S
-+++ b/core/cortex-m/switch.S
-@@ -13,6 +13,48 @@
- .code 16
- 
- /**
-+ * Start the task scheduling.  r0 is a pointer to task_stack_ready, which is
-+ * set to 1 after the task stack is set up.
-+ */
-+.global __task_start
-+.thumb_func
-+__task_start:
-+  ldr r2,=scratchpad     @ area used as dummy thread stack for the first switch
-+#ifdef CONFIG_FPU
-+  mov r3, #6             @ use : priv. mode / thread stack / floating point on
-+#else
-+  mov r3, #2             @ use : priv. mode / thread stack / no floating point
-+#endif
-+  add r2, #17*4          @ put the pointer at the top of the stack
-+  mov r1, #0             @ __Schedule parameter : re-schedule nothing
-+  msr psp, r2            @ setup a thread stack up to the first context switch
-+  mov r2, #1
-+  isb                    @ ensure the write is done
-+  msr control, r3
-+  mov r3, r0
-+  mov r0, #0             @ __Schedule parameter : de-schedule nothing
-+  isb                    @ ensure the write is done
-+  str r2, [r3]           @ Task scheduling is now active
-+  bl __schedule          @ execute the task with the highest priority
-+  /* we should never return here */
-+  mov r0, #1             @ set to EC_ERROR_UNKNOWN
-+  bx lr
-+
-+/**
-+ * SVC exception handler
-+ */
-+.global svc_handler
-+.thumb_func
-+svc_handler:
-+  push {lr}                  @ save link register
-+  bl __svc_handler           @ call svc handler helper
-+  ldr r3,=current_task       @ load the current task's address
-+  ldr r1, [r3]               @ load the current task
-+  cmp r0, r1                 @ compare with previous task returned by helper
-+  beq svc_handler_return     @ return if they are the same
-+  /* continue to __switchto to switch to the new task */
-+
-+/**
-  * Task context switching
-  *
-  * Change the task scheduled after returning from the exception.
-@@ -30,8 +72,6 @@
-  *     r0, r1, r2, r3, r12, lr, pc, psr, r4, r5, r6, r7, r8, r9, r10, r11
-  *       exception frame              <|> additional registers
-  */
--.global __switchto
--.thumb_func
- __switchto:
-   mrs r3, psp            @ get the task stack where the context has been saved
-   ldr r2, [r1]           @ get the new scheduled task stack pointer
-@@ -39,33 +79,29 @@ __switchto:
-   ldmia r2!, {r4-r11}    @ restore r4-r11 for the next task context
-   str r3, [r0]           @ save the task stack pointer in its context
-   msr psp, r2            @ set the process stack pointer to exception context
--  bx lr                  @ return from exception
-+
-+svc_handler_return:
-+  pop {pc}               @ return from exception or return to caller
- 
- /**
-- * Start the task scheduling.  r0 is a pointer to task_stack_ready, which is
-- * set to 1 after the task stack is set up.
-+ * Resched task if needed:
-+ * Continue iff a rescheduling event happened or profiling is active,
-+ * and we are not called from another exception.
-  */
--.global __task_start
-+.global task_resched_if_needed
- .thumb_func
--__task_start:
--  ldr r2,=scratchpad     @ area used as dummy thread stack for the first switch
--#ifdef CONFIG_FPU
--  mov r3, #6             @ use : priv. mode / thread stack / floating point on
--#else
--  mov r3, #2             @ use : priv. mode / thread stack / no floating point
--#endif
--  add r2, #17*4          @ put the pointer at the top of the stack
--  mov r1, #0             @ __Schedule parameter : re-schedule nothing
--  msr psp, r2            @ setup a thread stack up to the first context switch
--  mov r2, #1
--  isb                    @ ensure the write is done
--  msr control, r3
--  mov r3, r0
--  mov r0, #0             @ __Schedule parameter : de-schedule nothing
--  isb                    @ ensure the write is done
--  str r2, [r3]           @ Task scheduling is now active
--  bl __schedule          @ execute the task with the highest priority
--  /* we should never return here */
--  mov r0, #1             @ set to EC_ERROR_UNKNOWN
--  bx lr
-+task_resched_if_needed:
-+  push {lr}                                 @ save link register
-+  ldr r3,=need_resched_or_profiling         @ load need's address
-+  ldr r1, [r3]                              @ load need
-+  cbz r1, task_resched_if_needed_return     @ return if there is no need
-+  and r0, #0xf                              @ called from another exception
-+  cmp r0, #1                                @ check bit
-+  beq task_resched_if_needed_return         @ return if called from exception
-+  movs r1, #0                               @ desched nothing
-+  movs r0, #0                               @ resched nothing
-+  bl svc_handler                            @ re-schedule the highest priority
-+                                            @ task
- 
-+task_resched_if_needed_return:
-+  pop {pc}                                  @ return to caller
-diff --git a/core/cortex-m/task.c b/core/cortex-m/task.c
-index bfb3a9b..9935a28 100644
---- a/core/cortex-m/task.c
-+++ b/core/cortex-m/task.c
-@@ -57,7 +57,6 @@ static uint32_t task_switches;   /* Number of times active task changed */
- static uint32_t irq_dist[CONFIG_IRQ_COUNT];  /* Distribution of IRQ calls */
- #endif
- 
--extern void __switchto(task_ *from, task_ *to);
- extern int __task_start(int *task_stack_ready);
- 
- #ifndef CONFIG_LOW_POWER_IDLE
-@@ -124,7 +123,7 @@ uint32_t scratchpad[17+18];
- uint32_t scratchpad[17];
- #endif
- 
--static task_ *current_task = (task_ *)scratchpad;
-+task_ *current_task = (task_ *)scratchpad;
- 
- /*
-  * Should IRQs chain to svc_handler()?  This should be set if either of the
-@@ -137,7 +136,7 @@ static task_ *current_task = (task_ *)scratchpad;
-  * task unblocking.  After checking for a task switch, svc_handler() will clear
-  * the flag (unless profiling is also enabled; then the flag remains set).
-  */
--static int need_resched_or_profiling;
-+int need_resched_or_profiling;
- 
- /*
-  * Bitmap of all tasks ready to be run.
-@@ -197,7 +196,7 @@ int task_start_called(void)
- /**
-  * Scheduling system call
-  */
--void svc_handler(int desched, task_id_t resched)
-+task_ *__svc_handler(int desched, task_id_t resched)
- {
- 	task_ *current, *next;
- #ifdef CONFIG_TASK_PROFILING
-@@ -264,16 +263,13 @@ void svc_handler(int desched, task_id_t resched)
- 	need_resched_or_profiling = 0;
- #endif
- 
--	/* Nothing to do */
--	if (next == current)
--		return;
--
- 	/* Switch to new task */
- #ifdef CONFIG_TASK_PROFILING
--	task_switches++;
-+	if (next != current)
-+		task_switches++;
- #endif
- 	current_task = next;
--	__switchto(current, next);
-+	return current;
- }
- 
- void __schedule(int desched, int resched)
-@@ -313,18 +309,6 @@ void task_start_irq_handler(void *excep_return)
- }
- #endif
- 
--void task_resched_if_needed(void *excep_return)
--{
--	/*
--	 * Continue iff a rescheduling event happened or profiling is active,
--	 * and we are not called from another exception.
--	 */
--	if (!need_resched_or_profiling || (((uint32_t)excep_return & 0xf) == 1))
--		return;
--
--	svc_handler(0, 0);
--}
--
- static uint32_t __wait_evt(int timeout_us, task_id_t resched)
- {
- 	task_ *tsk = current_task;
--- 
-2.9.0
-
diff --git a/i18n/fr_FR/projects/cros-ec/patches/veyron/0001-ec-fix-a-clang-warning-by-use-a-unused-variable.patch b/i18n/fr_FR/projects/cros-ec/patches/veyron/0001-ec-fix-a-clang-warning-by-use-a-unused-variable.patch
deleted file mode 100644
index 82d6de83..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/veyron/0001-ec-fix-a-clang-warning-by-use-a-unused-variable.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 35987639080ef4293bffbc1ce21de4d8a35b41db Mon Sep 17 00:00:00 2001
-From: Yunlian Jiang <yunlian@google.com>
-Date: Mon, 20 Apr 2015 09:38:56 -0700
-Subject: [PATCH 1/6] ec: fix a clang warning by use a unused variable.
-
-This uses the variable 'usage' in an error message to fix a clang
-warning.
-
-BUG=chromium:475960
-TEST=CC=x86_64-cros-linux-gnu-clang emerge-falco ec-devutils
-BRANCH=none
-Signed-off-by: yunlian@chromium.org
-
-Change-Id: Ic5703636040805661c7b81b83fc182e127ceab8c
-Reviewed-on: https://chromium-review.googlesource.com/266404
-Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
-Tested-by: Yunlian Jiang <yunlian@chromium.org>
-Commit-Queue: Yunlian Jiang <yunlian@chromium.org>
----
- util/lbcc.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/lbcc.c b/util/lbcc.c
-index b34b21e..953f422 100644
---- a/util/lbcc.c
-+++ b/util/lbcc.c
-@@ -630,7 +630,7 @@ int main(int argc, char *argv[])
- 	}
- 
- 	if (errorcnt) {
--		fprintf(stderr, "\nUsage:  %s [options] ...\n\n", progname);
-+		fprintf(stderr, usage, progname);
- 		exit(1);
- 	}
- 
--- 
-2.9.0
-
diff --git a/i18n/fr_FR/projects/cros-ec/patches/veyron/0002-use-_DEFAULT_SOURCE-for-newer-glibc.patch b/i18n/fr_FR/projects/cros-ec/patches/veyron/0002-use-_DEFAULT_SOURCE-for-newer-glibc.patch
deleted file mode 100644
index 7da2c967..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/veyron/0002-use-_DEFAULT_SOURCE-for-newer-glibc.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From d2f946caf27adf4518cb657da39e296366d0b53f Mon Sep 17 00:00:00 2001
-From: Mike Frysinger <vapier@chromium.org>
-Date: Mon, 7 Dec 2015 21:46:13 -0500
-Subject: [PATCH 2/6] use _DEFAULT_SOURCE for newer glibc
-
-Newer versions of glibc have moved to _DEFAULT_SOURCE and away from
-_BSD_SOURCE.  Trying to use the BSD define by itself leads to warnings
-which causes build failures.
-
-BRANCH=none
-BUG=None
-TEST=precq still works
-
-Signed-off-by: Mike Frysinger <vapier@chromium.org>
-Change-Id: Ice24b84dc6a540695fc7b76e8f22a4c85c301976
-Reviewed-on: https://chromium-review.googlesource.com/316730
-Reviewed-by: Bill Richardson <wfrichar@chromium.org>
----
- util/ec_uartd.c | 3 ++-
- util/stm32mon.c | 3 ++-
- 2 files changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/util/ec_uartd.c b/util/ec_uartd.c
-index 82823c4..678932e 100644
---- a/util/ec_uartd.c
-+++ b/util/ec_uartd.c
-@@ -11,7 +11,8 @@
-  */
- 
- /* Force header files to define grantpt(), posix_openpt(), cfmakeraw() */
--#define _BSD_SOURCE
-+#define _DEFAULT_SOURCE /* Newer glibc */
-+#define _BSD_SOURCE     /* Older glibc */
- #define _XOPEN_SOURCE 600
- /* Force header file to declare ptsname_r(), etc. */
- #ifndef _GNU_SOURCE
-diff --git a/util/stm32mon.c b/util/stm32mon.c
-index 2de9400..ed1a7ee 100644
---- a/util/stm32mon.c
-+++ b/util/stm32mon.c
-@@ -13,7 +13,8 @@
-  */
- 
- /* use cfmakeraw() */
--#define _BSD_SOURCE
-+#define _DEFAULT_SOURCE /* Newer glibc */
-+#define _BSD_SOURCE     /* Older glibc */
- 
- #include <arpa/inet.h>
- #include <errno.h>
--- 
-2.9.0
-
diff --git a/i18n/fr_FR/projects/cros-ec/patches/veyron/0003-Enforce-compilation-without-system-headers.patch b/i18n/fr_FR/projects/cros-ec/patches/veyron/0003-Enforce-compilation-without-system-headers.patch
deleted file mode 100644
index a97aa901..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/veyron/0003-Enforce-compilation-without-system-headers.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 63bb6f6effbaae9864366588464a7b9354c9a623 Mon Sep 17 00:00:00 2001
-From: Paul Kocialkowski <contact@paulk.fr>
-Date: Wed, 20 Jul 2016 16:26:32 +0200
-Subject: [PATCH 3/6] Enforce compilation without system headers
-
-This is based on commit bc404c94b4ab1e6a62e607fd7ef034aa31d6388e
-(Enforce compilation without system headers)
----
- Makefile           | 5 +++--
- Makefile.toolchain | 2 +-
- 2 files changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/Makefile b/Makefile
-index 01581fb..195ea44 100644
---- a/Makefile
-+++ b/Makefile
-@@ -99,8 +99,9 @@ _rw_size_str:=$(shell echo "CONFIG_FW_RW_SIZE" | $(CPP) $(CPPFLAGS) -P \
- _rw_size:=$(shell echo "$$(($(_rw_size_str)))")
- 
- # Get RSA key size from board defines
--_rsa_size:=$(shell echo "CONFIG_RSA_KEY_SIZE" | $(CPP) $(CPPFLAGS) -P \
--            -Ichip/$(CHIP) -Iboard/$(BOARD) -imacros include/rsa.h)
-+_rsa_size:=$(shell echo "CONFIG_RSA_KEY_SIZE" | $(CPP) $(CPPFLAGS) \
-+            $(CFLAGS_WARN) -P -Ichip/$(CHIP) -Iboard/$(BOARD) \
-+            -imacros include/rsa.h)
- $(eval RSA_KEY_SIZE=$(_rsa_size))
- 
- $(eval BOARD_$(UC_BOARD)=y)
-diff --git a/Makefile.toolchain b/Makefile.toolchain
-index 43f390c..898129c 100644
---- a/Makefile.toolchain
-+++ b/Makefile.toolchain
-@@ -19,7 +19,7 @@ BUILDCC?=gcc
- HOSTCC?=$(HOST_CROSS_COMPILE)gcc
- 
- CFLAGS_WARN=-Wall -Werror -Wundef -Wstrict-prototypes -Wno-trigraphs      \
--            -fno-strict-aliasing -fno-common                              \
-+            -fno-strict-aliasing -fno-common -ffreestanding -fno-builtin  \
-             -Werror-implicit-function-declaration -Wno-format-security    \
-             -fno-delete-null-pointer-checks -Wdeclaration-after-statement \
-             -Wno-pointer-sign -fno-strict-overflow -fconserve-stack
--- 
-2.9.0
-
diff --git a/i18n/fr_FR/projects/cros-ec/patches/veyron/0004-Don-t-declare-functions-inline-that-aren-t-always-de.patch b/i18n/fr_FR/projects/cros-ec/patches/veyron/0004-Don-t-declare-functions-inline-that-aren-t-always-de.patch
deleted file mode 100644
index f089dbe9..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/veyron/0004-Don-t-declare-functions-inline-that-aren-t-always-de.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 3515f1d744cbcdb37471e898277aa6b1ddd3d0ee Mon Sep 17 00:00:00 2001
-From: Paul Kocialkowski <contact@paulk.fr>
-Date: Wed, 20 Jul 2016 16:27:05 +0200
-Subject: [PATCH 4/6] Don't declare functions inline that aren't always defined
- as such
-
-This is based on commit 960cf45b3ffe88e842c27145e7e646d63a89c371
-(Don't declare functions inline that aren't always defined as such)
----
- include/task.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/include/task.h b/include/task.h
-index cb96281..85d5b00 100644
---- a/include/task.h
-+++ b/include/task.h
-@@ -47,7 +47,7 @@ void interrupt_enable(void);
- /**
-  * Return true if we are in interrupt context.
-  */
--inline int in_interrupt_context(void);
-+int in_interrupt_context(void);
- 
- /**
-  * Set a task event.
--- 
-2.9.0
-
diff --git a/i18n/fr_FR/projects/cros-ec/patches/veyron/0005-cortex-m0-Use-assembly-exception-handlers-for-task-s.patch b/i18n/fr_FR/projects/cros-ec/patches/veyron/0005-cortex-m0-Use-assembly-exception-handlers-for-task-s.patch
deleted file mode 100644
index b70e471e..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/veyron/0005-cortex-m0-Use-assembly-exception-handlers-for-task-s.patch
+++ /dev/null
@@ -1,239 +0,0 @@
-From 27501308493bf2adadfc3b133fd1d6f4b4feec12 Mon Sep 17 00:00:00 2001
-From: Paul Kocialkowski <contact@paulk.fr>
-Date: Sat, 23 Jul 2016 14:17:32 +0200
-Subject: [PATCH] cortex-m0: Use assembly exception handlers for task switching
-
-The way Cortex processors handle exceptions allows writing exception
-routines directly in C, as return from exception is handled by providing
-a special value for the link register.
-
-However, it is not safe to do this when doing context switching. In
-particular, C handlers may push some general-purpose registers that
-are used by the handler and pop them later, even when context switch
-has happened in the meantime. While the processor will restore {r0-r3}
-from the stack when returning from an exception, the C handler code
-may push, use and pop another register, such as r4.
-
-It turns out that GCC 4.8 would generally only use r3 in svc_handler and
-pendsv_handler, but newer versions tend to use r4, thus clobbering r4
-that was restored from the context switch and leading up to a fault
-when r4 is used by the task code.
-
-An occurrence of this behaviour takes place with GCC > 4.8 in __wait_evt,
-where "me" is stored in r4, which gets clobbered after an exception
-triggers pendsv_handler. The exception handler uses r4 internally, does
-a context switch and then restores the previous value of r4, which is
-not restored by the processor's internal, thus clobbering r4.
-This ends up with the following assertion failure:
-'tskid < TASK_ID_COUNT' in timer_cancel() at common/timer.c:137
-
-For this reason, it is safer to have assembly routines for exception
-handlers that do context switching.
-
-BUG=chromium:631514
-BRANCH=None
-TEST=Build and run speedy EC with a recent GCC version
-
-Change-Id: Ib068bc12ce2204aee3e0f563efcb94f15aa87013
-Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
----
-
-diff --git a/core/cortex-m0/switch.S b/core/cortex-m0/switch.S
-index 95ea29e..d4b47cd 100644
---- a/core/cortex-m0/switch.S
-+++ b/core/cortex-m0/switch.S
-@@ -7,55 +7,14 @@
- 
- #include "config.h"
- 
-+#define CPU_SCB_ICSR		0xe000ed04
-+
- .text
- 
- .syntax unified
- .code 16
- 
- /**
-- * Task context switching
-- *
-- * Change the task scheduled after returning from the exception.
-- *
-- * Save the registers of the current task below the exception context on
-- * its task, then restore the live registers of the next task and set the
-- * process stack pointer to the new stack.
-- *
-- * r0: pointer to the task to switch from
-- * r1: pointer to the task to switch to
-- *
-- * must be called from interrupt context
-- *
-- * the structure of the saved context on the stack is :
-- *     r8, r9, r10, r11, r4, r5, r6, r7, r0, r1, r2, r3, r12, lr, pc, psr
-- *     additional registers            <|> exception frame
-- */
--.global __switchto
--.thumb_func
--__switchto:
--  mrs r2, psp            @ get the task stack where the context has been saved
--  mov r3, sp
--  mov sp, r2
--  push {r4-r7}           @ save additional r4-r7 in the task stack
--  mov r4, r8
--  mov r5, r9
--  mov r6, r10
--  mov r7, r11
--  push {r4-r7}           @ save additional r8-r11 in the task stack
--  mov r2, sp             @ prepare to save former task stack pointer
--  mov sp, r3             @ restore system stack pointer
--  str r2, [r0]           @ save the task stack pointer in its context
--  ldr r2, [r1]           @ get the new scheduled task stack pointer
--  ldmia r2!, {r4-r7}     @ restore r8-r11 for the next task context
--  mov r8, r4
--  mov r9, r5
--  mov r10, r6
--  mov r11, r7
--  ldmia r2!, {r4-r7}     @ restore r4-r7 for the next task context
--  msr psp, r2            @ set the process stack pointer to exception context
--  bx lr                  @ return from exception
--
--/**
-  * Start the task scheduling.  r0 is a pointer to task_stack_ready, which is
-  * set to 1 after the task stack is set up.
-  */
-@@ -79,3 +38,77 @@
-   movs r0, #1             @ set to EC_ERROR_UNKNOWN
-   bx lr
- 
-+/**
-+ * SVC exception handler
-+ */
-+.global svc_handler
-+.thumb_func
-+svc_handler:
-+  push {lr}                  @ save link register
-+  bl __svc_handler           @ call svc handler helper
-+  ldr r3,=current_task       @ load the current task's address
-+  ldr r1, [r3]               @ load the current task
-+  cmp r0, r1                 @ compare with previous task returned by helper
-+  beq svc_handler_return     @ return if they are the same
-+  /* continue to __switchto to switch to the new task */
-+
-+/**
-+ * Task context switching
-+ *
-+ * Change the task scheduled after returning from the exception.
-+ *
-+ * Save the registers of the current task below the exception context on
-+ * its task, then restore the live registers of the next task and set the
-+ * process stack pointer to the new stack.
-+ *
-+ * r0: pointer to the task to switch from
-+ * r1: pointer to the task to switch to
-+ *
-+ * must be called from interrupt context
-+ *
-+ * the structure of the saved context on the stack is :
-+ *     r8, r9, r10, r11, r4, r5, r6, r7, r0, r1, r2, r3, r12, lr, pc, psr
-+ *     additional registers            <|> exception frame
-+ */
-+__switchto:
-+  mrs r2, psp            @ get the task stack where the context has been saved
-+  mov r3, sp
-+  mov sp, r2
-+  push {r4-r7}           @ save additional r4-r7 in the task stack
-+  mov r4, r8
-+  mov r5, r9
-+  mov r6, r10
-+  mov r7, r11
-+  push {r4-r7}           @ save additional r8-r11 in the task stack
-+  mov r2, sp             @ prepare to save former task stack pointer
-+  mov sp, r3             @ restore system stack pointer
-+  str r2, [r0]           @ save the task stack pointer in its context
-+  ldr r2, [r1]           @ get the new scheduled task stack pointer
-+  ldmia r2!, {r4-r7}     @ restore r8-r11 for the next task context
-+  mov r8, r4
-+  mov r9, r5
-+  mov r10, r6
-+  mov r11, r7
-+  ldmia r2!, {r4-r7}     @ restore r4-r7 for the next task context
-+  msr psp, r2            @ set the process stack pointer to exception context
-+
-+svc_handler_return:
-+  pop {pc}               @ return from exception or return to caller
-+
-+/**
-+ * PendSVC exception handler
-+ */
-+.global pendsv_handler
-+.thumb_func
-+pendsv_handler:
-+  push {lr}                  @ save link register
-+  ldr r0, =#CPU_SCB_ICSR     @ load CPU_SCB_ICSR's address
-+  movs r1, #1                @ prepare left shift (1 << 27)
-+  lsls r1, #27               @ shift the bit
-+  str r1, [r0]               @ clear pending flag
-+  cpsid i                    @ ensure we have priority 0 during re-scheduling
-+  movs r1, #0                @ desched nothing
-+  movs r0, #0                @ resched nothing
-+  bl svc_handler             @ re-schedule the highest priority task
-+  cpsie i                    @ leave priority 0
-+  pop {pc}                   @ return from exception
-diff --git a/core/cortex-m0/task.c b/core/cortex-m0/task.c
-index 5d219a5..0261261 100644
---- a/core/cortex-m0/task.c
-+++ b/core/cortex-m0/task.c
-@@ -59,7 +59,6 @@
- static uint32_t irq_dist[CONFIG_IRQ_COUNT];  /* Distribution of IRQ calls */
- #endif
- 
--extern void __switchto(task_ *from, task_ *to);
- extern int __task_start(int *task_stack_ready);
- 
- #ifndef CONFIG_LOW_POWER_IDLE
-@@ -124,7 +123,7 @@
- /* Reserve space to discard context on first context switch. */
- uint32_t scratchpad[17];
- 
--static task_ *current_task = (task_ *)scratchpad;
-+task_ *current_task = (task_ *)scratchpad;
- 
- /*
-  * Bitmap of all tasks ready to be run.
-@@ -254,18 +253,6 @@
- 	return current;
- }
- 
--void svc_handler(int desched, task_id_t resched)
--{
--	/*
--	 * The layout of the this routine (and the __svc_handler companion one)
--	 * ensures that we are getting the right tail call optimization from
--	 * the compiler.
--	 */
--	task_ *prev = __svc_handler(desched, resched);
--	if (current_task != prev)
--		__switchto(prev, current_task);
--}
--
- void __schedule(int desched, int resched)
- {
- 	register int p0 asm("r0") = desched;
-@@ -274,18 +261,6 @@
- 	asm("svc 0" : : "r"(p0), "r"(p1));
- }
- 
--void pendsv_handler(void)
--{
--	/* Clear pending flag */
--	CPU_SCB_ICSR = (1 << 27);
--
--	/* ensure we have priority 0 during re-scheduling */
--	__asm__ __volatile__("cpsid i");
--	/* re-schedule the highest priority task */
--	svc_handler(0, 0);
--	__asm__ __volatile__("cpsie i");
--}
--
- #ifdef CONFIG_TASK_PROFILING
- void task_start_irq_handler(void *excep_return)
- {
diff --git a/i18n/fr_FR/projects/cros-ec/patches/veyron/0006-Remove-duplicate-consts-declaration-specifiers.patch b/i18n/fr_FR/projects/cros-ec/patches/veyron/0006-Remove-duplicate-consts-declaration-specifiers.patch
deleted file mode 100644
index f04e2f27..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/veyron/0006-Remove-duplicate-consts-declaration-specifiers.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 48acbee142ed1712ecdd4e5338f2a2d46bfbb1f3 Mon Sep 17 00:00:00 2001
-From: Andrew Robbins <contact@andrewrobbins.info>
-Date: Thu, 15 Nov 2018 18:43:07 -0500
-Subject: [PATCH] Remove duplicate consts declaration specifiers
-
----
- util/comm-dev.c | 2 +-
- util/ectool.c   | 2 +-
- util/lbcc.c     | 6 +++---
- 3 files changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/util/comm-dev.c b/util/comm-dev.c
-index cdbbbdf..0fb4027 100644
---- a/util/comm-dev.c
-+++ b/util/comm-dev.c
-@@ -23,7 +23,7 @@ static int fd = -1;
- #define ARRAY_SIZE(t) (sizeof(t) / sizeof(t[0]))
- #endif
- 
--static const char const *meanings[] = {
-+static const char *meanings[] = {
- 	"SUCCESS",
- 	"INVALID_COMMAND",
- 	"ERROR",
-diff --git a/util/ectool.c b/util/ectool.c
-index 9ba8de9..74e6366 100644
---- a/util/ectool.c
-+++ b/util/ectool.c
-@@ -5199,7 +5199,7 @@ static int cmd_tmp006cal_v1(int idx, int argc, char *argv[])
- 	int i, rv, cmdsize;
- 
- 	/* Algorithm 1 parameter names */
--	static const char const *alg1_pname[] = {
-+	static const char *alg1_pname[] = {
- 		"s0", "a1", "a2", "b0", "b1", "b2", "c2",
- 		"d0", "d1", "ds", "e0", "e1",
- 	};
-diff --git a/util/lbcc.c b/util/lbcc.c
-index b34b21e..eb8a7e1 100644
---- a/util/lbcc.c
-+++ b/util/lbcc.c
-@@ -81,15 +81,15 @@ static const int num_operands[] = {
- 
- #define OP(NAME, BYTES, MNEMONIC) MNEMONIC,
- #include "lightbar_opcode_list.h"
--static const char const *opcode_sym[] = {
-+static const char *opcode_sym[] = {
- 	LIGHTBAR_OPCODE_TABLE
- };
- #undef OP
- 
--static const char const *control_sym[] = {
-+static const char *control_sym[] = {
- 	"beg", "end", "phase", "<invalid>"
- };
--static const char const *color_sym[] = {
-+static const char *color_sym[] = {
- 	"r", "g", "b", "<invalid>"
- };
- 
--- 
-2.7.4
-
diff --git a/i18n/fr_FR/projects/cros-ec/patches/veyron/0007-Remove-unused-SHA256_digestinfo-declaration.patch b/i18n/fr_FR/projects/cros-ec/patches/veyron/0007-Remove-unused-SHA256_digestinfo-declaration.patch
deleted file mode 100644
index 4f811727..00000000
--- a/i18n/fr_FR/projects/cros-ec/patches/veyron/0007-Remove-unused-SHA256_digestinfo-declaration.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From c4b1a9b5547321126658be2b418edc5b86010e3a Mon Sep 17 00:00:00 2001
-From: Andrew Robbins <contact@andrewrobbins.info>
-Date: Thu, 15 Nov 2018 18:54:57 -0500
-Subject: [PATCH] Remove unused SHA256_digestinfo declaration
-
----
- common/sha256.c | 8 --------
- 1 file changed, 8 deletions(-)
-
-diff --git a/common/sha256.c b/common/sha256.c
-index e8f9f18..7e74a7f 100644
---- a/common/sha256.c
-+++ b/common/sha256.c
-@@ -104,14 +104,6 @@ static const uint32_t sha256_k[64] = {
- 	0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
- 	0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
- 
--#define SHA256_DIGESTINFO_LEN 19
--
--static const uint8_t SHA256_digestinfo[] = {
--	0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86,
--	0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05,
--	0x00, 0x04, 0x20
--};
--
- void SHA256_init(struct sha256_ctx *ctx)
- {
- 	int i;
--- 
-2.7.4
-