Paper build system initial import into Libreboot

This is the initial import of the Paper build system into Libreboot.
It was written as a flexible and painless replacement for the Libreboot
build system, allowing to support many different configurations.
It currently only supports the following CrOS devices:
* Chromebook 13 CB5-311 (nyan big)
* Chromebook 14 (nyan blaze)
* Chromebook 11 (HiSense) (veyron jerry)
* Chromebit CS10 (veyron mickey)
* Chromebook Flip C100PA (veyron minnie)
* Chromebook C201PA (veyron speedy)

The build system also supports building various tools and provides
various scripts to ease the installation on CrOS devices.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>

4 files changed, 237 insertions, 0 deletions

diff --git a/projects/coreboot/patches/0001-Avoid-using-git-submodules-for-3rdparty.patch b/projects/coreboot/patches/0001-Avoid-using-git-submodules-for-3rdparty.patch
new file mode 100644
index 00000000..2e46141e
--- /dev/null
+++ b/projects/coreboot/patches/0001-Avoid-using-git-submodules-for-3rdparty.patch
@@ -0,0 +1,122 @@
+From 95248477726f4a866b04a760f68930bc5ebd55ff Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Wed, 20 Jul 2016 16:03:30 +0200
+Subject: [PATCH 1/4] Avoid using git submodules for 3rdparty
+
+This gets rid of git submodules entirely, to avoid the nuisance caused
+by automatically checking them out.
+
+Change-Id: I54de09656bd2dd9c308bd6c8dce554945aa8e535
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ .gitmodules                   | 20 --------------------
+ 3rdparty/arm-trusted-firmware |  1 -
+ 3rdparty/blobs                |  1 -
+ 3rdparty/chromeec             |  1 -
+ 3rdparty/libgfxinit           |  1 -
+ 3rdparty/libhwbase            |  1 -
+ 3rdparty/vboot                |  1 -
+ Makefile.inc                  | 11 -----------
+ 8 files changed, 37 deletions(-)
+ delete mode 160000 3rdparty/arm-trusted-firmware
+ delete mode 160000 3rdparty/blobs
+ delete mode 160000 3rdparty/chromeec
+ delete mode 160000 3rdparty/libgfxinit
+ delete mode 160000 3rdparty/libhwbase
+ delete mode 160000 3rdparty/vboot
+
+diff --git a/.gitmodules b/.gitmodules
+index c3270e6..3a617c7 100644
+--- a/.gitmodules
++++ b/.gitmodules
+@@ -1,23 +1,3 @@
+-[submodule "3rdparty/blobs"]
+-	path = 3rdparty/blobs
+-	url = ../blobs.git
+-	update = none
+-	ignore = dirty
+ [submodule "util/nvidia-cbootimage"]
+ 	path = util/nvidia/cbootimage
+ 	url = ../nvidia-cbootimage.git
+-[submodule "vboot"]
+-	path = 3rdparty/vboot
+-	url = ../vboot.git
+-[submodule "arm-trusted-firmware"]
+-	path = 3rdparty/arm-trusted-firmware
+-	url = ../arm-trusted-firmware.git
+-[submodule "3rdparty/chromeec"]
+-	path = 3rdparty/chromeec
+-	url = ../chrome-ec.git
+-[submodule "libhwbase"]
+-	path = 3rdparty/libhwbase
+-	url = ../libhwbase.git
+-[submodule "libgfxinit"]
+-	path = 3rdparty/libgfxinit
+-	url = ../libgfxinit.git
+diff --git a/3rdparty/arm-trusted-firmware b/3rdparty/arm-trusted-firmware
+deleted file mode 160000
+index bfd9251..0000000
+--- a/3rdparty/arm-trusted-firmware
++++ /dev/null
+@@ -1 +0,0 @@
+-Subproject commit bfd925139fdbc2e87979849907b34843aa326994
+diff --git a/3rdparty/blobs b/3rdparty/blobs
+deleted file mode 160000
+index 8090bdd..0000000
+--- a/3rdparty/blobs
++++ /dev/null
+@@ -1 +0,0 @@
+-Subproject commit 8090bdd59853599e469b7503ea473ca12e8c681b
+diff --git a/3rdparty/chromeec b/3rdparty/chromeec
+deleted file mode 160000
+index ea1a869..0000000
+--- a/3rdparty/chromeec
++++ /dev/null
+@@ -1 +0,0 @@
+-Subproject commit ea1a8699e96425806abdd532d04da254ae093f6e
+diff --git a/3rdparty/libgfxinit b/3rdparty/libgfxinit
+deleted file mode 160000
+index 88a7f17..0000000
+--- a/3rdparty/libgfxinit
++++ /dev/null
+@@ -1 +0,0 @@
+-Subproject commit 88a7f17b7d7a4f8a4d25ef6b87c71236b0862f5d
+diff --git a/3rdparty/libhwbase b/3rdparty/libhwbase
+deleted file mode 160000
+index aab715f..0000000
+--- a/3rdparty/libhwbase
++++ /dev/null
+@@ -1 +0,0 @@
+-Subproject commit aab715f166bf1b54cfbd6982e8df49248ea544d8
+diff --git a/3rdparty/vboot b/3rdparty/vboot
+deleted file mode 160000
+index adfafba..0000000
+--- a/3rdparty/vboot
++++ /dev/null
+@@ -1 +0,0 @@
+-Subproject commit adfafba793684ed92965dfbd86b3fb3463975d8c
+diff --git a/Makefile.inc b/Makefile.inc
+index c5ce30f..919a5d4 100644
+--- a/Makefile.inc
++++ b/Makefile.inc
+@@ -183,17 +183,6 @@ ifeq ($(CONFIG_COVERAGE),y)
+ ramstage-c-ccopts += -fprofile-arcs -ftest-coverage
+ endif
+ 
+-ifneq ($(UPDATED_SUBMODULES),1)
+-# try to fetch non-optional submodules if the source is under git
+-forgetthis:=$(if $(GIT),$(shell git submodule update --init))
+-ifeq ($(CONFIG_USE_BLOBS),y)
+-# this is necessary because 3rdparty/blobs is update=none, and so is ignored
+-# unless explicitly requested and enabled through --checkout
+-forgetthis:=$(if $(GIT),$(shell git submodule update --init --checkout 3rdparty/blobs))
+-endif
+-export UPDATED_SUBMODULES:=1
+-endif
+-
+ ramstage-c-deps:=$$(OPTION_TABLE_H)
+ romstage-c-deps:=$$(OPTION_TABLE_H)
+ libverstage-c-deps:=$$(OPTION_TABLE_H)
+-- 
+2.10.2
+
diff --git a/projects/coreboot/patches/0002-libpayload-Update-ARM-CrOS-devices-configuration.patch b/projects/coreboot/patches/0002-libpayload-Update-ARM-CrOS-devices-configuration.patch
new file mode 100644
index 00000000..88f4013a
--- /dev/null
+++ b/projects/coreboot/patches/0002-libpayload-Update-ARM-CrOS-devices-configuration.patch
@@ -0,0 +1,56 @@
+From fc26e7861ec756614e27a82895b60724a8173757 Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 19 Dec 2016 18:03:23 +0100
+Subject: [PATCH 2/4] libpayload: Update ARM CrOS devices configuration
+
+This updates the configuration for ARM CrOS devices (nyans and veyrons)
+by using the CHROMEOS Kconfig option, thus reducing the number of
+options to select. It also brings proper serial console support.
+
+Change-Id: Iffc84c44a1d339c5bb575fbaffc40bc2d56bb6cf
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ payloads/libpayload/configs/config.nyan   | 10 +++-------
+ payloads/libpayload/configs/config.veyron | 10 +++-------
+ 2 files changed, 6 insertions(+), 14 deletions(-)
+
+diff --git a/payloads/libpayload/configs/config.nyan b/payloads/libpayload/configs/config.nyan
+index 6e593e5..caad2b6 100644
+--- a/payloads/libpayload/configs/config.nyan
++++ b/payloads/libpayload/configs/config.nyan
+@@ -1,10 +1,6 @@
+-CONFIG_LP_GPL=y
++CONFIG_LP_CHROMEOS=y
+ CONFIG_LP_ARCH_ARM=y
+-# CONFIG_LP_CURSES is not set
+-CONFIG_LP_SKIP_CONSOLE_INIT=y
+-CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
+-# CONFIG_LP_STORAGE is not set
++CONFIG_LP_8250_SERIAL_CONSOLE=y
+ CONFIG_LP_TIMER_TEGRA_1US=y
+-# CONFIG_LP_USB_OHCI is not set
+-# CONFIG_LP_USB_XHCI is not set
++CONFIG_LP_USB_EHCI=y
+ CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT=y
+diff --git a/payloads/libpayload/configs/config.veyron b/payloads/libpayload/configs/config.veyron
+index 793907f..e80535c 100644
+--- a/payloads/libpayload/configs/config.veyron
++++ b/payloads/libpayload/configs/config.veyron
+@@ -1,11 +1,7 @@
+-CONFIG_LP_GPL=y
++CONFIG_LP_CHROMEOS=y
+ CONFIG_LP_ARCH_ARM=y
+-# CONFIG_LP_CURSES is not set
+-CONFIG_LP_SKIP_CONSOLE_INIT=y
+-CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
+-# CONFIG_LP_STORAGE is not set
+-CONFIG_LP_TIMER_RK=y
+-CONFIG_LP_USB=y
++CONFIG_LP_8250_SERIAL_CONSOLE=y
++CONFIG_LP_TIMER_RK3288=y
+ CONFIG_LP_USB_EHCI=y
+ CONFIG_LP_USB_DWC2=y
+ # CONFIG_LP_USB_HID is not set
+-- 
+2.10.2
+
diff --git a/projects/coreboot/patches/0003-libpayload-Get-current-tick-from-high-register-in-ge.patch b/projects/coreboot/patches/0003-libpayload-Get-current-tick-from-high-register-in-ge.patch
new file mode 100644
index 00000000..4fb09c79
--- /dev/null
+++ b/projects/coreboot/patches/0003-libpayload-Get-current-tick-from-high-register-in-ge.patch
@@ -0,0 +1,32 @@
+From 03a830aad1cdf4325781aa60566bebcf5aa57238 Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 19 Dec 2016 19:22:39 +0100
+Subject: [PATCH 3/4] libpayload: Get current tick from high register in
+ generic timer
+
+This fixes the generic timer driver to get the current tick from the
+high register, so that comparison with the high count value (obtained
+previously from the same register) has a chance to succeed.
+
+Change-Id: I5ce02bfa15a91ad34641b8e24813a5b7ca790ec3
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ payloads/libpayload/drivers/timer/generic.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/payloads/libpayload/drivers/timer/generic.c b/payloads/libpayload/drivers/timer/generic.c
+index 4c06618..ac26f40 100644
+--- a/payloads/libpayload/drivers/timer/generic.c
++++ b/payloads/libpayload/drivers/timer/generic.c
+@@ -53,7 +53,7 @@ uint64_t timer_raw_value(void)
+ 	do {
+ 		count_h = readl(phys_to_virt(CONFIG_LP_TIMER_GENERIC_HIGH_REG));
+ 		count_l = readl(phys_to_virt(CONFIG_LP_TIMER_GENERIC_REG));
+-		cur_tick = readl(phys_to_virt(CONFIG_LP_TIMER_GENERIC_REG));
++		cur_tick = readl(phys_to_virt(CONFIG_LP_TIMER_GENERIC_HIGH_REG));
+ 	} while (cur_tick != count_h);
+ 
+ 	return (cur_tick << 32) + count_l;
+-- 
+2.10.2
+
diff --git a/projects/coreboot/patches/0004-libpayload-Enable-USB-HID-in-veyron-configuration.patch b/projects/coreboot/patches/0004-libpayload-Enable-USB-HID-in-veyron-configuration.patch
new file mode 100644
index 00000000..af00a42d
--- /dev/null
+++ b/projects/coreboot/patches/0004-libpayload-Enable-USB-HID-in-veyron-configuration.patch
@@ -0,0 +1,27 @@
+From 552b999c7b32363cbc51722f33a0de189baf27fe Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 19 Dec 2016 20:23:44 +0100
+Subject: [PATCH 4/4] libpayload: Enable USB HID in veyron configuration
+
+This enables USB HID support in the veyron config, since it seems to
+work correctly and is needed for interaction with depthcharge on devices
+without an embedded keyboard (such as veyron_jerry).
+
+Change-Id: Icae829e3a132005df17bcb6f7e6f8a190912576d
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ payloads/libpayload/configs/config.veyron | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/payloads/libpayload/configs/config.veyron b/payloads/libpayload/configs/config.veyron
+index e80535c..b643e92 100644
+--- a/payloads/libpayload/configs/config.veyron
++++ b/payloads/libpayload/configs/config.veyron
+@@ -4,4 +4,3 @@ CONFIG_LP_8250_SERIAL_CONSOLE=y
+ CONFIG_LP_TIMER_RK3288=y
+ CONFIG_LP_USB_EHCI=y
+ CONFIG_LP_USB_DWC2=y
+-# CONFIG_LP_USB_HID is not set
+-- 
+2.10.2
+