Paper build system initial import into Libreboot

This is the initial import of the Paper build system into Libreboot.
It was written as a flexible and painless replacement for the Libreboot
build system, allowing to support many different configurations.
It currently only supports the following CrOS devices:
* Chromebook 13 CB5-311 (nyan big)
* Chromebook 14 (nyan blaze)
* Chromebook 11 (HiSense) (veyron jerry)
* Chromebit CS10 (veyron mickey)
* Chromebook Flip C100PA (veyron minnie)
* Chromebook C201PA (veyron speedy)

The build system also supports building various tools and provides
various scripts to ease the installation on CrOS devices.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>

4 files changed, 471 insertions, 0 deletions

diff --git a/projects/flashrom/patches/0001-New-laptops-whitelisted-ThinkPad-R400-and-ThinkPad-T.patch b/projects/flashrom/patches/0001-New-laptops-whitelisted-ThinkPad-R400-and-ThinkPad-T.patch
new file mode 100644
index 00000000..f9d51806
--- /dev/null
+++ b/projects/flashrom/patches/0001-New-laptops-whitelisted-ThinkPad-R400-and-ThinkPad-T.patch
@@ -0,0 +1,28 @@
+From 52a0b55c77635dc026793e66d516e3aed335706a Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Fri, 11 Mar 2016 06:35:03 +0000
+Subject: [PATCH 1/1] New laptops whitelisted: ThinkPad R400 and ThinkPad T500
+
+Support for these laptops was merged in coreboot a while ago, so it makes sense
+for flashrom to whitelist them.
+---
+ board_enable.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/board_enable.c b/board_enable.c
+index 7b152d1..1d56203 100644
+--- a/board_enable.c
++++ b/board_enable.c
+@@ -2427,7 +2427,9 @@ const struct board_match board_matches[] = {
+ 	{0x8086, 0x7190,      0,      0,  0x8086, 0x7110,      0,      0, "^SE440BX-2$", NULL, NULL,          P3, "Intel",       "SE440BX-2",             0,   NT, intel_piix4_gpo27_lower},
+ 	{0x1022, 0x7468,      0,      0,  0x1022, 0x7460,      0,      0, NULL,         "iwill", "dk8_htx",   P3, "IWILL",       "DK8-HTX",               0,   OK, w83627hf_gpio24_raise_2e},
+ 	{0x8086, 0x27A0, 0x8086, 0x27a0,  0x8086, 0x27b8, 0x8086, 0x27b8, NULL,        "kontron", "986lcd-m", P3, "Kontron",     "986LCD-M",              0,   OK, board_kontron_986lcd_m},
++    {0x8086, 0x2917, 0x17AA, 0x20F5,  0x8086, 0x2930, 0x17AA, 0x20F9, "^ThinkPad R400", NULL, NULL,      P2, "IBM/Lenovo",  "ThinkPad R400",         0,   OK, p2_whitelist_laptop},
+ 	{0x8086, 0x2917, 0x17AA, 0x20F5,  0x8086, 0x2930, 0x17AA, 0x20F9, "^ThinkPad T400", NULL, NULL,       P2, "IBM/Lenovo",  "ThinkPad T400",         0,   OK, p2_whitelist_laptop},
++    {0x8086, 0x2917, 0x17AA, 0x20F5,  0x8086, 0x2930, 0x17AA, 0x20F9, "^ThinkPad T500", NULL, NULL,      P2, "IBM/Lenovo",  "ThinkPad T500",         0,   OK, p2_whitelist_laptop},
+ 	{0x8086, 0x1E22, 0x17AA, 0x21F6,  0x8086, 0x1E55, 0x17AA, 0x21F6, "^ThinkPad T530", NULL, NULL,       P2, "IBM/Lenovo",  "ThinkPad T530",         0,   OK, p2_whitelist_laptop},
+ 	{0x8086, 0x27a0, 0x17aa, 0x2015,  0x8086, 0x27b9, 0x17aa, 0x2009, "^ThinkPad T60", NULL, NULL,        P2, "IBM/Lenovo",  "ThinkPad T60",          0,   OK, p2_whitelist_laptop},
+ 	{0x8086, 0x27a0, 0x17aa, 0x2017,  0x8086, 0x27b9, 0x17aa, 0x2009, "^ThinkPad T60", NULL, NULL,        P2, "IBM/Lenovo",  "ThinkPad T60(s)",       0,   OK, p2_whitelist_laptop},
+-- 
+1.9.1
+
diff --git a/projects/flashrom/patches/0002-Add-whitelist-for-Taurinus-X200-laptop.patch b/projects/flashrom/patches/0002-Add-whitelist-for-Taurinus-X200-laptop.patch
new file mode 100644
index 00000000..0aa0701b
--- /dev/null
+++ b/projects/flashrom/patches/0002-Add-whitelist-for-Taurinus-X200-laptop.patch
@@ -0,0 +1,24 @@
+From b1828512abf58911cfb829cb6a98d4e8dbefadc2 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Fri, 11 Mar 2016 06:38:39 +0000
+Subject: [PATCH 1/1] Add whitelist for Taurinus X200 laptop
+
+---
+ board_enable.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/board_enable.c b/board_enable.c
+index 1d56203..a71061c 100644
+--- a/board_enable.c
++++ b/board_enable.c
+@@ -2437,6 +2437,7 @@ const struct board_match board_matches[] = {
+ 	{0x8086, 0x3B07, 0x17AA, 0x2166,  0x8086, 0x3B30, 0x17AA, 0x2167, "^Lenovo X201", NULL, NULL,         P2, "IBM/Lenovo",  "ThinkPad X201",         0,   OK, p2_whitelist_laptop},
+ 	{0x8086, 0x1E22, 0x17AA, 0x21FA,  0x8086, 0x1E55, 0x17AA, 0x21FA, "^ThinkPad X230", NULL, NULL,       P2, "IBM/Lenovo",  "ThinkPad X230",         0,   OK, p2_whitelist_laptop},
+ 	{0x8086, 0x27A0, 0x17AA, 0x2017,  0x8086, 0x27B9, 0x17AA, 0x2009, "^ThinkPad X60", NULL, NULL,        P2, "IBM/Lenovo",  "ThinkPad X60(s)",       0,   OK, p2_whitelist_laptop},
++	{0x8086, 0x2917, 0x17AA, 0x20F5,  0x8086, 0x2930, 0x17AA, 0x20F9, "^Taurinus X200", "Libiquity", "Taurinus X200", P2, "Libiquity", "ThinkPad X200", 0, OK, p2_whitelist_laptop},
+ 	{0x8086, 0x2411, 0x8086, 0x2411,  0x8086, 0x7125, 0x0e11, 0xb165, NULL,         NULL, NULL,           P3, "Mitac",       "6513WU",                0,   OK, board_mitac_6513wu},
+ 	{0x8086, 0x8186, 0x8086, 0x8186,  0x8086, 0x8800,      0,      0, "^MSC Vertriebs GmbH$", NULL, NULL, P2, "MSC",         "Q7-TCTC",               0,   OK, p2_not_a_laptop},
+ 	{0x8086, 0x7190,      0,      0,  0x8086, 0x7110,      0,      0, "^MS-6163 (i440BX)$", NULL, NULL,   P3, "MSI",         "MS-6163 (MS-6163 Pro)", 0,   OK, intel_piix4_gpo14_raise},
+-- 
+1.9.1
+
diff --git a/projects/flashrom/patches/0003-purged-chips.patch b/projects/flashrom/patches/0003-purged-chips.patch
new file mode 100644
index 00000000..0dc7e2bc
--- /dev/null
+++ b/projects/flashrom/patches/0003-purged-chips.patch
@@ -0,0 +1,354 @@
+From 260f0e096b385c9f53e9a28e79293131a11122a6 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Fri, 11 Mar 2016 06:50:50 +0000
+Subject: [PATCH 1/1] purged chips
+
+---
+ flashchips.c | 303 -----------------------------------------------------------
+ 1 file changed, 303 deletions(-)
+
+diff --git a/flashchips.c b/flashchips.c
+index 0fc1b7a..5c94304 100644
+--- a/flashchips.c
++++ b/flashchips.c
+@@ -7451,80 +7451,6 @@ const struct flashchip flashchips[] = {
+ 
+ 	{
+ 		.vendor		= "Macronix",
+-		.name		= "MX25L1605",
+-		.bustype	= BUS_SPI,
+-		.manufacture_id	= MACRONIX_ID,
+-		.model_id	= MACRONIX_MX25L1605,
+-		.total_size	= 2048,
+-		.page_size	= 256,
+-		.feature_bits	= FEATURE_WRSR_WREN,
+-		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
+-		.probe_timing	= TIMING_ZERO,
+-		.block_erasers	=
+-		{
+-			{
+-				.eraseblocks = { {64 * 1024, 32} },
+-				.block_erase = spi_block_erase_20,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 32} },
+-				.block_erase = spi_block_erase_d8,
+-			}, {
+-				.eraseblocks = { {2 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_60,
+-			}, {
+-				.eraseblocks = { {2 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_c7,
+-			},
+-		},
+-		.printlock	= spi_prettyprint_status_register_bp2_srwd, /* bit6: error flag */
+-		.unlock		= spi_disable_blockprotect,
+-		.write		= spi_chip_write_256,
+-		.read		= spi_chip_read, /* Fast read (0x0B) supported */
+-		.voltage	= {2700, 3600},
+-	},
+-
+-	{
+-		.vendor		= "Macronix",
+-		.name		= "MX25L1605A/MX25L1606E/MX25L1608E",
+-		.bustype	= BUS_SPI,
+-		.manufacture_id	= MACRONIX_ID,
+-		.model_id	= MACRONIX_MX25L1605,
+-		.total_size	= 2048,
+-		.page_size	= 256,
+-		/* OTP: 64B total; enter 0xB1, exit 0xC1 (MX25L1606E and MX25L1608E only) */
+-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+-		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
+-		.probe_timing	= TIMING_ZERO,
+-		.block_erasers	=
+-		{
+-			{
+-				.eraseblocks = { {4 * 1024, 512} },
+-				.block_erase = spi_block_erase_20,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 32} },
+-				.block_erase = spi_block_erase_52,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 32} },
+-				.block_erase = spi_block_erase_d8,
+-			}, {
+-				.eraseblocks = { {2 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_60,
+-			}, {
+-				.eraseblocks = { {2 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_c7,
+-			},
+-		},
+-		.printlock	= spi_prettyprint_status_register_bp3_srwd, /* MX25L1605A bp2 only */
+-		.unlock		= spi_disable_blockprotect_bp3_srwd,
+-		.write		= spi_chip_write_256,
+-		.read		= spi_chip_read, /* Fast read (0x0B) supported (MX25L1608E supports dual-I/O read) */
+-		.voltage	= {2700, 3600},
+-	},
+-
+-	{
+-		.vendor		= "Macronix",
+ 		.name		= "MX25L1605D/MX25L1608D/MX25L1673E",
+ 		.bustype	= BUS_SPI,
+ 		.manufacture_id	= MACRONIX_ID,
+@@ -7632,41 +7558,6 @@ const struct flashchip flashchips[] = {
+ 
+ 	{
+ 		.vendor		= "Macronix",
+-		.name		= "MX25L3205(A)",
+-		.bustype	= BUS_SPI,
+-		.manufacture_id	= MACRONIX_ID,
+-		.model_id	= MACRONIX_MX25L3205,
+-		.total_size	= 4096,
+-		.page_size	= 256,
+-		.feature_bits	= FEATURE_WRSR_WREN,
+-		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
+-		.probe_timing	= TIMING_ZERO,
+-		.block_erasers	=
+-		{
+-			{
+-				.eraseblocks = { {64 * 1024, 64} },
+-				.block_erase = spi_block_erase_20,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 64} },
+-				.block_erase = spi_block_erase_d8,
+-			}, {
+-				.eraseblocks = { {4 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_60,
+-			}, {
+-				.eraseblocks = { {4 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_c7,
+-			},
+-		},
+-		.printlock	= spi_prettyprint_status_register_bp2_srwd, /* bit6: error flag */
+-		.unlock		= spi_disable_blockprotect,
+-		.write		= spi_chip_write_256,
+-		.read		= spi_chip_read, /* Fast read (0x0B) supported */
+-		.voltage	= {2700, 3600},
+-	},
+-
+-	{
+-		.vendor		= "Macronix",
+ 		.name		= "MX25L3205D/MX25L3208D",
+ 		.bustype	= BUS_SPI,
+ 		.manufacture_id	= MACRONIX_ID,
+@@ -7703,84 +7594,6 @@ const struct flashchip flashchips[] = {
+ 
+ 	{
+ 		.vendor		= "Macronix",
+-		.name		= "MX25L3206E/MX25L3208E",
+-		.bustype	= BUS_SPI,
+-		.manufacture_id	= MACRONIX_ID,
+-		.model_id	= MACRONIX_MX25L3205,
+-		.total_size	= 4096,
+-		.page_size	= 256,
+-		/* OTP: 64B total; enter 0xB1, exit 0xC1 */
+-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+-		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
+-		.probe_timing	= TIMING_ZERO,
+-		.block_erasers	=
+-		{
+-			{
+-				.eraseblocks = { {4 * 1024, 1024} },
+-				.block_erase = spi_block_erase_20,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 64} },
+-				.block_erase = spi_block_erase_d8,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 64} },
+-				.block_erase = spi_block_erase_52,
+-			}, {
+-				.eraseblocks = { {4 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_60,
+-			}, {
+-				.eraseblocks = { {4 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_c7,
+-			},
+-		},
+-		.printlock	= spi_prettyprint_status_register_bp3_srwd,
+-		.unlock		= spi_disable_blockprotect_bp3_srwd,
+-		.write		= spi_chip_write_256,
+-		.read		= spi_chip_read, /* Fast read (0x0B) and dual I/O supported */
+-		.voltage	= {2700, 3600},
+-	},
+-
+-	{
+-		.vendor		= "Macronix",
+-		.name		= "MX25L3273E",
+-		.bustype	= BUS_SPI,
+-		.manufacture_id	= MACRONIX_ID,
+-		.model_id	= MACRONIX_MX25L3205,
+-		.total_size	= 4096,
+-		.page_size	= 256,
+-		/* OTP: 64B total; enter 0xB1, exit 0xC1 */
+-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+-		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
+-		.probe_timing	= TIMING_ZERO,
+-		.block_erasers	=
+-		{
+-			{
+-				.eraseblocks = { {4 * 1024, 1024} },
+-				.block_erase = spi_block_erase_20,
+-			}, {
+-				.eraseblocks = { {32 * 1024, 128} },
+-				.block_erase = spi_block_erase_52,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 64} },
+-				.block_erase = spi_block_erase_d8,
+-			}, {
+-				.eraseblocks = { {4 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_60,
+-			}, {
+-				.eraseblocks = { {4 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_c7,
+-			},
+-		},
+-		.printlock	= spi_prettyprint_status_register_bp3_srwd,
+-		.unlock		= spi_disable_blockprotect_bp3_srwd,
+-		.write		= spi_chip_write_256,
+-		.read		= spi_chip_read, /* Fast read (0x0B) and dual I/O supported */
+-		.voltage	= {2700, 3600},
+-	},
+-
+-	{
+-		.vendor		= "Macronix",
+ 		.name		= "MX25L3235D",
+ 		.bustype	= BUS_SPI,
+ 		.manufacture_id	= MACRONIX_ID,
+@@ -7817,42 +7630,6 @@ const struct flashchip flashchips[] = {
+ 
+ 	{
+ 		.vendor		= "Macronix",
+-		.name		= "MX25L6405",
+-		.bustype	= BUS_SPI,
+-		.manufacture_id	= MACRONIX_ID,
+-		.model_id	= MACRONIX_MX25L6405,
+-		.total_size	= 8192,
+-		.page_size	= 256,
+-		/* Has an additional 512B EEPROM sector */
+-		.feature_bits	= FEATURE_WRSR_WREN,
+-		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
+-		.probe_timing	= TIMING_ZERO,
+-		.block_erasers	=
+-		{
+-			{
+-				.eraseblocks = { {64 * 1024, 128} },
+-				.block_erase = spi_block_erase_20,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 128} },
+-				.block_erase = spi_block_erase_d8,
+-			}, {
+-				.eraseblocks = { {8 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_60,
+-			}, {
+-				.eraseblocks = { {8 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_c7,
+-			}
+-		},
+-		.printlock	= spi_prettyprint_status_register_bp3_srwd, /* bit6: error flag */
+-		.unlock		= spi_disable_blockprotect_bp3_srwd,
+-		.write		= spi_chip_write_256,
+-		.read		= spi_chip_read, /* Fast read (0x0B) supported */
+-		.voltage	= {2700, 3600},
+-	},
+-
+-	{
+-		.vendor		= "Macronix",
+ 		.name		= "MX25L6405D",
+ 		.bustype	= BUS_SPI,
+ 		.manufacture_id	= MACRONIX_ID,
+@@ -7889,86 +7666,6 @@ const struct flashchip flashchips[] = {
+ 
+ 	{
+ 		.vendor		= "Macronix",
+-		.name		= "MX25L6406E/MX25L6408E",
+-		.bustype	= BUS_SPI,
+-		.manufacture_id	= MACRONIX_ID,
+-		.model_id	= MACRONIX_MX25L6405,
+-		.total_size	= 8192,
+-		.page_size	= 256,
+-		/* MX25L6406E supports SFDP */
+-		/* OTP: 06E 64B total; enter 0xB1, exit 0xC1 */
+-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+-		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
+-		.probe_timing	= TIMING_ZERO,
+-		.block_erasers	=
+-		{
+-			{
+-				.eraseblocks = { {4 * 1024, 2048} },
+-				.block_erase = spi_block_erase_20,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 128} },
+-				.block_erase = spi_block_erase_52,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 128} },
+-				.block_erase = spi_block_erase_d8,
+-			}, {
+-				.eraseblocks = { {8 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_60,
+-			}, {
+-				.eraseblocks = { {8 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_c7,
+-			}
+-		},
+-		.printlock	= spi_prettyprint_status_register_bp3_srwd,
+-		.unlock		= spi_disable_blockprotect_bp3_srwd,
+-		.write		= spi_chip_write_256,
+-		.read		= spi_chip_read, /* Fast read (0x0B), dual I/O read supported */
+-		.voltage	= {2700, 3600},
+-	},
+-
+-	{
+-		.vendor		= "Macronix",
+-		.name		= "MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E",
+-		.bustype	= BUS_SPI,
+-		.manufacture_id	= MACRONIX_ID,
+-		.model_id	= MACRONIX_MX25L6405,
+-		.total_size	= 8192,
+-		.page_size	= 256,
+-		/* supports SFDP */
+-		/* OTP: 512B total; enter 0xB1, exit 0xC1 */
+-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+-		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
+-		.probe_timing	= TIMING_ZERO,
+-		.block_erasers	=
+-		{
+-			{
+-				.eraseblocks = { {4 * 1024, 2048} },
+-				.block_erase = spi_block_erase_20,
+-			}, {
+-				.eraseblocks = { {32 * 1024, 256} },
+-				.block_erase = spi_block_erase_52,
+-			}, {
+-				.eraseblocks = { {64 * 1024, 128} },
+-				.block_erase = spi_block_erase_d8,
+-			}, {
+-				.eraseblocks = { {8 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_60,
+-			}, {
+-				.eraseblocks = { {8 * 1024 * 1024, 1} },
+-				.block_erase = spi_block_erase_c7,
+-			}
+-		},
+-		.printlock	= spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */
+-		.unlock		= spi_disable_blockprotect_bp3_srwd,
+-		.write		= spi_chip_write_256,
+-		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+-		.voltage	= {2700, 3600},
+-	},
+-
+-	{
+-		.vendor		= "Macronix",
+ 		.name		= "MX25L12805D",
+ 		.bustype	= BUS_SPI,
+ 		.manufacture_id	= MACRONIX_ID,
+-- 
+1.9.1
+
diff --git a/projects/flashrom/patches/lenovobios/0001-Lenovobios-adaptation-for-Macronix-and-SST-chips.patch b/projects/flashrom/patches/lenovobios/0001-Lenovobios-adaptation-for-Macronix-and-SST-chips.patch
new file mode 100644
index 00000000..1cb843c9
--- /dev/null
+++ b/projects/flashrom/patches/lenovobios/0001-Lenovobios-adaptation-for-Macronix-and-SST-chips.patch
@@ -0,0 +1,65 @@
+From aa2dd05f61f6ca91212d7f6d4055486af6e01436 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Fri, 5 Aug 2016 22:40:49 +0200
+Subject: [PATCH] Lenovobios adaptation for Macronix and SST chips
+
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ flashchips.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/flashchips.c b/flashchips.c
+index e5ea181..f3a017c 100644
+--- a/flashchips.c
++++ b/flashchips.c
+@@ -7454,12 +7454,12 @@ const struct flashchip flashchips[] = {
+ 		.name		= "MX25L1605D/MX25L1608D/MX25L1673E",
+ 		.bustype	= BUS_SPI,
+ 		.manufacture_id	= MACRONIX_ID,
+-		.model_id	= MACRONIX_MX25L1605,
++		.model_id	= 0x14,
+ 		.total_size	= 2048,
+ 		.page_size	= 256,
+ 		.feature_bits	= FEATURE_WRSR_WREN,
+ 		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
++		.probe		= probe_spi_res1,
+ 		.probe_timing	= TIMING_ZERO,
+ 		.block_erasers	=
+ 		{
+@@ -9857,7 +9857,7 @@ const struct flashchip flashchips[] = {
+ 		},
+ 		.printlock	= spi_prettyprint_status_register_bp2_srwd,
+ 		.unlock		= spi_disable_blockprotect,
+-		.write		= spi_chip_write_256,
++		.write		= spi_chip_write_1,
+ 		.read		= spi_chip_read, /* Fast read (0x0B), dual I/O supported */
+ 		.voltage	= {2700, 3600},
+ 	},
+@@ -12150,12 +12150,12 @@ const struct flashchip flashchips[] = {
+ 		.name		= "SST25VF016B",
+ 		.bustype	= BUS_SPI,
+ 		.manufacture_id	= SST_ID,
+-		.model_id	= SST_SST25VF016B,
++		.model_id	= 0x41,
+ 		.total_size	= 2048,
+ 		.page_size	= 256,
+ 		.feature_bits	= FEATURE_WRSR_EITHER,
+ 		.tested		= TEST_OK_PREW,
+-		.probe		= probe_spi_rdid,
++		.probe		= probe_spi_res2,
+ 		.probe_timing	= TIMING_ZERO,
+ 		.block_erasers	=
+ 		{
+@@ -12178,7 +12178,7 @@ const struct flashchip flashchips[] = {
+ 		},
+ 		.printlock	= spi_prettyprint_status_register_sst25vf016,
+ 		.unlock		= spi_disable_blockprotect,
+-		.write		= spi_aai_write,
++		.write		= spi_chip_write_1,
+ 		.read		= spi_chip_read,
+ 		.voltage	= {2700, 3600},
+ 	},
+-- 
+2.9.0
+