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authorFrancis Rowe <info@gluglug.org.uk>2015-08-04 23:39:33 +0100
committerFrancis Rowe <info@gluglug.org.uk>2015-08-04 23:49:50 +0100
commitc136b69b4cc1e65b5aea333a727555e0a4ff2bab (patch)
tree1310b9c0f238f2a5bd3606afde5e253a79ed874e /resources/libreboot/patch/0004-lenovo-x60-use-correct-BLC_PWM_CTL-value.patch
parent39354fba57f35c6f5a226deea7d71c4800a23676 (diff)
downloadlibrebootfr-c136b69b4cc1e65b5aea333a727555e0a4ff2bab.tar.gz
librebootfr-c136b69b4cc1e65b5aea333a727555e0a4ff2bab.zip
Update coreboot to the latest as of 4 August 2015
Diffstat (limited to 'resources/libreboot/patch/0004-lenovo-x60-use-correct-BLC_PWM_CTL-value.patch')
-rw-r--r--resources/libreboot/patch/0004-lenovo-x60-use-correct-BLC_PWM_CTL-value.patch31
1 files changed, 31 insertions, 0 deletions
diff --git a/resources/libreboot/patch/0004-lenovo-x60-use-correct-BLC_PWM_CTL-value.patch b/resources/libreboot/patch/0004-lenovo-x60-use-correct-BLC_PWM_CTL-value.patch
new file mode 100644
index 00000000..7f0d29a9
--- /dev/null
+++ b/resources/libreboot/patch/0004-lenovo-x60-use-correct-BLC_PWM_CTL-value.patch
@@ -0,0 +1,31 @@
+From c18e0e855487069dd2c836d9a48b1e63fb7d47d3 Mon Sep 17 00:00:00 2001
+From: Francis Rowe <info@gluglug.org.uk>
+Date: Mon, 22 Jun 2015 17:37:06 +0100
+Subject: [PATCH 04/13] lenovo/x60: use correct BLC_PWM_CTL value
+
+Bit 16 in BLC_PWM_CTL enables brightness controls, but the
+current value is generic. Use the proper value, obtained
+by reading BLC_PWM_CTL while running the VBIOS.
+
+Change-Id: Ib273359e1c285b405a9bb26fc217c2f7e255b99f
+Signed-off-by: Francis Rowe <info@gluglug.org.uk>
+---
+ src/mainboard/lenovo/x60/devicetree.cb | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb
+index b20dde5..9c3c524 100644
+--- a/src/mainboard/lenovo/x60/devicetree.cb
++++ b/src/mainboard/lenovo/x60/devicetree.cb
+@@ -27,7 +27,7 @@ chip northbridge/intel/i945
+ register "gpu_hotplug" = "0x00000220"
+ register "gpu_lvds_use_spread_spectrum_clock" = "1"
+ register "gpu_lvds_is_dual_channel" = "0"
+- register "gpu_backlight" = "0x1290128"
++ register "gpu_backlight" = "0x879F879E"
+
+ device cpu_cluster 0 on
+ chip cpu/intel/socket_mFCPGA478
+--
+1.9.1
+