Libreboot release 6 beta 1.

1 files changed, 580 insertions, 0 deletions

diff --git a/resources/libreboot/patch/gitdiff b/resources/libreboot/patch/gitdiff
new file mode 100644
index 00000000..9aec9410
--- /dev/null
+++ b/resources/libreboot/patch/gitdiff
@@ -0,0 +1,580 @@
+diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig
+index 874ec75..42d1583 100644
+--- a/src/drivers/Kconfig
++++ b/src/drivers/Kconfig
+@@ -26,6 +26,7 @@ source src/drivers/i2c/Kconfig
+ source src/drivers/ics/Kconfig
+ source src/drivers/intel/Kconfig
+ source src/drivers/ipmi/Kconfig
++source src/drivers/lenovo/Kconfig
+ source src/drivers/maxim/Kconfig
+ source src/drivers/parade/Kconfig
+ if PC80_SYSTEM
+diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc
+index 66fe7b8..cb26643 100644
+--- a/src/drivers/Makefile.inc
++++ b/src/drivers/Makefile.inc
+@@ -23,6 +23,7 @@ subdirs-y += emulation
+ subdirs-y += generic
+ subdirs-y += i2c
+ subdirs-y += intel
++subdirs-y += lenovo
+ subdirs-y += maxim
+ subdirs-y += net
+ subdirs-y += parade
+diff --git a/src/drivers/lenovo/Kconfig b/src/drivers/lenovo/Kconfig
+index e69de29..30bacb9 100644
+--- a/src/drivers/lenovo/Kconfig
++++ b/src/drivers/lenovo/Kconfig
+@@ -0,0 +1,29 @@
++config DRIVERS_LENOVO_WACOM
++       bool
++       default n
++
++if DRIVERS_LENOVO_WACOM
++
++choice
++	prompt "Digitizer"
++	default DIGITIZER_AUTODETECT
++
++config DIGITIZER_AUTODETECT
++	bool "Autodetect"
++	help
++	  The presence of digitizer is inferred from model number stored in
++	  AT24RF chip.
++
++config DIGITIZER_PRESENT
++	bool "Present"
++	help
++	  The digitizer is assumed to be present.
++
++config DIGITIZER_ABSENT
++	bool "Absent"
++	help
++	  The digitizer is assumed to be absent.
++
++endchoice
++
++endif
+diff --git a/src/drivers/lenovo/Makefile.inc b/src/drivers/lenovo/Makefile.inc
+index e69de29..c50db5b 100644
+--- a/src/drivers/lenovo/Makefile.inc
++++ b/src/drivers/lenovo/Makefile.inc
+@@ -0,0 +1 @@
++ramstage-$(CONFIG_DRIVERS_LENOVO_WACOM) += wacom.c
+diff --git a/src/drivers/lenovo/lenovo.h b/src/drivers/lenovo/lenovo.h
+index e69de29..06b52e5 100644
+--- a/src/drivers/lenovo/lenovo.h
++++ b/src/drivers/lenovo/lenovo.h
+@@ -0,0 +1,4 @@
++int drivers_lenovo_is_wacom_present(void);
++void drivers_lenovo_serial_ports_ssdt_generate(const char *scope,
++					       int have_dock_serial,
++					       int have_infrared);
+diff --git a/src/drivers/lenovo/wacom.c b/src/drivers/lenovo/wacom.c
+index e69de29..ccccefd 100644
+--- a/src/drivers/lenovo/wacom.c
++++ b/src/drivers/lenovo/wacom.c
+@@ -0,0 +1,218 @@
++/*
++ * This file is part of the coreboot project.
++ *
++ * Copyright (C) 2014 Vladimir Serbinenko
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; version 2, or (at your
++ * option) any later version, of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
++ * MA 02110-1301 USA
++ */
++
++#include <types.h>
++#include <console/console.h>
++#include <arch/acpi.h>
++#include <arch/acpigen.h>
++#include <device/device.h>
++#include <device/pnp.h>
++#include <string.h>
++#include "lenovo.h"
++#include "drivers/i2c/at24rf08c/lenovo.h"
++
++static const char tablet_numbers[][5] = {
++	/* X60t. */
++	"6363", "6364", "6365", "6366",
++	"6367", "6368", "7762", "7763",
++	"7764", "7767", "7768", "7769",
++	/* X201t. */
++	"0053", "0831", "2985", "3093",
++	"3113", "3144", "3239", "4184",
++	"7448", "7449", "7450", "7453",
++	"2263", "2266",
++};
++
++int
++drivers_lenovo_is_wacom_present(void)
++{
++	const char *pn;
++	int i;
++	static int result = -1;
++	device_t superio;
++	u8 sioid;
++
++	if (result != -1)
++		return result;
++
++	if (IS_ENABLED(CONFIG_DIGITIZER_PRESENT)) {
++		printk (BIOS_INFO, "Digitizer state forced as present\n");
++		return (result = 1);
++	}
++
++	if (IS_ENABLED(CONFIG_DIGITIZER_ABSENT)) {
++		printk (BIOS_INFO, "Digitizer state forced as absent\n");
++		return (result = 0);
++	}
++
++	superio = dev_find_slot_pnp (0x164e, 3);
++	if (!superio) {
++		printk (BIOS_INFO, "No Super I/O, skipping wacom\n");
++		return (result = 0);
++	}
++
++	/* Probe ID. */
++	sioid = pnp_read_config(superio, 0x20);
++	if (sioid == 0xff) {
++		printk (BIOS_INFO, "Super I/O probe failed, skipping wacom\n");
++		return (result = 0);
++	}
++
++	pn = lenovo_mainboard_partnumber();
++	if (!pn)
++		return (result = 0);
++	printk (BIOS_DEBUG, "Lenovo P/N is %s\n", pn);
++	for (i = 0; i < ARRAY_SIZE (tablet_numbers); i++)
++		if (memcmp (tablet_numbers[i], pn, 4) == 0) {
++			printk (BIOS_DEBUG, "Lenovo P/N %s is a tablet\n", pn);
++			return (result = 1);
++		}
++	printk (BIOS_DEBUG, "Lenovo P/N %s is not a tablet\n", pn);
++	return (result = 0);
++}
++
++void
++drivers_lenovo_serial_ports_ssdt_generate(const char *scope,
++					  int have_dock_serial,
++					  int have_infrared)
++{
++	int scopelen, devicelen, reslen, methodlen;
++
++	scopelen = acpigen_write_scope(scope);
++
++	if (drivers_lenovo_is_wacom_present()) {
++		/* Device op.  */
++		scopelen += acpigen_emit_byte(0x5b);
++		scopelen += acpigen_emit_byte(0x82);
++		devicelen = acpigen_write_len_f();
++		devicelen += acpigen_emit_namestring("DTR");
++
++		devicelen += acpigen_write_name("_HID");
++		devicelen += acpigen_emit_eisaid("WACF004");
++
++		devicelen += acpigen_write_name("_CRS");
++
++		reslen = acpigen_write_resourcetemplate_header();
++		reslen += acpigen_write_io16(0x200, 0x200, 1, 8, 1);
++		reslen += acpigen_write_irq((1 << 5));
++
++		devicelen += reslen;
++		devicelen += acpigen_write_resourcetemplate_footer(reslen);
++
++		/* method op */
++		devicelen += acpigen_emit_byte(0x14);
++		methodlen = acpigen_write_len_f();
++		methodlen += acpigen_emit_namestring("_STA");
++		/* no fnarg */
++		methodlen += acpigen_emit_byte(0x00);
++		/* return */
++		methodlen += acpigen_emit_byte(0xa4);
++		methodlen += acpigen_write_byte(0xf);
++
++		acpigen_patch_len(methodlen);
++		devicelen += methodlen;
++
++		acpigen_patch_len(devicelen - 1);
++		scopelen += devicelen;
++	}
++
++	if (have_infrared) {
++		/* Device op. */
++		scopelen += acpigen_emit_byte(0x5b);
++		scopelen += acpigen_emit_byte(0x82);
++		devicelen = acpigen_write_len_f();
++		devicelen += acpigen_emit_namestring("FIR");
++
++		devicelen += acpigen_write_name("_HID");
++		devicelen += acpigen_emit_eisaid("IBM0071");
++		devicelen += acpigen_write_name("_CID");
++		devicelen += acpigen_emit_eisaid("PNP0511");
++		devicelen += acpigen_write_name("_UID");
++
++		/* One */
++		devicelen += acpigen_write_byte(0x1);
++		devicelen += acpigen_write_name("_CRS");
++
++		reslen = acpigen_write_resourcetemplate_header();
++		reslen += acpigen_write_io16(0x2f8, 0x2f8, 1, 8, 1);
++		reslen += acpigen_write_irq(0x08);
++
++		devicelen += reslen;
++		devicelen += acpigen_write_resourcetemplate_footer(reslen);
++
++		/* method op */
++		devicelen += acpigen_emit_byte(0x14);
++		methodlen = acpigen_write_len_f();
++		methodlen += acpigen_emit_namestring("_STA");
++		/* no fnarg */
++		methodlen += acpigen_emit_byte(0x00);
++		/* return */
++		methodlen += acpigen_emit_byte(0xa4);
++		methodlen += acpigen_write_byte(0xf);
++		acpigen_patch_len(methodlen);
++
++		devicelen += methodlen;
++
++		acpigen_patch_len(devicelen - 1);
++		scopelen += devicelen;
++	}
++
++	if (have_dock_serial) {
++		/* Device op.  */
++		scopelen += acpigen_emit_byte(0x5b);
++		scopelen += acpigen_emit_byte(0x82);
++		devicelen = acpigen_write_len_f();
++		devicelen += acpigen_emit_namestring("COMA");
++
++		devicelen += acpigen_write_name("_HID");
++		devicelen += acpigen_emit_eisaid("PNP0501");
++		devicelen += acpigen_write_name("_UID");
++		/* Byte */
++		devicelen += acpigen_write_byte(0x2);
++
++		devicelen += acpigen_write_name("_CRS");
++
++		reslen = acpigen_write_resourcetemplate_header();
++		reslen += acpigen_write_io16(0x3f8, 0x3f8, 1, 8, 1);
++		reslen += acpigen_write_irq(1 << 4);
++
++		devicelen += reslen;
++		devicelen += acpigen_write_resourcetemplate_footer(reslen);
++
++		/* method op */
++		devicelen += acpigen_emit_byte(0x14);
++		methodlen = acpigen_write_len_f();
++		methodlen += acpigen_emit_namestring("_STA");
++		/* no fnarg */
++		methodlen += acpigen_emit_byte(0x00);
++		/* return */
++		methodlen += acpigen_emit_byte(0xa4);
++		methodlen += acpigen_write_byte(0xf);
++		acpigen_patch_len(methodlen);
++
++		devicelen += methodlen;
++
++		acpigen_patch_len(devicelen - 1);
++		scopelen += devicelen;
++	}
++
++	acpigen_patch_len(scopelen - 1);
++}
+diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig
+index c1dec85..583efc8 100644
+--- a/src/mainboard/lenovo/Kconfig
++++ b/src/mainboard/lenovo/Kconfig
+@@ -4,7 +4,7 @@ choice
+ 	prompt "Mainboard model"
+ 
+ config BOARD_LENOVO_X60
+-	bool "ThinkPad X60 / X60s"
++	bool "ThinkPad X60 / X60s / X60t"
+ 	help
+ 	  The following X60 series ThinkPad machines have been verified to
+ 	  work correctly:
+@@ -13,7 +13,7 @@ config BOARD_LENOVO_X60
+ 	    ThinkPad X60  (Model 1709)
+ 
+ config BOARD_LENOVO_X201
+-	bool "ThinkPad X201"
++	bool "ThinkPad X201 / X201s / X201t"
+ 	help
+ 	  Lenovo X201 laptop. Consult wiki for details.
+ 
+diff --git a/src/mainboard/lenovo/t60/acpi/superio.asl b/src/mainboard/lenovo/t60/acpi/superio.asl
+index e69de29..41137ce 100644
+--- a/src/mainboard/lenovo/t60/acpi/superio.asl
++++ b/src/mainboard/lenovo/t60/acpi/superio.asl
+@@ -0,0 +1,16 @@
++	Device (FIR)	// Infrared
++	{
++		Name(_HID, EISAID("IBM0071"))
++		Name(_CID, EISAID("PNP0511"))
++
++		Name(_CRS, ResourceTemplate()
++		{
++			IO (Decode16, 0x2f8, 0x2f8, 0x01, 0x08)
++			IRQNoFlags () {3}
++		})
++
++		Method (_STA, 0)
++		{
++			Return (0xf)
++		}
++	}
+diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb
+index 54b7da3..f13cb3a 100644
+--- a/src/mainboard/lenovo/t60/devicetree.cb
++++ b/src/mainboard/lenovo/t60/devicetree.cb
+@@ -25,7 +25,7 @@ chip northbridge/intel/i945
+ 	register "gpu_hotplug" = "0x00000220"
+ 	register "gpu_lvds_use_spread_spectrum_clock" = "1"
+ 	register "gpu_lvds_is_dual_channel" = "1"
+-	register "gpu_backlight" = "0x1280128"
++	register "gpu_backlight" = "0x58BF58BE"
+ 
+ 	device cpu_cluster 0 on
+ 		chip cpu/intel/socket_mFCPGA478
+@@ -153,6 +153,10 @@ chip northbridge/intel/i945
+ 				chip superio/nsc/pc87382
+ 					device pnp 164e.2 on # IR
+ 						io 0x60 = 0x2f8
++						irq 0x29 = 0xb0
++						irq 0x70 = 0x3
++						drq 0x74 = 0x1
++						irq 0xf0 = 0x82
+ 					end
+ 
+ 					device pnp 164e.3 off # Serial Port
+diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
+index dae917c..237e967 100644
+--- a/src/mainboard/lenovo/t60/romstage.c
++++ b/src/mainboard/lenovo/t60/romstage.c
+@@ -79,7 +79,7 @@ static void ich7_enable_lpc(void)
+ 	// decode range
+ 	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0210);
+ 	// decode range
+-	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1f0d);
++	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1f0f);
+ 
+ 	/* range 0x1600 - 0x167f */
+ 	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x84, 0x1601);
+diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig
+index 50df47b..61038c4 100644
+--- a/src/mainboard/lenovo/x201/Kconfig
++++ b/src/mainboard/lenovo/x201/Kconfig
+@@ -17,6 +17,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
+ 	select EARLY_CBMEM_INIT
+ 	select MAINBOARD_HAS_NATIVE_VGA_INIT
+ 	select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
++	select SUPERIO_NSC_PC87382
++	select DRIVERS_LENOVO_WACOM
+ 
+ config MAINBOARD_DIR
+ 	string
+@@ -28,7 +30,7 @@ config MAINBOARD_PART_NUMBER
+ 
+ config MAINBOARD_VERSION
+ 	string
+-	default "ThinkPad X201"
++	default "ThinkPad X201 / X201s / X201t"
+ 
+ config MAINBOARD_VENDOR
+ 	string
+diff --git a/src/mainboard/lenovo/x201/acpi_tables.c b/src/mainboard/lenovo/x201/acpi_tables.c
+index 165de0d..710e369 100644
+--- a/src/mainboard/lenovo/x201/acpi_tables.c
++++ b/src/mainboard/lenovo/x201/acpi_tables.c
+@@ -31,6 +31,7 @@
+ #include <device/pci.h>
+ #include <device/pci_ids.h>
+ #include "southbridge/intel/ibexpeak/nvs.h"
++#include "drivers/lenovo/lenovo.h"
+ 
+ extern const unsigned char AmlCode[];
+ #if CONFIG_HAVE_ACPI_SLIC
+@@ -93,6 +94,7 @@ unsigned long acpi_fill_ssdt_generator(unsigned long current,
+ 				       const char *oem_table_id)
+ {
+ 	generate_cpu_entries();
++	drivers_lenovo_serial_ports_ssdt_generate("\\_SB.PCI0.LPCB", 0, 0);
+ 	return (unsigned long)(acpigen_get_current());
+ }
+ 
+diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
+index 9053f89..1db5bf0 100644
+--- a/src/mainboard/lenovo/x201/devicetree.cb
++++ b/src/mainboard/lenovo/x201/devicetree.cb
+@@ -143,6 +143,20 @@ chip northbridge/intel/nehalem
+ 			end
+ 			device pci 1f.0 on # PCI-LPC bridge
+ 				subsystemid 0x17aa 0x2166
++				chip superio/nsc/pc87382
++					device pnp 164e.3 on # Digitizer
++						io 0x60 = 0x200
++						irq 0x29 = 0xb0
++						irq 0x70 = 0x5
++						irq 0xf0 = 0x82
++					end
++					# IR, not connected
++					device pnp 164e.2 off end
++					# GPIO, not connected
++					device pnp 164e.7 off end
++					# DLPC, not connected
++					device pnp 164e.19 off end
++				end
+ 			end
+ 			device pci 1f.2 on # IDE/SATA
+ 				subsystemid 0x17aa 0x2168
+diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
+index 1237a5c..f74b441 100644
+--- a/src/mainboard/lenovo/x201/romstage.c
++++ b/src/mainboard/lenovo/x201/romstage.c
+@@ -53,7 +53,7 @@ static void pch_enable_lpc(void)
+ 	/* Enable EC, PS/2 Keyboard/Mouse */
+ 	pci_write_config16(PCH_LPC_DEV, LPC_EN,
+ 			   CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN |
+-			   COMA_LPC_EN);
++			   COMA_LPC_EN | GAMEL_LPC_EN);
+ 
+ 	pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x7c1601);
+ 	pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0xc15e1);
+diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig
+index b0d7a06..3c708cd 100644
+--- a/src/mainboard/lenovo/x60/Kconfig
++++ b/src/mainboard/lenovo/x60/Kconfig
+@@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
+ 	select MAINBOARD_HAS_NATIVE_VGA_INIT
+ 	select EARLY_CBMEM_INIT
+ 	select H8_DOCK_EARLY_INIT
++	select DRIVERS_LENOVO_WACOM
+ 	select INTEL_EDID
+ 
+ config MAINBOARD_DIR
+@@ -40,7 +41,7 @@ config DCACHE_RAM_SIZE
+ 
+ config MAINBOARD_PART_NUMBER
+ 	string
+-	default "ThinkPad X60 / X60s"
++	default "ThinkPad X60 / X60s / X60t"
+ 
+ config MMCONF_BASE_ADDRESS
+ 	hex
+diff --git a/src/mainboard/lenovo/x60/acpi_tables.c b/src/mainboard/lenovo/x60/acpi_tables.c
+index f6ed4ae..c8fce7f 100644
+--- a/src/mainboard/lenovo/x60/acpi_tables.c
++++ b/src/mainboard/lenovo/x60/acpi_tables.c
+@@ -29,6 +29,7 @@
+ #include <device/device.h>
+ #include <device/pci.h>
+ #include <device/pci_ids.h>
++#include "drivers/lenovo/lenovo.h"
+ 
+ extern const unsigned char AmlCode[];
+ #if CONFIG_HAVE_ACPI_SLIC
+@@ -86,6 +87,7 @@ unsigned long acpi_fill_madt(unsigned long current)
+ unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id)
+ {
+ 	generate_cpu_entries();
++	drivers_lenovo_serial_ports_ssdt_generate("\\_SB.PCI0.LPCB", 1, 1);
+ 	return (unsigned long) (acpigen_get_current());
+ }
+ 
+diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb
+index dc1c5da..6f9d5d9 100644
+--- a/src/mainboard/lenovo/x60/devicetree.cb
++++ b/src/mainboard/lenovo/x60/devicetree.cb
+@@ -25,7 +25,7 @@ chip northbridge/intel/i945
+ 	register "gpu_hotplug" = "0x00000220"
+ 	register "gpu_lvds_use_spread_spectrum_clock" = "1"
+ 	register "gpu_lvds_is_dual_channel" = "0"
+-	register "gpu_backlight" = "0x1280128"
++	register "gpu_backlight" = "0x879F879E"
+ 
+ 	device cpu_cluster 0 on
+ 		chip cpu/intel/socket_mFCPGA478
+@@ -130,10 +130,17 @@ chip northbridge/intel/i945
+ 				chip superio/nsc/pc87382
+ 					device pnp 164e.2 on # IR
+ 						io 0x60 = 0x2f8
++						irq 0x29 = 0xb0
++						irq 0x70 = 0x3
++						drq 0x74 = 0x1
++						irq 0xf0 = 0x82
+ 					end
+ 
+-					device pnp 164e.3 off # Serial Port
+-						io 0x60 = 0x3f8
++					device pnp 164e.3 on # Digitizer
++						io 0x60 = 0x200
++						irq 0x29 = 0xb0
++						irq 0x70 = 0x5
++						irq 0xf0 = 0x82
+ 					end
+ 
+ 					device pnp 164e.7 on # GPIO
+diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c
+index 1198fb2..8eca464 100644
+--- a/src/mainboard/lenovo/x60/romstage.c
++++ b/src/mainboard/lenovo/x60/romstage.c
+@@ -86,7 +86,7 @@ static void ich7_enable_lpc(void)
+ 	// decode range
+ 	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0210);
+ 	// decode range
+-	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1f0d);
++	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1f0f);
+ 
+ 	/* range 0x1600 - 0x167f */
+ 	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x84, 0x1601);
+diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
+index 4dd2ccf..5dbaff3 100644
+--- a/src/northbridge/intel/i945/gma.c
++++ b/src/northbridge/intel/i945/gma.c
+@@ -33,6 +33,8 @@
+ 
+ #define GDRST 0xc0
+ 
++#define BSM 0x5c
++
+ #define  LVDS_CLOCK_A_POWERUP_ALL	(3 << 8)
+ #define  LVDS_CLOCK_B_POWERUP_ALL	(3 << 4)
+ #define  LVDS_CLOCK_BOTH_POWERUP_ALL	(3 << 2)
+@@ -51,11 +53,19 @@
+ static int gtt_setup(unsigned int mmiobase)
+ {
+ 	unsigned long PGETBL_save;
+-
+-	PGETBL_save = read32(mmiobase + PGETBL_CTL) & ~PGETBL_ENABLED;
++	unsigned long tom; // top of memory
++
++	/*
++	 * The Video BIOS places the GTT right below top of memory.
++	 * It is not documented in the Intel 945 datasheet, but the Intel
++	 * developers said that it is normally placed there.
++	 *
++	 * TODO: Add option to make the GTT size runtime 
++	 * configurable
++	*/
++	tom = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), TOLUD) << 24;
++	PGETBL_save = tom - 256 * KiB;
+ 	PGETBL_save |= PGETBL_ENABLED;
+-
+-	PGETBL_save |= pci_read_config32(dev_find_slot(0, PCI_DEVFN(2,0)), 0x5c) & 0xfffff000;
+ 	PGETBL_save |= 2; /* set GTT to 256kb */
+ 
+ 	write32(mmiobase + GFX_FLSH_CNTL, 0);