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author | Francis Rowe <info@gluglug.org.uk> | 2015-11-06 07:45:49 +0000 |
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committer | Francis Rowe <info@gluglug.org.uk> | 2015-11-06 08:01:51 +0000 |
commit | 60453ff2cbd1befe24959fba1d24f734406444e3 (patch) | |
tree | 74a6080455b2b00184fbc4a00503188032773986 /resources/libreboot/patch/kgpe-d16/0101-cpu-amd-family_10h-family_15h-Configure-NB-register-.patch | |
parent | 51f5487e7d2c8809bdc7690fe26948064257b34d (diff) | |
download | librebootfr-60453ff2cbd1befe24959fba1d24f734406444e3.tar.gz librebootfr-60453ff2cbd1befe24959fba1d24f734406444e3.zip |
Update coreboot to new version (use latest stable kgpe-d16 tree)
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0101-cpu-amd-family_10h-family_15h-Configure-NB-register-.patch')
-rw-r--r-- | resources/libreboot/patch/kgpe-d16/0101-cpu-amd-family_10h-family_15h-Configure-NB-register-.patch | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0101-cpu-amd-family_10h-family_15h-Configure-NB-register-.patch b/resources/libreboot/patch/kgpe-d16/0101-cpu-amd-family_10h-family_15h-Configure-NB-register-.patch new file mode 100644 index 00000000..4dfb8982 --- /dev/null +++ b/resources/libreboot/patch/kgpe-d16/0101-cpu-amd-family_10h-family_15h-Configure-NB-register-.patch @@ -0,0 +1,34 @@ +From 4d83ab44b211bd6c7e0c96e23de9f413f0927875 Mon Sep 17 00:00:00 2001 +From: Timothy Pearson <tpearson@raptorengineeringinc.com> +Date: Fri, 7 Aug 2015 23:58:28 -0500 +Subject: [PATCH 101/143] cpu/amd/family_10h-family_15h: Configure NB register + 2 + +Change-Id: I55cfc96a197514212b2a4c344d3513396ebc2ad4 +Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> +--- + src/cpu/amd/family_10h-family_15h/defaults.h | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/src/cpu/amd/family_10h-family_15h/defaults.h b/src/cpu/amd/family_10h-family_15h/defaults.h +index 4868c5c..5ab4335 100644 +--- a/src/cpu/amd/family_10h-family_15h/defaults.h ++++ b/src/cpu/amd/family_10h-family_15h/defaults.h +@@ -621,6 +621,14 @@ static const struct { + [5] DisPciCfgCpuMstAbtRsp = 1, + [1] SyncFloodOnUsPwDataErr = 1 */ + ++ /* NB Configuration 2 */ ++ { 3, 0x188, AMD_DR_GT_B0, AMD_PTYPE_ALL, ++ 0x00000010, 0x00000010 }, /* EnStpGntOnFlushMaskWakeup = 0x1 */ ++ ++ /* NB Configuration 2 */ ++ { 3, 0x188, AMD_FAM15_ALL, AMD_PTYPE_ALL, ++ 0x00000200, 0x00000200 }, /* DisL3HiPriFreeListAlloc = 0x1 */ ++ + /* errata 346 - Fam10 C2, C3 + * System software should set F3x188[22] to 1b. */ + { 3, 0x188, AMD_DR_Cx, AMD_PTYPE_ALL, +-- +1.7.9.5 + |