Chromebook C201 (codename veyron_speedy) support

This introduces Libreboot support for the Asus Chromebook C201 (codename
veyron_speedy). At this point, this produces a standalone Libreboot image that
can be flashed to the RO Coreboot partition of the SPI flash, as well as the
Libreboot version that can be flash to the RO Firmware ID partition.

Libreboot on the Chromebook C201 uses the depthcharge bootloader, modified to
display text messages instead of ChromeOS bitmaps (that encourage the use of
ChromeOS).

For convenience, an installation script, chromebook-flash-replace, is provided
along with a description of the flash layout, to ease the replacement of the
Coreboot and RO Firmware ID partitions on the full SPI flash image.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>

12 files changed, 1172 insertions, 0 deletions

diff --git a/resources/libreboot/config/depthcharge/veyron_speedy/config b/resources/libreboot/config/depthcharge/veyron_speedy/config
new file mode 100644
index 00000000..93942add
--- /dev/null
+++ b/resources/libreboot/config/depthcharge/veyron_speedy/config
@@ -0,0 +1,512 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMMON_CBFS_SPI_WRAPPER=y
+# CONFIG_MULTIPLE_CBFS_INSTANCES is not set
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_SCONFIG_GENPARSER is not set
+CONFIG_UNCOMPRESSED_RAMSTAGE=y
+# CONFIG_COMPRESS_RAMSTAGE is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_EARLY_CBMEM_INIT=y
+CONFIG_COLLECT_TIMESTAMPS=y
+CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION=y
+# CONFIG_USE_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_RELOCATABLE_MODULES is not set
+# CONFIG_RELOCATABLE_RAMSTAGE is not set
+CONFIG_FLASHMAP_OFFSET=0x100000
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
+# CONFIG_SKIP_MAX_REBOOT_CNT_CLEAR is not set
+# CONFIG_UPDATE_IMAGE is not set
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_BOARD_ID_AUTO=y
+CONFIG_RAM_CODE_SUPPORT=y
+# CONFIG_ACPI_SATA_GENERATOR is not set
+
+#
+# Mainboard
+#
+# CONFIG_VENDOR_A_TREND is not set
+# CONFIG_VENDOR_AAEON is not set
+# CONFIG_VENDOR_ABIT is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_ADVANSUS is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARIMA is not set
+# CONFIG_VENDOR_ARTECGROUP is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_AVALUE is not set
+# CONFIG_VENDOR_AZZA is not set
+# CONFIG_VENDOR_BACHMANN is not set
+# CONFIG_VENDOR_BAP is not set
+# CONFIG_VENDOR_BCOM is not set
+# CONFIG_VENDOR_BIFFEROS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BROADCOM is not set
+# CONFIG_VENDOR_COMPAQ is not set
+# CONFIG_VENDOR_CUBIETECH is not set
+# CONFIG_VENDOR_DIGITALLOGIC is not set
+# CONFIG_VENDOR_DMP is not set
+# CONFIG_VENDOR_ECS is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GIZMOSPHERE is not set
+CONFIG_VENDOR_GOOGLE=y
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_IEI is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_IWAVE is not set
+# CONFIG_VENDOR_IWILL is not set
+# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LANNER is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LINUTOP is not set
+# CONFIG_VENDOR_LIPPERT is not set
+# CONFIG_VENDOR_MITAC is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NEC is not set
+# CONFIG_VENDOR_NEWISYS is not set
+# CONFIG_VENDOR_NOKIA is not set
+# CONFIG_VENDOR_NVIDIA is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_RCA is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SOYO is not set
+# CONFIG_VENDOR_SUNW is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_TECHNEXION is not set
+# CONFIG_VENDOR_THOMSON is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TRAVERSE is not set
+# CONFIG_VENDOR_TYAN is not set
+# CONFIG_VENDOR_VIA is not set
+# CONFIG_VENDOR_WINENT is not set
+# CONFIG_VENDOR_WYSE is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_DIR="google/veyron"
+CONFIG_MAINBOARD_PART_NUMBER="Veyron"
+CONFIG_MAINBOARD_VENDOR="Google"
+CONFIG_MAX_CPUS=1
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_UDELAY_IO=y
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_ID_SECTION_OFFSET=0x80
+# CONFIG_BOARD_GOOGLE_AURON is not set
+# CONFIG_BOARD_GOOGLE_BOLT is not set
+# CONFIG_BOARD_GOOGLE_BUTTERFLY is not set
+# CONFIG_BOARD_GOOGLE_COSMOS is not set
+# CONFIG_BOARD_GOOGLE_CYAN is not set
+# CONFIG_BOARD_GOOGLE_DAISY is not set
+# CONFIG_BOARD_GOOGLE_FALCO is not set
+# CONFIG_BOARD_GOOGLE_FOSTER is not set
+# CONFIG_BOARD_GOOGLE_GLADOS is not set
+# CONFIG_BOARD_GOOGLE_JECHT is not set
+# CONFIG_BOARD_GOOGLE_LINK is not set
+# CONFIG_BOARD_GOOGLE_NYAN is not set
+# CONFIG_BOARD_GOOGLE_NYAN_BIG is not set
+# CONFIG_BOARD_GOOGLE_NYAN_BLAZE is not set
+# CONFIG_BOARD_GOOGLE_PANTHER is not set
+# CONFIG_BOARD_GOOGLE_PARROT is not set
+# CONFIG_BOARD_GOOGLE_PEACH_PIT is not set
+# CONFIG_BOARD_GOOGLE_PEPPY is not set
+# CONFIG_BOARD_GOOGLE_PURIN is not set
+# CONFIG_BOARD_GOOGLE_RAMBI is not set
+# CONFIG_BOARD_GOOGLE_RUSH is not set
+# CONFIG_BOARD_GOOGLE_RUSH_RYU is not set
+# CONFIG_BOARD_GOOGLE_SAMUS is not set
+# CONFIG_BOARD_GOOGLE_SLIPPY is not set
+# CONFIG_BOARD_GOOGLE_SMAUG is not set
+# CONFIG_BOARD_GOOGLE_STORM is not set
+# CONFIG_BOARD_GOOGLE_STOUT is not set
+# CONFIG_BOARD_GOOGLE_URARA is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_GUS is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_JAQ is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_JERRY is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_MIGHTY is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_MINNIE is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_NICKY is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_PINKY is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_SHARK is not set
+CONFIG_BOARD_GOOGLE_VEYRON_SPEEDY=y
+# CONFIG_BOARD_GOOGLE_VEYRON_THEA is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_BRAIN is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_DANGER is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_MICKEY is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_RIALTO is not set
+# CONFIG_BOARD_GOOGLE_VEYRON_ROMY is not set
+CONFIG_CHROMEOS=y
+CONFIG_BOOT_MEDIA_SPI_BUS=2
+CONFIG_DRIVER_TPM_I2C_BUS=0x1
+CONFIG_DRIVER_TPM_I2C_ADDR=0x20
+CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0
+CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF690000
+CONFIG_BOARD_GOOGLE_VEYRON=y
+CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=100
+CONFIG_PMIC_BUS=0
+CONFIG_CBFS_SIZE=0x100000
+CONFIG_CACHE_ROM_SIZE_OVERRIDE=0
+CONFIG_POST_DEVICE=y
+CONFIG_CPU_ADDR_BITS=36
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x400000
+# CONFIG_SYSTEM_TYPE_LAPTOP is not set
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+# CONFIG_SOC_BROADCOM_CYGNUS is not set
+CONFIG_BOOTBLOCK_CPU_INIT="soc/rockchip/rk3288/bootblock.c"
+CONFIG_TTYS0_BASE=0x3f8
+CONFIG_HEAP_SIZE=0x4000
+# CONFIG_SOC_MARVELL_BG4CD is not set
+# CONFIG_SOC_NVIDIA_TEGRA124 is not set
+# CONFIG_SOC_NVIDIA_TEGRA132 is not set
+# CONFIG_SOC_NVIDIA_TEGRA210 is not set
+# CONFIG_SOC_QC_IPQ806X is not set
+CONFIG_SOC_ROCKCHIP_RK3288=y
+# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
+# CONFIG_SOC_UCB_RISCV is not set
+
+#
+# CPU
+#
+# CONFIG_CPU_ALLWINNER_A10 is not set
+CONFIG_XIP_ROM_SIZE=0x10000
+CONFIG_NUM_IPI_STARTS=2
+# CONFIG_CPU_AMD_AGESA is not set
+# CONFIG_CPU_AMD_PI is not set
+# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
+# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
+# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
+# CONFIG_CPU_TI_AM335X is not set
+# CONFIG_PARALLEL_CPU_INIT is not set
+# CONFIG_UDELAY_LAPIC is not set
+# CONFIG_UDELAY_TSC is not set
+# CONFIG_UDELAY_TIMER2 is not set
+# CONFIG_TSC_CALIBRATE_WITH_IO is not set
+# CONFIG_TSC_SYNC_LFENCE is not set
+# CONFIG_TSC_SYNC_MFENCE is not set
+CONFIG_LOGICAL_CPUS=y
+# CONFIG_SMM_TSEG is not set
+# CONFIG_X86_AMD_FIXED_MTRRS is not set
+# CONFIG_PLATFORM_USES_FSP1_0 is not set
+# CONFIG_PARALLEL_MP is not set
+# CONFIG_BACKUP_DEFAULT_SMM_REGION is not set
+# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
+# CONFIG_SUPPORT_CPU_UCODE_IN_CBFS is not set
+
+#
+# Northbridge
+#
+# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
+# CONFIG_AMD_NB_CIMX is not set
+# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
+CONFIG_VIDEO_MB=0
+# CONFIG_NORTHBRIDGE_AMD_PI is not set
+CONFIG_RAMBASE=0x100000
+CONFIG_HPET_ADDRESS=0xfed00000
+CONFIG_MAX_PIRQ_LINKS=4
+
+#
+# Southbridge
+#
+# CONFIG_AMD_SB_CIMX is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_GOOGLE_CHROMEEC=y
+# CONFIG_EC_GOOGLE_CHROMEEC_I2C is not set
+# CONFIG_EC_GOOGLE_CHROMEEC_PD is not set
+CONFIG_EC_GOOGLE_CHROMEEC_SPI=y
+CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0
+CONFIG_MAINBOARD_HAS_CHROMEOS=y
+
+#
+# ChromeOS
+#
+# CONFIG_CHROMEOS_VBNV_CMOS is not set
+CONFIG_CHROMEOS_VBNV_EC=y
+# CONFIG_CHROMEOS_VBNV_FLASH is not set
+CONFIG_CHROMEOS_RAMOOPS=y
+# CONFIG_CHROMEOS_RAMOOPS_NON_ACPI is not set
+CONFIG_CHROMEOS_RAMOOPS_RAM_START=0x00f00000
+CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE=0x00100000
+CONFIG_EC_SOFTWARE_SYNC=y
+# CONFIG_VBOOT_EC_SLOW_UPDATE is not set
+CONFIG_VIRTUAL_DEV_SWITCH=y
+# CONFIG_VBOOT_VERIFY_FIRMWARE is not set
+# CONFIG_NO_TPM_RESUME is not set
+# CONFIG_PHYSICAL_REC_SWITCH is not set
+# CONFIG_LID_SWITCH is not set
+# CONFIG_WIPEOUT_SUPPORTED is not set
+CONFIG_VBOOT_STARTS_IN_BOOTBLOCK=y
+CONFIG_SEPARATE_VERSTAGE=y
+CONFIG_RETURN_FROM_VERSTAGE=y
+# CONFIG_UEFI_2_4_BINDING is not set
+CONFIG_ARCH_ARM=y
+CONFIG_ARCH_BOOTBLOCK_ARM=y
+CONFIG_ARCH_VERSTAGE_ARM=y
+CONFIG_ARCH_ROMSTAGE_ARM=y
+CONFIG_ARCH_RAMSTAGE_ARM=y
+# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
+# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
+# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
+# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
+CONFIG_ARCH_BOOTBLOCK_ARMV7=y
+CONFIG_ARCH_VERSTAGE_ARMV7=y
+CONFIG_ARCH_ROMSTAGE_ARMV7=y
+CONFIG_ARCH_RAMSTAGE_ARMV7=y
+# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
+# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
+# CONFIG_ARM_BOOTBLOCK_CUSTOM is not set
+# CONFIG_ARM_LPAE is not set
+# CONFIG_ARCH_ARM64 is not set
+# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
+# CONFIG_ARCH_VERSTAGE_ARM64 is not set
+# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
+# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
+# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
+# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
+# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
+# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
+# CONFIG_ARM64_BOOTBLOCK_CUSTOM is not set
+# CONFIG_ARM64_A53_ERRATUM_843419 is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
+# CONFIG_ARCH_VERSTAGE_MIPS is not set
+# CONFIG_ARCH_ROMSTAGE_MIPS is not set
+# CONFIG_ARCH_RAMSTAGE_MIPS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
+# CONFIG_ARCH_VERSTAGE_RISCV is not set
+# CONFIG_ARCH_ROMSTAGE_RISCV is not set
+# CONFIG_ARCH_RAMSTAGE_RISCV is not set
+# CONFIG_RISCV_BOOTBLOCK_CUSTOM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_BOOTBLOCK_X86_32 is not set
+# CONFIG_ARCH_VERSTAGE_X86_32 is not set
+# CONFIG_ARCH_ROMSTAGE_X86_32 is not set
+# CONFIG_ARCH_RAMSTAGE_X86_32 is not set
+# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
+# CONFIG_ARCH_VERSTAGE_X86_64 is not set
+# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
+# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
+# CONFIG_ROMCC is not set
+# CONFIG_LATE_CBMEM_INIT is not set
+# CONFIG_HAVE_CMOS_DEFAULT is not set
+CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
+# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
+# CONFIG_COMPILE_IN_DSDT is not set
+
+#
+# Devices
+#
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_NATIVE_VGA_INIT_USE_EDID=y
+# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is not set
+# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
+# CONFIG_SPD_CACHE is not set
+# CONFIG_PCI is not set
+# CONFIG_PXE_ROM is not set
+# CONFIG_SOFTWARE_I2C is not set
+
+#
+# Display
+#
+
+#
+# Generic Drivers
+#
+# CONFIG_DRIVERS_AS3722_RTC is not set
+CONFIG_ELOG=y
+# CONFIG_ELOG_DEBUG is not set
+CONFIG_ELOG_FLASH_BASE=0
+CONFIG_ELOG_AREA_SIZE=0x1000
+# CONFIG_ELOG_CBMEM is not set
+# CONFIG_ELOG_BOOT_COUNT is not set
+# CONFIG_GIC is not set
+# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
+# CONFIG_DRIVERS_I2C_RTD2132 is not set
+CONFIG_I2C_TPM=y
+# CONFIG_INTEL_DP is not set
+# CONFIG_INTEL_DDI is not set
+# CONFIG_INTEL_EDID is not set
+# CONFIG_INTEL_INT15 is not set
+# CONFIG_INTEL_GMA_ACPI is not set
+# CONFIG_DRIVER_INTEL_I210 is not set
+# CONFIG_IPMI_KCS is not set
+# CONFIG_DRIVERS_LENOVO_WACOM is not set
+# CONFIG_DRIVER_MAXIM_MAX77686 is not set
+# CONFIG_DRIVER_PARADE_PS8625 is not set
+CONFIG_TPM_INIT_FAILURE_IS_FATAL=y
+CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT=y
+# CONFIG_DRIVERS_RICOH_RCE822 is not set
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_ATOMIC_SEQUENCING is not set
+# CONFIG_SPI_FLASH_MEMORY_MAPPED is not set
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
+# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+# CONFIG_DRIVER_TI_TPS65090 is not set
+# CONFIG_DRIVERS_TI_TPS65913 is not set
+# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_NO_UART_ON_SUPERIO is not set
+# CONFIG_DRIVERS_UART_8250MEM is not set
+# CONFIG_DRIVERS_UART_8250MEM_32 is not set
+CONFIG_HAVE_UART_SPECIAL=y
+# CONFIG_DRIVERS_UART_PL011 is not set
+# CONFIG_HAVE_USBDEBUG is not set
+# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
+# CONFIG_DRIVER_XPOWERS_AXP209 is not set
+CONFIG_RTC=y
+CONFIG_TPM=y
+CONFIG_STACK_SIZE=0x0
+# CONFIG_MMCONF_SUPPORT_DEFAULT is not set
+# CONFIG_MMCONF_SUPPORT is not set
+CONFIG_BOOTMODE_STRAPS=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# device-specific UART
+#
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+# CONFIG_NO_POST is not set
+# CONFIG_CONSOLE_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+# CONFIG_HAVE_ACPI_RESUME is not set
+CONFIG_HAVE_HARD_RESET=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_GENERIC_UDELAY=y
+# CONFIG_TIMER_QUEUE is not set
+# CONFIG_HAVE_OPTION_TABLE is not set
+# CONFIG_PIRQ_ROUTE is not set
+# CONFIG_HAVE_SMI_HANDLER is not set
+# CONFIG_PCI_IO_CFG_EXT is not set
+# CONFIG_IOAPIC is not set
+# CONFIG_USE_WATCHDOG_ON_BOOT is not set
+# CONFIG_VGA is not set
+# CONFIG_GFXUMA is not set
+# CONFIG_COMMON_FADT is not set
+
+#
+# System tables
+#
+# CONFIG_GENERATE_MP_TABLE is not set
+# CONFIG_GENERATE_PIRQ_TABLE is not set
+
+#
+# Payload
+#
+# CONFIG_PAYLOAD_NONE is not set
+CONFIG_PAYLOAD_ELF=y
+# CONFIG_PAYLOAD_FILO is not set
+# CONFIG_PAYLOAD_GRUB2 is not set
+# CONFIG_PAYLOAD_LINUX is not set
+# CONFIG_PAYLOAD_TIANOCORE is not set
+CONFIG_PAYLOAD_FILE="depthcharge.elf"
+CONFIG_COMPRESSED_PAYLOAD_LZMA=y
+
+#
+# Debugging
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
+# CONFIG_HAVE_DEBUG_CAR is not set
+# CONFIG_HAVE_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_ACPI is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_TRACE is not set
+# CONFIG_ENABLE_APIC_EXT_ID is not set
+CONFIG_WARNINGS_ARE_ERRORS=y
+# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
+# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
+# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
+# CONFIG_REG_SCRIPT is not set
+CONFIG_MAX_REBOOT_CNT=3
diff --git a/resources/libreboot/install/depthcharge/chromebook-flash-replace b/resources/libreboot/install/depthcharge/chromebook-flash-replace
new file mode 100755
index 00000000..4ad3fabd
--- /dev/null
+++ b/resources/libreboot/install/depthcharge/chromebook-flash-replace
@@ -0,0 +1,96 @@
+#!/bin/bash
+
+#  replace the requested parts in the flash image with separate parts images
+#
+#	Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
+#
+#    This program is free software: you can redistribute it and/or modify
+#    it under the terms of the GNU General Public License as published by
+#    the Free Software Foundation, either version 3 of the License, or
+#    (at your option) any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#    GNU General Public License for more details.
+#
+#    You should have received a copy of the GNU General Public License
+#    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+
+[ "x${DEBUG+set}" = 'xset' ] && set -v
+
+regex="\([0-9a-fA-F]*\):\([0-9a-fA-F]*\)[[:space:]]*\(.*\)"
+block=256
+layout="layout.txt"
+flash=$1
+
+shift 1
+
+if [ ! -f "$flash" ]
+then
+	echo "Usage: $0 [flash image] [image] ..."
+	exit 1
+fi
+
+if [ ! -f "$layout" ]
+then
+	echo "Missing layout file: $layout"
+	exit 1
+fi
+
+flashsize=$( stat $flash -c "%s" )
+
+for image in $@; do
+	range=$( grep "$image" "$layout" )
+	name=$( echo "$range" | sed "s/$regex/\3/g" )
+	file="$name.img"
+
+	if [ -z "$range" ] || [ ! -f "$file" ]
+	then
+		echo "Invalid image name: $name"
+		continue
+	fi
+
+	start=$( echo "$range" | sed "s/$regex/\1/g" )
+	start=$( printf "%d\n" "0x$start" )
+	stop=$( echo "$range" | sed "s/$regex/\2/g" )
+	stop=$( printf "%d\n" "0x$stop" )
+
+	size=$(( $stop - $start + 1 ))
+	filesize=$( stat $file -c "%s" )
+
+	if [ $size -ne $filesize ]
+	then
+		echo "Invalid file size: expected $size, read $filesize"
+		continue
+	fi
+
+	if [ $size -gt $flashsize ]
+	then
+		echo "Image size too big for flash"
+		continue
+	fi
+
+	printf "Replacing $image in $flash\n\n"
+
+	if [ $start -gt 0 ]
+	then
+		dd if=$flash of=before.img bs=$block count=$(( $start / $block ))
+	else
+		touch before.img
+	fi
+
+	if [ $(( $stop + 1 )) -lt $flashsize ]
+	then
+		dd if=$flash of=after.img skip=$(( ($stop + 1) / $block )) bs=$block count=$(( ($flashsize - $stop - 1) / $block ))
+	else
+		touch after.img
+	fi
+
+	cat before.img $file after.img > $flash
+
+	rm before.img after.img
+
+	printf "\n"
+done
diff --git a/resources/libreboot/install/depthcharge/veyron_speedy/layout.txt b/resources/libreboot/install/depthcharge/veyron_speedy/layout.txt
new file mode 100644
index 00000000..bf397b80
--- /dev/null
+++ b/resources/libreboot/install/depthcharge/veyron_speedy/layout.txt
@@ -0,0 +1,2 @@
+00000000:000fffff coreboot
+001eff00:001effff ro-frid
diff --git a/resources/libreboot/patch/chromebook/0001-armv7-Word-sized-half-word-sized-memory-operations-f.patch b/resources/libreboot/patch/chromebook/0001-armv7-Word-sized-half-word-sized-memory-operations-f.patch
new file mode 100644
index 00000000..f89b1606
--- /dev/null
+++ b/resources/libreboot/patch/chromebook/0001-armv7-Word-sized-half-word-sized-memory-operations-f.patch
@@ -0,0 +1,89 @@
+From 9746b7bf27d4a3c7c0de78b26ec9f217887f4e7d Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Tue, 22 Sep 2015 22:16:33 +0200
+Subject: [PATCH 1/2] armv7: Word-sized/half-word-sized memory operations for
+ 32/16 bit read/write
+
+Some registers only allow word-sized or half-word-sized operations and will
+cause a data fault when accessed with byte-sized operations.
+However, the compiler may or may not break such an operation into smaller
+(byte-sized) chunks. Thus, we need to reliably perform word-sized operations for
+32 bit read/write and half-word-sized operations for 16 bit read/write.
+
+This is particularly the case on the rk3288 SRAM registers, where the watchdog
+tombstone is stored. Moving to GCC 5.2.0 introduced a change of strategy in the
+compiler, where a 32 bit read would be broken into byte-sized chunks, which
+caused a data fault when accessing the watchdog tombstone register.
+
+The definitions for byte-sized memory operations are also adapted to stay
+consistent with the rest.
+
+Change-Id: I1fb3fc139e0a813acf9d70f14386a9603c9f9ede
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ src/arch/arm/include/armv7/arch/io.h | 21 +++++++++++++++------
+ 1 file changed, 15 insertions(+), 6 deletions(-)
+
+diff --git a/src/arch/arm/include/armv7/arch/io.h b/src/arch/arm/include/armv7/arch/io.h
+index 9d06003..94cb131 100644
+--- a/src/arch/arm/include/armv7/arch/io.h
++++ b/src/arch/arm/include/armv7/arch/io.h
+@@ -29,40 +29,49 @@
+ 
+ static inline uint8_t read8(const void *addr)
+ {
++	uint8_t val;
++
+ 	dmb();
+-	return *(volatile uint8_t *)addr;
++	asm volatile ("ldrb %0, [%1]" : "=r" (val) : "r" (addr) : "memory");
++	return val;
+ }
+ 
+ static inline uint16_t read16(const void *addr)
+ {
++	uint16_t val;
++
+ 	dmb();
+-	return *(volatile uint16_t *)addr;
++	asm volatile ("ldrh %0, [%1]" : "=r" (val) : "r" (addr) : "memory");
++	return val;
+ }
+ 
+ static inline uint32_t read32(const void *addr)
+ {
++	uint32_t val;
++
+ 	dmb();
+-	return *(volatile uint32_t *)addr;
++	asm volatile ("ldr %0, [%1]" : "=r" (val) : "r" (addr) : "memory");
++	return val;
+ }
+ 
+ static inline void write8(void *addr, uint8_t val)
+ {
+ 	dmb();
+-	*(volatile uint8_t *)addr = val;
++	asm volatile ("strb %0, [%1]" : : "r" (val), "r" (addr) : "memory");
+ 	dmb();
+ }
+ 
+ static inline void write16(void *addr, uint16_t val)
+ {
+ 	dmb();
+-	*(volatile uint16_t *)addr = val;
++	asm volatile ("strh %0, [%1]" : : "r" (val), "r" (addr) : "memory");
+ 	dmb();
+ }
+ 
+ static inline void write32(void *addr, uint32_t val)
+ {
+ 	dmb();
+-	*(volatile uint32_t *)addr = val;
++	asm volatile ("str %0, [%1]" : : "r" (val), "r" (addr) : "memory");
+ 	dmb();
+ }
+ 
+-- 
+1.9.1
+
diff --git a/resources/libreboot/patch/chromebook/0002-chromeos-Allow-disabling-vboot-firmware-verification.patch b/resources/libreboot/patch/chromebook/0002-chromeos-Allow-disabling-vboot-firmware-verification.patch
new file mode 100644
index 00000000..bed24b19
--- /dev/null
+++ b/resources/libreboot/patch/chromebook/0002-chromeos-Allow-disabling-vboot-firmware-verification.patch
@@ -0,0 +1,84 @@
+From d0e6324693214c51e707928e26571ecc9ab8ee03 Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Sun, 9 Aug 2015 10:23:38 +0200
+Subject: [PATCH 2/2] chromeos: Allow disabling vboot firmware verification
+ when ChromeOS is enabled
+
+Some ChromeOS bindings might be wanted without using vboot verification, for
+instance to boot up depthcharge from the version of Coreboot installed in the
+write-protected part of the SPI flash (without jumping to a RW firmware).
+
+Vboot firmware verification is still selected by default when ChromeOS is
+enabled, but this allows more flexibility since vboot firmware verification is
+no longer a hard requirement for ChromeOS (that this particular use case still
+allows booting ChromeOS).
+
+In the future, it would make sense to have all the separate components that
+CONFIG_CHROMEOS enables have their own config options, so that they can be
+enabled separately.
+
+Change-Id: Ia4057a56838aa05dcf3cb250ae1a27fd91402ddb
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ src/lib/bootmode.c                            | 2 ++
+ src/vendorcode/google/chromeos/Kconfig        | 2 +-
+ src/vendorcode/google/chromeos/vboot2/Kconfig | 4 ++++
+ 3 files changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c
+index f2ff72a..13c0130 100644
+--- a/src/lib/bootmode.c
++++ b/src/lib/bootmode.c
+@@ -80,8 +80,10 @@ void gfx_set_init_done(int done)
+ int display_init_required(void)
+ {
+ 	/* For Chrome OS always honor vboot_skip_display_init(). */
++#if CONFIG_VBOOT_VERIFY_FIRMWARE
+ 	if (IS_ENABLED(CONFIG_CHROMEOS))
+ 		return !vboot_skip_display_init();
++#endif
+ 
+ 	/* By default always initialize display. */
+ 	return 1;
+diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig
+index 8309d19..694e0d7 100644
+--- a/src/vendorcode/google/chromeos/Kconfig
++++ b/src/vendorcode/google/chromeos/Kconfig
+@@ -31,7 +31,6 @@ config CHROMEOS
+ 	select BOOTMODE_STRAPS
+ 	select ELOG
+ 	select COLLECT_TIMESTAMPS
+-	select VBOOT_VERIFY_FIRMWARE
+ 	help
+ 	  Enable ChromeOS specific features like the GPIO sub table in
+ 	  the coreboot table. NOTE: Enabling this option on an unsupported
+@@ -129,6 +128,7 @@ config VIRTUAL_DEV_SWITCH
+ 
+ config VBOOT_VERIFY_FIRMWARE
+ 	bool "Verify firmware with vboot."
++	default y if CHROMEOS
+ 	default n
+ 	depends on HAVE_HARD_RESET
+ 	help
+diff --git a/src/vendorcode/google/chromeos/vboot2/Kconfig b/src/vendorcode/google/chromeos/vboot2/Kconfig
+index 33c33a5..5bd8b54 100644
+--- a/src/vendorcode/google/chromeos/vboot2/Kconfig
++++ b/src/vendorcode/google/chromeos/vboot2/Kconfig
+@@ -16,6 +16,8 @@
+ ## Foundation, Inc.
+ ##
+ 
++if VBOOT_VERIFY_FIRMWARE
++
+ config VBOOT_STARTS_IN_BOOTBLOCK
+ 	bool "Vboot starts verifying in bootblock"
+ 	default n
+@@ -133,3 +135,5 @@ config VBOOT_DYNAMIC_WORK_BUFFER
+ 	  ram to allocate the vboot work buffer. That means vboot verification
+ 	  is after memory init and requires main memory to back the work
+ 	  buffer.
++
++endif # VBOOT_VERIFY_FIRMWARE
+-- 
+1.9.1
+
diff --git a/resources/libreboot/patch/vboot/0001-firmware-Developer-mode-timeout-delay-shortening-dow.patch b/resources/libreboot/patch/vboot/0001-firmware-Developer-mode-timeout-delay-shortening-dow.patch
new file mode 100644
index 00000000..f843e506
--- /dev/null
+++ b/resources/libreboot/patch/vboot/0001-firmware-Developer-mode-timeout-delay-shortening-dow.patch
@@ -0,0 +1,33 @@
+From eaf081085930dd7614e2f77bbc1f80d6b1e003eb Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 10 Aug 2015 20:33:23 +0200
+Subject: [PATCH 1/7] firmware: Developer mode timeout delay shortening (down
+ to 3 seconds)
+
+A timeout delay of 3 seconds, with no bip, is much more appreciable for users.
+
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ firmware/lib/vboot_audio.c | 6 +-----
+ 1 file changed, 1 insertion(+), 5 deletions(-)
+
+diff --git a/firmware/lib/vboot_audio.c b/firmware/lib/vboot_audio.c
+index e24a039..f96d5f4 100644
+--- a/firmware/lib/vboot_audio.c
++++ b/firmware/lib/vboot_audio.c
+@@ -30,11 +30,7 @@
+ #define MAX_CUSTOM_DELAY      60000
+ 
+ /* These are visible externally only to make testing easier */
+-VbDevMusicNote default_notes_[] = { {20000, 0}, /* 20 seconds */
+-                                    {250, 400}, /* two beeps */
+-                                    {250, 0},
+-                                    {250, 400},
+-                                    {9250, 0} }; /* total 30 seconds */
++VbDevMusicNote default_notes_[] = { {3000, 0} }; /* three seconds */
+ uint32_t default_count_ = sizeof(default_notes_) / sizeof(VbDevMusicNote);
+ 
+ VbDevMusicNote short_notes_[] = { {2000, 0} }; /* two seconds */
+-- 
+1.9.1
+
diff --git a/resources/libreboot/patch/vboot/0002-firmware-Text-based-screen-display-in-priority.patch b/resources/libreboot/patch/vboot/0002-firmware-Text-based-screen-display-in-priority.patch
new file mode 100644
index 00000000..3e2a997d
--- /dev/null
+++ b/resources/libreboot/patch/vboot/0002-firmware-Text-based-screen-display-in-priority.patch
@@ -0,0 +1,39 @@
+From ceb9ba56a8ef48e18712c38d97b8541a324c7edd Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 10 Aug 2015 22:44:50 +0200
+Subject: [PATCH 2/7] firmware: Text-based screen display in priority
+
+This allows showing text-based screen displays before looking at the GBB bitmaps
+since those encourage the use of non-free software (Chrome OS) and don't display
+enough information to the user.
+
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ firmware/lib/vboot_display.c | 9 ++++-----
+ 1 file changed, 4 insertions(+), 5 deletions(-)
+
+diff --git a/firmware/lib/vboot_display.c b/firmware/lib/vboot_display.c
+index c3cc636..542aaed 100644
+--- a/firmware/lib/vboot_display.c
++++ b/firmware/lib/vboot_display.c
+@@ -324,13 +324,12 @@ VbError_t VbDisplayScreen(VbCommonParams *cparams, uint32_t screen,
+ 	/* Request the screen */
+ 	disp_current_screen = screen;
+ 
+-	/* Look in the GBB first */
+-	if (VBERROR_SUCCESS == VbDisplayScreenFromGBB(cparams, screen,
+-						      vncptr))
++	/* Display default first */
++	if (VBERROR_SUCCESS == VbExDisplayScreen(screen))
+ 		return VBERROR_SUCCESS;
+ 
+-	/* If screen wasn't in the GBB bitmaps, fall back to a default */
+-	return VbExDisplayScreen(screen);
++	/* If default doesn't have anything to show, fall back to GBB bitmaps */
++	return VbDisplayScreenFromGBB(cparams, screen,  vncptr);
+ }
+ 
+ static void Uint8ToString(char *buf, uint8_t val)
+-- 
+1.9.1
+
diff --git a/resources/libreboot/patch/vboot/0003-firmware-NV-context-pointer-handoff-to-VbExDisplaySc.patch b/resources/libreboot/patch/vboot/0003-firmware-NV-context-pointer-handoff-to-VbExDisplaySc.patch
new file mode 100644
index 00000000..a9d85a07
--- /dev/null
+++ b/resources/libreboot/patch/vboot/0003-firmware-NV-context-pointer-handoff-to-VbExDisplaySc.patch
@@ -0,0 +1,79 @@
+From 5bd1373a9313bc31bacb2d765ede2c19242a7e9b Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 10 Aug 2015 22:46:43 +0200
+Subject: [PATCH 3/7] firmware: NV context pointer handoff to VbExDisplayScreen
+
+VbExDisplayScreen might need to display some information based on the NV context
+so it makes sense to pass that pointer along.
+
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ firmware/include/vboot_api.h    | 3 ++-
+ firmware/lib/vboot_display.c    | 2 +-
+ firmware/stub/vboot_api_stub.c  | 2 +-
+ tests/vboot_api_devmode_tests.c | 2 +-
+ 4 files changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/firmware/include/vboot_api.h b/firmware/include/vboot_api.h
+index 7e94773..66d1ee4 100644
+--- a/firmware/include/vboot_api.h
++++ b/firmware/include/vboot_api.h
+@@ -24,6 +24,7 @@
+ #include <stdint.h>
+ #include <stdlib.h>
+ 
++#include "vboot_nvstorage.h"
+ #include "gpt.h"
+ 
+ /*****************************************************************************/
+@@ -765,7 +766,7 @@ VbError_t VbExDisplaySetDimension(uint32_t width, uint32_t height);
+  * to be simple ASCII text such as "NO GOOD" or "INSERT"; these screens should
+  * only be seen during development.
+  */
+-VbError_t VbExDisplayScreen(uint32_t screen_type);
++VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc);
+ 
+ /**
+  * Write an image to the display, with the upper left corner at the specified
+diff --git a/firmware/lib/vboot_display.c b/firmware/lib/vboot_display.c
+index 542aaed..0158cc2 100644
+--- a/firmware/lib/vboot_display.c
++++ b/firmware/lib/vboot_display.c
+@@ -325,7 +325,7 @@ VbError_t VbDisplayScreen(VbCommonParams *cparams, uint32_t screen,
+ 	disp_current_screen = screen;
+ 
+ 	/* Display default first */
+-	if (VBERROR_SUCCESS == VbExDisplayScreen(screen))
++	if (VBERROR_SUCCESS == VbExDisplayScreen(screen, vncptr))
+ 		return VBERROR_SUCCESS;
+ 
+ 	/* If default doesn't have anything to show, fall back to GBB bitmaps */
+diff --git a/firmware/stub/vboot_api_stub.c b/firmware/stub/vboot_api_stub.c
+index 7320b6c..f773b6e 100644
+--- a/firmware/stub/vboot_api_stub.c
++++ b/firmware/stub/vboot_api_stub.c
+@@ -43,7 +43,7 @@ VbError_t VbExDisplaySetDimension(uint32_t width, uint32_t height)
+ 	return VBERROR_SUCCESS;
+ }
+ 
+-VbError_t VbExDisplayScreen(uint32_t screen_type)
++VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc)
+ {
+ 	return VBERROR_SUCCESS;
+ }
+diff --git a/tests/vboot_api_devmode_tests.c b/tests/vboot_api_devmode_tests.c
+index 925a146..af90f7f 100644
+--- a/tests/vboot_api_devmode_tests.c
++++ b/tests/vboot_api_devmode_tests.c
+@@ -265,7 +265,7 @@ VbError_t VbExBeep(uint32_t msec, uint32_t frequency) {
+   return beep_return;
+ }
+ 
+-VbError_t VbExDisplayScreen(uint32_t screen_type) {
++VbError_t VbExDisplayScreen(uint32_t screen_type, VbNvContext *vnc) {
+   switch(screen_type) {
+   case VB_SCREEN_BLANK:
+     VBDEBUG(("VbExDisplayScreen(BLANK)\n"));
+-- 
+1.9.1
+
diff --git a/resources/libreboot/patch/vboot/0004-firmware-Hold-key-combination-in-developer-mode.patch b/resources/libreboot/patch/vboot/0004-firmware-Hold-key-combination-in-developer-mode.patch
new file mode 100644
index 00000000..1980d773
--- /dev/null
+++ b/resources/libreboot/patch/vboot/0004-firmware-Hold-key-combination-in-developer-mode.patch
@@ -0,0 +1,50 @@
+From 741adbf4fdb4ef72245f9373a2980ecade41f3f5 Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 10 Aug 2015 22:59:50 +0200
+Subject: [PATCH 4/7] firmware: Hold key combination in developer mode
+
+This binds the Ctrl + H key combination to hold the developer mode screen.
+
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ firmware/lib/vboot_api_kernel.c | 10 ++++++++--
+ 1 file changed, 8 insertions(+), 2 deletions(-)
+
+diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c
+index 312014b..e191137 100644
+--- a/firmware/lib/vboot_api_kernel.c
++++ b/firmware/lib/vboot_api_kernel.c
+@@ -251,7 +251,7 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p)
+ 	GoogleBinaryBlockHeader *gbb = cparams->gbb;
+ 	VbSharedDataHeader *shared =
+ 		(VbSharedDataHeader *)cparams->shared_data_blob;
+-	uint32_t allow_usb = 0, allow_legacy = 0, ctrl_d_pressed = 0;
++	uint32_t allow_usb = 0, allow_legacy = 0, ctrl_d_pressed = 0, hold = 0;
+ 	VbAudioContext *audio = 0;
+ 
+ 	VBDEBUG(("Entering %s()\n", __func__));
+@@ -364,6 +364,12 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p)
+ 			ctrl_d_pressed = 1;
+ 			goto fallout;
+ 			break;
++		case 0x08:
++			/* Ctrl+H = hold */
++			VBDEBUG(("VbBootDeveloper() - "
++				 "hold developer mode screen\n"));
++			hold = 1;
++			break;
+ 		case 0x0c:
+ 			VBDEBUG(("VbBootDeveloper() - "
+ 				 "user pressed Ctrl+L; Try legacy boot\n"));
+@@ -430,7 +436,7 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p)
+ 			VbCheckDisplayKey(cparams, key, &vnc);
+ 			break;
+ 		}
+-	} while(VbAudioLooping(audio));
++	} while(hold || VbAudioLooping(audio));
+ 
+  fallout:
+ 
+-- 
+1.9.1
+
diff --git a/resources/libreboot/patch/vboot/0005-firmware-Screen-blank-and-wait-at-disabled-USB-boot-.patch b/resources/libreboot/patch/vboot/0005-firmware-Screen-blank-and-wait-at-disabled-USB-boot-.patch
new file mode 100644
index 00000000..82d0d951
--- /dev/null
+++ b/resources/libreboot/patch/vboot/0005-firmware-Screen-blank-and-wait-at-disabled-USB-boot-.patch
@@ -0,0 +1,55 @@
+From 05a34ae55a702d0e415811fedb959f71bbd782d5 Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 10 Aug 2015 23:13:49 +0200
+Subject: [PATCH 5/7] firmware: Screen blank and wait at disabled USB boot
+ warning
+
+This blanks the screen before showing the disabled USB boot warning.
+It also waits for the user to press any key to come back to the developer mode
+screen.
+
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ firmware/lib/vboot_api_kernel.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c
+index e191137..6463571 100644
+--- a/firmware/lib/vboot_api_kernel.c
++++ b/firmware/lib/vboot_api_kernel.c
+@@ -266,6 +266,7 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p)
+ 	if (gbb->flags & GBB_FLAG_FORCE_DEV_BOOT_LEGACY)
+ 		allow_legacy = 1;
+ 
++developer_mode_screen:
+ 	/* Show the dev mode warning screen */
+ 	VbDisplayScreen(cparams, VB_SCREEN_DEVELOPER_WARNING, 0, &vnc);
+ 
+@@ -388,14 +389,23 @@ VbError_t VbBootDeveloper(VbCommonParams *cparams, LoadKernelParams *p)
+ 			if (!allow_usb) {
+ 				VBDEBUG(("VbBootDeveloper() - "
+ 					 "USB booting is disabled\n"));
++
++				VbDisplayScreen(cparams, VB_SCREEN_BLANK, 1,
++						&vnc);
++
+ 				VbExDisplayDebugInfo(
+ 					"WARNING: Booting from external media "
+ 					"(USB/SD) has not been enabled. Refer "
+ 					"to the developer-mode documentation "
+-					"for details.\n");
++					"for details.\n\n"
++					"Press any key to continue.\n\n");
+ 				VbExBeep(120, 400);
+ 				VbExSleepMs(120);
+ 				VbExBeep(120, 400);
++
++				while (!VbExKeyboardRead()) ;
++
++				goto developer_mode_screen;
+ 			} else {
+ 				/*
+ 				 * Clear the screen to show we get the Ctrl+U
+-- 
+1.9.1
+
diff --git a/resources/libreboot/patch/vboot/0006-firmware-Separate-screen-and-wait-at-device-informat.patch b/resources/libreboot/patch/vboot/0006-firmware-Separate-screen-and-wait-at-device-informat.patch
new file mode 100644
index 00000000..e2d4ef7e
--- /dev/null
+++ b/resources/libreboot/patch/vboot/0006-firmware-Separate-screen-and-wait-at-device-informat.patch
@@ -0,0 +1,79 @@
+From b724719ae34c3fd7c25502339f9029ee9e0bbb1e Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 10 Aug 2015 23:53:48 +0200
+Subject: [PATCH 6/7] firmware: Separate screen and wait at device information
+ screen
+
+This blanks the screen (instead of redrawing it) at device information and
+waits for the user to press any key to come back to the developer mode screen.
+
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ firmware/lib/vboot_api_kernel.c | 12 ++++++++++++
+ firmware/lib/vboot_display.c    | 13 ++++++++-----
+ 2 files changed, 20 insertions(+), 5 deletions(-)
+
+diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c
+index 6463571..2f33258 100644
+--- a/firmware/lib/vboot_api_kernel.c
++++ b/firmware/lib/vboot_api_kernel.c
+@@ -371,6 +371,18 @@ developer_mode_screen:
+ 				 "hold developer mode screen\n"));
+ 			hold = 1;
+ 			break;
++		case 0x09:
++			/* Ctrl+I = device information */
++			VBDEBUG(("VbBootDeveloper() - "
++				 "device info\n"));
++
++			hold = 1;
++			VbDisplayDebugInfo(cparams, &vnc);
++
++			while (!VbExKeyboardRead()) ;
++
++			goto developer_mode_screen;
++			break;
+ 		case 0x0c:
+ 			VBDEBUG(("VbBootDeveloper() - "
+ 				 "user pressed Ctrl+L; Try legacy boot\n"));
+diff --git a/firmware/lib/vboot_display.c b/firmware/lib/vboot_display.c
+index 0158cc2..c3d504d 100644
+--- a/firmware/lib/vboot_display.c
++++ b/firmware/lib/vboot_display.c
+@@ -503,7 +503,7 @@ const char *RecoveryReasonString(uint8_t code)
+ 	return "We have no idea what this means";
+ }
+ 
+-#define DEBUG_INFO_SIZE 512
++#define DEBUG_INFO_SIZE 768
+ 
+ VbError_t VbDisplayDebugInfo(VbCommonParams *cparams, VbNvContext *vncptr)
+ {
+@@ -518,8 +518,8 @@ VbError_t VbDisplayDebugInfo(VbCommonParams *cparams, VbNvContext *vncptr)
+ 	VbError_t ret;
+ 	uint32_t i;
+ 
+-	/* Redisplay current screen to overwrite any previous debug output */
+-	VbDisplayScreen(cparams, disp_current_screen, 1, vncptr);
++	/* Blank screen */
++	VbDisplayScreen(cparams, VB_SCREEN_BLANK, 1, vncptr);
+ 
+ 	/* Add hardware ID */
+ 	VbRegionReadHWID(cparams, hwid, sizeof(hwid));
+@@ -622,8 +622,11 @@ VbError_t VbDisplayDebugInfo(VbCommonParams *cparams, VbNvContext *vncptr)
+ 		used += StrnAppend(buf + used, sha1sum, DEBUG_INFO_SIZE - used);
+ 	}
+ 
+-	/* Make sure we finish with a newline */
+-	used += StrnAppend(buf + used, "\n", DEBUG_INFO_SIZE - used);
++	/* Make sure we finish with newlines */
++	used += StrnAppend(buf + used, "\n\n", DEBUG_INFO_SIZE - used);
++
++	used += StrnAppend(buf + used, "Press any key to continue\n\n",
++			   DEBUG_INFO_SIZE - used);
+ 
+ 	/* TODO: add more interesting data:
+ 	 * - Information on current disks */
+-- 
+1.9.1
+
diff --git a/resources/libreboot/patch/vboot/0007-firmware-Localization-keys-removal.patch b/resources/libreboot/patch/vboot/0007-firmware-Localization-keys-removal.patch
new file mode 100644
index 00000000..ca0e6840
--- /dev/null
+++ b/resources/libreboot/patch/vboot/0007-firmware-Localization-keys-removal.patch
@@ -0,0 +1,54 @@
+From 982044d150604b74e2bb619ca00042430dd0b73d Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Tue, 11 Aug 2015 00:07:18 +0200
+Subject: [PATCH 7/7] firmware: Localization keys removal
+
+Since we're using a text-based interface, binding the arrow keys to localization
+changes has no effect and only makes the screen flicker.
+
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ firmware/lib/vboot_api_kernel.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+diff --git a/firmware/lib/vboot_api_kernel.c b/firmware/lib/vboot_api_kernel.c
+index 2f33258..a5d2f03 100644
+--- a/firmware/lib/vboot_api_kernel.c
++++ b/firmware/lib/vboot_api_kernel.c
+@@ -229,7 +229,6 @@ int VbUserConfirms(VbCommonParams *cparams, uint32_t confirm_flags)
+ 					return 1;
+ 				}
+ 			}
+-			VbCheckDisplayKey(cparams, key, &vnc);
+ 		}
+ 		VbExSleepMs(CONFIRM_KEY_DELAY);
+ 	}
+@@ -455,7 +454,6 @@ developer_mode_screen:
+ 			break;
+ 		default:
+ 			VBDEBUG(("VbBootDeveloper() - pressed key %d\n", key));
+-			VbCheckDisplayKey(cparams, key, &vnc);
+ 			break;
+ 		}
+ 	} while(hold || VbAudioLooping(audio));
+@@ -539,8 +537,6 @@ VbError_t VbBootRecovery(VbCommonParams *cparams, LoadKernelParams *p)
+ 			 * platforms don't like to scan USB too rapidly.
+ 			 */
+ 			for (i = 0; i < REC_DISK_DELAY; i += REC_KEY_DELAY) {
+-				VbCheckDisplayKey(cparams, VbExKeyboardRead(),
+-						  &vnc);
+ 				if (VbWantShutdown(cparams->gbb->flags))
+ 					return VBERROR_SHUTDOWN_REQUESTED;
+ 				VbExSleepMs(REC_KEY_DELAY);
+@@ -638,8 +634,6 @@ VbError_t VbBootRecovery(VbCommonParams *cparams, LoadKernelParams *p)
+ 					i = 4;
+ 					break;
+ 				}
+-			} else {
+-				VbCheckDisplayKey(cparams, key, &vnc);
+ 			}
+ 			if (VbWantShutdown(cparams->gbb->flags))
+ 				return VBERROR_SHUTDOWN_REQUESTED;
+-- 
+1.9.1
+