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author | Francis Rowe <info@gluglug.org.uk> | 2015-10-10 20:54:15 +0100 |
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committer | Francis Rowe <info@gluglug.org.uk> | 2015-10-11 03:11:57 +0100 |
commit | dcda30deb167742f2f369225141a6495239bcb7f (patch) | |
tree | f52f66cc02f69aa3a28445aeb6e80d7cd34aacf7 /resources/utilities | |
parent | 3841d9a98e10620a47e1b8151458c21584ca983e (diff) | |
download | librebootfr-dcda30deb167742f2f369225141a6495239bcb7f.tar.gz librebootfr-dcda30deb167742f2f369225141a6495239bcb7f.zip |
Update coreboot-libre based on coreboot a2bed346a
More microcode blobs were deleted upstream, which are therefore no
longer deleted by coreboot-libre.
util/broadcom/secimage/misc.c is not a blob.
Some non-blobs were deleted upstream, which are therefore no
longer listed in libreboot's nonblobs list.
New non-blobs were found, added to the nonblobs list.
vboot submodule was added, since there are parts of it that
cbfstool needs. This submodule is now deblobbed by libreboot.
Diffstat (limited to 'resources/utilities')
-rwxr-xr-x | resources/utilities/coreboot-libre/deblob | 46 | ||||
-rw-r--r-- | resources/utilities/coreboot-libre/nonblobs | 44 |
2 files changed, 46 insertions, 44 deletions
diff --git a/resources/utilities/coreboot-libre/deblob b/resources/utilities/coreboot-libre/deblob index bc488bdc..f297090e 100755 --- a/resources/utilities/coreboot-libre/deblob +++ b/resources/utilities/coreboot-libre/deblob @@ -29,30 +29,6 @@ printf "Deleting blobs in coreboot\n" cd "coreboot/" # --------------------- -# Intel SoC (broadwell): CPU microcode updates -# --------------------- - -# --------------------- -# Intel SoC (baytrail): CPU microcode updates -# --------------------- - -# --------------------- -# AMD: CPU microcode updates -# --------------------- - -rm -f \ -"src/cpu/amd/model_fxx/microcode_rev_e.h" \ -"src/cpu/amd/model_fxx/microcode_rev_c.h" \ -"src/cpu/amd/model_fxx/microcode_rev_d.h" \ -"src/cpu/amd/model_10xxx/mc_patch_010000d9.h" \ -"src/cpu/amd/model_10xxx/mc_patch_01000096.h" \ -"src/cpu/amd/model_10xxx/mc_patch_010000dc.h" \ -"src/cpu/amd/model_10xxx/mc_patch_010000db.h" \ -"src/cpu/amd/model_10xxx/mc_patch_01000095.h" \ -"src/cpu/amd/model_10xxx/mc_patch_010000c7.h" \ -"src/cpu/amd/model_10xxx/mc_patch_010000c8.h" - -# --------------------- # AMD: CPU microcode updates # --------------------- rm -f \ @@ -96,12 +72,6 @@ rm -f \ "src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c" \ "src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c" -# --------------------- -# VIA (nano): CPU microcode updates -# --------------------- -rm -f \ -"src/cpu/via/nano/nano_ucode_blob.c" - # ------------------------------------- # AMD AGESA: SMU firmware # ------------------------------------- @@ -152,15 +122,19 @@ rm -f \ "src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h" \ "src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h" -# ---------------------------------- -# Purpose unknown. TODO: investigate -# ---------------------------------- +# ------------------------ +# Blobs in 3rdparty/vboot/ +# ------------------------ -# <Stepan> francis7: util/broadcom/secimage/misc.c is a precalculated crc32 polynome table -# <Stepan> It's just a standard crc32 implementation +rm -f \ +"3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin" \ +"3rdparty/vboot/tests/futility/data/bios_link_mp.bin" +# Unsure if these are proprietary blobs: rm -f \ -"util/broadcom/secimage/misc.c" +"3rdparty/vboot/tests/testcases/padding_test_vectors.inc" \ +"3rdparty/vboot/firmware/lib/cgptlib/crc32.c" \ +"3rdparty/vboot/firmware/lib/cryptolib/padding.c" printf "\n\n" diff --git a/resources/utilities/coreboot-libre/nonblobs b/resources/utilities/coreboot-libre/nonblobs index 3a616074..66fce1b3 100644 --- a/resources/utilities/coreboot-libre/nonblobs +++ b/resources/utilities/coreboot-libre/nonblobs @@ -18,8 +18,6 @@ ./src/cpu/amd/model_10xxx/processor_name.c ./src/cpu/amd/model_fxx/model_fxx_update_microcode.c ./src/cpu/amd/model_fxx/powernow_acpi.c -./src/cpu/intel/fsp_model_206ax/acpi.c -./src/cpu/intel/fsp_model_406dx/acpi.c ./src/cpu/intel/haswell/acpi.c ./src/cpu/intel/microcode/microcode.c ./src/cpu/intel/model_2065x/acpi.c @@ -78,9 +76,7 @@ ./src/mainboard/hp/pavilion_m6_1035dx/mptable.c ./src/mainboard/ibase/mb899/cmos.layout ./src/mainboard/ibase/mb899/superio_hwm.c -./src/mainboard/intel/cougar_canyon2/Kconfig ./src/mainboard/intel/minnowmax/Kconfig -./src/mainboard/intel/mohonpeak/Kconfig ./src/mainboard/intel/wtm2/i915.c ./src/mainboard/jetway/nf81-t56n-lf/Kconfig ./src/mainboard/kontron/986lcd-m/cmos.layout @@ -112,8 +108,6 @@ ./src/northbridge/amd/amdmct/mct/mcttmrl.c ./src/northbridge/amd/gx2/pll_reset.c ./src/northbridge/amd/pi/00730F01/Kconfig -./src/northbridge/intel/fsp_rangeley/fsp/Kconfig -./src/northbridge/intel/fsp_sandybridge/fsp/Kconfig ./src/northbridge/intel/gm45/raminit_rcomp_calibration.c ./src/northbridge/intel/gm45/raminit_read_write_training.c ./src/northbridge/intel/haswell/Kconfig @@ -125,7 +119,6 @@ ./src/northbridge/intel/sandybridge/gma.c ./src/northbridge/intel/sandybridge/Kconfig ./src/northbridge/intel/sandybridge/raminit.c -./src/northbridge/intel/sandybridge/raminit_native.c ./src/northbridge/via/cx700/raminit.c ./src/northbridge/via/vx800/ide.c ./src/northbridge/via/vx800/uma_ram_setting.c @@ -261,13 +254,16 @@ ./src/mainboard/intel/strago/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex ./src/mainboard/intel/strago/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex ./src/mainboard/intel/strago/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex +./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTALAR-NUD-2G-1866.spd.hex +./src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCF-1G-1866.spd.hex +./src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E6E304EE-EGCF-2G-1866.spd.hex +./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866.spd.hex ./src/mainboard/bap/ode_e20XX/BAP_Q7.spd.hex ./src/northbridge/intel/nehalem/raminit_tables.c ./src/northbridge/intel/sandybridge/raminit_patterns.h ./src/southbridge/nvidia/mcp55/early_setup_ss.h ./src/southbridge/nvidia/ck804/early_setup_ss.h ./src/southbridge/sis/sis966/early_setup_ss.h -./util/crossgcc/patches/gcc-4.9.2_riscv.patch ./util/crossgcc/patches/binutils-2.25_riscv.patch ./src/southbridge/amd/pi/hudson/Kconfig ./src/drivers/xgi/common/vb_setmode.c @@ -322,3 +318,35 @@ ./src/mainboard/intel/strago/Kconfig ./src/mainboard/amd/bettong/mptable.c ./src/northbridge/amd/pi/00660F01/Kconfig +./build/util/kconfig/zconf.tab.c +./build/util/kconfig/zconf.lex.c +./build/util/kconfig/zconf.hash.c +./util/crossgcc/patches/gcc-5.2.0_riscv.patch +./util/xcompile/xcompile +./src/northbridge/intel/sandybridge/raminit_mrc.c +./3rdparty/vboot/scripts/image_signing/tofactory.sh +./3rdparty/vboot/scripts/image_signing/sign_official_build.sh +./3rdparty/vboot/scripts/image_signing/tag_image.sh +./3rdparty/vboot/scripts/image_signing/make_dev_ssd.sh +./3rdparty/vboot/scripts/image_signing/strip_boot_from_image.sh +./3rdparty/vboot/tests/crc32_test.c +./3rdparty/vboot/tests/vb2_api_tests.c +./3rdparty/vboot/tests/run_vbutil_kernel_arg_tests.sh +./3rdparty/vboot/tests/sha_test_vectors.h +./3rdparty/vboot/tests/vb21_host_misc_tests.c +./3rdparty/vboot/tests/rsa_padding_test.h +./3rdparty/vboot/tests/gen_preamble_testdata.sh +./3rdparty/vboot/tests/load_kernel_tests.sh +./3rdparty/vboot/tests/cgptlib_test.c +./3rdparty/vboot/tests/futility/test_file_types.sh +./3rdparty/vboot/tests/futility/test_file_types.c +./3rdparty/vboot/tests/futility/test_dump_fmap.sh +./3rdparty/vboot/firmware/2lib/2sha512.c +./3rdparty/vboot/firmware/2lib/2sha256.c +./3rdparty/vboot/firmware/lib/cryptolib/sha512.c +./3rdparty/vboot/firmware/lib/cryptolib/sha256.c +./3rdparty/vboot/firmware/lib/tpm_lite/include/tlcl_structures.h +./3rdparty/vboot/utility/bmpblk_font.c +./3rdparty/vboot/utility/vbutil_what_keys +./3rdparty/vboot/cgpt/cgpt_wrapper.c +./3rdparty/vboot/futility/cmd_gbb_utility.c |