Move DEBLOB to resources/utilities/coreboot-libre/deblob

3 files changed, 310 insertions, 4 deletions

diff --git a/resources/scripts/helpers/build/release/archives b/resources/scripts/helpers/build/release/archives
index d7078b43..b488b6dd 100755
--- a/resources/scripts/helpers/build/release/archives
+++ b/resources/scripts/helpers/build/release/archives
@@ -339,11 +339,11 @@ rm -f libreboot_src/releasefilelist
 rm -f libreboot_util/releasefilelist
 rm -f releasefilelist
 
-# Delete the DEBLOB file from libreboot_src
+# Delete the deblob scripts from libreboot_src
 # Since _src doesn't distribute the download scripts,
 # and already comes with a deblobbed coreboot, the
-# deblobbing script isn't needed at all
-rm -f libreboot_src/DEBLOB
+# deblobbing scripts aren't needed at all
+rm -rf libreboot_src/resources/utilities/coreboot-libre/
 
 # We don't want to encourage development
 # to happen on the release archives. 
diff --git a/resources/scripts/helpers/download/coreboot b/resources/scripts/helpers/download/coreboot
index d5c72579..586f1c11 100755
--- a/resources/scripts/helpers/download/coreboot
+++ b/resources/scripts/helpers/download/coreboot
@@ -98,7 +98,7 @@ rm -f .gitignore
 cd ../
 
 # Deblob coreboot
-./DEBLOB
+./resources/utilities/coreboot-libre/deblob
 
 # ------------------- DONE ----------------------
 
diff --git a/resources/utilities/coreboot-libre/deblob b/resources/utilities/coreboot-libre/deblob
new file mode 100755
index 00000000..ae2305bf
--- /dev/null
+++ b/resources/utilities/coreboot-libre/deblob
@@ -0,0 +1,306 @@
+#!/bin/bash
+
+#  DEBLOB script: deblobs the version of coreboot used for this release.
+#
+#	Copyright (C) 2014, 2015 Francis Rowe <info@gluglug.org.uk>
+#
+#    This program is free software: you can redistribute it and/or modify
+#    it under the terms of the GNU General Public License as published by
+#    the Free Software Foundation, either version 3 of the License, or
+#    (at your option) any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#    GNU General Public License for more details.
+#
+#    You should have received a copy of the GNU General Public License
+#    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+
+# This script assumes that the current working directory is the root
+# of the libreboot_src/ or git clone.
+
+set -u -e -v
+
+cd coreboot/
+
+# ---------------------
+# CPU microcode updates
+# ---------------------
+rm -f \
+"src/cpu/intel/model_68x/microcode-617-MU16860c.h" \
+"src/cpu/intel/model_68x/microcode-550-MU168307.h" \
+"src/cpu/intel/model_68x/microcode-618-MU268602.h" \
+"src/cpu/intel/model_68x/microcode-729-MU268310.h" \
+"src/cpu/intel/model_68x/microcode-535-MU16810e.h" \
+"src/cpu/intel/model_68x/microcode-727-MU168313.h" \
+"src/cpu/intel/model_68x/microcode-551-MU168308.h" \
+"src/cpu/intel/model_68x/microcode-536-MU16810f.h" \
+"src/cpu/intel/model_68x/microcode-662-MU168a01.h" \
+"src/cpu/intel/model_68x/microcode-728-MU168314.h" \
+"src/cpu/intel/model_68x/microcode-538-MU168111.h" \
+"src/cpu/intel/model_68x/microcode-611-MU168607.h" \
+"src/cpu/intel/model_68x/microcode-615-MU16860a.h" \
+"src/cpu/intel/model_68x/microcode-534-MU16810d.h" \
+"src/cpu/intel/model_68x/microcode-691-MU168a04.h" \
+"src/cpu/intel/model_68x/microcode-692-MU168a05.h" \
+"src/cpu/intel/model_68x/microcode-612-MU168608.h" \
+"src/cpu/intel/model_68x/microcode-537-MU268110.h" \
+"src/cpu/intel/model_1067x/microcode-m011067660F.h" \
+"src/cpu/intel/model_1067x/microcode-m401067660F.h" \
+"src/cpu/intel/model_1067x/microcode-m441067AA0B.h" \
+"src/cpu/intel/model_1067x/microcode-m101067660F.h" \
+"src/cpu/intel/model_1067x/microcode-m041067660F.h" \
+"src/cpu/intel/model_1067x/microcode-m111067AA0B.h" \
+"src/cpu/intel/model_1067x/microcode-m801067660F.h" \
+"src/cpu/intel/model_1067x/microcode-mA01067AA0B.h" \
+"src/cpu/intel/model_1067x/microcode-m101067770A.h" \
+"src/cpu/intel/model_67x/microcode-540-MU267238.h" \
+"src/cpu/intel/model_67x/microcode-531-MU26732e.h" \
+"src/cpu/intel/model_67x/microcode-293-MU267114.h" \
+"src/cpu/intel/model_67x/microcode-539-MU167210.h" \
+"src/cpu/intel/model_67x/microcode-530-MU16730e.h" \
+"src/cpu/intel/model_65x/microcode-409-MU16522c.h" \
+"src/cpu/intel/model_65x/microcode-423-MU26522b.h" \
+"src/cpu/intel/model_65x/microcode-147-MU16502f.h" \
+"src/cpu/intel/model_65x/microcode-435-MU165141.h" \
+"src/cpu/intel/model_65x/microcode-94-MU265019.h" \
+"src/cpu/intel/model_65x/microcode-411-MU16530c.h" \
+"src/cpu/intel/model_65x/microcode-452-MU165310.h" \
+"src/cpu/intel/model_65x/microcode-412-MU16530d.h" \
+"src/cpu/intel/model_65x/microcode-430-MU165041.h" \
+"src/cpu/intel/model_65x/microcode-433-MU165045.h" \
+"src/cpu/intel/model_65x/microcode-410-MU16522d.h" \
+"src/cpu/intel/model_65x/microcode-407-MU16522a.h" \
+"src/cpu/intel/model_65x/microcode-429-MU165040.h" \
+"src/cpu/intel/model_65x/microcode-146-MU16502e.h" \
+"src/cpu/intel/model_65x/microcode-422-MU26530b.h" \
+"src/cpu/intel/model_65x/microcode-434-MU165140.h" \
+"src/cpu/intel/model_65x/microcode-436-MU165142.h" \
+"src/cpu/intel/model_f1x/microcode-1070-m02f122f.h" \
+"src/cpu/intel/model_f1x/microcode-1069-m04f122e.h" \
+"src/cpu/intel/model_f1x/microcode-1068-m01f122d.h" \
+"src/cpu/intel/model_f1x/microcode-1072-m04f1305.h" \
+"src/cpu/intel/model_6ex/microcode-1869-m806ec59.h" \
+"src/cpu/intel/model_6ex/microcode-1729-m206ec54.h" \
+"src/cpu/intel/model_6ex/microcode-1624-m206e839.h" \
+"src/cpu/intel/model_106cx/microcode-M08106CA107.h" \
+"src/cpu/intel/model_106cx/microcode-M08106C2219.h" \
+"src/cpu/intel/model_106cx/microcode-M04106C2218.h" \
+"src/cpu/intel/model_106cx/microcode-M10106CA107.h" \
+"src/cpu/intel/model_106cx/microcode-M01106C2217.h" \
+"src/cpu/intel/model_106cx/microcode-M04106CA107.h" \
+"src/cpu/intel/model_106cx/microcode-M01106CA107.h" \
+"src/cpu/intel/model_6bx/microcode-737-MU16b11c.h" \
+"src/cpu/intel/model_6bx/microcode-738-MU16b11d.h" \
+"src/cpu/intel/model_6bx/microcode-885-MU16b402.h" \
+"src/cpu/intel/model_6bx/microcode-875-MU16b401.h" \
+"src/cpu/intel/model_206ax/microcode-m12306a9_00000017.h" \
+"src/cpu/intel/model_206ax/microcode-m12206a7_00000028.h" \
+"src/cpu/intel/model_6fx/microcode-m406fbBC.h" \
+"src/cpu/intel/model_6fx/microcode-m206f25c.h" \
+"src/cpu/intel/model_6fx/microcode-m106fbBA.h" \
+"src/cpu/intel/model_6fx/microcode-m106f76a.h" \
+"src/cpu/intel/model_6fx/microcode-m46f6d2.h" \
+"src/cpu/intel/model_6fx/microcode-m206f6d1.h" \
+"src/cpu/intel/model_6fx/microcode-m206fda4.h" \
+"src/cpu/intel/model_6fx/microcode-m16f6d0.h" \
+"src/cpu/intel/model_6fx/microcode-m206fbBA.h" \
+"src/cpu/intel/model_6fx/microcode-m806fda4.h" \
+"src/cpu/intel/model_6fx/microcode-m806fbBA.h" \
+"src/cpu/intel/model_6fx/microcode-m16f25d.h" \
+"src/cpu/intel/model_6fx/microcode-m16fda4.h" \
+"src/cpu/intel/model_6fx/microcode-m016fbBA.h" \
+"src/cpu/intel/model_6fx/microcode-m806fa95.h" \
+"src/cpu/intel/model_6fx/microcode-m086fbBB.h" \
+"src/cpu/intel/model_6fx/microcode-m046fbBC.h" \
+"src/cpu/intel/model_6fx/microcode-m406f76b.h" \
+"src/cpu/intel/model_f4x/microcode-1637-m5cf4a04.h" \
+"src/cpu/intel/model_f4x/microcode-1470-m9df4703.h" \
+"src/cpu/intel/model_f4x/microcode-1735-m01f480c.h" \
+"src/cpu/intel/model_f4x/microcode-1521-m5ff4807.h" \
+"src/cpu/intel/model_f4x/microcode-1466-m02f4116.h" \
+"src/cpu/intel/model_f4x/microcode-1471-mbdf4117.h" \
+"src/cpu/intel/model_f4x/microcode-1462-mbdf4903.h" \
+"src/cpu/intel/model_f4x/microcode-1460-m9df4305.h" \
+"src/cpu/intel/model_f4x/microcode-1469-m9df4406.h" \
+"src/cpu/intel/model_f4x/microcode-1498-m5df4a02.h" \
+"src/cpu/intel/model_f4x/microcode-2492-m02f480e.h" \
+"src/cpu/intel/model_6dx/microcode-1355-m206d618.h" \
+"src/cpu/intel/model_f3x/microcode-1467-m0df330c.h" \
+"src/cpu/intel/model_f3x/microcode-1290-m0df320a.h" \
+"src/cpu/intel/model_f3x/microcode-1468-m1df3417.h" \
+"src/cpu/intel/model_69x/microcode-1376-m8069547.h" \
+"src/cpu/intel/model_69x/microcode-1374-m2069507.h" \
+"src/cpu/intel/model_69x/microcode-1373-m1069507.h" \
+"src/cpu/intel/model_f0x/microcode-965-m01f0a13.h" \
+"src/cpu/intel/model_f0x/microcode-966-m04f0a14.h" \
+"src/cpu/intel/model_f0x/microcode-964-m01f0712.h" \
+"src/cpu/intel/model_f0x/microcode-983-m02f0a15.h" \
+"src/cpu/intel/model_f0x/microcode-678-2f0708.h" \
+"src/cpu/intel/model_f2x/microcode-1341-m01f2529.h" \
+"src/cpu/intel/model_f2x/microcode-1101-m02f2738.h" \
+"src/cpu/intel/model_f2x/microcode-1102-m08f2739.h" \
+"src/cpu/intel/model_f2x/microcode-1339-m04f292e.h" \
+"src/cpu/intel/model_f2x/microcode-1100-m04f2737.h" \
+"src/cpu/intel/model_f2x/microcode-1342-m02f252a.h" \
+"src/cpu/intel/model_f2x/microcode-1105-m08f2420.h" \
+"src/cpu/intel/model_f2x/microcode-1107-m10f2421.h" \
+"src/cpu/intel/model_f2x/microcode-1338-m02f292d.h" \
+"src/cpu/intel/model_f2x/microcode-1343-m04f252b.h" \
+"src/cpu/intel/model_f2x/microcode-1340-m08f292f.h" \
+"src/cpu/intel/model_f2x/microcode-1106-m02f241f.h" \
+"src/cpu/intel/model_f2x/microcode-1104-m04f241e.h" \
+"src/cpu/intel/model_f2x/microcode-1336-m02f2610.h" \
+"src/cpu/intel/model_f2x/microcode-1346-m10f252c.h" \
+"src/cpu/intel/model_6xx/microcode-43-B_c6_617.h" \
+"src/cpu/intel/model_6xx/microcode-620-MU26a401.h" \
+"src/cpu/intel/model_6xx/microcode-359-MU166d06.h" \
+"src/cpu/intel/model_6xx/microcode-398-MU166503.h" \
+"src/cpu/intel/model_6xx/microcode-308-MU163336.h" \
+"src/cpu/intel/model_6xx/microcode-153-d2_619.h" \
+"src/cpu/intel/model_6xx/microcode-51-B_c6_616.h" \
+"src/cpu/intel/model_6xx/microcode-566-mu26a003.h" \
+"src/cpu/intel/model_6xx/microcode-400-MU166a0c.h" \
+"src/cpu/intel/model_6xx/microcode-402-MU166d07.h" \
+"src/cpu/intel/model_6xx/microcode-401-MU166a0d.h" \
+"src/cpu/intel/model_6xx/microcode-386-MU16600a.h" \
+"src/cpu/intel/model_6xx/microcode-309-MU163437.h" \
+"src/cpu/intel/model_6xx/microcode-99-B_c6_612.h" \
+"src/cpu/intel/model_6xx/microcode-588-mu26a101.h" \
+"src/cpu/intel/model_6xx/microcode-399-MU166a0b.h" \
+"src/cpu/intel/model_6xx/microcode-358-MU166d05.h" \
+"src/cpu/intel/haswell/microcode-M3240660_ffff000b.h" \
+"src/cpu/intel/haswell/microcode-M32306c1_ffff000d.h" \
+"src/cpu/intel/haswell/microcode-M32306c2_ffff0003.h" \
+"src/cpu/intel/haswell/microcode-M7240650_ffff0007.h" \
+"src/cpu/intel/haswell/microcode-M7240650_ffff000a.h" \
+"src/cpu/intel/model_f2x/microcode_m02f2203.h" \
+"src/cpu/intel/model_2065x/microcode-m9220655_00000003.h" \
+"src/cpu/amd/model_fxx/microcode_rev_d.h" \
+"src/cpu/amd/model_fxx/microcode_rev_c.h" \
+"src/cpu/amd/model_fxx/microcode_rev_e.h" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c" \
+"src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c" \
+"src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000025.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000028.c" \
+"src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000101.c" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c" \
+"src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c" \
+"src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c" \
+"src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c" \
+"src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c" \
+"src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c" \
+"src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c" \
+"src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c" \
+"src/cpu/intel/haswell/microcode-M7240651_00000015.h" \
+"src/cpu/intel/haswell/microcode-M32306c3_00000012.h" \
+"src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h" \
+"src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h" \
+"src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h" \
+"src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h" \
+"src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/excel925.h" \
+"src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbCacWeightsTN.h" \
+"src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h" \
+"src/vendorcode/amd/cimx/rd890/HotplugFirmware.h" \
+"src/cpu/amd/model_10xxx/mc_patch_01000086.h" \
+"src/cpu/amd/model_10xxx/mc_patch_01000095.h" \
+"src/cpu/amd/model_10xxx/mc_patch_01000096.h" \
+"src/cpu/amd/model_10xxx/mc_patch_0100009f.h" \
+"src/cpu/amd/model_10xxx/mc_patch_010000b6.h" \
+"src/cpu/amd/model_10xxx/mc_patch_010000bf.h" \
+"src/cpu/amd/model_10xxx/mc_patch_010000c4.h" \
+"src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc" \
+"src/cpu/via/nano/nano_ucode_blob.c" \
+"src/soc/intel/baytrail/microcode/M0C3067_0000031E.h" \
+"src/cpu/intel/model_2065x/microcode-m1220652_0000000d.h" \
+"src/soc/intel/baytrail/microcode/M0C30678_00000816.h" \
+"src/soc/intel/broadwell/microcode/microcode-M7240651_0000001C.h" \
+"src/soc/intel/broadwell/microcode/microcode-MF2306D2_FFFF0009.h" \
+"src/soc/intel/broadwell/microcode/microcode-MC0306D3_FFFF0010.h" \
+"src/soc/intel/broadwell/microcode/microcode-MC0306D4_0000000D.h" \
+"src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c"
+
+# --------------------------------------
+# Misunderstood (weird: purpose unknown)
+# --------------------------------------
+rm -f \
+"src/mainboard/google/slippy/Micron_4KTF25664HZ.spd.hex" \
+"src/mainboard/google/falco/Micron_4KTF25664HZ.spd.hex" \
+"src/mainboard/google/peppy/Micron_4KTF25664HZ.spd.hex" \
+"src/mainboard/google/link/micron_4Gb_1600_1.35v_x16.spd.hex" \
+"src/mainboard/google/rambi/spd/micron_1GiB_dimm_MT41K128M16JT-125.spd.hex" \
+"src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex" \
+"src/mainboard/google/bolt/micron_4Gb_1600_1.35v_x16.spd.hex" \
+"src/mainboard/google/link/samsung_4Gb_1600_1.35v_x16.spd.hex" \
+"src/mainboard/google/link/elpida_4Gb_1600_x16.spd.hex" \
+"src/mainboard/google/slippy/Hynix_HMT425S6AFR6A.spd.hex" \
+"src/mainboard/google/falco/Hynix_HMT425S6AFR6A.spd.hex" \
+"src/mainboard/google/falco/Elpida_EDJ4216EFBG.spd.hex" \
+"src/mainboard/google/rambi/spd/hynix_1GiB_dimm_H5TC2G63FFR-PBA.spd.hex" \
+"src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex" \
+"src/mainboard/google/bolt/samsung_4Gb_1600_1.35v_x16.spd.hex" \
+"src/mainboard/google/bolt/elpida_4Gb_1600_x16.spd.hex" \
+"src/mainboard/google/peppy/Hynix_HMT425S6AFR6A.spd.hex" \
+"src/mainboard/google/peppy/Elpida_EDJ4216EFBG.spd.hex" \
+"src/mainboard/google/samus/samsung_8Gb.spd.hex" \
+"src/mainboard/google/samus/empty.spd.hex" \
+"src/mainboard/google/samus/elpida_4Gb.spd.hex" \
+"src/mainboard/google/samus/elpida_8Gb.spd.hex" \
+"src/mainboard/google/samus/samsung_4Gb.spd.hex" \
+"src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex"
+
+# -------------------------------------
+# DSDT/SSDT (pre-coreboot/compiled blobs)
+# -------------------------------------
+rm -f \
+"src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h" \
+"src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h" \
+"src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h" \
+"src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h" \
+"src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h" \
+"src/northbridge/amd/agesa/family12/ssdt.asl"
+
+# -----------------------------------------------------------
+# southbridge nvidia/sis (unknown purpose, looks like a blob)
+# -----------------------------------------------------------
+rm -f \
+"src/southbridge/nvidia/mcp55/early_setup_ss.h" \
+"src/southbridge/nvidia/ck804/early_setup_ss.h" \
+"src/southbridge/sis/sis966/early_setup_ss.h"
+
+# ---------------------------
+# northbridge intel (raminit)
+# ---------------------------
+rm -f \
+"src/northbridge/intel/nehalem/raminit_tables.c" \
+"src/northbridge/intel/sandybridge/raminit_patterns.h"
+
+cd ../