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* Restructure D945GCLF coreboot target directoriesAndrew Robbins2019-01-1412-27/+0
| | | | | | | | The intent is to create a simple rule of thumb where arguments are given beginning with those that relate to the device's physical attributes, such as flash chip size, continuing with arguments on how to use the hardware (e.g. display mode), and ending with anything else.
* Create SeaBIOS/GRUB targets for D945GCLF corebootAndrew Robbins2019-01-123-0/+4
| | | | | | | D945GCLF ROMs can now be built with either SeaBIOS or GRUB as a default payload for use with a 1MiB flash, e.g.: './libreboot build coreboot d945gclf textmode 1mb seabios'
* Create 1MiB coreboot config/target for D945GCLFAndrew Robbins2019-01-122-0/+6
| | | | | | | | | Previously it was thought that only boards with 512KiB flash chips were produced but JohnMH (in #libreboot) ran across one with an SST25LF080A 1MiB flash. D945GCLF Coreboot ROMs can be built with, e.g.: './libreboot build coreboot d945gclf textmode 1mb'
* Amend path to SeaBIOS payload in coreboot configsAndrew Robbins2018-11-242-2/+2
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* Create SeaBIOS/GRUB targets for D945GCLF CorebootAndrew Robbins2018-10-215-0/+6
| | | | | | | | | | | Due to the limited flash space on the board, SeaBIOS is currently the sole payload option when building 512KiB-sized ROMs. D945GCLF ROMs can now be built with either SeaBIOS or GRUB as a default payload, e.g.: './libreboot build coreboot d945gclf textmode 512kb seabios', or './libreboot build coreboot d945gclf textmode 16mb grub'
* Create 512KiB,16MiB Coreboot configs/targets for D945GCLFAndrew Robbins2018-10-213-0/+11
512KiB flash is the default for this board. A 16MiB config is included for those looking to modify their board with a larger flash chip. Also, text mode is the only display mode available for this board; as such, inclusion of the textmode subtarget serves only to explicitly indicate the display mode when packaging ROMs upon release. D945GCLF Coreboot ROMs can be built with, e.g.: './libreboot build coreboot d945gclf textmode 512kb'