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| author | Francis Rowe <info@gluglug.org.uk> | 2015-06-15 20:15:36 +0100 |
|---|---|---|
| committer | Francis Rowe <info@gluglug.org.uk> | 2015-06-16 04:36:26 +0100 |
| commit | bd95009839337576c1d7ac6d022228c4ec4248a5 (patch) | |
| tree | 29622510346a315c5cb0fd766ac883147f3b4b15 /resources/utilities/coreboot-libre/deblob | |
| parent | 9f8eced929a99b2ad7b10d1b8d237779afdd98d5 (diff) | |
| download | librebootfr-bd95009839337576c1d7ac6d022228c4ec4248a5.tar.gz librebootfr-bd95009839337576c1d7ac6d022228c4ec4248a5.zip | |
Update coreboot-libre
Rebase all patches. Remove the ones that are no longer needed.
More CPU microcode updates were moved to coreboot's 3rdparty
repository, so there are less blobs for libreboot to delete
now (because the 3rdparty repository is not checked out in
libreboot).
Correct HDA verbs used for T400 (also R400, T500) (patch is in
coreboot, merged).
Diffstat (limited to 'resources/utilities/coreboot-libre/deblob')
| -rwxr-xr-x | resources/utilities/coreboot-libre/deblob | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/resources/utilities/coreboot-libre/deblob b/resources/utilities/coreboot-libre/deblob index 3ca64bb7..65611b36 100755 --- a/resources/utilities/coreboot-libre/deblob +++ b/resources/utilities/coreboot-libre/deblob @@ -31,31 +31,24 @@ cd "coreboot/" # --------------------- # Intel SoC (broadwell): CPU microcode updates # --------------------- -rm -f \ -"src/soc/intel/broadwell/microcode/microcode-M7240651_0000001C.h" \ -"src/soc/intel/broadwell/microcode/microcode-MF2306D2_FFFF0009.h" \ -"src/soc/intel/broadwell/microcode/microcode-MC0306D3_FFFF0010.h" \ -"src/soc/intel/broadwell/microcode/microcode-MC0306D4_0000000D.h" # --------------------- # Intel SoC (baytrail): CPU microcode updates # --------------------- -rm -f \ -"src/soc/intel/baytrail/microcode/M0C30678_00000816.h" \ -"src/soc/intel/baytrail/microcode/M0C3067_0000031E.h" # --------------------- # AMD: CPU microcode updates # --------------------- + rm -f \ -"src/cpu/amd/model_fxx/microcode_rev_d.h" \ -"src/cpu/amd/model_fxx/microcode_rev_c.h" \ "src/cpu/amd/model_fxx/microcode_rev_e.h" \ -"src/cpu/amd/model_10xxx/mc_patch_01000095.h" \ -"src/cpu/amd/model_10xxx/mc_patch_01000096.h" \ +"src/cpu/amd/model_fxx/microcode_rev_c.h" \ +"src/cpu/amd/model_fxx/microcode_rev_d.h" \ "src/cpu/amd/model_10xxx/mc_patch_010000d9.h" \ +"src/cpu/amd/model_10xxx/mc_patch_01000096.h" \ "src/cpu/amd/model_10xxx/mc_patch_010000dc.h" \ "src/cpu/amd/model_10xxx/mc_patch_010000db.h" \ +"src/cpu/amd/model_10xxx/mc_patch_01000095.h" \ "src/cpu/amd/model_10xxx/mc_patch_010000c7.h" \ "src/cpu/amd/model_10xxx/mc_patch_010000c8.h" @@ -159,6 +152,13 @@ rm -f \ "src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h" \ "src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h" +# ---------------------------------- +# Purpose unknown. TODO: investigate +# ---------------------------------- + +rm -f \ +"util/broadcom/secimage/misc.c" + printf "\n\n" cd "../" |