ThinkPad X200 support added to libreboot

4 files changed, 1307 insertions, 0 deletions

diff --git a/resources/libreboot/config/x200_4mb/config b/resources/libreboot/config/x200_4mb/config
new file mode 100644
index 00000000..a58ca2fe
--- /dev/null
+++ b/resources/libreboot/config/x200_4mb/config
@@ -0,0 +1,460 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_EXPERT=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_SCONFIG_GENPARSER is not set
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_EARLY_CBMEM_INIT=y
+# CONFIG_BROKEN_CAR_MIGRATE is not set
+CONFIG_DYNAMIC_CBMEM=y
+# CONFIG_COLLECT_TIMESTAMPS is not set
+# CONFIG_USE_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_RELOCATABLE_MODULES is not set
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
+# CONFIG_UPDATE_IMAGE is not set
+
+#
+# Mainboard
+#
+# CONFIG_VENDOR_AAEON is not set
+# CONFIG_VENDOR_ABIT is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_ADVANSUS is not set
+# CONFIG_VENDOR_ADVANTECH is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARIMA is not set
+# CONFIG_VENDOR_ARTECGROUP is not set
+# CONFIG_VENDOR_ASI is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_A_TREND is not set
+# CONFIG_VENDOR_AVALUE is not set
+# CONFIG_VENDOR_AXUS is not set
+# CONFIG_VENDOR_AZZA is not set
+# CONFIG_VENDOR_BACHMANN is not set
+# CONFIG_VENDOR_BCOM is not set
+# CONFIG_VENDOR_BIFFEROS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BROADCOM is not set
+# CONFIG_VENDOR_COMPAQ is not set
+# CONFIG_VENDOR_CUBIETECH is not set
+# CONFIG_VENDOR_DIGITALLOGIC is not set
+# CONFIG_VENDOR_DMP is not set
+# CONFIG_VENDOR_EAGLELION is not set
+# CONFIG_VENDOR_ECS is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GIZMOSPHERE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_IEI is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_IWAVE is not set
+# CONFIG_VENDOR_IWILL is not set
+# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LANNER is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LINUTOP is not set
+# CONFIG_VENDOR_LIPPERT is not set
+# CONFIG_VENDOR_MITAC is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NEC is not set
+# CONFIG_VENDOR_NEWISYS is not set
+# CONFIG_VENDOR_NOKIA is not set
+# CONFIG_VENDOR_NVIDIA is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_RCA is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SOYO is not set
+# CONFIG_VENDOR_SUNW is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_TECHNEXION is not set
+# CONFIG_VENDOR_TECHNOLOGIC is not set
+# CONFIG_VENDOR_TELEVIDEO is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_THOMSON is not set
+# CONFIG_VENDOR_TRAVERSE is not set
+# CONFIG_VENDOR_TYAN is not set
+# CONFIG_VENDOR_VIA is not set
+# CONFIG_VENDOR_WINENT is not set
+# CONFIG_VENDOR_WYSE is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_DIR="lenovo/x200"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200"
+CONFIG_IRQ_SLOT_COUNT=18
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_MAX_CPUS=2
+CONFIG_VGA_BIOS_ID="8086,2a42"
+CONFIG_DRIVERS_PS2_KEYBOARD=y
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+# CONFIG_VGA_BIOS is not set
+# CONFIG_CONSOLE_POST is not set
+CONFIG_UDELAY_IO=y
+CONFIG_DCACHE_RAM_BASE=0xffaf8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_ACPI_SSDTX_NUM=0
+CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+# CONFIG_PCI_64BIT_PREF_MEM is not set
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_ID_SECTION_OFFSET=0x80
+CONFIG_CACHE_ROM_SIZE_OVERRIDE=0
+CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_POST_IO=y
+CONFIG_POST_DEVICE=y
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_BOARD_LENOVO_X200=y
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+CONFIG_SEABIOS_PS2_TIMEOUT=0
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_CPU_ADDR_BITS=36
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
+CONFIG_USBDEBUG=y
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_IOMMU=y
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x400000
+CONFIG_ARCH_X86=y
+# CONFIG_ARCH_ARM is not set
+# CONFIG_ARCH_ARM64 is not set
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+# CONFIG_AP_IN_SIPI_WAIT is not set
+# CONFIG_SIPI_VECTOR_IN_ROM is not set
+CONFIG_RAMBASE=0x100000
+CONFIG_STACK_SIZE=0x1000
+CONFIG_NUM_IPI_STARTS=2
+# CONFIG_ROMCC is not set
+CONFIG_PC80_SYSTEM=y
+CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/gm45/bootblock.c"
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801ix/bootblock.c"
+CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
+# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
+CONFIG_HPET_ADDRESS=0xfed00000
+# CONFIG_ARCH_BOOTBLOCK_ARM is not set
+# CONFIG_ARCH_ROMSTAGE_ARM is not set
+# CONFIG_ARCH_RAMSTAGE_ARM is not set
+# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
+# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
+# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
+# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
+# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
+# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
+# CONFIG_ARM_BOOTBLOCK_CUSTOM is not set
+# CONFIG_CPU_HAS_BOOTBLOCK_INIT is not set
+# CONFIG_MAINBOARD_HAS_BOOTBLOCK_INIT is not set
+# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
+# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
+# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
+# CONFIG_ARCH_BOOTBLOCK_ARM_V8_64 is not set
+# CONFIG_ARCH_ROMSTAGE_ARM_V8_64 is not set
+# CONFIG_ARCH_RAMSTAGE_ARM_V8_64 is not set
+# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# CPU
+#
+# CONFIG_CPU_ALLWINNER_A10 is not set
+# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
+# CONFIG_CPU_TI_AM335X is not set
+CONFIG_XIP_ROM_SIZE=0x10000
+# CONFIG_CPU_AMD_AGESA is not set
+# CONFIG_CPU_AMD_PI is not set
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_SMM_TSEG_SIZE=0
+CONFIG_CPU_INTEL_SOCKET_BGA956=y
+CONFIG_SSE2=y
+# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
+# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
+# CONFIG_PARALLEL_CPU_INIT is not set
+# CONFIG_UDELAY_LAPIC is not set
+# CONFIG_UDELAY_TSC is not set
+# CONFIG_UDELAY_TIMER2 is not set
+# CONFIG_TSC_CALIBRATE_WITH_IO is not set
+# CONFIG_TSC_SYNC_LFENCE is not set
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_LOGICAL_CPUS=y
+# CONFIG_SMM_TSEG is not set
+# CONFIG_SMM_MODULES is not set
+# CONFIG_X86_AMD_FIXED_MTRRS is not set
+# CONFIG_PLATFORM_USES_FSP is not set
+# CONFIG_PARALLEL_MP is not set
+# CONFIG_BACKUP_DEFAULT_SMM_REGION is not set
+# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
+CONFIG_CACHE_AS_RAM=y
+CONFIG_SMP=y
+CONFIG_AP_SIPI_VECTOR=0xfffff000
+CONFIG_MMX=y
+CONFIG_SSE=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+# CONFIG_CPU_MICROCODE_CBFS_GENERATE is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set
+CONFIG_CPU_MICROCODE_CBFS_NONE=y
+
+#
+# Northbridge
+#
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_VIDEO_MB=0
+CONFIG_RAMTOP=0x200000
+# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
+# CONFIG_AMD_NB_CIMX is not set
+# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
+# CONFIG_NORTHBRIDGE_AMD_PI is not set
+CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_MAX_PIRQ_LINKS=4
+
+#
+# Southbridge
+#
+CONFIG_EHCI_BAR=0xfef00000
+# CONFIG_AMD_SB_CIMX is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
+CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# SoC
+#
+# CONFIG_SOC_NVIDIA_TEGRA124 is not set
+# CONFIG_SOC_QC_IPQ806X is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
+
+#
+# Devices
+#
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG=y
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_ON_DEVICE_ROM_RUN is not set
+# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
+# CONFIG_SPD_CACHE is not set
+CONFIG_PCI=y
+# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_AGP_PLUGIN_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCI_BUS_SEGN_BITS=0
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_PXE_ROM is not set
+
+#
+# Display
+#
+# CONFIG_FRAMEBUFFER_KEEP_VESA_MODE is not set
+
+#
+# Generic Drivers
+#
+CONFIG_DRIVERS_GENERIC_IOAPIC=y
+# CONFIG_DRIVERS_I2C_RTD2132 is not set
+# CONFIG_I2C_TPM is not set
+CONFIG_DRIVERS_ICS_954309=y
+# CONFIG_INTEL_DP is not set
+# CONFIG_INTEL_DDI is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+# CONFIG_IPMI_KCS is not set
+# CONFIG_DRIVERS_LENOVO_WACOM is not set
+# CONFIG_DRIVER_MAXIM_MAX77686 is not set
+# CONFIG_DRIVER_PARADE_PS8625 is not set
+# CONFIG_LPC_TPM is not set
+# CONFIG_DRIVERS_SIL_3114 is not set
+# CONFIG_SPI_FLASH is not set
+# CONFIG_DRIVER_TI_TPS65090 is not set
+CONFIG_DRIVERS_UART=y
+CONFIG_DRIVERS_UART_8250IO=y
+# CONFIG_NO_UART_ON_SUPERIO is not set
+# CONFIG_DRIVERS_UART_8250MEM is not set
+# CONFIG_HAVE_UART_SPECIAL is not set
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_DRIVERS_UART_PL011 is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+CONFIG_USBDEBUG_IN_ROMSTAGE=y
+CONFIG_USBDEBUG_DEFAULT_PORT=0
+# CONFIG_USBDEBUG_DONGLE_STD is not set
+# CONFIG_USBDEBUG_DONGLE_BEAGLEBONE is not set
+CONFIG_USBDEBUG_DONGLE_BEAGLEBONE_BLACK=y
+CONFIG_USBDEBUG_OPTIONAL_HUB_PORT=0
+# CONFIG_DRIVER_XPOWERS_AXP209 is not set
+# CONFIG_DRIVERS_RICOH_RCE822 is not set
+# CONFIG_TPM is not set
+CONFIG_MMCONF_SUPPORT_DEFAULT=y
+CONFIG_MMCONF_SUPPORT=y
+# CONFIG_BOOTMODE_STRAPS is not set
+
+#
+# Console
+#
+CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+CONFIG_CONSOLE_USB=y
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CONSOLE_PRERAM_BUFFER_SIZE=0xc00
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+# CONFIG_NO_POST is not set
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HAVE_ACPI_RESUME=y
+# CONFIG_HAVE_ACPI_SLIC is not set
+CONFIG_HAVE_HARD_RESET=y
+# CONFIG_HAVE_MONOTONIC_TIMER is not set
+CONFIG_HAVE_OPTION_TABLE=y
+# CONFIG_PIRQ_ROUTE is not set
+CONFIG_HAVE_SMI_HANDLER=y
+# CONFIG_PCI_IO_CFG_EXT is not set
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+CONFIG_VGA=y
+# CONFIG_GFXUMA is not set
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_PER_DEVICE_ACPI_TABLES=y
+# CONFIG_COMMON_FADT is not set
+
+#
+# System tables
+#
+CONFIG_GENERATE_MP_TABLE=y
+# CONFIG_GENERATE_PIRQ_TABLE is not set
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
+
+#
+# Payload
+#
+# CONFIG_PAYLOAD_NONE is not set
+CONFIG_PAYLOAD_ELF=y
+# CONFIG_PAYLOAD_LINUX is not set
+# CONFIG_PAYLOAD_SEABIOS is not set
+# CONFIG_PAYLOAD_FILO is not set
+# CONFIG_PAYLOAD_GRUB2 is not set
+# CONFIG_PAYLOAD_TIANOCORE is not set
+# CONFIG_SEABIOS_THREAD_OPTIONROMS is not set
+# CONFIG_SEABIOS_VGA_COREBOOT is not set
+CONFIG_PAYLOAD_FILE="grub.elf"
+CONFIG_COMPRESSED_PAYLOAD_LZMA=y
+
+#
+# Debugging
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+# CONFIG_HAVE_DEBUG_CAR is not set
+# CONFIG_HAVE_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_DEBUG_SMM_RELOCATION is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_ACPI is not set
+# CONFIG_DEBUG_USBDEBUG is not set
+# CONFIG_TRACE is not set
+# CONFIG_ENABLE_APIC_EXT_ID is not set
+CONFIG_WARNINGS_ARE_ERRORS=y
+# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
+# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
+# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
+# CONFIG_REG_SCRIPT is not set
+CONFIG_MAX_REBOOT_CNT=3
diff --git a/resources/libreboot/config/x200_8mb/config b/resources/libreboot/config/x200_8mb/config
new file mode 100644
index 00000000..ca1363de
--- /dev/null
+++ b/resources/libreboot/config/x200_8mb/config
@@ -0,0 +1,460 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_EXPERT=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_SCONFIG_GENPARSER is not set
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_EARLY_CBMEM_INIT=y
+# CONFIG_BROKEN_CAR_MIGRATE is not set
+CONFIG_DYNAMIC_CBMEM=y
+# CONFIG_COLLECT_TIMESTAMPS is not set
+# CONFIG_USE_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_RELOCATABLE_MODULES is not set
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
+# CONFIG_UPDATE_IMAGE is not set
+
+#
+# Mainboard
+#
+# CONFIG_VENDOR_AAEON is not set
+# CONFIG_VENDOR_ABIT is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_ADVANSUS is not set
+# CONFIG_VENDOR_ADVANTECH is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARIMA is not set
+# CONFIG_VENDOR_ARTECGROUP is not set
+# CONFIG_VENDOR_ASI is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_A_TREND is not set
+# CONFIG_VENDOR_AVALUE is not set
+# CONFIG_VENDOR_AXUS is not set
+# CONFIG_VENDOR_AZZA is not set
+# CONFIG_VENDOR_BACHMANN is not set
+# CONFIG_VENDOR_BCOM is not set
+# CONFIG_VENDOR_BIFFEROS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BROADCOM is not set
+# CONFIG_VENDOR_COMPAQ is not set
+# CONFIG_VENDOR_CUBIETECH is not set
+# CONFIG_VENDOR_DIGITALLOGIC is not set
+# CONFIG_VENDOR_DMP is not set
+# CONFIG_VENDOR_EAGLELION is not set
+# CONFIG_VENDOR_ECS is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GIZMOSPHERE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_IEI is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_IWAVE is not set
+# CONFIG_VENDOR_IWILL is not set
+# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LANNER is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LINUTOP is not set
+# CONFIG_VENDOR_LIPPERT is not set
+# CONFIG_VENDOR_MITAC is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NEC is not set
+# CONFIG_VENDOR_NEWISYS is not set
+# CONFIG_VENDOR_NOKIA is not set
+# CONFIG_VENDOR_NVIDIA is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_RCA is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SOYO is not set
+# CONFIG_VENDOR_SUNW is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_TECHNEXION is not set
+# CONFIG_VENDOR_TECHNOLOGIC is not set
+# CONFIG_VENDOR_TELEVIDEO is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_THOMSON is not set
+# CONFIG_VENDOR_TRAVERSE is not set
+# CONFIG_VENDOR_TYAN is not set
+# CONFIG_VENDOR_VIA is not set
+# CONFIG_VENDOR_WINENT is not set
+# CONFIG_VENDOR_WYSE is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_DIR="lenovo/x200"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200"
+CONFIG_IRQ_SLOT_COUNT=18
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_MAX_CPUS=2
+CONFIG_VGA_BIOS_ID="8086,2a42"
+CONFIG_DRIVERS_PS2_KEYBOARD=y
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+# CONFIG_VGA_BIOS is not set
+# CONFIG_CONSOLE_POST is not set
+CONFIG_UDELAY_IO=y
+CONFIG_DCACHE_RAM_BASE=0xffaf8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_ACPI_SSDTX_NUM=0
+CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+# CONFIG_PCI_64BIT_PREF_MEM is not set
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_ID_SECTION_OFFSET=0x80
+CONFIG_CACHE_ROM_SIZE_OVERRIDE=0
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_POST_IO=y
+CONFIG_POST_DEVICE=y
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_BOARD_LENOVO_X200=y
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+CONFIG_SEABIOS_PS2_TIMEOUT=0
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_CPU_ADDR_BITS=36
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
+CONFIG_USBDEBUG=y
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_IOMMU=y
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x800000
+CONFIG_ARCH_X86=y
+# CONFIG_ARCH_ARM is not set
+# CONFIG_ARCH_ARM64 is not set
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+# CONFIG_AP_IN_SIPI_WAIT is not set
+# CONFIG_SIPI_VECTOR_IN_ROM is not set
+CONFIG_RAMBASE=0x100000
+CONFIG_STACK_SIZE=0x1000
+CONFIG_NUM_IPI_STARTS=2
+# CONFIG_ROMCC is not set
+CONFIG_PC80_SYSTEM=y
+CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/gm45/bootblock.c"
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801ix/bootblock.c"
+CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
+# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
+CONFIG_HPET_ADDRESS=0xfed00000
+# CONFIG_ARCH_BOOTBLOCK_ARM is not set
+# CONFIG_ARCH_ROMSTAGE_ARM is not set
+# CONFIG_ARCH_RAMSTAGE_ARM is not set
+# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
+# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
+# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
+# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
+# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
+# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
+# CONFIG_ARM_BOOTBLOCK_CUSTOM is not set
+# CONFIG_CPU_HAS_BOOTBLOCK_INIT is not set
+# CONFIG_MAINBOARD_HAS_BOOTBLOCK_INIT is not set
+# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
+# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
+# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
+# CONFIG_ARCH_BOOTBLOCK_ARM_V8_64 is not set
+# CONFIG_ARCH_ROMSTAGE_ARM_V8_64 is not set
+# CONFIG_ARCH_RAMSTAGE_ARM_V8_64 is not set
+# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# CPU
+#
+# CONFIG_CPU_ALLWINNER_A10 is not set
+# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
+# CONFIG_CPU_TI_AM335X is not set
+CONFIG_XIP_ROM_SIZE=0x10000
+# CONFIG_CPU_AMD_AGESA is not set
+# CONFIG_CPU_AMD_PI is not set
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_SMM_TSEG_SIZE=0
+CONFIG_CPU_INTEL_SOCKET_BGA956=y
+CONFIG_SSE2=y
+# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
+# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
+# CONFIG_PARALLEL_CPU_INIT is not set
+# CONFIG_UDELAY_LAPIC is not set
+# CONFIG_UDELAY_TSC is not set
+# CONFIG_UDELAY_TIMER2 is not set
+# CONFIG_TSC_CALIBRATE_WITH_IO is not set
+# CONFIG_TSC_SYNC_LFENCE is not set
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_LOGICAL_CPUS=y
+# CONFIG_SMM_TSEG is not set
+# CONFIG_SMM_MODULES is not set
+# CONFIG_X86_AMD_FIXED_MTRRS is not set
+# CONFIG_PLATFORM_USES_FSP is not set
+# CONFIG_PARALLEL_MP is not set
+# CONFIG_BACKUP_DEFAULT_SMM_REGION is not set
+# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
+CONFIG_CACHE_AS_RAM=y
+CONFIG_SMP=y
+CONFIG_AP_SIPI_VECTOR=0xfffff000
+CONFIG_MMX=y
+CONFIG_SSE=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+# CONFIG_CPU_MICROCODE_CBFS_GENERATE is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set
+CONFIG_CPU_MICROCODE_CBFS_NONE=y
+
+#
+# Northbridge
+#
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_VIDEO_MB=0
+CONFIG_RAMTOP=0x200000
+# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
+# CONFIG_AMD_NB_CIMX is not set
+# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
+# CONFIG_NORTHBRIDGE_AMD_PI is not set
+CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_MAX_PIRQ_LINKS=4
+
+#
+# Southbridge
+#
+CONFIG_EHCI_BAR=0xfef00000
+# CONFIG_AMD_SB_CIMX is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
+CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# SoC
+#
+# CONFIG_SOC_NVIDIA_TEGRA124 is not set
+# CONFIG_SOC_QC_IPQ806X is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
+
+#
+# Devices
+#
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG=y
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_ON_DEVICE_ROM_RUN is not set
+# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
+# CONFIG_SPD_CACHE is not set
+CONFIG_PCI=y
+# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_AGP_PLUGIN_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCI_BUS_SEGN_BITS=0
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_PXE_ROM is not set
+
+#
+# Display
+#
+# CONFIG_FRAMEBUFFER_KEEP_VESA_MODE is not set
+
+#
+# Generic Drivers
+#
+CONFIG_DRIVERS_GENERIC_IOAPIC=y
+# CONFIG_DRIVERS_I2C_RTD2132 is not set
+# CONFIG_I2C_TPM is not set
+CONFIG_DRIVERS_ICS_954309=y
+# CONFIG_INTEL_DP is not set
+# CONFIG_INTEL_DDI is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+# CONFIG_IPMI_KCS is not set
+# CONFIG_DRIVERS_LENOVO_WACOM is not set
+# CONFIG_DRIVER_MAXIM_MAX77686 is not set
+# CONFIG_DRIVER_PARADE_PS8625 is not set
+# CONFIG_LPC_TPM is not set
+# CONFIG_DRIVERS_SIL_3114 is not set
+# CONFIG_SPI_FLASH is not set
+# CONFIG_DRIVER_TI_TPS65090 is not set
+CONFIG_DRIVERS_UART=y
+CONFIG_DRIVERS_UART_8250IO=y
+# CONFIG_NO_UART_ON_SUPERIO is not set
+# CONFIG_DRIVERS_UART_8250MEM is not set
+# CONFIG_HAVE_UART_SPECIAL is not set
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_DRIVERS_UART_PL011 is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+CONFIG_USBDEBUG_IN_ROMSTAGE=y
+CONFIG_USBDEBUG_DEFAULT_PORT=0
+# CONFIG_USBDEBUG_DONGLE_STD is not set
+# CONFIG_USBDEBUG_DONGLE_BEAGLEBONE is not set
+CONFIG_USBDEBUG_DONGLE_BEAGLEBONE_BLACK=y
+CONFIG_USBDEBUG_OPTIONAL_HUB_PORT=0
+# CONFIG_DRIVER_XPOWERS_AXP209 is not set
+# CONFIG_DRIVERS_RICOH_RCE822 is not set
+# CONFIG_TPM is not set
+CONFIG_MMCONF_SUPPORT_DEFAULT=y
+CONFIG_MMCONF_SUPPORT=y
+# CONFIG_BOOTMODE_STRAPS is not set
+
+#
+# Console
+#
+CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+CONFIG_CONSOLE_USB=y
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CONSOLE_PRERAM_BUFFER_SIZE=0xc00
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+# CONFIG_NO_POST is not set
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HAVE_ACPI_RESUME=y
+# CONFIG_HAVE_ACPI_SLIC is not set
+CONFIG_HAVE_HARD_RESET=y
+# CONFIG_HAVE_MONOTONIC_TIMER is not set
+CONFIG_HAVE_OPTION_TABLE=y
+# CONFIG_PIRQ_ROUTE is not set
+CONFIG_HAVE_SMI_HANDLER=y
+# CONFIG_PCI_IO_CFG_EXT is not set
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+CONFIG_VGA=y
+# CONFIG_GFXUMA is not set
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_PER_DEVICE_ACPI_TABLES=y
+# CONFIG_COMMON_FADT is not set
+
+#
+# System tables
+#
+CONFIG_GENERATE_MP_TABLE=y
+# CONFIG_GENERATE_PIRQ_TABLE is not set
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
+
+#
+# Payload
+#
+# CONFIG_PAYLOAD_NONE is not set
+CONFIG_PAYLOAD_ELF=y
+# CONFIG_PAYLOAD_LINUX is not set
+# CONFIG_PAYLOAD_SEABIOS is not set
+# CONFIG_PAYLOAD_FILO is not set
+# CONFIG_PAYLOAD_GRUB2 is not set
+# CONFIG_PAYLOAD_TIANOCORE is not set
+# CONFIG_SEABIOS_THREAD_OPTIONROMS is not set
+# CONFIG_SEABIOS_VGA_COREBOOT is not set
+CONFIG_PAYLOAD_FILE="grub.elf"
+CONFIG_COMPRESSED_PAYLOAD_LZMA=y
+
+#
+# Debugging
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+# CONFIG_HAVE_DEBUG_CAR is not set
+# CONFIG_HAVE_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_DEBUG_SMM_RELOCATION is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_ACPI is not set
+# CONFIG_DEBUG_USBDEBUG is not set
+# CONFIG_TRACE is not set
+# CONFIG_ENABLE_APIC_EXT_ID is not set
+CONFIG_WARNINGS_ARE_ERRORS=y
+# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
+# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
+# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
+# CONFIG_REG_SCRIPT is not set
+CONFIG_MAX_REBOOT_CNT=3
diff --git a/resources/utilities/ich9deblob/ich9deblob.c b/resources/utilities/ich9deblob/ich9deblob.c
new file mode 100644
index 00000000..612c75d4
--- /dev/null
+++ b/resources/utilities/ich9deblob/ich9deblob.c
@@ -0,0 +1,187 @@
+/*
+ *  ich9deblob.c
+ *
+ *  gcc -o ich9deblob ich9deblob.c ich9desc.c -I.
+ *
+ *  Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
+ *
+ *  This program is free software: you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation, either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include <stdio.h>
+#include <string.h>
+#include "ich9desc.c"
+
+#define DESCRIPTORREGIONSIZE 0x1000
+#define GBEREGIONSIZE 0x2000
+
+unsigned short GetChecksum(char* buffer, unsigned short desiredValue);
+unsigned short GetRegionWord(int i, char* buffer);
+
+int main(int argc, char *argv[])
+{
+	// check compiler bit-packs in a compatible way
+	struct DESCRIPTORREGIONRECORD descriptorRegion;
+	unsigned int descriptorRegionStructSize = sizeof(descriptorRegion);
+
+	if (DESCRIPTORREGIONSIZE != descriptorRegionStructSize){
+		printf("\nerror: compiler incompatibility: descriptor struct length is %i bytes (should be %i)\n", descriptorRegionStructSize, DESCRIPTORREGIONSIZE);
+		return 1;
+	}
+
+	char* factoryRomFilename = "factory.rom";
+	char* deblobbedDescriptorFilename = "deblobbed_descriptor.bin";
+
+	FILE* fp = NULL;
+	fp = fopen(factoryRomFilename, "rb");
+
+	if (NULL == fp)
+	{
+		printf("\nerror: could not open factory.rom\n");
+		return 1;
+	}
+
+	printf("\nfactory.rom opened successfully\n");
+
+	char descriptorBuffer[DESCRIPTORREGIONSIZE];
+
+	unsigned int readLen;
+	readLen = fread(descriptorBuffer, sizeof(char), DESCRIPTORREGIONSIZE, fp);
+	if (DESCRIPTORREGIONSIZE != readLen)
+	{
+		printf("\nerror: could not read descriptor from factory.rom (%i) bytes read\n", readLen);
+		return 1;
+	}
+
+	printf("\ndescriptor region read successfully\n");
+
+	// copy descriptor buffer into descriptor struct memory
+	memcpy(&descriptorRegion, &descriptorBuffer, DESCRIPTORREGIONSIZE);
+
+	// get original GBe region location
+	unsigned int flRegionBitShift = 12;
+	unsigned int gbeRegionLocation = descriptorRegion.regionSection.flReg3.BASE << flRegionBitShift;
+
+	fseek(fp, gbeRegionLocation, SEEK_SET);
+
+	char gbeBuffer[GBEREGIONSIZE];
+
+	readLen = fread(gbeBuffer, sizeof(char), GBEREGIONSIZE, fp);
+	if (GBEREGIONSIZE != readLen)
+	{
+		printf("\nerror: could not read GBe region from factory.rom (%i) bytes read\n", readLen);
+		return 1;
+	}
+
+	// get rom size
+	fseek(fp, 0L, SEEK_END);
+	int romSize = ftell(fp);
+
+	printf("\nfactory.rom size: [%i] bytes\n", romSize);
+
+	fclose(fp);
+
+	printf("\nOriginal Descriptor start block: %08x ; Descriptor end block: %08x\n", descriptorRegion.regionSection.flReg0.BASE << flRegionBitShift, descriptorRegion.regionSection.flReg0.LIMIT << flRegionBitShift);
+	printf("Original BIOS start block: %08x ; BIOS end block: %08x\n", descriptorRegion.regionSection.flReg1.BASE << flRegionBitShift, descriptorRegion.regionSection.flReg1.LIMIT << flRegionBitShift);
+	printf("Original ME start block: %08x ; ME end block: %08x\n", descriptorRegion.regionSection.flReg2.BASE << flRegionBitShift, descriptorRegion.regionSection.flReg2.LIMIT << flRegionBitShift);
+	printf("Original GBe start block: %08x ; GBe end block: %08x\n", gbeRegionLocation, descriptorRegion.regionSection.flReg3.LIMIT << flRegionBitShift);
+
+	// set number of regions from 4 -> 2 (0 based)
+	descriptorRegion.flMaps.flMap0.NR = 2;
+
+	// make descriptor writable from OS.
+	descriptorRegion.masterAccessSection.flMstr1.fdRegionWriteAccess = 1;
+
+	// relocate BIOS region and increase size to fill image
+	descriptorRegion.regionSection.flReg1.BASE = 3;
+	descriptorRegion.regionSection.flReg1.LIMIT = ((romSize / 0x1000) - 1);
+
+	// set ME region size to 0
+	descriptorRegion.regionSection.flReg2.BASE = 0xFFF;
+	descriptorRegion.regionSection.flReg2.LIMIT = 0;
+
+	// relocate Gbe region
+	descriptorRegion.regionSection.flReg3.BASE = 1;
+	descriptorRegion.regionSection.flReg3.LIMIT = 2;
+
+	// set Platform region size to 0
+	descriptorRegion.regionSection.flReg4.BASE = 0xFFF;
+	descriptorRegion.regionSection.flReg4.LIMIT = 0;
+
+	// disable ME in ICHSTRAP0
+	descriptorRegion.ichStraps.ichStrap0.meDisable = 1;
+
+	// disable ME and TPM in MCHSTRAP0
+	descriptorRegion.mchStraps.mchStrap0.meDisable = 1;
+	descriptorRegion.mchStraps.mchStrap0.tpmDisable = 1;
+
+	// disable ME, apart from chipset bugfixes (ME region still required)
+	//descriptorRegion.mchStraps.mchStrap0.meAlternateDisable = 1;
+
+
+	printf("\nRelocated Descriptor start block: %08x ; Descriptor end block: %08x\n", descriptorRegion.regionSection.flReg0.BASE << flRegionBitShift, descriptorRegion.regionSection.flReg0.LIMIT << flRegionBitShift);
+	printf("Relocated BIOS start block: %08x ; BIOS end block: %08x\n", descriptorRegion.regionSection.flReg1.BASE << flRegionBitShift, descriptorRegion.regionSection.flReg1.LIMIT << flRegionBitShift);
+	printf("Relocated ME start block: %08x ; ME end block: %08x\n", descriptorRegion.regionSection.flReg2.BASE << flRegionBitShift, descriptorRegion.regionSection.flReg2.LIMIT << flRegionBitShift);
+	printf("Relocated GBe start block: %08x ; GBe end block: %08x\n", descriptorRegion.regionSection.flReg3.BASE << flRegionBitShift, descriptorRegion.regionSection.flReg3.LIMIT << flRegionBitShift);
+
+
+	char deblobbedDescriptorBuffer[DESCRIPTORREGIONSIZE];
+	memcpy(&deblobbedDescriptorBuffer, &descriptorRegion, DESCRIPTORREGIONSIZE);
+
+	remove(deblobbedDescriptorFilename);
+	fp = fopen(deblobbedDescriptorFilename, "ab");
+
+	if (DESCRIPTORREGIONSIZE != fwrite(deblobbedDescriptorBuffer, sizeof(char), DESCRIPTORREGIONSIZE, fp))
+	{
+		printf("\nerror: writing descriptor region failed\n");
+		return 1;
+	}
+
+	if (GBEREGIONSIZE != fwrite(gbeBuffer, sizeof(char), GBEREGIONSIZE, fp))
+	{
+		printf("\nerror: writing GBe region failed\n");
+		return 1;
+	}
+
+	fclose(fp);
+
+	printf("\ndeblobbed descriptor successfully created: deblobbed_descriptor.bin \n");
+
+	unsigned short gbeCalculatedChecksum = GetChecksum(gbeBuffer, 0xBABA); // observed values 0xBABA 0x3ABA 0x34BA. spec defined as 0xBABA.
+	unsigned short gbeChecksum = GetRegionWord(0x3F, gbeBuffer);
+
+	printf("\ncalculated Gbe checksum: 0x%hx actual GBe checksum: 0x%hx\n", gbeCalculatedChecksum, gbeChecksum);
+
+	return 0;
+}
+
+unsigned short GetChecksum(char* regionData, unsigned short desiredValue)
+{
+	unsigned short regionWord;
+	unsigned short checksum = 0;
+
+	int i;
+	for (i = 0; i < 0x3F; i++) {
+		regionWord = GetRegionWord(i, regionData);
+		checksum += regionWord;
+	}
+	checksum = desiredValue - checksum;
+	return checksum;
+}
+
+unsigned short GetRegionWord(int index, char* regionData)
+{
+	return *((unsigned short*)(regionData + (index * 2)));
+}
diff --git a/resources/utilities/ich9deblob/ich9desc.c b/resources/utilities/ich9deblob/ich9desc.c
new file mode 100644
index 00000000..f467be72
--- /dev/null
+++ b/resources/utilities/ich9deblob/ich9desc.c
@@ -0,0 +1,200 @@
+/*
+ *  ich9desc.c
+ *
+ *  Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
+ *
+ *  This program is free software: you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation, either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+struct FLVALSIG{
+	unsigned int signature;
+};
+
+struct FLMAP0 {
+	unsigned char FCBA                      : 8;
+	unsigned char NC                        : 2;
+	unsigned char                           : 6;
+	unsigned char FRBA                      : 8;
+	unsigned char NR                        : 3;
+	unsigned char                           : 5;
+};
+
+struct FLMAP1 {
+	unsigned char FMBA                      : 8;
+	unsigned char NM                        : 3;
+	unsigned char                           : 5;
+	unsigned char FISBA                     : 8;
+	unsigned char ISL                       : 8;
+};
+
+struct FLMAP2 {
+	unsigned char FMSBA                     : 8;
+	unsigned char MSL                       : 8;
+	unsigned short                          : 16;
+};
+
+struct FLMAPS {
+	struct FLMAP0 flMap0;
+	struct FLMAP1 flMap1;
+	struct FLMAP2 flMap2;
+};
+
+struct FLCOMP {
+	unsigned char component1Density         : 3;
+	unsigned char component2Density         : 3;
+	unsigned char                           : 2;
+	unsigned char                           : 8;
+	unsigned char                           : 1;
+	unsigned char readClockFrequency        : 3;
+	unsigned char fastReadSupport           : 1;
+	unsigned char fastreadClockFrequency    : 3;
+	unsigned char writeEraseClockFrequency  : 3;
+	unsigned char readStatusClockFrequency  : 3;
+	unsigned char                           : 2;
+};
+
+struct COMPONENTSECTIONRECORD {
+	struct FLCOMP flcomp;
+	unsigned int flill;
+	unsigned int flpb;
+	unsigned char padding[36];
+};
+
+struct FLREG {
+	unsigned short BASE                     : 13;
+	unsigned short                          : 3;
+	unsigned short LIMIT                    : 13;
+	unsigned short                          : 3;
+};
+
+struct REGIONSECTIONRECORD {
+	struct FLREG flReg0;                         //  Descriptor 
+	struct FLREG flReg1;                         //  BIOS
+	struct FLREG flReg2;                         //  ME
+	struct FLREG flReg3;                         //  Gbe
+	struct FLREG flReg4;                         //  Platform
+	unsigned char padding[12];
+};
+
+struct FLMSTR {
+    unsigned short requesterId              : 16;
+	unsigned char fdRegionReadAccess        : 1;
+	unsigned char biosRegionReadAccess      : 1;
+	unsigned char meRegionReadAccess        : 1;
+	unsigned char gbeRegionReadAccess       : 1;
+	unsigned char pdRegionReadAccess        : 1;
+	unsigned char reserved1                  : 3;
+	unsigned char fdRegionWriteAccess       : 1;
+	unsigned char biosRegionWriteAccess     : 1;
+	unsigned char meRegionWriteAccess       : 1;
+	unsigned char gbeRegionWriteAccess      : 1;
+	unsigned char pdRegionWriteAccess       : 1;
+	unsigned char reserved2                  : 3;
+};
+
+
+struct MASTERACCESSSECTIONRECORD {
+	struct FLMSTR flMstr1;
+	struct FLMSTR flMstr2;
+	struct FLMSTR flMstr3;
+	unsigned char padding[148];
+};
+
+struct ICHSTRAP0 {
+	                                             // todo: add MeSmBus2Sel (boring setting)
+	unsigned char meDisable                 : 1; // If true, ME is disabled.
+	unsigned char                           : 6;
+	unsigned char tcoMode                   : 1; // TCO Mode: (Legacy,TCO Mode) The TCO Mode, along with the BMCMODE strap, determines the behavior of the IAMT SmBus controller.
+	unsigned char smBusAddress              : 7; // The ME SmBus 7-bit address.
+	unsigned char bmcMode                   : 1; // BMC mode: If true, device is in BMC mode.  If Intel(R) AMT or ASF using Intel integrated LAN then this should be false.
+	unsigned char tripPointSelect           : 1; // Trip Point Select: false the NJCLK input buffer is matched to 3.3v signal from the external PHY device, true is matched to 1.8v.
+	unsigned char                           : 2;
+	unsigned char integratedGbe             : 1; // Integrated GbE or PCI Express select: (PCI Express,,Integrated GbE) Defines what PCIe Port 6 is used for.
+	unsigned char lanPhy                    : 1; // LANPHYPC_GP12_SEL: Set to 0 for GP12 to be used as GPIO (General Purpose Input/Output), or 1 for GP12 to be used for native mode as LAN_PHYPC for 82566 LCD device
+	unsigned char                           : 3;
+	unsigned char dmiRequesterId            : 1; // DMI requestor ID security check disable: The primary purpose of this strap is to support server environments with multiple CPUs that each have a different RequesterID that can access the Flash.
+	unsigned char smBus2Address             : 7; // The ME SmBus 2 7-bit address.
+};
+
+struct ICHSTRAP1 {
+	unsigned char northMlink                : 1;  // North MLink Dynamic Clock Gate Disable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers.
+	unsigned char southMlink                : 1;  // South MLink Dynamic Clock Gate Enable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers.
+	unsigned char meSmbus                   : 1;  // ME SmBus Dynamic Clock Gate Enable : Sets the default value for the ME SMBus Dynamic Clock Gate Enable for both the ME SmBus controllers.
+	unsigned char sstDynamic                : 1;  // SST Dynamic Clock Gate Enable : Sets the default value for the SST Clock Gate Enable registers.
+	unsigned char                           : 4;
+	unsigned char northMlink2               : 1;  // North MLink 2 Non-Posted Enable : 'true':North MLink supports two downstream non-posted requests. 'false':North MLink supports one downstream non-posted requests.
+	unsigned char                           : 7;
+	unsigned short                          : 16;
+};
+
+
+struct ICHSTRAPSRECORD {
+	struct ICHSTRAP0 ichStrap0;
+	struct ICHSTRAP1 ichStrap1;
+	unsigned char padding[248];
+};
+
+struct MCHSTRAP0 {
+	unsigned char meDisable                 : 1;  // If true, ME is disabled.
+	unsigned char meBootFromFlash           : 1;  // ME boot from Flash - guessed location
+	unsigned char tpmDisable                : 1;  // iTPM Disable : When set true, iTPM Host Interface is disabled. When set false (default), iTPM is enabled.
+	unsigned char                           : 3;
+	unsigned char spiFingerprint            : 1;  // SPI Fingerprint Sensor Present: Indicates if an SPI Fingerprint sensor is present at CS#1.
+	unsigned char meAlternateDisable        : 1;  // ME Alternate Disable: Setting this bit allows ME to perform critical chipset functions but prevents loading of any ME FW applications.
+	unsigned char                           : 8;
+	unsigned short                          : 16;
+};
+
+struct MCHSTRAPSRECORD {
+	struct MCHSTRAP0 mchStrap0;
+	unsigned char padding[3292];
+};
+
+struct MEVSCCTABLERECORD {
+	unsigned int jid0;
+	unsigned int vscc0;
+	unsigned int jid1;
+	unsigned int vscc1;
+	unsigned int jid2;
+	unsigned int vscc2;
+	unsigned char padding[4];
+};
+
+struct DESCRIPTORMAP2RECORD {
+	unsigned char meVsccTableBaseAddress    : 8;
+	unsigned char meVsccTableLength         : 8;
+	unsigned short                          : 16;
+};
+
+struct OEMSECTIONRECORD {
+	unsigned char magicString[8];
+	unsigned char padding[248];
+};
+
+struct GBEREGIONRECORD {
+	unsigned char gbeRegion[8192];                //todo: implement and document this
+};
+
+struct DESCRIPTORREGIONRECORD {
+	struct FLVALSIG flValSig;
+	struct FLMAPS flMaps;
+	struct COMPONENTSECTIONRECORD componentSection;
+	struct REGIONSECTIONRECORD regionSection;
+	struct MASTERACCESSSECTIONRECORD masterAccessSection;
+	struct ICHSTRAPSRECORD ichStraps;
+	struct MCHSTRAPSRECORD mchStraps;
+	struct MEVSCCTABLERECORD meVsccTable;
+	struct DESCRIPTORMAP2RECORD descriptor2Map;
+	struct OEMSECTIONRECORD oemSection;
+};