diff options
| author | Libreboot Contributor <contributor@libreboot.org> | 2020-03-18 17:20:14 +0100 |
|---|---|---|
| committer | Libreboot Contributor <contributor@libreboot.org> | 2020-03-18 17:20:27 +0100 |
| commit | 0f6ea1c9e0a25a9b7546f96f27cef8841f0d09b5 (patch) | |
| tree | a28b9403123dd6204eb2dd8cb44eada12c169f4b /i18n/fr_FR/docs/install | |
| parent | 6e5bdd1271059a9c61c80b21001fd3d14ff25045 (diff) | |
| download | librebootfr-0f6ea1c9e0a25a9b7546f96f27cef8841f0d09b5.tar.gz librebootfr-0f6ea1c9e0a25a9b7546f96f27cef8841f0d09b5.zip | |
Creation of i18n folder containing translations of the libreboot project. Added french one, not finished.
Diffstat (limited to 'i18n/fr_FR/docs/install')
264 files changed, 3894 insertions, 0 deletions
diff --git a/i18n/fr_FR/docs/install/$ b/i18n/fr_FR/docs/install/$ new file mode 100644 index 00000000..cd98e1f1 --- /dev/null +++ b/i18n/fr_FR/docs/install/$ @@ -0,0 +1,384 @@ +--- +Titre: Instructions d'installation +... + +Cette section concerne l'installation de Libreboot sur les cibles supportées. + +NOTE: si vous éxecutiez `flashrom -p internal` pour le flashage basé logiciellement, et vous avez une erreur concernant l'accés à `/dev/mem`, vous devrez redémarrer avec le paramètre de kernel `iomem=relaxed` avant d'éxecuter flashrom, ou utiliser un kernel qui a `CONFIG_STRICT_DEVMEM ` non activé. + +Quels systèmes sont compatibles avec Libreboot ? +-------------------------------------------- + +- [Information à propos de la compatibilité matérielle Libreboot](../hardware) + + +Informations générales +------------------- + +- [Information à propos des images ROM libreboot](#rom) + +Flashage via des méthodes logicielles, sur système: +----------------------------------------- + +- [Comment mettre à jour ou installer libreboot sur tout les systèmes](#flashrom) + +- [How to update or install libreboot on all systems](#flashrom) +- [ASUS KFSN4-DRE](#flashrom) +- [ThinkPad X60/T60 (if running Lenovo BIOS)](#flashrom_lenovobios) +- [Apple MacBook2,1](#flashrom_macbook21) +- [ASUS Chromebook C201](c201.md) + +Mettre en place les programmeurs, pour le flashage externe SPI +----------------------------------------------------------------- + +- [BeagleBone Black Setup](bbb_setup.md) +- [Raspberry Pi Setup](rpi_setup.md) + +Flashage via les méthodes matérielles, sur le système: +----------------------------------------- + +- [Gigabyte GA-G41-ES2L](ga-g41m-es2l.md) +- [Intel D510MO](d510mo.md) +- [Intel D945GCLF](d945gclf.md) +- [ASUS KGPE-D16](kgpe-d16.md) +- [ASUS KCMA-D8](kcma-d8.md) +- [ASUS Chromebook C201](c201.md) +- [ThinkPad X60](x60_unbrick.md) +- [ThinkPad X60 Tablet](x60tablet_unbrick.md) +- [ThinkPad T60](t60_unbrick.md) +- [ThinkPad X200/X200S/X200T](x200_external.md) +- [ThinkPad R400](r400_external.md) +- [ThinkPad T400](t400_external.md) +- [ThinkPad T500](t500_external.md) +- [ThinkPad W500](t500_external.md) + +Information à propos des images ROM libreboot {#rom} +====================================== + +Libreboot distribue des images ROM pré-compilée, construites à partir du code source de libreboot. Ces images sont fournies pour le confort de l'utilisateur, comme ça ils n'ont pas à construire quoi que ce soit depuis la source de leur propre chef. + +Ces images ROM dans chaque archive utilise le suivant à la fin de leur nom de fichier, si elles sont construites avec la charge utile GRUB: `*_*keymap*_*mode*.rom` + +Modes disponibles: vesafb ou txtmode. Les images ROM vesafb sont recommandés pour un usage régulier, mais quand vous flashez pour la première fois utilisez la version txtmode, car elle vient avec Memtext86+, qui demande le text-mode au lieu du framebuffer d'habitude utilisé par l'initialisation des graphiques natifs de coreboot. +La machine devrait être testée avec Memtest86+ après chaque réassemblage ou changement du bios constructeur (d'origine) à cause de différences dans le code de raminit. + +`keymap` peut être une des quelques mappage de touches que le clavier supporte (il y en a quelques un), qui affecte la configuration de la disposition du clavier qui est utilisé dans GRUB. Ca n'a pas d'importance quel image ROM vous utilisez ici, tant que le mappage des touches dans GNU+Linux est concerné. + + +Les mappages de touches sont nommés en accordance avec chaque disposition de clavier supportées dans GRUB. Pour apprendre comment ces mappages de touches sont créés, regardez [../grub/\#grub\_keyboard](../grub/#grub_keyboard) + + +QEMU +---- + +Libreboot arrive avec des images ROM construites pour QEMU par défaut: + +Des exemples de comment utiliser les images ROM de libreboot dans QEMU: + + $ qemu-system-i386 -M q35 -m 512 -bios qemu_q35_ich9_keymap_mode.rom + $ qemu-system-i386 -M pc -m 512 -bios qemu_i440fx_piix4_keymap_mode.rom + +Vous pouvez optionnellement spécifié l'argument `-serial stdio`, comme ça QEMU émulera un terminal en série sur l'entrée/sortie standard (très certainement votre émulateur de terminal ou TTY). + +D'autres arguments sont disponibles pour QEMU. Le manuel contiendra plus d'informations. + +Comment mettre à jour ou installer libreboot (si vous êtes déjà en train d'éxecuter libreboot ou coreboot) {#flashrom} +===================================================================================== + +Sur toutes les cibles actuelles, mettre à jour libreboot peut être accomplit sans désassemblage, +et de ce fait, sans avoir à re-flasher extérieurement en utilisant n'important quel matériel spécialisé. +En d'autres mots, vous pouvez tout faire de façon logicielle, directement depuis le système d'exploitation qui +est en cours d'éxecution sur votre système Libreboot. + +*Si vous êtes en train d'utiliser `libreboot_src` ou git, alors rendez-vous bien sûr +que vous avez compilé les sources en premier (regardez [../git/\#build](../git/#build)).* + +Regardez à la [liste des images ROM](#rom) pour voir quelle image est compatible avec votre appareil. + + +Êtes-vous en train d'exécuter le micrologiciel d'origine propriétaire ? +------------------------------------------------------------- + +Si vous êtes en train d'éxecuter le micrologiciel propriétaire (ni libreboot ou coreboot), alors les instructions de flashage pour votre système vont être différentes. + +Les utilisateurs du X60/T60 éxecutant le micrologiciel propriétaire devrait se référer à [\#flashrom\_lenovobios](#flashrom_lenovobios). Les utilisateurs de MacBook2,1 éxecutant l'EFI d'Apple devrait se référer à [\#flashrom\_macbook21](#flashrom_macbook21) + +Les utilisateurs de X200, se référeront à [x200\_external.md](x200_external.md), ceux de R400 à [r400\_external.md](r400_external.md), ceux de T400 à [t400\_external.md](t400_external.md), et ceux de T500 et W500 à [t500\_external.md](t500_external.md) + + +ASUS KFSN4-DRE? +--------------- + +Le flashage interne devrait marcher comme il faut, même si vous êtes en train +de démarrer le micrologiciel propriétaire. + +Libreboot manque en ce moment de documentation pour re-flasher +extérieurement une puce flash LPC. Cependant, ces cartes mères ont la puce de flash +à l'intérieur d'un socket PLCC, et il est possible d'échanger à chaud +les puces. Si vous voulez sauvegarder votre image connu pour marcher, échangez +simplement à chaud la puce pour un qui est de même capacité, après avoir déchargé +une copie du micrologiciel courant (flashrom -p internal -r yourchosenname.rom), et +flashez ensuite cette puce avec l'image connue pour marcher. Vérifiez si le système +démarre encore, et si il démarre alors il est sécurisé de flashé la nouvelle image +(parce que maintenant vous avez une sauvegarde de la vieille image). + +Garder au moins une puce LPC PLCC en stock avec le micrologiciel fonctionnel dessus +est fortement recommandé, en cas de bousillage. + +*N'ÉCHANGEZ PAS à chaud la puce avec vos mains nues. Utilisez un extracteur de puce PLCC. +Elles peuvent être trouvées en ligne. +Voyez <http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>* + +Vérifez la saisie HCL: [../hardware/kfsn4-dre.md](../hardware/kfsn4-dre.md) + +ASUS KGPE-D16? +-------------- + +Si vous avez un BIOS propriétaire, vous avez besoin de flasher libreboot +extérieurement. Voir [kgpe-d16.md](kgpe-d16.md) + +Si vous déjà coreboot ou libreboot installé, sans protection contre l'écriture sur +la puce flash, alors vous pouvez le faire logiciellement (sinon, voir le lien ci-dessus). + +*N'ÉCHANGEZ PAS à chaud la puce avec vos mains nues. Utilisez un extracteur de puce PDIP-8. +Elles peuvent être trouvées en ligne. +Voyez <http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>* + +Vérifier l'entrée HCL: [../hardware/kgpe-d16.md](../hardware/kgpe-d16.md) + +ASUS KCMA-D8? +------------- + +Si vous un BIOS propriétaire, nous avons besoin de flasher +libreboot extérieurement. Voir [kmca-d8.md](kmca-d8.md). + +Si vous avez déjà coreboot ou libreboot installé, sans protection +contre l'écriture sur la puce flash, alors vous pouvez le faire +logiciellement (sinon, voir le lien ci-dessus). + +*N'ÉCHANGEZ PAS à chaud la puce avec vos mains nues. Utilisez un extracteur de puce PDIP-8. +Elles peuvent être trouvées en ligne. +Voyez <http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>* + +Vérifier l'entrée HCL: [../hardware/kgpe-d16.md](../hardware/kgpe-d16.md) + + +Intel D945GCLF? +--------------- + +Si vous éxecutez le BIOS d'usine Intel original, alors vous aurez +besoin de le flasher extérieurement. Pour des instructions sur comment + faire celà, référez-vous [d945gclf.md](d945gclf.md). + +Sinon, lisez les instructions générales en dessous pour utiliser +le script *flash*. + + +Êtes-vous en train d'éxecuter libreboot (ou coreboot)? +-------------------------------------------------- + +Les utilisateurs X60/T60 devrait être OK avec ce guide. +Si vous avez protégé en écriture la puce flash, référez-vous +silvouplait à [x60\_unbrick.md](x60_unbrick.md), +[x60tablet\_unbrick.md](x60tablet_unbrick.md) ou +[t60\_unbrick.md](t60_unbrick.md). *Cela ne s'applique pas probablement + à vous. La majorité de gens ne protège pas en écriture la puce flash, donc + vous ne l'avez probablement pas fait* + +Similairement, c'est possible de protéger en écriture la puce flash dans +coreboot ou libreboot sur les ordinateurs portables GM45 (X200/R400/T400/T500/W500). +Si vous faites ça, alors vous aurez besoin d'utiliser les liens au-dessus pour +le flashage, traitant votre ordinateur portable comme si il avait le micrologiciel +propriétaire (parce que la puce SPI protégé en écriture aura besoin d'un reflashage, +externe, comme c'est le cas quand on éxecute le micrologiciel propriétaire). + +Si vous n'avez pas protégé en écriture la puce flash,ou elle est +arrivé chez vous sans aucune protection en écriture (*libreboot ne protège +pas en écriture la puce flash par défaut, donc ça s'applique à vous*), continuez à lire! + + +Adresse MAC sur GM45 (X200/R400/T400/T500/W500) +----------------------------------------- + +*Utilisateurs du X200/R400/T400/T500/W500, prenez note:* L'adresse MAC pour le jeu de puces +ethernet embarqué est situé à l'intérieur de la puce flash. Les images ROM de Libreboot pour +ces ordinateurs portables contiennent une adresse MAC générique par défaut, mais ce n'est +pas que vous voulez. *Assurez vous bien de change l'adresse MAC à l'intérieur de l'image ROM +avant de la flasher. Les instructions dans [../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) +montrent comment faire celà. + +C'est important que vous changiez l'adresse MAC par défaut, avant flashage. +Elle sera imprimée sur un sticker en bas de l'ordinateur portable, ou il sera +imprimé sur un sticker à côté ou sous la RAM. +Alternativement, et assumant que votre micrologiciel en cours d'exécution à la +bonne adresse MAC en lui, vous pouvez la récupérer depuis votre système d'exploitation. + + +Apple iMac 5,2? +--------------- + +Le flashage interne marche, même quand on flashing depuis l'EFI d'Apple vers Libreboot. +Continuez à lire les instructions ci-dessous. + +*NOTE*: Si vous flashez une plus vieille version de libreboot, la carte mère de l'iMac5,2 est compatible avec le MacBook2,1. +Flashez simplement une image ROM MacBook2,1, et ça devrait marcher. + + +Taille de la puce flash +--------------- + +Utilisez ceci pour trouver: + + # flashrom -p internal + + +Tout bon ? +--------- + +Excellent! On bouge... + +Téléchargez l'archive *libreboot\_util.tar.xz*, et extrayez là. À +l'intérieur vous trouverez un répertoire appelé *flashrom*. Il contient +des fichiers éxecutables compilés statiquement de l'utilitaire *flashrom*, que +vous utiliserez pour re-flasher votre système libreboot. + +Utilisez simplement *cd* sur votre terminal, pour vous mettre sur le répertoire +*libreboot\_util*. À l'intérieur, il y a un script appelé *flash*, qui détectera quelle +architecture de processeur vous avez (e.g. i686, x86\_64) et utilisera l'éxecutable +approprié. Il est aussi possible pour vous de construire ces éxecutables à partir +des archives de code source de libreboot. + +Comment mettre à jour le contenu de la puce flash: + + `$ sudo ./flash update `[`yourrom.rom`](#rom) + +Occasionellement, coreboot change le nom d'une carte mère. Si flashrom se plaint à +propos d'une carte mère qui ne correspond pas, mais vous êtes sur que vous choisissez +l'image ROM correcte, alors éxecutez cette commande alternative: + + `$ sudo ./flash forceupdate `[`yourrom.rom](#rom) + +Vous devriez voir `Vérification du flash... VÉRIFIÉ.` écris à la fin de la sortie +de flashrom. *Éteignez* après que vous voyez ceci, et ensuite démarrez de nouveau après quelques secondes. + +ThinkPad X60/T60: Guide d'installation initiale (si vous êtes en train d'éxecutez le micrologiciel propriétaire) {#flashroms_lenovobios} +================================================================================== + +*Ceci est pour le ThinkPad X60 et T60 pendant que vous êtes en train +d'éxecuter le BIOS de Lenovo. Si vous êtes déjà en train d'éxecuter +coreboot ou libreboot, alors rendez-vous sur [\#flashrom](#flashrom)!* + +*Si vous pouvez, rendez-vous sûr que la batterie RTC n'est pas déchargée. Une batterie RTC déchargé peut amener à un bousillage dû car la valeur du registre BUC n'est pas maintenue..* + +*Si vous êtes en train de flasher un Lenovo ThinkPad T60, assurez-vous de lire +[../hardware/\#supported\_t60\_list](../hardware/#supported_t60_list) + +*Si vous êtes en train d'utilisez libreboot\_src ou git, alors +rendez-vous sûr que vous avez compilé les sources en premier +(voir [../git/\#build](../git/#build))* + +*Attention: ce guide n'instruirera pas l'utiliser sur comment sauvegarder +le micrologiciel original du BIOS Lenovo. Ces sauvegardes sont liés à chaque système, et +ne marcheront sur aucun autre. Pour ceci, référez-vous silvouplaît à <http://www.coreboot.org/Board:lenovo/x60/Installation>.* + +*Si vous êtes en train d'utiliser libreboot 20150518, notez qu'il y +a une erreur dans le script de flashage. faites celà: * + + rm -f patch + wget -O flash https://notabug.org/libreboot/libreboot/raw/9d850543ad90b72e0e333c98075530b31e5d23f1/flash + chmod +x flash + +La première moitié de la procédure est comme le suivant: + +`$ sudo ./flash i945lenovo_firstflash `[`yourrom.rom`](#rom) + +Vous devrez voir dans la sortie le suivant: + + Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000 are + swapped + (A mis à jour BUC.TS=1 - La rangée d'adresses 64kb à 0xFFFE0000 et 0xFFFF0000 sont échangées.) + +Vous devrez voir aussi celà dans la sortie: + + Your flash chip is in an unknown state + ... + FAILED + ... + DO NOT REBOOT OR POWEROFF + + (Votre puce de flash est dans un état inconnu + ... + A ÉCHOUÉ + ... + NE PAS REDÉMARRER OU ÉTEINDRE) + +Voir ceci veut dire que l'opération était d'un succés *retentissant* ! +*NE PANIQUEZ PAS* + +Voir ce lien pour plus de détails: +<http://thread.gmane.org/gname.linux.bios.flashrom/575>. + +Si le dessus est ce que vous voyez, alors *ÉTEIGNEZ* (mais n'enlevez pas le jus, espécialement la batterie RTC). Attendez +quelques secondes et ensuite démarrez; libreboot est éxecuté, mais il y a une deuxième procédure nécessaire (voir +ci-dessous). + +Quand vous avez démarré de nouveau, vous devez aussi faire ceci: + +`$ sudo ./flash i945lenovo_secondflash `[`yourrom.rom`](#rom) + +Si le flashage a échoué à ce stage, essayez le suivant: + +`$ sudo ./flashrom/i686/flashrom -p internal:laptop=force_I_want_a_brick -w `[`yourrom.rom`](#rom) + +Vous devriez voir dans la sortie le suivant: + + Updated BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is + untranslated + (A mis à jour BUC.TS=0 - La rangé d'adresses 128kb 0xFFFE000-0xFFFFFFFF + est non traduite) + +Vous devriez aussi voir le suivant dans la sortie: + + Vérification du flash... VÉRIFIÉ. + + +MacBook 2,1: Guide d'installation initial (si vous êtes en train d'éxecuter le micrologiciel propriétaire) {#flashrom_macbook21} +============================================================================ + +*If you have a MacBook1,1, refer to +[../hardware/\#information-about-the-macbook11](../hardware/#information-about-the-macbook11) for flashing instructions.* + +*This is for the MacBook2,1 while running Apple EFI firmware. If you +already have coreboot or libreboot running, then go to +[\#flashrom](#flashrom) instead!* + +Be sure to read the information in +[../hardware/\#information-about-the-macbook21](../hardware/#information-about-the-macbook21). + +*Warning: this guide will not instruct the user how to backup the +original Apple EFI firmware. For that, please refer to +<http://www.coreboot.org/Board:apple/macbook21>.* + +*If you are using libreboot\_src or git, then make sure that you built +the sources first (see [../git/\#build](../git/#build)).* + +Look at the [list of ROM images](#rom) to see which image is compatible +with your device. + +Use this flashing script, to install libreboot: + +`$ sudo ./flash i945apple_firstflash `[`yourrom.rom`](#rom) + +You should also see within the output the following: + + Verifying flash... VERIFIED. + +Shut down. + +Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/.index.md.swo b/i18n/fr_FR/docs/install/.index.md.swo Binary files differnew file mode 100644 index 00000000..58122958 --- /dev/null +++ b/i18n/fr_FR/docs/install/.index.md.swo diff --git a/i18n/fr_FR/docs/install/.index.md.swp b/i18n/fr_FR/docs/install/.index.md.swp Binary files differnew file mode 100644 index 00000000..d8569309 --- /dev/null +++ b/i18n/fr_FR/docs/install/.index.md.swp diff --git a/i18n/fr_FR/docs/install/bbb_setup.md b/i18n/fr_FR/docs/install/bbb_setup.md new file mode 100644 index 00000000..73b11d19 --- /dev/null +++ b/i18n/fr_FR/docs/install/bbb_setup.md @@ -0,0 +1,329 @@ +--- +title: Comment programmer une puce flash SPI avec le BeagleBone Black ou Teensy 3.1 +... + +Ce document existe en tant que guide pour lire ou écrire dans une puce +flash SPI avec le BeagleBone Black, utilisant le logiciel [flashrom] + +This document exists as a guide for reading from or writing to an SPI +flash chip with the BeagleBone Black, using the +[flashrom](http://flashrom.org/Flashrom) software. A BeagleBone Black, +rev. C was used when creating this guide, but earlier revisions may also +work. + +***NOTE: Use of BeagleBone black is for example purposes only, +don't buy it unless you want _it_ specifically.*** *There are many ARM +Single Board Computers (SBC) that are capable of in system programming +(external flashing) and they perform similarly terrible at that task. +Common use of devicetrees on those devices allows for configuring them +in similar way, but not identical, so a bit of own research is required. +Lastly SBC is an example of self-contained device that is capable of flashing, +but it's possible to use smaller device like stm32 bluepill +with another computer to achieve similar result.* + +*Note: This guide was written for Debian Stretch 9.5, which is the latest +operating system for the BeagleBone Black as of June 2019. It is possible that +these instructions may be outdated if newer operating systems versions +have been released since then.* + +There was no justification for a further section for the Teensy. Simply +refer to [this page on +flashrom.org](https://www.flashrom.org/Teensy_3.1_SPI_%2B_LPC/FWH_Flasher#ISP_Usage) +for information about how to set it up, and correlate that with the pins +on the SPI flash chip as per other guides in the libreboot documentation +for each board. At the time of writing, the teensy is tested for +flashing on the ThinkPad X200, but it should work for other targets. +here is a photo of the setup for the teensy: +<http://h5ai.swiftgeek.net/IMG_20160601_120855.jpg> + +Onto the Beaglebone black... + +Hardware requirements +===================== + +Shopping list (pictures of this hardware is shown later): + +- A [Flashrom](http://flashrom.org)-compatible external SPI + programmer: *BeagleBone Black*, sometimes referred to as 'BBB', + (rev. C) is highly recommended. You can buy one from + [Adafruit](https://www.adafruit.com) (USA), + [ElectroKit](http://electrokit.com) (Sweden) or any of the + distributors listed on [BeagleBoard's website](http://beagleboard.org/black) (look below + 'Purchase'). We recommend this product because we know that it + works well for our purposes and doesn't require any non-free + software. + +- Electrical/insulative tape: cover the entire bottom surface of the + BBB (the part that rests on a surface). This is important, when + placing the BBB on top of a board so that nothing shorts. Most + hardware/electronics stores have this. Optionally, you can use the + bottom half of a [hammond plastic + enclosure](http://www.hammondmfg.com/1593HAM.htm#BeagleBoneBlack). +- Clip for connecting to the flash chip: if you have a SOIC-16 flash + chip (16 pins), you will need the *Pomona 5252* or equivalent. For + SOIC-8 flash chips (8 pins), you will need the *Pomona 5250* or + equivalent. Do check which chip you have, before ordering a clip. + Also, you might as well buy two clips or more since they break + easily. [Farnell element 14](http://farnell.com/) sells these and + ships to many countries. Some people find these clips difficult to + get hold of, especially in South America. If you know of any good + suppliers, please contact the libreboot project with the relevant + information. *If you can't get hold of a pomona clip, some other + clips might work, e.g. 3M, but they are not always reliable. You can + also directly solder the wires to the chip, if that suits you; the + clip is just for convenience, really.* +- *External 3.3V DC power supply*, for powering the flash chip: an + ATX power supply / PSU (common on Intel/AMD desktop computers) will + work for this. A lab PSU (DC) will also work (adjusted to 3.3V). + - Getting a multimeter might be worthwhile, to verify that it's + supplying 3.3V. +- *External 5V DC power supply* (barrel connector), for powering the + BBB: the latter can have power supplied via USB, but a dedicated + power supply is recommended. These should be easy to find in most + places that sell electronics. OPTIONAL. Only needed if not + powering with the USB cable, or if you want to use [EHCI + debug](../misc/bbb_ehci.md). +- *Pin header / jumper cables* (2.54mm / 0.1" headers): you should + get male--male, male--female and female--female cables in 10cm + size. Just get a load of them. Other possible names for these + cables/wires/leads are as follows: + - flying leads + - breadboard cables (since they are often used on breadboards). + - You might also be able to make these cables yourself. + + [Adafruit](https://www.adafruit.com) sell them, as do many others. + *Some people find them difficult to buy. Please contact the + libreboot project if you know of any good sellers.* You might also + be able to make these cables yourself. For PSU connections, using + long cables, e.g. 20cm, is fine, and you can extend them longer than + that if needed. +- *Mini USB A-B cable* (the BeagleBone probably already comes with + one.) - *OPTIONAL - only needed for [EHCI + debug](../misc/bbb_ehci.md) or for serial/ssh access without + ethernet cable (g\_multi kernel module)* +- *FTDI TTL cable or debug board*: used for accessing the serial + console on the BBB. [This + page](http://elinux.org/Beagleboard:BeagleBone_Black_Serial) + contains a list. *OPTIONAL\---only needed for serial console on + the BBB, if not using SSH via ethernet cable.* + +Setting up the 3.3V DC PSU +========================== + +ATX PSU pinouts can be read on [this Wikipedia +page](https://en.wikipedia.org/wiki/Power_supply_unit_%28computer%29#Wiring_diagrams). + +You can use pin 1 or 2 (orange wire) on a 20-pin or 24-pin ATX PSU for +3.3V, and any of the ground/earth sources (black cables) for ground. +Short PS\_ON\# / Power on (green wire; pin 16 on 24-pin ATX PSU, or pin +14 on a 20-pin ATX PSU) to a ground (black; there is one right next to +it) using a wire/paperclip/jumper, then power on the PSU by grounding +PS\_ON\# (this is also how an ATX motherboard turns on a PSU). + +*DO NOT use pin 4, 6, do NOT use pin 19 or 20 (on a +20-pin ATX PSU), and DO NOT use pin 21, 22 or 23 (on a 24-pin +ATX PSU). Those wires (the red ones) are 5V, and they WILL kill +your flash chip. NEVER supply more than 3.3V to your flash +chip (that is, if it's a 3.3V flash chip; 5V and 1.8V SPI flash chips +do exist, but they are rare. Always check what voltage your chip takes. +Most of them take 3.3V).* + +You only need one 3.3V supply and one ground for the flash chip, after +grounding PS\_ON\#. + +The male end of a 0.1" or 2.54mm header cable is not thick enough to +remain permanently connected to the ATX PSU on its own. When connecting +header cables to the connector on the ATX PSU, use a female end attached +to a thicker piece of wire (you could use a paper clip), or wedge the +male end of the jumper cable into the sides of the hole in the +connector, instead of going through the centre. + +Here is an example set up:\ +![](images/x200/psu33.jpg "Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net> see license notice at the end of this document") + +Accessing the operating system on the BBB +========================================= + +Follow the [Getting Started](https://beagleboard.org/getting-started) +instructions to install the latest version of Debian onto the BBB. +It is recommended to download the eMMC IoT Flasher edition, which will +write its image to the on-board eMMC. + +The operating system on the BBB can be accessed over SSH, with username +'debian' and password 'temppwd'. Follow the instructions on the Getting +Started page for complete details. + +You will also be using the OS on your BBB for programming an SPI flash +chip. + +Alternatives to SSH (in case SSH fails) +--------------------------------------- + +You can also use a serial FTDI debug board with GNU Screen, to access +the serial console. + # screen /dev/ttyUSB0 115200 + +Here are some example photos:\ + \ + +You can also connect the USB cable from the BBB to another computer and +a new network interface will appear, with its own IP address. This is +directly accessible from SSH, or screen: + + # screen /dev/ttyACM0 115200 + +You can also access the uboot console, using the serial method instead +of SSH. + +Setting up spidev on the BBB +============================ + +Log in to the BBB using either SSH or a serial console as +described in [\#bbb\_access](#bbb_access). + +*Note: The following commands are run as root. To run them from a normal user +account, add yourself to the `gpio` group to configure the pins and the `spi` +group to access spidev.* + +Run the following commands to enable spidev: + + # config-pin P9.17 spi_cs + # config-pin P9.18 spi + # config-pin P9.21 spi + # config-pin P9.22 spi_sclk + +Verify that the spidev devices now exist: + + # ls /dev/spidev* + +Output: + + /dev/spidev1.0 /dev/spidev1.1 /dev/spidev2.0 /dev/spidev2.1 + +Now the BBB is ready to be used for flashing. The following systemd service +file can optionally be enabled to make this persistent across reboots. + +``` +[Unit] +Description=Enable SPI function on pins + +[Service] +Type=oneshot +ExecStart=config-pin P9.17 spi_cs +ExecStart=config-pin P9.18 spi +ExecStart=config-pin P9.21 spi +ExecStart=config-pin P9.22 spi_sclk +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target +``` + +Get flashrom from the libreboot\_util release archive, or build it from +libreboot\_src/git if you need to. An ARM binary (statically compiled) +for flashrom exists in libreboot\_util releases. Put the flashrom binary +on your BBB. + +You may also need ich9gen, if you will be flashing an ICH9-M laptop +(such as the X200). Get it from libreboot\_util, or build it from +libreboot\_src, and put the ARM binary for it on your BBB. + +Finally, get the ROM image that you would like to flash and put that on +your BBB. + +Now test flashrom: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 + +Output: + + Calibrating delay loop... OK. + No EEPROM/flash device found. + Note: flashrom can never write if the flash chip isn't found automatically. + +This means that it's working (the clip isn't connected to any flash +chip, so the error is fine). + +Connecting the Pomona 5250/5252 +=============================== + +Use this image for reference when connecting the pomona to the BBB: +<http://beagleboard.org/Support/bone101#headers> (D0 = MISO or connects +to MISO). + +The following shows how to connect clip to the BBB (on the P9 header), +for SOIC-16 (clip: Pomona 5252): + + NC - - 21 + 1 - - 17 + NC - - NC + NC - - NC + NC - - NC + NC - - NC + 18 - - 3.3V (PSU) + 22 - - NC - this is pin 1 on the flash chip + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + + You may also need to connect pins 1 and 9 (tie to 3.3V supply). These are HOLD# and WP#. + On some systems they are held high, if the flash chip is attached to the board. + If you're flashing a chip that isn't connected to a board, you'll almost certainly + have to connect them. + + SOIC16 pinout (more info available online, or in the datasheet for your flash chip): + HOLD 1-16 SCK + VDD 2-15 MOSI + N/C 3-14 N/C + N/C 4-13 N/C + N/C 5-12 N/C + N/C 6-11 N/C + SS 7-10 GND + MISO 8-9 WP + +The following shows how to connect clip to the BBB (on the P9 header), +for SOIC-8 (clip: Pomona 5250): + + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + + You may also need to connect pins 3 and 7 (tie to 3.3V supply). These are HOLD# and WP#. + On some systems they are held high, if the flash chip is attached to the board. + If you're flashing a chip that isn't connected to a board, you'll almost certainly + have to connect them. + + SOIC8 pinout (more info available online, or in the datasheet for your flash chip): + SS 1-8 VDD + MISO 2-7 HOLD + WP 3-6 SCK + GND 4-5 MOSI + +`NC = no connection` + +*DO NOT connect 3.3V (PSU) yet. ONLY connect this once the pomona is +connected to the flash chip.* + +*You also need to connect the BLACK wire (ground/earth) from the 3.3V +PSU to pin 2 on the BBB (P9 header). It is safe to install this now +(that is, before you connect the pomona to the flash chip); in fact, you +should.* + +if you need to extend the 3.3v psu leads, just use the same colour M-F +leads, *but* keep all other leads short and equal length (30cm or less). +Keep in mind that length isn't inversely proportional to signal quality, +so trying out different lengths will yield different results. +Same goes for spispeed. + +You should now have something that looks like this:\ +  + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ +Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>\ +Copyright © 2015 Albin Söderqvist\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/c201.md b/i18n/fr_FR/docs/install/c201.md new file mode 100644 index 00000000..94828cd8 --- /dev/null +++ b/i18n/fr_FR/docs/install/c201.md @@ -0,0 +1,220 @@ +--- +title: ASUS Chromebook C201 installation guide +x-toc-enable: true +... + +These instructions are for installing Libreboot to the ASUS Chromebook +C201 (more known under a name [*veyron speedy*](../misc/codenames.md)). +Since the device ships with Coreboot, the installation +instructions are the same before and after flashing Libreboot for the +first time. + +*If you are using libreboot\_src or git, then make sure that you built +the sources first (see [../git/\#build](../git/#build)).* + +Look at the [list of ROM images](#rom) to see which image is compatible +with your device. + +Libreboot can be installed internally from the device, with sufficient +privileges. The installation process requires using *Google's modified +version of flashrom*, that has support for reflashing the Chromebook's +SPI flash. Otherwise, flashing externally will work with the upstream +flashrom version. + +*Google's modified version of flashrom* is free software and its +source code is made available by Google: +[flashrom](https://chromium.googlesource.com/chromiumos/third_party/flashrom/).\ +It is not distributed along with Libreboot yet. However, it is +preinstalled on the device, with ChromeOS. + +Installing Libreboot internally requires sufficient privileges on the system +installed on the device. When the device has ChromeOS installed (as it does +initially), it is necessary to gain root privileges in ChromeOS, to be able to +access a root shell. + +Gaining root privileges on ChromeOS +-------------------------------- + +In order to gain root privileges on ChromeOS, developer mode has to be +enabled from the recovery mode screen and debugging features have to be +enabled in ChromeOS. + +Instructions to access the [recovery mode +screen](../depthcharge/#recovery_mode_screen) and [enabling developer +mode](../depthcharge/#enabling_developer_mode) are available on the page +dedicated to [depthcharge](../depthcharge/). + +Once developer mode is enabled, the device will boot to the [developer +mode screen](../depthcharge/#developer_mode_screen). ChromeOS can be +booted by waiting for 30 seconds (the delay is shortened in Libreboot) +or by pressing *Ctrl + D* + +After the system has booted, root access can be enabled by clicking on +the *Enable debugging features* link. A confirmation dialog will ask +whether to proceed.\ +After confirming by clicking *Proceed*, the device will reboot and ask +for the root password to set. Finally, the operation has to be confirmed +by clicking *Enable*. + +After setting the root password, it becomes possible to log-in as root. +A tty prompt can be obtained by pressing *Ctrl + Alt + Next*. The +*Next* key is the one on the top left of the keyboard. + +Preparing the device for the installation +Before installing Libreboot on the device, both its software and +hardware has to be prepared to allow the installation procedure and to +ensure that security features don't get in the way. + +Configuring verified boot parameters +------------------------------------ + +It is recommended to have access to the [developer mode +screen](../depthcharge/#developer_mode_screen) and to [configure the +following verified boot +parameters](../depthcharge/#configuring_verified_boot_parameters): + +- Kernels signature verification: *disabled* +- External media boot: *enabled* + +Those changes can be reverted later, when the device is known to be in a +working state. + +Removing the write protect screw +-------------------------------- + +Since part of the SPI flash is write-protected by a screw, it is +necessary to remove the screw to remove the write protection and allow +writing Libreboot to the *read-only* part of the flash. + +To access the screw, the device has to be opened. There are 8 screws to +remove from the bottom of the device, as shown on the picture below. Two +are hidden under the top pads. After removing the screws, the keyboard +plastic part can be carefully detached from the rest. *Beware: there +are cables attached to it!* It is advised to flip the keyboard plastic +part over, as shown on the picture below. The write protect screw is +located next to the SPI flash chip, circled in red in the picture below. +It has to be removed. + +[](images/c201/screws.jpg) [](images/c201/wp-screw.jpg) + +The write protect screw can be put back in place later, when the device +is known to be in a working state. + +Installing Libreboot to the SPI flash +===================================== + +The SPI flash (that holds Libreboot) is divided into various partitions +that are used to implement parts of the CrOS security system. Libreboot +is installed in the *read-only* coreboot partition, that becomes +writable after removing the write-protect screw. + +Installing Libreboot internally, from the device +------------------------------------------------ + +Before installing Libreboot to the SPI flash internally, the device has +to be reassembled. + +All the files from the `veyron_speedy` release (or build) have to be +transferred to the device. + +The following operations have to be executed with root privileges on the +device (e.g. using the `root` account). In addition, the +`cros-flash-replace` script has to be made executable: + + # chmod a+x cros-flash-replace + +The SPI flash has to be read first: + + # flashrom -p host -r flash.img + +*Note: it might be a good idea to copy the produced flash.img file at +this point and store it outside of the device for backup purposes.* + +Then, the `cros-flash-replace` script has to be executed as such: + + # sudo bash ./cros-flash-replace flash.img coreboot ro-frid + +If any error is shown, it is definitely a bad idea to go further than +this point. + +The resulting flash image can then be flashed back: + + # flashrom -p host -w flash.img + +You should also see within the output the following: + + Verifying flash... VERIFIED. + +Shut down. The device will now boot to Libreboot. + +Installing Libreboot externally, with a SPI flash programmer +------------------------------------------------------------ + +Before installing Libreboot to the SPI flash internally, the device has +to be opened. + +The SPI flash is located next to the write protect screw. Its layout is +indicated in the picture below. Note that it is not necessary to connect +`WP#` since after removing the screw it is pulled up weakly to 3v3. Before +writing to the chip externally, the battery has to be unplugged. +Battery connector is located under the heat spreader, that has to be +unscrewed from the rest of the case. It is located on +the right and has colorful cables, as shown on the picture below. + +[](images/c201/spi-flash-layout.jpg) +[](images/c201/battery-connector.jpg) + +All the files from the `veyron_speedy` release (or build) have to be +transferred to the host. + +The following operations have to be executed with root privileges on the +host (e.g. using the `root` account). In addition, the +`cros-flash-replace` script has to be made executable: + + # chmod a+x cros-flash-replace + +The SPI flash has to be read first (using the right spi programmer): + + # flashrom -p *programmer* -r flash.img + +*Note: it might be a good idea to copy the produced flash.img file at +this point and store it outside of the device for backup purposes.* + +Then, the `cros-flash-replace` script has to be executed as such: + + # ./cros-flash-replace flash.img coreboot ro-frid + +If any error is shown, it is definitely a bad idea to go further than +this point. + +The resulting flash image can then be flashed back (using the right spi +programmer): + + # flashrom -p *programmer* -w flash.img + +You should also see within the output the following: + + Verifying flash... VERIFIED. + +The device will now boot to Libreboot. + +Installing Debian +--------------------- +Debian is recommended for this device (which is on that list. + +See <https://wiki.debian.org/InstallingDebianOn/Asus/C201>. + +Also look at the HCL entry for operating systems (Debian, Devuan, Parabola): +<https://libreboot.org/docs/hardware/c201.md> + +Copyright © 2015 Paul Kocialkowski <contact@paulk.fr>\ +Copyright © 2017 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/d510mo.md b/i18n/fr_FR/docs/install/d510mo.md new file mode 100644 index 00000000..315962b8 --- /dev/null +++ b/i18n/fr_FR/docs/install/d510mo.md @@ -0,0 +1,30 @@ +--- +title: D510MO flashing tutorial +... + +This guide is for those who want libreboot on their Intel D510MO +motherboard while they still have the original BIOS present. + +Flash chip size {#flashchips} +=============== + +Use this to find out: + + # flashrom -p internal + +Flashing instructions {#clip} +===================== + +Refer to [bbb\_setup.md](bbb_setup.md) for how to set up the BBB for +flashing. + +This is an image of the flash chip, for reference:\ + + +Copyright © 2016 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/d945gclf.md b/i18n/fr_FR/docs/install/d945gclf.md new file mode 100644 index 00000000..ddb52a64 --- /dev/null +++ b/i18n/fr_FR/docs/install/d945gclf.md @@ -0,0 +1,26 @@ +--- +title: Intel D945GCLF flashing tutorial +... + +This guide is for those who want libreboot on their Intel D945GCLF +motherboard while they still have the original BIOS present. + +For information about this board, go to +[../hardware/d945gclf.md](../hardware/d945gclf.md) + +Flashing instructions {#clip} +===================== + +Refer to [bbb\_setup.md](bbb_setup.md) for how to set up the BBB for +external flashing. + +Here is an image of the flash chip:\ + + +Copyright © 2016 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/ga-g41m-es2l.md b/i18n/fr_FR/docs/install/ga-g41m-es2l.md new file mode 100644 index 00000000..6020565e --- /dev/null +++ b/i18n/fr_FR/docs/install/ga-g41m-es2l.md @@ -0,0 +1,55 @@ +--- +title: GA-G41M-ES2L flashing tutorial +... + +This guide is for those who want libreboot on their Intel GA-G41M-ES2L +motherboard while they still have the original BIOS present. + +Flash chip size {#flashchips} +=============== + +Use this to find out: + + # flashrom -p internal + +Flashing instructions {#clip} +===================== + +Refer to [bbb\_setup.md](bbb_setup.md) for how to set up the BBB for +external flashing. *You can only externally reprogram one of the chips +at a time, and you need to disable the chip that you're not flashing, +by connecting 3v3 to /CS of that chip, so you will actually need second test +clip or IC pin mini grabber.* + +Here is an image of the flash chip:\ + + +Internal flashing is possible. Boot with the proprietary BIOS and +GNU+Linux. There are 2 flash chips (one is backup). + +Flash the first chip: + + ./flashrom -p internal:dualbiosindex=0 -w libreboot.rom + +Flash the second chip: + + ./flashrom -p internal:dualbiosindex=1 -w libreboot.rom + +NOTE: you can still boot the system with just the main flash chip +connected, after desoldering the backup chip. This has been tested while +libreboot was already installed onto the main chip. + +NOTE: You need the latest flashrom. Just get it on flashrom.org from +their SVN or Git repos. + +NOTE: due to a bug in the hardware, the MAC address is hardcoded in +coreboot-libre. Therefore, you must set your own MAC address in your +operating system. + +Copyright © 2016 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/images/c201/battery-connector.jpg b/i18n/fr_FR/docs/install/images/c201/battery-connector.jpg Binary files differnew file mode 100644 index 00000000..85f0e631 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/c201/battery-connector.jpg diff --git a/i18n/fr_FR/docs/install/images/c201/screws.jpg b/i18n/fr_FR/docs/install/images/c201/screws.jpg Binary files differnew file mode 100644 index 00000000..58585d5a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/c201/screws.jpg diff --git a/i18n/fr_FR/docs/install/images/c201/spi-flash-layout.jpg b/i18n/fr_FR/docs/install/images/c201/spi-flash-layout.jpg Binary files differnew file mode 100644 index 00000000..9968ca71 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/c201/spi-flash-layout.jpg diff --git a/i18n/fr_FR/docs/install/images/c201/wp-screw.jpg b/i18n/fr_FR/docs/install/images/c201/wp-screw.jpg Binary files differnew file mode 100644 index 00000000..77c76dc1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/c201/wp-screw.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0000.jpg b/i18n/fr_FR/docs/install/images/r400/0000.jpg Binary files differnew file mode 100644 index 00000000..80635551 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0000.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0001.jpg b/i18n/fr_FR/docs/install/images/r400/0001.jpg Binary files differnew file mode 100644 index 00000000..e8f988d2 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0001.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0002.jpg b/i18n/fr_FR/docs/install/images/r400/0002.jpg Binary files differnew file mode 100644 index 00000000..f22ddea9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0002.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0003.jpg b/i18n/fr_FR/docs/install/images/r400/0003.jpg Binary files differnew file mode 100644 index 00000000..66ff685a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0003.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0004.jpg b/i18n/fr_FR/docs/install/images/r400/0004.jpg Binary files differnew file mode 100644 index 00000000..8f3c38a8 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0004.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0005.jpg b/i18n/fr_FR/docs/install/images/r400/0005.jpg Binary files differnew file mode 100644 index 00000000..b228da29 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0005.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0006.jpg b/i18n/fr_FR/docs/install/images/r400/0006.jpg Binary files differnew file mode 100644 index 00000000..64633652 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0006.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0007.jpg b/i18n/fr_FR/docs/install/images/r400/0007.jpg Binary files differnew file mode 100644 index 00000000..9bd60033 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0007.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0008.jpg b/i18n/fr_FR/docs/install/images/r400/0008.jpg Binary files differnew file mode 100644 index 00000000..eae67fdf --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0008.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0009.jpg b/i18n/fr_FR/docs/install/images/r400/0009.jpg Binary files differnew file mode 100644 index 00000000..7525f3f1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0009.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0010.jpg b/i18n/fr_FR/docs/install/images/r400/0010.jpg Binary files differnew file mode 100644 index 00000000..2eeac9f4 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0010.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0011.jpg b/i18n/fr_FR/docs/install/images/r400/0011.jpg Binary files differnew file mode 100644 index 00000000..df8b8bb8 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0011.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0012.jpg b/i18n/fr_FR/docs/install/images/r400/0012.jpg Binary files differnew file mode 100644 index 00000000..29a80235 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0012.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0013.jpg b/i18n/fr_FR/docs/install/images/r400/0013.jpg Binary files differnew file mode 100644 index 00000000..af4f7f87 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0013.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0014.jpg b/i18n/fr_FR/docs/install/images/r400/0014.jpg Binary files differnew file mode 100644 index 00000000..6f35acec --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0014.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0015.jpg b/i18n/fr_FR/docs/install/images/r400/0015.jpg Binary files differnew file mode 100644 index 00000000..e0424003 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0015.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0016.jpg b/i18n/fr_FR/docs/install/images/r400/0016.jpg Binary files differnew file mode 100644 index 00000000..3406c8cf --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0016.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0017.jpg b/i18n/fr_FR/docs/install/images/r400/0017.jpg Binary files differnew file mode 100644 index 00000000..ca065c3d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0017.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0018.jpg b/i18n/fr_FR/docs/install/images/r400/0018.jpg Binary files differnew file mode 100644 index 00000000..c7fb419a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0018.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0019.jpg b/i18n/fr_FR/docs/install/images/r400/0019.jpg Binary files differnew file mode 100644 index 00000000..d36b13d9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0019.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0020.jpg b/i18n/fr_FR/docs/install/images/r400/0020.jpg Binary files differnew file mode 100644 index 00000000..016328ae --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0020.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0021.jpg b/i18n/fr_FR/docs/install/images/r400/0021.jpg Binary files differnew file mode 100644 index 00000000..101e2b85 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0021.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0022.jpg b/i18n/fr_FR/docs/install/images/r400/0022.jpg Binary files differnew file mode 100644 index 00000000..4baeb290 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0022.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0023.jpg b/i18n/fr_FR/docs/install/images/r400/0023.jpg Binary files differnew file mode 100644 index 00000000..b60cb172 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0023.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0024.jpg b/i18n/fr_FR/docs/install/images/r400/0024.jpg Binary files differnew file mode 100644 index 00000000..32d9b109 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0024.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0025.jpg b/i18n/fr_FR/docs/install/images/r400/0025.jpg Binary files differnew file mode 100644 index 00000000..193e442b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0025.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0026.jpg b/i18n/fr_FR/docs/install/images/r400/0026.jpg Binary files differnew file mode 100644 index 00000000..97eb9687 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0026.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0027.jpg b/i18n/fr_FR/docs/install/images/r400/0027.jpg Binary files differnew file mode 100644 index 00000000..ee639765 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0027.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0028.jpg b/i18n/fr_FR/docs/install/images/r400/0028.jpg Binary files differnew file mode 100644 index 00000000..b3682e8c --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0028.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0029.jpg b/i18n/fr_FR/docs/install/images/r400/0029.jpg Binary files differnew file mode 100644 index 00000000..2eaca253 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0029.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0030.jpg b/i18n/fr_FR/docs/install/images/r400/0030.jpg Binary files differnew file mode 100644 index 00000000..654984ad --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0030.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0031.jpg b/i18n/fr_FR/docs/install/images/r400/0031.jpg Binary files differnew file mode 100644 index 00000000..30a86bc9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0031.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0032.jpg b/i18n/fr_FR/docs/install/images/r400/0032.jpg Binary files differnew file mode 100644 index 00000000..1e4a0f66 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0032.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0033.jpg b/i18n/fr_FR/docs/install/images/r400/0033.jpg Binary files differnew file mode 100644 index 00000000..cedc32df --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0033.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0034.jpg b/i18n/fr_FR/docs/install/images/r400/0034.jpg Binary files differnew file mode 100644 index 00000000..743d3b37 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0034.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0035.jpg b/i18n/fr_FR/docs/install/images/r400/0035.jpg Binary files differnew file mode 100644 index 00000000..86f522c8 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0035.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0036.jpg b/i18n/fr_FR/docs/install/images/r400/0036.jpg Binary files differnew file mode 100644 index 00000000..2abc758e --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0036.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0037.jpg b/i18n/fr_FR/docs/install/images/r400/0037.jpg Binary files differnew file mode 100644 index 00000000..52e9b772 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0037.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0038.jpg b/i18n/fr_FR/docs/install/images/r400/0038.jpg Binary files differnew file mode 100644 index 00000000..e636cdcf --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0038.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0039.jpg b/i18n/fr_FR/docs/install/images/r400/0039.jpg Binary files differnew file mode 100644 index 00000000..4de90aaa --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0039.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0040.jpg b/i18n/fr_FR/docs/install/images/r400/0040.jpg Binary files differnew file mode 100644 index 00000000..3bd5eacb --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0040.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0041.jpg b/i18n/fr_FR/docs/install/images/r400/0041.jpg Binary files differnew file mode 100644 index 00000000..6b1c1070 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0041.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0042.jpg b/i18n/fr_FR/docs/install/images/r400/0042.jpg Binary files differnew file mode 100644 index 00000000..bb90eafc --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0042.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0043.jpg b/i18n/fr_FR/docs/install/images/r400/0043.jpg Binary files differnew file mode 100644 index 00000000..67a7047f --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0043.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0044.jpg b/i18n/fr_FR/docs/install/images/r400/0044.jpg Binary files differnew file mode 100644 index 00000000..edeb4c9d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0044.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0045.jpg b/i18n/fr_FR/docs/install/images/r400/0045.jpg Binary files differnew file mode 100644 index 00000000..a18cbfe1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0045.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0046.jpg b/i18n/fr_FR/docs/install/images/r400/0046.jpg Binary files differnew file mode 100644 index 00000000..5274f0fd --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0046.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0047.jpg b/i18n/fr_FR/docs/install/images/r400/0047.jpg Binary files differnew file mode 100644 index 00000000..d8e7031f --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0047.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0048.jpg b/i18n/fr_FR/docs/install/images/r400/0048.jpg Binary files differnew file mode 100644 index 00000000..3f083c4c --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0048.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0049.jpg b/i18n/fr_FR/docs/install/images/r400/0049.jpg Binary files differnew file mode 100644 index 00000000..1e648c5a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0049.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0050.jpg b/i18n/fr_FR/docs/install/images/r400/0050.jpg Binary files differnew file mode 100644 index 00000000..74824ee1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0050.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0051.jpg b/i18n/fr_FR/docs/install/images/r400/0051.jpg Binary files differnew file mode 100644 index 00000000..fb485253 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0051.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/0052.jpg b/i18n/fr_FR/docs/install/images/r400/0052.jpg Binary files differnew file mode 100644 index 00000000..386557ab --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/0052.jpg diff --git a/i18n/fr_FR/docs/install/images/r400/r400_pomona.jpg b/i18n/fr_FR/docs/install/images/r400/r400_pomona.jpg Binary files differnew file mode 100644 index 00000000..c9a47e4f --- /dev/null +++ b/i18n/fr_FR/docs/install/images/r400/r400_pomona.jpg diff --git a/i18n/fr_FR/docs/install/images/rpi/0000.jpg b/i18n/fr_FR/docs/install/images/rpi/0000.jpg Binary files differnew file mode 100644 index 00000000..e2a05e9e --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0000.jpg diff --git a/i18n/fr_FR/docs/install/images/rpi/0001.jpg b/i18n/fr_FR/docs/install/images/rpi/0001.jpg Binary files differnew file mode 100644 index 00000000..0ee8dfa8 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0001.jpg diff --git a/i18n/fr_FR/docs/install/images/rpi/0002.jpg b/i18n/fr_FR/docs/install/images/rpi/0002.jpg Binary files differnew file mode 100644 index 00000000..18e501bf --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0002.jpg diff --git a/i18n/fr_FR/docs/install/images/rpi/0003.png b/i18n/fr_FR/docs/install/images/rpi/0003.png Binary files differnew file mode 100644 index 00000000..c7a3b9b2 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0003.png diff --git a/i18n/fr_FR/docs/install/images/rpi/0004.jpg b/i18n/fr_FR/docs/install/images/rpi/0004.jpg Binary files differnew file mode 100644 index 00000000..6c0bd661 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0004.jpg diff --git a/i18n/fr_FR/docs/install/images/rpi/0005.jpg b/i18n/fr_FR/docs/install/images/rpi/0005.jpg Binary files differnew file mode 100644 index 00000000..ab0cfa34 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0005.jpg diff --git a/i18n/fr_FR/docs/install/images/rpi/0006.jpg b/i18n/fr_FR/docs/install/images/rpi/0006.jpg Binary files differnew file mode 100644 index 00000000..657d1b89 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0006.jpg diff --git a/i18n/fr_FR/docs/install/images/rpi/0007.jpg b/i18n/fr_FR/docs/install/images/rpi/0007.jpg Binary files differnew file mode 100644 index 00000000..e357a457 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0007.jpg diff --git a/i18n/fr_FR/docs/install/images/rpi/0008.jpg b/i18n/fr_FR/docs/install/images/rpi/0008.jpg Binary files differnew file mode 100644 index 00000000..a1a902f0 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0008.jpg diff --git a/i18n/fr_FR/docs/install/images/rpi/0009.png b/i18n/fr_FR/docs/install/images/rpi/0009.png Binary files differnew file mode 100644 index 00000000..130536b0 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0009.png diff --git a/i18n/fr_FR/docs/install/images/rpi/0010.png b/i18n/fr_FR/docs/install/images/rpi/0010.png Binary files differnew file mode 100644 index 00000000..312888e9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0010.png diff --git a/i18n/fr_FR/docs/install/images/rpi/0011.png b/i18n/fr_FR/docs/install/images/rpi/0011.png Binary files differnew file mode 100644 index 00000000..c7a3b9b2 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0011.png diff --git a/i18n/fr_FR/docs/install/images/rpi/0012.png b/i18n/fr_FR/docs/install/images/rpi/0012.png Binary files differnew file mode 100644 index 00000000..130536b0 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0012.png diff --git a/i18n/fr_FR/docs/install/images/rpi/0013.png b/i18n/fr_FR/docs/install/images/rpi/0013.png Binary files differnew file mode 100644 index 00000000..312888e9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0013.png diff --git a/i18n/fr_FR/docs/install/images/rpi/0014.gif b/i18n/fr_FR/docs/install/images/rpi/0014.gif Binary files differnew file mode 100644 index 00000000..a91aed95 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/rpi/0014.gif diff --git a/i18n/fr_FR/docs/install/images/t400/0001.jpg b/i18n/fr_FR/docs/install/images/t400/0001.jpg Binary files differnew file mode 100644 index 00000000..1a252338 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0001.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0002.jpg b/i18n/fr_FR/docs/install/images/t400/0002.jpg Binary files differnew file mode 100644 index 00000000..cb4137a9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0002.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0003.jpg b/i18n/fr_FR/docs/install/images/t400/0003.jpg Binary files differnew file mode 100644 index 00000000..701c8b09 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0003.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0004.jpg b/i18n/fr_FR/docs/install/images/t400/0004.jpg Binary files differnew file mode 100644 index 00000000..5cc35268 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0004.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0005.jpg b/i18n/fr_FR/docs/install/images/t400/0005.jpg Binary files differnew file mode 100644 index 00000000..c3ac3ed6 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0005.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0006.jpg b/i18n/fr_FR/docs/install/images/t400/0006.jpg Binary files differnew file mode 100644 index 00000000..f17a0213 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0006.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0007.jpg b/i18n/fr_FR/docs/install/images/t400/0007.jpg Binary files differnew file mode 100644 index 00000000..679afbc3 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0007.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0008.jpg b/i18n/fr_FR/docs/install/images/t400/0008.jpg Binary files differnew file mode 100644 index 00000000..5f015b6e --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0008.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0009.jpg b/i18n/fr_FR/docs/install/images/t400/0009.jpg Binary files differnew file mode 100644 index 00000000..f78b2b4c --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0009.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0010.jpg b/i18n/fr_FR/docs/install/images/t400/0010.jpg Binary files differnew file mode 100644 index 00000000..2e673f67 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0010.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0011.jpg b/i18n/fr_FR/docs/install/images/t400/0011.jpg Binary files differnew file mode 100644 index 00000000..c2104bad --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0011.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0012.jpg b/i18n/fr_FR/docs/install/images/t400/0012.jpg Binary files differnew file mode 100644 index 00000000..4078fcc1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0012.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0013.jpg b/i18n/fr_FR/docs/install/images/t400/0013.jpg Binary files differnew file mode 100644 index 00000000..7c43a48a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0013.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0014.jpg b/i18n/fr_FR/docs/install/images/t400/0014.jpg Binary files differnew file mode 100644 index 00000000..1b77c2c1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0014.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0015.jpg b/i18n/fr_FR/docs/install/images/t400/0015.jpg Binary files differnew file mode 100644 index 00000000..6eb7663d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0015.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0016.jpg b/i18n/fr_FR/docs/install/images/t400/0016.jpg Binary files differnew file mode 100644 index 00000000..2d5e9979 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0016.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0017.jpg b/i18n/fr_FR/docs/install/images/t400/0017.jpg Binary files differnew file mode 100644 index 00000000..d55b4bed --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0017.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0018.jpg b/i18n/fr_FR/docs/install/images/t400/0018.jpg Binary files differnew file mode 100644 index 00000000..786bb655 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0018.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0019.jpg b/i18n/fr_FR/docs/install/images/t400/0019.jpg Binary files differnew file mode 100644 index 00000000..67c4cecc --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0019.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0020.jpg b/i18n/fr_FR/docs/install/images/t400/0020.jpg Binary files differnew file mode 100644 index 00000000..cff52cd7 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0020.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0021.jpg b/i18n/fr_FR/docs/install/images/t400/0021.jpg Binary files differnew file mode 100644 index 00000000..aa845fa8 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0021.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0022.jpg b/i18n/fr_FR/docs/install/images/t400/0022.jpg Binary files differnew file mode 100644 index 00000000..9ce6c0c9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0022.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0023.jpg b/i18n/fr_FR/docs/install/images/t400/0023.jpg Binary files differnew file mode 100644 index 00000000..f09a2a7e --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0023.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0024.jpg b/i18n/fr_FR/docs/install/images/t400/0024.jpg Binary files differnew file mode 100644 index 00000000..a3948480 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0024.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0025.jpg b/i18n/fr_FR/docs/install/images/t400/0025.jpg Binary files differnew file mode 100644 index 00000000..411e1b4b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0025.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0026.jpg b/i18n/fr_FR/docs/install/images/t400/0026.jpg Binary files differnew file mode 100644 index 00000000..ebc63e11 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0026.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0027.jpg b/i18n/fr_FR/docs/install/images/t400/0027.jpg Binary files differnew file mode 100644 index 00000000..20302264 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0027.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0028.jpg b/i18n/fr_FR/docs/install/images/t400/0028.jpg Binary files differnew file mode 100644 index 00000000..2e295748 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0028.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0029.jpg b/i18n/fr_FR/docs/install/images/t400/0029.jpg Binary files differnew file mode 100644 index 00000000..8a3a2ab0 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0029.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0030.jpg b/i18n/fr_FR/docs/install/images/t400/0030.jpg Binary files differnew file mode 100644 index 00000000..e34f395e --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0030.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0031.jpg b/i18n/fr_FR/docs/install/images/t400/0031.jpg Binary files differnew file mode 100644 index 00000000..ca7bc639 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0031.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0032.jpg b/i18n/fr_FR/docs/install/images/t400/0032.jpg Binary files differnew file mode 100644 index 00000000..c6cda83a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0032.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0033.jpg b/i18n/fr_FR/docs/install/images/t400/0033.jpg Binary files differnew file mode 100644 index 00000000..75922b86 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0033.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0034.jpg b/i18n/fr_FR/docs/install/images/t400/0034.jpg Binary files differnew file mode 100644 index 00000000..a57b1fbd --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0034.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0035.jpg b/i18n/fr_FR/docs/install/images/t400/0035.jpg Binary files differnew file mode 100644 index 00000000..b63e0f1b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0035.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0036.jpg b/i18n/fr_FR/docs/install/images/t400/0036.jpg Binary files differnew file mode 100644 index 00000000..63dc6636 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0036.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0037.jpg b/i18n/fr_FR/docs/install/images/t400/0037.jpg Binary files differnew file mode 100644 index 00000000..e089aa65 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0037.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0038.jpg b/i18n/fr_FR/docs/install/images/t400/0038.jpg Binary files differnew file mode 100644 index 00000000..456bbeaa --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0038.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0039.jpg b/i18n/fr_FR/docs/install/images/t400/0039.jpg Binary files differnew file mode 100644 index 00000000..2c9b8f47 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0039.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0040.jpg b/i18n/fr_FR/docs/install/images/t400/0040.jpg Binary files differnew file mode 100644 index 00000000..f78a73d5 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0040.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0041.jpg b/i18n/fr_FR/docs/install/images/t400/0041.jpg Binary files differnew file mode 100644 index 00000000..a81e06fc --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0041.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0042.jpg b/i18n/fr_FR/docs/install/images/t400/0042.jpg Binary files differnew file mode 100644 index 00000000..0e30bdc1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0042.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0043.jpg b/i18n/fr_FR/docs/install/images/t400/0043.jpg Binary files differnew file mode 100644 index 00000000..683a23e3 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0043.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0044.jpg b/i18n/fr_FR/docs/install/images/t400/0044.jpg Binary files differnew file mode 100644 index 00000000..0eebd214 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0044.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0045.jpg b/i18n/fr_FR/docs/install/images/t400/0045.jpg Binary files differnew file mode 100644 index 00000000..9ebbc471 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0045.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0046.jpg b/i18n/fr_FR/docs/install/images/t400/0046.jpg Binary files differnew file mode 100644 index 00000000..a095bc3c --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0046.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0047.jpg b/i18n/fr_FR/docs/install/images/t400/0047.jpg Binary files differnew file mode 100644 index 00000000..25a91348 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0047.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0048.jpg b/i18n/fr_FR/docs/install/images/t400/0048.jpg Binary files differnew file mode 100644 index 00000000..ea0172cf --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0048.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0049.jpg b/i18n/fr_FR/docs/install/images/t400/0049.jpg Binary files differnew file mode 100644 index 00000000..2c6e8d3b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0049.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0050.jpg b/i18n/fr_FR/docs/install/images/t400/0050.jpg Binary files differnew file mode 100644 index 00000000..617e4079 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0050.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0051.jpg b/i18n/fr_FR/docs/install/images/t400/0051.jpg Binary files differnew file mode 100644 index 00000000..ffb2dbff --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0051.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0052.jpg b/i18n/fr_FR/docs/install/images/t400/0052.jpg Binary files differnew file mode 100644 index 00000000..bc8b7c69 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0052.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0053.jpg b/i18n/fr_FR/docs/install/images/t400/0053.jpg Binary files differnew file mode 100644 index 00000000..6a3c7947 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0053.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0054.jpg b/i18n/fr_FR/docs/install/images/t400/0054.jpg Binary files differnew file mode 100644 index 00000000..b90fd352 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0054.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0055.jpg b/i18n/fr_FR/docs/install/images/t400/0055.jpg Binary files differnew file mode 100644 index 00000000..07034472 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0055.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0056.jpg b/i18n/fr_FR/docs/install/images/t400/0056.jpg Binary files differnew file mode 100644 index 00000000..1d8f735d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0056.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0057.jpg b/i18n/fr_FR/docs/install/images/t400/0057.jpg Binary files differnew file mode 100644 index 00000000..99162421 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0057.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0058.jpg b/i18n/fr_FR/docs/install/images/t400/0058.jpg Binary files differnew file mode 100644 index 00000000..882f6a38 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0058.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0059.jpg b/i18n/fr_FR/docs/install/images/t400/0059.jpg Binary files differnew file mode 100644 index 00000000..b5feddcd --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0059.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0060.jpg b/i18n/fr_FR/docs/install/images/t400/0060.jpg Binary files differnew file mode 100644 index 00000000..2132fdcd --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0060.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0061.jpg b/i18n/fr_FR/docs/install/images/t400/0061.jpg Binary files differnew file mode 100644 index 00000000..98636a4f --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0061.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0062.jpg b/i18n/fr_FR/docs/install/images/t400/0062.jpg Binary files differnew file mode 100644 index 00000000..f32c348c --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0062.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0063.jpg b/i18n/fr_FR/docs/install/images/t400/0063.jpg Binary files differnew file mode 100644 index 00000000..31663ef1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0063.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0064.jpg b/i18n/fr_FR/docs/install/images/t400/0064.jpg Binary files differnew file mode 100644 index 00000000..179d545d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0064.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0065.jpg b/i18n/fr_FR/docs/install/images/t400/0065.jpg Binary files differnew file mode 100644 index 00000000..2acb2b72 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0065.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0066.jpg b/i18n/fr_FR/docs/install/images/t400/0066.jpg Binary files differnew file mode 100644 index 00000000..dfff2242 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0066.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0067.jpg b/i18n/fr_FR/docs/install/images/t400/0067.jpg Binary files differnew file mode 100644 index 00000000..8ac8e176 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0067.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0069.jpg b/i18n/fr_FR/docs/install/images/t400/0069.jpg Binary files differnew file mode 100644 index 00000000..c138abb3 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0069.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0070.jpg b/i18n/fr_FR/docs/install/images/t400/0070.jpg Binary files differnew file mode 100644 index 00000000..20198745 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0070.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0071.jpg b/i18n/fr_FR/docs/install/images/t400/0071.jpg Binary files differnew file mode 100644 index 00000000..57579171 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0071.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/0072.jpg b/i18n/fr_FR/docs/install/images/t400/0072.jpg Binary files differnew file mode 100644 index 00000000..436957a1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/0072.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/ar5b95.jpg b/i18n/fr_FR/docs/install/images/t400/ar5b95.jpg Binary files differnew file mode 100644 index 00000000..304bae04 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/ar5b95.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/boot0.jpg b/i18n/fr_FR/docs/install/images/t400/boot0.jpg Binary files differnew file mode 100644 index 00000000..40de48a5 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/boot0.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/boot1.jpg b/i18n/fr_FR/docs/install/images/t400/boot1.jpg Binary files differnew file mode 100644 index 00000000..0b259c46 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/boot1.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/macaddress0.jpg b/i18n/fr_FR/docs/install/images/t400/macaddress0.jpg Binary files differnew file mode 100644 index 00000000..0d6d6bb9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/macaddress0.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/macaddress1.jpg b/i18n/fr_FR/docs/install/images/t400/macaddress1.jpg Binary files differnew file mode 100644 index 00000000..299acc60 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/macaddress1.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/memory.jpg b/i18n/fr_FR/docs/install/images/t400/memory.jpg Binary files differnew file mode 100644 index 00000000..a0bab029 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/memory.jpg diff --git a/i18n/fr_FR/docs/install/images/t400/paste.jpg b/i18n/fr_FR/docs/install/images/t400/paste.jpg Binary files differnew file mode 100644 index 00000000..a382aaa5 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t400/paste.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0000.jpg b/i18n/fr_FR/docs/install/images/t500/0000.jpg Binary files differnew file mode 100644 index 00000000..b1c4a715 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0000.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0001.jpg b/i18n/fr_FR/docs/install/images/t500/0001.jpg Binary files differnew file mode 100644 index 00000000..9bd93759 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0001.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0002.jpg b/i18n/fr_FR/docs/install/images/t500/0002.jpg Binary files differnew file mode 100644 index 00000000..04430cd5 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0002.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0003.jpg b/i18n/fr_FR/docs/install/images/t500/0003.jpg Binary files differnew file mode 100644 index 00000000..0fc51e60 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0003.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0004.jpg b/i18n/fr_FR/docs/install/images/t500/0004.jpg Binary files differnew file mode 100644 index 00000000..5d66c5ab --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0004.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0005.jpg b/i18n/fr_FR/docs/install/images/t500/0005.jpg Binary files differnew file mode 100644 index 00000000..248d8dc5 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0005.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0006.jpg b/i18n/fr_FR/docs/install/images/t500/0006.jpg Binary files differnew file mode 100644 index 00000000..4948c377 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0006.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0007.jpg b/i18n/fr_FR/docs/install/images/t500/0007.jpg Binary files differnew file mode 100644 index 00000000..92cfde7d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0007.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0008.jpg b/i18n/fr_FR/docs/install/images/t500/0008.jpg Binary files differnew file mode 100644 index 00000000..4aa8fe91 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0008.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0009.jpg b/i18n/fr_FR/docs/install/images/t500/0009.jpg Binary files differnew file mode 100644 index 00000000..7585b262 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0009.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0010.jpg b/i18n/fr_FR/docs/install/images/t500/0010.jpg Binary files differnew file mode 100644 index 00000000..51232799 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0010.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0011.jpg b/i18n/fr_FR/docs/install/images/t500/0011.jpg Binary files differnew file mode 100644 index 00000000..d9a9ab48 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0011.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0012.jpg b/i18n/fr_FR/docs/install/images/t500/0012.jpg Binary files differnew file mode 100644 index 00000000..9d951597 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0012.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0013.jpg b/i18n/fr_FR/docs/install/images/t500/0013.jpg Binary files differnew file mode 100644 index 00000000..50ab59e3 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0013.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0014.jpg b/i18n/fr_FR/docs/install/images/t500/0014.jpg Binary files differnew file mode 100644 index 00000000..3c59ab5d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0014.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0015.jpg b/i18n/fr_FR/docs/install/images/t500/0015.jpg Binary files differnew file mode 100644 index 00000000..3634f4de --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0015.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0016.jpg b/i18n/fr_FR/docs/install/images/t500/0016.jpg Binary files differnew file mode 100644 index 00000000..8fc22d0e --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0016.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0017.jpg b/i18n/fr_FR/docs/install/images/t500/0017.jpg Binary files differnew file mode 100644 index 00000000..57be3141 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0017.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0018.jpg b/i18n/fr_FR/docs/install/images/t500/0018.jpg Binary files differnew file mode 100644 index 00000000..ee5b6886 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0018.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0019.jpg b/i18n/fr_FR/docs/install/images/t500/0019.jpg Binary files differnew file mode 100644 index 00000000..84049a92 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0019.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0020.jpg b/i18n/fr_FR/docs/install/images/t500/0020.jpg Binary files differnew file mode 100644 index 00000000..e6519df9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0020.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0021.jpg b/i18n/fr_FR/docs/install/images/t500/0021.jpg Binary files differnew file mode 100644 index 00000000..e2cc447b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0021.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0022.jpg b/i18n/fr_FR/docs/install/images/t500/0022.jpg Binary files differnew file mode 100644 index 00000000..99ccbaac --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0022.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0023.jpg b/i18n/fr_FR/docs/install/images/t500/0023.jpg Binary files differnew file mode 100644 index 00000000..16cfdf6d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0023.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0024.jpg b/i18n/fr_FR/docs/install/images/t500/0024.jpg Binary files differnew file mode 100644 index 00000000..9d959c8b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0024.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0025.jpg b/i18n/fr_FR/docs/install/images/t500/0025.jpg Binary files differnew file mode 100644 index 00000000..763a31ea --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0025.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0026.jpg b/i18n/fr_FR/docs/install/images/t500/0026.jpg Binary files differnew file mode 100644 index 00000000..2977536f --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0026.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0027.jpg b/i18n/fr_FR/docs/install/images/t500/0027.jpg Binary files differnew file mode 100644 index 00000000..55418ed7 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0027.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0028.jpg b/i18n/fr_FR/docs/install/images/t500/0028.jpg Binary files differnew file mode 100644 index 00000000..eb873b41 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0028.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0029.jpg b/i18n/fr_FR/docs/install/images/t500/0029.jpg Binary files differnew file mode 100644 index 00000000..62e92046 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0029.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0030.jpg b/i18n/fr_FR/docs/install/images/t500/0030.jpg Binary files differnew file mode 100644 index 00000000..36b47429 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0030.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0031.jpg b/i18n/fr_FR/docs/install/images/t500/0031.jpg Binary files differnew file mode 100644 index 00000000..0c185d43 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0031.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0032.jpg b/i18n/fr_FR/docs/install/images/t500/0032.jpg Binary files differnew file mode 100644 index 00000000..5f058010 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0032.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0033.jpg b/i18n/fr_FR/docs/install/images/t500/0033.jpg Binary files differnew file mode 100644 index 00000000..9522f105 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0033.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0034.jpg b/i18n/fr_FR/docs/install/images/t500/0034.jpg Binary files differnew file mode 100644 index 00000000..081d9f9f --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0034.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0035.jpg b/i18n/fr_FR/docs/install/images/t500/0035.jpg Binary files differnew file mode 100644 index 00000000..27a1a069 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0035.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0036.jpg b/i18n/fr_FR/docs/install/images/t500/0036.jpg Binary files differnew file mode 100644 index 00000000..e8cc68a0 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0036.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0037.jpg b/i18n/fr_FR/docs/install/images/t500/0037.jpg Binary files differnew file mode 100644 index 00000000..30a6dc29 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0037.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0038.jpg b/i18n/fr_FR/docs/install/images/t500/0038.jpg Binary files differnew file mode 100644 index 00000000..5d66301d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0038.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0039.jpg b/i18n/fr_FR/docs/install/images/t500/0039.jpg Binary files differnew file mode 100644 index 00000000..36f3726f --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0039.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0040.jpg b/i18n/fr_FR/docs/install/images/t500/0040.jpg Binary files differnew file mode 100644 index 00000000..b5f61ebd --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0040.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0041.jpg b/i18n/fr_FR/docs/install/images/t500/0041.jpg Binary files differnew file mode 100644 index 00000000..f539a4a0 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0041.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0042.jpg b/i18n/fr_FR/docs/install/images/t500/0042.jpg Binary files differnew file mode 100644 index 00000000..d6da7e3a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0042.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0043.jpg b/i18n/fr_FR/docs/install/images/t500/0043.jpg Binary files differnew file mode 100644 index 00000000..5703e153 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0043.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0044.jpg b/i18n/fr_FR/docs/install/images/t500/0044.jpg Binary files differnew file mode 100644 index 00000000..8c7c19f1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0044.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0045.jpg b/i18n/fr_FR/docs/install/images/t500/0045.jpg Binary files differnew file mode 100644 index 00000000..87f527f9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0045.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0046.jpg b/i18n/fr_FR/docs/install/images/t500/0046.jpg Binary files differnew file mode 100644 index 00000000..3420be7b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0046.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0047.jpg b/i18n/fr_FR/docs/install/images/t500/0047.jpg Binary files differnew file mode 100644 index 00000000..07cd1bc2 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0047.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0048.jpg b/i18n/fr_FR/docs/install/images/t500/0048.jpg Binary files differnew file mode 100644 index 00000000..26715d55 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0048.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0049.jpg b/i18n/fr_FR/docs/install/images/t500/0049.jpg Binary files differnew file mode 100644 index 00000000..b2aaa917 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0049.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0050.jpg b/i18n/fr_FR/docs/install/images/t500/0050.jpg Binary files differnew file mode 100644 index 00000000..fe63359b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0050.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0051.jpg b/i18n/fr_FR/docs/install/images/t500/0051.jpg Binary files differnew file mode 100644 index 00000000..6b5a8b0a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0051.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0052.jpg b/i18n/fr_FR/docs/install/images/t500/0052.jpg Binary files differnew file mode 100644 index 00000000..c509db13 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0052.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0053.jpg b/i18n/fr_FR/docs/install/images/t500/0053.jpg Binary files differnew file mode 100644 index 00000000..48d59f6f --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0053.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0054.jpg b/i18n/fr_FR/docs/install/images/t500/0054.jpg Binary files differnew file mode 100644 index 00000000..ebdbca6c --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0054.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0055.jpg b/i18n/fr_FR/docs/install/images/t500/0055.jpg Binary files differnew file mode 100644 index 00000000..c6fbe0eb --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0055.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0056.jpg b/i18n/fr_FR/docs/install/images/t500/0056.jpg Binary files differnew file mode 100644 index 00000000..7040d2d7 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0056.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0057.jpg b/i18n/fr_FR/docs/install/images/t500/0057.jpg Binary files differnew file mode 100644 index 00000000..ff51a6a2 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0057.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0058.jpg b/i18n/fr_FR/docs/install/images/t500/0058.jpg Binary files differnew file mode 100644 index 00000000..45adf8a3 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0058.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0059.jpg b/i18n/fr_FR/docs/install/images/t500/0059.jpg Binary files differnew file mode 100644 index 00000000..6b6647cf --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0059.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0060.jpg b/i18n/fr_FR/docs/install/images/t500/0060.jpg Binary files differnew file mode 100644 index 00000000..658a6321 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0060.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0061.jpg b/i18n/fr_FR/docs/install/images/t500/0061.jpg Binary files differnew file mode 100644 index 00000000..44eca4fe --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0061.jpg diff --git a/i18n/fr_FR/docs/install/images/t500/0062.jpg b/i18n/fr_FR/docs/install/images/t500/0062.jpg Binary files differnew file mode 100644 index 00000000..eade2891 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/t500/0062.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/5252_bbb0.jpg b/i18n/fr_FR/docs/install/images/x200/5252_bbb0.jpg Binary files differnew file mode 100644 index 00000000..cd801436 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/5252_bbb0.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/5252_bbb1.jpg b/i18n/fr_FR/docs/install/images/x200/5252_bbb1.jpg Binary files differnew file mode 100644 index 00000000..42ddba5b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/5252_bbb1.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0001.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0001.jpg Binary files differnew file mode 100644 index 00000000..231ae57a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0001.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0002.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0002.jpg Binary files differnew file mode 100644 index 00000000..a69d5de1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0002.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0003.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0003.jpg Binary files differnew file mode 100644 index 00000000..2637b9f7 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0003.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0004.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0004.jpg Binary files differnew file mode 100644 index 00000000..c246ec47 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0004.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0005.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0005.jpg Binary files differnew file mode 100644 index 00000000..95219dbc --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0005.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0006.1.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0006.1.jpg Binary files differnew file mode 100644 index 00000000..1888012b --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0006.1.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0006.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0006.jpg Binary files differnew file mode 100644 index 00000000..0f6d04a1 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0006.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0008.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0008.jpg Binary files differnew file mode 100644 index 00000000..765b9ab4 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0008.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0009.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0009.jpg Binary files differnew file mode 100644 index 00000000..a1b57199 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0009.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0010.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0010.jpg Binary files differnew file mode 100644 index 00000000..f64ab476 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0010.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0011.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0011.jpg Binary files differnew file mode 100644 index 00000000..98ebbf3d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0011.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0012.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0012.jpg Binary files differnew file mode 100644 index 00000000..6db2ed8c --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0012.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0013.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0013.jpg Binary files differnew file mode 100644 index 00000000..599a2282 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0013.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0014.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0014.jpg Binary files differnew file mode 100644 index 00000000..92af9973 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0014.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0015.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0015.jpg Binary files differnew file mode 100644 index 00000000..a294275f --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0015.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0016.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0016.jpg Binary files differnew file mode 100644 index 00000000..4d36e10a --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0016.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0017.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0017.jpg Binary files differnew file mode 100644 index 00000000..dfc366c8 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0017.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0018.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0018.jpg Binary files differnew file mode 100644 index 00000000..b5ed69ae --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0018.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/disassembly/0019.jpg b/i18n/fr_FR/docs/install/images/x200/disassembly/0019.jpg Binary files differnew file mode 100644 index 00000000..a5bd4990 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/disassembly/0019.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/ftdi.jpg b/i18n/fr_FR/docs/install/images/x200/ftdi.jpg Binary files differnew file mode 100644 index 00000000..9c81c4c3 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/ftdi.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/ftdi_port.jpg b/i18n/fr_FR/docs/install/images/x200/ftdi_port.jpg Binary files differnew file mode 100644 index 00000000..3adc8ba9 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/ftdi_port.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/psu33.jpg b/i18n/fr_FR/docs/install/images/x200/psu33.jpg Binary files differnew file mode 100644 index 00000000..536c4d26 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/psu33.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/soic8.jpg b/i18n/fr_FR/docs/install/images/x200/soic8.jpg Binary files differnew file mode 100644 index 00000000..9f788bf8 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/soic8.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/wson_soldered.jpg b/i18n/fr_FR/docs/install/images/x200/wson_soldered.jpg Binary files differnew file mode 100644 index 00000000..76cf98d0 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/wson_soldered.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/x200_pomona.jpg b/i18n/fr_FR/docs/install/images/x200/x200_pomona.jpg Binary files differnew file mode 100644 index 00000000..0dad087d --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/x200_pomona.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/x200_soic16.jpg b/i18n/fr_FR/docs/install/images/x200/x200_soic16.jpg Binary files differnew file mode 100644 index 00000000..345a04d7 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/x200_soic16.jpg diff --git a/i18n/fr_FR/docs/install/images/x200/x200_soic8.jpg b/i18n/fr_FR/docs/install/images/x200/x200_soic8.jpg Binary files differnew file mode 100644 index 00000000..59adfabd --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x200/x200_soic8.jpg diff --git a/i18n/fr_FR/docs/install/images/x60/th_bbb_flashing.jpg b/i18n/fr_FR/docs/install/images/x60/th_bbb_flashing.jpg Binary files differnew file mode 100644 index 00000000..bab1bdd6 --- /dev/null +++ b/i18n/fr_FR/docs/install/images/x60/th_bbb_flashing.jpg diff --git a/i18n/fr_FR/docs/install/index.md b/i18n/fr_FR/docs/install/index.md new file mode 100644 index 00000000..017b130f --- /dev/null +++ b/i18n/fr_FR/docs/install/index.md @@ -0,0 +1,375 @@ +--- +Titre: Instructions d'installation +... + +Cette section concerne l'installation de Libreboot sur les cibles supportées. + +NOTE: si vous éxecutiez `flashrom -p internal` pour le flashage basé logiciellement, et vous avez une erreur concernant l'accés à `/dev/mem`, vous devrez redémarrer avec le paramètre de kernel `iomem=relaxed` avant d'éxecuter flashrom, ou utiliser un kernel qui a `CONFIG_STRICT_DEVMEM ` non activé. + +Quels systèmes sont compatibles avec Libreboot ? +-------------------------------------------- + +- [Information à propos de la compatibilité matérielle Libreboot](../hardware) + + +Informations générales +------------------- + +- [Information à propos des images ROM libreboot](#rom) + +Flashage via des méthodes logicielles, sur système: +----------------------------------------- + +- [Comment mettre à jour ou installer libreboot sur tout les systèmes](#flashrom) + +- [How to update or install libreboot on all systems](#flashrom) +- [ASUS KFSN4-DRE](#flashrom) +- [ThinkPad X60/T60 (if running Lenovo BIOS)](#flashrom_lenovobios) +- [Apple MacBook2,1](#flashrom_macbook21) +- [ASUS Chromebook C201](c201.md) + +Mettre en place les programmeurs, pour le flashage externe SPI +----------------------------------------------------------------- + +- [BeagleBone Black Setup](bbb_setup.md) +- [Raspberry Pi Setup](rpi_setup.md) + +Flashage via les méthodes matérielles, sur le système: +----------------------------------------- + +- [Gigabyte GA-G41-ES2L](ga-g41m-es2l.md) +- [Intel D510MO](d510mo.md) +- [Intel D945GCLF](d945gclf.md) +- [ASUS KGPE-D16](kgpe-d16.md) +- [ASUS KCMA-D8](kcma-d8.md) +- [ASUS Chromebook C201](c201.md) +- [ThinkPad X60](x60_unbrick.md) +- [ThinkPad X60 Tablet](x60tablet_unbrick.md) +- [ThinkPad T60](t60_unbrick.md) +- [ThinkPad X200/X200S/X200T](x200_external.md) +- [ThinkPad R400](r400_external.md) +- [ThinkPad T400](t400_external.md) +- [ThinkPad T500](t500_external.md) +- [ThinkPad W500](t500_external.md) + +Information à propos des images ROM libreboot {#rom} +====================================== + +Libreboot distribue des images ROM pré-compilée, construites à partir du code source de libreboot. Ces images sont fournies pour le confort de l'utilisateur, comme ça ils n'ont pas à construire quoi que ce soit depuis la source de leur propre chef. + +Ces images ROM dans chaque archive utilise le suivant à la fin de leur nom de fichier, si elles sont construites avec la charge utile GRUB: `*_*keymap*_*mode*.rom` + +Modes disponibles: vesafb ou txtmode. Les images ROM vesafb sont recommandés pour un usage régulier, mais quand vous flashez pour la première fois utilisez la version txtmode, car elle vient avec Memtext86+, qui demande le text-mode au lieu du framebuffer d'habitude utilisé par l'initialisation des graphiques natifs de coreboot. +La machine devrait être testée avec Memtest86+ après chaque réassemblage ou changement du bios constructeur (d'origine) à cause de différences dans le code de raminit. + +`keymap` peut être une des quelques mappage de touches que le clavier supporte (il y en a quelques un), qui affecte la configuration de la disposition du clavier qui est utilisé dans GRUB. Ca n'a pas d'importance quel image ROM vous utilisez ici, tant que le mappage des touches dans GNU+Linux est concerné. + + +Les mappages de touches sont nommés en accordance avec chaque disposition de clavier supportées dans GRUB. Pour apprendre comment ces mappages de touches sont créés, regardez [../grub/\#grub\_keyboard](../grub/#grub_keyboard) + + +QEMU +---- + +Libreboot arrive avec des images ROM construites pour QEMU par défaut: + +Des exemples de comment utiliser les images ROM de libreboot dans QEMU: + + $ qemu-system-i386 -M q35 -m 512 -bios qemu_q35_ich9_keymap_mode.rom + $ qemu-system-i386 -M pc -m 512 -bios qemu_i440fx_piix4_keymap_mode.rom + +Vous pouvez optionnellement spécifié l'argument `-serial stdio`, comme ça QEMU émulera un terminal en série sur l'entrée/sortie standard (très certainement votre émulateur de terminal ou TTY). + +D'autres arguments sont disponibles pour QEMU. Le manuel contiendra plus d'informations. + +Comment mettre à jour ou installer libreboot (si vous êtes déjà en train d'éxecuter libreboot ou coreboot) {#flashrom} +===================================================================================== + +Sur toutes les cibles actuelles, mettre à jour libreboot peut être accomplit sans désassemblage, +et de ce fait, sans avoir à re-flasher extérieurement en utilisant n'important quel matériel spécialisé. +En d'autres mots, vous pouvez tout faire de façon logicielle, directement depuis le système d'exploitation qui +est en cours d'éxecution sur votre système Libreboot. + +*Si vous êtes en train d'utiliser `libreboot_src` ou git, alors rendez-vous bien sûr +que vous avez compilé les sources en premier (regardez [../git/\#build](../git/#build)).* + +Regardez à la [liste des images ROM](#rom) pour voir quelle image est compatible avec votre appareil. + + +Êtes-vous en train d'exécuter le micrologiciel d'origine propriétaire ? +------------------------------------------------------------- + +Si vous êtes en train d'éxecuter le micrologiciel propriétaire (ni libreboot ou coreboot), alors les instructions de flashage pour votre système vont être différentes. + +Les utilisateurs du X60/T60 éxecutant le micrologiciel propriétaire devrait se référer à [\#flashrom\_lenovobios](#flashrom_lenovobios). Les utilisateurs de MacBook2,1 éxecutant l'EFI d'Apple devrait se référer à [\#flashrom\_macbook21](#flashrom_macbook21) + +Les utilisateurs de X200, se référeront à [x200\_external.md](x200_external.md), ceux de R400 à [r400\_external.md](r400_external.md), ceux de T400 à [t400\_external.md](t400_external.md), et ceux de T500 et W500 à [t500\_external.md](t500_external.md) + + +ASUS KFSN4-DRE? +--------------- + +Le flashage interne devrait marcher comme il faut, même si vous êtes en train +de démarrer le micrologiciel propriétaire. + +Libreboot manque en ce moment de documentation pour re-flasher +extérieurement une puce flash LPC. Cependant, ces cartes mères ont la puce de flash +à l'intérieur d'un socket PLCC, et il est possible d'échanger à chaud +les puces. Si vous voulez sauvegarder votre image connu pour marcher, échangez +simplement à chaud la puce pour un qui est de même capacité, après avoir déchargé +une copie du micrologiciel courant (flashrom -p internal -r yourchosenname.rom), et +flashez ensuite cette puce avec l'image connue pour marcher. Vérifiez si le système +démarre encore, et si il démarre alors il est sécurisé de flashé la nouvelle image +(parce que maintenant vous avez une sauvegarde de la vieille image). + +Garder au moins une puce LPC PLCC en stock avec le micrologiciel fonctionnel dessus +est fortement recommandé, en cas de bousillage. + +*N'ÉCHANGEZ PAS à chaud la puce avec vos mains nues. Utilisez un extracteur de puce PLCC. +Elles peuvent être trouvées en ligne. +Voyez <http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>* + +Vérifez la saisie HCL: [../hardware/kfsn4-dre.md](../hardware/kfsn4-dre.md) + +ASUS KGPE-D16? +-------------- + +Si vous avez un BIOS propriétaire, vous avez besoin de flasher libreboot +extérieurement. Voir [kgpe-d16.md](kgpe-d16.md) + +Si vous déjà coreboot ou libreboot installé, sans protection contre l'écriture sur +la puce flash, alors vous pouvez le faire logiciellement (sinon, voir le lien ci-dessus). + +*N'ÉCHANGEZ PAS à chaud la puce avec vos mains nues. Utilisez un extracteur de puce PDIP-8. +Elles peuvent être trouvées en ligne. +Voyez <http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>* + +Vérifier l'entrée HCL: [../hardware/kgpe-d16.md](../hardware/kgpe-d16.md) + +ASUS KCMA-D8? +------------- + +Si vous un BIOS propriétaire, nous avons besoin de flasher +libreboot extérieurement. Voir [kmca-d8.md](kmca-d8.md). + +Si vous avez déjà coreboot ou libreboot installé, sans protection +contre l'écriture sur la puce flash, alors vous pouvez le faire +logiciellement (sinon, voir le lien ci-dessus). + +*N'ÉCHANGEZ PAS à chaud la puce avec vos mains nues. Utilisez un extracteur de puce PDIP-8. +Elles peuvent être trouvées en ligne. +Voyez <http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>* + +Vérifier l'entrée HCL: [../hardware/kgpe-d16.md](../hardware/kgpe-d16.md) + + +Intel D945GCLF? +--------------- + +Si vous éxecutez le BIOS d'usine Intel original, alors vous aurez +besoin de le flasher extérieurement. Pour des instructions sur comment + faire celà, référez-vous [d945gclf.md](d945gclf.md). + +Sinon, lisez les instructions générales en dessous pour utiliser +le script *flash*. + + +Êtes-vous en train d'éxecuter libreboot (ou coreboot)? +-------------------------------------------------- + +Les utilisateurs X60/T60 devrait être OK avec ce guide. +Si vous avez protégé en écriture la puce flash, référez-vous +silvouplait à [x60\_unbrick.md](x60_unbrick.md), +[x60tablet\_unbrick.md](x60tablet_unbrick.md) ou +[t60\_unbrick.md](t60_unbrick.md). *Cela ne s'applique pas probablement + à vous. La majorité de gens ne protège pas en écriture la puce flash, donc + vous ne l'avez probablement pas fait* + +Similairement, c'est possible de protéger en écriture la puce flash dans +coreboot ou libreboot sur les ordinateurs portables GM45 (X200/R400/T400/T500/W500). +Si vous faites ça, alors vous aurez besoin d'utiliser les liens au-dessus pour +le flashage, traitant votre ordinateur portable comme si il avait le micrologiciel +propriétaire (parce que la puce SPI protégé en écriture aura besoin d'un reflashage, +externe, comme c'est le cas quand on éxecute le micrologiciel propriétaire). + +Si vous n'avez pas protégé en écriture la puce flash,ou elle est +arrivé chez vous sans aucune protection en écriture (*libreboot ne protège +pas en écriture la puce flash par défaut, donc ça s'applique à vous*), continuez à lire! + + +Adresse MAC sur GM45 (X200/R400/T400/T500/W500) +----------------------------------------- + +*Utilisateurs du X200/R400/T400/T500/W500, prenez note:* L'adresse MAC pour le jeu de puces +ethernet embarqué est situé à l'intérieur de la puce flash. Les images ROM de Libreboot pour +ces ordinateurs portables contiennent une adresse MAC générique par défaut, mais ce n'est +pas que vous voulez. *Assurez vous bien de change l'adresse MAC à l'intérieur de l'image ROM +avant de la flasher. Les instructions dans [../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) +montrent comment faire celà. + +C'est important que vous changiez l'adresse MAC par défaut, avant flashage. +Elle sera imprimée sur un sticker en bas de l'ordinateur portable, ou il sera +imprimé sur un sticker à côté ou sous la RAM. +Alternativement, et assumant que votre micrologiciel en cours d'exécution à la +bonne adresse MAC en lui, vous pouvez la récupérer depuis votre système d'exploitation. + + +Apple iMac 5,2? +--------------- + +Le flashage interne marche, même quand on flashing depuis l'EFI d'Apple vers Libreboot. +Continuez à lire les instructions ci-dessous. + +*NOTE*: Si vous flashez une plus vieille version de libreboot, la carte mère de l'iMac5,2 est compatible avec le MacBook2,1. +Flashez simplement une image ROM MacBook2,1, et ça devrait marcher. + + +Taille de la puce flash +--------------- + +Utilisez ceci pour trouver: + + # flashrom -p internal + + +Tout bon ? +--------- + +Excellent! On bouge... + +Téléchargez l'archive *libreboot\_util.tar.xz*, et extrayez là. À +l'intérieur vous trouverez un répertoire appelé *flashrom*. Il contient +des fichiers éxecutables compilés statiquement de l'utilitaire *flashrom*, que +vous utiliserez pour re-flasher votre système libreboot. + +Utilisez simplement *cd* sur votre terminal, pour vous mettre sur le répertoire +*libreboot\_util*. À l'intérieur, il y a un script appelé *flash*, qui détectera quelle +architecture de processeur vous avez (e.g. i686, x86\_64) et utilisera l'éxecutable +approprié. Il est aussi possible pour vous de construire ces éxecutables à partir +des archives de code source de libreboot. + +Comment mettre à jour le contenu de la puce flash: + + `$ sudo ./flash update `[`yourrom.rom`](#rom) + +Occasionellement, coreboot change le nom d'une carte mère. Si flashrom se plaint à +propos d'une carte mère qui ne correspond pas, mais vous êtes sur que vous choisissez +l'image ROM correcte, alors éxecutez cette commande alternative: + + `$ sudo ./flash forceupdate `[`yourrom.rom](#rom) + +Vous devriez voir `Vérification du flash... VÉRIFIÉ.` écris à la fin de la sortie +de flashrom. *Éteignez* après que vous voyez ceci, et ensuite démarrez de nouveau après quelques secondes. + +ThinkPad X60/T60: Guide d'installation initiale (si vous êtes en train d'éxecutez le micrologiciel propriétaire) {#flashroms_lenovobios} +================================================================================== + +*Ceci est pour le ThinkPad X60 et T60 pendant que vous êtes en train +d'éxecuter le BIOS de Lenovo. Si vous êtes déjà en train d'éxecuter +coreboot ou libreboot, alors rendez-vous sur [\#flashrom](#flashrom)!* + +*Si vous pouvez, rendez-vous sûr que la batterie RTC n'est pas déchargée. Une batterie RTC déchargé peut amener à un bousillage dû car la valeur du registre BUC n'est pas maintenue..* + +*Si vous êtes en train de flasher un Lenovo ThinkPad T60, assurez-vous de lire +[../hardware/\#supported\_t60\_list](../hardware/#supported_t60_list) + +*Si vous êtes en train d'utilisez libreboot\_src ou git, alors +rendez-vous sûr que vous avez compilé les sources en premier +(voir [../git/\#build](../git/#build))* + +*Attention: ce guide n'instruirera pas l'utiliser sur comment sauvegarder +le micrologiciel original du BIOS Lenovo. Ces sauvegardes sont liés à chaque système, et +ne marcheront sur aucun autre. Pour ceci, référez-vous silvouplaît à <http://www.coreboot.org/Board:lenovo/x60/Installation>.* + +*Si vous êtes en train d'utiliser libreboot 20150518, notez qu'il y +a une erreur dans le script de flashage. faites celà: * + + rm -f patch + wget -O flash https://notabug.org/libreboot/libreboot/raw/9d850543ad90b72e0e333c98075530b31e5d23f1/flash + chmod +x flash + +La première moitié de la procédure est comme le suivant: + +`$ sudo ./flash i945lenovo_firstflash `[`yourrom.rom`](#rom) + +Vous devrez voir dans la sortie le suivant: + + Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000 are + swapped + (A mis à jour BUC.TS=1 - La rangée d'adresses 64kb à 0xFFFE0000 et 0xFFFF0000 sont échangées.) + +Vous devrez voir aussi celà dans la sortie: + + Your flash chip is in an unknown state + ... + FAILED + ... + DO NOT REBOOT OR POWEROFF + + (Votre puce de flash est dans un état inconnu + ... + A ÉCHOUÉ + ... + NE PAS REDÉMARRER OU ÉTEINDRE) + +Voir ceci veut dire que l'opération était d'un succés *retentissant* ! +*NE PANIQUEZ PAS* + +Voir ce lien pour plus de détails: +<http://thread.gmane.org/gname.linux.bios.flashrom/575>. + +Si le dessus est ce que vous voyez, alors *ÉTEIGNEZ* (mais n'enlevez pas le jus, espécialement la batterie RTC). Attendez +quelques secondes et ensuite démarrez; libreboot est éxecuté, mais il y a une deuxième procédure nécessaire (voir +ci-dessous). + +Quand vous avez démarré de nouveau, vous devez aussi faire ceci: + +`$ sudo ./flash i945lenovo_secondflash `[`yourrom.rom`](#rom) + +Si le flashage a échoué à ce stage, essayez le suivant: + +`$ sudo ./flashrom/i686/flashrom -p internal:laptop=force_I_want_a_brick -w `[`yourrom.rom`](#rom) + +Vous devriez voir dans la sortie le suivant: + + Updated BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is + untranslated + (A mis à jour BUC.TS=0 - La rangé d'adresses 128kb 0xFFFE000-0xFFFFFFFF + est non traduite) + +Vous devriez aussi voir le suivant dans la sortie: + + Vérification du flash... VÉRIFIÉ. + + +MacBook 2,1: Guide d'installation initial (si vous êtes en train d'éxecuter le micrologiciel propriétaire) {#flashrom_macbook21} +============================================================================ + +*Si vous avez un MacBook1,1, référez-vous à [../hardware/\#information-about-the-macbook11](../hardware/#information-about-the-macbook11) pour les instructions de flashage.* + +*Ceci est pour le MacBook2,1 pendant que vous éxecutez le micrologiciel EFI d'Apple. Si vous êtes déja en train d'éxecuter coreboot ou libreboot, alors allez à la section [\#flashrom](#flashrom)* + +Rendez-vous sûr de lire les informations dans [../hardware/\#information-about-the-macbook21](../hardware/#information-about-the-macbook21) + +*Attention: ce guide n'instruira pas l'utilisateur sur comment +sauvegarder le micrologiciel original EFI d'Apple. Pour ça, +référez-vous à <http://www.coreboot.org/Board:apple/macbook21>.* + +*Si vous êtes en train d'utiliser libreboot\_src ou git, alors rendez-vous sûr que vous avez compilé les sources en premier (voir [../git/\#build](../git/\#build))* + +Jetez un oeil à la [liste des images ROM](#rom) pour voir quelle image est compatible avec votre appareil. + +Utilisez ce script de flashage pour installer libreboot: + +`$ sudo ./flash i945apple_firstflash `[`yourrom.rom`](#rom) + +Vous devrez voir notamment le suivant en sortie: + + Vérification du flash.... VÉRIFIÉ. + +Extinction. + +Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\ + +La permission est accordé pour copier, distribuer et/ou modifier ce document sous les termes de la GNU Free Documentation Licence version 1.3 ou n'importe quelles autre version plus récentes publié par la Free Software Foundation avec aucune Sections Invariantes, Texte de Couverture, et Texte de quatrième de couverture. +Une copie de cette licence est trouvé dans [fdl-1.3.md](fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/kcma-d8.md b/i18n/fr_FR/docs/install/kcma-d8.md new file mode 100644 index 00000000..8f9ecfc1 --- /dev/null +++ b/i18n/fr_FR/docs/install/kcma-d8.md @@ -0,0 +1,38 @@ +--- +title: KCMA-D8 external flashing instructions +x-toc-enable: true +... + +Initial flashing instructions for kcma-d8. + +This guide is for those who want libreboot on their ASUS kcma-d8 +motherboard, while they still have the proprietary ASUS BIOS present. +This guide can also be followed (adapted) if you brick you board, to +know how to recover. + +*Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules.* + +For more general information about this board, refer to +[../hardware/kcma-d8.md](../hardware/kcma-d8.md). + +TODO: show photos here, and other info. + +External programmer {#programmer} +=================== + +Refer to [bbb\_setup.md](bbb_setup.md) for a guide on how to set up +an external SPI programmer. + +The flash chip is in a PDIP 8 socket (SPI flash chip) on the +motherboard, which you take out and then re-flash with libreboot, using +the programmer. *DO NOT* remove the chip with your hands. Use a chip +extractor tool. + +Copyright © 2016 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/kgpe-d16.md b/i18n/fr_FR/docs/install/kgpe-d16.md new file mode 100644 index 00000000..9810179f --- /dev/null +++ b/i18n/fr_FR/docs/install/kgpe-d16.md @@ -0,0 +1,38 @@ +--- +title: KGPE-D16 external flashing instructions +x-toc-enable: true +... + +Initial flashing instructions for KGPE-D16. + +This guide is for those who want libreboot on their ASUS KGPE-D16 +motherboard, while they still have the proprietary ASUS BIOS present. +This guide can also be followed (adapted) if you brick you board, to +know how to recover. + +*Memory initialization is still problematic, for some modules. We +recommend avoiding Kingston modules.* + +For more general information about this board, refer to +[../hardware/kgpe-d16.md](../hardware/kgpe-d16.md). + +TODO: show photos here, and other info. + +External programmer +=================== + +Refer to [bbb\_setup.md](bbb_setup.md) for a guide on how to set up +an external SPI programmer. + +The flash chip is in a PDIP 8 socket (SPI flash chip) on the +motherboard, which you take out and then re-flash with libreboot, using +the programmer. *DO NOT* remove the chip with your hands. Use a chip +extractor tool. + +Copyright © 2015 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/r400_external.md b/i18n/fr_FR/docs/install/r400_external.md new file mode 100644 index 00000000..19f673a6 --- /dev/null +++ b/i18n/fr_FR/docs/install/r400_external.md @@ -0,0 +1,367 @@ +--- +title: Flashing the R400 with a BeagleBone Black +... + +Initial flashing instructions for R400. + +This guide is for those who want libreboot on their ThinkPad R400 while +they still have the original Lenovo BIOS present. This guide can also be +followed (adapted) if you brick your R400, to know how to recover. + +Before following this section, please make sure to setup your libreboot +ROM properly first. Although ROM images are provided pre-built in +libreboot, there are some modifications that you need to make to the one +you chose before flashing. (instructions referenced later in this guide) + +Libreboot T400 {#t400} +============== + +You may also be interested in the smaller, more portable [Libreboot +T400](t400_external.md). + +Serial port {#serial_port} +----------- + +EHCI debug might not be needed. It has been reported that the docking +station for this laptop has a serial port, so it might be possible to +use that instead. + +A note about CPUs +================= + +[ThinkWiki](http://www.thinkwiki.org/wiki/Category:R400) has a list of +CPUs for this system. The Core 2 Duo P8400 and P8600 are believed to +work in libreboot. The Core 2 Duo T9600 was confirmed to work, so the +T9400 probably also works. *The Core 2 Duo T5870/5670 and Celeron M +575/585 are untested!* + +Quad-core CPUs +-------------- + +Incompatible. Do not use. + +A note about GPUs +================= + +Some models have an Intel GPU, while others have both an ATI and an +Intel GPU; this is referred to as "Dual Graphics" (previously +"switchable graphics"). In the *BIOS setup* program for lenovobios, +you can specify that the system will use one or the other (but not +both). + +Libreboot is known to work on systems with only the Intel GPU, using +native graphics initialization. On systems with switchable graphics, the +Intel GPU is used and the ATI GPU is disabled, so native graphics +initialization works all the same. + +CPU paste required +================== + +See [\#paste](#paste). + +Flash chip size {#flashchips} +=============== + +Use this to find out: + + # flashrom -p internal + +MAC address {#macaddress} +=========== + +Refer to [mac\_address.md](../hardware/mac_address.md). + +Initial BBB configuration +========================= + +Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for +flashing. + +The following shows how to connect clip to the BBB (on the P9 header), +for SOIC-16 (clip: Pomona 5252): + + POMONA 5252 (correlate with the BBB guide) + === ethernet jack and VGA port ==== + NC - - 21 + 1 - - 17 + NC - - NC + NC - - NC + NC - - NC + NC - - NC + 18 - - 3.3V (PSU) + 22 - - NC - this is pin 1 on the flash chip + === SATA port === + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + +The following shows how to connect clip to the BBB (on the P9 header), +for SOIC-8 (clip: Pomona 5250): + + POMONA 5250 (correlate with the BBB guide) + === RAM slots ==== + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip + === slot where the AC jack is connected === + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + +Disassembly +----------- + +Remove all screws:\ +\ +Remove the HDD and optical drive:\ +\ +Remove the hinge screws:\ +  + +Remove the palm rest and keyboard:\ +  + +Remove these screws, and then remove the bezel:\ +  + +Remove the speaker screws, but don't remove the speakers yet (just set +them loose):\ +  + + +Remove these screws, and then remove the metal plate:\ +  + + +Remove the antennas from the wifi card, and then start unrouting them:\ +  +  +  + +Disconnect the LCD cable from the motherboard:\ +  +  + +Remove the hinge screws, and then remove the LCD panel:\ +  +  + +Remove this:\ +  + +Remove this long cable (there are 3 connections):\ +  +  + +Disconnect the speaker cable, and remove the speakers:\ + + +Remove the heatsink screws, remove the fan and then remove the +heatsink/fan:\ +  +  + +Remove the NVRAM battery:\ +  + +Remove this screw:\ +  + +Disconnect the AC jack:\ +  + +Remove this screw and then remove what is under it:\ + + +Remove this:\ + + +Lift the motherboard (which is still inside the cage) from the side on +the right, removing it completely:\ +  + +Remove all screws, marking each hole so that you know where to re-insert +them. You should place the screws in a layout corresponding to the order +that they were in before removal:  + + +Remove the motherboard from the cage, and the SPI flash chip will be +next to the memory slots:\ +  + +Connect your programmer, then connect GND and 3.3V\ +  +  +  + +A dedicated 3.3V PSU was used to create this guide, but at ATX PSU is +also fine:\ + + +Of course, make sure to turn on your PSU:\ + + +Now, you should be ready to install libreboot. + +Flashrom binaries for ARM (tested on a BBB) are distributed in +libreboot\_util. Alternatively, libreboot also distributes flashrom +source code which can be built. + +Log in as root on your BBB, using the instructions in +[bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access). + +Test that flashrom works: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512\ + +In this case, the output was: + + flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) + flashrom is free software, get the source code at http://www.flashrom.org + Calibrating delay loop... OK. + Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. + Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. + Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. + Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" + Please specify which chip definition to use with the -c <chipname> option. + +How to backup factory.rom (change the -c option as neeed, for your flash +chip): + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory1.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory2.rom + +Note: the `-c` option is not required in libreboot's patched +flashrom, because the redundant flash chip definitions in *flashchips.c* +have been removed. + +Now compare the 3 images: + + # sha512sum factory*.rom + +If the hashes match, then just copy one of them (the factory.rom) to a +safe place (on a drive connected to another system, not the BBB). This +is useful for reverse engineering work, if there is a desirable +behaviour in the original firmware that could be replicated in coreboot +and libreboot. + +Follow the instructions at +[../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) +to change the MAC address inside the libreboot ROM image, before +flashing it. Although there is a default MAC address inside the ROM +image, this is not what you want. *Make sure to always change the MAC +address to one that is correct for your system.* + +Now flash it: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +path/to/libreboot/rom/image.rom -V + + + +You might see errors, but if it says `Verifying flash... VERIFIED` at +the end, then it's flashed and should boot. If you see errors, try +again (and again, and again); the message `Chip content is identical to +the requested image` is also an indication of a successful +installation. + +Example output from running the command (see above): + + flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) + flashrom is free software, get the source code at http://www.flashrom.org + Calibrating delay loop... OK. + Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. + Reading old flash chip contents... done. + Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 + ERASE FAILED! + Reading current flash chip contents... done. Looking for another erase function. + Erase/write done. + Verifying flash... VERIFIED. + +Thermal paste (IMPORTANT) +========================= + +Because part of this procedure involved removing the heatsink, you will +need to apply new paste. Arctic MX-4 is ok. You will also need isopropyl +alcohol and an anti-static cloth to clean with. + +When re-installing the heatsink, you must first clean off all old paste +with the alcohol/cloth. Then apply new paste. Arctic MX-4 is also much +better than the default paste used on these systems. + + + +NOTE: the photo above is for illustration purposes only, and does not +show how to properly apply the thermal paste. Other guides online detail +the proper application procedure. + +Wifi +==== + +The R400 typically comes with an Intel wifi chipset, which does not work +without proprietary software. For a list of wifi chipsets that work +without proprietary software, see +[../hardware/\#recommended\_wifi](../hardware/#recommended_wifi). + +Some R400 laptops might come with an Atheros chipset, but this is +802.11g only. + +It is recommended that you install a new wifi chipset. This can only be +done after installing libreboot, because the original firmware has a +whitelist of approved chips, and it will refuse to boot if you use an +'unauthorized' wifi card. + +The following photos show an Atheros AR5B95 being installed, to replace +the Intel chip that this R400 came with:\ +  + +WWAN +==== + +If you have a WWAN/3G card and/or sim card reader, remove them +permanently. The WWAN-3G card has proprietary firmware inside; the +technology is identical to what is used in mobile phones, so it can also +track your movements. + +Not to be confused with wifi (wifi is fine). + +Memory +====== + +You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs +(speed/size). Non-matching pairs won't work. You can also install a +single module (meaning, one of the slots will be empty) in slot 0. + +Make sure that the RAM you buy is the 2Rx8 density. + +[This page](http://www.forum.thinkpads.com/viewtopic.php?p=760721) might +be useful for RAM compatibility info (note: coreboot raminit is +different, so this page might be BS) + +The following photo shows 8GiB (2x4GiB) of RAM installed:\ + + +Boot it! +-------- + +You should see something like this: + +  + +Now [install GNU+Linux](../gnulinux/). + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ +Copyright © 2018 Nico Rikken <nico@nicorikken.eu>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/rpi_setup.md b/i18n/fr_FR/docs/install/rpi_setup.md new file mode 100644 index 00000000..213931f4 --- /dev/null +++ b/i18n/fr_FR/docs/install/rpi_setup.md @@ -0,0 +1,401 @@ +--- +title: Comment programmer une puce flash SPI avec la Raspberry Pi +... + +Ce document existe comme un guide pour lire de ou écrire dans une puce flash +SPI avec la Raspberry Pi, utilisant le logiciel [flashrom](http://flashrom.org/Flashrom) +La plupart des révisions de la RPi devrait marcher. + +Le projet Libreboot recommande d'utiliser [GNU+Linux sans blob]() + +This document exists as a guide for reading from or writing to an SPI flash +chip with the Raspberry Pi, using the [flashrom](http://flashrom.org/Flashrom) +software. Most revisions of the RPi should work. + +Le projet Libreboot recommande l'utilisation de [GNU+Linux sans blobs](https://blog.rosenzweig.io/blobless-linux-on-the-pi.html) +sur la Raspberry Pi, pour éviter d'avoir à éxecuter des logiciels non-libres. C'est devenu +seulement possible en Février 2017 et les instructions ci-dessous ne sont +pas encore mises à jour avec les étapes nécessaires, donc silvouplaît ne suivez pas les +étapes ci-dessous à moins que vous consentez à éxecuter des logiciels non-libre sur votre +Raspberry Pi. + +Cela concerne seulement les puces flash SOIC-8 pour l'instant. Le guide pour les +SOIC-16 viendra plus tard (pour l'instant, ça devrait être facile pour vous de déduire ce +qu'il y a faire pour les SOIC-16). + + +Raspberry Pi (ThinkPad X60/T60 et Macbook 2,1) +------------------------------------------------ + +La Raspberry Pi (un ordinateur GNU+Linux versatile pour \$25) peut être utilisé comme +un outil de flashage de BIOS, grâce à ses broches GPIO et son support de SPI. + +Note: La Raspberry Pi Model A n'est pas supportée, puisqu'elle n'a pas de broches GPIO. +### Désassembler les ThinkPad + +Suivez le [manuel de maintenance matérielle X60](http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42x3550_04.pdf) +ou le [manuel de maintenance matérielle T60](http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42t7844_04.pdf) pour +désassembler l'ordinateur portable, jusqu'à ce que vous pouvez accéder la puce BIOS. + +Pour des photos, suivez le [Guide Libreboot de Récupération du T60](t60_unbrick.md). + + Sur le X60, la puce BIOS est sur le bas de la carte mère, sous une + couche de ruban adhésif noir protecteur. + + Sur le T60, la puce BIOS est juste en dessous du repose main, mais + bloqué par une plaque en magnésium (que vous aurez à enlever). + + +### Pomona Clip Pinout + +Diagram of the 26 GPIO Pins of the Raspberry Pi Model B (for the Model +B+ with 40 pins, start counting from the right and leave 14 pins): + +  + + 8-pin for X60: + + ~~~~ LCD (Front) ~~~~ + 8765 + ---- + | | + ---- + 1234 + ~~~ Palmrest (back) ~~ + + Pin \# SPI Pin Name BP (Seeed) BP (Spkfun) [Beagleboard Black](http://beagleboard.org/Support/bone101#headers) [Raspberry Pi](images/rpi/0000.jpg) + -------- -------------- ------------ ------------- --------------------------------------------------------------------- ------------------------------------- + 1 CS White Red Pin 17 24 + 2 MISO Black Brown Pin 21 21 + 3 *not used* *not used* *not used* *not used* *not used* + 4 GND Brown Black Pin 1 25 + 5 MOSI Gray Orange Pin 18 19 + 6 CLK Purple Yellow Pin 22 23 + 7 *not used* *not used* *not used* *not used* *not used* + 8 3.3V *red* White [3.3V PSU RED](bbb_setup.md) 17 + +Make sure the pinouts are correct; otherwise, Flashrom will fail to +detect a chip, or it will "detect" a `0x0` chip. Finally, make sure +that the Pomona clip makes contact with the metal wires of the chip. It +can be a challenge, but keep trying. + +### How to supply power to the flashchip + +There are two ways to supply power to the chip: plugging in an AC +adapter (without turning the laptop on), and using the 8th 3.3v pin. + +I have found that the SST chips work best with the 8th pin, while the +Macronix chips require an AC Adapter to power up. + +*Never connect both the 8th pin and the AC adapter at the same time.* + +Your results may vary. + +Reading the Flashchip +---------------------- + +First, visually inspect (with a magnifying glass) the type of flashchip +on the motherboard. + +Next, download and compile the latest Flashrom source code on the +Raspberry Pi. + + sudo apt-get install build-essential pciutils usbutils libpci-dev libusb-dev libftdi1 libftdi-dev zlib1g-dev subversion libusb-1.0-0-dev + svn co svn://flashrom.org/flashrom/trunk flashrom + cd flashrom + make + sudo modprobe spi_bcm2708 + sudo modprobe spidev + +If your chip is an SST, run this command: + + sudo ./flashrom -p linux_spi:dev=/dev/spidev0.0 -r test.rom + +If your chip is a Macronix, run this command: + + sudo ./flashrom -c "MX25L1605" -p linux_spi:dev=/dev/spidev0.0 -r test.rom + +Next, check the md5sum of the dump: + + md5sum test.rom + +Run the `flashrom` command again to make a second dump. Then, check the +md5sum of the second dump: + + md5sum test.rom + +If the md5sums match after three tries, `flashrom` has managed to read +the flashchip precisely (but not always accurately). You may try and +flash Libreboot now. + +Flashing Libreboot +------------------- + +Note: replace `/path/to/libreboot.rom` with the location of your chosen ROM, +such as `../bin/x60/libreboot_usqwerty.rom`): + +If your chip is an SST, run this command: + + sudo ./flashrom -p linux_spi:dev=/dev/spidev0.0 -w /path/to/libreboot.rom + +If your chip is a Macronix, run this command: + + sudo ./flashrom -c "MX25L1605" -p linux_spi:dev=/dev/spidev0.0 -w /path/to/libreboot.rom + +Once that command outputs the following, the flash has completed +successfully. If not, just flash again. + + Reading old flash chip contents... done. + Erasing and writing flash chip... Erase/write done. + Verifying flash... VERIFIED. + +### Sources + +- [Scruss - Simple ADC with the Raspberry + Pi](http://scruss.com/blog/2013/02/02/simple-adc-with-the-raspberry-pi/) +- [Flashing coreboot on a T60 with a Raspberry Pi - + the\_unconventional's + blog](https://web.archive.org/web/20150709043222/http://blogs.fsfe.org:80/the_unconventional/2015/05/08/coreboot-t60-raspberry-pi/) +- *Pomona SOIC Clip flashing* + - [Arch Linux Wiki - Installing Arch Linux on + Chromebook](https://wiki.archlinux.org/index.php/Chromebook) + - [Google Drive - Raspberry Pi SOIC Clip + connection](https://drive.google.com/folderview?id=0B9f62MH0umbmRTA2Xzd5WHhjWEU&usp=sharing) + - [rPI with Flashrom and SOIC Clip + Powerpoint](http://satxhackers.org/wp/hack-content/uploads/2013/04/rPI_flashrom.pdf) + +### Raspberry Pi Pinout Diagrams + + MCP 3008 Pin Pi GPIO Pin \# Pi Pin Name + ----- ---------- ---------------- -------------------- + 16 `VDD` 1 `3.3 V` + 15 `VREF` 1 `3.3 V` + 14 `AGND` 6 `GND` + 13 `CLK` 23 `GPIO11 SPI0_SCLK` + 12 `DOUT` 21 `GPIO09 SPI0_MISO` + 11 `DIN` 19 `GPIO10 SPI0_MOSI` + 10 `CS` 24 `GPIO08 CE0` + 9 `DGND` 6 `GND` + +- Source: [Perl & Raspberry Pi - Raspberry Pi GPIO + Pinout](http://raspberrypi.znix.com/hipidocs/topic_gpiopins.htm) + +Raspberry Pi (ThinkPad X200) +----------------------------- + +### Requirements: + +- An x86, x86\_64, or arm7l (for changing the libreboot.rom image mac + address) +- Raspberry Pi and peripherals +- Relevant SOIC clip +- 6 female - female jumpers +- Internet connection +- Screw drivers + +Follow the [ThinkPad X200: Initial installation +guide](x200_external.md) to +disassemble the laptop, and access the BIOS rom chip. + +Note: `x86#` refers to commands to be run on the x86 computer, and `pi#` refers +to commands to be run on the pi. A good practice is to make a work directory to +keep your libreboot stuff inside. + + x86# mkdir ~/work + +If you're running Raspian, you can do **sudo raspi-config**, enable SPI +under Advanced and then spidev will be enabled. Simple, eh? + +[Download Libreboot from their releases +page](../../download/). For your safety, verify the +GPG signature as well. + + x86# gpg --keyserver prefered.keyserver.org --recv-keys 0x656F212E + + x86# for signature in $(ls *.sig); do gpg --verify $signature; done + +Install dependencies: + + pi# sudo apt-get update && sudo apt-get install libftdi1 libftdi-dev libusb-dev libpci-dev subversion libusb-1.0-0-dev pciutils, zlib, libusb, build-essential + +Download and build flashrom. + + pi# svn co svn://flashrom.org/flashrom/trunk ~/flashrom + + pi# cd ~/flashrom + + pi# make + + pi# sudo make install + +On your x86 box change the libreboot.rom mac address + + x86# cd ~/work/libreboot_bin/ + +Change the mac address on the libreboot images to match yours. + + x86# ./ich9macchange XX:XX:XX:XX:XX:XX + +Move the libreboot.rom image over to your pi + + x86# scp ~/work/libreboot_bin/<path_to_your_bin> pi@your.pi.address:~/flashrom/libreboot.rom + +Shutdown your pi, write down your rom chip model, and wire up the clip + + pi# sudo shutdown now -hP + +Chip model name + + + +Pinout. You may want to download the image so you can zoom in on the +text. + + + + Pin \# SPI Pin Name Raspberry Pi Pin \# + -------- -------------- --------------------- + 1 *not used* *not used* + 2 3.3V 1 + 3 *not used* *not used* + 4 *not used* *not used* + 5 *not used* *not used* + 6 *not used* *not used* + 7 CS\# 24 + 8 S0/SIO1 21 + 9 *not used* *not used* + 10 GND 25 + 11 *not used* *not used* + 12 *not used* *not used* + 13 *not used* *not used* + 14 *not used* *not used* + 15 S1/SIO0 19 + 16 SCLK 23 + +Note: The raspberry pi 3.3V rail should be sufficient to power the chip during +flashing, so no external power supply should be required; however, at the time +of writing that has only been tested and confirmed for one chip, the +MX25L6405D. + +Macronix Spec sheet so you can adjust your pinout for 8 pin 4Mb chips as +necessary + + + +At this point connect your SOIC clip to the rom chip before powering on +your PI. + +Power on your Pi, and run the following. Ensure you swap out +"your\_chip\_name" with the proper name/model of your chip. Check that +it can be read successfully. If you cannot read the chip and receive an +error similar to "no EEPROM Detected" then +you may want to make sure that MISO/MOSI are not swapped around, check +with multimeter whether voltage is right and that ground is connected +between "programmer" and target. + + pi# cd ~/flashrom + + pi# ./flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 --chip <your_chip_name> -r romread1.rom + + pi# ./flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 --chip <your_chip_name> -r romread2.rom + + pi# ./flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 --chip <your_chip_name> -r romread3.rom + + pi# sha512sum romread*.rom + +If they are identical sha512 hashes then you can generally assume that +it's safe to flash your rom. + + pi# ./flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 --chip <your_chip_name> -w libreboot.rom + +It may fail a couple times, but keep at it and when you get the message +`Verifying flash... Verified` or +`Warning: Chip content is identical to the requested image` then you're +done. + +Shut down your pi, put your box back together, and install a libre OS +for great good! + +Raspberry Pi (C720 Chromebook) +------------------------------- + +The Raspberry Pi (a multipurpose \$25 GNU+Linux computer) can be used as +a BIOS flashing tool, thanks to its GPIO pins and SPI support. + +### [](#what-you-need){#user-content-what-you-need .anchor}What you need + +- \$25 - Raspberry Pi Model B (Rev.2 or higher) +- \$10-20 - SOIC-8 Pomona Clip + - Usually comes bundled with nice, color-colored *female to + female* wires + +### [](#raspberry-pi-pinouts){#user-content-raspberry-pi-pinouts .anchor}Raspberry Pi Pinouts + +GPIO Pinouts: + +  + +> \*Diagram made by ["Pacman" from Win-Raid +> Forums\*](http://www.win-raid.com/t58f16-Guide-Recover-from-failed-BIOS-flash-using-Raspberry-PI.md) + +SOIC Pinouts: + + + +### [](#plugging-in-the-soic-clip){#user-content-plugging-in-the-soic-clip .anchor}Plugging in the SOIC Clip + +We have to connect the Raspberry Pi to the SOIC Clip as shown in the +below diagram (using the f-f wires usually included with the Pomona +clip). + + + +(C720 Only?) The diagram depicts a "bridged" connection. You will need +to fashion one with some copper wire: + + + +Plug in the wires to the clip as shown below: + + + +Plug in the other end of the wires to the Raspberry Pi as shown below: + + + +(C720 only?) Plug in the "bridged" wires as shown below: + + + +Finally, put the Pomona SOIC clip on the chip: + + + +### Flashrom + +[Once it's all set up, flashrom works out of the +box.](http://www.flashrom.org/RaspberryPi) + +### Sources + +- *Pomona SOIC Clip flashing* + - [Arch Linux Wiki - Installing Arch Linux on + Chromebook](https://wiki.archlinux.org/index.php/Chromebook) + - [Google Drive - Raspberry Pi SOIC Clip + connection](https://drive.google.com/folderview?id=0B9f62MH0umbmRTA2Xzd5WHhjWEU&usp=sharing) + - [rPI with Flashrom and SOIC Clip + Powerpoint](http://satxhackers.org/wp/hack-content/uploads/2013/04/rPI_flashrom.pdf) + - [Tnhh - Unbricking Chromebook with + Beaglebone](http://www.tnhh.net/2014/08/25/unbricking-chromebook-with-beaglebone.md) +- *Use a DIY DIP System to flash an desoldered BIOS chip* + - [Viktak - How to recover laptop after failed BIOS + flash](http://diy.viktak.com/2014/07/how-to-recover-laptop-after-failed-bios.md) + - [Win-Raid - Recover from Failed BIOS Flashing using Raspberry + Pi](http://www.win-raid.com/t58f16-Guide-Recover-from-failed-BIOS-flash-using-Raspberry-PI.md) + +Copyright © 2014, 2015 Lawrence Wu <sagnessagiel@gmail.com>\ +Copyright © 2015 snuffeluffegus <>\ +Copyright © 2015 Kevin Keijzer <>\ +Copyright © 2016 Leah Rowe <info@minifree.org>\ + +This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt) diff --git a/i18n/fr_FR/docs/install/t400_external.md b/i18n/fr_FR/docs/install/t400_external.md new file mode 100644 index 00000000..362b2243 --- /dev/null +++ b/i18n/fr_FR/docs/install/t400_external.md @@ -0,0 +1,359 @@ +--- +title: Flashing the T400 with a BeagleBone Black +... + +Initial flashing instructions for T400. + +This guide is for those who want libreboot on their ThinkPad T400 while +they still have the original Lenovo BIOS present. This guide can also be +followed (adapted) if you brick your T400, to know how to recover. + +An +["HMM"](https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/43y6629_05.pdf#page=386) +(Hardware Maintenance Manual) detailing the process of \[dis\]assembly +is available for this model. Be careful when reassembling the laptop as +the screws on page 114 (with title "1130 Keyboard bezel") are swapped +and if you follow the HMM you will punch a hole through the bezel in the +upper right corner. + +Serial port {#serial_port} +----------- + +EHCI debug might not be needed. It has been reported that the docking +station for this laptop has a serial port, so it might be possible to +use that instead. + +A note about CPUs +================= + +[ThinkWiki](http://www.thinkwiki.org/wiki/Category:T400) has a list of +CPUs for this system. The Core 2 Duo P8400, P8600 and P8700 are believed +to work in libreboot. + +T9600, T9500, T9550 and T9900 are all compatible, as reported by users. + +Quad-core CPUs +-------------- + +Very likely to be compatible, but requires hardware modification. +Based on info from German forum post about installing Core Quad CPU on T500 found in coreboot mailing list. Currently work in progress and no guide available. + +- [Coreboot mailing list post](https://mail.coreboot.org/pipermail/coreboot/2016-November/082463.html) +- [German forum post about install Core Quad on T500](https://thinkpad-forum.de/threads/199129) + + +A note about GPUs +================= + +Some models have an Intel GPU, while others have both an ATI and an +Intel GPU; this is referred to as "switchable graphics". In the *BIOS +setup* program for lenovobios, you can specify that the system will use +one or the other (but not both). + +Libreboot is known to work on systems with only the Intel GPU, using +native graphics initialization. On systems with switchable graphics, the +Intel GPU is used and the ATI GPU is disabled, so native graphics +initialization works all the same. + +CPU paste required +================== + +See [\#paste](#paste). + +Flash chip size {#flashchips} +=============== + +Use this to find out: + + # flashrom -p internal + +MAC address {#macaddress} +=========== + +Refer to [mac\_address.md](../hardware/mac_address.md). + +Initial BBB configuration +========================= + +Refer to [bbb\_setup.md](bbb_setup.md) for how to configure the BBB +for flashing. + +The following shows how to connect clip to the BBB (on the P9 header), +for SOIC-16 (clip: Pomona 5252): + + POMONA 5252 (correlate with the BBB guide) + === ethernet jack and VGA port ==== + NC - - 21 + 1 - - 17 + NC - - NC + NC - - NC + NC - - NC + NC - - NC + 18 - - 3.3V (PSU) + 22 - - NC - this is pin 1 on the flash chip + === SATA port === + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + +The following shows how to connect clip to the BBB (on the P9 header), +for SOIC-8 (clip: Pomona 5250): + + POMONA 5250 (correlate with the BBB guide) + === RAM slots ==== + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip + === slot where the AC jack is connected === + + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + +The procedure +------------- + +Remove *all* screws, placing them in the order that you removed them:\ +  + +Remove those three screws then remove the rear bezel:\ +  +  + +Remove the speakers:\ +  +  + + +Remove the wifi:\ +  + +Remove this cable:\ +  +  + + +Unroute those antenna wires:\ +  +  + + +Remove the LCD assembly:\ +  +  +  +  + +Disconnect the NVRAM battery:\ + + +Disconnect the fan:\ + + +Unscrew these:\ +  +  + +Unscrew the heatsink, then lift it off:\ +  + +Disconnect the power jack:\ +  + +Loosen this:\ + + +Remove this:\ +  +  + + +Unscrew these:\ +  + +Remove this:\ +  + +Unscrew this:\ + + +Remove the motherboard (the cage is still attached) from the right hand +side, then lift it out:\ +  + + +Remove these screws, placing the screws in the same layout and marking +each screw hole (so that you know what ones to put the screws back into +later):   +  +  + +Separate the motherboard:\ +  + +Connect your programmer, then connect GND and 3.3V\ +  +  +  + +A dedicated 3.3V PSU was used to create this guide, but at ATX PSU is +also fine:\ + + +Of course, make sure to turn on your PSU:\ + + +Now, you should be ready to install libreboot. + +Flashrom binaries for ARM (tested on a BBB) are distributed in +libreboot\_util. Alternatively, libreboot also distributes flashrom +source code which can be built. + +Log in as root on your BBB, using the instructions in +[bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access). + +Test that flashrom works: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 + +In this case, the output was: + + flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) + flashrom is free software, get the source code at http://www.flashrom.org + Calibrating delay loop... OK. + Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. + Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. + Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. + Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" + Please specify which chip definition to use with the -c <chipname> option. + +How to backup factory.rom (change the -c option as needed, for your flash +chip): + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom + +Note: the `-c` option is not required in libreboot's patched flashrom, because +the redundant flash chip definitions in `flashchips.c` have been removed. + +Now compare the 3 images: + + # sha512sum factory*.rom + +If the hashes match, then just copy one of them (the factory.rom) to a +safe place (on a drive connected to another system, not the BBB). This +is useful for reverse engineering work, if there is a desirable +behaviour in the original firmware that could be replicated in coreboot +and libreboot. + +Follow the instructions at +[../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) +to change the MAC address inside the libreboot ROM image, before +flashing it. Although there is a default MAC address inside the ROM +image, this is not what you want. *Make sure to always change the MAC +address to one that is correct for your system.* + +Now flash it: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V + + + +You might see errors, but if it says `Verifying flash... VERIFIED` at +the end, then it's flashed and should boot. If you see errors, try +again (and again, and again); the message `Chip content is identical to +the requested image` is also an indication of a successful +installation. + +Example output from running the command (see above): + + flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) + flashrom is free software, get the source code at http://www.flashrom.org + Calibrating delay loop... OK. + Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. + Reading old flash chip contents... done. + Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 + ERASE FAILED! + Reading current flash chip contents... done. Looking for another erase function. + Erase/write done. + Verifying flash... VERIFIED. + +Thermal paste (IMPORTANT) +========================= + +Because part of this procedure involved removing the heatsink, you will +need to apply new paste. Arctic MX-4 is ok. You will also need isopropyl +alcohol and an anti-static cloth to clean with. + +When re-installing the heatsink, you must first clean off all old paste +with the alcohol/cloth. Then apply new paste. Arctic MX-4 is also much +better than the default paste used on these systems. + + + +NOTE: the photo above is for illustration purposes only, and does not +show how to properly apply the thermal paste. Other guides online detail +the proper application procedure. + +Wifi +==== + +The T400 typically comes with an Intel wifi chipset, which does not work +without proprietary software. For a list of wifi chipsets that work +without proprietary software, see +[../hardware/\#recommended\_wifi](../hardware/#recommended_wifi). + +Some T400 laptops might come with an Atheros chipset, but this is +802.11g only. + +It is recommended that you install a new wifi chipset. This can only be +done after installing libreboot, because the original firmware has a +whitelist of approved chips, and it will refuse to boot if you use an +'unauthorized' wifi card. + +The following photos show an Atheros AR5B95 being installed, to replace +the Intel chip that this T400 came with:\ +  + +WWAN +==== + +If you have a WWAN/3G card and/or sim card reader, remove them +permanently. The WWAN-3G card has proprietary firmware inside; the +technology is identical to what is used in mobile phones, so it can also +track your movements. + +Not to be confused with wifi (wifi is fine). + +Memory +====== + +You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs +(speed/size). Non-matching pairs won't work. You can also install a +single module (meaning, one of the slots will be empty) in slot 0. + +Make sure that the RAM you buy is the 2Rx8 density. + +[This page](http://www.forum.thinkpads.com/viewtopic.php?p=760721) might +be useful for RAM compatibility info (note: coreboot raminit is +different, so this page might be BS) + +The following photo shows 8GiB (2x4GiB) of RAM installed:\ + + +Boot it! +-------- + +You should see something like this: + +  + +Now [install GNU+Linux](../gnulinux/). + +Copyright © 2015 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/t500_external.md b/i18n/fr_FR/docs/install/t500_external.md new file mode 100644 index 00000000..fc66387c --- /dev/null +++ b/i18n/fr_FR/docs/install/t500_external.md @@ -0,0 +1,386 @@ +--- +title: Flashing the T500 with a BeagleBone Black +... + +Initial flashing instructions for T500. + +This guide is for those who want libreboot on their ThinkPad T500 while +they still have the original Lenovo BIOS present. This guide can also be +followed (adapted) if you brick your T500, to know how to recover. + +W500 is also mostly compatible with this guide. + +Libreboot T400 {#t400} +============== + +You may also be interested in the smaller, more portable [Libreboot +T400](t400_external.md). + +Serial port {#serial_port} +----------- + +EHCI debug might not be needed. It has been reported that the docking +station for this laptop has a serial port, so it might be possible to +use that instead. + +A note about CPUs +================= + +[ThinkWiki](http://www.thinkwiki.org/wiki/Category:T500) has a list of +CPUs for this system. The Core 2 Duo P8400, P8600 and P8700 are believed +to work in libreboot. The T9600 was also tested on the T400 and +confirmed working. + +T9550 and T9900 was tested by a user, and is compatible as reported in the IRC channel. +T9500 and T9400 may also work, but YMMV. + +Quad-core CPUs +-------------- +Very likely to be compatible, but requires hardware modification. +Based on info from German forum post about installing Core Quad CPU on T500 found in coreboot mailing list. Currently work in progress and no guide available. + +Q9100 is compatible and confirmed working (after hw mod), as reported by users in the IRC +channel + +- [Coreboot mailing list post](https://mail.coreboot.org/pipermail/coreboot/2016-November/082463.html) +- [German forum post about install Core Quad on T500](https://thinkpad-forum.de/threads/199129) + +A note about GPUs +================= + +Some models have an Intel GPU, while others have both an ATI and an +Intel GPU; this is referred to as "switchable graphics". In the *BIOS +setup* program for lenovobios, you can specify that the system will use +one or the other (but not both). + +Libreboot is known to work on systems with only the Intel GPU, using +native graphics initialization. On systems with switchable graphics, the +Intel GPU is used and the ATI GPU is disabled, so native graphics +initialization works all the same. + +CPU paste required +================== + +See [\#paste](#paste). + +Flash chip size {#flashchips} +=============== + +Use this to find out: + + # flashrom -p internal + +MAC address {#macaddress} +=========== + +Refer to [mac\_address.md](../hardware/mac_address.md). + +Initial BBB configuration +========================= + +Refer to [bbb\_setup.md](bbb_setup.md) for how to configure the BBB +for flashing. + +The following shows how to connect clip to the BBB (on the P9 header), +for SOIC-16 (clip: Pomona 5252): + + POMONA 5252 (correlate with the BBB guide) + === ethernet jack and VGA port ==== + NC - - 21 + 1 - - 17 + NC - - NC + NC - - NC + NC - - NC + NC - - NC + 18 - - 3.3V (PSU) + 22 - - NC - this is pin 1 on the flash chip + === SATA port === + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + +The following shows how to connect clip to the BBB (on the P9 header), +for SOIC-8 (clip: Pomona 5250): + + POMONA 5250 (correlate with the BBB guide) + === RAM slots ==== + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip + === slot where the AC jack is connected === + + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + +The procedure +------------- + +Remove all screws:\ +\ +It is also advisable to, throughout the disassembly, place any screws +and/or components that you removed in the same layout or arrangement. +The follow photos demonstrate this:\ +  + +Remove the HDD/SSD and optical drive:\ +  + +Remove the palm rest:\ +  + +Remove the keyboard and rear bezel:\ +  +  +  + +If you have a WWAN/3G card and/or sim card reader, remove them +permanently. The WWAN-3G card has proprietary firmware inside; the +technology is identical to what is used in mobile phones, so it can also +track your movements:\ +  + + +Remove this frame, and then remove the wifi chip:\ +  + + +Remove the speakers:\ +  +  +  + + +Remove the NVRAM battery (already removed in this photo):\ + + +When you re-assemble, you will be replacing the wifi chip with another. +These two screws don't hold anything together, but they are included in +your system because the screw holes for half-height cards are a +different size, so use these if you will be installing a half-height +card:\ + + +Unroute the antenna wires:\ +  +  + +Disconnect the LCD cable from the motherboard:\ +  + +Remove the LCD assembly hinge screws, and then remove the LCD assembly:\ +  + + +Remove the fan and heatsink:\ +  + + +Remove this screw:\ + + +Remove these cables, keeping note of how and in what arrangement they +are connected:\ +  +  +  +  + + +Disconnect the power jack:\ +  + +Remove the motherboard and cage from the base (the marked hole is where +those cables were routed through):\ +  + +Remove all screws, arranging them in the same layout when placing the +screws on a surface and marking each screw hole (this is to reduce the +possibility of putting them back in the wrong holes):\ +  + +Also remove this:\ +  + +Separate the motherboard from the cage:\ +  + +The flash chip is next to the memory slots. On this system, it was a +SOIC-8 (4MiB or 32Mb) flash chip:\ + + +Connect your programmer, then connect GND and 3.3V\ +\ +  +  + +A dedicated 3.3V PSU was used to create this guide, but at ATX PSU is +also fine:\ + + +Of course, make sure to turn on your PSU:\ + + +Now, you should be ready to install libreboot. + +Flashrom binaries for ARM (tested on a BBB) are distributed in +libreboot\_util. Alternatively, libreboot also distributes flashrom +source code which can be built. + +Log in as root on your BBB, using the instructions in +[bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access). + +Test that flashrom works: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 + +In this case, the output was: + + flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) + flashrom is free software, get the source code at http://www.flashrom.org + Calibrating delay loop... OK. + Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. + Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. + Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. + Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" + Please specify which chip definition to use with the -c <chipname> option. + +How to backup factory.rom (change the -c option as neeed, for your flash +chip): + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory1.rom + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r + +factory2.rom + +Note: the `-c` option is not required in libreboot's patched +flashrom, because the redundant flash chip definitions in *flashchips.c* +have been removed.\ +Now compare the 3 images: + + # sha512sum factory\*.rom + +If the hashes match, then just copy one of them (the factory.rom) to a +safe place (on a drive connected to another system, not the BBB). This +is useful for reverse engineering work, if there is a desirable +behaviour in the original firmware that could be replicated in coreboot +and libreboot. + +Follow the instructions at +[../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) +to change the MAC address inside the libreboot ROM image, before +flashing it. Although there is a default MAC address inside the ROM +image, this is not what you want. *Make sure to always change the MAC +address to one that is correct for your system.* + +Now flash it: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +path/to/libreboot/rom/image.rom -V + + + +You might see errors, but if it says `Verifying flash... VERIFIED` at +the end, then it's flashed and should boot. If you see errors, try +again (and again, and again); the message `Chip content is identical to +the requested image` is also an indication of a successful +installation. + +Example output from running the command (see above): + + flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) + flashrom is free software, get the source code at http://www.flashrom.org + Calibrating delay loop... OK. + Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. + Reading old flash chip contents... done. + Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 + ERASE FAILED! + Reading current flash chip contents... done. Looking for another erase function. + Erase/write done. + Verifying flash... VERIFIED. + +Thermal paste (IMPORTANT) +========================= + +Because part of this procedure involved removing the heatsink, you will +need to apply new paste. Arctic MX-4 is ok. You will also need isopropyl +alcohol and an anti-static cloth to clean with. + +When re-installing the heatsink, you must first clean off all old paste +with the alcohol/cloth. Then apply new paste. Arctic MX-4 is also much +better than the default paste used on these systems. + + + +NOTE: the photo above is for illustration purposes only, and does not +show how to properly apply the thermal paste. Other guides online detail +the proper application procedure. + +Wifi +==== + +The T500 typically comes with an Intel wifi chipset, which does not work +without proprietary software. For a list of wifi chipsets that work +without proprietary software, see +[../hardware/\#recommended\_wifi](../hardware/#recommended_wifi). + +Some T500 laptops might come with an Atheros chipset, but this is +802.11g only. + +It is recommended that you install a new wifi chipset. This can only be +done after installing libreboot, because the original firmware has a +whitelist of approved chips, and it will refuse to boot if you use an +'unauthorized' wifi card. + +The following photos show an Atheros AR5B95 being installed, to replace +the Intel chip that this T500 came with:\ +  + +WWAN +==== + +If you have a WWAN/3G card and/or sim card reader, remove them +permanently. The WWAN-3G card has DMA, and proprietary firmware inside; +the technology is identical to what is used in mobile phones, so it can +also track your movements. + +Not to be confused with wifi (wifi is fine). + +Memory +====== + +DDR3 SO-DIMM sticks will work at PC3-8500 clock and voltage, so make sure that +timings of sticks are matched while they operate at its frequency. +Non-matching pairs won't work. You can also install a +single module (meaning, one of the slots will be empty) in slot 0. + +Make sure that the RAM you buy has 2Rx8 arrangement when buying 4GiB modules. + +[This page](http://www.forum.thinkpads.com/viewtopic.php?p=760721) might +be useful for RAM compatibility info (note: coreboot raminit is +different, so this page might be BS) + +The following photo shows 8GiB (2x4GiB) of RAM installed:\ + + +Boot it! +-------- + +You should see something like this: + + + +Now [install GNU+Linux](../gnulinux/). + +Copyright © 2015 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/t60_unbrick.md b/i18n/fr_FR/docs/install/t60_unbrick.md new file mode 100644 index 00000000..c61c3a5e --- /dev/null +++ b/i18n/fr_FR/docs/install/t60_unbrick.md @@ -0,0 +1,211 @@ +--- +title: ThinkPad T60 Recovery guide +x-toc-enable: true +... + +This section documents how to recover from a bad flash that prevents +your ThinkPad T60 from booting. + +Brick type 1: bucts not reset. {#bucts_brick} +============================== + +You still have Lenovo BIOS, or you had libreboot running and you flashed +another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if +Lenovo BIOS was present and libreboot wasn't flashed.\ + +In this case, unbricking is easy: reset BUC.TS to 0 by removing that +yellow cmos coin (it's a battery) and putting it back after a minute or +two:\ +\ + +\*Those dd commands should be applied to all newly compiled T60 ROM +images (the ROM images in libreboot binary archives already have this +applied!):\ +dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s +coreboot.rom) - 0x10000\] count=64k\ +dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\] +count=64k | hexdump\ +dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s +coreboot.rom) - 0x20000\] count=64k conv=notrunc\ +(doing this makes the ROM suitable for use when flashing a system that +still has Lenovo BIOS running, using those instructions: +<http://www.coreboot.org/Board:lenovo/x60/Installation>. (it says x60, +but instructions for t60 are identical) + +bad rom (or user error), system won't boot {#recovery} +=========================================== + +In this scenario, you compiled a ROM that had an incorrect +configuration, or there is an actual bug preventing your system from +booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash +while Lenovo BIOS was running. In any case, your system is bricked and +will not boot at all. + +"Unbricking" means flashing a known-good (working) ROM. The problem: +you can't boot the system, making this difficult. In this situation, +external hardware (see hardware requirements above) is needed which can +flash the SPI chip (where libreboot resides). + +Remove those screws and remove the HDD:\ +  + +Lift off the palm rest:\ + + +Lift up the keyboard, pull it back a bit, flip it over like that and +then disconnect it from the board:\ +  + + +Gently wedge both sides loose:\ +  + +Remove that cable from the position:\ +  + +Now remove that bezel. Remove wifi, nvram battery and speaker connector +(also remove 56k modem, on the left of wifi):\ + + +Remove those screws:\ + + +Disconnect the power jack:\ + + +Remove nvram battery:\ + + +Disconnect cable (for 56k modem) and disconnect the other cable:\ +  + +Disconnect speaker cable:\ + + +Disconnect the other end of the 56k modem cable:\ + + +Make sure you removed it:\ + + +Unscrew those:\ + + +Make sure you removed those:\ + + +Disconnect LCD cable from board:\ + + +Remove those screws then remove the LCD assembly:\ +  + + +Once again, make sure you removed those:\ + + +Remove the shielding containing the motherboard, then flip it over. +Remove these screws, placing them on a steady surface in the same layout +as they were in before you removed them. Also, you should mark each +screw hole after removing the screw (a permanent marker pen will do), +this is so that you have a point of reference when re-assembling the +system: + +  +  +  + +Now wire up the BBB and the Pomona with your PSU.\ +Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for +flashing. + +*Note, the guide mentions a 3.3v DC PSU but you don't need this on the +T60: if you don't have or don't want to use an external PSU, then make +sure not to connect the 3.3v leads mentioned in the guide; instead, +connect the AC adapter (the one that normally charges your battery) so +that the board has power (but don't boot it up)* + + + +Correlate the following with the BBB guide linked above: + + POMONA 5250: + === DVD drive ==== + 18 - - 1 + 22 - - NC ---- RAM is on this end + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip + === audio jacks === + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + +Connect the pomona from the BBB to the flash chip. No pics +unfortunately. (use the text diagram above). + +Flashrom binaries for ARM (tested on a BBB) are distributed in +libreboot\_util. Alternatively, libreboot also distributes flashrom +source code which can be built. + +SSH'd into the BBB: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +yourrom.rom + +It should be `Verifying flash... VERIFIED` at the end. If flashrom +complains about multiple flash chip definitions detected, then choose +one of them following the instructions in the output. + +Put those screws back:\ + + +Put it back into lower chassis:\ + + +Attach LCD and insert screws (also, attach the lcd cable to the board):\ + + +Insert those screws:\ + + +On the CPU (and there is another chip south-east to it, sorry forgot to +take pic) clean off the old thermal paste (with the alcohol) and apply +new (Artic Silver 5 is good, others are good too) you should also clean +the heatsink the same way\ + + +Attach the heatsink and install the screws (also, make sure to install +the AC jack as highlighted):\ + + +Reinstall that upper bezel:\ + + +Do that:\ +  + +Re-attach modem, wifi, (wwan?), and all necessary cables. Sorry, forgot +to take pics. Look at previous removal steps to see where they go back +to. + +Attach keyboard and install nvram battery:\ +  + +Place keyboard and (sorry, forgot to take pics) reinstall the palmrest +and insert screws on the underside:\ + + +It lives!\ +  + + +Always stress test ('stress -c 2' and xsensors. below 90C is ok) when +replacing cpu paste/heatsink:\ + + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/x200_external.md b/i18n/fr_FR/docs/install/x200_external.md new file mode 100644 index 00000000..0b574a68 --- /dev/null +++ b/i18n/fr_FR/docs/install/x200_external.md @@ -0,0 +1,305 @@ +--- +title: Flashing the X200 with a BeagleBone Black +x-toc-enable: true +... + +This guide is for those who want libreboot on their ThinkPad X200 while +they still have the original Lenovo BIOS present. This guide can also be +followed (adapted) if you brick your X200, to know how to recover. + +X200 laptops with libreboot pre-installed +========================================= + +If you don't want to install libreboot yourself, companies exist that +sell these laptops with libreboot pre-installed, along with a free +GNU+Linux distribution. + +Flash chip size +=============== + +Run this command on x200 to find out flash chip model and its size: + + # flashrom -p internal + +The X200S and X200 Tablet will use a WSON-8 flash chip, on the bottom of the +motherboard (this requires removal of the motherboard). Not all X200S/X200T are +supported; see the [hardware](../hardware/x200.html#x200s) page. + +MAC address +=========== + +Refer to [mac\_address.md](../hardware/mac_address.md). + +Initial BBB configuration +========================= + +Refer to [bbb\_setup.md](bbb_setup.md) for how to set up the BBB for +flashing. + +The following table shows how to connect the test clip to the BBB (on the P9 +header), for SOIC-8/SOIC-16: + +|BeagleBoneBlack|Pin on P9|SPI |25xx SOIC8 pin|SOIC16|Ball |DTS | +|---------------|---------|----|--------------|------|--------|---------| +|I2C1_SCL |17 |/CS |1 |7 |A16 |spi0_cs0 | +|I2C1_SDA |18 |MOSI|5 |15 |B16 |spi0_d1 | +|UART2_RXD |22 |CLK |6 |16 |A17 |spi0_sclk| +|UART2_TXD |21 |MISO|2 |8 |B17 |spi0_d0 | +|GND |1 or 2 |GND |4 |10 |GND |GND | +|VDD_3V3D |3 or 4 |Vcc |8 |2 |VDD_3V3D|VDD_3V3D | + +*Pictures of flash chip location are located further down on this page* + +If onboard 3.3V supply happens to be insuficient, use a separate +module/power supply and set its current limit to 400mA. +Do not forget that in this case ground has to be continuous across between +motherboard, BBB and PSU (all three)! + +On the X200S and X200 Tablet the flash chip is underneath the board, in a WSON +package. The pinout is very much the same as a SOIC-8, but such package makes +it impossible to use testclip. In order to enable external flashing of device, +chip has to be changed to SOIC-8 one. Such procedure requires hot air station +and soldering station (with "knife" K-Tip to easily solder SOIC-8). + +Check the list of SOIC-8 flash chips at [List of supported flash +chips](https://www.flashrom.org/Supported_hardware#Supported_flash_chips)\ 25XX +series SPI NOR Flash in 8/16MiB sizes will work fine with libreboot. + +The procedure +------------- + +This section is for the X200. This does not apply to the X200S or X200 +Tablet (for those systems, you have to remove the motherboard +completely, since the flash chip is on the other side of the board). + +Remove these screws:\ + + +Gently push the keyboard towards the screen, then lift it off, and optionally +disconnect it from the board:\ + + + +Disconnect the cable of the fingerpring reader, and then pull up the palm rest, +lifting up the left and right side of it:\ + + + +This shows the location of the flash chip, for both SOIC-8 and SOIC-16:\ + + + +Lift back the tape that covers a part of the flash chip, and then +connect the clip:\ + + +On pin 2 of the BBB, where you have the ground (GND), connect the ground +to your PSU:\ + + + +Connect the 3.3V DC supply from your PSU to the flash chip (via the clip):\ + + + +Now, you should be ready to install libreboot. + +Flashrom binaries for ARM (tested on a BBB) are distributed in +libreboot\_util. Alternatively, libreboot also distributes flashrom +source code which can be built. + +Log in as root on your BBB, using the instructions in +[bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access). + +Probe for chips with flashrom: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 + +In this case, the output was: + + flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) + flashrom is free software, get the source code at http://www.flashrom.org + Calibrating delay loop... OK. + Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. + Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. + Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. + Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" + Please specify which chip definition to use with the -c <chipname> option. + +Here is how to backup factory.rom: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom + +Note: the `-c` option is not required in libreboot's patched +flashrom, because the redundant flash chip definitions in *flashchips.c* +have been removed. + +Now compare the 3 images: + + # sha512sum factory*.rom + +If the hashes match and if hex editor (like `dhex`) shows that +they have valid contents (eg. it's not filled entirely with `0x00`/`0xFF`), +then just copy one of them (the factory.rom) to a +safe place (on a drive connected to another system, not the BBB). This +is useful for reverse engineering work, if there is a desirable +behaviour in the original firmware that could be replicated in coreboot +and libreboot. + +Follow the instructions at +[../hardware/gm45\_remove\_me.html\#ich9gen](../hardware/gm45_remove_me.html#ich9gen) +to change the MAC address inside the libreboot ROM image, before +flashing it. Although there is a default MAC address inside the ROM +image, this is not what you want. Make sure to always change the MAC +address to one that is correct for your system. + +Now flash it: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom + + + +You might see errors, but if it says `Verifying flash... VERIFIED` at +the end, then it's flashed and should boot. If you see errors, try +again (and again, and again); the message `Chip content is identical to +the requested image` is also an indication of a successful +installation. + +Example output from running the command (see above): + + flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) + flashrom is free software, get the source code at http://www.flashrom.org + Calibrating delay loop... OK. + Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. + Reading old flash chip contents... done. + Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 + ERASE FAILED! + Reading current flash chip contents... done. Looking for another erase function. + Erase/write done. + Verifying flash... VERIFIED. + +Wifi +==== + +The X200 typically comes with an Intel wifi chipset, which does not work +without proprietary software. For a list of wifi chipsets that work +without proprietary software, see +[../hardware/\#recommended\_wifi](../hardware/#recommended_wifi). + +Some X200 laptops come with an Atheros chipset, but this is 802.11g +only. + +It is recommended that you install a new wifi chipset. This can only be +done after installing libreboot, because the original firmware has a +whitelist of approved chips, and it will refuse to boot if you use an +'unauthorized' wifi card. + +The following photos show an Atheros AR5B95 being installed, to replace +the Intel chip that this X200 came with: + + + + +WWAN +==== + +If you have a WWAN/3G card and/or sim card reader, remove them +permanently. The WWAN-3G card has proprietary firmware inside; the +technology is identical to what is used in mobile phones, so it can also +track your movements. + +Not to be confused with wifi (wifi is fine). + +Intel Turbo Memory +================== + +Some X200 devices were sold with Intel Turbo Memory installed in the top-most +mini PCI-e slot. + +If you have one installed, you should probably remove it as it mostly likely +brings no benefits, while having many issues: +- It has been [shown to be + ineffective](http://www.anandtech.com/show/2252) at disk caching or battery + saving in most use cases. Having it installed might lead to more + battery consumption. +- Using it will most likely lead to data loss because with its + [driver](https://github.com/yarrick/turbomem), + "data cannot be written/read back reliably". The driver development + has also stopped. +- It might also be a security risk as it may have access to the system + RAM through the PCIe bus. + +Memory +====== + +You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs +(speed/size) as some non-matching pairs are known not to work. +You can also install a single module (meaning, one of the +slots will be empty) in slot 0. + +Make sure that the RAM you buy is the 2Rx8 density. + +In this photo, 8GiB of RAM (2x4GiB) is installed: + + + +Boot it! +-------- + +You should see something like this: + + + +Now [install GNU+Linux](../gnulinux/). + +X200S and X200 Tablet users: GPIO33 trick will not work. +-------------------------------------------------------- + +sgsit found out about a pin called GPIO33, which can be grounded to +disable the flashing protections by the descriptor and stop the ME from +starting (which itself interferes with flashing attempts). The theory +was proven correct; however, it is still useless in practise. + +Look just above the 7 in TP37 (that's GPIO33): + + + +By default we would see this in lenovobios, when trying flashrom -p +internal -w rom.rom: + + FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. + FREG2: Warning: Management Engine region (0x00001000-0x005f5fff) is locked. + +With GPIO33 grounded during boot, this disabled the flash protections as +set by descriptor, and stopped the ME from starting. The output changed +to: + + The Flash Descriptor Override Strap-Pin is set. Restrictions implied by + the Master Section of the flash descriptor are NOT in effect. Please note + that Protected Range (PR) restrictions still apply. + +The part in bold is what got us. This was still observed: + + PR0: Warning: 0x007e0000-0x01ffffff is read-only. + PR4: Warning: 0x005f8000-0x005fffff is locked. + +It is actually possible to disable these protections. Lenovobios does, +when updating the BIOS (proprietary one). One possible way to go about +this would be to debug the BIOS update utility from Lenovo, to find out +how it's disabling these protections. Some more research is available +here: +<http://www.coreboot.org/Board:lenovo/x200/internal_flashing_research> + +On a related note, libreboot has a utility that could help with +investigating this: +[../hardware/gm45\_remove\_me.html\#demefactory](../hardware/gm45_remove_me.md#demefactory) + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org> + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/x60_unbrick.md b/i18n/fr_FR/docs/install/x60_unbrick.md new file mode 100644 index 00000000..d7cb17a8 --- /dev/null +++ b/i18n/fr_FR/docs/install/x60_unbrick.md @@ -0,0 +1,218 @@ +--- +title: ThinkPad X60 Recovery guide +x-toc-enable: true +... + +This section documents how to recover from a bad flash that prevents +your ThinkPad X60 from booting. + +Brick type 1: bucts not reset. {#bucts_brick} +============================== + +You still have Lenovo BIOS, or you had libreboot running and you flashed +another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if +Lenovo BIOS was present and libreboot wasn't flashed.\ + +In this case, unbricking is easy: reset BUC.TS to 0 by removing that +yellow cmos coin (it's a battery) and putting it back after a minute or +two:\ +\ + +\*Those dd commands should be applied to all newly compiled X60 ROM +images (the ROM images in libreboot binary archives already have this +applied!): + + dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x10000\] count=64k + dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\] count=64k | hexdump + dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s coreboot.rom) - 0x20000\] count=64k conv=notrunc + +(doing this makes the ROM suitable for use when flashing a system that +still has Lenovo BIOS running, using those instructions: +<http://www.coreboot.org/Board:lenovo/x60/Installation>. + +bad rom (or user error), system won't boot {#recovery} +=========================================== + +In this scenario, you compiled a ROM that had an incorrect +configuration, or there is an actual bug preventing your system from +booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash +while Lenovo BIOS was running. In any case, your system is bricked and +will not boot at all. + +"Unbricking" means flashing a known-good (working) ROM. The problem: +you can't boot the system, making this difficult. In this situation, +external hardware (see hardware requirements above) is needed which can +flash the SPI chip (where libreboot resides). + +Remove those screws:\ + + +Push the keyboard forward (carefully):\ + + +Lift the keyboard up and disconnect it from the board:\ + + +Grab the right-hand side of the chassis and force it off (gently) and +pry up the rest of the chassis:\ + + +You should now have this:\ + + +Disconnect the wifi antenna cables, the modem cable and the speaker:\ + + +Unroute the cables along their path, carefully lifting the tape that +holds them in place. Then, disconnect the modem cable (other end) and +power connection and unroute all the cables so that they dangle by the +monitor hinge on the right-hand side:\ + + +Disconnect the monitor from the motherboard, and unroute the grey +antenna cable, carefully lifting the tape that holds it into place:\ + + +Carefully lift the remaining tape and unroute the left antenna cable so +that it is loose:\ + + +Remove the screw that is highlighted (do NOT remove the other one; it +holds part of the heatsink (other side) into place):\ + + +Remove those screws:\ + + +Carefully remove the plate, like so:\ + + +Remove the SATA connector:\ + + +Now remove the motherboard (gently) and cast the lcd/chassis aside:\ + + +Lift back that tape and hold it with something. Highlighted is the SPI +flash chip:\ + + +Now wire up the BBB and the Pomona with your PSU.\ +Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for +flashing.\ +*Note, the guide mentions a 3.3v DC PSU but you don't need this on the +X60: if you don't have or don't want to use an external PSU, then make +sure not to connect the 3.3v leads mentioned in the guide; instead, +connect the AC adapter (the one that normally charges your battery) so +that the board has power (but don't boot it up)* +\ +Correlate the following with the BBB guide linked above: + + POMONA 5250: + === golden finger and wifi switch ==== + 18 - - 1 + 22 - - NC ---------- audio jacks are on this end + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip + === CPU fan === + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + +Connecting the BBB and pomona (in this image, an external 3.3v DC PSU +was used):\ + + +Flashrom binaries for ARM (tested on a BBB) are distributed in +libreboot\_util. Alternatively, libreboot also distributes flashrom +source code which can be built. + +SSH'd into the BBB: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +yourrom.rom + +It should be `Verifying flash... VERIFIED` at the end. If flashrom +complains about multiple flash chip definitions detected, then choose +one of them following the instructions in the output. + +Remove the programmer and put it away somewhere. Put back the tape and +press firmly over it:\ + + +Your empty chassis:\ + + +Put the motherboard back in:\ + + +Reconnect SATA:\ + + +Put the plate back and re-insert those screws:\ + + +Re-route that antenna cable around the fan and apply the tape:\ + + +Route the cable here and then (not shown, due to error on my part) +reconnect the monitor cable to the motherboard and re-insert the +screws:\ + + +Re-insert that screw:\ + + +Route the black antenna cable like so:\ + + +Tuck it in neatly like so:\ + + +Route the modem cable like so:\ + + +Connect modem cable to board and tuck it in neatly like so:\ + + +Route the power connection and connect it to the board like so:\ + + +Route the antenna and modem cables neatly like so:\ + + +Connect the wifi antenna cables. At the start of the tutorial, this +system had an Intel wifi chip. Here you see I've replaced it with an +Atheros AR5B95 (supports 802.11n and can be used without blobs):\ + + +Connect the modem cable:\ + + +Connect the speaker:\ + + +You should now have this:\ + + +Re-connect the upper chassis:\ + + +Re-connect the keyboard:\ + + +Re-insert the screws that you removed earlier:\ + + +Power on!\ + + +Operating system:\ + + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) diff --git a/i18n/fr_FR/docs/install/x60flashscript.patch b/i18n/fr_FR/docs/install/x60flashscript.patch new file mode 100644 index 00000000..7f4c8307 --- /dev/null +++ b/i18n/fr_FR/docs/install/x60flashscript.patch @@ -0,0 +1,27 @@ +From 34270811fce1ecf0bcf3b1363b0dc3dbf284ab09 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 10 Jun 2015 22:53:28 +0000 +Subject: flash script: fix a really really really dumb mistake + +--- +diff --git a/flash b/flash +index c96b915..04fd274 100755 +--- a/flash ++++ b/flash +@@ -95,12 +95,12 @@ if [ "$mode" = "i945lenovo_firstflash" ] || [ "$mode" = "i945lenovo_secondflash" + # git or libreboot_src + bucts="./bucts/bucts" + flashrom_lenovobios_sst="./flashrom/flashrom_lenovobios_sst" +- flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_sst" ++ flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_macronix" + else + # libreboot_util + bucts="./bucts/$arch/bucts" + flashrom_lenovobios_sst="./flashrom/$arch/flashrom_lenovobios_sst" +- flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_sst" ++ flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_macronix" + fi + + # anti-bricking precaution +-- +cgit v0.9.0.2 diff --git a/i18n/fr_FR/docs/install/x60tablet_unbrick.md b/i18n/fr_FR/docs/install/x60tablet_unbrick.md new file mode 100644 index 00000000..fe4352bc --- /dev/null +++ b/i18n/fr_FR/docs/install/x60tablet_unbrick.md @@ -0,0 +1,125 @@ +--- +title: ThinkPad X60 Tablet Recovery guide +x-toc-enable: true +... + +This section documents how to recover from a bad flash that prevents +your ThinkPad X60 Tablet from booting. + +Brick type 1: bucts not reset. {#bucts_brick} +============================== + +You still have Lenovo BIOS, or you had libreboot running and you flashed +another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if +Lenovo BIOS was present and libreboot wasn't flashed.\ + +In this case, unbricking is easy: reset BUC.TS to 0 by removing that +yellow cmos coin (it's a battery) and putting it back after a minute or +two:\ +\ + +\*Those dd commands should be applied to all newly compiled X60 ROM +images (the ROM images in libreboot binary archives already have this +applied!): + + dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x10000\] count=64k + dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\] count=64k | hexdump + dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s coreboot.rom) - 0x20000\] count=64k conv=notrunc + +(doing this makes the ROM suitable for use when flashing a system that +still has Lenovo BIOS running, using those instructions: +<http://www.coreboot.org/Board:lenovo/x60/Installation>. + +bad rom (or user error), system won't boot {#recovery} +=========================================== + +In this scenario, you compiled a ROM that had an incorrect +configuration, or there is an actual bug preventing your system from +booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash +while Lenovo BIOS was running. In any case, your system is bricked and +will not boot at all. + +"Unbricking" means flashing a known-good (working) ROM. The problem: +you can't boot the system, making this difficult. In this situation, +external hardware (see hardware requirements above) is needed which can +flash the SPI chip (where libreboot resides). + + + +Remove those screws:\ + + +Remove the HDD:\ + + +Push keyboard forward to loosen it:\ + + +Lift:\ + + +Remove those:\ + + + + +Also remove that (marked) and unroute the antenna cables:\ + + +For some X60T laptops, you have to unroute those too:\ + + +Remove the LCD extend board screws. Also remove those screws (see blue +marks) and remove/unroute the cables and remove the metal plate:\ + + +Remove that screw and then remove the board:\ + + +Now wire up the BBB and the Pomona with your PSU.\ +Refer to [bbb\_setup.md](bbb_setup.md) for how to setup the BBB for +flashing.\ +*Note, the guide mentions a 3.3v DC PSU but you don't need this on the +X60 Tablet: if you don't have or don't want to use an external PSU, +then make sure not to connect the 3.3v leads mentioned in the guide; +instead, connect the AC adapter (the one that normally charges your +battery) so that the board has power (but don't boot it up)* +\ +Correlate the following with the BBB guide linked above: + + POMONA 5250: + === golden finger and wifi switch ==== + 18 - - 1 + 22 - - NC ---------- audio jacks are on this end + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip + === CPU fan === + This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack. + +Connecting the BBB and pomona (in this image, an external 3.3v DC PSU +was used):\ + + +Flashrom binaries for ARM (tested on a BBB) are distributed in +libreboot\_util. Alternatively, libreboot also distributes flashrom +source code which can be built. + +SSH'd into the BBB: + + # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w + +yourrom.rom + +It should be `Verifying flash... VERIFIED` at the end. If flashrom +complains about multiple flash chip definitions detected, then choose +one of them following the instructions in the output. + +Reverse the steps to re-assemble your system. + +Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\ + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License Version 1.3 or any later +version published by the Free Software Foundation +with no Invariant Sections, no Front Cover Texts, and no Back Cover Texts. +A copy of this license is found in [../fdl-1.3.md](../fdl-1.3.md) |
